FPGA implementation of Tomu
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Sean Cross 9e6faf4456 sch: mark VCCPLL regulator as DNP, use filter circuit
The VCCPLL line is extraordinarily sensitive to voltage rise times, and
appears to cause the FPGA to go into latchup very very easily.

As a result, the VCCPLL regulator burns all 250 mA of its budget
constantly, as the FPGA shunts VCCPLL to GND.  This would be ideal
during an ESD event, but not ideal during normal operations.

Indicate the VCCPLL Regulator approach is DNP, and that the VCCPLL
Filter Network is preferred.  Mostly because the regulator doesn't work
at all.

Signed-off-by: Sean Cross <sean@xobs.io>
2018-11-23 15:56:35 +08:00
hardware sch: mark VCCPLL regulator as DNP, use filter circuit 2018-11-23 15:56:35 +08:00
reference reference: add updated renders of evt1 2018-11-10 11:38:08 +08:00
.gitignore gitignore: ignore backup files 2018-10-31 16:06:14 +08:00
LICENSE LICENSE: add BSD 3-clause license 2018-10-30 16:08:52 +08:00
README.md README: convert from asciidoc to markdown 2018-10-30 16:40:21 +08:00

Tomu FPGA

An FPGA in your USB port!

Hardware

The hardware design files are all in the hardware/ directory. They were designed using KiCad 5.0.