Commit Graph

52 Commits

Author SHA1 Message Date
12afe3aed1 pcb: add more silk, fatten up ground traces
Add more silk, indicating website and other info.

While we're at it, move some traces around to give more copper area, and
drop some more vias to improve ground performance.

Signed-off-by: Sean Cross <sean@xobs.io>
2018-11-02 12:49:56 +08:00
1ef5bb909f reference: add updated schematic for evt1
Signed-off-by: Sean Cross <sean@xobs.io>
2018-11-02 11:39:13 +08:00
c5dda21a57 reference: add render of evt1 board
Signed-off-by: Sean Cross <sean@xobs.io>
2018-11-02 11:38:22 +08:00
d1923f10e1 hardware: pcb: finish layout with new PMOD connector
This is just about manufacturable.

Signed-off-by: Sean Cross <sean@xobs.io>
2018-11-02 11:37:49 +08:00
c02b3ef4ac hardware: sch: add PMOD connector
Signed-off-by: Sean Cross <sean@xobs.io>
2018-11-02 11:37:40 +08:00
74d402417b hardware: tomu-fpga-cache: add conn-1x6 for PMOD
This connector is used for the PMOD, so add it to the schematic library.

Signed-off-by: Sean Cross <sean@xobs.io>
2018-11-02 11:35:28 +08:00
29538e3235 hardware: footprints: extend USB-B pads, fix XTAL dot
Fix the crystal's "Pin 1" marker.

Extend the pads on the USB-B connector.

Signed-off-by: Sean Cross <sean@xobs.io>
2018-11-02 11:34:15 +08:00
b26b71343d hardware: first fully-routed PCB
The PCB is terrible, and probably would have all sorts of issues.  Will
rip it up and try again tomorrow.

Signed-off-by: Sean Cross <sean@xobs.io>
2018-10-31 22:28:10 +08:00
ee8313e78d gitignore: ignore backup files
Signed-off-by: Sean Cross <sean@xobs.io>
2018-10-31 16:06:14 +08:00
65ba72a57e hardware: pcb: add initial screenshot
It's unrouted, and will probably change, but it's an idea.

Signed-off-by: Sean Cross <sean@xobs.io>
2018-10-31 16:05:54 +08:00
e32b48a72e hardware: pcb: initial commit
This is an initial commit.  Still unclear of how big it will be, but
this is a good "minimum size" estimate.

Signed-off-by: Sean Cross <sean@xobs.io>
2018-10-31 16:03:55 +08:00
1acf50df39 hardware: sch: use footprints from tomu-fpga
Use our local copy of footprints, which are guaranteed not to change
between Kicad versions.

Signed-off-by: Sean Cross <sean@xobs.io>
2018-10-31 16:03:06 +08:00
f3315b58d8 pcb: add our own copies of 3d models and footprints
The Kicad default footprints seem volatile and unreliable.  Going
between two machines that both have "Kicad 5.0.0" installed results in
incompatibilities because KiCad has renamed their footprint libraries.

Also, for some reason it's going to Github to get footprints instead of
using local copies.

Copy every model and footprint we use into a local tomu-fpga.pretty.
This lets us ensure we can work offline, and also allows us to modify
footprints, e.g. by adding a "Pin 1" marker.

Signed-off-by: Sean Cross <sean@xobs.io>
2018-10-31 16:01:10 +08:00
3a14554c30 reference: add pushbutton, red LED
Signed-off-by: Sean Cross <sean@xobs.io>
2018-10-31 12:58:45 +08:00
820408887a hardware: pcb: add footprint library table
This will be used to tell pcbnew where to find footprint libraries.

Signed-off-by: Sean Cross <sean@xobs.io>
2018-10-31 12:58:07 +08:00
061b2c81a7 hardware: sch: map remaining footprints
Add footprints for the remaining schematic components.

Signed-off-by: Sean Cross <sean@xobs.io>
2018-10-31 12:57:33 +08:00
60d24d66fd hardware: add footprints for most components
Add footprints for most of the components we'll use.

Signed-off-by: Sean Cross <sean@xobs.io>
2018-10-31 12:57:17 +08:00
a715f5c728 hardware: add testpoints for SPI programming
This will become necessary when doing factory burning.

Signed-off-by: Sean Cross <sean@xobs.io>
2018-10-31 10:54:13 +08:00
30b7610996 pcb: hook up more debug wires
We have spare pins, so run more debug wires.

Many of these will probably get cut when doing the PCB layout.

Signed-off-by: Sean Cross <sean@xobs.io>
2018-10-31 10:45:27 +08:00
7bbaa24233 hardware: update name of SPI Flash
Signed-off-by: Sean Cross <sean@xobs.io>
2018-10-31 10:36:52 +08:00
4fe5f8f629 hardware: sch: use raspberry pi header, rework signaling
Rework the signaling to send everything to a Raspberry Pi header.

Signed-off-by: Sean Cross <sean@xobs.io>
2018-10-31 10:36:01 +08:00
eb93c70f01 hardware: sch: restructure SPI Flash symbol
It's much cleaner if we put power pins on one side and signal pins on
the other.  This removes the ratsnest that was building up.

Signed-off-by: Sean Cross <sean@xobs.io>
2018-10-31 10:35:19 +08:00
d99d091d95 pcb: schematic-cache: add Raspberry Pi, new SPI Flash
This reworks the SPI Flash layout and adds the Raspberry Pi header.

Signed-off-by: Sean Cross <sean@xobs.io>
2018-10-31 10:34:33 +08:00
6283435874 reference: evt1: publish final-final-final schematic
It's final this time!  I mean it!

Signed-off-by: Sean Cross <sean@xobs.io>
2018-10-31 10:33:49 +08:00
b7bcfc595b reference: update evt1 schematic pdf
This adds the `SPI Header`.

Signed-off-by: Sean Cross <sean@xobs.io>
2018-10-30 23:47:17 +08:00
0973972464 hardware: pcb: add SPI debug header
This will be used to program SPI during board bringup.

Signed-off-by: Sean Cross <sean@xobs.io>
2018-10-30 22:28:08 +08:00
9cb4ba9a3d reference: regenerate evt1 pdf
Signed-off-by: Sean Cross <sean@xobs.io>
2018-10-30 19:21:59 +08:00
78bb283bc6 hardware: sch: populate SPI, /RESET pullups
It turns out these resistors are important.

Signed-off-by: Sean Cross <sean@xobs.io>
2018-10-30 19:21:01 +08:00
ddb9948232 reference: add another fpga doc, xtal doc
Signed-off-by: Sean Cross <sean@xobs.io>
2018-10-30 19:16:30 +08:00
0c017aeb96 reference: update evt1 schematic
This schematic reflects more options, including two crystals now and
more decoupling capacitors.

It also adds an option to power VCCPLL from a second 1.2V regulator.

Signed-off-by: Sean Cross <sean@xobs.io>
2018-10-30 19:15:28 +08:00
f06ef4a7d5 hardware: sch: add crystal, VCCPLL regulator
Add a crystal, so we can test to make sure it works.

Also add a second regulator dedicated to VCCPLL in an effort to
cost-down the capacitor and large components that shouldn't be
necessary.

Signed-off-by: Sean Cross <sean@xobs.io>
2018-10-30 19:14:33 +08:00
76f7bf2548 pcb: sch: make ICE40 VCCPLL a power input
For some reason, this pin was listed as a `power output`, which does not
appear to be the case.  Due to this error, the DRC would fail when using
a regulator directly connected to the pin.

Mark this pin as a `power input` to fix this, since it's really where
power goes into the chip.

Signed-off-by: Sean Cross <sean@xobs.io>
2018-10-30 19:13:32 +08:00
ab18c90450 hardware: sch: specify spinor part
SPINOR parts are largely interchangeable.  Pick one.

Signed-off-by: Sean Cross <sean@xobs.io>
2018-10-30 17:09:11 +08:00
fd421b88ba reference: re-re-export plot file
The numbering may have changed things.  Maybe.

Signed-off-by: Sean Cross <sean@xobs.io>
2018-10-30 17:07:19 +08:00
c7bfc248af pcb: sch: renumber schematic
Renumber the schematic again, as things have shifted around a bit.

Signed-off-by: Sean Cross <sean@xobs.io>
2018-10-30 17:06:04 +08:00
ab33b4a0a1 hardware: rename tomu-fpga to pcb
This more closely reflects what it actually is.

Signed-off-by: Sean Cross <sean@xobs.io>
2018-10-30 17:05:02 +08:00
6136a66e8e reference: evt1: minor reworking of label positions
Signed-off-by: Sean Cross <sean@xobs.io>
2018-10-30 17:03:15 +08:00
b940b19cc6 reference: add datasheet for mems oscillator
Signed-off-by: Sean Cross <sean@xobs.io>
2018-10-30 17:02:41 +08:00
3e009d6f8b hardware: pcb: add manufacturer and part numbers
Signed-off-by: Sean Cross <sean@xobs.io>
2018-10-30 16:57:17 +08:00
72df05fe68 README: convert from asciidoc to markdown
The link mechanism for asciidoc is weird, and isn't working right now.

Signed-off-by: Sean Cross <sean@xobs.io>
2018-10-30 16:40:21 +08:00
d256c39c83 LICENSE: add BSD 3-clause license
It doesn't really make sense for PCBs, which will end up licensed under
a different scheme, but it will work for the source code that will end
up here.

Signed-off-by: Sean Cross <sean@xobs.io>
2018-10-30 16:08:52 +08:00
270d90a21d README: add file
Add a simple README file describing the project.

Signed-off-by: Sean Cross <sean@xobs.io>
2018-10-30 16:08:23 +08:00
bd65526f52 hardware: rename directory from pcb
Signed-off-by: Sean Cross <sean@xobs.io>
2018-10-30 16:08:06 +08:00
8a38ba4791 gitignore: ignore bak, bck, sym-lib-table
Signed-off-by: Sean Cross <sean@xobs.io>
2018-10-30 16:06:28 +08:00
a61337a472 pcb: sch: add tomu-fpga-cache.lib
This file appears to be a local version of the schematic symbols used in
the .sch file, so add it.

Signed-off-by: Sean Cross <sean@xobs.io>
2018-10-30 16:05:08 +08:00
8476a9b7f8 pcb: add tomu-fpga project file
This has changed slightly, so add the updated version.

Signed-off-by: Sean Cross <sean@xobs.io>
2018-10-30 16:04:36 +08:00
177fe7196f reference: evt1: add schematic
Add a schematic for EVT1, based on the most recent design.

Signed-off-by: Sean Cross <sean@xobs.io>
2018-10-30 16:03:48 +08:00
7c83be8dd9 pcb: sch: finish evt1 schematic
This should be a feature-complete schematic.  Now to start on PCB
layout.

Signed-off-by: Sean Cross <sean@xobs.io>
2018-10-30 16:02:55 +08:00
2cd2b204c2 reference: add more ICE40 documentation
Add more reference docs for ICE40 parts.

Signed-off-by: Sean Cross <sean@xobs.io>
2018-10-30 16:02:06 +08:00
b5152b0628 pcb: sch: initial beta draft
This is the first feature-complete version of the schematic.

Signed-off-by: Sean Cross <sean@xobs.io>
2018-10-30 13:25:22 +08:00