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137 Commits

Author SHA1 Message Date
Sean Cross 7d5a97d224 reference: re-plot evt3 schematic 
Signed-off-by: Sean Cross <sean@xobs.io>
 2019-05-21 09:49:53 +08:00
Sean Cross 926f7424dc sch: give part number for SPI Flash as Value 
Rather than just having the part number in the "MPN" field, tack it on
to the "Value" field as well so that it shows up in the plotted
schematic.

Signed-off-by: Sean Cross <sean@xobs.io>
 2019-05-21 09:48:28 +08:00
Sean Cross a84719a916 hardware: pcb: re-layout PCB with I2C pins swapped 
Swap PMOD pins 1-2 and 3-4.

Signed-off-by: Sean Cross <sean@xobs.io>
 2018-12-29 13:23:29 +01:00
Sean Cross e75ca1a362 hardware: sch: move i2c pins to pmoda pins 3 and 4 
The PMOD standard generally puts I2C pins on pins 3 and 4 of a PMOD
header.

Signed-off-by: Sean Cross <sean@xobs.io>
 2018-12-29 13:22:53 +01:00
Sean Cross a39e2111bc releases: evt3b: swap i2c pins 
Signed-off-by: Sean Cross <sean@xobs.io>
 2018-12-29 13:22:17 +01:00
Sean Cross 72816ce253 remove lockfile 
Signed-off-by: Sean Cross <sean@xobs.io>
 2018-12-25 12:16:46 +08:00
Sean Cross 50f783ba42 sch: change name to "Fomu" 
Signed-off-by: Sean Cross <sean@xobs.io>
 2018-12-25 12:16:19 +08:00
Sean Cross e7eb26bf16 releases: tag evt3 
Signed-off-by: Sean Cross <sean@xobs.io>
 2018-12-25 10:23:52 +08:00
Sean Cross ccd95ea61d hardware: pcb: update rpi header name 
Signed-off-by: Sean Cross <sean@xobs.io>
 2018-12-25 10:23:18 +08:00
Sean Cross 10352f9564 hardware: sch: update text to read "evt3" 
Signed-off-by: Sean Cross <sean@xobs.io>
 2018-12-25 10:23:05 +08:00
Sean Cross b01a4673fc evt3: add screenshots and schematic to reference 
Signed-off-by: Sean Cross <sean@xobs.io>
 2018-12-25 10:22:37 +08:00
Sean Cross 7092711673 pcb: fatten up some traces, mark silk url as evt3 
Signed-off-by: Sean Cross <sean@xobs.io>
 2018-12-25 01:10:03 +08:00
Sean Cross 4a31da4ef2 pcb: widen up gnd near usb connector 
Make the gnd pour a little bit wider near the USB connector.

Signed-off-by: Sean Cross <sean@xobs.io>
 2018-12-25 00:58:18 +08:00
Sean Cross 24f141a272 pcb: ECO003: don't put copper or solder mask on USB underside 
Leave bare FR4 on the underside of the USB connector, so there isn't
anything to scrape off.

Signed-off-by: Sean Cross <sean@xobs.io>
 2018-12-25 00:55:25 +08:00
Sean Cross 869536cf72 pcb: ECO002 / ECO004: update pcb with second pmod, swap dat4 
Signed-off-by: Sean Cross <sean@xobs.io>
 2018-12-25 00:37:31 +08:00
Sean Cross 83d368c34e sch: ECO004: add PMODb, swap PMODa_1 and DAT4 
Swap PMODa_1 and DAT4 so that PMODa gets two I3C-capable pins.

Signed-off-by: Sean Cross <sean@xobs.io>
 2018-12-25 00:37:21 +08:00
Sean Cross f8324c73f0 pcb: eco001: swap R3/R13 designators 
They were crossed somehow.

Signed-off-by: Sean Cross <sean@xobs.io>
 2018-12-24 17:32:05 +08:00
Sean Cross cd4d928adb hardware: sch: fix up DNP columns 
Mark parts as DNP with an "X" in the "DNP" column.

Signed-off-by: Sean Cross <sean@xobs.io>
 2018-11-29 08:52:07 -05:00
Sean Cross 9fe1b36c6b hardware: releases: evt2: update "DNP" columns 
We weren't marking every DNP column correctly.

Signed-off-by: Sean Cross <sean@xobs.io>
 2018-11-29 08:51:38 -05:00
Sean Cross eb55fbad83 reference: regenerate evt2 jpeg 
Signed-off-by: Sean Cross <sean@xobs.io>
 2018-11-24 16:56:40 -05:00
Sean Cross c02bb8bb2b hardware: footprints: mark various things as virtual 
Signed-off-by: Sean Cross <sean@xobs.io>
 2018-11-24 16:56:21 -05:00
Sean Cross 1e9391c679 releases: evt2: regenerate file after marking "virtual" components 
Signed-off-by: Sean Cross <sean@xobs.io>
 2018-11-24 16:55:50 -05:00
Sean Cross 9dd84bc90c releases: regenerate evt2 with proper bom file 
Signed-off-by: Sean Cross <sean@xobs.io>
 2018-11-24 16:52:08 -05:00
Sean Cross 7dd7b9d915 hardware: pcb: update footprint SMT flags for diodes 
Signed-off-by: Sean Cross <sean@xobs.io>
 2018-11-24 16:51:35 -05:00
Sean Cross dd030c6333 hardware: footprints: make smt components "SMT" 
Mark these components as "SMT" rather than "through-hole", which causes
them to be included in the pick-and-place file.

Signed-off-by: Sean Cross <sean@xobs.io>
 2018-11-24 16:50:57 -05:00
Sean Cross b39f62f812 pcb: no changes 
This appears to be kicad deciding to rewrite the whole file for no
particular reason.

Signed-off-by: Sean Cross <sean@xobs.io>
 2018-11-24 15:25:01 -05:00
Sean Cross b354879d66 pcb: redo evt2 with "pin 1" dots as circles 
Redo the "pin 1" dots so they are circle graphcs and not pads, which
don't seem to render in most Gerber files.

Signed-off-by: Sean Cross <sean@xobs.io>
 2018-11-25 04:22:44 +08:00
Sean Cross adc085d054 reference: evt2: add renders and tag evt2 
Signed-off-by: Sean Cross <sean@xobs.io>
 2018-11-23 16:27:40 +08:00
Sean Cross 8544a55853 releases: evt2: commit evt2 release of PCB 
This fixes the XTAL footprint, the SPI FLASH footprint, and depopulates
the VCCPLL Regulator in favor of the VCCPLL Filter Network.

Signed-off-by: Sean Cross <sean@xobs.io>
 2018-11-23 16:26:22 +08:00
Sean Cross f84237a9e5 hardware: footprints: add model for 5V TVM diode 
Signed-off-by: Sean Cross <sean@xobs.io>
 2018-11-23 16:26:05 +08:00
Sean Cross 29d29111d3 hardware: pcb: commit evt2 version of pcb 
Signed-off-by: Sean Cross <sean@xobs.io>
 2018-11-23 16:25:39 +08:00
Sean Cross 84990ef80e hardware: pcb: redo dbg numbering and add silk to rpi header 
Redo the numbering for the dbg pins.  While we're at it, add some silk
to the Raspberry Pi header so that we know what we're looking at.

Signed-off-by: Sean Cross <sean@xobs.io>
 2018-11-23 16:14:46 +08:00
Sean Cross e6d9a7c95a reference: re-plot evt2 schematic with new numbering scheme 
Signed-off-by: Sean Cross <sean@xobs.io>
 2018-11-23 16:14:03 +08:00
Sean Cross c9d52e9802 hardware: sch: re-number DBG pins to be consecutive 
Since there are only 6 pins, it doesn't make sense to have numbers such
as "DBG_10" and "DBG_9" anymore.

Signed-off-by: Sean Cross <sean@xobs.io>
 2018-11-23 16:13:29 +08:00
Sean Cross d6d18fcf59 reference: add schematic of evt2 
Signed-off-by: Sean Cross <sean@xobs.io>
 2018-11-23 15:59:57 +08:00
Sean Cross f318629747 hardware: sch: update designation to EVT2 
Signed-off-by: Sean Cross <sean@xobs.io>
 2018-11-23 15:59:28 +08:00
Sean Cross 9e6faf4456 sch: mark VCCPLL regulator as DNP, use filter circuit 
The VCCPLL line is extraordinarily sensitive to voltage rise times, and
appears to cause the FPGA to go into latchup very very easily.

As a result, the VCCPLL regulator burns all 250 mA of its budget
constantly, as the FPGA shunts VCCPLL to GND.  This would be ideal
during an ESD event, but not ideal during normal operations.

Indicate the VCCPLL Regulator approach is DNP, and that the VCCPLL
Filter Network is preferred.  Mostly because the regulator doesn't work
at all.

Signed-off-by: Sean Cross <sean@xobs.io>
 2018-11-23 15:56:35 +08:00
Sean Cross fbd26383f8 hardware: evt1a: work-in-progress charactarization 
Signed-off-by: Sean Cross <sean@xobs.io>
 2018-11-23 11:40:31 +08:00
Sean Cross d61d45f516 hardware: add some misc notes about evt 
Signed-off-by: Sean Cross <sean@xobs.io>
 2018-11-20 22:53:13 +08:00
Sean Cross 6cc58eee66 hardware: library: add oscillator and TVM parts 
Signed-off-by: Sean Cross <sean@xobs.io>
 2018-11-20 22:52:33 +08:00
Sean Cross 6a392e57d2 pcb: rework pcb with correct footprints, add tvs diodes 
Add TVS diodes, so we make sure they work.

Also, rework the PCB so that the clock actually functions now.

Signed-off-by: Sean Cross <sean@xobs.io>
 2018-11-20 22:51:43 +08:00
Sean Cross 1f878d4fe6 hardware: footprints: fix SOIC-8 
This footprint was completely incorrect.  The footprint appears to be
for a SON-8 not a SOIC-8.

Signed-off-by: Sean Cross <sean@xobs.io>
 2018-11-19 22:29:48 +08:00
Sean Cross 6b0d4cd082 hardware: footprints: xtal: correct pad orientation 
The footprint was backwards, which lead to some serious performance
issues.

Signed-off-by: Sean Cross <sean@xobs.io>
 2018-11-19 21:57:34 +08:00
Sean Cross 70c3c758da hardware: pcb: update footprints and 3d models for pin 1 marker 
Update the footprints so that the pin 1 marker is actually visible by
using silk where possible.

Signed-off-by: Sean Cross <sean@xobs.io>
 2018-11-13 10:51:06 +08:00
Sean Cross cd761fe680 hardware: cache: update cached library 
Signed-off-by: Sean Cross <sean@xobs.io>
 2018-11-13 10:43:34 +08:00
Sean Cross 5d4c48e48d hardware: dcm: update with rpi header 
Still not sure what this file is, exactly...

Signed-off-by: Sean Cross <sean@xobs.io>
 2018-11-13 10:43:03 +08:00
Sean Cross a4cc3b6729 hardware: pretty: remove 3D model from connectors 
On this PCB, these are unpopulated.

Signed-off-by: Sean Cross <sean@xobs.io>
 2018-11-13 10:42:31 +08:00
Sean Cross a4fdc6365d hardware: sch: use local copy of 20pin header 
Signed-off-by: Sean Cross <sean@xobs.io>
 2018-11-13 10:41:16 +08:00
Sean Cross 836b4c5d86 hardware: lib: add rpi connector to tomu-fpga.lib 
A hedge in case this part gets renamed.

Signed-off-by: Sean Cross <sean@xobs.io>
 2018-11-13 10:35:56 +08:00
Sean Cross 1f0152ebf0 hardware: sw-spst: replace 3d model with local copy 
This is another example of a 3D model that has gotten moved, causing
kicad to not work between versions.  Use a local copy of the 3D model.

Signed-off-by: Sean Cross <sean@xobs.io>
 2018-11-13 10:28:06 +08:00