Ran with svd2rust 0.12.0
This commit is contained in:
Kjetil Kjeka
parent
60604bcb5d
commit
dd21201e79
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@ -12,7 +12,7 @@ categories = ["embedded", "hardware-support", "no-std"]
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license = "Apache-2.0/MIT"
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[dependencies]
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cortex-m = "0.3.1"
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cortex-m = "0.4.3"
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bare-metal = "0.1.1"
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vcell = "0.1.0"
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@ -45,10 +45,14 @@ impl super::CFG1 {
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#[doc = "Possible values of the field `ADICLK`"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum ADICLKR {
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#[doc = "Alternate clock 1 (ADC_ALTCLK1)"] _00,
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#[doc = "Alternate clock 2 (ADC_ALTCLK2)"] _01,
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#[doc = "Alternate clock 3 (ADC_ALTCLK3)"] _10,
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#[doc = "Alternate clock 4 (ADC_ALTCLK4)"] _11,
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#[doc = "Alternate clock 1 (ADC_ALTCLK1)"]
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_00,
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#[doc = "Alternate clock 2 (ADC_ALTCLK2)"]
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_01,
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#[doc = "Alternate clock 3 (ADC_ALTCLK3)"]
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_10,
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#[doc = "Alternate clock 4 (ADC_ALTCLK4)"]
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_11,
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}
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impl ADICLKR {
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#[doc = r" Value of the field as raw bits"]
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@ -97,10 +101,14 @@ impl ADICLKR {
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#[doc = "Possible values of the field `MODE`"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum MODER {
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#[doc = "8-bit conversion."] _00,
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#[doc = "12-bit conversion."] _01,
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#[doc = "10-bit conversion."] _10,
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#[doc = r" Reserved"] _Reserved(u8),
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#[doc = "8-bit conversion."]
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_00,
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#[doc = "12-bit conversion."]
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_01,
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#[doc = "10-bit conversion."]
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_10,
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#[doc = r" Reserved"]
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_Reserved(u8),
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}
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impl MODER {
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#[doc = r" Value of the field as raw bits"]
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@ -143,10 +151,14 @@ impl MODER {
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#[doc = "Possible values of the field `ADIV`"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum ADIVR {
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#[doc = "The divide ratio is 1 and the clock rate is input clock."] _00,
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#[doc = "The divide ratio is 2 and the clock rate is (input clock)/2."] _01,
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#[doc = "The divide ratio is 4 and the clock rate is (input clock)/4."] _10,
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#[doc = "The divide ratio is 8 and the clock rate is (input clock)/8."] _11,
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#[doc = "The divide ratio is 1 and the clock rate is input clock."]
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_00,
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#[doc = "The divide ratio is 2 and the clock rate is (input clock)/2."]
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_01,
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#[doc = "The divide ratio is 4 and the clock rate is (input clock)/4."]
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_10,
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#[doc = "The divide ratio is 8 and the clock rate is (input clock)/8."]
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_11,
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}
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impl ADIVR {
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#[doc = r" Value of the field as raw bits"]
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@ -194,10 +206,14 @@ impl ADIVR {
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}
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#[doc = "Values that can be written to the field `ADICLK`"]
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pub enum ADICLKW {
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#[doc = "Alternate clock 1 (ADC_ALTCLK1)"] _00,
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#[doc = "Alternate clock 2 (ADC_ALTCLK2)"] _01,
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#[doc = "Alternate clock 3 (ADC_ALTCLK3)"] _10,
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#[doc = "Alternate clock 4 (ADC_ALTCLK4)"] _11,
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#[doc = "Alternate clock 1 (ADC_ALTCLK1)"]
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_00,
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#[doc = "Alternate clock 2 (ADC_ALTCLK2)"]
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_01,
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#[doc = "Alternate clock 3 (ADC_ALTCLK3)"]
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_10,
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#[doc = "Alternate clock 4 (ADC_ALTCLK4)"]
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_11,
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}
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impl ADICLKW {
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#[allow(missing_docs)]
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@ -256,9 +272,12 @@ impl<'a> _ADICLKW<'a> {
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}
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#[doc = "Values that can be written to the field `MODE`"]
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pub enum MODEW {
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#[doc = "8-bit conversion."] _00,
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#[doc = "12-bit conversion."] _01,
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#[doc = "10-bit conversion."] _10,
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#[doc = "8-bit conversion."]
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_00,
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#[doc = "12-bit conversion."]
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_01,
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#[doc = "10-bit conversion."]
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_10,
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}
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impl MODEW {
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#[allow(missing_docs)]
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@ -309,10 +328,14 @@ impl<'a> _MODEW<'a> {
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}
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#[doc = "Values that can be written to the field `ADIV`"]
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pub enum ADIVW {
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#[doc = "The divide ratio is 1 and the clock rate is input clock."] _00,
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#[doc = "The divide ratio is 2 and the clock rate is (input clock)/2."] _01,
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#[doc = "The divide ratio is 4 and the clock rate is (input clock)/4."] _10,
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#[doc = "The divide ratio is 8 and the clock rate is (input clock)/8."] _11,
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#[doc = "The divide ratio is 1 and the clock rate is input clock."]
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_00,
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#[doc = "The divide ratio is 2 and the clock rate is (input clock)/2."]
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_01,
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#[doc = "The divide ratio is 4 and the clock rate is (input clock)/4."]
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_10,
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#[doc = "The divide ratio is 8 and the clock rate is (input clock)/8."]
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_11,
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}
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impl ADIVW {
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#[allow(missing_docs)]
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177
src/adc0/mod.rs
177
src/adc0/mod.rs
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@ -2,77 +2,124 @@ use vcell::VolatileCell;
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#[doc = r" Register block"]
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#[repr(C)]
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pub struct RegisterBlock {
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#[doc = "0x00 - ADC Status and Control Register 1"] pub sc1a: SC1,
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#[doc = "0x04 - ADC Status and Control Register 1"] pub sc1b: SC1,
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#[doc = "0x08 - ADC Status and Control Register 1"] pub sc1c: SC1,
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#[doc = "0x0c - ADC Status and Control Register 1"] pub sc1d: SC1,
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#[doc = "0x10 - ADC Status and Control Register 1"] pub sc1e: SC1,
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#[doc = "0x14 - ADC Status and Control Register 1"] pub sc1f: SC1,
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#[doc = "0x18 - ADC Status and Control Register 1"] pub sc1g: SC1,
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#[doc = "0x1c - ADC Status and Control Register 1"] pub sc1h: SC1,
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#[doc = "0x20 - ADC Status and Control Register 1"] pub sc1i: SC1,
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#[doc = "0x24 - ADC Status and Control Register 1"] pub sc1j: SC1,
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#[doc = "0x28 - ADC Status and Control Register 1"] pub sc1k: SC1,
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#[doc = "0x2c - ADC Status and Control Register 1"] pub sc1l: SC1,
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#[doc = "0x30 - ADC Status and Control Register 1"] pub sc1m: SC1,
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#[doc = "0x34 - ADC Status and Control Register 1"] pub sc1n: SC1,
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#[doc = "0x38 - ADC Status and Control Register 1"] pub sc1o: SC1,
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#[doc = "0x3c - ADC Status and Control Register 1"] pub sc1p: SC1,
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#[doc = "0x40 - ADC Configuration Register 1"] pub cfg1: CFG1,
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#[doc = "0x44 - ADC Configuration Register 2"] pub cfg2: CFG2,
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#[doc = "0x48 - ADC Data Result Registers"] pub ra: R,
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#[doc = "0x4c - ADC Data Result Registers"] pub rb: R,
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#[doc = "0x50 - ADC Data Result Registers"] pub rc: R,
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#[doc = "0x54 - ADC Data Result Registers"] pub rd: R,
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#[doc = "0x58 - ADC Data Result Registers"] pub re: R,
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#[doc = "0x5c - ADC Data Result Registers"] pub rf: R,
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#[doc = "0x60 - ADC Data Result Registers"] pub rg: R,
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#[doc = "0x64 - ADC Data Result Registers"] pub rh: R,
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#[doc = "0x68 - ADC Data Result Registers"] pub ri: R,
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#[doc = "0x6c - ADC Data Result Registers"] pub rj: R,
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#[doc = "0x70 - ADC Data Result Registers"] pub rk: R,
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#[doc = "0x74 - ADC Data Result Registers"] pub rl: R,
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#[doc = "0x78 - ADC Data Result Registers"] pub rm: R,
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#[doc = "0x7c - ADC Data Result Registers"] pub rn: R,
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#[doc = "0x80 - ADC Data Result Registers"] pub ro: R,
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#[doc = "0x84 - ADC Data Result Registers"] pub rp: R,
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#[doc = "0x88 - Compare Value Registers"] pub cv1: CV,
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#[doc = "0x8c - Compare Value Registers"] pub cv2: CV,
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#[doc = "0x90 - Status and Control Register 2"] pub sc2: SC2,
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#[doc = "0x94 - Status and Control Register 3"] pub sc3: SC3,
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#[doc = "0x98 - BASE Offset Register"] pub base_ofs: BASE_OFS,
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#[doc = "0x9c - ADC Offset Correction Register"] pub ofs: OFS,
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#[doc = "0xa0 - USER Offset Correction Register"] pub usr_ofs: USR_OFS,
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#[doc = "0xa4 - ADC X Offset Correction Register"] pub xofs: XOFS,
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#[doc = "0xa8 - ADC Y Offset Correction Register"] pub yofs: YOFS,
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#[doc = "0xac - ADC Gain Register"] pub g: G,
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#[doc = "0xb0 - ADC User Gain Register"] pub ug: UG,
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#[doc = "0xb4 - ADC General Calibration Value Register S"] pub clps: CLPS,
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#[doc = "0xb8 - ADC Plus-Side General Calibration Value Register 3"] pub clp3: CLP3,
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#[doc = "0xbc - ADC Plus-Side General Calibration Value Register 2"] pub clp2: CLP2,
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#[doc = "0xc0 - ADC Plus-Side General Calibration Value Register 1"] pub clp1: CLP1,
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#[doc = "0xc4 - ADC Plus-Side General Calibration Value Register 0"] pub clp0: CLP0,
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#[doc = "0xc8 - ADC Plus-Side General Calibration Value Register X"] pub clpx: CLPX,
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#[doc = "0xcc - ADC Plus-Side General Calibration Value Register 9"] pub clp9: CLP9,
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#[doc = "0xd0 - ADC General Calibration Offset Value Register S"] pub clps_ofs: CLPS_OFS,
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#[doc = "0x00 - ADC Status and Control Register 1"]
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pub sc1a: SC1,
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#[doc = "0x04 - ADC Status and Control Register 1"]
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pub sc1b: SC1,
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#[doc = "0x08 - ADC Status and Control Register 1"]
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pub sc1c: SC1,
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#[doc = "0x0c - ADC Status and Control Register 1"]
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pub sc1d: SC1,
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#[doc = "0x10 - ADC Status and Control Register 1"]
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pub sc1e: SC1,
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#[doc = "0x14 - ADC Status and Control Register 1"]
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pub sc1f: SC1,
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#[doc = "0x18 - ADC Status and Control Register 1"]
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pub sc1g: SC1,
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#[doc = "0x1c - ADC Status and Control Register 1"]
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pub sc1h: SC1,
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#[doc = "0x20 - ADC Status and Control Register 1"]
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pub sc1i: SC1,
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#[doc = "0x24 - ADC Status and Control Register 1"]
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pub sc1j: SC1,
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#[doc = "0x28 - ADC Status and Control Register 1"]
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pub sc1k: SC1,
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#[doc = "0x2c - ADC Status and Control Register 1"]
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pub sc1l: SC1,
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#[doc = "0x30 - ADC Status and Control Register 1"]
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pub sc1m: SC1,
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#[doc = "0x34 - ADC Status and Control Register 1"]
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pub sc1n: SC1,
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#[doc = "0x38 - ADC Status and Control Register 1"]
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pub sc1o: SC1,
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#[doc = "0x3c - ADC Status and Control Register 1"]
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pub sc1p: SC1,
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#[doc = "0x40 - ADC Configuration Register 1"]
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pub cfg1: CFG1,
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#[doc = "0x44 - ADC Configuration Register 2"]
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pub cfg2: CFG2,
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#[doc = "0x48 - ADC Data Result Registers"]
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pub ra: R,
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#[doc = "0x4c - ADC Data Result Registers"]
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pub rb: R,
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#[doc = "0x50 - ADC Data Result Registers"]
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pub rc: R,
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#[doc = "0x54 - ADC Data Result Registers"]
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pub rd: R,
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#[doc = "0x58 - ADC Data Result Registers"]
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pub re: R,
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#[doc = "0x5c - ADC Data Result Registers"]
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pub rf: R,
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#[doc = "0x60 - ADC Data Result Registers"]
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pub rg: R,
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#[doc = "0x64 - ADC Data Result Registers"]
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pub rh: R,
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#[doc = "0x68 - ADC Data Result Registers"]
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pub ri: R,
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#[doc = "0x6c - ADC Data Result Registers"]
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pub rj: R,
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#[doc = "0x70 - ADC Data Result Registers"]
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pub rk: R,
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#[doc = "0x74 - ADC Data Result Registers"]
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pub rl: R,
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#[doc = "0x78 - ADC Data Result Registers"]
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pub rm: R,
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#[doc = "0x7c - ADC Data Result Registers"]
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pub rn: R,
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#[doc = "0x80 - ADC Data Result Registers"]
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pub ro: R,
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#[doc = "0x84 - ADC Data Result Registers"]
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pub rp: R,
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#[doc = "0x88 - Compare Value Registers"]
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pub cv1: CV,
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#[doc = "0x8c - Compare Value Registers"]
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pub cv2: CV,
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#[doc = "0x90 - Status and Control Register 2"]
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pub sc2: SC2,
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#[doc = "0x94 - Status and Control Register 3"]
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pub sc3: SC3,
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#[doc = "0x98 - BASE Offset Register"]
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pub base_ofs: BASE_OFS,
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#[doc = "0x9c - ADC Offset Correction Register"]
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pub ofs: OFS,
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#[doc = "0xa0 - USER Offset Correction Register"]
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pub usr_ofs: USR_OFS,
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#[doc = "0xa4 - ADC X Offset Correction Register"]
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pub xofs: XOFS,
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#[doc = "0xa8 - ADC Y Offset Correction Register"]
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pub yofs: YOFS,
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#[doc = "0xac - ADC Gain Register"]
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pub g: G,
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#[doc = "0xb0 - ADC User Gain Register"]
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pub ug: UG,
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#[doc = "0xb4 - ADC General Calibration Value Register S"]
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pub clps: CLPS,
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#[doc = "0xb8 - ADC Plus-Side General Calibration Value Register 3"]
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pub clp3: CLP3,
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#[doc = "0xbc - ADC Plus-Side General Calibration Value Register 2"]
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pub clp2: CLP2,
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#[doc = "0xc0 - ADC Plus-Side General Calibration Value Register 1"]
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pub clp1: CLP1,
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#[doc = "0xc4 - ADC Plus-Side General Calibration Value Register 0"]
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pub clp0: CLP0,
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#[doc = "0xc8 - ADC Plus-Side General Calibration Value Register X"]
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pub clpx: CLPX,
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#[doc = "0xcc - ADC Plus-Side General Calibration Value Register 9"]
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pub clp9: CLP9,
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#[doc = "0xd0 - ADC General Calibration Offset Value Register S"]
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pub clps_ofs: CLPS_OFS,
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#[doc = "0xd4 - ADC Plus-Side General Calibration Offset Value Register 3"]
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pub clp3_ofs:
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CLP3_OFS,
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pub clp3_ofs: CLP3_OFS,
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#[doc = "0xd8 - ADC Plus-Side General Calibration Offset Value Register 2"]
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pub clp2_ofs:
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CLP2_OFS,
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pub clp2_ofs: CLP2_OFS,
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#[doc = "0xdc - ADC Plus-Side General Calibration Offset Value Register 1"]
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pub clp1_ofs:
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CLP1_OFS,
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pub clp1_ofs: CLP1_OFS,
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#[doc = "0xe0 - ADC Plus-Side General Calibration Offset Value Register 0"]
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pub clp0_ofs:
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CLP0_OFS,
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pub clp0_ofs: CLP0_OFS,
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#[doc = "0xe4 - ADC Plus-Side General Calibration Offset Value Register X"]
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pub clpx_ofs:
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CLPX_OFS,
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pub clpx_ofs: CLPX_OFS,
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#[doc = "0xe8 - ADC Plus-Side General Calibration Offset Value Register 9"]
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pub clp9_ofs:
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CLP9_OFS,
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pub clp9_ofs: CLP9_OFS,
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}
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#[doc = "ADC Status and Control Register 1"]
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pub struct SC1 {
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@ -45,36 +45,62 @@ impl super::SC1 {
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#[doc = "Possible values of the field `ADCH`"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum ADCHR {
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#[doc = "Exernal channel 0 is selected as input."] _00000,
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#[doc = "Exernal channel 1 is selected as input."] _00001,
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#[doc = "Exernal channel 2 is selected as input."] _00010,
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#[doc = "Exernal channel 3 is selected as input."] _00011,
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#[doc = "Exernal channel 4 is selected as input."] _00100,
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#[doc = "Exernal channel 5 is selected as input."] _00101,
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#[doc = "Exernal channel 6 is selected as input."] _00110,
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#[doc = "Exernal channel 7 is selected as input."] _00111,
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#[doc = "Exernal channel 8 is selected as input."] _01000,
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#[doc = "Exernal channel 9 is selected as input."] _01001,
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#[doc = "Exernal channel 10 is selected as input."] _01010,
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#[doc = "Exernal channel 11 is selected as input."] _01011,
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#[doc = "Exernal channel 12 is selected as input."] _01100,
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#[doc = "Exernal channel 13 is selected as input."] _01101,
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#[doc = "Exernal channel 14 is selected as input."] _01110,
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#[doc = "Exernal channel 15 is selected as input."] _01111,
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#[doc = "Exernal channel 18 is selected as input."] _10010,
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#[doc = "Exernal channel 19 is selected as input."] _10011,
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#[doc = "Internal channel 0 is selected as input."] _10101,
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#[doc = "Internal channel 1 is selected as input."] _10110,
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#[doc = "Internal channel 2 is selected as input."] _10111,
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#[doc = "Temp Sensor"] _11010,
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#[doc = "Band Gap"] _11011,
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#[doc = "Internal channel 3 is selected as input."] _11100,
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#[doc = "Exernal channel 0 is selected as input."]
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_00000,
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#[doc = "Exernal channel 1 is selected as input."]
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_00001,
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#[doc = "Exernal channel 2 is selected as input."]
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_00010,
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#[doc = "Exernal channel 3 is selected as input."]
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_00011,
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#[doc = "Exernal channel 4 is selected as input."]
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_00100,
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#[doc = "Exernal channel 5 is selected as input."]
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_00101,
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#[doc = "Exernal channel 6 is selected as input."]
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||||
_00110,
|
||||
#[doc = "Exernal channel 7 is selected as input."]
|
||||
_00111,
|
||||
#[doc = "Exernal channel 8 is selected as input."]
|
||||
_01000,
|
||||
#[doc = "Exernal channel 9 is selected as input."]
|
||||
_01001,
|
||||
#[doc = "Exernal channel 10 is selected as input."]
|
||||
_01010,
|
||||
#[doc = "Exernal channel 11 is selected as input."]
|
||||
_01011,
|
||||
#[doc = "Exernal channel 12 is selected as input."]
|
||||
_01100,
|
||||
#[doc = "Exernal channel 13 is selected as input."]
|
||||
_01101,
|
||||
#[doc = "Exernal channel 14 is selected as input."]
|
||||
_01110,
|
||||
#[doc = "Exernal channel 15 is selected as input."]
|
||||
_01111,
|
||||
#[doc = "Exernal channel 18 is selected as input."]
|
||||
_10010,
|
||||
#[doc = "Exernal channel 19 is selected as input."]
|
||||
_10011,
|
||||
#[doc = "Internal channel 0 is selected as input."]
|
||||
_10101,
|
||||
#[doc = "Internal channel 1 is selected as input."]
|
||||
_10110,
|
||||
#[doc = "Internal channel 2 is selected as input."]
|
||||
_10111,
|
||||
#[doc = "Temp Sensor"]
|
||||
_11010,
|
||||
#[doc = "Band Gap"]
|
||||
_11011,
|
||||
#[doc = "Internal channel 3 is selected as input."]
|
||||
_11100,
|
||||
#[doc = "VREFSH is selected as input. Voltage reference selected is determined by SC2[REFSEL]."]
|
||||
_11101,
|
||||
#[doc = "VREFSL is selected as input. Voltage reference selected is determined by SC2[REFSEL]."]
|
||||
_11110,
|
||||
#[doc = "Module is disabled"] _11111,
|
||||
#[doc = r" Reserved"] _Reserved(u8),
|
||||
#[doc = "Module is disabled"]
|
||||
_11111,
|
||||
#[doc = r" Reserved"]
|
||||
_Reserved(u8),
|
||||
}
|
||||
impl ADCHR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
|
|
@ -285,8 +311,10 @@ impl ADCHR {
|
|||
#[doc = "Possible values of the field `AIEN`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum AIENR {
|
||||
#[doc = "Conversion complete interrupt is disabled."] _0,
|
||||
#[doc = "Conversion complete interrupt is enabled."] _1,
|
||||
#[doc = "Conversion complete interrupt is disabled."]
|
||||
_0,
|
||||
#[doc = "Conversion complete interrupt is enabled."]
|
||||
_1,
|
||||
}
|
||||
impl AIENR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -330,8 +358,10 @@ impl AIENR {
|
|||
#[doc = "Possible values of the field `COCO`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum COCOR {
|
||||
#[doc = "Conversion is not completed."] _0,
|
||||
#[doc = "Conversion is completed."] _1,
|
||||
#[doc = "Conversion is not completed."]
|
||||
_0,
|
||||
#[doc = "Conversion is completed."]
|
||||
_1,
|
||||
}
|
||||
impl COCOR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -374,35 +404,60 @@ impl COCOR {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `ADCH`"]
|
||||
pub enum ADCHW {
|
||||
#[doc = "Exernal channel 0 is selected as input."] _00000,
|
||||
#[doc = "Exernal channel 1 is selected as input."] _00001,
|
||||
#[doc = "Exernal channel 2 is selected as input."] _00010,
|
||||
#[doc = "Exernal channel 3 is selected as input."] _00011,
|
||||
#[doc = "Exernal channel 4 is selected as input."] _00100,
|
||||
#[doc = "Exernal channel 5 is selected as input."] _00101,
|
||||
#[doc = "Exernal channel 6 is selected as input."] _00110,
|
||||
#[doc = "Exernal channel 7 is selected as input."] _00111,
|
||||
#[doc = "Exernal channel 8 is selected as input."] _01000,
|
||||
#[doc = "Exernal channel 9 is selected as input."] _01001,
|
||||
#[doc = "Exernal channel 10 is selected as input."] _01010,
|
||||
#[doc = "Exernal channel 11 is selected as input."] _01011,
|
||||
#[doc = "Exernal channel 12 is selected as input."] _01100,
|
||||
#[doc = "Exernal channel 13 is selected as input."] _01101,
|
||||
#[doc = "Exernal channel 14 is selected as input."] _01110,
|
||||
#[doc = "Exernal channel 15 is selected as input."] _01111,
|
||||
#[doc = "Exernal channel 18 is selected as input."] _10010,
|
||||
#[doc = "Exernal channel 19 is selected as input."] _10011,
|
||||
#[doc = "Internal channel 0 is selected as input."] _10101,
|
||||
#[doc = "Internal channel 1 is selected as input."] _10110,
|
||||
#[doc = "Internal channel 2 is selected as input."] _10111,
|
||||
#[doc = "Temp Sensor"] _11010,
|
||||
#[doc = "Band Gap"] _11011,
|
||||
#[doc = "Internal channel 3 is selected as input."] _11100,
|
||||
#[doc = "Exernal channel 0 is selected as input."]
|
||||
_00000,
|
||||
#[doc = "Exernal channel 1 is selected as input."]
|
||||
_00001,
|
||||
#[doc = "Exernal channel 2 is selected as input."]
|
||||
_00010,
|
||||
#[doc = "Exernal channel 3 is selected as input."]
|
||||
_00011,
|
||||
#[doc = "Exernal channel 4 is selected as input."]
|
||||
_00100,
|
||||
#[doc = "Exernal channel 5 is selected as input."]
|
||||
_00101,
|
||||
#[doc = "Exernal channel 6 is selected as input."]
|
||||
_00110,
|
||||
#[doc = "Exernal channel 7 is selected as input."]
|
||||
_00111,
|
||||
#[doc = "Exernal channel 8 is selected as input."]
|
||||
_01000,
|
||||
#[doc = "Exernal channel 9 is selected as input."]
|
||||
_01001,
|
||||
#[doc = "Exernal channel 10 is selected as input."]
|
||||
_01010,
|
||||
#[doc = "Exernal channel 11 is selected as input."]
|
||||
_01011,
|
||||
#[doc = "Exernal channel 12 is selected as input."]
|
||||
_01100,
|
||||
#[doc = "Exernal channel 13 is selected as input."]
|
||||
_01101,
|
||||
#[doc = "Exernal channel 14 is selected as input."]
|
||||
_01110,
|
||||
#[doc = "Exernal channel 15 is selected as input."]
|
||||
_01111,
|
||||
#[doc = "Exernal channel 18 is selected as input."]
|
||||
_10010,
|
||||
#[doc = "Exernal channel 19 is selected as input."]
|
||||
_10011,
|
||||
#[doc = "Internal channel 0 is selected as input."]
|
||||
_10101,
|
||||
#[doc = "Internal channel 1 is selected as input."]
|
||||
_10110,
|
||||
#[doc = "Internal channel 2 is selected as input."]
|
||||
_10111,
|
||||
#[doc = "Temp Sensor"]
|
||||
_11010,
|
||||
#[doc = "Band Gap"]
|
||||
_11011,
|
||||
#[doc = "Internal channel 3 is selected as input."]
|
||||
_11100,
|
||||
#[doc = "VREFSH is selected as input. Voltage reference selected is determined by SC2[REFSEL]."]
|
||||
_11101,
|
||||
#[doc = "VREFSL is selected as input. Voltage reference selected is determined by SC2[REFSEL]."]
|
||||
_11110,
|
||||
#[doc = "Module is disabled"] _11111,
|
||||
#[doc = "Module is disabled"]
|
||||
_11111,
|
||||
}
|
||||
impl ADCHW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -597,8 +652,10 @@ impl<'a> _ADCHW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `AIEN`"]
|
||||
pub enum AIENW {
|
||||
#[doc = "Conversion complete interrupt is disabled."] _0,
|
||||
#[doc = "Conversion complete interrupt is enabled."] _1,
|
||||
#[doc = "Conversion complete interrupt is disabled."]
|
||||
_0,
|
||||
#[doc = "Conversion complete interrupt is enabled."]
|
||||
_1,
|
||||
}
|
||||
impl AIENW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
|
|||
|
|
@ -45,10 +45,12 @@ impl super::SC2 {
|
|||
#[doc = "Possible values of the field `REFSEL`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum REFSELR {
|
||||
#[doc = "Default voltage reference pin pair, that is, external pins VREFH and VREFL"] _00,
|
||||
#[doc = "Default voltage reference pin pair, that is, external pins VREFH and VREFL"]
|
||||
_00,
|
||||
#[doc = "Alternate reference voltage, that is, VALTH. This voltage may be additional external pin or internal source depending on the MCU configuration. See the chip configuration information for details specific to this MCU."]
|
||||
_01,
|
||||
#[doc = r" Reserved"] _Reserved(u8),
|
||||
#[doc = r" Reserved"]
|
||||
_Reserved(u8),
|
||||
}
|
||||
impl REFSELR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
|
|
@ -84,7 +86,8 @@ impl REFSELR {
|
|||
#[doc = "Possible values of the field `DMAEN`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum DMAENR {
|
||||
#[doc = "DMA is disabled."] _0,
|
||||
#[doc = "DMA is disabled."]
|
||||
_0,
|
||||
#[doc = "DMA is enabled and will assert the ADC DMA request during an ADC conversion complete event , which is indicated when any SC1n[COCO] flag is asserted."]
|
||||
_1,
|
||||
}
|
||||
|
|
@ -172,8 +175,10 @@ impl ACFGTR {
|
|||
#[doc = "Possible values of the field `ACFE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ACFER {
|
||||
#[doc = "Compare function disabled."] _0,
|
||||
#[doc = "Compare function enabled."] _1,
|
||||
#[doc = "Compare function disabled."]
|
||||
_0,
|
||||
#[doc = "Compare function enabled."]
|
||||
_1,
|
||||
}
|
||||
impl ACFER {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -217,8 +222,10 @@ impl ACFER {
|
|||
#[doc = "Possible values of the field `ADTRG`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ADTRGR {
|
||||
#[doc = "Software trigger selected."] _0,
|
||||
#[doc = "Hardware trigger selected."] _1,
|
||||
#[doc = "Software trigger selected."]
|
||||
_0,
|
||||
#[doc = "Hardware trigger selected."]
|
||||
_1,
|
||||
}
|
||||
impl ADTRGR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -262,8 +269,10 @@ impl ADTRGR {
|
|||
#[doc = "Possible values of the field `ADACT`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ADACTR {
|
||||
#[doc = "Conversion not in progress."] _0,
|
||||
#[doc = "Conversion in progress."] _1,
|
||||
#[doc = "Conversion not in progress."]
|
||||
_0,
|
||||
#[doc = "Conversion in progress."]
|
||||
_1,
|
||||
}
|
||||
impl ADACTR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -318,9 +327,12 @@ impl TRGPRNUMR {
|
|||
#[doc = "Possible values of the field `TRGSTLAT`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TRGSTLATR {
|
||||
#[doc = "No trigger request has been latched"] _0,
|
||||
#[doc = "A trigger request has been latched"] _1,
|
||||
#[doc = r" Reserved"] _Reserved(u8),
|
||||
#[doc = "No trigger request has been latched"]
|
||||
_0,
|
||||
#[doc = "A trigger request has been latched"]
|
||||
_1,
|
||||
#[doc = r" Reserved"]
|
||||
_Reserved(u8),
|
||||
}
|
||||
impl TRGSTLATR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
|
|
@ -356,9 +368,12 @@ impl TRGSTLATR {
|
|||
#[doc = "Possible values of the field `TRGSTERR`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TRGSTERRR {
|
||||
#[doc = "No error has occurred"] _0,
|
||||
#[doc = "An error has occurred"] _1,
|
||||
#[doc = r" Reserved"] _Reserved(u8),
|
||||
#[doc = "No error has occurred"]
|
||||
_0,
|
||||
#[doc = "An error has occurred"]
|
||||
_1,
|
||||
#[doc = r" Reserved"]
|
||||
_Reserved(u8),
|
||||
}
|
||||
impl TRGSTERRR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
|
|
@ -393,7 +408,8 @@ impl TRGSTERRR {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `REFSEL`"]
|
||||
pub enum REFSELW {
|
||||
#[doc = "Default voltage reference pin pair, that is, external pins VREFH and VREFL"] _00,
|
||||
#[doc = "Default voltage reference pin pair, that is, external pins VREFH and VREFL"]
|
||||
_00,
|
||||
#[doc = "Alternate reference voltage, that is, VALTH. This voltage may be additional external pin or internal source depending on the MCU configuration. See the chip configuration information for details specific to this MCU."]
|
||||
_01,
|
||||
}
|
||||
|
|
@ -440,7 +456,8 @@ impl<'a> _REFSELW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `DMAEN`"]
|
||||
pub enum DMAENW {
|
||||
#[doc = "DMA is disabled."] _0,
|
||||
#[doc = "DMA is disabled."]
|
||||
_0,
|
||||
#[doc = "DMA is enabled and will assert the ADC DMA request during an ADC conversion complete event , which is indicated when any SC1n[COCO] flag is asserted."]
|
||||
_1,
|
||||
}
|
||||
|
|
@ -543,8 +560,10 @@ impl<'a> _ACFGTW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `ACFE`"]
|
||||
pub enum ACFEW {
|
||||
#[doc = "Compare function disabled."] _0,
|
||||
#[doc = "Compare function enabled."] _1,
|
||||
#[doc = "Compare function disabled."]
|
||||
_0,
|
||||
#[doc = "Compare function enabled."]
|
||||
_1,
|
||||
}
|
||||
impl ACFEW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -599,8 +618,10 @@ impl<'a> _ACFEW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `ADTRG`"]
|
||||
pub enum ADTRGW {
|
||||
#[doc = "Software trigger selected."] _0,
|
||||
#[doc = "Hardware trigger selected."] _1,
|
||||
#[doc = "Software trigger selected."]
|
||||
_0,
|
||||
#[doc = "Hardware trigger selected."]
|
||||
_1,
|
||||
}
|
||||
impl ADTRGW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
|
|||
|
|
@ -45,10 +45,14 @@ impl super::SC3 {
|
|||
#[doc = "Possible values of the field `AVGS`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum AVGSR {
|
||||
#[doc = "4 samples averaged."] _00,
|
||||
#[doc = "8 samples averaged."] _01,
|
||||
#[doc = "16 samples averaged."] _10,
|
||||
#[doc = "32 samples averaged."] _11,
|
||||
#[doc = "4 samples averaged."]
|
||||
_00,
|
||||
#[doc = "8 samples averaged."]
|
||||
_01,
|
||||
#[doc = "16 samples averaged."]
|
||||
_10,
|
||||
#[doc = "32 samples averaged."]
|
||||
_11,
|
||||
}
|
||||
impl AVGSR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
|
|
@ -97,8 +101,10 @@ impl AVGSR {
|
|||
#[doc = "Possible values of the field `AVGE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum AVGER {
|
||||
#[doc = "Hardware average function disabled."] _0,
|
||||
#[doc = "Hardware average function enabled."] _1,
|
||||
#[doc = "Hardware average function disabled."]
|
||||
_0,
|
||||
#[doc = "Hardware average function enabled."]
|
||||
_1,
|
||||
}
|
||||
impl AVGER {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -209,10 +215,14 @@ impl CALR {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `AVGS`"]
|
||||
pub enum AVGSW {
|
||||
#[doc = "4 samples averaged."] _00,
|
||||
#[doc = "8 samples averaged."] _01,
|
||||
#[doc = "16 samples averaged."] _10,
|
||||
#[doc = "32 samples averaged."] _11,
|
||||
#[doc = "4 samples averaged."]
|
||||
_00,
|
||||
#[doc = "8 samples averaged."]
|
||||
_01,
|
||||
#[doc = "16 samples averaged."]
|
||||
_10,
|
||||
#[doc = "32 samples averaged."]
|
||||
_11,
|
||||
}
|
||||
impl AVGSW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -271,8 +281,10 @@ impl<'a> _AVGSW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `AVGE`"]
|
||||
pub enum AVGEW {
|
||||
#[doc = "Hardware average function disabled."] _0,
|
||||
#[doc = "Hardware average function enabled."] _1,
|
||||
#[doc = "Hardware average function disabled."]
|
||||
_0,
|
||||
#[doc = "Hardware average function enabled."]
|
||||
_1,
|
||||
}
|
||||
impl AVGEW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
|
|||
|
|
@ -45,10 +45,14 @@ impl super::CFG1 {
|
|||
#[doc = "Possible values of the field `ADICLK`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ADICLKR {
|
||||
#[doc = "Alternate clock 1 (ADC_ALTCLK1)"] _00,
|
||||
#[doc = "Alternate clock 2 (ADC_ALTCLK2)"] _01,
|
||||
#[doc = "Alternate clock 3 (ADC_ALTCLK3)"] _10,
|
||||
#[doc = "Alternate clock 4 (ADC_ALTCLK4)"] _11,
|
||||
#[doc = "Alternate clock 1 (ADC_ALTCLK1)"]
|
||||
_00,
|
||||
#[doc = "Alternate clock 2 (ADC_ALTCLK2)"]
|
||||
_01,
|
||||
#[doc = "Alternate clock 3 (ADC_ALTCLK3)"]
|
||||
_10,
|
||||
#[doc = "Alternate clock 4 (ADC_ALTCLK4)"]
|
||||
_11,
|
||||
}
|
||||
impl ADICLKR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
|
|
@ -97,10 +101,14 @@ impl ADICLKR {
|
|||
#[doc = "Possible values of the field `MODE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum MODER {
|
||||
#[doc = "8-bit conversion."] _00,
|
||||
#[doc = "12-bit conversion."] _01,
|
||||
#[doc = "10-bit conversion."] _10,
|
||||
#[doc = r" Reserved"] _Reserved(u8),
|
||||
#[doc = "8-bit conversion."]
|
||||
_00,
|
||||
#[doc = "12-bit conversion."]
|
||||
_01,
|
||||
#[doc = "10-bit conversion."]
|
||||
_10,
|
||||
#[doc = r" Reserved"]
|
||||
_Reserved(u8),
|
||||
}
|
||||
impl MODER {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
|
|
@ -143,10 +151,14 @@ impl MODER {
|
|||
#[doc = "Possible values of the field `ADIV`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ADIVR {
|
||||
#[doc = "The divide ratio is 1 and the clock rate is input clock."] _00,
|
||||
#[doc = "The divide ratio is 2 and the clock rate is (input clock)/2."] _01,
|
||||
#[doc = "The divide ratio is 4 and the clock rate is (input clock)/4."] _10,
|
||||
#[doc = "The divide ratio is 8 and the clock rate is (input clock)/8."] _11,
|
||||
#[doc = "The divide ratio is 1 and the clock rate is input clock."]
|
||||
_00,
|
||||
#[doc = "The divide ratio is 2 and the clock rate is (input clock)/2."]
|
||||
_01,
|
||||
#[doc = "The divide ratio is 4 and the clock rate is (input clock)/4."]
|
||||
_10,
|
||||
#[doc = "The divide ratio is 8 and the clock rate is (input clock)/8."]
|
||||
_11,
|
||||
}
|
||||
impl ADIVR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
|
|
@ -194,10 +206,14 @@ impl ADIVR {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `ADICLK`"]
|
||||
pub enum ADICLKW {
|
||||
#[doc = "Alternate clock 1 (ADC_ALTCLK1)"] _00,
|
||||
#[doc = "Alternate clock 2 (ADC_ALTCLK2)"] _01,
|
||||
#[doc = "Alternate clock 3 (ADC_ALTCLK3)"] _10,
|
||||
#[doc = "Alternate clock 4 (ADC_ALTCLK4)"] _11,
|
||||
#[doc = "Alternate clock 1 (ADC_ALTCLK1)"]
|
||||
_00,
|
||||
#[doc = "Alternate clock 2 (ADC_ALTCLK2)"]
|
||||
_01,
|
||||
#[doc = "Alternate clock 3 (ADC_ALTCLK3)"]
|
||||
_10,
|
||||
#[doc = "Alternate clock 4 (ADC_ALTCLK4)"]
|
||||
_11,
|
||||
}
|
||||
impl ADICLKW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -256,9 +272,12 @@ impl<'a> _ADICLKW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `MODE`"]
|
||||
pub enum MODEW {
|
||||
#[doc = "8-bit conversion."] _00,
|
||||
#[doc = "12-bit conversion."] _01,
|
||||
#[doc = "10-bit conversion."] _10,
|
||||
#[doc = "8-bit conversion."]
|
||||
_00,
|
||||
#[doc = "12-bit conversion."]
|
||||
_01,
|
||||
#[doc = "10-bit conversion."]
|
||||
_10,
|
||||
}
|
||||
impl MODEW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -309,10 +328,14 @@ impl<'a> _MODEW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `ADIV`"]
|
||||
pub enum ADIVW {
|
||||
#[doc = "The divide ratio is 1 and the clock rate is input clock."] _00,
|
||||
#[doc = "The divide ratio is 2 and the clock rate is (input clock)/2."] _01,
|
||||
#[doc = "The divide ratio is 4 and the clock rate is (input clock)/4."] _10,
|
||||
#[doc = "The divide ratio is 8 and the clock rate is (input clock)/8."] _11,
|
||||
#[doc = "The divide ratio is 1 and the clock rate is input clock."]
|
||||
_00,
|
||||
#[doc = "The divide ratio is 2 and the clock rate is (input clock)/2."]
|
||||
_01,
|
||||
#[doc = "The divide ratio is 4 and the clock rate is (input clock)/4."]
|
||||
_10,
|
||||
#[doc = "The divide ratio is 8 and the clock rate is (input clock)/8."]
|
||||
_11,
|
||||
}
|
||||
impl ADIVW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
|
|||
177
src/adc1/mod.rs
177
src/adc1/mod.rs
|
|
@ -2,77 +2,124 @@ use vcell::VolatileCell;
|
|||
#[doc = r" Register block"]
|
||||
#[repr(C)]
|
||||
pub struct RegisterBlock {
|
||||
#[doc = "0x00 - ADC Status and Control Register 1"] pub sc1a: SC1,
|
||||
#[doc = "0x04 - ADC Status and Control Register 1"] pub sc1b: SC1,
|
||||
#[doc = "0x08 - ADC Status and Control Register 1"] pub sc1c: SC1,
|
||||
#[doc = "0x0c - ADC Status and Control Register 1"] pub sc1d: SC1,
|
||||
#[doc = "0x10 - ADC Status and Control Register 1"] pub sc1e: SC1,
|
||||
#[doc = "0x14 - ADC Status and Control Register 1"] pub sc1f: SC1,
|
||||
#[doc = "0x18 - ADC Status and Control Register 1"] pub sc1g: SC1,
|
||||
#[doc = "0x1c - ADC Status and Control Register 1"] pub sc1h: SC1,
|
||||
#[doc = "0x20 - ADC Status and Control Register 1"] pub sc1i: SC1,
|
||||
#[doc = "0x24 - ADC Status and Control Register 1"] pub sc1j: SC1,
|
||||
#[doc = "0x28 - ADC Status and Control Register 1"] pub sc1k: SC1,
|
||||
#[doc = "0x2c - ADC Status and Control Register 1"] pub sc1l: SC1,
|
||||
#[doc = "0x30 - ADC Status and Control Register 1"] pub sc1m: SC1,
|
||||
#[doc = "0x34 - ADC Status and Control Register 1"] pub sc1n: SC1,
|
||||
#[doc = "0x38 - ADC Status and Control Register 1"] pub sc1o: SC1,
|
||||
#[doc = "0x3c - ADC Status and Control Register 1"] pub sc1p: SC1,
|
||||
#[doc = "0x40 - ADC Configuration Register 1"] pub cfg1: CFG1,
|
||||
#[doc = "0x44 - ADC Configuration Register 2"] pub cfg2: CFG2,
|
||||
#[doc = "0x48 - ADC Data Result Registers"] pub ra: R,
|
||||
#[doc = "0x4c - ADC Data Result Registers"] pub rb: R,
|
||||
#[doc = "0x50 - ADC Data Result Registers"] pub rc: R,
|
||||
#[doc = "0x54 - ADC Data Result Registers"] pub rd: R,
|
||||
#[doc = "0x58 - ADC Data Result Registers"] pub re: R,
|
||||
#[doc = "0x5c - ADC Data Result Registers"] pub rf: R,
|
||||
#[doc = "0x60 - ADC Data Result Registers"] pub rg: R,
|
||||
#[doc = "0x64 - ADC Data Result Registers"] pub rh: R,
|
||||
#[doc = "0x68 - ADC Data Result Registers"] pub ri: R,
|
||||
#[doc = "0x6c - ADC Data Result Registers"] pub rj: R,
|
||||
#[doc = "0x70 - ADC Data Result Registers"] pub rk: R,
|
||||
#[doc = "0x74 - ADC Data Result Registers"] pub rl: R,
|
||||
#[doc = "0x78 - ADC Data Result Registers"] pub rm: R,
|
||||
#[doc = "0x7c - ADC Data Result Registers"] pub rn: R,
|
||||
#[doc = "0x80 - ADC Data Result Registers"] pub ro: R,
|
||||
#[doc = "0x84 - ADC Data Result Registers"] pub rp: R,
|
||||
#[doc = "0x88 - Compare Value Registers"] pub cv1: CV,
|
||||
#[doc = "0x8c - Compare Value Registers"] pub cv2: CV,
|
||||
#[doc = "0x90 - Status and Control Register 2"] pub sc2: SC2,
|
||||
#[doc = "0x94 - Status and Control Register 3"] pub sc3: SC3,
|
||||
#[doc = "0x98 - BASE Offset Register"] pub base_ofs: BASE_OFS,
|
||||
#[doc = "0x9c - ADC Offset Correction Register"] pub ofs: OFS,
|
||||
#[doc = "0xa0 - USER Offset Correction Register"] pub usr_ofs: USR_OFS,
|
||||
#[doc = "0xa4 - ADC X Offset Correction Register"] pub xofs: XOFS,
|
||||
#[doc = "0xa8 - ADC Y Offset Correction Register"] pub yofs: YOFS,
|
||||
#[doc = "0xac - ADC Gain Register"] pub g: G,
|
||||
#[doc = "0xb0 - ADC User Gain Register"] pub ug: UG,
|
||||
#[doc = "0xb4 - ADC General Calibration Value Register S"] pub clps: CLPS,
|
||||
#[doc = "0xb8 - ADC Plus-Side General Calibration Value Register 3"] pub clp3: CLP3,
|
||||
#[doc = "0xbc - ADC Plus-Side General Calibration Value Register 2"] pub clp2: CLP2,
|
||||
#[doc = "0xc0 - ADC Plus-Side General Calibration Value Register 1"] pub clp1: CLP1,
|
||||
#[doc = "0xc4 - ADC Plus-Side General Calibration Value Register 0"] pub clp0: CLP0,
|
||||
#[doc = "0xc8 - ADC Plus-Side General Calibration Value Register X"] pub clpx: CLPX,
|
||||
#[doc = "0xcc - ADC Plus-Side General Calibration Value Register 9"] pub clp9: CLP9,
|
||||
#[doc = "0xd0 - ADC General Calibration Offset Value Register S"] pub clps_ofs: CLPS_OFS,
|
||||
#[doc = "0x00 - ADC Status and Control Register 1"]
|
||||
pub sc1a: SC1,
|
||||
#[doc = "0x04 - ADC Status and Control Register 1"]
|
||||
pub sc1b: SC1,
|
||||
#[doc = "0x08 - ADC Status and Control Register 1"]
|
||||
pub sc1c: SC1,
|
||||
#[doc = "0x0c - ADC Status and Control Register 1"]
|
||||
pub sc1d: SC1,
|
||||
#[doc = "0x10 - ADC Status and Control Register 1"]
|
||||
pub sc1e: SC1,
|
||||
#[doc = "0x14 - ADC Status and Control Register 1"]
|
||||
pub sc1f: SC1,
|
||||
#[doc = "0x18 - ADC Status and Control Register 1"]
|
||||
pub sc1g: SC1,
|
||||
#[doc = "0x1c - ADC Status and Control Register 1"]
|
||||
pub sc1h: SC1,
|
||||
#[doc = "0x20 - ADC Status and Control Register 1"]
|
||||
pub sc1i: SC1,
|
||||
#[doc = "0x24 - ADC Status and Control Register 1"]
|
||||
pub sc1j: SC1,
|
||||
#[doc = "0x28 - ADC Status and Control Register 1"]
|
||||
pub sc1k: SC1,
|
||||
#[doc = "0x2c - ADC Status and Control Register 1"]
|
||||
pub sc1l: SC1,
|
||||
#[doc = "0x30 - ADC Status and Control Register 1"]
|
||||
pub sc1m: SC1,
|
||||
#[doc = "0x34 - ADC Status and Control Register 1"]
|
||||
pub sc1n: SC1,
|
||||
#[doc = "0x38 - ADC Status and Control Register 1"]
|
||||
pub sc1o: SC1,
|
||||
#[doc = "0x3c - ADC Status and Control Register 1"]
|
||||
pub sc1p: SC1,
|
||||
#[doc = "0x40 - ADC Configuration Register 1"]
|
||||
pub cfg1: CFG1,
|
||||
#[doc = "0x44 - ADC Configuration Register 2"]
|
||||
pub cfg2: CFG2,
|
||||
#[doc = "0x48 - ADC Data Result Registers"]
|
||||
pub ra: R,
|
||||
#[doc = "0x4c - ADC Data Result Registers"]
|
||||
pub rb: R,
|
||||
#[doc = "0x50 - ADC Data Result Registers"]
|
||||
pub rc: R,
|
||||
#[doc = "0x54 - ADC Data Result Registers"]
|
||||
pub rd: R,
|
||||
#[doc = "0x58 - ADC Data Result Registers"]
|
||||
pub re: R,
|
||||
#[doc = "0x5c - ADC Data Result Registers"]
|
||||
pub rf: R,
|
||||
#[doc = "0x60 - ADC Data Result Registers"]
|
||||
pub rg: R,
|
||||
#[doc = "0x64 - ADC Data Result Registers"]
|
||||
pub rh: R,
|
||||
#[doc = "0x68 - ADC Data Result Registers"]
|
||||
pub ri: R,
|
||||
#[doc = "0x6c - ADC Data Result Registers"]
|
||||
pub rj: R,
|
||||
#[doc = "0x70 - ADC Data Result Registers"]
|
||||
pub rk: R,
|
||||
#[doc = "0x74 - ADC Data Result Registers"]
|
||||
pub rl: R,
|
||||
#[doc = "0x78 - ADC Data Result Registers"]
|
||||
pub rm: R,
|
||||
#[doc = "0x7c - ADC Data Result Registers"]
|
||||
pub rn: R,
|
||||
#[doc = "0x80 - ADC Data Result Registers"]
|
||||
pub ro: R,
|
||||
#[doc = "0x84 - ADC Data Result Registers"]
|
||||
pub rp: R,
|
||||
#[doc = "0x88 - Compare Value Registers"]
|
||||
pub cv1: CV,
|
||||
#[doc = "0x8c - Compare Value Registers"]
|
||||
pub cv2: CV,
|
||||
#[doc = "0x90 - Status and Control Register 2"]
|
||||
pub sc2: SC2,
|
||||
#[doc = "0x94 - Status and Control Register 3"]
|
||||
pub sc3: SC3,
|
||||
#[doc = "0x98 - BASE Offset Register"]
|
||||
pub base_ofs: BASE_OFS,
|
||||
#[doc = "0x9c - ADC Offset Correction Register"]
|
||||
pub ofs: OFS,
|
||||
#[doc = "0xa0 - USER Offset Correction Register"]
|
||||
pub usr_ofs: USR_OFS,
|
||||
#[doc = "0xa4 - ADC X Offset Correction Register"]
|
||||
pub xofs: XOFS,
|
||||
#[doc = "0xa8 - ADC Y Offset Correction Register"]
|
||||
pub yofs: YOFS,
|
||||
#[doc = "0xac - ADC Gain Register"]
|
||||
pub g: G,
|
||||
#[doc = "0xb0 - ADC User Gain Register"]
|
||||
pub ug: UG,
|
||||
#[doc = "0xb4 - ADC General Calibration Value Register S"]
|
||||
pub clps: CLPS,
|
||||
#[doc = "0xb8 - ADC Plus-Side General Calibration Value Register 3"]
|
||||
pub clp3: CLP3,
|
||||
#[doc = "0xbc - ADC Plus-Side General Calibration Value Register 2"]
|
||||
pub clp2: CLP2,
|
||||
#[doc = "0xc0 - ADC Plus-Side General Calibration Value Register 1"]
|
||||
pub clp1: CLP1,
|
||||
#[doc = "0xc4 - ADC Plus-Side General Calibration Value Register 0"]
|
||||
pub clp0: CLP0,
|
||||
#[doc = "0xc8 - ADC Plus-Side General Calibration Value Register X"]
|
||||
pub clpx: CLPX,
|
||||
#[doc = "0xcc - ADC Plus-Side General Calibration Value Register 9"]
|
||||
pub clp9: CLP9,
|
||||
#[doc = "0xd0 - ADC General Calibration Offset Value Register S"]
|
||||
pub clps_ofs: CLPS_OFS,
|
||||
#[doc = "0xd4 - ADC Plus-Side General Calibration Offset Value Register 3"]
|
||||
pub clp3_ofs:
|
||||
CLP3_OFS,
|
||||
pub clp3_ofs: CLP3_OFS,
|
||||
#[doc = "0xd8 - ADC Plus-Side General Calibration Offset Value Register 2"]
|
||||
pub clp2_ofs:
|
||||
CLP2_OFS,
|
||||
pub clp2_ofs: CLP2_OFS,
|
||||
#[doc = "0xdc - ADC Plus-Side General Calibration Offset Value Register 1"]
|
||||
pub clp1_ofs:
|
||||
CLP1_OFS,
|
||||
pub clp1_ofs: CLP1_OFS,
|
||||
#[doc = "0xe0 - ADC Plus-Side General Calibration Offset Value Register 0"]
|
||||
pub clp0_ofs:
|
||||
CLP0_OFS,
|
||||
pub clp0_ofs: CLP0_OFS,
|
||||
#[doc = "0xe4 - ADC Plus-Side General Calibration Offset Value Register X"]
|
||||
pub clpx_ofs:
|
||||
CLPX_OFS,
|
||||
pub clpx_ofs: CLPX_OFS,
|
||||
#[doc = "0xe8 - ADC Plus-Side General Calibration Offset Value Register 9"]
|
||||
pub clp9_ofs:
|
||||
CLP9_OFS,
|
||||
pub clp9_ofs: CLP9_OFS,
|
||||
}
|
||||
#[doc = "ADC Status and Control Register 1"]
|
||||
pub struct SC1 {
|
||||
|
|
|
|||
|
|
@ -45,36 +45,62 @@ impl super::SC1 {
|
|||
#[doc = "Possible values of the field `ADCH`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ADCHR {
|
||||
#[doc = "Exernal channel 0 is selected as input."] _00000,
|
||||
#[doc = "Exernal channel 1 is selected as input."] _00001,
|
||||
#[doc = "Exernal channel 2 is selected as input."] _00010,
|
||||
#[doc = "Exernal channel 3 is selected as input."] _00011,
|
||||
#[doc = "Exernal channel 4 is selected as input."] _00100,
|
||||
#[doc = "Exernal channel 5 is selected as input."] _00101,
|
||||
#[doc = "Exernal channel 6 is selected as input."] _00110,
|
||||
#[doc = "Exernal channel 7 is selected as input."] _00111,
|
||||
#[doc = "Exernal channel 8 is selected as input."] _01000,
|
||||
#[doc = "Exernal channel 9 is selected as input."] _01001,
|
||||
#[doc = "Exernal channel 10 is selected as input."] _01010,
|
||||
#[doc = "Exernal channel 11 is selected as input."] _01011,
|
||||
#[doc = "Exernal channel 12 is selected as input."] _01100,
|
||||
#[doc = "Exernal channel 13 is selected as input."] _01101,
|
||||
#[doc = "Exernal channel 14 is selected as input."] _01110,
|
||||
#[doc = "Exernal channel 15 is selected as input."] _01111,
|
||||
#[doc = "Exernal channel 18 is selected as input."] _10010,
|
||||
#[doc = "Exernal channel 19 is selected as input."] _10011,
|
||||
#[doc = "Internal channel 0 is selected as input."] _10101,
|
||||
#[doc = "Internal channel 1 is selected as input."] _10110,
|
||||
#[doc = "Internal channel 2 is selected as input."] _10111,
|
||||
#[doc = "Temp Sensor"] _11010,
|
||||
#[doc = "Band Gap"] _11011,
|
||||
#[doc = "Internal channel 3 is selected as input."] _11100,
|
||||
#[doc = "Exernal channel 0 is selected as input."]
|
||||
_00000,
|
||||
#[doc = "Exernal channel 1 is selected as input."]
|
||||
_00001,
|
||||
#[doc = "Exernal channel 2 is selected as input."]
|
||||
_00010,
|
||||
#[doc = "Exernal channel 3 is selected as input."]
|
||||
_00011,
|
||||
#[doc = "Exernal channel 4 is selected as input."]
|
||||
_00100,
|
||||
#[doc = "Exernal channel 5 is selected as input."]
|
||||
_00101,
|
||||
#[doc = "Exernal channel 6 is selected as input."]
|
||||
_00110,
|
||||
#[doc = "Exernal channel 7 is selected as input."]
|
||||
_00111,
|
||||
#[doc = "Exernal channel 8 is selected as input."]
|
||||
_01000,
|
||||
#[doc = "Exernal channel 9 is selected as input."]
|
||||
_01001,
|
||||
#[doc = "Exernal channel 10 is selected as input."]
|
||||
_01010,
|
||||
#[doc = "Exernal channel 11 is selected as input."]
|
||||
_01011,
|
||||
#[doc = "Exernal channel 12 is selected as input."]
|
||||
_01100,
|
||||
#[doc = "Exernal channel 13 is selected as input."]
|
||||
_01101,
|
||||
#[doc = "Exernal channel 14 is selected as input."]
|
||||
_01110,
|
||||
#[doc = "Exernal channel 15 is selected as input."]
|
||||
_01111,
|
||||
#[doc = "Exernal channel 18 is selected as input."]
|
||||
_10010,
|
||||
#[doc = "Exernal channel 19 is selected as input."]
|
||||
_10011,
|
||||
#[doc = "Internal channel 0 is selected as input."]
|
||||
_10101,
|
||||
#[doc = "Internal channel 1 is selected as input."]
|
||||
_10110,
|
||||
#[doc = "Internal channel 2 is selected as input."]
|
||||
_10111,
|
||||
#[doc = "Temp Sensor"]
|
||||
_11010,
|
||||
#[doc = "Band Gap"]
|
||||
_11011,
|
||||
#[doc = "Internal channel 3 is selected as input."]
|
||||
_11100,
|
||||
#[doc = "VREFSH is selected as input. Voltage reference selected is determined by SC2[REFSEL]."]
|
||||
_11101,
|
||||
#[doc = "VREFSL is selected as input. Voltage reference selected is determined by SC2[REFSEL]."]
|
||||
_11110,
|
||||
#[doc = "Module is disabled"] _11111,
|
||||
#[doc = r" Reserved"] _Reserved(u8),
|
||||
#[doc = "Module is disabled"]
|
||||
_11111,
|
||||
#[doc = r" Reserved"]
|
||||
_Reserved(u8),
|
||||
}
|
||||
impl ADCHR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
|
|
@ -285,8 +311,10 @@ impl ADCHR {
|
|||
#[doc = "Possible values of the field `AIEN`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum AIENR {
|
||||
#[doc = "Conversion complete interrupt is disabled."] _0,
|
||||
#[doc = "Conversion complete interrupt is enabled."] _1,
|
||||
#[doc = "Conversion complete interrupt is disabled."]
|
||||
_0,
|
||||
#[doc = "Conversion complete interrupt is enabled."]
|
||||
_1,
|
||||
}
|
||||
impl AIENR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -330,8 +358,10 @@ impl AIENR {
|
|||
#[doc = "Possible values of the field `COCO`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum COCOR {
|
||||
#[doc = "Conversion is not completed."] _0,
|
||||
#[doc = "Conversion is completed."] _1,
|
||||
#[doc = "Conversion is not completed."]
|
||||
_0,
|
||||
#[doc = "Conversion is completed."]
|
||||
_1,
|
||||
}
|
||||
impl COCOR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -374,35 +404,60 @@ impl COCOR {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `ADCH`"]
|
||||
pub enum ADCHW {
|
||||
#[doc = "Exernal channel 0 is selected as input."] _00000,
|
||||
#[doc = "Exernal channel 1 is selected as input."] _00001,
|
||||
#[doc = "Exernal channel 2 is selected as input."] _00010,
|
||||
#[doc = "Exernal channel 3 is selected as input."] _00011,
|
||||
#[doc = "Exernal channel 4 is selected as input."] _00100,
|
||||
#[doc = "Exernal channel 5 is selected as input."] _00101,
|
||||
#[doc = "Exernal channel 6 is selected as input."] _00110,
|
||||
#[doc = "Exernal channel 7 is selected as input."] _00111,
|
||||
#[doc = "Exernal channel 8 is selected as input."] _01000,
|
||||
#[doc = "Exernal channel 9 is selected as input."] _01001,
|
||||
#[doc = "Exernal channel 10 is selected as input."] _01010,
|
||||
#[doc = "Exernal channel 11 is selected as input."] _01011,
|
||||
#[doc = "Exernal channel 12 is selected as input."] _01100,
|
||||
#[doc = "Exernal channel 13 is selected as input."] _01101,
|
||||
#[doc = "Exernal channel 14 is selected as input."] _01110,
|
||||
#[doc = "Exernal channel 15 is selected as input."] _01111,
|
||||
#[doc = "Exernal channel 18 is selected as input."] _10010,
|
||||
#[doc = "Exernal channel 19 is selected as input."] _10011,
|
||||
#[doc = "Internal channel 0 is selected as input."] _10101,
|
||||
#[doc = "Internal channel 1 is selected as input."] _10110,
|
||||
#[doc = "Internal channel 2 is selected as input."] _10111,
|
||||
#[doc = "Temp Sensor"] _11010,
|
||||
#[doc = "Band Gap"] _11011,
|
||||
#[doc = "Internal channel 3 is selected as input."] _11100,
|
||||
#[doc = "Exernal channel 0 is selected as input."]
|
||||
_00000,
|
||||
#[doc = "Exernal channel 1 is selected as input."]
|
||||
_00001,
|
||||
#[doc = "Exernal channel 2 is selected as input."]
|
||||
_00010,
|
||||
#[doc = "Exernal channel 3 is selected as input."]
|
||||
_00011,
|
||||
#[doc = "Exernal channel 4 is selected as input."]
|
||||
_00100,
|
||||
#[doc = "Exernal channel 5 is selected as input."]
|
||||
_00101,
|
||||
#[doc = "Exernal channel 6 is selected as input."]
|
||||
_00110,
|
||||
#[doc = "Exernal channel 7 is selected as input."]
|
||||
_00111,
|
||||
#[doc = "Exernal channel 8 is selected as input."]
|
||||
_01000,
|
||||
#[doc = "Exernal channel 9 is selected as input."]
|
||||
_01001,
|
||||
#[doc = "Exernal channel 10 is selected as input."]
|
||||
_01010,
|
||||
#[doc = "Exernal channel 11 is selected as input."]
|
||||
_01011,
|
||||
#[doc = "Exernal channel 12 is selected as input."]
|
||||
_01100,
|
||||
#[doc = "Exernal channel 13 is selected as input."]
|
||||
_01101,
|
||||
#[doc = "Exernal channel 14 is selected as input."]
|
||||
_01110,
|
||||
#[doc = "Exernal channel 15 is selected as input."]
|
||||
_01111,
|
||||
#[doc = "Exernal channel 18 is selected as input."]
|
||||
_10010,
|
||||
#[doc = "Exernal channel 19 is selected as input."]
|
||||
_10011,
|
||||
#[doc = "Internal channel 0 is selected as input."]
|
||||
_10101,
|
||||
#[doc = "Internal channel 1 is selected as input."]
|
||||
_10110,
|
||||
#[doc = "Internal channel 2 is selected as input."]
|
||||
_10111,
|
||||
#[doc = "Temp Sensor"]
|
||||
_11010,
|
||||
#[doc = "Band Gap"]
|
||||
_11011,
|
||||
#[doc = "Internal channel 3 is selected as input."]
|
||||
_11100,
|
||||
#[doc = "VREFSH is selected as input. Voltage reference selected is determined by SC2[REFSEL]."]
|
||||
_11101,
|
||||
#[doc = "VREFSL is selected as input. Voltage reference selected is determined by SC2[REFSEL]."]
|
||||
_11110,
|
||||
#[doc = "Module is disabled"] _11111,
|
||||
#[doc = "Module is disabled"]
|
||||
_11111,
|
||||
}
|
||||
impl ADCHW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -597,8 +652,10 @@ impl<'a> _ADCHW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `AIEN`"]
|
||||
pub enum AIENW {
|
||||
#[doc = "Conversion complete interrupt is disabled."] _0,
|
||||
#[doc = "Conversion complete interrupt is enabled."] _1,
|
||||
#[doc = "Conversion complete interrupt is disabled."]
|
||||
_0,
|
||||
#[doc = "Conversion complete interrupt is enabled."]
|
||||
_1,
|
||||
}
|
||||
impl AIENW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
|
|||
|
|
@ -45,10 +45,12 @@ impl super::SC2 {
|
|||
#[doc = "Possible values of the field `REFSEL`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum REFSELR {
|
||||
#[doc = "Default voltage reference pin pair, that is, external pins VREFH and VREFL"] _00,
|
||||
#[doc = "Default voltage reference pin pair, that is, external pins VREFH and VREFL"]
|
||||
_00,
|
||||
#[doc = "Alternate reference voltage, that is, VALTH. This voltage may be additional external pin or internal source depending on the MCU configuration. See the chip configuration information for details specific to this MCU."]
|
||||
_01,
|
||||
#[doc = r" Reserved"] _Reserved(u8),
|
||||
#[doc = r" Reserved"]
|
||||
_Reserved(u8),
|
||||
}
|
||||
impl REFSELR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
|
|
@ -84,7 +86,8 @@ impl REFSELR {
|
|||
#[doc = "Possible values of the field `DMAEN`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum DMAENR {
|
||||
#[doc = "DMA is disabled."] _0,
|
||||
#[doc = "DMA is disabled."]
|
||||
_0,
|
||||
#[doc = "DMA is enabled and will assert the ADC DMA request during an ADC conversion complete event , which is indicated when any SC1n[COCO] flag is asserted."]
|
||||
_1,
|
||||
}
|
||||
|
|
@ -172,8 +175,10 @@ impl ACFGTR {
|
|||
#[doc = "Possible values of the field `ACFE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ACFER {
|
||||
#[doc = "Compare function disabled."] _0,
|
||||
#[doc = "Compare function enabled."] _1,
|
||||
#[doc = "Compare function disabled."]
|
||||
_0,
|
||||
#[doc = "Compare function enabled."]
|
||||
_1,
|
||||
}
|
||||
impl ACFER {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -217,8 +222,10 @@ impl ACFER {
|
|||
#[doc = "Possible values of the field `ADTRG`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ADTRGR {
|
||||
#[doc = "Software trigger selected."] _0,
|
||||
#[doc = "Hardware trigger selected."] _1,
|
||||
#[doc = "Software trigger selected."]
|
||||
_0,
|
||||
#[doc = "Hardware trigger selected."]
|
||||
_1,
|
||||
}
|
||||
impl ADTRGR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -262,8 +269,10 @@ impl ADTRGR {
|
|||
#[doc = "Possible values of the field `ADACT`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ADACTR {
|
||||
#[doc = "Conversion not in progress."] _0,
|
||||
#[doc = "Conversion in progress."] _1,
|
||||
#[doc = "Conversion not in progress."]
|
||||
_0,
|
||||
#[doc = "Conversion in progress."]
|
||||
_1,
|
||||
}
|
||||
impl ADACTR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -318,9 +327,12 @@ impl TRGPRNUMR {
|
|||
#[doc = "Possible values of the field `TRGSTLAT`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TRGSTLATR {
|
||||
#[doc = "No trigger request has been latched"] _0,
|
||||
#[doc = "A trigger request has been latched"] _1,
|
||||
#[doc = r" Reserved"] _Reserved(u8),
|
||||
#[doc = "No trigger request has been latched"]
|
||||
_0,
|
||||
#[doc = "A trigger request has been latched"]
|
||||
_1,
|
||||
#[doc = r" Reserved"]
|
||||
_Reserved(u8),
|
||||
}
|
||||
impl TRGSTLATR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
|
|
@ -356,9 +368,12 @@ impl TRGSTLATR {
|
|||
#[doc = "Possible values of the field `TRGSTERR`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TRGSTERRR {
|
||||
#[doc = "No error has occurred"] _0,
|
||||
#[doc = "An error has occurred"] _1,
|
||||
#[doc = r" Reserved"] _Reserved(u8),
|
||||
#[doc = "No error has occurred"]
|
||||
_0,
|
||||
#[doc = "An error has occurred"]
|
||||
_1,
|
||||
#[doc = r" Reserved"]
|
||||
_Reserved(u8),
|
||||
}
|
||||
impl TRGSTERRR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
|
|
@ -393,7 +408,8 @@ impl TRGSTERRR {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `REFSEL`"]
|
||||
pub enum REFSELW {
|
||||
#[doc = "Default voltage reference pin pair, that is, external pins VREFH and VREFL"] _00,
|
||||
#[doc = "Default voltage reference pin pair, that is, external pins VREFH and VREFL"]
|
||||
_00,
|
||||
#[doc = "Alternate reference voltage, that is, VALTH. This voltage may be additional external pin or internal source depending on the MCU configuration. See the chip configuration information for details specific to this MCU."]
|
||||
_01,
|
||||
}
|
||||
|
|
@ -440,7 +456,8 @@ impl<'a> _REFSELW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `DMAEN`"]
|
||||
pub enum DMAENW {
|
||||
#[doc = "DMA is disabled."] _0,
|
||||
#[doc = "DMA is disabled."]
|
||||
_0,
|
||||
#[doc = "DMA is enabled and will assert the ADC DMA request during an ADC conversion complete event , which is indicated when any SC1n[COCO] flag is asserted."]
|
||||
_1,
|
||||
}
|
||||
|
|
@ -543,8 +560,10 @@ impl<'a> _ACFGTW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `ACFE`"]
|
||||
pub enum ACFEW {
|
||||
#[doc = "Compare function disabled."] _0,
|
||||
#[doc = "Compare function enabled."] _1,
|
||||
#[doc = "Compare function disabled."]
|
||||
_0,
|
||||
#[doc = "Compare function enabled."]
|
||||
_1,
|
||||
}
|
||||
impl ACFEW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -599,8 +618,10 @@ impl<'a> _ACFEW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `ADTRG`"]
|
||||
pub enum ADTRGW {
|
||||
#[doc = "Software trigger selected."] _0,
|
||||
#[doc = "Hardware trigger selected."] _1,
|
||||
#[doc = "Software trigger selected."]
|
||||
_0,
|
||||
#[doc = "Hardware trigger selected."]
|
||||
_1,
|
||||
}
|
||||
impl ADTRGW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
|
|||
|
|
@ -45,10 +45,14 @@ impl super::SC3 {
|
|||
#[doc = "Possible values of the field `AVGS`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum AVGSR {
|
||||
#[doc = "4 samples averaged."] _00,
|
||||
#[doc = "8 samples averaged."] _01,
|
||||
#[doc = "16 samples averaged."] _10,
|
||||
#[doc = "32 samples averaged."] _11,
|
||||
#[doc = "4 samples averaged."]
|
||||
_00,
|
||||
#[doc = "8 samples averaged."]
|
||||
_01,
|
||||
#[doc = "16 samples averaged."]
|
||||
_10,
|
||||
#[doc = "32 samples averaged."]
|
||||
_11,
|
||||
}
|
||||
impl AVGSR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
|
|
@ -97,8 +101,10 @@ impl AVGSR {
|
|||
#[doc = "Possible values of the field `AVGE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum AVGER {
|
||||
#[doc = "Hardware average function disabled."] _0,
|
||||
#[doc = "Hardware average function enabled."] _1,
|
||||
#[doc = "Hardware average function disabled."]
|
||||
_0,
|
||||
#[doc = "Hardware average function enabled."]
|
||||
_1,
|
||||
}
|
||||
impl AVGER {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -209,10 +215,14 @@ impl CALR {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `AVGS`"]
|
||||
pub enum AVGSW {
|
||||
#[doc = "4 samples averaged."] _00,
|
||||
#[doc = "8 samples averaged."] _01,
|
||||
#[doc = "16 samples averaged."] _10,
|
||||
#[doc = "32 samples averaged."] _11,
|
||||
#[doc = "4 samples averaged."]
|
||||
_00,
|
||||
#[doc = "8 samples averaged."]
|
||||
_01,
|
||||
#[doc = "16 samples averaged."]
|
||||
_10,
|
||||
#[doc = "32 samples averaged."]
|
||||
_11,
|
||||
}
|
||||
impl AVGSW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -271,8 +281,10 @@ impl<'a> _AVGSW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `AVGE`"]
|
||||
pub enum AVGEW {
|
||||
#[doc = "Hardware average function disabled."] _0,
|
||||
#[doc = "Hardware average function enabled."] _1,
|
||||
#[doc = "Hardware average function disabled."]
|
||||
_0,
|
||||
#[doc = "Hardware average function enabled."]
|
||||
_1,
|
||||
}
|
||||
impl AVGEW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
|
|||
|
|
@ -2,25 +2,42 @@ use vcell::VolatileCell;
|
|||
#[doc = r" Register block"]
|
||||
#[repr(C)]
|
||||
pub struct RegisterBlock {
|
||||
#[doc = "0x00 - Master Privilege Register A"] pub mpra: MPRA,
|
||||
#[doc = "0x00 - Master Privilege Register A"]
|
||||
pub mpra: MPRA,
|
||||
_reserved0: [u8; 28usize],
|
||||
#[doc = "0x20 - Peripheral Access Control Register"] pub pacra: PACRA,
|
||||
#[doc = "0x24 - Peripheral Access Control Register"] pub pacrb: PACRB,
|
||||
#[doc = "0x28 - Peripheral Access Control Register"] pub pacrc: PACRC,
|
||||
#[doc = "0x2c - Peripheral Access Control Register"] pub pacrd: PACRD,
|
||||
#[doc = "0x20 - Peripheral Access Control Register"]
|
||||
pub pacra: PACRA,
|
||||
#[doc = "0x24 - Peripheral Access Control Register"]
|
||||
pub pacrb: PACRB,
|
||||
#[doc = "0x28 - Peripheral Access Control Register"]
|
||||
pub pacrc: PACRC,
|
||||
#[doc = "0x2c - Peripheral Access Control Register"]
|
||||
pub pacrd: PACRD,
|
||||
_reserved1: [u8; 16usize],
|
||||
#[doc = "0x40 - Off-Platform Peripheral Access Control Register"] pub opacra: OPACRA,
|
||||
#[doc = "0x44 - Off-Platform Peripheral Access Control Register"] pub opacrb: OPACRB,
|
||||
#[doc = "0x48 - Off-Platform Peripheral Access Control Register"] pub opacrc: OPACRC,
|
||||
#[doc = "0x4c - Off-Platform Peripheral Access Control Register"] pub opacrd: OPACRD,
|
||||
#[doc = "0x50 - Off-Platform Peripheral Access Control Register"] pub opacre: OPACRE,
|
||||
#[doc = "0x54 - Off-Platform Peripheral Access Control Register"] pub opacrf: OPACRF,
|
||||
#[doc = "0x58 - Off-Platform Peripheral Access Control Register"] pub opacrg: OPACRG,
|
||||
#[doc = "0x5c - Off-Platform Peripheral Access Control Register"] pub opacrh: OPACRH,
|
||||
#[doc = "0x60 - Off-Platform Peripheral Access Control Register"] pub opacri: OPACRI,
|
||||
#[doc = "0x64 - Off-Platform Peripheral Access Control Register"] pub opacrj: OPACRJ,
|
||||
#[doc = "0x68 - Off-Platform Peripheral Access Control Register"] pub opacrk: OPACRK,
|
||||
#[doc = "0x6c - Off-Platform Peripheral Access Control Register"] pub opacrl: OPACRL,
|
||||
#[doc = "0x40 - Off-Platform Peripheral Access Control Register"]
|
||||
pub opacra: OPACRA,
|
||||
#[doc = "0x44 - Off-Platform Peripheral Access Control Register"]
|
||||
pub opacrb: OPACRB,
|
||||
#[doc = "0x48 - Off-Platform Peripheral Access Control Register"]
|
||||
pub opacrc: OPACRC,
|
||||
#[doc = "0x4c - Off-Platform Peripheral Access Control Register"]
|
||||
pub opacrd: OPACRD,
|
||||
#[doc = "0x50 - Off-Platform Peripheral Access Control Register"]
|
||||
pub opacre: OPACRE,
|
||||
#[doc = "0x54 - Off-Platform Peripheral Access Control Register"]
|
||||
pub opacrf: OPACRF,
|
||||
#[doc = "0x58 - Off-Platform Peripheral Access Control Register"]
|
||||
pub opacrg: OPACRG,
|
||||
#[doc = "0x5c - Off-Platform Peripheral Access Control Register"]
|
||||
pub opacrh: OPACRH,
|
||||
#[doc = "0x60 - Off-Platform Peripheral Access Control Register"]
|
||||
pub opacri: OPACRI,
|
||||
#[doc = "0x64 - Off-Platform Peripheral Access Control Register"]
|
||||
pub opacrj: OPACRJ,
|
||||
#[doc = "0x68 - Off-Platform Peripheral Access Control Register"]
|
||||
pub opacrk: OPACRK,
|
||||
#[doc = "0x6c - Off-Platform Peripheral Access Control Register"]
|
||||
pub opacrl: OPACRL,
|
||||
}
|
||||
#[doc = "Master Privilege Register A"]
|
||||
pub struct MPRA {
|
||||
|
|
|
|||
|
|
@ -45,8 +45,10 @@ impl super::MPRA {
|
|||
#[doc = "Possible values of the field `MPL2`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum MPL2R {
|
||||
#[doc = "Accesses from this master are forced to user-mode."] _0,
|
||||
#[doc = "Accesses from this master are not forced to user-mode."] _1,
|
||||
#[doc = "Accesses from this master are forced to user-mode."]
|
||||
_0,
|
||||
#[doc = "Accesses from this master are not forced to user-mode."]
|
||||
_1,
|
||||
}
|
||||
impl MPL2R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -90,8 +92,10 @@ impl MPL2R {
|
|||
#[doc = "Possible values of the field `MTW2`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum MTW2R {
|
||||
#[doc = "This master is not trusted for write accesses."] _0,
|
||||
#[doc = "This master is trusted for write accesses."] _1,
|
||||
#[doc = "This master is not trusted for write accesses."]
|
||||
_0,
|
||||
#[doc = "This master is trusted for write accesses."]
|
||||
_1,
|
||||
}
|
||||
impl MTW2R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -135,8 +139,10 @@ impl MTW2R {
|
|||
#[doc = "Possible values of the field `MTR2`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum MTR2R {
|
||||
#[doc = "This master is not trusted for read accesses."] _0,
|
||||
#[doc = "This master is trusted for read accesses."] _1,
|
||||
#[doc = "This master is not trusted for read accesses."]
|
||||
_0,
|
||||
#[doc = "This master is trusted for read accesses."]
|
||||
_1,
|
||||
}
|
||||
impl MTR2R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -180,8 +186,10 @@ impl MTR2R {
|
|||
#[doc = "Possible values of the field `MPL1`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum MPL1R {
|
||||
#[doc = "Accesses from this master are forced to user-mode."] _0,
|
||||
#[doc = "Accesses from this master are not forced to user-mode."] _1,
|
||||
#[doc = "Accesses from this master are forced to user-mode."]
|
||||
_0,
|
||||
#[doc = "Accesses from this master are not forced to user-mode."]
|
||||
_1,
|
||||
}
|
||||
impl MPL1R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -225,8 +233,10 @@ impl MPL1R {
|
|||
#[doc = "Possible values of the field `MTW1`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum MTW1R {
|
||||
#[doc = "This master is not trusted for write accesses."] _0,
|
||||
#[doc = "This master is trusted for write accesses."] _1,
|
||||
#[doc = "This master is not trusted for write accesses."]
|
||||
_0,
|
||||
#[doc = "This master is trusted for write accesses."]
|
||||
_1,
|
||||
}
|
||||
impl MTW1R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -270,8 +280,10 @@ impl MTW1R {
|
|||
#[doc = "Possible values of the field `MTR1`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum MTR1R {
|
||||
#[doc = "This master is not trusted for read accesses."] _0,
|
||||
#[doc = "This master is trusted for read accesses."] _1,
|
||||
#[doc = "This master is not trusted for read accesses."]
|
||||
_0,
|
||||
#[doc = "This master is trusted for read accesses."]
|
||||
_1,
|
||||
}
|
||||
impl MTR1R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -315,8 +327,10 @@ impl MTR1R {
|
|||
#[doc = "Possible values of the field `MPL0`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum MPL0R {
|
||||
#[doc = "Accesses from this master are forced to user-mode."] _0,
|
||||
#[doc = "Accesses from this master are not forced to user-mode."] _1,
|
||||
#[doc = "Accesses from this master are forced to user-mode."]
|
||||
_0,
|
||||
#[doc = "Accesses from this master are not forced to user-mode."]
|
||||
_1,
|
||||
}
|
||||
impl MPL0R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -360,8 +374,10 @@ impl MPL0R {
|
|||
#[doc = "Possible values of the field `MTW0`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum MTW0R {
|
||||
#[doc = "This master is not trusted for write accesses."] _0,
|
||||
#[doc = "This master is trusted for write accesses."] _1,
|
||||
#[doc = "This master is not trusted for write accesses."]
|
||||
_0,
|
||||
#[doc = "This master is trusted for write accesses."]
|
||||
_1,
|
||||
}
|
||||
impl MTW0R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -405,8 +421,10 @@ impl MTW0R {
|
|||
#[doc = "Possible values of the field `MTR0`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum MTR0R {
|
||||
#[doc = "This master is not trusted for read accesses."] _0,
|
||||
#[doc = "This master is trusted for read accesses."] _1,
|
||||
#[doc = "This master is not trusted for read accesses."]
|
||||
_0,
|
||||
#[doc = "This master is trusted for read accesses."]
|
||||
_1,
|
||||
}
|
||||
impl MTR0R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -449,8 +467,10 @@ impl MTR0R {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `MPL2`"]
|
||||
pub enum MPL2W {
|
||||
#[doc = "Accesses from this master are forced to user-mode."] _0,
|
||||
#[doc = "Accesses from this master are not forced to user-mode."] _1,
|
||||
#[doc = "Accesses from this master are forced to user-mode."]
|
||||
_0,
|
||||
#[doc = "Accesses from this master are not forced to user-mode."]
|
||||
_1,
|
||||
}
|
||||
impl MPL2W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -505,8 +525,10 @@ impl<'a> _MPL2W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `MTW2`"]
|
||||
pub enum MTW2W {
|
||||
#[doc = "This master is not trusted for write accesses."] _0,
|
||||
#[doc = "This master is trusted for write accesses."] _1,
|
||||
#[doc = "This master is not trusted for write accesses."]
|
||||
_0,
|
||||
#[doc = "This master is trusted for write accesses."]
|
||||
_1,
|
||||
}
|
||||
impl MTW2W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -561,8 +583,10 @@ impl<'a> _MTW2W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `MTR2`"]
|
||||
pub enum MTR2W {
|
||||
#[doc = "This master is not trusted for read accesses."] _0,
|
||||
#[doc = "This master is trusted for read accesses."] _1,
|
||||
#[doc = "This master is not trusted for read accesses."]
|
||||
_0,
|
||||
#[doc = "This master is trusted for read accesses."]
|
||||
_1,
|
||||
}
|
||||
impl MTR2W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -617,8 +641,10 @@ impl<'a> _MTR2W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `MPL1`"]
|
||||
pub enum MPL1W {
|
||||
#[doc = "Accesses from this master are forced to user-mode."] _0,
|
||||
#[doc = "Accesses from this master are not forced to user-mode."] _1,
|
||||
#[doc = "Accesses from this master are forced to user-mode."]
|
||||
_0,
|
||||
#[doc = "Accesses from this master are not forced to user-mode."]
|
||||
_1,
|
||||
}
|
||||
impl MPL1W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -673,8 +699,10 @@ impl<'a> _MPL1W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `MTW1`"]
|
||||
pub enum MTW1W {
|
||||
#[doc = "This master is not trusted for write accesses."] _0,
|
||||
#[doc = "This master is trusted for write accesses."] _1,
|
||||
#[doc = "This master is not trusted for write accesses."]
|
||||
_0,
|
||||
#[doc = "This master is trusted for write accesses."]
|
||||
_1,
|
||||
}
|
||||
impl MTW1W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -729,8 +757,10 @@ impl<'a> _MTW1W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `MTR1`"]
|
||||
pub enum MTR1W {
|
||||
#[doc = "This master is not trusted for read accesses."] _0,
|
||||
#[doc = "This master is trusted for read accesses."] _1,
|
||||
#[doc = "This master is not trusted for read accesses."]
|
||||
_0,
|
||||
#[doc = "This master is trusted for read accesses."]
|
||||
_1,
|
||||
}
|
||||
impl MTR1W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -785,8 +815,10 @@ impl<'a> _MTR1W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `MPL0`"]
|
||||
pub enum MPL0W {
|
||||
#[doc = "Accesses from this master are forced to user-mode."] _0,
|
||||
#[doc = "Accesses from this master are not forced to user-mode."] _1,
|
||||
#[doc = "Accesses from this master are forced to user-mode."]
|
||||
_0,
|
||||
#[doc = "Accesses from this master are not forced to user-mode."]
|
||||
_1,
|
||||
}
|
||||
impl MPL0W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -841,8 +873,10 @@ impl<'a> _MPL0W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `MTW0`"]
|
||||
pub enum MTW0W {
|
||||
#[doc = "This master is not trusted for write accesses."] _0,
|
||||
#[doc = "This master is trusted for write accesses."] _1,
|
||||
#[doc = "This master is not trusted for write accesses."]
|
||||
_0,
|
||||
#[doc = "This master is trusted for write accesses."]
|
||||
_1,
|
||||
}
|
||||
impl MTW0W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -897,8 +931,10 @@ impl<'a> _MTW0W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `MTR0`"]
|
||||
pub enum MTR0W {
|
||||
#[doc = "This master is not trusted for read accesses."] _0,
|
||||
#[doc = "This master is trusted for read accesses."] _1,
|
||||
#[doc = "This master is not trusted for read accesses."]
|
||||
_0,
|
||||
#[doc = "This master is trusted for read accesses."]
|
||||
_1,
|
||||
}
|
||||
impl MTR0W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
|
|||
|
|
@ -45,8 +45,10 @@ impl super::OPACRA {
|
|||
#[doc = "Possible values of the field `TP7`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TP7R {
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
}
|
||||
impl TP7R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -90,8 +92,10 @@ impl TP7R {
|
|||
#[doc = "Possible values of the field `WP7`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WP7R {
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
}
|
||||
impl WP7R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -135,8 +139,10 @@ impl WP7R {
|
|||
#[doc = "Possible values of the field `SP7`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SP7R {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
}
|
||||
impl SP7R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -180,8 +186,10 @@ impl SP7R {
|
|||
#[doc = "Possible values of the field `TP6`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TP6R {
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
}
|
||||
impl TP6R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -225,8 +233,10 @@ impl TP6R {
|
|||
#[doc = "Possible values of the field `WP6`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WP6R {
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
}
|
||||
impl WP6R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -270,8 +280,10 @@ impl WP6R {
|
|||
#[doc = "Possible values of the field `SP6`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SP6R {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
}
|
||||
impl SP6R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -315,8 +327,10 @@ impl SP6R {
|
|||
#[doc = "Possible values of the field `TP5`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TP5R {
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
}
|
||||
impl TP5R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -360,8 +374,10 @@ impl TP5R {
|
|||
#[doc = "Possible values of the field `WP5`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WP5R {
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
}
|
||||
impl WP5R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -405,8 +421,10 @@ impl WP5R {
|
|||
#[doc = "Possible values of the field `SP5`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SP5R {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
}
|
||||
impl SP5R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -450,8 +468,10 @@ impl SP5R {
|
|||
#[doc = "Possible values of the field `TP4`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TP4R {
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
}
|
||||
impl TP4R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -495,8 +515,10 @@ impl TP4R {
|
|||
#[doc = "Possible values of the field `WP4`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WP4R {
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
}
|
||||
impl WP4R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -540,8 +562,10 @@ impl WP4R {
|
|||
#[doc = "Possible values of the field `SP4`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SP4R {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
}
|
||||
impl SP4R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -585,8 +609,10 @@ impl SP4R {
|
|||
#[doc = "Possible values of the field `TP1`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TP1R {
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
}
|
||||
impl TP1R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -630,8 +656,10 @@ impl TP1R {
|
|||
#[doc = "Possible values of the field `WP1`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WP1R {
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
}
|
||||
impl WP1R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -675,8 +703,10 @@ impl WP1R {
|
|||
#[doc = "Possible values of the field `SP1`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SP1R {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
}
|
||||
impl SP1R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -720,8 +750,10 @@ impl SP1R {
|
|||
#[doc = "Possible values of the field `TP0`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TP0R {
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
}
|
||||
impl TP0R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -765,8 +797,10 @@ impl TP0R {
|
|||
#[doc = "Possible values of the field `WP0`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WP0R {
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
}
|
||||
impl WP0R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -810,8 +844,10 @@ impl WP0R {
|
|||
#[doc = "Possible values of the field `SP0`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SP0R {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
}
|
||||
impl SP0R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -854,8 +890,10 @@ impl SP0R {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TP7`"]
|
||||
pub enum TP7W {
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
}
|
||||
impl TP7W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -910,8 +948,10 @@ impl<'a> _TP7W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WP7`"]
|
||||
pub enum WP7W {
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
}
|
||||
impl WP7W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -966,8 +1006,10 @@ impl<'a> _WP7W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SP7`"]
|
||||
pub enum SP7W {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
}
|
||||
impl SP7W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1022,8 +1064,10 @@ impl<'a> _SP7W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TP6`"]
|
||||
pub enum TP6W {
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
}
|
||||
impl TP6W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1078,8 +1122,10 @@ impl<'a> _TP6W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WP6`"]
|
||||
pub enum WP6W {
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
}
|
||||
impl WP6W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1134,8 +1180,10 @@ impl<'a> _WP6W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SP6`"]
|
||||
pub enum SP6W {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
}
|
||||
impl SP6W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1190,8 +1238,10 @@ impl<'a> _SP6W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TP5`"]
|
||||
pub enum TP5W {
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
}
|
||||
impl TP5W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1246,8 +1296,10 @@ impl<'a> _TP5W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WP5`"]
|
||||
pub enum WP5W {
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
}
|
||||
impl WP5W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1302,8 +1354,10 @@ impl<'a> _WP5W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SP5`"]
|
||||
pub enum SP5W {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
}
|
||||
impl SP5W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1358,8 +1412,10 @@ impl<'a> _SP5W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TP4`"]
|
||||
pub enum TP4W {
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
}
|
||||
impl TP4W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1414,8 +1470,10 @@ impl<'a> _TP4W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WP4`"]
|
||||
pub enum WP4W {
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
}
|
||||
impl WP4W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1470,8 +1528,10 @@ impl<'a> _WP4W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SP4`"]
|
||||
pub enum SP4W {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
}
|
||||
impl SP4W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1526,8 +1586,10 @@ impl<'a> _SP4W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TP1`"]
|
||||
pub enum TP1W {
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
}
|
||||
impl TP1W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1582,8 +1644,10 @@ impl<'a> _TP1W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WP1`"]
|
||||
pub enum WP1W {
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
}
|
||||
impl WP1W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1638,8 +1702,10 @@ impl<'a> _WP1W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SP1`"]
|
||||
pub enum SP1W {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
}
|
||||
impl SP1W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1694,8 +1760,10 @@ impl<'a> _SP1W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TP0`"]
|
||||
pub enum TP0W {
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
}
|
||||
impl TP0W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1750,8 +1818,10 @@ impl<'a> _TP0W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WP0`"]
|
||||
pub enum WP0W {
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
}
|
||||
impl WP0W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1806,8 +1876,10 @@ impl<'a> _WP0W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SP0`"]
|
||||
pub enum SP0W {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
}
|
||||
impl SP0W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
|
|||
|
|
@ -45,8 +45,10 @@ impl super::OPACRB {
|
|||
#[doc = "Possible values of the field `TP6`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TP6R {
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
}
|
||||
impl TP6R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -90,8 +92,10 @@ impl TP6R {
|
|||
#[doc = "Possible values of the field `WP6`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WP6R {
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
}
|
||||
impl WP6R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -135,8 +139,10 @@ impl WP6R {
|
|||
#[doc = "Possible values of the field `SP6`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SP6R {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
}
|
||||
impl SP6R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -180,8 +186,10 @@ impl SP6R {
|
|||
#[doc = "Possible values of the field `TP5`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TP5R {
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
}
|
||||
impl TP5R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -225,8 +233,10 @@ impl TP5R {
|
|||
#[doc = "Possible values of the field `WP5`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WP5R {
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
}
|
||||
impl WP5R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -270,8 +280,10 @@ impl WP5R {
|
|||
#[doc = "Possible values of the field `SP5`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SP5R {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
}
|
||||
impl SP5R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -315,8 +327,10 @@ impl SP5R {
|
|||
#[doc = "Possible values of the field `TP4`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TP4R {
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
}
|
||||
impl TP4R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -360,8 +374,10 @@ impl TP4R {
|
|||
#[doc = "Possible values of the field `WP4`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WP4R {
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
}
|
||||
impl WP4R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -405,8 +421,10 @@ impl WP4R {
|
|||
#[doc = "Possible values of the field `SP4`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SP4R {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
}
|
||||
impl SP4R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -450,8 +468,10 @@ impl SP4R {
|
|||
#[doc = "Possible values of the field `TP3`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TP3R {
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
}
|
||||
impl TP3R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -495,8 +515,10 @@ impl TP3R {
|
|||
#[doc = "Possible values of the field `WP3`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WP3R {
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
}
|
||||
impl WP3R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -540,8 +562,10 @@ impl WP3R {
|
|||
#[doc = "Possible values of the field `SP3`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SP3R {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
}
|
||||
impl SP3R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -584,8 +608,10 @@ impl SP3R {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TP6`"]
|
||||
pub enum TP6W {
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
}
|
||||
impl TP6W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -640,8 +666,10 @@ impl<'a> _TP6W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WP6`"]
|
||||
pub enum WP6W {
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
}
|
||||
impl WP6W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -696,8 +724,10 @@ impl<'a> _WP6W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SP6`"]
|
||||
pub enum SP6W {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
}
|
||||
impl SP6W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -752,8 +782,10 @@ impl<'a> _SP6W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TP5`"]
|
||||
pub enum TP5W {
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
}
|
||||
impl TP5W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -808,8 +840,10 @@ impl<'a> _TP5W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WP5`"]
|
||||
pub enum WP5W {
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
}
|
||||
impl WP5W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -864,8 +898,10 @@ impl<'a> _WP5W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SP5`"]
|
||||
pub enum SP5W {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
}
|
||||
impl SP5W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -920,8 +956,10 @@ impl<'a> _SP5W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TP4`"]
|
||||
pub enum TP4W {
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
}
|
||||
impl TP4W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -976,8 +1014,10 @@ impl<'a> _TP4W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WP4`"]
|
||||
pub enum WP4W {
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
}
|
||||
impl WP4W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1032,8 +1072,10 @@ impl<'a> _WP4W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SP4`"]
|
||||
pub enum SP4W {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
}
|
||||
impl SP4W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1088,8 +1130,10 @@ impl<'a> _SP4W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TP3`"]
|
||||
pub enum TP3W {
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
}
|
||||
impl TP3W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1144,8 +1188,10 @@ impl<'a> _TP3W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WP3`"]
|
||||
pub enum WP3W {
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
}
|
||||
impl WP3W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1200,8 +1246,10 @@ impl<'a> _WP3W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SP3`"]
|
||||
pub enum SP3W {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
}
|
||||
impl SP3W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
|
|||
|
|
@ -45,8 +45,10 @@ impl super::OPACRC {
|
|||
#[doc = "Possible values of the field `TP7`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TP7R {
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
}
|
||||
impl TP7R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -90,8 +92,10 @@ impl TP7R {
|
|||
#[doc = "Possible values of the field `WP7`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WP7R {
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
}
|
||||
impl WP7R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -135,8 +139,10 @@ impl WP7R {
|
|||
#[doc = "Possible values of the field `SP7`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SP7R {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
}
|
||||
impl SP7R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -180,8 +186,10 @@ impl SP7R {
|
|||
#[doc = "Possible values of the field `TP6`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TP6R {
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
}
|
||||
impl TP6R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -225,8 +233,10 @@ impl TP6R {
|
|||
#[doc = "Possible values of the field `WP6`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WP6R {
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
}
|
||||
impl WP6R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -270,8 +280,10 @@ impl WP6R {
|
|||
#[doc = "Possible values of the field `SP6`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SP6R {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
}
|
||||
impl SP6R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -315,8 +327,10 @@ impl SP6R {
|
|||
#[doc = "Possible values of the field `TP2`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TP2R {
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
}
|
||||
impl TP2R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -360,8 +374,10 @@ impl TP2R {
|
|||
#[doc = "Possible values of the field `WP2`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WP2R {
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
}
|
||||
impl WP2R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -405,8 +421,10 @@ impl WP2R {
|
|||
#[doc = "Possible values of the field `SP2`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SP2R {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
}
|
||||
impl SP2R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -450,8 +468,10 @@ impl SP2R {
|
|||
#[doc = "Possible values of the field `TP1`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TP1R {
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
}
|
||||
impl TP1R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -495,8 +515,10 @@ impl TP1R {
|
|||
#[doc = "Possible values of the field `WP1`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WP1R {
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
}
|
||||
impl WP1R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -540,8 +562,10 @@ impl WP1R {
|
|||
#[doc = "Possible values of the field `SP1`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SP1R {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
}
|
||||
impl SP1R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -584,8 +608,10 @@ impl SP1R {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TP7`"]
|
||||
pub enum TP7W {
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
}
|
||||
impl TP7W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -640,8 +666,10 @@ impl<'a> _TP7W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WP7`"]
|
||||
pub enum WP7W {
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
}
|
||||
impl WP7W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -696,8 +724,10 @@ impl<'a> _WP7W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SP7`"]
|
||||
pub enum SP7W {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
}
|
||||
impl SP7W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -752,8 +782,10 @@ impl<'a> _SP7W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TP6`"]
|
||||
pub enum TP6W {
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
}
|
||||
impl TP6W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -808,8 +840,10 @@ impl<'a> _TP6W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WP6`"]
|
||||
pub enum WP6W {
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
}
|
||||
impl WP6W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -864,8 +898,10 @@ impl<'a> _WP6W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SP6`"]
|
||||
pub enum SP6W {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
}
|
||||
impl SP6W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -920,8 +956,10 @@ impl<'a> _SP6W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TP2`"]
|
||||
pub enum TP2W {
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
}
|
||||
impl TP2W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -976,8 +1014,10 @@ impl<'a> _TP2W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WP2`"]
|
||||
pub enum WP2W {
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
}
|
||||
impl WP2W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1032,8 +1072,10 @@ impl<'a> _WP2W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SP2`"]
|
||||
pub enum SP2W {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
}
|
||||
impl SP2W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1088,8 +1130,10 @@ impl<'a> _SP2W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TP1`"]
|
||||
pub enum TP1W {
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
}
|
||||
impl TP1W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1144,8 +1188,10 @@ impl<'a> _TP1W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WP1`"]
|
||||
pub enum WP1W {
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
}
|
||||
impl WP1W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1200,8 +1246,10 @@ impl<'a> _WP1W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SP1`"]
|
||||
pub enum SP1W {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
}
|
||||
impl SP1W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
|
|||
|
|
@ -45,8 +45,10 @@ impl super::OPACRD {
|
|||
#[doc = "Possible values of the field `TP5`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TP5R {
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
}
|
||||
impl TP5R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -90,8 +92,10 @@ impl TP5R {
|
|||
#[doc = "Possible values of the field `WP5`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WP5R {
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
}
|
||||
impl WP5R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -135,8 +139,10 @@ impl WP5R {
|
|||
#[doc = "Possible values of the field `SP5`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SP5R {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
}
|
||||
impl SP5R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -180,8 +186,10 @@ impl SP5R {
|
|||
#[doc = "Possible values of the field `TP3`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TP3R {
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
}
|
||||
impl TP3R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -225,8 +233,10 @@ impl TP3R {
|
|||
#[doc = "Possible values of the field `WP3`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WP3R {
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
}
|
||||
impl WP3R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -270,8 +280,10 @@ impl WP3R {
|
|||
#[doc = "Possible values of the field `SP3`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SP3R {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
}
|
||||
impl SP3R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -315,8 +327,10 @@ impl SP3R {
|
|||
#[doc = "Possible values of the field `TP2`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TP2R {
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
}
|
||||
impl TP2R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -360,8 +374,10 @@ impl TP2R {
|
|||
#[doc = "Possible values of the field `WP2`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WP2R {
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
}
|
||||
impl WP2R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -405,8 +421,10 @@ impl WP2R {
|
|||
#[doc = "Possible values of the field `SP2`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SP2R {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
}
|
||||
impl SP2R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -450,8 +468,10 @@ impl SP2R {
|
|||
#[doc = "Possible values of the field `TP1`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TP1R {
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
}
|
||||
impl TP1R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -495,8 +515,10 @@ impl TP1R {
|
|||
#[doc = "Possible values of the field `WP1`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WP1R {
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
}
|
||||
impl WP1R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -540,8 +562,10 @@ impl WP1R {
|
|||
#[doc = "Possible values of the field `SP1`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SP1R {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
}
|
||||
impl SP1R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -585,8 +609,10 @@ impl SP1R {
|
|||
#[doc = "Possible values of the field `TP0`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TP0R {
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
}
|
||||
impl TP0R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -630,8 +656,10 @@ impl TP0R {
|
|||
#[doc = "Possible values of the field `WP0`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WP0R {
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
}
|
||||
impl WP0R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -675,8 +703,10 @@ impl WP0R {
|
|||
#[doc = "Possible values of the field `SP0`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SP0R {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
}
|
||||
impl SP0R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -719,8 +749,10 @@ impl SP0R {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TP5`"]
|
||||
pub enum TP5W {
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
}
|
||||
impl TP5W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -775,8 +807,10 @@ impl<'a> _TP5W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WP5`"]
|
||||
pub enum WP5W {
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
}
|
||||
impl WP5W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -831,8 +865,10 @@ impl<'a> _WP5W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SP5`"]
|
||||
pub enum SP5W {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
}
|
||||
impl SP5W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -887,8 +923,10 @@ impl<'a> _SP5W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TP3`"]
|
||||
pub enum TP3W {
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
}
|
||||
impl TP3W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -943,8 +981,10 @@ impl<'a> _TP3W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WP3`"]
|
||||
pub enum WP3W {
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
}
|
||||
impl WP3W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -999,8 +1039,10 @@ impl<'a> _WP3W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SP3`"]
|
||||
pub enum SP3W {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
}
|
||||
impl SP3W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1055,8 +1097,10 @@ impl<'a> _SP3W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TP2`"]
|
||||
pub enum TP2W {
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
}
|
||||
impl TP2W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1111,8 +1155,10 @@ impl<'a> _TP2W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WP2`"]
|
||||
pub enum WP2W {
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
}
|
||||
impl WP2W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1167,8 +1213,10 @@ impl<'a> _WP2W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SP2`"]
|
||||
pub enum SP2W {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
}
|
||||
impl SP2W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1223,8 +1271,10 @@ impl<'a> _SP2W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TP1`"]
|
||||
pub enum TP1W {
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
}
|
||||
impl TP1W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1279,8 +1329,10 @@ impl<'a> _TP1W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WP1`"]
|
||||
pub enum WP1W {
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
}
|
||||
impl WP1W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1335,8 +1387,10 @@ impl<'a> _WP1W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SP1`"]
|
||||
pub enum SP1W {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
}
|
||||
impl SP1W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1391,8 +1445,10 @@ impl<'a> _SP1W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TP0`"]
|
||||
pub enum TP0W {
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
}
|
||||
impl TP0W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1447,8 +1503,10 @@ impl<'a> _TP0W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WP0`"]
|
||||
pub enum WP0W {
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
}
|
||||
impl WP0W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1503,8 +1561,10 @@ impl<'a> _WP0W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SP0`"]
|
||||
pub enum SP0W {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
}
|
||||
impl SP0W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
|
|||
|
|
@ -45,8 +45,10 @@ impl super::OPACRE {
|
|||
#[doc = "Possible values of the field `TP6`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TP6R {
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
}
|
||||
impl TP6R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -90,8 +92,10 @@ impl TP6R {
|
|||
#[doc = "Possible values of the field `WP6`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WP6R {
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
}
|
||||
impl WP6R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -135,8 +139,10 @@ impl WP6R {
|
|||
#[doc = "Possible values of the field `SP6`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SP6R {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
}
|
||||
impl SP6R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -180,8 +186,10 @@ impl SP6R {
|
|||
#[doc = "Possible values of the field `TP0`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TP0R {
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
}
|
||||
impl TP0R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -225,8 +233,10 @@ impl TP0R {
|
|||
#[doc = "Possible values of the field `WP0`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WP0R {
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
}
|
||||
impl WP0R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -270,8 +280,10 @@ impl WP0R {
|
|||
#[doc = "Possible values of the field `SP0`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SP0R {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
}
|
||||
impl SP0R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -314,8 +326,10 @@ impl SP0R {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TP6`"]
|
||||
pub enum TP6W {
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
}
|
||||
impl TP6W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -370,8 +384,10 @@ impl<'a> _TP6W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WP6`"]
|
||||
pub enum WP6W {
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
}
|
||||
impl WP6W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -426,8 +442,10 @@ impl<'a> _WP6W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SP6`"]
|
||||
pub enum SP6W {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
}
|
||||
impl SP6W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -482,8 +500,10 @@ impl<'a> _SP6W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TP0`"]
|
||||
pub enum TP0W {
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
}
|
||||
impl TP0W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -538,8 +558,10 @@ impl<'a> _TP0W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WP0`"]
|
||||
pub enum WP0W {
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
}
|
||||
impl WP0W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -594,8 +616,10 @@ impl<'a> _WP0W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SP0`"]
|
||||
pub enum SP0W {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
}
|
||||
impl SP0W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
|
|||
|
|
@ -45,8 +45,10 @@ impl super::OPACRF {
|
|||
#[doc = "Possible values of the field `TP5`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TP5R {
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
}
|
||||
impl TP5R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -90,8 +92,10 @@ impl TP5R {
|
|||
#[doc = "Possible values of the field `WP5`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WP5R {
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
}
|
||||
impl WP5R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -135,8 +139,10 @@ impl WP5R {
|
|||
#[doc = "Possible values of the field `SP5`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SP5R {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
}
|
||||
impl SP5R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -180,8 +186,10 @@ impl SP5R {
|
|||
#[doc = "Possible values of the field `TP4`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TP4R {
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
}
|
||||
impl TP4R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -225,8 +233,10 @@ impl TP4R {
|
|||
#[doc = "Possible values of the field `WP4`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WP4R {
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
}
|
||||
impl WP4R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -270,8 +280,10 @@ impl WP4R {
|
|||
#[doc = "Possible values of the field `SP4`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SP4R {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
}
|
||||
impl SP4R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -315,8 +327,10 @@ impl SP4R {
|
|||
#[doc = "Possible values of the field `TP3`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TP3R {
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
}
|
||||
impl TP3R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -360,8 +374,10 @@ impl TP3R {
|
|||
#[doc = "Possible values of the field `WP3`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WP3R {
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
}
|
||||
impl WP3R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -405,8 +421,10 @@ impl WP3R {
|
|||
#[doc = "Possible values of the field `SP3`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SP3R {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
}
|
||||
impl SP3R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -450,8 +468,10 @@ impl SP3R {
|
|||
#[doc = "Possible values of the field `TP2`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TP2R {
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
}
|
||||
impl TP2R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -495,8 +515,10 @@ impl TP2R {
|
|||
#[doc = "Possible values of the field `WP2`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WP2R {
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
}
|
||||
impl WP2R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -540,8 +562,10 @@ impl WP2R {
|
|||
#[doc = "Possible values of the field `SP2`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SP2R {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
}
|
||||
impl SP2R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -585,8 +609,10 @@ impl SP2R {
|
|||
#[doc = "Possible values of the field `TP1`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TP1R {
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
}
|
||||
impl TP1R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -630,8 +656,10 @@ impl TP1R {
|
|||
#[doc = "Possible values of the field `WP1`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WP1R {
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
}
|
||||
impl WP1R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -675,8 +703,10 @@ impl WP1R {
|
|||
#[doc = "Possible values of the field `SP1`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SP1R {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
}
|
||||
impl SP1R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -720,8 +750,10 @@ impl SP1R {
|
|||
#[doc = "Possible values of the field `TP0`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TP0R {
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
}
|
||||
impl TP0R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -765,8 +797,10 @@ impl TP0R {
|
|||
#[doc = "Possible values of the field `WP0`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WP0R {
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
}
|
||||
impl WP0R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -810,8 +844,10 @@ impl WP0R {
|
|||
#[doc = "Possible values of the field `SP0`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SP0R {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
}
|
||||
impl SP0R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -854,8 +890,10 @@ impl SP0R {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TP5`"]
|
||||
pub enum TP5W {
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
}
|
||||
impl TP5W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -910,8 +948,10 @@ impl<'a> _TP5W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WP5`"]
|
||||
pub enum WP5W {
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
}
|
||||
impl WP5W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -966,8 +1006,10 @@ impl<'a> _WP5W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SP5`"]
|
||||
pub enum SP5W {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
}
|
||||
impl SP5W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1022,8 +1064,10 @@ impl<'a> _SP5W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TP4`"]
|
||||
pub enum TP4W {
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
}
|
||||
impl TP4W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1078,8 +1122,10 @@ impl<'a> _TP4W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WP4`"]
|
||||
pub enum WP4W {
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
}
|
||||
impl WP4W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1134,8 +1180,10 @@ impl<'a> _WP4W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SP4`"]
|
||||
pub enum SP4W {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
}
|
||||
impl SP4W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1190,8 +1238,10 @@ impl<'a> _SP4W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TP3`"]
|
||||
pub enum TP3W {
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
}
|
||||
impl TP3W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1246,8 +1296,10 @@ impl<'a> _TP3W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WP3`"]
|
||||
pub enum WP3W {
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
}
|
||||
impl WP3W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1302,8 +1354,10 @@ impl<'a> _WP3W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SP3`"]
|
||||
pub enum SP3W {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
}
|
||||
impl SP3W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1358,8 +1412,10 @@ impl<'a> _SP3W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TP2`"]
|
||||
pub enum TP2W {
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
}
|
||||
impl TP2W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1414,8 +1470,10 @@ impl<'a> _TP2W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WP2`"]
|
||||
pub enum WP2W {
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
}
|
||||
impl WP2W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1470,8 +1528,10 @@ impl<'a> _WP2W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SP2`"]
|
||||
pub enum SP2W {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
}
|
||||
impl SP2W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1526,8 +1586,10 @@ impl<'a> _SP2W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TP1`"]
|
||||
pub enum TP1W {
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
}
|
||||
impl TP1W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1582,8 +1644,10 @@ impl<'a> _TP1W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WP1`"]
|
||||
pub enum WP1W {
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
}
|
||||
impl WP1W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1638,8 +1702,10 @@ impl<'a> _WP1W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SP1`"]
|
||||
pub enum SP1W {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
}
|
||||
impl SP1W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1694,8 +1760,10 @@ impl<'a> _SP1W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TP0`"]
|
||||
pub enum TP0W {
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
}
|
||||
impl TP0W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1750,8 +1818,10 @@ impl<'a> _TP0W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WP0`"]
|
||||
pub enum WP0W {
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
}
|
||||
impl WP0W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1806,8 +1876,10 @@ impl<'a> _WP0W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SP0`"]
|
||||
pub enum SP0W {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
}
|
||||
impl SP0W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
|
|||
|
|
@ -45,8 +45,10 @@ impl super::OPACRG {
|
|||
#[doc = "Possible values of the field `TP2`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TP2R {
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
}
|
||||
impl TP2R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -90,8 +92,10 @@ impl TP2R {
|
|||
#[doc = "Possible values of the field `WP2`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WP2R {
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
}
|
||||
impl WP2R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -135,8 +139,10 @@ impl WP2R {
|
|||
#[doc = "Possible values of the field `SP2`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SP2R {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
}
|
||||
impl SP2R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -179,8 +185,10 @@ impl SP2R {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TP2`"]
|
||||
pub enum TP2W {
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
}
|
||||
impl TP2W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -235,8 +243,10 @@ impl<'a> _TP2W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WP2`"]
|
||||
pub enum WP2W {
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
}
|
||||
impl WP2W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -291,8 +301,10 @@ impl<'a> _WP2W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SP2`"]
|
||||
pub enum SP2W {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
}
|
||||
impl SP2W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
|
|||
|
|
@ -45,8 +45,10 @@ impl super::OPACRH {
|
|||
#[doc = "Possible values of the field `TP2`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TP2R {
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
}
|
||||
impl TP2R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -90,8 +92,10 @@ impl TP2R {
|
|||
#[doc = "Possible values of the field `WP2`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WP2R {
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
}
|
||||
impl WP2R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -135,8 +139,10 @@ impl WP2R {
|
|||
#[doc = "Possible values of the field `SP2`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SP2R {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
}
|
||||
impl SP2R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -179,8 +185,10 @@ impl SP2R {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TP2`"]
|
||||
pub enum TP2W {
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
}
|
||||
impl TP2W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -235,8 +243,10 @@ impl<'a> _TP2W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WP2`"]
|
||||
pub enum WP2W {
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
}
|
||||
impl WP2W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -291,8 +301,10 @@ impl<'a> _WP2W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SP2`"]
|
||||
pub enum SP2W {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
}
|
||||
impl SP2W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
|
|||
|
|
@ -45,8 +45,10 @@ impl super::OPACRI {
|
|||
#[doc = "Possible values of the field `TP6`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TP6R {
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
}
|
||||
impl TP6R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -90,8 +92,10 @@ impl TP6R {
|
|||
#[doc = "Possible values of the field `WP6`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WP6R {
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
}
|
||||
impl WP6R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -135,8 +139,10 @@ impl WP6R {
|
|||
#[doc = "Possible values of the field `SP6`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SP6R {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
}
|
||||
impl SP6R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -180,8 +186,10 @@ impl SP6R {
|
|||
#[doc = "Possible values of the field `TP5`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TP5R {
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
}
|
||||
impl TP5R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -225,8 +233,10 @@ impl TP5R {
|
|||
#[doc = "Possible values of the field `WP5`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WP5R {
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
}
|
||||
impl WP5R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -270,8 +280,10 @@ impl WP5R {
|
|||
#[doc = "Possible values of the field `SP5`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SP5R {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
}
|
||||
impl SP5R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -315,8 +327,10 @@ impl SP5R {
|
|||
#[doc = "Possible values of the field `TP4`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TP4R {
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
}
|
||||
impl TP4R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -360,8 +374,10 @@ impl TP4R {
|
|||
#[doc = "Possible values of the field `WP4`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WP4R {
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
}
|
||||
impl WP4R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -405,8 +421,10 @@ impl WP4R {
|
|||
#[doc = "Possible values of the field `SP4`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SP4R {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
}
|
||||
impl SP4R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -450,8 +468,10 @@ impl SP4R {
|
|||
#[doc = "Possible values of the field `TP3`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TP3R {
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
}
|
||||
impl TP3R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -495,8 +515,10 @@ impl TP3R {
|
|||
#[doc = "Possible values of the field `WP3`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WP3R {
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
}
|
||||
impl WP3R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -540,8 +562,10 @@ impl WP3R {
|
|||
#[doc = "Possible values of the field `SP3`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SP3R {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
}
|
||||
impl SP3R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -585,8 +609,10 @@ impl SP3R {
|
|||
#[doc = "Possible values of the field `TP1`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TP1R {
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
}
|
||||
impl TP1R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -630,8 +656,10 @@ impl TP1R {
|
|||
#[doc = "Possible values of the field `WP1`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WP1R {
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
}
|
||||
impl WP1R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -675,8 +703,10 @@ impl WP1R {
|
|||
#[doc = "Possible values of the field `SP1`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SP1R {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
}
|
||||
impl SP1R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -719,8 +749,10 @@ impl SP1R {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TP6`"]
|
||||
pub enum TP6W {
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
}
|
||||
impl TP6W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -775,8 +807,10 @@ impl<'a> _TP6W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WP6`"]
|
||||
pub enum WP6W {
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
}
|
||||
impl WP6W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -831,8 +865,10 @@ impl<'a> _WP6W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SP6`"]
|
||||
pub enum SP6W {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
}
|
||||
impl SP6W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -887,8 +923,10 @@ impl<'a> _SP6W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TP5`"]
|
||||
pub enum TP5W {
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
}
|
||||
impl TP5W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -943,8 +981,10 @@ impl<'a> _TP5W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WP5`"]
|
||||
pub enum WP5W {
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
}
|
||||
impl WP5W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -999,8 +1039,10 @@ impl<'a> _WP5W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SP5`"]
|
||||
pub enum SP5W {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
}
|
||||
impl SP5W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1055,8 +1097,10 @@ impl<'a> _SP5W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TP4`"]
|
||||
pub enum TP4W {
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
}
|
||||
impl TP4W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1111,8 +1155,10 @@ impl<'a> _TP4W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WP4`"]
|
||||
pub enum WP4W {
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
}
|
||||
impl WP4W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1167,8 +1213,10 @@ impl<'a> _WP4W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SP4`"]
|
||||
pub enum SP4W {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
}
|
||||
impl SP4W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1223,8 +1271,10 @@ impl<'a> _SP4W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TP3`"]
|
||||
pub enum TP3W {
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
}
|
||||
impl TP3W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1279,8 +1329,10 @@ impl<'a> _TP3W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WP3`"]
|
||||
pub enum WP3W {
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
}
|
||||
impl WP3W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1335,8 +1387,10 @@ impl<'a> _WP3W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SP3`"]
|
||||
pub enum SP3W {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
}
|
||||
impl SP3W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1391,8 +1445,10 @@ impl<'a> _SP3W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TP1`"]
|
||||
pub enum TP1W {
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
}
|
||||
impl TP1W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1447,8 +1503,10 @@ impl<'a> _TP1W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WP1`"]
|
||||
pub enum WP1W {
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
}
|
||||
impl WP1W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1503,8 +1561,10 @@ impl<'a> _WP1W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SP1`"]
|
||||
pub enum SP1W {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
}
|
||||
impl SP1W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
|
|||
|
|
@ -45,8 +45,10 @@ impl super::OPACRJ {
|
|||
#[doc = "Possible values of the field `TP4`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TP4R {
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
}
|
||||
impl TP4R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -90,8 +92,10 @@ impl TP4R {
|
|||
#[doc = "Possible values of the field `WP4`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WP4R {
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
}
|
||||
impl WP4R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -135,8 +139,10 @@ impl WP4R {
|
|||
#[doc = "Possible values of the field `SP4`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SP4R {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
}
|
||||
impl SP4R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -180,8 +186,10 @@ impl SP4R {
|
|||
#[doc = "Possible values of the field `TP3`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TP3R {
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
}
|
||||
impl TP3R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -225,8 +233,10 @@ impl TP3R {
|
|||
#[doc = "Possible values of the field `WP3`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WP3R {
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
}
|
||||
impl WP3R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -270,8 +280,10 @@ impl WP3R {
|
|||
#[doc = "Possible values of the field `SP3`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SP3R {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
}
|
||||
impl SP3R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -315,8 +327,10 @@ impl SP3R {
|
|||
#[doc = "Possible values of the field `TP2`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TP2R {
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
}
|
||||
impl TP2R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -360,8 +374,10 @@ impl TP2R {
|
|||
#[doc = "Possible values of the field `WP2`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WP2R {
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
}
|
||||
impl WP2R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -405,8 +421,10 @@ impl WP2R {
|
|||
#[doc = "Possible values of the field `SP2`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SP2R {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
}
|
||||
impl SP2R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -449,8 +467,10 @@ impl SP2R {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TP4`"]
|
||||
pub enum TP4W {
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
}
|
||||
impl TP4W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -505,8 +525,10 @@ impl<'a> _TP4W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WP4`"]
|
||||
pub enum WP4W {
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
}
|
||||
impl WP4W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -561,8 +583,10 @@ impl<'a> _WP4W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SP4`"]
|
||||
pub enum SP4W {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
}
|
||||
impl SP4W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -617,8 +641,10 @@ impl<'a> _SP4W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TP3`"]
|
||||
pub enum TP3W {
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
}
|
||||
impl TP3W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -673,8 +699,10 @@ impl<'a> _TP3W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WP3`"]
|
||||
pub enum WP3W {
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
}
|
||||
impl WP3W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -729,8 +757,10 @@ impl<'a> _WP3W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SP3`"]
|
||||
pub enum SP3W {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
}
|
||||
impl SP3W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -785,8 +815,10 @@ impl<'a> _SP3W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TP2`"]
|
||||
pub enum TP2W {
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
}
|
||||
impl TP2W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -841,8 +873,10 @@ impl<'a> _TP2W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WP2`"]
|
||||
pub enum WP2W {
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
}
|
||||
impl WP2W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -897,8 +931,10 @@ impl<'a> _WP2W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SP2`"]
|
||||
pub enum SP2W {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
}
|
||||
impl SP2W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
|
|||
|
|
@ -45,8 +45,10 @@ impl super::OPACRK {
|
|||
#[doc = "Possible values of the field `TP3`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TP3R {
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
}
|
||||
impl TP3R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -90,8 +92,10 @@ impl TP3R {
|
|||
#[doc = "Possible values of the field `WP3`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WP3R {
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
}
|
||||
impl WP3R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -135,8 +139,10 @@ impl WP3R {
|
|||
#[doc = "Possible values of the field `SP3`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SP3R {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
}
|
||||
impl SP3R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -179,8 +185,10 @@ impl SP3R {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TP3`"]
|
||||
pub enum TP3W {
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
}
|
||||
impl TP3W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -235,8 +243,10 @@ impl<'a> _TP3W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WP3`"]
|
||||
pub enum WP3W {
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
}
|
||||
impl WP3W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -291,8 +301,10 @@ impl<'a> _WP3W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SP3`"]
|
||||
pub enum SP3W {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
}
|
||||
impl SP3W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
|
|||
|
|
@ -45,8 +45,10 @@ impl super::OPACRL {
|
|||
#[doc = "Possible values of the field `TP7`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TP7R {
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
}
|
||||
impl TP7R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -90,8 +92,10 @@ impl TP7R {
|
|||
#[doc = "Possible values of the field `WP7`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WP7R {
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
}
|
||||
impl WP7R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -135,8 +139,10 @@ impl WP7R {
|
|||
#[doc = "Possible values of the field `SP7`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SP7R {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
}
|
||||
impl SP7R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -180,8 +186,10 @@ impl SP7R {
|
|||
#[doc = "Possible values of the field `TP6`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TP6R {
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
}
|
||||
impl TP6R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -225,8 +233,10 @@ impl TP6R {
|
|||
#[doc = "Possible values of the field `WP6`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WP6R {
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
}
|
||||
impl WP6R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -270,8 +280,10 @@ impl WP6R {
|
|||
#[doc = "Possible values of the field `SP6`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SP6R {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
}
|
||||
impl SP6R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -315,8 +327,10 @@ impl SP6R {
|
|||
#[doc = "Possible values of the field `TP5`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TP5R {
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
}
|
||||
impl TP5R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -360,8 +374,10 @@ impl TP5R {
|
|||
#[doc = "Possible values of the field `WP5`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WP5R {
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
}
|
||||
impl WP5R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -405,8 +421,10 @@ impl WP5R {
|
|||
#[doc = "Possible values of the field `SP5`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SP5R {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
}
|
||||
impl SP5R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -449,8 +467,10 @@ impl SP5R {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TP7`"]
|
||||
pub enum TP7W {
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
}
|
||||
impl TP7W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -505,8 +525,10 @@ impl<'a> _TP7W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WP7`"]
|
||||
pub enum WP7W {
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
}
|
||||
impl WP7W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -561,8 +583,10 @@ impl<'a> _WP7W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SP7`"]
|
||||
pub enum SP7W {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
}
|
||||
impl SP7W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -617,8 +641,10 @@ impl<'a> _SP7W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TP6`"]
|
||||
pub enum TP6W {
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
}
|
||||
impl TP6W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -673,8 +699,10 @@ impl<'a> _TP6W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WP6`"]
|
||||
pub enum WP6W {
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
}
|
||||
impl WP6W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -729,8 +757,10 @@ impl<'a> _WP6W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SP6`"]
|
||||
pub enum SP6W {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
}
|
||||
impl SP6W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -785,8 +815,10 @@ impl<'a> _SP6W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TP5`"]
|
||||
pub enum TP5W {
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
}
|
||||
impl TP5W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -841,8 +873,10 @@ impl<'a> _TP5W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WP5`"]
|
||||
pub enum WP5W {
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
}
|
||||
impl WP5W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -897,8 +931,10 @@ impl<'a> _WP5W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SP5`"]
|
||||
pub enum SP5W {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
}
|
||||
impl SP5W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
|
|||
|
|
@ -45,8 +45,10 @@ impl super::PACRA {
|
|||
#[doc = "Possible values of the field `TP1`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TP1R {
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
}
|
||||
impl TP1R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -90,8 +92,10 @@ impl TP1R {
|
|||
#[doc = "Possible values of the field `WP1`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WP1R {
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
}
|
||||
impl WP1R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -135,8 +139,10 @@ impl WP1R {
|
|||
#[doc = "Possible values of the field `SP1`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SP1R {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
}
|
||||
impl SP1R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -180,8 +186,10 @@ impl SP1R {
|
|||
#[doc = "Possible values of the field `TP0`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TP0R {
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
}
|
||||
impl TP0R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -225,8 +233,10 @@ impl TP0R {
|
|||
#[doc = "Possible values of the field `WP0`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WP0R {
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
}
|
||||
impl WP0R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -270,8 +280,10 @@ impl WP0R {
|
|||
#[doc = "Possible values of the field `SP0`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SP0R {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
}
|
||||
impl SP0R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -314,8 +326,10 @@ impl SP0R {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TP1`"]
|
||||
pub enum TP1W {
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
}
|
||||
impl TP1W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -370,8 +384,10 @@ impl<'a> _TP1W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WP1`"]
|
||||
pub enum WP1W {
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
}
|
||||
impl WP1W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -426,8 +442,10 @@ impl<'a> _WP1W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SP1`"]
|
||||
pub enum SP1W {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
}
|
||||
impl SP1W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -482,8 +500,10 @@ impl<'a> _SP1W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TP0`"]
|
||||
pub enum TP0W {
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
}
|
||||
impl TP0W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -538,8 +558,10 @@ impl<'a> _TP0W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WP0`"]
|
||||
pub enum WP0W {
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
}
|
||||
impl WP0W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -594,8 +616,10 @@ impl<'a> _WP0W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SP0`"]
|
||||
pub enum SP0W {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
}
|
||||
impl SP0W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
|
|||
|
|
@ -45,8 +45,10 @@ impl super::PACRB {
|
|||
#[doc = "Possible values of the field `TP5`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TP5R {
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
}
|
||||
impl TP5R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -90,8 +92,10 @@ impl TP5R {
|
|||
#[doc = "Possible values of the field `WP5`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WP5R {
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
}
|
||||
impl WP5R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -135,8 +139,10 @@ impl WP5R {
|
|||
#[doc = "Possible values of the field `SP5`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SP5R {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
}
|
||||
impl SP5R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -180,8 +186,10 @@ impl SP5R {
|
|||
#[doc = "Possible values of the field `TP1`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TP1R {
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
}
|
||||
impl TP1R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -225,8 +233,10 @@ impl TP1R {
|
|||
#[doc = "Possible values of the field `WP1`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WP1R {
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
}
|
||||
impl WP1R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -270,8 +280,10 @@ impl WP1R {
|
|||
#[doc = "Possible values of the field `SP1`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SP1R {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
}
|
||||
impl SP1R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -315,8 +327,10 @@ impl SP1R {
|
|||
#[doc = "Possible values of the field `TP0`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TP0R {
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
}
|
||||
impl TP0R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -360,8 +374,10 @@ impl TP0R {
|
|||
#[doc = "Possible values of the field `WP0`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WP0R {
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
}
|
||||
impl WP0R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -405,8 +421,10 @@ impl WP0R {
|
|||
#[doc = "Possible values of the field `SP0`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SP0R {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
}
|
||||
impl SP0R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -449,8 +467,10 @@ impl SP0R {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TP5`"]
|
||||
pub enum TP5W {
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
}
|
||||
impl TP5W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -505,8 +525,10 @@ impl<'a> _TP5W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WP5`"]
|
||||
pub enum WP5W {
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
}
|
||||
impl WP5W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -561,8 +583,10 @@ impl<'a> _WP5W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SP5`"]
|
||||
pub enum SP5W {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
}
|
||||
impl SP5W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -617,8 +641,10 @@ impl<'a> _SP5W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TP1`"]
|
||||
pub enum TP1W {
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
}
|
||||
impl TP1W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -673,8 +699,10 @@ impl<'a> _TP1W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WP1`"]
|
||||
pub enum WP1W {
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
}
|
||||
impl WP1W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -729,8 +757,10 @@ impl<'a> _WP1W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SP1`"]
|
||||
pub enum SP1W {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
}
|
||||
impl SP1W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -785,8 +815,10 @@ impl<'a> _SP1W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TP0`"]
|
||||
pub enum TP0W {
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
}
|
||||
impl TP0W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -841,8 +873,10 @@ impl<'a> _TP0W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WP0`"]
|
||||
pub enum WP0W {
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
}
|
||||
impl WP0W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -897,8 +931,10 @@ impl<'a> _WP0W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SP0`"]
|
||||
pub enum SP0W {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
}
|
||||
impl SP0W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
|
|||
|
|
@ -45,8 +45,10 @@ impl super::PACRD {
|
|||
#[doc = "Possible values of the field `TP1`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TP1R {
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
}
|
||||
impl TP1R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -90,8 +92,10 @@ impl TP1R {
|
|||
#[doc = "Possible values of the field `WP1`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WP1R {
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
}
|
||||
impl WP1R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -135,8 +139,10 @@ impl WP1R {
|
|||
#[doc = "Possible values of the field `SP1`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SP1R {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
}
|
||||
impl SP1R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -180,8 +186,10 @@ impl SP1R {
|
|||
#[doc = "Possible values of the field `TP0`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TP0R {
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
}
|
||||
impl TP0R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -225,8 +233,10 @@ impl TP0R {
|
|||
#[doc = "Possible values of the field `WP0`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WP0R {
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
}
|
||||
impl WP0R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -270,8 +280,10 @@ impl WP0R {
|
|||
#[doc = "Possible values of the field `SP0`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SP0R {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
}
|
||||
impl SP0R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -314,8 +326,10 @@ impl SP0R {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TP1`"]
|
||||
pub enum TP1W {
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
}
|
||||
impl TP1W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -370,8 +384,10 @@ impl<'a> _TP1W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WP1`"]
|
||||
pub enum WP1W {
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
}
|
||||
impl WP1W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -426,8 +442,10 @@ impl<'a> _WP1W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SP1`"]
|
||||
pub enum SP1W {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
}
|
||||
impl SP1W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -482,8 +500,10 @@ impl<'a> _SP1W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TP0`"]
|
||||
pub enum TP0W {
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
}
|
||||
impl TP0W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -538,8 +558,10 @@ impl<'a> _TP0W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WP0`"]
|
||||
pub enum WP0W {
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
}
|
||||
impl WP0W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -594,8 +616,10 @@ impl<'a> _WP0W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SP0`"]
|
||||
pub enum SP0W {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
}
|
||||
impl SP0W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
|
|||
|
|
@ -100,8 +100,10 @@ impl EPRESDIVR {
|
|||
#[doc = "Possible values of the field `BTF`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum BTFR {
|
||||
#[doc = "Extended bit time definitions disabled."] _0,
|
||||
#[doc = "Extended bit time definitions enabled."] _1,
|
||||
#[doc = "Extended bit time definitions disabled."]
|
||||
_0,
|
||||
#[doc = "Extended bit time definitions enabled."]
|
||||
_1,
|
||||
}
|
||||
impl BTFR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -219,8 +221,10 @@ impl<'a> _EPRESDIVW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `BTF`"]
|
||||
pub enum BTFW {
|
||||
#[doc = "Extended bit time definitions disabled."] _0,
|
||||
#[doc = "Extended bit time definitions enabled."] _1,
|
||||
#[doc = "Extended bit time definitions disabled."]
|
||||
_0,
|
||||
#[doc = "Extended bit time definitions enabled."]
|
||||
_1,
|
||||
}
|
||||
impl BTFW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
|
|||
|
|
@ -56,8 +56,10 @@ impl PROPSEGR {
|
|||
#[doc = "Possible values of the field `LOM`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum LOMR {
|
||||
#[doc = "Listen-Only mode is deactivated."] _0,
|
||||
#[doc = "FlexCAN module operates in Listen-Only mode."] _1,
|
||||
#[doc = "Listen-Only mode is deactivated."]
|
||||
_0,
|
||||
#[doc = "FlexCAN module operates in Listen-Only mode."]
|
||||
_1,
|
||||
}
|
||||
impl LOMR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -101,8 +103,10 @@ impl LOMR {
|
|||
#[doc = "Possible values of the field `LBUF`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum LBUFR {
|
||||
#[doc = "Buffer with highest priority is transmitted first."] _0,
|
||||
#[doc = "Lowest number buffer is transmitted first."] _1,
|
||||
#[doc = "Buffer with highest priority is transmitted first."]
|
||||
_0,
|
||||
#[doc = "Lowest number buffer is transmitted first."]
|
||||
_1,
|
||||
}
|
||||
impl LBUFR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -146,8 +150,10 @@ impl LBUFR {
|
|||
#[doc = "Possible values of the field `TSYN`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TSYNR {
|
||||
#[doc = "Timer Sync feature disabled"] _0,
|
||||
#[doc = "Timer Sync feature enabled"] _1,
|
||||
#[doc = "Timer Sync feature disabled"]
|
||||
_0,
|
||||
#[doc = "Timer Sync feature enabled"]
|
||||
_1,
|
||||
}
|
||||
impl TSYNR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -191,8 +197,10 @@ impl TSYNR {
|
|||
#[doc = "Possible values of the field `BOFFREC`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum BOFFRECR {
|
||||
#[doc = "Automatic recovering from Bus Off state enabled."] _0,
|
||||
#[doc = "Automatic recovering from Bus Off state disabled."] _1,
|
||||
#[doc = "Automatic recovering from Bus Off state enabled."]
|
||||
_0,
|
||||
#[doc = "Automatic recovering from Bus Off state disabled."]
|
||||
_1,
|
||||
}
|
||||
impl BOFFRECR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -236,7 +244,8 @@ impl BOFFRECR {
|
|||
#[doc = "Possible values of the field `SMP`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SMPR {
|
||||
#[doc = "Just one sample is used to determine the bit value."] _0,
|
||||
#[doc = "Just one sample is used to determine the bit value."]
|
||||
_0,
|
||||
#[doc = "Three samples are used to determine the value of the received bit: the regular one (sample point) and 2 preceding samples; a majority rule is used."]
|
||||
_1,
|
||||
}
|
||||
|
|
@ -282,8 +291,10 @@ impl SMPR {
|
|||
#[doc = "Possible values of the field `RWRNMSK`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum RWRNMSKR {
|
||||
#[doc = "Rx Warning Interrupt disabled."] _0,
|
||||
#[doc = "Rx Warning Interrupt enabled."] _1,
|
||||
#[doc = "Rx Warning Interrupt disabled."]
|
||||
_0,
|
||||
#[doc = "Rx Warning Interrupt enabled."]
|
||||
_1,
|
||||
}
|
||||
impl RWRNMSKR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -327,8 +338,10 @@ impl RWRNMSKR {
|
|||
#[doc = "Possible values of the field `TWRNMSK`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TWRNMSKR {
|
||||
#[doc = "Tx Warning Interrupt disabled."] _0,
|
||||
#[doc = "Tx Warning Interrupt enabled."] _1,
|
||||
#[doc = "Tx Warning Interrupt disabled."]
|
||||
_0,
|
||||
#[doc = "Tx Warning Interrupt enabled."]
|
||||
_1,
|
||||
}
|
||||
impl TWRNMSKR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -372,8 +385,10 @@ impl TWRNMSKR {
|
|||
#[doc = "Possible values of the field `LPB`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum LPBR {
|
||||
#[doc = "Loop Back disabled."] _0,
|
||||
#[doc = "Loop Back enabled."] _1,
|
||||
#[doc = "Loop Back disabled."]
|
||||
_0,
|
||||
#[doc = "Loop Back enabled."]
|
||||
_1,
|
||||
}
|
||||
impl LPBR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -419,7 +434,8 @@ impl LPBR {
|
|||
pub enum CLKSRCR {
|
||||
#[doc = "The CAN engine clock source is the oscillator clock. Under this condition, the oscillator clock frequency must be lower than the bus clock."]
|
||||
_0,
|
||||
#[doc = "The CAN engine clock source is the peripheral clock."] _1,
|
||||
#[doc = "The CAN engine clock source is the peripheral clock."]
|
||||
_1,
|
||||
}
|
||||
impl CLKSRCR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -463,8 +479,10 @@ impl CLKSRCR {
|
|||
#[doc = "Possible values of the field `ERRMSK`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ERRMSKR {
|
||||
#[doc = "Error interrupt disabled."] _0,
|
||||
#[doc = "Error interrupt enabled."] _1,
|
||||
#[doc = "Error interrupt disabled."]
|
||||
_0,
|
||||
#[doc = "Error interrupt enabled."]
|
||||
_1,
|
||||
}
|
||||
impl ERRMSKR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -508,8 +526,10 @@ impl ERRMSKR {
|
|||
#[doc = "Possible values of the field `BOFFMSK`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum BOFFMSKR {
|
||||
#[doc = "Bus Off interrupt disabled."] _0,
|
||||
#[doc = "Bus Off interrupt enabled."] _1,
|
||||
#[doc = "Bus Off interrupt disabled."]
|
||||
_0,
|
||||
#[doc = "Bus Off interrupt enabled."]
|
||||
_1,
|
||||
}
|
||||
impl BOFFMSKR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -611,8 +631,10 @@ impl<'a> _PROPSEGW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `LOM`"]
|
||||
pub enum LOMW {
|
||||
#[doc = "Listen-Only mode is deactivated."] _0,
|
||||
#[doc = "FlexCAN module operates in Listen-Only mode."] _1,
|
||||
#[doc = "Listen-Only mode is deactivated."]
|
||||
_0,
|
||||
#[doc = "FlexCAN module operates in Listen-Only mode."]
|
||||
_1,
|
||||
}
|
||||
impl LOMW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -667,8 +689,10 @@ impl<'a> _LOMW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `LBUF`"]
|
||||
pub enum LBUFW {
|
||||
#[doc = "Buffer with highest priority is transmitted first."] _0,
|
||||
#[doc = "Lowest number buffer is transmitted first."] _1,
|
||||
#[doc = "Buffer with highest priority is transmitted first."]
|
||||
_0,
|
||||
#[doc = "Lowest number buffer is transmitted first."]
|
||||
_1,
|
||||
}
|
||||
impl LBUFW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -723,8 +747,10 @@ impl<'a> _LBUFW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TSYN`"]
|
||||
pub enum TSYNW {
|
||||
#[doc = "Timer Sync feature disabled"] _0,
|
||||
#[doc = "Timer Sync feature enabled"] _1,
|
||||
#[doc = "Timer Sync feature disabled"]
|
||||
_0,
|
||||
#[doc = "Timer Sync feature enabled"]
|
||||
_1,
|
||||
}
|
||||
impl TSYNW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -779,8 +805,10 @@ impl<'a> _TSYNW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `BOFFREC`"]
|
||||
pub enum BOFFRECW {
|
||||
#[doc = "Automatic recovering from Bus Off state enabled."] _0,
|
||||
#[doc = "Automatic recovering from Bus Off state disabled."] _1,
|
||||
#[doc = "Automatic recovering from Bus Off state enabled."]
|
||||
_0,
|
||||
#[doc = "Automatic recovering from Bus Off state disabled."]
|
||||
_1,
|
||||
}
|
||||
impl BOFFRECW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -835,7 +863,8 @@ impl<'a> _BOFFRECW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SMP`"]
|
||||
pub enum SMPW {
|
||||
#[doc = "Just one sample is used to determine the bit value."] _0,
|
||||
#[doc = "Just one sample is used to determine the bit value."]
|
||||
_0,
|
||||
#[doc = "Three samples are used to determine the value of the received bit: the regular one (sample point) and 2 preceding samples; a majority rule is used."]
|
||||
_1,
|
||||
}
|
||||
|
|
@ -892,8 +921,10 @@ impl<'a> _SMPW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `RWRNMSK`"]
|
||||
pub enum RWRNMSKW {
|
||||
#[doc = "Rx Warning Interrupt disabled."] _0,
|
||||
#[doc = "Rx Warning Interrupt enabled."] _1,
|
||||
#[doc = "Rx Warning Interrupt disabled."]
|
||||
_0,
|
||||
#[doc = "Rx Warning Interrupt enabled."]
|
||||
_1,
|
||||
}
|
||||
impl RWRNMSKW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -948,8 +979,10 @@ impl<'a> _RWRNMSKW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TWRNMSK`"]
|
||||
pub enum TWRNMSKW {
|
||||
#[doc = "Tx Warning Interrupt disabled."] _0,
|
||||
#[doc = "Tx Warning Interrupt enabled."] _1,
|
||||
#[doc = "Tx Warning Interrupt disabled."]
|
||||
_0,
|
||||
#[doc = "Tx Warning Interrupt enabled."]
|
||||
_1,
|
||||
}
|
||||
impl TWRNMSKW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1004,8 +1037,10 @@ impl<'a> _TWRNMSKW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `LPB`"]
|
||||
pub enum LPBW {
|
||||
#[doc = "Loop Back disabled."] _0,
|
||||
#[doc = "Loop Back enabled."] _1,
|
||||
#[doc = "Loop Back disabled."]
|
||||
_0,
|
||||
#[doc = "Loop Back enabled."]
|
||||
_1,
|
||||
}
|
||||
impl LPBW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1062,7 +1097,8 @@ impl<'a> _LPBW<'a> {
|
|||
pub enum CLKSRCW {
|
||||
#[doc = "The CAN engine clock source is the oscillator clock. Under this condition, the oscillator clock frequency must be lower than the bus clock."]
|
||||
_0,
|
||||
#[doc = "The CAN engine clock source is the peripheral clock."] _1,
|
||||
#[doc = "The CAN engine clock source is the peripheral clock."]
|
||||
_1,
|
||||
}
|
||||
impl CLKSRCW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1117,8 +1153,10 @@ impl<'a> _CLKSRCW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `ERRMSK`"]
|
||||
pub enum ERRMSKW {
|
||||
#[doc = "Error interrupt disabled."] _0,
|
||||
#[doc = "Error interrupt enabled."] _1,
|
||||
#[doc = "Error interrupt disabled."]
|
||||
_0,
|
||||
#[doc = "Error interrupt enabled."]
|
||||
_1,
|
||||
}
|
||||
impl ERRMSKW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1173,8 +1211,10 @@ impl<'a> _ERRMSKW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `BOFFMSK`"]
|
||||
pub enum BOFFMSKW {
|
||||
#[doc = "Bus Off interrupt disabled."] _0,
|
||||
#[doc = "Bus Off interrupt enabled."] _1,
|
||||
#[doc = "Bus Off interrupt disabled."]
|
||||
_0,
|
||||
#[doc = "Bus Off interrupt enabled."]
|
||||
_1,
|
||||
}
|
||||
impl BOFFMSKW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
|
|||
|
|
@ -45,10 +45,14 @@ impl super::CTRL1_PN {
|
|||
#[doc = "Possible values of the field `FCS`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum FCSR {
|
||||
#[doc = "Message ID filtering only"] _00,
|
||||
#[doc = "Message ID filtering and payload filtering"] _01,
|
||||
#[doc = "Message ID filtering occurring a specified number of times."] _10,
|
||||
#[doc = "Message ID filtering and payload filtering a specified number of times"] _11,
|
||||
#[doc = "Message ID filtering only"]
|
||||
_00,
|
||||
#[doc = "Message ID filtering and payload filtering"]
|
||||
_01,
|
||||
#[doc = "Message ID filtering occurring a specified number of times."]
|
||||
_10,
|
||||
#[doc = "Message ID filtering and payload filtering a specified number of times"]
|
||||
_11,
|
||||
}
|
||||
impl FCSR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
|
|
@ -97,9 +101,12 @@ impl FCSR {
|
|||
#[doc = "Possible values of the field `IDFS`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum IDFSR {
|
||||
#[doc = "Match upon a ID contents against an exact target value"] _00,
|
||||
#[doc = "Match upon a ID value greater than or equal to a specified target value"] _01,
|
||||
#[doc = "Match upon a ID value smaller than or equal to a specified target value"] _10,
|
||||
#[doc = "Match upon a ID contents against an exact target value"]
|
||||
_00,
|
||||
#[doc = "Match upon a ID value greater than or equal to a specified target value"]
|
||||
_01,
|
||||
#[doc = "Match upon a ID value smaller than or equal to a specified target value"]
|
||||
_10,
|
||||
#[doc = "Match upon a ID value inside a range, greater than or equal to a specified lower limit and smaller than or equal a specified upper limit"]
|
||||
_11,
|
||||
}
|
||||
|
|
@ -150,9 +157,12 @@ impl IDFSR {
|
|||
#[doc = "Possible values of the field `PLFS`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum PLFSR {
|
||||
#[doc = "Match upon a payload contents against an exact target value"] _00,
|
||||
#[doc = "Match upon a payload value greater than or equal to a specified target value"] _01,
|
||||
#[doc = "Match upon a payload value smaller than or equal to a specified target value"] _10,
|
||||
#[doc = "Match upon a payload contents against an exact target value"]
|
||||
_00,
|
||||
#[doc = "Match upon a payload value greater than or equal to a specified target value"]
|
||||
_01,
|
||||
#[doc = "Match upon a payload value smaller than or equal to a specified target value"]
|
||||
_10,
|
||||
#[doc = "Match upon a payload value inside a range, greater than or equal to a specified lower limit and smaller than or equal a specified upper limit"]
|
||||
_11,
|
||||
}
|
||||
|
|
@ -209,7 +219,8 @@ pub enum NMATCHR {
|
|||
_00000010,
|
||||
#[doc = "Received message must match the predefined filtering criteria for ID and/or PL 255 times before generating a wake up event."]
|
||||
_11111111,
|
||||
#[doc = r" Reserved"] _Reserved(u8),
|
||||
#[doc = r" Reserved"]
|
||||
_Reserved(u8),
|
||||
}
|
||||
impl NMATCHR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
|
|
@ -252,8 +263,10 @@ impl NMATCHR {
|
|||
#[doc = "Possible values of the field `WUMF_MSK`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WUMF_MSKR {
|
||||
#[doc = "Wake up match event is disabled"] _0,
|
||||
#[doc = "Wake up match event is enabled"] _1,
|
||||
#[doc = "Wake up match event is disabled"]
|
||||
_0,
|
||||
#[doc = "Wake up match event is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl WUMF_MSKR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -297,8 +310,10 @@ impl WUMF_MSKR {
|
|||
#[doc = "Possible values of the field `WTOF_MSK`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WTOF_MSKR {
|
||||
#[doc = "Timeout wake up event is disabled"] _0,
|
||||
#[doc = "Timeout wake up event is enabled"] _1,
|
||||
#[doc = "Timeout wake up event is disabled"]
|
||||
_0,
|
||||
#[doc = "Timeout wake up event is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl WTOF_MSKR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -341,10 +356,14 @@ impl WTOF_MSKR {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `FCS`"]
|
||||
pub enum FCSW {
|
||||
#[doc = "Message ID filtering only"] _00,
|
||||
#[doc = "Message ID filtering and payload filtering"] _01,
|
||||
#[doc = "Message ID filtering occurring a specified number of times."] _10,
|
||||
#[doc = "Message ID filtering and payload filtering a specified number of times"] _11,
|
||||
#[doc = "Message ID filtering only"]
|
||||
_00,
|
||||
#[doc = "Message ID filtering and payload filtering"]
|
||||
_01,
|
||||
#[doc = "Message ID filtering occurring a specified number of times."]
|
||||
_10,
|
||||
#[doc = "Message ID filtering and payload filtering a specified number of times"]
|
||||
_11,
|
||||
}
|
||||
impl FCSW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -403,9 +422,12 @@ impl<'a> _FCSW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `IDFS`"]
|
||||
pub enum IDFSW {
|
||||
#[doc = "Match upon a ID contents against an exact target value"] _00,
|
||||
#[doc = "Match upon a ID value greater than or equal to a specified target value"] _01,
|
||||
#[doc = "Match upon a ID value smaller than or equal to a specified target value"] _10,
|
||||
#[doc = "Match upon a ID contents against an exact target value"]
|
||||
_00,
|
||||
#[doc = "Match upon a ID value greater than or equal to a specified target value"]
|
||||
_01,
|
||||
#[doc = "Match upon a ID value smaller than or equal to a specified target value"]
|
||||
_10,
|
||||
#[doc = "Match upon a ID value inside a range, greater than or equal to a specified lower limit and smaller than or equal a specified upper limit"]
|
||||
_11,
|
||||
}
|
||||
|
|
@ -466,9 +488,12 @@ impl<'a> _IDFSW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `PLFS`"]
|
||||
pub enum PLFSW {
|
||||
#[doc = "Match upon a payload contents against an exact target value"] _00,
|
||||
#[doc = "Match upon a payload value greater than or equal to a specified target value"] _01,
|
||||
#[doc = "Match upon a payload value smaller than or equal to a specified target value"] _10,
|
||||
#[doc = "Match upon a payload contents against an exact target value"]
|
||||
_00,
|
||||
#[doc = "Match upon a payload value greater than or equal to a specified target value"]
|
||||
_01,
|
||||
#[doc = "Match upon a payload value smaller than or equal to a specified target value"]
|
||||
_10,
|
||||
#[doc = "Match upon a payload value inside a range, greater than or equal to a specified lower limit and smaller than or equal a specified upper limit"]
|
||||
_11,
|
||||
}
|
||||
|
|
@ -585,8 +610,10 @@ impl<'a> _NMATCHW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WUMF_MSK`"]
|
||||
pub enum WUMF_MSKW {
|
||||
#[doc = "Wake up match event is disabled"] _0,
|
||||
#[doc = "Wake up match event is enabled"] _1,
|
||||
#[doc = "Wake up match event is disabled"]
|
||||
_0,
|
||||
#[doc = "Wake up match event is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl WUMF_MSKW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -641,8 +668,10 @@ impl<'a> _WUMF_MSKW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WTOF_MSK`"]
|
||||
pub enum WTOF_MSKW {
|
||||
#[doc = "Timeout wake up event is disabled"] _0,
|
||||
#[doc = "Timeout wake up event is enabled"] _1,
|
||||
#[doc = "Timeout wake up event is disabled"]
|
||||
_0,
|
||||
#[doc = "Timeout wake up event is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl WTOF_MSKW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
|
|||
|
|
@ -45,8 +45,10 @@ impl super::CTRL2 {
|
|||
#[doc = "Possible values of the field `EDFLTDIS`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum EDFLTDISR {
|
||||
#[doc = "Edge Filter is enabled."] _0,
|
||||
#[doc = "Edge Filter is disabled."] _1,
|
||||
#[doc = "Edge Filter is enabled."]
|
||||
_0,
|
||||
#[doc = "Edge Filter is disabled."]
|
||||
_1,
|
||||
}
|
||||
impl EDFLTDISR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -90,8 +92,10 @@ impl EDFLTDISR {
|
|||
#[doc = "Possible values of the field `ISOCANFDEN`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ISOCANFDENR {
|
||||
#[doc = "FlexCAN operates using the non-ISO CAN FD protocol."] _0,
|
||||
#[doc = "FlexCAN operates using the ISO CAN FD protocol (ISO 11898-1)."] _1,
|
||||
#[doc = "FlexCAN operates using the non-ISO CAN FD protocol."]
|
||||
_0,
|
||||
#[doc = "FlexCAN operates using the ISO CAN FD protocol (ISO 11898-1)."]
|
||||
_1,
|
||||
}
|
||||
impl ISOCANFDENR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -135,8 +139,10 @@ impl ISOCANFDENR {
|
|||
#[doc = "Possible values of the field `PREXCEN`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum PREXCENR {
|
||||
#[doc = "Protocol Exception is disabled."] _0,
|
||||
#[doc = "Protocol Exception is enabled."] _1,
|
||||
#[doc = "Protocol Exception is disabled."]
|
||||
_0,
|
||||
#[doc = "Protocol Exception is enabled."]
|
||||
_1,
|
||||
}
|
||||
impl PREXCENR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -274,8 +280,10 @@ impl EACENR {
|
|||
#[doc = "Possible values of the field `RRS`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum RRSR {
|
||||
#[doc = "Remote Response Frame is generated."] _0,
|
||||
#[doc = "Remote Request Frame is stored."] _1,
|
||||
#[doc = "Remote Response Frame is generated."]
|
||||
_0,
|
||||
#[doc = "Remote Request Frame is stored."]
|
||||
_1,
|
||||
}
|
||||
impl RRSR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -319,8 +327,10 @@ impl RRSR {
|
|||
#[doc = "Possible values of the field `MRP`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum MRPR {
|
||||
#[doc = "Matching starts from Rx FIFO and continues on Mailboxes."] _0,
|
||||
#[doc = "Matching starts from Mailboxes and continues on Rx FIFO."] _1,
|
||||
#[doc = "Matching starts from Rx FIFO and continues on Mailboxes."]
|
||||
_0,
|
||||
#[doc = "Matching starts from Mailboxes and continues on Rx FIFO."]
|
||||
_1,
|
||||
}
|
||||
impl MRPR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -386,8 +396,10 @@ impl RFFNR {
|
|||
#[doc = "Possible values of the field `BOFFDONEMSK`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum BOFFDONEMSKR {
|
||||
#[doc = "Bus Off Done interrupt disabled."] _0,
|
||||
#[doc = "Bus Off Done interrupt enabled."] _1,
|
||||
#[doc = "Bus Off Done interrupt disabled."]
|
||||
_0,
|
||||
#[doc = "Bus Off Done interrupt enabled."]
|
||||
_1,
|
||||
}
|
||||
impl BOFFDONEMSKR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -431,8 +443,10 @@ impl BOFFDONEMSKR {
|
|||
#[doc = "Possible values of the field `ERRMSK_FAST`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ERRMSK_FASTR {
|
||||
#[doc = "ERRINT_FAST Error interrupt disabled."] _0,
|
||||
#[doc = "ERRINT_FAST Error interrupt enabled."] _1,
|
||||
#[doc = "ERRINT_FAST Error interrupt disabled."]
|
||||
_0,
|
||||
#[doc = "ERRINT_FAST Error interrupt enabled."]
|
||||
_1,
|
||||
}
|
||||
impl ERRMSK_FASTR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -475,8 +489,10 @@ impl ERRMSK_FASTR {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `EDFLTDIS`"]
|
||||
pub enum EDFLTDISW {
|
||||
#[doc = "Edge Filter is enabled."] _0,
|
||||
#[doc = "Edge Filter is disabled."] _1,
|
||||
#[doc = "Edge Filter is enabled."]
|
||||
_0,
|
||||
#[doc = "Edge Filter is disabled."]
|
||||
_1,
|
||||
}
|
||||
impl EDFLTDISW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -531,8 +547,10 @@ impl<'a> _EDFLTDISW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `ISOCANFDEN`"]
|
||||
pub enum ISOCANFDENW {
|
||||
#[doc = "FlexCAN operates using the non-ISO CAN FD protocol."] _0,
|
||||
#[doc = "FlexCAN operates using the ISO CAN FD protocol (ISO 11898-1)."] _1,
|
||||
#[doc = "FlexCAN operates using the non-ISO CAN FD protocol."]
|
||||
_0,
|
||||
#[doc = "FlexCAN operates using the ISO CAN FD protocol (ISO 11898-1)."]
|
||||
_1,
|
||||
}
|
||||
impl ISOCANFDENW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -587,8 +605,10 @@ impl<'a> _ISOCANFDENW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `PREXCEN`"]
|
||||
pub enum PREXCENW {
|
||||
#[doc = "Protocol Exception is disabled."] _0,
|
||||
#[doc = "Protocol Exception is enabled."] _1,
|
||||
#[doc = "Protocol Exception is disabled."]
|
||||
_0,
|
||||
#[doc = "Protocol Exception is enabled."]
|
||||
_1,
|
||||
}
|
||||
impl PREXCENW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -759,8 +779,10 @@ impl<'a> _EACENW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `RRS`"]
|
||||
pub enum RRSW {
|
||||
#[doc = "Remote Response Frame is generated."] _0,
|
||||
#[doc = "Remote Request Frame is stored."] _1,
|
||||
#[doc = "Remote Response Frame is generated."]
|
||||
_0,
|
||||
#[doc = "Remote Request Frame is stored."]
|
||||
_1,
|
||||
}
|
||||
impl RRSW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -815,8 +837,10 @@ impl<'a> _RRSW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `MRP`"]
|
||||
pub enum MRPW {
|
||||
#[doc = "Matching starts from Rx FIFO and continues on Mailboxes."] _0,
|
||||
#[doc = "Matching starts from Mailboxes and continues on Rx FIFO."] _1,
|
||||
#[doc = "Matching starts from Rx FIFO and continues on Mailboxes."]
|
||||
_0,
|
||||
#[doc = "Matching starts from Mailboxes and continues on Rx FIFO."]
|
||||
_1,
|
||||
}
|
||||
impl MRPW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -901,8 +925,10 @@ impl<'a> _RFFNW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `BOFFDONEMSK`"]
|
||||
pub enum BOFFDONEMSKW {
|
||||
#[doc = "Bus Off Done interrupt disabled."] _0,
|
||||
#[doc = "Bus Off Done interrupt enabled."] _1,
|
||||
#[doc = "Bus Off Done interrupt disabled."]
|
||||
_0,
|
||||
#[doc = "Bus Off Done interrupt enabled."]
|
||||
_1,
|
||||
}
|
||||
impl BOFFDONEMSKW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -957,8 +983,10 @@ impl<'a> _BOFFDONEMSKW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `ERRMSK_FAST`"]
|
||||
pub enum ERRMSK_FASTW {
|
||||
#[doc = "ERRINT_FAST Error interrupt disabled."] _0,
|
||||
#[doc = "ERRINT_FAST Error interrupt enabled."] _1,
|
||||
#[doc = "ERRINT_FAST Error interrupt disabled."]
|
||||
_0,
|
||||
#[doc = "ERRINT_FAST Error interrupt enabled."]
|
||||
_1,
|
||||
}
|
||||
impl ERRMSK_FASTW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
|
|||
|
|
@ -45,8 +45,10 @@ impl super::ESR1 {
|
|||
#[doc = "Possible values of the field `ERRINT`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ERRINTR {
|
||||
#[doc = "No such occurrence."] _0,
|
||||
#[doc = "Indicates setting of any Error Bit in the Error and Status Register."] _1,
|
||||
#[doc = "No such occurrence."]
|
||||
_0,
|
||||
#[doc = "Indicates setting of any Error Bit in the Error and Status Register."]
|
||||
_1,
|
||||
}
|
||||
impl ERRINTR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -90,8 +92,10 @@ impl ERRINTR {
|
|||
#[doc = "Possible values of the field `BOFFINT`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum BOFFINTR {
|
||||
#[doc = "No such occurrence."] _0,
|
||||
#[doc = "FlexCAN module entered Bus Off state."] _1,
|
||||
#[doc = "No such occurrence."]
|
||||
_0,
|
||||
#[doc = "FlexCAN module entered Bus Off state."]
|
||||
_1,
|
||||
}
|
||||
impl BOFFINTR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -135,8 +139,10 @@ impl BOFFINTR {
|
|||
#[doc = "Possible values of the field `RX`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum RXR {
|
||||
#[doc = "FlexCAN is not receiving a message."] _0,
|
||||
#[doc = "FlexCAN is receiving a message."] _1,
|
||||
#[doc = "FlexCAN is not receiving a message."]
|
||||
_0,
|
||||
#[doc = "FlexCAN is receiving a message."]
|
||||
_1,
|
||||
}
|
||||
impl RXR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -180,10 +186,14 @@ impl RXR {
|
|||
#[doc = "Possible values of the field `FLTCONF`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum FLTCONFR {
|
||||
#[doc = "Error Active"] _00,
|
||||
#[doc = "Error Passive"] _01,
|
||||
#[doc = "Bus Off"] _1X,
|
||||
#[doc = r" Reserved"] _Reserved(u8),
|
||||
#[doc = "Error Active"]
|
||||
_00,
|
||||
#[doc = "Error Passive"]
|
||||
_01,
|
||||
#[doc = "Bus Off"]
|
||||
_1X,
|
||||
#[doc = r" Reserved"]
|
||||
_Reserved(u8),
|
||||
}
|
||||
impl FLTCONFR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
|
|
@ -226,8 +236,10 @@ impl FLTCONFR {
|
|||
#[doc = "Possible values of the field `TX`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TXR {
|
||||
#[doc = "FlexCAN is not transmitting a message."] _0,
|
||||
#[doc = "FlexCAN is transmitting a message."] _1,
|
||||
#[doc = "FlexCAN is not transmitting a message."]
|
||||
_0,
|
||||
#[doc = "FlexCAN is transmitting a message."]
|
||||
_1,
|
||||
}
|
||||
impl TXR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -271,8 +283,10 @@ impl TXR {
|
|||
#[doc = "Possible values of the field `IDLE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum IDLER {
|
||||
#[doc = "No such occurrence."] _0,
|
||||
#[doc = "CAN bus is now IDLE."] _1,
|
||||
#[doc = "No such occurrence."]
|
||||
_0,
|
||||
#[doc = "CAN bus is now IDLE."]
|
||||
_1,
|
||||
}
|
||||
impl IDLER {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -316,8 +330,10 @@ impl IDLER {
|
|||
#[doc = "Possible values of the field `RXWRN`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum RXWRNR {
|
||||
#[doc = "No such occurrence."] _0,
|
||||
#[doc = "RXERRCNT is greater than or equal to 96."] _1,
|
||||
#[doc = "No such occurrence."]
|
||||
_0,
|
||||
#[doc = "RXERRCNT is greater than or equal to 96."]
|
||||
_1,
|
||||
}
|
||||
impl RXWRNR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -361,8 +377,10 @@ impl RXWRNR {
|
|||
#[doc = "Possible values of the field `TXWRN`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TXWRNR {
|
||||
#[doc = "No such occurrence."] _0,
|
||||
#[doc = "TXERRCNT is greater than or equal to 96."] _1,
|
||||
#[doc = "No such occurrence."]
|
||||
_0,
|
||||
#[doc = "TXERRCNT is greater than or equal to 96."]
|
||||
_1,
|
||||
}
|
||||
impl TXWRNR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -406,8 +424,10 @@ impl TXWRNR {
|
|||
#[doc = "Possible values of the field `STFERR`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum STFERRR {
|
||||
#[doc = "No such occurrence."] _0,
|
||||
#[doc = "A Stuffing Error occurred since last read of this register."] _1,
|
||||
#[doc = "No such occurrence."]
|
||||
_0,
|
||||
#[doc = "A Stuffing Error occurred since last read of this register."]
|
||||
_1,
|
||||
}
|
||||
impl STFERRR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -451,8 +471,10 @@ impl STFERRR {
|
|||
#[doc = "Possible values of the field `FRMERR`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum FRMERRR {
|
||||
#[doc = "No such occurrence."] _0,
|
||||
#[doc = "A Form Error occurred since last read of this register."] _1,
|
||||
#[doc = "No such occurrence."]
|
||||
_0,
|
||||
#[doc = "A Form Error occurred since last read of this register."]
|
||||
_1,
|
||||
}
|
||||
impl FRMERRR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -496,8 +518,10 @@ impl FRMERRR {
|
|||
#[doc = "Possible values of the field `CRCERR`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum CRCERRR {
|
||||
#[doc = "No such occurrence."] _0,
|
||||
#[doc = "A CRC error occurred since last read of this register."] _1,
|
||||
#[doc = "No such occurrence."]
|
||||
_0,
|
||||
#[doc = "A CRC error occurred since last read of this register."]
|
||||
_1,
|
||||
}
|
||||
impl CRCERRR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -541,8 +565,10 @@ impl CRCERRR {
|
|||
#[doc = "Possible values of the field `ACKERR`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ACKERRR {
|
||||
#[doc = "No such occurrence."] _0,
|
||||
#[doc = "An ACK error occurred since last read of this register."] _1,
|
||||
#[doc = "No such occurrence."]
|
||||
_0,
|
||||
#[doc = "An ACK error occurred since last read of this register."]
|
||||
_1,
|
||||
}
|
||||
impl ACKERRR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -586,8 +612,10 @@ impl ACKERRR {
|
|||
#[doc = "Possible values of the field `BIT0ERR`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum BIT0ERRR {
|
||||
#[doc = "No such occurrence."] _0,
|
||||
#[doc = "At least one bit sent as dominant is received as recessive."] _1,
|
||||
#[doc = "No such occurrence."]
|
||||
_0,
|
||||
#[doc = "At least one bit sent as dominant is received as recessive."]
|
||||
_1,
|
||||
}
|
||||
impl BIT0ERRR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -631,8 +659,10 @@ impl BIT0ERRR {
|
|||
#[doc = "Possible values of the field `BIT1ERR`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum BIT1ERRR {
|
||||
#[doc = "No such occurrence."] _0,
|
||||
#[doc = "At least one bit sent as recessive is received as dominant."] _1,
|
||||
#[doc = "No such occurrence."]
|
||||
_0,
|
||||
#[doc = "At least one bit sent as recessive is received as dominant."]
|
||||
_1,
|
||||
}
|
||||
impl BIT1ERRR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -676,7 +706,8 @@ impl BIT1ERRR {
|
|||
#[doc = "Possible values of the field `RWRNINT`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum RWRNINTR {
|
||||
#[doc = "No such occurrence."] _0,
|
||||
#[doc = "No such occurrence."]
|
||||
_0,
|
||||
#[doc = "The Rx error counter transitioned from less than 96 to greater than or equal to 96."]
|
||||
_1,
|
||||
}
|
||||
|
|
@ -722,7 +753,8 @@ impl RWRNINTR {
|
|||
#[doc = "Possible values of the field `TWRNINT`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TWRNINTR {
|
||||
#[doc = "No such occurrence."] _0,
|
||||
#[doc = "No such occurrence."]
|
||||
_0,
|
||||
#[doc = "The Tx error counter transitioned from less than 96 to greater than or equal to 96."]
|
||||
_1,
|
||||
}
|
||||
|
|
@ -768,8 +800,10 @@ impl TWRNINTR {
|
|||
#[doc = "Possible values of the field `SYNCH`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SYNCHR {
|
||||
#[doc = "FlexCAN is not synchronized to the CAN bus."] _0,
|
||||
#[doc = "FlexCAN is synchronized to the CAN bus."] _1,
|
||||
#[doc = "FlexCAN is not synchronized to the CAN bus."]
|
||||
_0,
|
||||
#[doc = "FlexCAN is synchronized to the CAN bus."]
|
||||
_1,
|
||||
}
|
||||
impl SYNCHR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -813,8 +847,10 @@ impl SYNCHR {
|
|||
#[doc = "Possible values of the field `BOFFDONEINT`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum BOFFDONEINTR {
|
||||
#[doc = "No such occurrence."] _0,
|
||||
#[doc = "FlexCAN module has completed Bus Off process."] _1,
|
||||
#[doc = "No such occurrence."]
|
||||
_0,
|
||||
#[doc = "FlexCAN module has completed Bus Off process."]
|
||||
_1,
|
||||
}
|
||||
impl BOFFDONEINTR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -858,7 +894,8 @@ impl BOFFDONEINTR {
|
|||
#[doc = "Possible values of the field `ERRINT_FAST`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ERRINT_FASTR {
|
||||
#[doc = "No such occurrence."] _0,
|
||||
#[doc = "No such occurrence."]
|
||||
_0,
|
||||
#[doc = "Indicates setting of any Error Bit detected in the Data Phase of CAN FD frames with the BRS bit set."]
|
||||
_1,
|
||||
}
|
||||
|
|
@ -904,8 +941,10 @@ impl ERRINT_FASTR {
|
|||
#[doc = "Possible values of the field `ERROVR`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ERROVRR {
|
||||
#[doc = "Overrun has not occurred."] _0,
|
||||
#[doc = "Overrun has occurred."] _1,
|
||||
#[doc = "Overrun has not occurred."]
|
||||
_0,
|
||||
#[doc = "Overrun has occurred."]
|
||||
_1,
|
||||
}
|
||||
impl ERROVRR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -949,8 +988,10 @@ impl ERROVRR {
|
|||
#[doc = "Possible values of the field `STFERR_FAST`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum STFERR_FASTR {
|
||||
#[doc = "No such occurrence."] _0,
|
||||
#[doc = "A Stuffing Error occurred since last read of this register."] _1,
|
||||
#[doc = "No such occurrence."]
|
||||
_0,
|
||||
#[doc = "A Stuffing Error occurred since last read of this register."]
|
||||
_1,
|
||||
}
|
||||
impl STFERR_FASTR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -994,8 +1035,10 @@ impl STFERR_FASTR {
|
|||
#[doc = "Possible values of the field `FRMERR_FAST`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum FRMERR_FASTR {
|
||||
#[doc = "No such occurrence."] _0,
|
||||
#[doc = "A Form Error occurred since last read of this register."] _1,
|
||||
#[doc = "No such occurrence."]
|
||||
_0,
|
||||
#[doc = "A Form Error occurred since last read of this register."]
|
||||
_1,
|
||||
}
|
||||
impl FRMERR_FASTR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -1039,8 +1082,10 @@ impl FRMERR_FASTR {
|
|||
#[doc = "Possible values of the field `CRCERR_FAST`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum CRCERR_FASTR {
|
||||
#[doc = "No such occurrence."] _0,
|
||||
#[doc = "A CRC error occurred since last read of this register."] _1,
|
||||
#[doc = "No such occurrence."]
|
||||
_0,
|
||||
#[doc = "A CRC error occurred since last read of this register."]
|
||||
_1,
|
||||
}
|
||||
impl CRCERR_FASTR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -1084,8 +1129,10 @@ impl CRCERR_FASTR {
|
|||
#[doc = "Possible values of the field `BIT0ERR_FAST`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum BIT0ERR_FASTR {
|
||||
#[doc = "No such occurrence."] _0,
|
||||
#[doc = "At least one bit sent as dominant is received as recessive."] _1,
|
||||
#[doc = "No such occurrence."]
|
||||
_0,
|
||||
#[doc = "At least one bit sent as dominant is received as recessive."]
|
||||
_1,
|
||||
}
|
||||
impl BIT0ERR_FASTR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -1129,8 +1176,10 @@ impl BIT0ERR_FASTR {
|
|||
#[doc = "Possible values of the field `BIT1ERR_FAST`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum BIT1ERR_FASTR {
|
||||
#[doc = "No such occurrence."] _0,
|
||||
#[doc = "At least one bit sent as recessive is received as dominant."] _1,
|
||||
#[doc = "No such occurrence."]
|
||||
_0,
|
||||
#[doc = "At least one bit sent as recessive is received as dominant."]
|
||||
_1,
|
||||
}
|
||||
impl BIT1ERR_FASTR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -1173,8 +1222,10 @@ impl BIT1ERR_FASTR {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `ERRINT`"]
|
||||
pub enum ERRINTW {
|
||||
#[doc = "No such occurrence."] _0,
|
||||
#[doc = "Indicates setting of any Error Bit in the Error and Status Register."] _1,
|
||||
#[doc = "No such occurrence."]
|
||||
_0,
|
||||
#[doc = "Indicates setting of any Error Bit in the Error and Status Register."]
|
||||
_1,
|
||||
}
|
||||
impl ERRINTW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1229,8 +1280,10 @@ impl<'a> _ERRINTW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `BOFFINT`"]
|
||||
pub enum BOFFINTW {
|
||||
#[doc = "No such occurrence."] _0,
|
||||
#[doc = "FlexCAN module entered Bus Off state."] _1,
|
||||
#[doc = "No such occurrence."]
|
||||
_0,
|
||||
#[doc = "FlexCAN module entered Bus Off state."]
|
||||
_1,
|
||||
}
|
||||
impl BOFFINTW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1285,7 +1338,8 @@ impl<'a> _BOFFINTW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `RWRNINT`"]
|
||||
pub enum RWRNINTW {
|
||||
#[doc = "No such occurrence."] _0,
|
||||
#[doc = "No such occurrence."]
|
||||
_0,
|
||||
#[doc = "The Rx error counter transitioned from less than 96 to greater than or equal to 96."]
|
||||
_1,
|
||||
}
|
||||
|
|
@ -1342,7 +1396,8 @@ impl<'a> _RWRNINTW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TWRNINT`"]
|
||||
pub enum TWRNINTW {
|
||||
#[doc = "No such occurrence."] _0,
|
||||
#[doc = "No such occurrence."]
|
||||
_0,
|
||||
#[doc = "The Tx error counter transitioned from less than 96 to greater than or equal to 96."]
|
||||
_1,
|
||||
}
|
||||
|
|
@ -1399,8 +1454,10 @@ impl<'a> _TWRNINTW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `BOFFDONEINT`"]
|
||||
pub enum BOFFDONEINTW {
|
||||
#[doc = "No such occurrence."] _0,
|
||||
#[doc = "FlexCAN module has completed Bus Off process."] _1,
|
||||
#[doc = "No such occurrence."]
|
||||
_0,
|
||||
#[doc = "FlexCAN module has completed Bus Off process."]
|
||||
_1,
|
||||
}
|
||||
impl BOFFDONEINTW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1455,7 +1512,8 @@ impl<'a> _BOFFDONEINTW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `ERRINT_FAST`"]
|
||||
pub enum ERRINT_FASTW {
|
||||
#[doc = "No such occurrence."] _0,
|
||||
#[doc = "No such occurrence."]
|
||||
_0,
|
||||
#[doc = "Indicates setting of any Error Bit detected in the Data Phase of CAN FD frames with the BRS bit set."]
|
||||
_1,
|
||||
}
|
||||
|
|
@ -1512,8 +1570,10 @@ impl<'a> _ERRINT_FASTW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `ERROVR`"]
|
||||
pub enum ERROVRW {
|
||||
#[doc = "Overrun has not occurred."] _0,
|
||||
#[doc = "Overrun has occurred."] _1,
|
||||
#[doc = "Overrun has not occurred."]
|
||||
_0,
|
||||
#[doc = "Overrun has occurred."]
|
||||
_1,
|
||||
}
|
||||
impl ERROVRW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
|
|||
|
|
@ -14,7 +14,8 @@ impl super::ESR2 {
|
|||
#[doc = "Possible values of the field `IMB`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum IMBR {
|
||||
#[doc = "If ESR2[VPS] is asserted, the ESR2[LPTM] is not an inactive Mailbox."] _0,
|
||||
#[doc = "If ESR2[VPS] is asserted, the ESR2[LPTM] is not an inactive Mailbox."]
|
||||
_0,
|
||||
#[doc = "If ESR2[VPS] is asserted, there is at least one inactive Mailbox. LPTM content is the number of the first one."]
|
||||
_1,
|
||||
}
|
||||
|
|
@ -60,8 +61,10 @@ impl IMBR {
|
|||
#[doc = "Possible values of the field `VPS`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum VPSR {
|
||||
#[doc = "Contents of IMB and LPTM are invalid."] _0,
|
||||
#[doc = "Contents of IMB and LPTM are valid."] _1,
|
||||
#[doc = "Contents of IMB and LPTM are invalid."]
|
||||
_0,
|
||||
#[doc = "Contents of IMB and LPTM are valid."]
|
||||
_1,
|
||||
}
|
||||
impl VPSR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
|
|||
|
|
@ -67,8 +67,10 @@ impl TDCOFFR {
|
|||
#[doc = "Possible values of the field `TDCFAIL`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TDCFAILR {
|
||||
#[doc = "Measured loop delay is in range."] _0,
|
||||
#[doc = "Measured loop delay is out of range."] _1,
|
||||
#[doc = "Measured loop delay is in range."]
|
||||
_0,
|
||||
#[doc = "Measured loop delay is out of range."]
|
||||
_1,
|
||||
}
|
||||
impl TDCFAILR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -112,8 +114,10 @@ impl TDCFAILR {
|
|||
#[doc = "Possible values of the field `TDCEN`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TDCENR {
|
||||
#[doc = "TDC is disabled"] _0,
|
||||
#[doc = "TDC is enabled"] _1,
|
||||
#[doc = "TDC is disabled"]
|
||||
_0,
|
||||
#[doc = "TDC is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl TDCENR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -157,10 +161,14 @@ impl TDCENR {
|
|||
#[doc = "Possible values of the field `MBDSR0`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum MBDSR0R {
|
||||
#[doc = "Selects 8 bytes per Message Buffer."] _00,
|
||||
#[doc = "Selects 16 bytes per Message Buffer."] _01,
|
||||
#[doc = "Selects 32 bytes per Message Buffer."] _10,
|
||||
#[doc = "Selects 64 bytes per Message Buffer."] _11,
|
||||
#[doc = "Selects 8 bytes per Message Buffer."]
|
||||
_00,
|
||||
#[doc = "Selects 16 bytes per Message Buffer."]
|
||||
_01,
|
||||
#[doc = "Selects 32 bytes per Message Buffer."]
|
||||
_10,
|
||||
#[doc = "Selects 64 bytes per Message Buffer."]
|
||||
_11,
|
||||
}
|
||||
impl MBDSR0R {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
|
|
@ -209,8 +217,10 @@ impl MBDSR0R {
|
|||
#[doc = "Possible values of the field `FDRATE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum FDRATER {
|
||||
#[doc = "Transmit a frame in nominal rate. The BRS bit in the Tx MB has no effect."] _0,
|
||||
#[doc = "Transmit a frame with bit rate switching if the BRS bit in the Tx MB is recessive."] _1,
|
||||
#[doc = "Transmit a frame in nominal rate. The BRS bit in the Tx MB has no effect."]
|
||||
_0,
|
||||
#[doc = "Transmit a frame with bit rate switching if the BRS bit in the Tx MB is recessive."]
|
||||
_1,
|
||||
}
|
||||
impl FDRATER {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -268,8 +278,10 @@ impl<'a> _TDCOFFW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TDCFAIL`"]
|
||||
pub enum TDCFAILW {
|
||||
#[doc = "Measured loop delay is in range."] _0,
|
||||
#[doc = "Measured loop delay is out of range."] _1,
|
||||
#[doc = "Measured loop delay is in range."]
|
||||
_0,
|
||||
#[doc = "Measured loop delay is out of range."]
|
||||
_1,
|
||||
}
|
||||
impl TDCFAILW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -324,8 +336,10 @@ impl<'a> _TDCFAILW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TDCEN`"]
|
||||
pub enum TDCENW {
|
||||
#[doc = "TDC is disabled"] _0,
|
||||
#[doc = "TDC is enabled"] _1,
|
||||
#[doc = "TDC is disabled"]
|
||||
_0,
|
||||
#[doc = "TDC is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl TDCENW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -380,10 +394,14 @@ impl<'a> _TDCENW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `MBDSR0`"]
|
||||
pub enum MBDSR0W {
|
||||
#[doc = "Selects 8 bytes per Message Buffer."] _00,
|
||||
#[doc = "Selects 16 bytes per Message Buffer."] _01,
|
||||
#[doc = "Selects 32 bytes per Message Buffer."] _10,
|
||||
#[doc = "Selects 64 bytes per Message Buffer."] _11,
|
||||
#[doc = "Selects 8 bytes per Message Buffer."]
|
||||
_00,
|
||||
#[doc = "Selects 16 bytes per Message Buffer."]
|
||||
_01,
|
||||
#[doc = "Selects 32 bytes per Message Buffer."]
|
||||
_10,
|
||||
#[doc = "Selects 64 bytes per Message Buffer."]
|
||||
_11,
|
||||
}
|
||||
impl MBDSR0W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -442,8 +460,10 @@ impl<'a> _MBDSR0W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `FDRATE`"]
|
||||
pub enum FDRATEW {
|
||||
#[doc = "Transmit a frame in nominal rate. The BRS bit in the Tx MB has no effect."] _0,
|
||||
#[doc = "Transmit a frame with bit rate switching if the BRS bit in the Tx MB is recessive."] _1,
|
||||
#[doc = "Transmit a frame in nominal rate. The BRS bit in the Tx MB has no effect."]
|
||||
_0,
|
||||
#[doc = "Transmit a frame with bit rate switching if the BRS bit in the Tx MB is recessive."]
|
||||
_1,
|
||||
}
|
||||
impl FDRATEW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
|
|||
|
|
@ -56,8 +56,10 @@ impl FLT_ID1R {
|
|||
#[doc = "Possible values of the field `FLT_RTR`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum FLT_RTRR {
|
||||
#[doc = "Reject remote frame (accept data frame)"] _0,
|
||||
#[doc = "Accept remote frame"] _1,
|
||||
#[doc = "Reject remote frame (accept data frame)"]
|
||||
_0,
|
||||
#[doc = "Accept remote frame"]
|
||||
_1,
|
||||
}
|
||||
impl FLT_RTRR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -101,8 +103,10 @@ impl FLT_RTRR {
|
|||
#[doc = "Possible values of the field `FLT_IDE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum FLT_IDER {
|
||||
#[doc = "Accept standard frame format"] _0,
|
||||
#[doc = "Accept extended frame format"] _1,
|
||||
#[doc = "Accept standard frame format"]
|
||||
_0,
|
||||
#[doc = "Accept extended frame format"]
|
||||
_1,
|
||||
}
|
||||
impl FLT_IDER {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -160,8 +164,10 @@ impl<'a> _FLT_ID1W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `FLT_RTR`"]
|
||||
pub enum FLT_RTRW {
|
||||
#[doc = "Reject remote frame (accept data frame)"] _0,
|
||||
#[doc = "Accept remote frame"] _1,
|
||||
#[doc = "Reject remote frame (accept data frame)"]
|
||||
_0,
|
||||
#[doc = "Accept remote frame"]
|
||||
_1,
|
||||
}
|
||||
impl FLT_RTRW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -216,8 +222,10 @@ impl<'a> _FLT_RTRW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `FLT_IDE`"]
|
||||
pub enum FLT_IDEW {
|
||||
#[doc = "Accept standard frame format"] _0,
|
||||
#[doc = "Accept extended frame format"] _1,
|
||||
#[doc = "Accept standard frame format"]
|
||||
_0,
|
||||
#[doc = "Accept extended frame format"]
|
||||
_1,
|
||||
}
|
||||
impl FLT_IDEW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
|
|||
|
|
@ -56,8 +56,10 @@ impl FLT_ID2_IDMASKR {
|
|||
#[doc = "Possible values of the field `RTR_MSK`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum RTR_MSKR {
|
||||
#[doc = "The corresponding bit in the filter is \"don't care\""] _0,
|
||||
#[doc = "The corresponding bit in the filter is checked"] _1,
|
||||
#[doc = "The corresponding bit in the filter is \"don't care\""]
|
||||
_0,
|
||||
#[doc = "The corresponding bit in the filter is checked"]
|
||||
_1,
|
||||
}
|
||||
impl RTR_MSKR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -101,8 +103,10 @@ impl RTR_MSKR {
|
|||
#[doc = "Possible values of the field `IDE_MSK`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum IDE_MSKR {
|
||||
#[doc = "The corresponding bit in the filter is \"don't care\""] _0,
|
||||
#[doc = "The corresponding bit in the filter is checked"] _1,
|
||||
#[doc = "The corresponding bit in the filter is \"don't care\""]
|
||||
_0,
|
||||
#[doc = "The corresponding bit in the filter is checked"]
|
||||
_1,
|
||||
}
|
||||
impl IDE_MSKR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -160,8 +164,10 @@ impl<'a> _FLT_ID2_IDMASKW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `RTR_MSK`"]
|
||||
pub enum RTR_MSKW {
|
||||
#[doc = "The corresponding bit in the filter is \"don't care\""] _0,
|
||||
#[doc = "The corresponding bit in the filter is checked"] _1,
|
||||
#[doc = "The corresponding bit in the filter is \"don't care\""]
|
||||
_0,
|
||||
#[doc = "The corresponding bit in the filter is checked"]
|
||||
_1,
|
||||
}
|
||||
impl RTR_MSKW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -216,8 +222,10 @@ impl<'a> _RTR_MSKW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `IDE_MSK`"]
|
||||
pub enum IDE_MSKW {
|
||||
#[doc = "The corresponding bit in the filter is \"don't care\""] _0,
|
||||
#[doc = "The corresponding bit in the filter is checked"] _1,
|
||||
#[doc = "The corresponding bit in the filter is \"don't care\""]
|
||||
_0,
|
||||
#[doc = "The corresponding bit in the filter is checked"]
|
||||
_1,
|
||||
}
|
||||
impl IDE_MSKW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
|
|||
|
|
@ -56,11 +56,14 @@ impl MAXMBR {
|
|||
#[doc = "Possible values of the field `IDAM`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum IDAMR {
|
||||
#[doc = "Format A: One full ID (standard and extended) per ID Filter Table element."] _00,
|
||||
#[doc = "Format A: One full ID (standard and extended) per ID Filter Table element."]
|
||||
_00,
|
||||
#[doc = "Format B: Two full standard IDs or two partial 14-bit (standard and extended) IDs per ID Filter Table element."]
|
||||
_01,
|
||||
#[doc = "Format C: Four partial 8-bit Standard IDs per ID Filter Table element."] _10,
|
||||
#[doc = "Format D: All frames rejected."] _11,
|
||||
#[doc = "Format C: Four partial 8-bit Standard IDs per ID Filter Table element."]
|
||||
_10,
|
||||
#[doc = "Format D: All frames rejected."]
|
||||
_11,
|
||||
}
|
||||
impl IDAMR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
|
|
@ -156,8 +159,10 @@ impl FDENR {
|
|||
#[doc = "Possible values of the field `AEN`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum AENR {
|
||||
#[doc = "Abort disabled."] _0,
|
||||
#[doc = "Abort enabled."] _1,
|
||||
#[doc = "Abort disabled."]
|
||||
_0,
|
||||
#[doc = "Abort enabled."]
|
||||
_1,
|
||||
}
|
||||
impl AENR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -201,8 +206,10 @@ impl AENR {
|
|||
#[doc = "Possible values of the field `LPRIOEN`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum LPRIOENR {
|
||||
#[doc = "Local Priority disabled."] _0,
|
||||
#[doc = "Local Priority enabled."] _1,
|
||||
#[doc = "Local Priority disabled."]
|
||||
_0,
|
||||
#[doc = "Local Priority enabled."]
|
||||
_1,
|
||||
}
|
||||
impl LPRIOENR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -246,8 +253,10 @@ impl LPRIOENR {
|
|||
#[doc = "Possible values of the field `PNET_EN`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum PNET_ENR {
|
||||
#[doc = "Pretended Networking mode is disabled."] _0,
|
||||
#[doc = "Pretended Networking mode is enabled."] _1,
|
||||
#[doc = "Pretended Networking mode is disabled."]
|
||||
_0,
|
||||
#[doc = "Pretended Networking mode is enabled."]
|
||||
_1,
|
||||
}
|
||||
impl PNET_ENR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -291,8 +300,10 @@ impl PNET_ENR {
|
|||
#[doc = "Possible values of the field `DMA`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum DMAR {
|
||||
#[doc = "DMA feature for RX FIFO disabled."] _0,
|
||||
#[doc = "DMA feature for RX FIFO enabled."] _1,
|
||||
#[doc = "DMA feature for RX FIFO disabled."]
|
||||
_0,
|
||||
#[doc = "DMA feature for RX FIFO enabled."]
|
||||
_1,
|
||||
}
|
||||
impl DMAR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -338,7 +349,8 @@ impl DMAR {
|
|||
pub enum IRMQR {
|
||||
#[doc = "Individual Rx masking and queue feature are disabled. For backward compatibility with legacy applications, the reading of C/S word locks the MB even if it is EMPTY."]
|
||||
_0,
|
||||
#[doc = "Individual Rx masking and queue feature are enabled."] _1,
|
||||
#[doc = "Individual Rx masking and queue feature are enabled."]
|
||||
_1,
|
||||
}
|
||||
impl IRMQR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -382,8 +394,10 @@ impl IRMQR {
|
|||
#[doc = "Possible values of the field `SRXDIS`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SRXDISR {
|
||||
#[doc = "Self reception enabled."] _0,
|
||||
#[doc = "Self reception disabled."] _1,
|
||||
#[doc = "Self reception enabled."]
|
||||
_0,
|
||||
#[doc = "Self reception disabled."]
|
||||
_1,
|
||||
}
|
||||
impl SRXDISR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -427,8 +441,10 @@ impl SRXDISR {
|
|||
#[doc = "Possible values of the field `LPMACK`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum LPMACKR {
|
||||
#[doc = "FlexCAN is not in a low-power mode."] _0,
|
||||
#[doc = "FlexCAN is in a low-power mode."] _1,
|
||||
#[doc = "FlexCAN is not in a low-power mode."]
|
||||
_0,
|
||||
#[doc = "FlexCAN is in a low-power mode."]
|
||||
_1,
|
||||
}
|
||||
impl LPMACKR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -540,8 +556,10 @@ impl SUPVR {
|
|||
#[doc = "Possible values of the field `FRZACK`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum FRZACKR {
|
||||
#[doc = "FlexCAN not in Freeze mode, prescaler running."] _0,
|
||||
#[doc = "FlexCAN in Freeze mode, prescaler stopped."] _1,
|
||||
#[doc = "FlexCAN not in Freeze mode, prescaler running."]
|
||||
_0,
|
||||
#[doc = "FlexCAN in Freeze mode, prescaler stopped."]
|
||||
_1,
|
||||
}
|
||||
impl FRZACKR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -585,8 +603,10 @@ impl FRZACKR {
|
|||
#[doc = "Possible values of the field `SOFTRST`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SOFTRSTR {
|
||||
#[doc = "No reset request."] _0,
|
||||
#[doc = "Resets the registers affected by soft reset."] _1,
|
||||
#[doc = "No reset request."]
|
||||
_0,
|
||||
#[doc = "Resets the registers affected by soft reset."]
|
||||
_1,
|
||||
}
|
||||
impl SOFTRSTR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -630,8 +650,10 @@ impl SOFTRSTR {
|
|||
#[doc = "Possible values of the field `NOTRDY`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum NOTRDYR {
|
||||
#[doc = "FlexCAN module is either in Normal mode, Listen-Only mode or Loop-Back mode."] _0,
|
||||
#[doc = r" Reserved"] _Reserved(bool),
|
||||
#[doc = "FlexCAN module is either in Normal mode, Listen-Only mode or Loop-Back mode."]
|
||||
_0,
|
||||
#[doc = r" Reserved"]
|
||||
_Reserved(bool),
|
||||
}
|
||||
impl NOTRDYR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -670,8 +692,10 @@ impl NOTRDYR {
|
|||
#[doc = "Possible values of the field `HALT`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum HALTR {
|
||||
#[doc = "No Freeze mode request."] _0,
|
||||
#[doc = "Enters Freeze mode if the FRZ bit is asserted."] _1,
|
||||
#[doc = "No Freeze mode request."]
|
||||
_0,
|
||||
#[doc = "Enters Freeze mode if the FRZ bit is asserted."]
|
||||
_1,
|
||||
}
|
||||
impl HALTR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -715,8 +739,10 @@ impl HALTR {
|
|||
#[doc = "Possible values of the field `RFEN`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum RFENR {
|
||||
#[doc = "Rx FIFO not enabled."] _0,
|
||||
#[doc = "Rx FIFO enabled."] _1,
|
||||
#[doc = "Rx FIFO not enabled."]
|
||||
_0,
|
||||
#[doc = "Rx FIFO enabled."]
|
||||
_1,
|
||||
}
|
||||
impl RFENR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -760,8 +786,10 @@ impl RFENR {
|
|||
#[doc = "Possible values of the field `FRZ`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum FRZR {
|
||||
#[doc = "Not enabled to enter Freeze mode."] _0,
|
||||
#[doc = "Enabled to enter Freeze mode."] _1,
|
||||
#[doc = "Not enabled to enter Freeze mode."]
|
||||
_0,
|
||||
#[doc = "Enabled to enter Freeze mode."]
|
||||
_1,
|
||||
}
|
||||
impl FRZR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -805,8 +833,10 @@ impl FRZR {
|
|||
#[doc = "Possible values of the field `MDIS`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum MDISR {
|
||||
#[doc = "Enable the FlexCAN module."] _0,
|
||||
#[doc = "Disable the FlexCAN module."] _1,
|
||||
#[doc = "Enable the FlexCAN module."]
|
||||
_0,
|
||||
#[doc = "Disable the FlexCAN module."]
|
||||
_1,
|
||||
}
|
||||
impl MDISR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -864,11 +894,14 @@ impl<'a> _MAXMBW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `IDAM`"]
|
||||
pub enum IDAMW {
|
||||
#[doc = "Format A: One full ID (standard and extended) per ID Filter Table element."] _00,
|
||||
#[doc = "Format A: One full ID (standard and extended) per ID Filter Table element."]
|
||||
_00,
|
||||
#[doc = "Format B: Two full standard IDs or two partial 14-bit (standard and extended) IDs per ID Filter Table element."]
|
||||
_01,
|
||||
#[doc = "Format C: Four partial 8-bit Standard IDs per ID Filter Table element."] _10,
|
||||
#[doc = "Format D: All frames rejected."] _11,
|
||||
#[doc = "Format C: Four partial 8-bit Standard IDs per ID Filter Table element."]
|
||||
_10,
|
||||
#[doc = "Format D: All frames rejected."]
|
||||
_11,
|
||||
}
|
||||
impl IDAMW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -985,8 +1018,10 @@ impl<'a> _FDENW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `AEN`"]
|
||||
pub enum AENW {
|
||||
#[doc = "Abort disabled."] _0,
|
||||
#[doc = "Abort enabled."] _1,
|
||||
#[doc = "Abort disabled."]
|
||||
_0,
|
||||
#[doc = "Abort enabled."]
|
||||
_1,
|
||||
}
|
||||
impl AENW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1041,8 +1076,10 @@ impl<'a> _AENW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `LPRIOEN`"]
|
||||
pub enum LPRIOENW {
|
||||
#[doc = "Local Priority disabled."] _0,
|
||||
#[doc = "Local Priority enabled."] _1,
|
||||
#[doc = "Local Priority disabled."]
|
||||
_0,
|
||||
#[doc = "Local Priority enabled."]
|
||||
_1,
|
||||
}
|
||||
impl LPRIOENW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1097,8 +1134,10 @@ impl<'a> _LPRIOENW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `PNET_EN`"]
|
||||
pub enum PNET_ENW {
|
||||
#[doc = "Pretended Networking mode is disabled."] _0,
|
||||
#[doc = "Pretended Networking mode is enabled."] _1,
|
||||
#[doc = "Pretended Networking mode is disabled."]
|
||||
_0,
|
||||
#[doc = "Pretended Networking mode is enabled."]
|
||||
_1,
|
||||
}
|
||||
impl PNET_ENW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1153,8 +1192,10 @@ impl<'a> _PNET_ENW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `DMA`"]
|
||||
pub enum DMAW {
|
||||
#[doc = "DMA feature for RX FIFO disabled."] _0,
|
||||
#[doc = "DMA feature for RX FIFO enabled."] _1,
|
||||
#[doc = "DMA feature for RX FIFO disabled."]
|
||||
_0,
|
||||
#[doc = "DMA feature for RX FIFO enabled."]
|
||||
_1,
|
||||
}
|
||||
impl DMAW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1211,7 +1252,8 @@ impl<'a> _DMAW<'a> {
|
|||
pub enum IRMQW {
|
||||
#[doc = "Individual Rx masking and queue feature are disabled. For backward compatibility with legacy applications, the reading of C/S word locks the MB even if it is EMPTY."]
|
||||
_0,
|
||||
#[doc = "Individual Rx masking and queue feature are enabled."] _1,
|
||||
#[doc = "Individual Rx masking and queue feature are enabled."]
|
||||
_1,
|
||||
}
|
||||
impl IRMQW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1266,8 +1308,10 @@ impl<'a> _IRMQW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SRXDIS`"]
|
||||
pub enum SRXDISW {
|
||||
#[doc = "Self reception enabled."] _0,
|
||||
#[doc = "Self reception disabled."] _1,
|
||||
#[doc = "Self reception enabled."]
|
||||
_0,
|
||||
#[doc = "Self reception disabled."]
|
||||
_1,
|
||||
}
|
||||
impl SRXDISW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1403,8 +1447,10 @@ impl<'a> _SUPVW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SOFTRST`"]
|
||||
pub enum SOFTRSTW {
|
||||
#[doc = "No reset request."] _0,
|
||||
#[doc = "Resets the registers affected by soft reset."] _1,
|
||||
#[doc = "No reset request."]
|
||||
_0,
|
||||
#[doc = "Resets the registers affected by soft reset."]
|
||||
_1,
|
||||
}
|
||||
impl SOFTRSTW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1459,8 +1505,10 @@ impl<'a> _SOFTRSTW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `HALT`"]
|
||||
pub enum HALTW {
|
||||
#[doc = "No Freeze mode request."] _0,
|
||||
#[doc = "Enters Freeze mode if the FRZ bit is asserted."] _1,
|
||||
#[doc = "No Freeze mode request."]
|
||||
_0,
|
||||
#[doc = "Enters Freeze mode if the FRZ bit is asserted."]
|
||||
_1,
|
||||
}
|
||||
impl HALTW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1515,8 +1563,10 @@ impl<'a> _HALTW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `RFEN`"]
|
||||
pub enum RFENW {
|
||||
#[doc = "Rx FIFO not enabled."] _0,
|
||||
#[doc = "Rx FIFO enabled."] _1,
|
||||
#[doc = "Rx FIFO not enabled."]
|
||||
_0,
|
||||
#[doc = "Rx FIFO enabled."]
|
||||
_1,
|
||||
}
|
||||
impl RFENW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1571,8 +1621,10 @@ impl<'a> _RFENW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `FRZ`"]
|
||||
pub enum FRZW {
|
||||
#[doc = "Not enabled to enter Freeze mode."] _0,
|
||||
#[doc = "Enabled to enter Freeze mode."] _1,
|
||||
#[doc = "Not enabled to enter Freeze mode."]
|
||||
_0,
|
||||
#[doc = "Enabled to enter Freeze mode."]
|
||||
_1,
|
||||
}
|
||||
impl FRZW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1627,8 +1679,10 @@ impl<'a> _FRZW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `MDIS`"]
|
||||
pub enum MDISW {
|
||||
#[doc = "Enable the FlexCAN module."] _0,
|
||||
#[doc = "Disable the FlexCAN module."] _1,
|
||||
#[doc = "Enable the FlexCAN module."]
|
||||
_0,
|
||||
#[doc = "Disable the FlexCAN module."]
|
||||
_1,
|
||||
}
|
||||
impl MDISW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
|
|||
132
src/can0/mod.rs
132
src/can0/mod.rs
|
|
@ -2,38 +2,63 @@ use vcell::VolatileCell;
|
|||
#[doc = r" Register block"]
|
||||
#[repr(C)]
|
||||
pub struct RegisterBlock {
|
||||
#[doc = "0x00 - Module Configuration Register"] pub mcr: MCR,
|
||||
#[doc = "0x04 - Control 1 register"] pub ctrl1: CTRL1,
|
||||
#[doc = "0x08 - Free Running Timer"] pub timer: TIMER,
|
||||
#[doc = "0x00 - Module Configuration Register"]
|
||||
pub mcr: MCR,
|
||||
#[doc = "0x04 - Control 1 register"]
|
||||
pub ctrl1: CTRL1,
|
||||
#[doc = "0x08 - Free Running Timer"]
|
||||
pub timer: TIMER,
|
||||
_reserved0: [u8; 4usize],
|
||||
#[doc = "0x10 - Rx Mailboxes Global Mask Register"] pub rxmgmask: RXMGMASK,
|
||||
#[doc = "0x14 - Rx 14 Mask register"] pub rx14mask: RX14MASK,
|
||||
#[doc = "0x18 - Rx 15 Mask register"] pub rx15mask: RX15MASK,
|
||||
#[doc = "0x1c - Error Counter"] pub ecr: ECR,
|
||||
#[doc = "0x20 - Error and Status 1 register"] pub esr1: ESR1,
|
||||
#[doc = "0x10 - Rx Mailboxes Global Mask Register"]
|
||||
pub rxmgmask: RXMGMASK,
|
||||
#[doc = "0x14 - Rx 14 Mask register"]
|
||||
pub rx14mask: RX14MASK,
|
||||
#[doc = "0x18 - Rx 15 Mask register"]
|
||||
pub rx15mask: RX15MASK,
|
||||
#[doc = "0x1c - Error Counter"]
|
||||
pub ecr: ECR,
|
||||
#[doc = "0x20 - Error and Status 1 register"]
|
||||
pub esr1: ESR1,
|
||||
_reserved1: [u8; 4usize],
|
||||
#[doc = "0x28 - Interrupt Masks 1 register"] pub imask1: IMASK1,
|
||||
#[doc = "0x28 - Interrupt Masks 1 register"]
|
||||
pub imask1: IMASK1,
|
||||
_reserved2: [u8; 4usize],
|
||||
#[doc = "0x30 - Interrupt Flags 1 register"] pub iflag1: IFLAG1,
|
||||
#[doc = "0x34 - Control 2 register"] pub ctrl2: CTRL2,
|
||||
#[doc = "0x38 - Error and Status 2 register"] pub esr2: ESR2,
|
||||
#[doc = "0x30 - Interrupt Flags 1 register"]
|
||||
pub iflag1: IFLAG1,
|
||||
#[doc = "0x34 - Control 2 register"]
|
||||
pub ctrl2: CTRL2,
|
||||
#[doc = "0x38 - Error and Status 2 register"]
|
||||
pub esr2: ESR2,
|
||||
_reserved3: [u8; 8usize],
|
||||
#[doc = "0x44 - CRC Register"] pub crcr: CRCR,
|
||||
#[doc = "0x48 - Rx FIFO Global Mask register"] pub rxfgmask: RXFGMASK,
|
||||
#[doc = "0x4c - Rx FIFO Information Register"] pub rxfir: RXFIR,
|
||||
#[doc = "0x50 - CAN Bit Timing Register"] pub cbt: CBT,
|
||||
#[doc = "0x44 - CRC Register"]
|
||||
pub crcr: CRCR,
|
||||
#[doc = "0x48 - Rx FIFO Global Mask register"]
|
||||
pub rxfgmask: RXFGMASK,
|
||||
#[doc = "0x4c - Rx FIFO Information Register"]
|
||||
pub rxfir: RXFIR,
|
||||
#[doc = "0x50 - CAN Bit Timing Register"]
|
||||
pub cbt: CBT,
|
||||
_reserved4: [u8; 44usize],
|
||||
#[doc = "0x80 - Embedded RAM"] pub embedded_ram: [EMBEDDEDRAM; 128],
|
||||
#[doc = "0x80 - Embedded RAM"]
|
||||
pub embedded_ram: [EMBEDDEDRAM; 128],
|
||||
_reserved5: [u8; 1536usize],
|
||||
#[doc = "0x880 - Rx Individual Mask Registers"] pub rximr: [RXIMR; 16],
|
||||
#[doc = "0x880 - Rx Individual Mask Registers"]
|
||||
pub rximr: [RXIMR; 16],
|
||||
_reserved6: [u8; 576usize],
|
||||
#[doc = "0xb00 - Pretended Networking Control 1 Register"] pub ctrl1_pn: CTRL1_PN,
|
||||
#[doc = "0xb04 - Pretended Networking Control 2 Register"] pub ctrl2_pn: CTRL2_PN,
|
||||
#[doc = "0xb08 - Pretended Networking Wake Up Match Register"] pub wu_mtc: WU_MTC,
|
||||
#[doc = "0xb0c - Pretended Networking ID Filter 1 Register"] pub flt_id1: FLT_ID1,
|
||||
#[doc = "0xb10 - Pretended Networking DLC Filter Register"] pub flt_dlc: FLT_DLC,
|
||||
#[doc = "0xb14 - Pretended Networking Payload Low Filter 1 Register"] pub pl1_lo: PL1_LO,
|
||||
#[doc = "0xb18 - Pretended Networking Payload High Filter 1 Register"] pub pl1_hi: PL1_HI,
|
||||
#[doc = "0xb00 - Pretended Networking Control 1 Register"]
|
||||
pub ctrl1_pn: CTRL1_PN,
|
||||
#[doc = "0xb04 - Pretended Networking Control 2 Register"]
|
||||
pub ctrl2_pn: CTRL2_PN,
|
||||
#[doc = "0xb08 - Pretended Networking Wake Up Match Register"]
|
||||
pub wu_mtc: WU_MTC,
|
||||
#[doc = "0xb0c - Pretended Networking ID Filter 1 Register"]
|
||||
pub flt_id1: FLT_ID1,
|
||||
#[doc = "0xb10 - Pretended Networking DLC Filter Register"]
|
||||
pub flt_dlc: FLT_DLC,
|
||||
#[doc = "0xb14 - Pretended Networking Payload Low Filter 1 Register"]
|
||||
pub pl1_lo: PL1_LO,
|
||||
#[doc = "0xb18 - Pretended Networking Payload High Filter 1 Register"]
|
||||
pub pl1_hi: PL1_HI,
|
||||
#[doc = "0xb1c - Pretended Networking ID Filter 2 Register / ID Mask Register"]
|
||||
pub flt_id2_idmask: FLT_ID2_IDMASK,
|
||||
#[doc = "0xb20 - Pretended Networking Payload Low Filter 2 Register / Payload Low Mask Register"]
|
||||
|
|
@ -41,26 +66,45 @@ pub struct RegisterBlock {
|
|||
#[doc = "0xb24 - Pretended Networking Payload High Filter 2 low order bits / Payload High Mask Register"]
|
||||
pub pl2_plmask_hi: PL2_PLMASK_HI,
|
||||
_reserved7: [u8; 24usize],
|
||||
#[doc = "0xb40 - Wake Up Message Buffer Register for C/S"] pub wmb0_cs: WMB0_CS,
|
||||
#[doc = "0xb44 - Wake Up Message Buffer Register for ID"] pub wmb0_id: WMB0_ID,
|
||||
#[doc = "0xb48 - Wake Up Message Buffer Register for Data 0-3"] pub wmb0_d03: WMB0_D03,
|
||||
#[doc = "0xb4c - Wake Up Message Buffer Register Data 4-7"] pub wmb0_d47: WMB0_D47,
|
||||
#[doc = "0xb50 - Wake Up Message Buffer Register for C/S"] pub wmb1_cs: WMB1_CS,
|
||||
#[doc = "0xb54 - Wake Up Message Buffer Register for ID"] pub wmb1_id: WMB1_ID,
|
||||
#[doc = "0xb58 - Wake Up Message Buffer Register for Data 0-3"] pub wmb1_d03: WMB1_D03,
|
||||
#[doc = "0xb5c - Wake Up Message Buffer Register Data 4-7"] pub wmb1_d47: WMB1_D47,
|
||||
#[doc = "0xb60 - Wake Up Message Buffer Register for C/S"] pub wmb2_cs: WMB2_CS,
|
||||
#[doc = "0xb64 - Wake Up Message Buffer Register for ID"] pub wmb2_id: WMB2_ID,
|
||||
#[doc = "0xb68 - Wake Up Message Buffer Register for Data 0-3"] pub wmb2_d03: WMB2_D03,
|
||||
#[doc = "0xb6c - Wake Up Message Buffer Register Data 4-7"] pub wmb2_d47: WMB2_D47,
|
||||
#[doc = "0xb70 - Wake Up Message Buffer Register for C/S"] pub wmb3_cs: WMB3_CS,
|
||||
#[doc = "0xb74 - Wake Up Message Buffer Register for ID"] pub wmb3_id: WMB3_ID,
|
||||
#[doc = "0xb78 - Wake Up Message Buffer Register for Data 0-3"] pub wmb3_d03: WMB3_D03,
|
||||
#[doc = "0xb7c - Wake Up Message Buffer Register Data 4-7"] pub wmb3_d47: WMB3_D47,
|
||||
#[doc = "0xb40 - Wake Up Message Buffer Register for C/S"]
|
||||
pub wmb0_cs: WMB0_CS,
|
||||
#[doc = "0xb44 - Wake Up Message Buffer Register for ID"]
|
||||
pub wmb0_id: WMB0_ID,
|
||||
#[doc = "0xb48 - Wake Up Message Buffer Register for Data 0-3"]
|
||||
pub wmb0_d03: WMB0_D03,
|
||||
#[doc = "0xb4c - Wake Up Message Buffer Register Data 4-7"]
|
||||
pub wmb0_d47: WMB0_D47,
|
||||
#[doc = "0xb50 - Wake Up Message Buffer Register for C/S"]
|
||||
pub wmb1_cs: WMB1_CS,
|
||||
#[doc = "0xb54 - Wake Up Message Buffer Register for ID"]
|
||||
pub wmb1_id: WMB1_ID,
|
||||
#[doc = "0xb58 - Wake Up Message Buffer Register for Data 0-3"]
|
||||
pub wmb1_d03: WMB1_D03,
|
||||
#[doc = "0xb5c - Wake Up Message Buffer Register Data 4-7"]
|
||||
pub wmb1_d47: WMB1_D47,
|
||||
#[doc = "0xb60 - Wake Up Message Buffer Register for C/S"]
|
||||
pub wmb2_cs: WMB2_CS,
|
||||
#[doc = "0xb64 - Wake Up Message Buffer Register for ID"]
|
||||
pub wmb2_id: WMB2_ID,
|
||||
#[doc = "0xb68 - Wake Up Message Buffer Register for Data 0-3"]
|
||||
pub wmb2_d03: WMB2_D03,
|
||||
#[doc = "0xb6c - Wake Up Message Buffer Register Data 4-7"]
|
||||
pub wmb2_d47: WMB2_D47,
|
||||
#[doc = "0xb70 - Wake Up Message Buffer Register for C/S"]
|
||||
pub wmb3_cs: WMB3_CS,
|
||||
#[doc = "0xb74 - Wake Up Message Buffer Register for ID"]
|
||||
pub wmb3_id: WMB3_ID,
|
||||
#[doc = "0xb78 - Wake Up Message Buffer Register for Data 0-3"]
|
||||
pub wmb3_d03: WMB3_D03,
|
||||
#[doc = "0xb7c - Wake Up Message Buffer Register Data 4-7"]
|
||||
pub wmb3_d47: WMB3_D47,
|
||||
_reserved8: [u8; 128usize],
|
||||
#[doc = "0xc00 - CAN FD Control Register"] pub fdctrl: FDCTRL,
|
||||
#[doc = "0xc04 - CAN FD Bit Timing Register"] pub fdcbt: FDCBT,
|
||||
#[doc = "0xc08 - CAN FD CRC Register"] pub fdcrc: FDCRC,
|
||||
#[doc = "0xc00 - CAN FD Control Register"]
|
||||
pub fdctrl: FDCTRL,
|
||||
#[doc = "0xc04 - CAN FD Bit Timing Register"]
|
||||
pub fdcbt: FDCBT,
|
||||
#[doc = "0xc08 - CAN FD CRC Register"]
|
||||
pub fdcrc: FDCRC,
|
||||
}
|
||||
#[doc = "Module Configuration Register"]
|
||||
pub struct MCR {
|
||||
|
|
|
|||
|
|
@ -25,8 +25,10 @@ impl DLCR {
|
|||
#[doc = "Possible values of the field `RTR`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum RTRR {
|
||||
#[doc = "Frame is data one (not remote)"] _0,
|
||||
#[doc = "Frame is a remote one"] _1,
|
||||
#[doc = "Frame is data one (not remote)"]
|
||||
_0,
|
||||
#[doc = "Frame is a remote one"]
|
||||
_1,
|
||||
}
|
||||
impl RTRR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -70,8 +72,10 @@ impl RTRR {
|
|||
#[doc = "Possible values of the field `IDE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum IDER {
|
||||
#[doc = "Frame format is standard"] _0,
|
||||
#[doc = "Frame format is extended"] _1,
|
||||
#[doc = "Frame format is standard"]
|
||||
_0,
|
||||
#[doc = "Frame format is extended"]
|
||||
_1,
|
||||
}
|
||||
impl IDER {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
|
|||
|
|
@ -25,8 +25,10 @@ impl DLCR {
|
|||
#[doc = "Possible values of the field `RTR`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum RTRR {
|
||||
#[doc = "Frame is data one (not remote)"] _0,
|
||||
#[doc = "Frame is a remote one"] _1,
|
||||
#[doc = "Frame is data one (not remote)"]
|
||||
_0,
|
||||
#[doc = "Frame is a remote one"]
|
||||
_1,
|
||||
}
|
||||
impl RTRR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -70,8 +72,10 @@ impl RTRR {
|
|||
#[doc = "Possible values of the field `IDE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum IDER {
|
||||
#[doc = "Frame format is standard"] _0,
|
||||
#[doc = "Frame format is extended"] _1,
|
||||
#[doc = "Frame format is standard"]
|
||||
_0,
|
||||
#[doc = "Frame format is extended"]
|
||||
_1,
|
||||
}
|
||||
impl IDER {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
|
|||
|
|
@ -25,8 +25,10 @@ impl DLCR {
|
|||
#[doc = "Possible values of the field `RTR`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum RTRR {
|
||||
#[doc = "Frame is data one (not remote)"] _0,
|
||||
#[doc = "Frame is a remote one"] _1,
|
||||
#[doc = "Frame is data one (not remote)"]
|
||||
_0,
|
||||
#[doc = "Frame is a remote one"]
|
||||
_1,
|
||||
}
|
||||
impl RTRR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -70,8 +72,10 @@ impl RTRR {
|
|||
#[doc = "Possible values of the field `IDE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum IDER {
|
||||
#[doc = "Frame format is standard"] _0,
|
||||
#[doc = "Frame format is extended"] _1,
|
||||
#[doc = "Frame format is standard"]
|
||||
_0,
|
||||
#[doc = "Frame format is extended"]
|
||||
_1,
|
||||
}
|
||||
impl IDER {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
|
|||
|
|
@ -25,8 +25,10 @@ impl DLCR {
|
|||
#[doc = "Possible values of the field `RTR`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum RTRR {
|
||||
#[doc = "Frame is data one (not remote)"] _0,
|
||||
#[doc = "Frame is a remote one"] _1,
|
||||
#[doc = "Frame is data one (not remote)"]
|
||||
_0,
|
||||
#[doc = "Frame is a remote one"]
|
||||
_1,
|
||||
}
|
||||
impl RTRR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -70,8 +72,10 @@ impl RTRR {
|
|||
#[doc = "Possible values of the field `IDE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum IDER {
|
||||
#[doc = "Frame format is standard"] _0,
|
||||
#[doc = "Frame format is extended"] _1,
|
||||
#[doc = "Frame format is standard"]
|
||||
_0,
|
||||
#[doc = "Frame format is extended"]
|
||||
_1,
|
||||
}
|
||||
impl IDER {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
|
|||
|
|
@ -56,8 +56,10 @@ impl MCOUNTERR {
|
|||
#[doc = "Possible values of the field `WUMF`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WUMFR {
|
||||
#[doc = "No wake up by match event detected"] _0,
|
||||
#[doc = "Wake up by match event detected"] _1,
|
||||
#[doc = "No wake up by match event detected"]
|
||||
_0,
|
||||
#[doc = "Wake up by match event detected"]
|
||||
_1,
|
||||
}
|
||||
impl WUMFR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -101,8 +103,10 @@ impl WUMFR {
|
|||
#[doc = "Possible values of the field `WTOF`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WTOFR {
|
||||
#[doc = "No wake up by timeout event detected"] _0,
|
||||
#[doc = "Wake up by timeout event detected"] _1,
|
||||
#[doc = "No wake up by timeout event detected"]
|
||||
_0,
|
||||
#[doc = "Wake up by timeout event detected"]
|
||||
_1,
|
||||
}
|
||||
impl WTOFR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -145,8 +149,10 @@ impl WTOFR {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WUMF`"]
|
||||
pub enum WUMFW {
|
||||
#[doc = "No wake up by match event detected"] _0,
|
||||
#[doc = "Wake up by match event detected"] _1,
|
||||
#[doc = "No wake up by match event detected"]
|
||||
_0,
|
||||
#[doc = "Wake up by match event detected"]
|
||||
_1,
|
||||
}
|
||||
impl WUMFW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -201,8 +207,10 @@ impl<'a> _WUMFW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WTOF`"]
|
||||
pub enum WTOFW {
|
||||
#[doc = "No wake up by timeout event detected"] _0,
|
||||
#[doc = "Wake up by timeout event detected"] _1,
|
||||
#[doc = "No wake up by timeout event detected"]
|
||||
_0,
|
||||
#[doc = "Wake up by timeout event detected"]
|
||||
_1,
|
||||
}
|
||||
impl WTOFW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
|
|||
|
|
@ -45,10 +45,14 @@ impl super::C0 {
|
|||
#[doc = "Possible values of the field `HYSTCTR`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum HYSTCTRR {
|
||||
#[doc = "The hard block output has level 0 hysteresis internally."] _00,
|
||||
#[doc = "The hard block output has level 1 hysteresis internally."] _01,
|
||||
#[doc = "The hard block output has level 2 hysteresis internally."] _10,
|
||||
#[doc = "The hard block output has level 3 hysteresis internally."] _11,
|
||||
#[doc = "The hard block output has level 0 hysteresis internally."]
|
||||
_00,
|
||||
#[doc = "The hard block output has level 1 hysteresis internally."]
|
||||
_01,
|
||||
#[doc = "The hard block output has level 2 hysteresis internally."]
|
||||
_10,
|
||||
#[doc = "The hard block output has level 3 hysteresis internally."]
|
||||
_11,
|
||||
}
|
||||
impl HYSTCTRR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
|
|
@ -97,8 +101,10 @@ impl HYSTCTRR {
|
|||
#[doc = "Possible values of the field `OFFSET`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum OFFSETR {
|
||||
#[doc = "The comparator hard block output has level 0 offset internally."] _0,
|
||||
#[doc = "The comparator hard block output has level 1 offset internally."] _1,
|
||||
#[doc = "The comparator hard block output has level 0 offset internally."]
|
||||
_0,
|
||||
#[doc = "The comparator hard block output has level 1 offset internally."]
|
||||
_1,
|
||||
}
|
||||
impl OFFSETR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -144,13 +150,20 @@ impl OFFSETR {
|
|||
pub enum FILTER_CNTR {
|
||||
#[doc = "Filter is disabled. If SE = 1, then COUT is a logic zero (this is not a legal state, and is not recommended). If SE = 0, COUT = COUTA."]
|
||||
_000,
|
||||
#[doc = "1 consecutive sample must agree (comparator output is simply sampled)."] _001,
|
||||
#[doc = "2 consecutive samples must agree."] _010,
|
||||
#[doc = "3 consecutive samples must agree."] _011,
|
||||
#[doc = "4 consecutive samples must agree."] _100,
|
||||
#[doc = "5 consecutive samples must agree."] _101,
|
||||
#[doc = "6 consecutive samples must agree."] _110,
|
||||
#[doc = "7 consecutive samples must agree."] _111,
|
||||
#[doc = "1 consecutive sample must agree (comparator output is simply sampled)."]
|
||||
_001,
|
||||
#[doc = "2 consecutive samples must agree."]
|
||||
_010,
|
||||
#[doc = "3 consecutive samples must agree."]
|
||||
_011,
|
||||
#[doc = "4 consecutive samples must agree."]
|
||||
_100,
|
||||
#[doc = "5 consecutive samples must agree."]
|
||||
_101,
|
||||
#[doc = "6 consecutive samples must agree."]
|
||||
_110,
|
||||
#[doc = "7 consecutive samples must agree."]
|
||||
_111,
|
||||
}
|
||||
impl FILTER_CNTR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
|
|
@ -227,8 +240,10 @@ impl FILTER_CNTR {
|
|||
#[doc = "Possible values of the field `EN`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ENR {
|
||||
#[doc = "Analog Comparator is disabled."] _0,
|
||||
#[doc = "Analog Comparator is enabled."] _1,
|
||||
#[doc = "Analog Comparator is disabled."]
|
||||
_0,
|
||||
#[doc = "Analog Comparator is enabled."]
|
||||
_1,
|
||||
}
|
||||
impl ENR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -319,8 +334,10 @@ impl OPER {
|
|||
#[doc = "Possible values of the field `COS`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum COSR {
|
||||
#[doc = "Set CMPO to equal COUT (filtered comparator output)."] _0,
|
||||
#[doc = "Set CMPO to equal COUTA (unfiltered comparator output)."] _1,
|
||||
#[doc = "Set CMPO to equal COUT (filtered comparator output)."]
|
||||
_0,
|
||||
#[doc = "Set CMPO to equal COUTA (unfiltered comparator output)."]
|
||||
_1,
|
||||
}
|
||||
impl COSR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -364,8 +381,10 @@ impl COSR {
|
|||
#[doc = "Possible values of the field `INVT`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum INVTR {
|
||||
#[doc = "Does not invert the comparator output."] _0,
|
||||
#[doc = "Inverts the comparator output."] _1,
|
||||
#[doc = "Does not invert the comparator output."]
|
||||
_0,
|
||||
#[doc = "Inverts the comparator output."]
|
||||
_1,
|
||||
}
|
||||
impl INVTR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -409,7 +428,8 @@ impl INVTR {
|
|||
#[doc = "Possible values of the field `PMODE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum PMODER {
|
||||
#[doc = "Low Speed (LS) comparison mode is selected."] _0,
|
||||
#[doc = "Low Speed (LS) comparison mode is selected."]
|
||||
_0,
|
||||
#[doc = "High Speed (HS) comparison mode is selected, in VLPx mode, or Stop mode switched to Low Speed (LS) mode."]
|
||||
_1,
|
||||
}
|
||||
|
|
@ -455,8 +475,10 @@ impl PMODER {
|
|||
#[doc = "Possible values of the field `WE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WER {
|
||||
#[doc = "Windowing mode is not selected."] _0,
|
||||
#[doc = "Windowing mode is selected."] _1,
|
||||
#[doc = "Windowing mode is not selected."]
|
||||
_0,
|
||||
#[doc = "Windowing mode is selected."]
|
||||
_1,
|
||||
}
|
||||
impl WER {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -500,8 +522,10 @@ impl WER {
|
|||
#[doc = "Possible values of the field `SE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SER {
|
||||
#[doc = "Sampling mode is not selected."] _0,
|
||||
#[doc = "Sampling mode is selected."] _1,
|
||||
#[doc = "Sampling mode is not selected."]
|
||||
_0,
|
||||
#[doc = "Sampling mode is selected."]
|
||||
_1,
|
||||
}
|
||||
impl SER {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -577,8 +601,10 @@ impl COUTR {
|
|||
#[doc = "Possible values of the field `CFF`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum CFFR {
|
||||
#[doc = "A falling edge has not been detected on COUT."] _0,
|
||||
#[doc = "A falling edge on COUT has occurred."] _1,
|
||||
#[doc = "A falling edge has not been detected on COUT."]
|
||||
_0,
|
||||
#[doc = "A falling edge on COUT has occurred."]
|
||||
_1,
|
||||
}
|
||||
impl CFFR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -622,8 +648,10 @@ impl CFFR {
|
|||
#[doc = "Possible values of the field `CFR`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum CFRR {
|
||||
#[doc = "A rising edge has not been detected on COUT."] _0,
|
||||
#[doc = "A rising edge on COUT has occurred."] _1,
|
||||
#[doc = "A rising edge has not been detected on COUT."]
|
||||
_0,
|
||||
#[doc = "A rising edge on COUT has occurred."]
|
||||
_1,
|
||||
}
|
||||
impl CFRR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -667,8 +695,10 @@ impl CFRR {
|
|||
#[doc = "Possible values of the field `IEF`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum IEFR {
|
||||
#[doc = "Interrupt is disabled."] _0,
|
||||
#[doc = "Interrupt is enabled."] _1,
|
||||
#[doc = "Interrupt is disabled."]
|
||||
_0,
|
||||
#[doc = "Interrupt is enabled."]
|
||||
_1,
|
||||
}
|
||||
impl IEFR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -712,8 +742,10 @@ impl IEFR {
|
|||
#[doc = "Possible values of the field `IER`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum IERR {
|
||||
#[doc = "Interrupt is disabled."] _0,
|
||||
#[doc = "Interrupt is enabled."] _1,
|
||||
#[doc = "Interrupt is disabled."]
|
||||
_0,
|
||||
#[doc = "Interrupt is enabled."]
|
||||
_1,
|
||||
}
|
||||
impl IERR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -757,8 +789,10 @@ impl IERR {
|
|||
#[doc = "Possible values of the field `DMAEN`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum DMAENR {
|
||||
#[doc = "DMA is disabled."] _0,
|
||||
#[doc = "DMA is enabled."] _1,
|
||||
#[doc = "DMA is disabled."]
|
||||
_0,
|
||||
#[doc = "DMA is enabled."]
|
||||
_1,
|
||||
}
|
||||
impl DMAENR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -801,10 +835,14 @@ impl DMAENR {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `HYSTCTR`"]
|
||||
pub enum HYSTCTRW {
|
||||
#[doc = "The hard block output has level 0 hysteresis internally."] _00,
|
||||
#[doc = "The hard block output has level 1 hysteresis internally."] _01,
|
||||
#[doc = "The hard block output has level 2 hysteresis internally."] _10,
|
||||
#[doc = "The hard block output has level 3 hysteresis internally."] _11,
|
||||
#[doc = "The hard block output has level 0 hysteresis internally."]
|
||||
_00,
|
||||
#[doc = "The hard block output has level 1 hysteresis internally."]
|
||||
_01,
|
||||
#[doc = "The hard block output has level 2 hysteresis internally."]
|
||||
_10,
|
||||
#[doc = "The hard block output has level 3 hysteresis internally."]
|
||||
_11,
|
||||
}
|
||||
impl HYSTCTRW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -863,8 +901,10 @@ impl<'a> _HYSTCTRW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `OFFSET`"]
|
||||
pub enum OFFSETW {
|
||||
#[doc = "The comparator hard block output has level 0 offset internally."] _0,
|
||||
#[doc = "The comparator hard block output has level 1 offset internally."] _1,
|
||||
#[doc = "The comparator hard block output has level 0 offset internally."]
|
||||
_0,
|
||||
#[doc = "The comparator hard block output has level 1 offset internally."]
|
||||
_1,
|
||||
}
|
||||
impl OFFSETW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -921,13 +961,20 @@ impl<'a> _OFFSETW<'a> {
|
|||
pub enum FILTER_CNTW {
|
||||
#[doc = "Filter is disabled. If SE = 1, then COUT is a logic zero (this is not a legal state, and is not recommended). If SE = 0, COUT = COUTA."]
|
||||
_000,
|
||||
#[doc = "1 consecutive sample must agree (comparator output is simply sampled)."] _001,
|
||||
#[doc = "2 consecutive samples must agree."] _010,
|
||||
#[doc = "3 consecutive samples must agree."] _011,
|
||||
#[doc = "4 consecutive samples must agree."] _100,
|
||||
#[doc = "5 consecutive samples must agree."] _101,
|
||||
#[doc = "6 consecutive samples must agree."] _110,
|
||||
#[doc = "7 consecutive samples must agree."] _111,
|
||||
#[doc = "1 consecutive sample must agree (comparator output is simply sampled)."]
|
||||
_001,
|
||||
#[doc = "2 consecutive samples must agree."]
|
||||
_010,
|
||||
#[doc = "3 consecutive samples must agree."]
|
||||
_011,
|
||||
#[doc = "4 consecutive samples must agree."]
|
||||
_100,
|
||||
#[doc = "5 consecutive samples must agree."]
|
||||
_101,
|
||||
#[doc = "6 consecutive samples must agree."]
|
||||
_110,
|
||||
#[doc = "7 consecutive samples must agree."]
|
||||
_111,
|
||||
}
|
||||
impl FILTER_CNTW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1010,8 +1057,10 @@ impl<'a> _FILTER_CNTW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `EN`"]
|
||||
pub enum ENW {
|
||||
#[doc = "Analog Comparator is disabled."] _0,
|
||||
#[doc = "Analog Comparator is enabled."] _1,
|
||||
#[doc = "Analog Comparator is disabled."]
|
||||
_0,
|
||||
#[doc = "Analog Comparator is enabled."]
|
||||
_1,
|
||||
}
|
||||
impl ENW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1124,8 +1173,10 @@ impl<'a> _OPEW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `COS`"]
|
||||
pub enum COSW {
|
||||
#[doc = "Set CMPO to equal COUT (filtered comparator output)."] _0,
|
||||
#[doc = "Set CMPO to equal COUTA (unfiltered comparator output)."] _1,
|
||||
#[doc = "Set CMPO to equal COUT (filtered comparator output)."]
|
||||
_0,
|
||||
#[doc = "Set CMPO to equal COUTA (unfiltered comparator output)."]
|
||||
_1,
|
||||
}
|
||||
impl COSW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1180,8 +1231,10 @@ impl<'a> _COSW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `INVT`"]
|
||||
pub enum INVTW {
|
||||
#[doc = "Does not invert the comparator output."] _0,
|
||||
#[doc = "Inverts the comparator output."] _1,
|
||||
#[doc = "Does not invert the comparator output."]
|
||||
_0,
|
||||
#[doc = "Inverts the comparator output."]
|
||||
_1,
|
||||
}
|
||||
impl INVTW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1236,7 +1289,8 @@ impl<'a> _INVTW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `PMODE`"]
|
||||
pub enum PMODEW {
|
||||
#[doc = "Low Speed (LS) comparison mode is selected."] _0,
|
||||
#[doc = "Low Speed (LS) comparison mode is selected."]
|
||||
_0,
|
||||
#[doc = "High Speed (HS) comparison mode is selected, in VLPx mode, or Stop mode switched to Low Speed (LS) mode."]
|
||||
_1,
|
||||
}
|
||||
|
|
@ -1293,8 +1347,10 @@ impl<'a> _PMODEW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WE`"]
|
||||
pub enum WEW {
|
||||
#[doc = "Windowing mode is not selected."] _0,
|
||||
#[doc = "Windowing mode is selected."] _1,
|
||||
#[doc = "Windowing mode is not selected."]
|
||||
_0,
|
||||
#[doc = "Windowing mode is selected."]
|
||||
_1,
|
||||
}
|
||||
impl WEW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1349,8 +1405,10 @@ impl<'a> _WEW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SE`"]
|
||||
pub enum SEW {
|
||||
#[doc = "Sampling mode is not selected."] _0,
|
||||
#[doc = "Sampling mode is selected."] _1,
|
||||
#[doc = "Sampling mode is not selected."]
|
||||
_0,
|
||||
#[doc = "Sampling mode is selected."]
|
||||
_1,
|
||||
}
|
||||
impl SEW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1420,8 +1478,10 @@ impl<'a> _FPRW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `CFF`"]
|
||||
pub enum CFFW {
|
||||
#[doc = "A falling edge has not been detected on COUT."] _0,
|
||||
#[doc = "A falling edge on COUT has occurred."] _1,
|
||||
#[doc = "A falling edge has not been detected on COUT."]
|
||||
_0,
|
||||
#[doc = "A falling edge on COUT has occurred."]
|
||||
_1,
|
||||
}
|
||||
impl CFFW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1476,8 +1536,10 @@ impl<'a> _CFFW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `CFR`"]
|
||||
pub enum CFRW {
|
||||
#[doc = "A rising edge has not been detected on COUT."] _0,
|
||||
#[doc = "A rising edge on COUT has occurred."] _1,
|
||||
#[doc = "A rising edge has not been detected on COUT."]
|
||||
_0,
|
||||
#[doc = "A rising edge on COUT has occurred."]
|
||||
_1,
|
||||
}
|
||||
impl CFRW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1532,8 +1594,10 @@ impl<'a> _CFRW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `IEF`"]
|
||||
pub enum IEFW {
|
||||
#[doc = "Interrupt is disabled."] _0,
|
||||
#[doc = "Interrupt is enabled."] _1,
|
||||
#[doc = "Interrupt is disabled."]
|
||||
_0,
|
||||
#[doc = "Interrupt is enabled."]
|
||||
_1,
|
||||
}
|
||||
impl IEFW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1588,8 +1652,10 @@ impl<'a> _IEFW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `IER`"]
|
||||
pub enum IERW {
|
||||
#[doc = "Interrupt is disabled."] _0,
|
||||
#[doc = "Interrupt is enabled."] _1,
|
||||
#[doc = "Interrupt is disabled."]
|
||||
_0,
|
||||
#[doc = "Interrupt is enabled."]
|
||||
_1,
|
||||
}
|
||||
impl IERW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1644,8 +1710,10 @@ impl<'a> _IERW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `DMAEN`"]
|
||||
pub enum DMAENW {
|
||||
#[doc = "DMA is disabled."] _0,
|
||||
#[doc = "DMA is enabled."] _1,
|
||||
#[doc = "DMA is disabled."]
|
||||
_0,
|
||||
#[doc = "DMA is enabled."]
|
||||
_1,
|
||||
}
|
||||
impl DMAENW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
|
|||
|
|
@ -56,14 +56,22 @@ impl VOSELR {
|
|||
#[doc = "Possible values of the field `MSEL`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum MSELR {
|
||||
#[doc = "IN0"] _000,
|
||||
#[doc = "IN1"] _001,
|
||||
#[doc = "IN2"] _010,
|
||||
#[doc = "IN3"] _011,
|
||||
#[doc = "IN4"] _100,
|
||||
#[doc = "IN5"] _101,
|
||||
#[doc = "IN6"] _110,
|
||||
#[doc = "IN7"] _111,
|
||||
#[doc = "IN0"]
|
||||
_000,
|
||||
#[doc = "IN1"]
|
||||
_001,
|
||||
#[doc = "IN2"]
|
||||
_010,
|
||||
#[doc = "IN3"]
|
||||
_011,
|
||||
#[doc = "IN4"]
|
||||
_100,
|
||||
#[doc = "IN5"]
|
||||
_101,
|
||||
#[doc = "IN6"]
|
||||
_110,
|
||||
#[doc = "IN7"]
|
||||
_111,
|
||||
}
|
||||
impl MSELR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
|
|
@ -140,14 +148,22 @@ impl MSELR {
|
|||
#[doc = "Possible values of the field `PSEL`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum PSELR {
|
||||
#[doc = "IN0"] _000,
|
||||
#[doc = "IN1"] _001,
|
||||
#[doc = "IN2"] _010,
|
||||
#[doc = "IN3"] _011,
|
||||
#[doc = "IN4"] _100,
|
||||
#[doc = "IN5"] _101,
|
||||
#[doc = "IN6"] _110,
|
||||
#[doc = "IN7"] _111,
|
||||
#[doc = "IN0"]
|
||||
_000,
|
||||
#[doc = "IN1"]
|
||||
_001,
|
||||
#[doc = "IN2"]
|
||||
_010,
|
||||
#[doc = "IN3"]
|
||||
_011,
|
||||
#[doc = "IN4"]
|
||||
_100,
|
||||
#[doc = "IN5"]
|
||||
_101,
|
||||
#[doc = "IN6"]
|
||||
_110,
|
||||
#[doc = "IN7"]
|
||||
_111,
|
||||
}
|
||||
impl PSELR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
|
|
@ -224,8 +240,10 @@ impl PSELR {
|
|||
#[doc = "Possible values of the field `VRSEL`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum VRSELR {
|
||||
#[doc = "Vin1 is selected as resistor ladder network supply reference Vin."] _0,
|
||||
#[doc = "Vin2 is selected as resistor ladder network supply reference Vin."] _1,
|
||||
#[doc = "Vin1 is selected as resistor ladder network supply reference Vin."]
|
||||
_0,
|
||||
#[doc = "Vin2 is selected as resistor ladder network supply reference Vin."]
|
||||
_1,
|
||||
}
|
||||
impl VRSELR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -269,8 +287,10 @@ impl VRSELR {
|
|||
#[doc = "Possible values of the field `DACEN`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum DACENR {
|
||||
#[doc = "DAC is disabled."] _0,
|
||||
#[doc = "DAC is enabled."] _1,
|
||||
#[doc = "DAC is disabled."]
|
||||
_0,
|
||||
#[doc = "DAC is enabled."]
|
||||
_1,
|
||||
}
|
||||
impl DACENR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -482,9 +502,12 @@ impl CHN7R {
|
|||
#[doc = "Possible values of the field `INNSEL`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum INNSELR {
|
||||
#[doc = "IN0, from the 8-bit DAC output"] _00,
|
||||
#[doc = "IN1, from the analog 8-1 mux"] _01,
|
||||
#[doc = r" Reserved"] _Reserved(u8),
|
||||
#[doc = "IN0, from the 8-bit DAC output"]
|
||||
_00,
|
||||
#[doc = "IN1, from the analog 8-1 mux"]
|
||||
_01,
|
||||
#[doc = r" Reserved"]
|
||||
_Reserved(u8),
|
||||
}
|
||||
impl INNSELR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
|
|
@ -520,9 +543,12 @@ impl INNSELR {
|
|||
#[doc = "Possible values of the field `INPSEL`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum INPSELR {
|
||||
#[doc = "IN0, from the 8-bit DAC output"] _00,
|
||||
#[doc = "IN1, from the analog 8-1 mux"] _01,
|
||||
#[doc = r" Reserved"] _Reserved(u8),
|
||||
#[doc = "IN0, from the 8-bit DAC output"]
|
||||
_00,
|
||||
#[doc = "IN1, from the analog 8-1 mux"]
|
||||
_01,
|
||||
#[doc = r" Reserved"]
|
||||
_Reserved(u8),
|
||||
}
|
||||
impl INPSELR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
|
|
@ -572,14 +598,22 @@ impl<'a> _VOSELW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `MSEL`"]
|
||||
pub enum MSELW {
|
||||
#[doc = "IN0"] _000,
|
||||
#[doc = "IN1"] _001,
|
||||
#[doc = "IN2"] _010,
|
||||
#[doc = "IN3"] _011,
|
||||
#[doc = "IN4"] _100,
|
||||
#[doc = "IN5"] _101,
|
||||
#[doc = "IN6"] _110,
|
||||
#[doc = "IN7"] _111,
|
||||
#[doc = "IN0"]
|
||||
_000,
|
||||
#[doc = "IN1"]
|
||||
_001,
|
||||
#[doc = "IN2"]
|
||||
_010,
|
||||
#[doc = "IN3"]
|
||||
_011,
|
||||
#[doc = "IN4"]
|
||||
_100,
|
||||
#[doc = "IN5"]
|
||||
_101,
|
||||
#[doc = "IN6"]
|
||||
_110,
|
||||
#[doc = "IN7"]
|
||||
_111,
|
||||
}
|
||||
impl MSELW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -662,14 +696,22 @@ impl<'a> _MSELW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `PSEL`"]
|
||||
pub enum PSELW {
|
||||
#[doc = "IN0"] _000,
|
||||
#[doc = "IN1"] _001,
|
||||
#[doc = "IN2"] _010,
|
||||
#[doc = "IN3"] _011,
|
||||
#[doc = "IN4"] _100,
|
||||
#[doc = "IN5"] _101,
|
||||
#[doc = "IN6"] _110,
|
||||
#[doc = "IN7"] _111,
|
||||
#[doc = "IN0"]
|
||||
_000,
|
||||
#[doc = "IN1"]
|
||||
_001,
|
||||
#[doc = "IN2"]
|
||||
_010,
|
||||
#[doc = "IN3"]
|
||||
_011,
|
||||
#[doc = "IN4"]
|
||||
_100,
|
||||
#[doc = "IN5"]
|
||||
_101,
|
||||
#[doc = "IN6"]
|
||||
_110,
|
||||
#[doc = "IN7"]
|
||||
_111,
|
||||
}
|
||||
impl PSELW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -752,8 +794,10 @@ impl<'a> _PSELW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `VRSEL`"]
|
||||
pub enum VRSELW {
|
||||
#[doc = "Vin1 is selected as resistor ladder network supply reference Vin."] _0,
|
||||
#[doc = "Vin2 is selected as resistor ladder network supply reference Vin."] _1,
|
||||
#[doc = "Vin1 is selected as resistor ladder network supply reference Vin."]
|
||||
_0,
|
||||
#[doc = "Vin2 is selected as resistor ladder network supply reference Vin."]
|
||||
_1,
|
||||
}
|
||||
impl VRSELW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -808,8 +852,10 @@ impl<'a> _VRSELW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `DACEN`"]
|
||||
pub enum DACENW {
|
||||
#[doc = "DAC is disabled."] _0,
|
||||
#[doc = "DAC is enabled."] _1,
|
||||
#[doc = "DAC is disabled."]
|
||||
_0,
|
||||
#[doc = "DAC is enabled."]
|
||||
_1,
|
||||
}
|
||||
impl DACENW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1048,8 +1094,10 @@ impl<'a> _CHN7W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `INNSEL`"]
|
||||
pub enum INNSELW {
|
||||
#[doc = "IN0, from the 8-bit DAC output"] _00,
|
||||
#[doc = "IN1, from the analog 8-1 mux"] _01,
|
||||
#[doc = "IN0, from the 8-bit DAC output"]
|
||||
_00,
|
||||
#[doc = "IN1, from the analog 8-1 mux"]
|
||||
_01,
|
||||
}
|
||||
impl INNSELW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1094,8 +1142,10 @@ impl<'a> _INNSELW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `INPSEL`"]
|
||||
pub enum INPSELW {
|
||||
#[doc = "IN0, from the 8-bit DAC output"] _00,
|
||||
#[doc = "IN1, from the analog 8-1 mux"] _01,
|
||||
#[doc = "IN0, from the 8-bit DAC output"]
|
||||
_00,
|
||||
#[doc = "IN1, from the analog 8-1 mux"]
|
||||
_01,
|
||||
}
|
||||
impl INPSELW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
|
|||
|
|
@ -56,8 +56,10 @@ impl ACONR {
|
|||
#[doc = "Possible values of the field `INITMOD`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum INITMODR {
|
||||
#[doc = "The modulus is set to 64(same with 111111)."] _000000,
|
||||
#[doc = r" Reserved"] _Reserved(u8),
|
||||
#[doc = "The modulus is set to 64(same with 111111)."]
|
||||
_000000,
|
||||
#[doc = r" Reserved"]
|
||||
_Reserved(u8),
|
||||
}
|
||||
impl INITMODR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
|
|
@ -310,14 +312,22 @@ impl CH7FR {
|
|||
#[doc = "Possible values of the field `FXMXCH`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum FXMXCHR {
|
||||
#[doc = "Channel 0 is selected as the fixed reference input for the fixed mux port."] _000,
|
||||
#[doc = "Channel 1 is selected as the fixed reference input for the fixed mux port."] _001,
|
||||
#[doc = "Channel 2 is selected as the fixed reference input for the fixed mux port."] _010,
|
||||
#[doc = "Channel 3 is selected as the fixed reference input for the fixed mux port."] _011,
|
||||
#[doc = "Channel 4 is selected as the fixed reference input for the fixed mux port."] _100,
|
||||
#[doc = "Channel 5 is selected as the fixed reference input for the fixed mux port."] _101,
|
||||
#[doc = "Channel 6 is selected as the fixed reference input for the fixed mux port."] _110,
|
||||
#[doc = "Channel 7 is selected as the fixed reference input for the fixed mux port."] _111,
|
||||
#[doc = "Channel 0 is selected as the fixed reference input for the fixed mux port."]
|
||||
_000,
|
||||
#[doc = "Channel 1 is selected as the fixed reference input for the fixed mux port."]
|
||||
_001,
|
||||
#[doc = "Channel 2 is selected as the fixed reference input for the fixed mux port."]
|
||||
_010,
|
||||
#[doc = "Channel 3 is selected as the fixed reference input for the fixed mux port."]
|
||||
_011,
|
||||
#[doc = "Channel 4 is selected as the fixed reference input for the fixed mux port."]
|
||||
_100,
|
||||
#[doc = "Channel 5 is selected as the fixed reference input for the fixed mux port."]
|
||||
_101,
|
||||
#[doc = "Channel 6 is selected as the fixed reference input for the fixed mux port."]
|
||||
_110,
|
||||
#[doc = "Channel 7 is selected as the fixed reference input for the fixed mux port."]
|
||||
_111,
|
||||
}
|
||||
impl FXMXCHR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
|
|
@ -394,8 +404,10 @@ impl FXMXCHR {
|
|||
#[doc = "Possible values of the field `FXMP`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum FXMPR {
|
||||
#[doc = "The Plus port is fixed. Only the inputs to the Minus port are swept in each round."] _0,
|
||||
#[doc = "The Minus port is fixed. Only the inputs to the Plus port are swept in each round."] _1,
|
||||
#[doc = "The Plus port is fixed. Only the inputs to the Minus port are swept in each round."]
|
||||
_0,
|
||||
#[doc = "The Minus port is fixed. Only the inputs to the Plus port are swept in each round."]
|
||||
_1,
|
||||
}
|
||||
impl FXMPR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -439,7 +451,8 @@ impl FXMPR {
|
|||
#[doc = "Possible values of the field `RRIE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum RRIER {
|
||||
#[doc = "The round-robin interrupt is disabled."] _0,
|
||||
#[doc = "The round-robin interrupt is disabled."]
|
||||
_0,
|
||||
#[doc = "The round-robin interrupt is enabled when a comparison result changes from the last sample."]
|
||||
_1,
|
||||
}
|
||||
|
|
@ -485,8 +498,10 @@ impl RRIER {
|
|||
#[doc = "Possible values of the field `RRE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum RRER {
|
||||
#[doc = "Round-robin operation is disabled."] _0,
|
||||
#[doc = "Round-robin operation is enabled."] _1,
|
||||
#[doc = "Round-robin operation is disabled."]
|
||||
_0,
|
||||
#[doc = "Round-robin operation is enabled."]
|
||||
_1,
|
||||
}
|
||||
impl RRER {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -544,7 +559,8 @@ impl<'a> _ACONW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `INITMOD`"]
|
||||
pub enum INITMODW {
|
||||
#[doc = "The modulus is set to 64(same with 111111)."] _000000,
|
||||
#[doc = "The modulus is set to 64(same with 111111)."]
|
||||
_000000,
|
||||
}
|
||||
impl INITMODW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -833,14 +849,22 @@ impl<'a> _CH7FW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `FXMXCH`"]
|
||||
pub enum FXMXCHW {
|
||||
#[doc = "Channel 0 is selected as the fixed reference input for the fixed mux port."] _000,
|
||||
#[doc = "Channel 1 is selected as the fixed reference input for the fixed mux port."] _001,
|
||||
#[doc = "Channel 2 is selected as the fixed reference input for the fixed mux port."] _010,
|
||||
#[doc = "Channel 3 is selected as the fixed reference input for the fixed mux port."] _011,
|
||||
#[doc = "Channel 4 is selected as the fixed reference input for the fixed mux port."] _100,
|
||||
#[doc = "Channel 5 is selected as the fixed reference input for the fixed mux port."] _101,
|
||||
#[doc = "Channel 6 is selected as the fixed reference input for the fixed mux port."] _110,
|
||||
#[doc = "Channel 7 is selected as the fixed reference input for the fixed mux port."] _111,
|
||||
#[doc = "Channel 0 is selected as the fixed reference input for the fixed mux port."]
|
||||
_000,
|
||||
#[doc = "Channel 1 is selected as the fixed reference input for the fixed mux port."]
|
||||
_001,
|
||||
#[doc = "Channel 2 is selected as the fixed reference input for the fixed mux port."]
|
||||
_010,
|
||||
#[doc = "Channel 3 is selected as the fixed reference input for the fixed mux port."]
|
||||
_011,
|
||||
#[doc = "Channel 4 is selected as the fixed reference input for the fixed mux port."]
|
||||
_100,
|
||||
#[doc = "Channel 5 is selected as the fixed reference input for the fixed mux port."]
|
||||
_101,
|
||||
#[doc = "Channel 6 is selected as the fixed reference input for the fixed mux port."]
|
||||
_110,
|
||||
#[doc = "Channel 7 is selected as the fixed reference input for the fixed mux port."]
|
||||
_111,
|
||||
}
|
||||
impl FXMXCHW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -923,8 +947,10 @@ impl<'a> _FXMXCHW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `FXMP`"]
|
||||
pub enum FXMPW {
|
||||
#[doc = "The Plus port is fixed. Only the inputs to the Minus port are swept in each round."] _0,
|
||||
#[doc = "The Minus port is fixed. Only the inputs to the Plus port are swept in each round."] _1,
|
||||
#[doc = "The Plus port is fixed. Only the inputs to the Minus port are swept in each round."]
|
||||
_0,
|
||||
#[doc = "The Minus port is fixed. Only the inputs to the Plus port are swept in each round."]
|
||||
_1,
|
||||
}
|
||||
impl FXMPW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -979,7 +1005,8 @@ impl<'a> _FXMPW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `RRIE`"]
|
||||
pub enum RRIEW {
|
||||
#[doc = "The round-robin interrupt is disabled."] _0,
|
||||
#[doc = "The round-robin interrupt is disabled."]
|
||||
_0,
|
||||
#[doc = "The round-robin interrupt is enabled when a comparison result changes from the last sample."]
|
||||
_1,
|
||||
}
|
||||
|
|
@ -1036,8 +1063,10 @@ impl<'a> _RRIEW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `RRE`"]
|
||||
pub enum RREW {
|
||||
#[doc = "Round-robin operation is disabled."] _0,
|
||||
#[doc = "Round-robin operation is enabled."] _1,
|
||||
#[doc = "Round-robin operation is disabled."]
|
||||
_0,
|
||||
#[doc = "Round-robin operation is enabled."]
|
||||
_1,
|
||||
}
|
||||
impl RREW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
|
|||
|
|
@ -2,9 +2,12 @@ use vcell::VolatileCell;
|
|||
#[doc = r" Register block"]
|
||||
#[repr(C)]
|
||||
pub struct RegisterBlock {
|
||||
#[doc = "0x00 - CMP Control Register 0"] pub c0: C0,
|
||||
#[doc = "0x04 - CMP Control Register 1"] pub c1: C1,
|
||||
#[doc = "0x08 - CMP Control Register 2"] pub c2: C2,
|
||||
#[doc = "0x00 - CMP Control Register 0"]
|
||||
pub c0: C0,
|
||||
#[doc = "0x04 - CMP Control Register 1"]
|
||||
pub c1: C1,
|
||||
#[doc = "0x08 - CMP Control Register 2"]
|
||||
pub c2: C2,
|
||||
}
|
||||
#[doc = "CMP Control Register 0"]
|
||||
pub struct C0 {
|
||||
|
|
|
|||
|
|
@ -45,8 +45,10 @@ impl super::CTRL {
|
|||
#[doc = "Possible values of the field `TCRC`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TCRCR {
|
||||
#[doc = "16-bit CRC protocol."] _0,
|
||||
#[doc = "32-bit CRC protocol."] _1,
|
||||
#[doc = "16-bit CRC protocol."]
|
||||
_0,
|
||||
#[doc = "32-bit CRC protocol."]
|
||||
_1,
|
||||
}
|
||||
impl TCRCR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -90,8 +92,10 @@ impl TCRCR {
|
|||
#[doc = "Possible values of the field `WAS`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WASR {
|
||||
#[doc = "Writes to the CRC data register are data values."] _0,
|
||||
#[doc = "Writes to the CRC data register are seed values."] _1,
|
||||
#[doc = "Writes to the CRC data register are data values."]
|
||||
_0,
|
||||
#[doc = "Writes to the CRC data register are seed values."]
|
||||
_1,
|
||||
}
|
||||
impl WASR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -135,8 +139,10 @@ impl WASR {
|
|||
#[doc = "Possible values of the field `FXOR`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum FXORR {
|
||||
#[doc = "No XOR on reading."] _0,
|
||||
#[doc = "Invert or complement the read value of the CRC Data register."] _1,
|
||||
#[doc = "No XOR on reading."]
|
||||
_0,
|
||||
#[doc = "Invert or complement the read value of the CRC Data register."]
|
||||
_1,
|
||||
}
|
||||
impl FXORR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -180,10 +186,14 @@ impl FXORR {
|
|||
#[doc = "Possible values of the field `TOTR`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TOTRR {
|
||||
#[doc = "No transposition."] _00,
|
||||
#[doc = "Bits in bytes are transposed; bytes are not transposed."] _01,
|
||||
#[doc = "Both bits in bytes and bytes are transposed."] _10,
|
||||
#[doc = "Only bytes are transposed; no bits in a byte are transposed."] _11,
|
||||
#[doc = "No transposition."]
|
||||
_00,
|
||||
#[doc = "Bits in bytes are transposed; bytes are not transposed."]
|
||||
_01,
|
||||
#[doc = "Both bits in bytes and bytes are transposed."]
|
||||
_10,
|
||||
#[doc = "Only bytes are transposed; no bits in a byte are transposed."]
|
||||
_11,
|
||||
}
|
||||
impl TOTRR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
|
|
@ -232,10 +242,14 @@ impl TOTRR {
|
|||
#[doc = "Possible values of the field `TOT`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TOTR {
|
||||
#[doc = "No transposition."] _00,
|
||||
#[doc = "Bits in bytes are transposed; bytes are not transposed."] _01,
|
||||
#[doc = "Both bits in bytes and bytes are transposed."] _10,
|
||||
#[doc = "Only bytes are transposed; no bits in a byte are transposed."] _11,
|
||||
#[doc = "No transposition."]
|
||||
_00,
|
||||
#[doc = "Bits in bytes are transposed; bytes are not transposed."]
|
||||
_01,
|
||||
#[doc = "Both bits in bytes and bytes are transposed."]
|
||||
_10,
|
||||
#[doc = "Only bytes are transposed; no bits in a byte are transposed."]
|
||||
_11,
|
||||
}
|
||||
impl TOTR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
|
|
@ -283,8 +297,10 @@ impl TOTR {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TCRC`"]
|
||||
pub enum TCRCW {
|
||||
#[doc = "16-bit CRC protocol."] _0,
|
||||
#[doc = "32-bit CRC protocol."] _1,
|
||||
#[doc = "16-bit CRC protocol."]
|
||||
_0,
|
||||
#[doc = "32-bit CRC protocol."]
|
||||
_1,
|
||||
}
|
||||
impl TCRCW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -339,8 +355,10 @@ impl<'a> _TCRCW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WAS`"]
|
||||
pub enum WASW {
|
||||
#[doc = "Writes to the CRC data register are data values."] _0,
|
||||
#[doc = "Writes to the CRC data register are seed values."] _1,
|
||||
#[doc = "Writes to the CRC data register are data values."]
|
||||
_0,
|
||||
#[doc = "Writes to the CRC data register are seed values."]
|
||||
_1,
|
||||
}
|
||||
impl WASW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -395,8 +413,10 @@ impl<'a> _WASW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `FXOR`"]
|
||||
pub enum FXORW {
|
||||
#[doc = "No XOR on reading."] _0,
|
||||
#[doc = "Invert or complement the read value of the CRC Data register."] _1,
|
||||
#[doc = "No XOR on reading."]
|
||||
_0,
|
||||
#[doc = "Invert or complement the read value of the CRC Data register."]
|
||||
_1,
|
||||
}
|
||||
impl FXORW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -451,10 +471,14 @@ impl<'a> _FXORW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TOTR`"]
|
||||
pub enum TOTRW {
|
||||
#[doc = "No transposition."] _00,
|
||||
#[doc = "Bits in bytes are transposed; bytes are not transposed."] _01,
|
||||
#[doc = "Both bits in bytes and bytes are transposed."] _10,
|
||||
#[doc = "Only bytes are transposed; no bits in a byte are transposed."] _11,
|
||||
#[doc = "No transposition."]
|
||||
_00,
|
||||
#[doc = "Bits in bytes are transposed; bytes are not transposed."]
|
||||
_01,
|
||||
#[doc = "Both bits in bytes and bytes are transposed."]
|
||||
_10,
|
||||
#[doc = "Only bytes are transposed; no bits in a byte are transposed."]
|
||||
_11,
|
||||
}
|
||||
impl TOTRW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -513,10 +537,14 @@ impl<'a> _TOTRW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TOT`"]
|
||||
pub enum TOTW {
|
||||
#[doc = "No transposition."] _00,
|
||||
#[doc = "Bits in bytes are transposed; bytes are not transposed."] _01,
|
||||
#[doc = "Both bits in bytes and bytes are transposed."] _10,
|
||||
#[doc = "Only bytes are transposed; no bits in a byte are transposed."] _11,
|
||||
#[doc = "No transposition."]
|
||||
_00,
|
||||
#[doc = "Bits in bytes are transposed; bytes are not transposed."]
|
||||
_01,
|
||||
#[doc = "Both bits in bytes and bytes are transposed."]
|
||||
_10,
|
||||
#[doc = "Only bytes are transposed; no bits in a byte are transposed."]
|
||||
_11,
|
||||
}
|
||||
impl TOTW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
|
|||
|
|
@ -2,9 +2,12 @@ use vcell::VolatileCell;
|
|||
#[doc = r" Register block"]
|
||||
#[repr(C)]
|
||||
pub struct RegisterBlock {
|
||||
#[doc = "0x00 - CRC Data register"] pub data: DATA,
|
||||
#[doc = "0x04 - CRC Polynomial register"] pub gpoly: GPOLY,
|
||||
#[doc = "0x08 - CRC Control register"] pub ctrl: CTRL,
|
||||
#[doc = "0x00 - CRC Data register"]
|
||||
pub data: DATA,
|
||||
#[doc = "0x04 - CRC Polynomial register"]
|
||||
pub gpoly: GPOLY,
|
||||
#[doc = "0x08 - CRC Control register"]
|
||||
pub ctrl: CTRL,
|
||||
}
|
||||
#[doc = "CRC Data register"]
|
||||
pub struct DATA {
|
||||
|
|
|
|||
|
|
@ -2,38 +2,70 @@ use vcell::VolatileCell;
|
|||
#[doc = r" Register block"]
|
||||
#[repr(C)]
|
||||
pub struct RegisterBlock {
|
||||
#[doc = "0x00 - CSE PRAM 0 Register"] pub embedded_ram0: EMBEDDEDRAM0,
|
||||
#[doc = "0x04 - CSE PRAM 1 Register"] pub embedded_ram1: EMBEDDEDRAM1,
|
||||
#[doc = "0x08 - CSE PRAM 2 Register"] pub embedded_ram2: EMBEDDEDRAM2,
|
||||
#[doc = "0x0c - CSE PRAM 3 Register"] pub embedded_ram3: EMBEDDEDRAM3,
|
||||
#[doc = "0x10 - CSE PRAM 4 Register"] pub embedded_ram4: EMBEDDEDRAM4,
|
||||
#[doc = "0x14 - CSE PRAM 5 Register"] pub embedded_ram5: EMBEDDEDRAM5,
|
||||
#[doc = "0x18 - CSE PRAM 6 Register"] pub embedded_ram6: EMBEDDEDRAM6,
|
||||
#[doc = "0x1c - CSE PRAM 7 Register"] pub embedded_ram7: EMBEDDEDRAM7,
|
||||
#[doc = "0x20 - CSE PRAM 8 Register"] pub embedded_ram8: EMBEDDEDRAM8,
|
||||
#[doc = "0x24 - CSE PRAM 9 Register"] pub embedded_ram9: EMBEDDEDRAM9,
|
||||
#[doc = "0x28 - CSE PRAM 10 Register"] pub embedded_ram10: EMBEDDEDRAM10,
|
||||
#[doc = "0x2c - CSE PRAM 11 Register"] pub embedded_ram11: EMBEDDEDRAM11,
|
||||
#[doc = "0x30 - CSE PRAM 12 Register"] pub embedded_ram12: EMBEDDEDRAM12,
|
||||
#[doc = "0x34 - CSE PRAM 13 Register"] pub embedded_ram13: EMBEDDEDRAM13,
|
||||
#[doc = "0x38 - CSE PRAM 14 Register"] pub embedded_ram14: EMBEDDEDRAM14,
|
||||
#[doc = "0x3c - CSE PRAM 15 Register"] pub embedded_ram15: EMBEDDEDRAM15,
|
||||
#[doc = "0x40 - CSE PRAM 16 Register"] pub embedded_ram16: EMBEDDEDRAM16,
|
||||
#[doc = "0x44 - CSE PRAM 17 Register"] pub embedded_ram17: EMBEDDEDRAM17,
|
||||
#[doc = "0x48 - CSE PRAM 18 Register"] pub embedded_ram18: EMBEDDEDRAM18,
|
||||
#[doc = "0x4c - CSE PRAM 19 Register"] pub embedded_ram19: EMBEDDEDRAM19,
|
||||
#[doc = "0x50 - CSE PRAM 20 Register"] pub embedded_ram20: EMBEDDEDRAM20,
|
||||
#[doc = "0x54 - CSE PRAM 21 Register"] pub embedded_ram21: EMBEDDEDRAM21,
|
||||
#[doc = "0x58 - CSE PRAM 22 Register"] pub embedded_ram22: EMBEDDEDRAM22,
|
||||
#[doc = "0x5c - CSE PRAM 23 Register"] pub embedded_ram23: EMBEDDEDRAM23,
|
||||
#[doc = "0x60 - CSE PRAM 24 Register"] pub embedded_ram24: EMBEDDEDRAM24,
|
||||
#[doc = "0x64 - CSE PRAM 25 Register"] pub embedded_ram25: EMBEDDEDRAM25,
|
||||
#[doc = "0x68 - CSE PRAM 26 Register"] pub embedded_ram26: EMBEDDEDRAM26,
|
||||
#[doc = "0x6c - CSE PRAM 27 Register"] pub embedded_ram27: EMBEDDEDRAM27,
|
||||
#[doc = "0x70 - CSE PRAM 28 Register"] pub embedded_ram28: EMBEDDEDRAM28,
|
||||
#[doc = "0x74 - CSE PRAM 29 Register"] pub embedded_ram29: EMBEDDEDRAM29,
|
||||
#[doc = "0x78 - CSE PRAM 30 Register"] pub embedded_ram30: EMBEDDEDRAM30,
|
||||
#[doc = "0x7c - CSE PRAM 31 Register"] pub embedded_ram31: EMBEDDEDRAM31,
|
||||
#[doc = "0x00 - CSE PRAM 0 Register"]
|
||||
pub embedded_ram0: EMBEDDEDRAM0,
|
||||
#[doc = "0x04 - CSE PRAM 1 Register"]
|
||||
pub embedded_ram1: EMBEDDEDRAM1,
|
||||
#[doc = "0x08 - CSE PRAM 2 Register"]
|
||||
pub embedded_ram2: EMBEDDEDRAM2,
|
||||
#[doc = "0x0c - CSE PRAM 3 Register"]
|
||||
pub embedded_ram3: EMBEDDEDRAM3,
|
||||
#[doc = "0x10 - CSE PRAM 4 Register"]
|
||||
pub embedded_ram4: EMBEDDEDRAM4,
|
||||
#[doc = "0x14 - CSE PRAM 5 Register"]
|
||||
pub embedded_ram5: EMBEDDEDRAM5,
|
||||
#[doc = "0x18 - CSE PRAM 6 Register"]
|
||||
pub embedded_ram6: EMBEDDEDRAM6,
|
||||
#[doc = "0x1c - CSE PRAM 7 Register"]
|
||||
pub embedded_ram7: EMBEDDEDRAM7,
|
||||
#[doc = "0x20 - CSE PRAM 8 Register"]
|
||||
pub embedded_ram8: EMBEDDEDRAM8,
|
||||
#[doc = "0x24 - CSE PRAM 9 Register"]
|
||||
pub embedded_ram9: EMBEDDEDRAM9,
|
||||
#[doc = "0x28 - CSE PRAM 10 Register"]
|
||||
pub embedded_ram10: EMBEDDEDRAM10,
|
||||
#[doc = "0x2c - CSE PRAM 11 Register"]
|
||||
pub embedded_ram11: EMBEDDEDRAM11,
|
||||
#[doc = "0x30 - CSE PRAM 12 Register"]
|
||||
pub embedded_ram12: EMBEDDEDRAM12,
|
||||
#[doc = "0x34 - CSE PRAM 13 Register"]
|
||||
pub embedded_ram13: EMBEDDEDRAM13,
|
||||
#[doc = "0x38 - CSE PRAM 14 Register"]
|
||||
pub embedded_ram14: EMBEDDEDRAM14,
|
||||
#[doc = "0x3c - CSE PRAM 15 Register"]
|
||||
pub embedded_ram15: EMBEDDEDRAM15,
|
||||
#[doc = "0x40 - CSE PRAM 16 Register"]
|
||||
pub embedded_ram16: EMBEDDEDRAM16,
|
||||
#[doc = "0x44 - CSE PRAM 17 Register"]
|
||||
pub embedded_ram17: EMBEDDEDRAM17,
|
||||
#[doc = "0x48 - CSE PRAM 18 Register"]
|
||||
pub embedded_ram18: EMBEDDEDRAM18,
|
||||
#[doc = "0x4c - CSE PRAM 19 Register"]
|
||||
pub embedded_ram19: EMBEDDEDRAM19,
|
||||
#[doc = "0x50 - CSE PRAM 20 Register"]
|
||||
pub embedded_ram20: EMBEDDEDRAM20,
|
||||
#[doc = "0x54 - CSE PRAM 21 Register"]
|
||||
pub embedded_ram21: EMBEDDEDRAM21,
|
||||
#[doc = "0x58 - CSE PRAM 22 Register"]
|
||||
pub embedded_ram22: EMBEDDEDRAM22,
|
||||
#[doc = "0x5c - CSE PRAM 23 Register"]
|
||||
pub embedded_ram23: EMBEDDEDRAM23,
|
||||
#[doc = "0x60 - CSE PRAM 24 Register"]
|
||||
pub embedded_ram24: EMBEDDEDRAM24,
|
||||
#[doc = "0x64 - CSE PRAM 25 Register"]
|
||||
pub embedded_ram25: EMBEDDEDRAM25,
|
||||
#[doc = "0x68 - CSE PRAM 26 Register"]
|
||||
pub embedded_ram26: EMBEDDEDRAM26,
|
||||
#[doc = "0x6c - CSE PRAM 27 Register"]
|
||||
pub embedded_ram27: EMBEDDEDRAM27,
|
||||
#[doc = "0x70 - CSE PRAM 28 Register"]
|
||||
pub embedded_ram28: EMBEDDEDRAM28,
|
||||
#[doc = "0x74 - CSE PRAM 29 Register"]
|
||||
pub embedded_ram29: EMBEDDEDRAM29,
|
||||
#[doc = "0x78 - CSE PRAM 30 Register"]
|
||||
pub embedded_ram30: EMBEDDEDRAM30,
|
||||
#[doc = "0x7c - CSE PRAM 31 Register"]
|
||||
pub embedded_ram31: EMBEDDEDRAM31,
|
||||
}
|
||||
#[doc = "CSE PRAM 0 Register"]
|
||||
pub struct EMBEDDEDRAM0 {
|
||||
|
|
|
|||
|
|
@ -31,8 +31,10 @@ impl<'a> _CDNEW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `CADN`"]
|
||||
pub enum CADNW {
|
||||
#[doc = "Clears only the TCDn_CSR[DONE] bit specified in the CDNE field"] _0,
|
||||
#[doc = "Clears all bits in TCDn_CSR[DONE]"] _1,
|
||||
#[doc = "Clears only the TCDn_CSR[DONE] bit specified in the CDNE field"]
|
||||
_0,
|
||||
#[doc = "Clears all bits in TCDn_CSR[DONE]"]
|
||||
_1,
|
||||
}
|
||||
impl CADNW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -87,8 +89,10 @@ impl<'a> _CADNW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `NOP`"]
|
||||
pub enum NOPW {
|
||||
#[doc = "Normal operation"] _0,
|
||||
#[doc = "No operation, ignore the other bits in this register"] _1,
|
||||
#[doc = "Normal operation"]
|
||||
_0,
|
||||
#[doc = "No operation, ignore the other bits in this register"]
|
||||
_1,
|
||||
}
|
||||
impl NOPW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
|
|||
|
|
@ -54,8 +54,10 @@ impl<'a> _CAEEW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `NOP`"]
|
||||
pub enum NOPW {
|
||||
#[doc = "Normal operation"] _0,
|
||||
#[doc = "No operation, ignore the other bits in this register"] _1,
|
||||
#[doc = "Normal operation"]
|
||||
_0,
|
||||
#[doc = "No operation, ignore the other bits in this register"]
|
||||
_1,
|
||||
}
|
||||
impl NOPW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
|
|||
|
|
@ -54,8 +54,10 @@ impl<'a> _CAERW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `NOP`"]
|
||||
pub enum NOPW {
|
||||
#[doc = "Normal operation"] _0,
|
||||
#[doc = "No operation, ignore the other bits in this register"] _1,
|
||||
#[doc = "Normal operation"]
|
||||
_0,
|
||||
#[doc = "No operation, ignore the other bits in this register"]
|
||||
_1,
|
||||
}
|
||||
impl NOPW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
|
|||
|
|
@ -54,8 +54,10 @@ impl<'a> _CAEIW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `NOP`"]
|
||||
pub enum NOPW {
|
||||
#[doc = "Normal operation"] _0,
|
||||
#[doc = "No operation, ignore the other bits in this register"] _1,
|
||||
#[doc = "Normal operation"]
|
||||
_0,
|
||||
#[doc = "No operation, ignore the other bits in this register"]
|
||||
_1,
|
||||
}
|
||||
impl NOPW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
|
|||
|
|
@ -54,8 +54,10 @@ impl<'a> _CAIRW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `NOP`"]
|
||||
pub enum NOPW {
|
||||
#[doc = "Normal operation"] _0,
|
||||
#[doc = "No operation, ignore the other bits in this register"] _1,
|
||||
#[doc = "Normal operation"]
|
||||
_0,
|
||||
#[doc = "No operation, ignore the other bits in this register"]
|
||||
_1,
|
||||
}
|
||||
impl NOPW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
|
|||
|
|
@ -87,7 +87,8 @@ impl ERCAR {
|
|||
#[doc = "Possible values of the field `HOE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum HOER {
|
||||
#[doc = "Normal operation"] _0,
|
||||
#[doc = "Normal operation"]
|
||||
_0,
|
||||
#[doc = "Any error causes the HALT bit to set. Subsequently, all service requests are ignored until the HALT bit is cleared."]
|
||||
_1,
|
||||
}
|
||||
|
|
@ -133,7 +134,8 @@ impl HOER {
|
|||
#[doc = "Possible values of the field `HALT`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum HALTR {
|
||||
#[doc = "Normal operation"] _0,
|
||||
#[doc = "Normal operation"]
|
||||
_0,
|
||||
#[doc = "Stall the start of any new channels. Executing channels are allowed to complete. Channel execution resumes when this bit is cleared."]
|
||||
_1,
|
||||
}
|
||||
|
|
@ -226,7 +228,8 @@ impl CLMR {
|
|||
#[doc = "Possible values of the field `EMLM`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum EMLMR {
|
||||
#[doc = "Disabled. TCDn.word2 is defined as a 32-bit NBYTES field."] _0,
|
||||
#[doc = "Disabled. TCDn.word2 is defined as a 32-bit NBYTES field."]
|
||||
_0,
|
||||
#[doc = "Enabled. TCDn.word2 is redefined to include individual enable fields, an offset field, and the NBYTES field. The individual enable fields allow the minor loop offset to be applied to the source address, the destination address, or both. The NBYTES field is reduced when either offset is enabled."]
|
||||
_1,
|
||||
}
|
||||
|
|
@ -272,7 +275,8 @@ impl EMLMR {
|
|||
#[doc = "Possible values of the field `ECX`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ECXR {
|
||||
#[doc = "Normal operation"] _0,
|
||||
#[doc = "Normal operation"]
|
||||
_0,
|
||||
#[doc = "Cancel the remaining data transfer in the same fashion as the CX bit. Stop the executing channel and force the minor loop to finish. The cancel takes effect after the last write of the current read/write sequence. The ECX bit clears itself after the cancel is honored. In addition to cancelling the transfer, ECX treats the cancel as an error condition, thus updating the Error Status register (DMAx_ES) and generating an optional error interrupt."]
|
||||
_1,
|
||||
}
|
||||
|
|
@ -318,7 +322,8 @@ impl ECXR {
|
|||
#[doc = "Possible values of the field `CX`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum CXR {
|
||||
#[doc = "Normal operation"] _0,
|
||||
#[doc = "Normal operation"]
|
||||
_0,
|
||||
#[doc = "Cancel the remaining data transfer. Stop the executing channel and force the minor loop to finish. The cancel takes effect after the last write of the current read/write sequence. The CX bit clears itself after the cancel has been honored. This cancel retires the channel normally as if the minor loop was completed."]
|
||||
_1,
|
||||
}
|
||||
|
|
@ -409,7 +414,8 @@ impl<'a> _ERCAW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `HOE`"]
|
||||
pub enum HOEW {
|
||||
#[doc = "Normal operation"] _0,
|
||||
#[doc = "Normal operation"]
|
||||
_0,
|
||||
#[doc = "Any error causes the HALT bit to set. Subsequently, all service requests are ignored until the HALT bit is cleared."]
|
||||
_1,
|
||||
}
|
||||
|
|
@ -466,7 +472,8 @@ impl<'a> _HOEW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `HALT`"]
|
||||
pub enum HALTW {
|
||||
#[doc = "Normal operation"] _0,
|
||||
#[doc = "Normal operation"]
|
||||
_0,
|
||||
#[doc = "Stall the start of any new channels. Executing channels are allowed to complete. Channel execution resumes when this bit is cleared."]
|
||||
_1,
|
||||
}
|
||||
|
|
@ -581,7 +588,8 @@ impl<'a> _CLMW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `EMLM`"]
|
||||
pub enum EMLMW {
|
||||
#[doc = "Disabled. TCDn.word2 is defined as a 32-bit NBYTES field."] _0,
|
||||
#[doc = "Disabled. TCDn.word2 is defined as a 32-bit NBYTES field."]
|
||||
_0,
|
||||
#[doc = "Enabled. TCDn.word2 is redefined to include individual enable fields, an offset field, and the NBYTES field. The individual enable fields allow the minor loop offset to be applied to the source address, the destination address, or both. The NBYTES field is reduced when either offset is enabled."]
|
||||
_1,
|
||||
}
|
||||
|
|
@ -638,7 +646,8 @@ impl<'a> _EMLMW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `ECX`"]
|
||||
pub enum ECXW {
|
||||
#[doc = "Normal operation"] _0,
|
||||
#[doc = "Normal operation"]
|
||||
_0,
|
||||
#[doc = "Cancel the remaining data transfer in the same fashion as the CX bit. Stop the executing channel and force the minor loop to finish. The cancel takes effect after the last write of the current read/write sequence. The ECX bit clears itself after the cancel is honored. In addition to cancelling the transfer, ECX treats the cancel as an error condition, thus updating the Error Status register (DMAx_ES) and generating an optional error interrupt."]
|
||||
_1,
|
||||
}
|
||||
|
|
@ -695,7 +704,8 @@ impl<'a> _ECXW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `CX`"]
|
||||
pub enum CXW {
|
||||
#[doc = "Normal operation"] _0,
|
||||
#[doc = "Normal operation"]
|
||||
_0,
|
||||
#[doc = "Cancel the remaining data transfer. Stop the executing channel and force the minor loop to finish. The cancel takes effect after the last write of the current read/write sequence. The CX bit clears itself after the cancel has been honored. This cancel retires the channel normally as if the minor loop was completed."]
|
||||
_1,
|
||||
}
|
||||
|
|
|
|||
|
|
@ -56,8 +56,10 @@ impl CHPRIR {
|
|||
#[doc = "Possible values of the field `DPA`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum DPAR {
|
||||
#[doc = "Channel n can suspend a lower priority channel."] _0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."] _1,
|
||||
#[doc = "Channel n can suspend a lower priority channel."]
|
||||
_0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
|
||||
_1,
|
||||
}
|
||||
impl DPAR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -101,7 +103,8 @@ impl DPAR {
|
|||
#[doc = "Possible values of the field `ECP`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ECPR {
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."] _0,
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
|
||||
_0,
|
||||
#[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
|
||||
_1,
|
||||
}
|
||||
|
|
@ -161,8 +164,10 @@ impl<'a> _CHPRIW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `DPA`"]
|
||||
pub enum DPAW {
|
||||
#[doc = "Channel n can suspend a lower priority channel."] _0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."] _1,
|
||||
#[doc = "Channel n can suspend a lower priority channel."]
|
||||
_0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
|
||||
_1,
|
||||
}
|
||||
impl DPAW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -217,7 +222,8 @@ impl<'a> _DPAW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `ECP`"]
|
||||
pub enum ECPW {
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."] _0,
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
|
||||
_0,
|
||||
#[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
|
||||
_1,
|
||||
}
|
||||
|
|
|
|||
|
|
@ -56,8 +56,10 @@ impl CHPRIR {
|
|||
#[doc = "Possible values of the field `DPA`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum DPAR {
|
||||
#[doc = "Channel n can suspend a lower priority channel."] _0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."] _1,
|
||||
#[doc = "Channel n can suspend a lower priority channel."]
|
||||
_0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
|
||||
_1,
|
||||
}
|
||||
impl DPAR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -101,7 +103,8 @@ impl DPAR {
|
|||
#[doc = "Possible values of the field `ECP`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ECPR {
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."] _0,
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
|
||||
_0,
|
||||
#[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
|
||||
_1,
|
||||
}
|
||||
|
|
@ -161,8 +164,10 @@ impl<'a> _CHPRIW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `DPA`"]
|
||||
pub enum DPAW {
|
||||
#[doc = "Channel n can suspend a lower priority channel."] _0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."] _1,
|
||||
#[doc = "Channel n can suspend a lower priority channel."]
|
||||
_0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
|
||||
_1,
|
||||
}
|
||||
impl DPAW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -217,7 +222,8 @@ impl<'a> _DPAW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `ECP`"]
|
||||
pub enum ECPW {
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."] _0,
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
|
||||
_0,
|
||||
#[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
|
||||
_1,
|
||||
}
|
||||
|
|
|
|||
|
|
@ -56,8 +56,10 @@ impl CHPRIR {
|
|||
#[doc = "Possible values of the field `DPA`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum DPAR {
|
||||
#[doc = "Channel n can suspend a lower priority channel."] _0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."] _1,
|
||||
#[doc = "Channel n can suspend a lower priority channel."]
|
||||
_0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
|
||||
_1,
|
||||
}
|
||||
impl DPAR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -101,7 +103,8 @@ impl DPAR {
|
|||
#[doc = "Possible values of the field `ECP`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ECPR {
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."] _0,
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
|
||||
_0,
|
||||
#[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
|
||||
_1,
|
||||
}
|
||||
|
|
@ -161,8 +164,10 @@ impl<'a> _CHPRIW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `DPA`"]
|
||||
pub enum DPAW {
|
||||
#[doc = "Channel n can suspend a lower priority channel."] _0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."] _1,
|
||||
#[doc = "Channel n can suspend a lower priority channel."]
|
||||
_0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
|
||||
_1,
|
||||
}
|
||||
impl DPAW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -217,7 +222,8 @@ impl<'a> _DPAW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `ECP`"]
|
||||
pub enum ECPW {
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."] _0,
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
|
||||
_0,
|
||||
#[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
|
||||
_1,
|
||||
}
|
||||
|
|
|
|||
|
|
@ -56,8 +56,10 @@ impl CHPRIR {
|
|||
#[doc = "Possible values of the field `DPA`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum DPAR {
|
||||
#[doc = "Channel n can suspend a lower priority channel."] _0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."] _1,
|
||||
#[doc = "Channel n can suspend a lower priority channel."]
|
||||
_0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
|
||||
_1,
|
||||
}
|
||||
impl DPAR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -101,7 +103,8 @@ impl DPAR {
|
|||
#[doc = "Possible values of the field `ECP`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ECPR {
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."] _0,
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
|
||||
_0,
|
||||
#[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
|
||||
_1,
|
||||
}
|
||||
|
|
@ -161,8 +164,10 @@ impl<'a> _CHPRIW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `DPA`"]
|
||||
pub enum DPAW {
|
||||
#[doc = "Channel n can suspend a lower priority channel."] _0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."] _1,
|
||||
#[doc = "Channel n can suspend a lower priority channel."]
|
||||
_0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
|
||||
_1,
|
||||
}
|
||||
impl DPAW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -217,7 +222,8 @@ impl<'a> _DPAW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `ECP`"]
|
||||
pub enum ECPW {
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."] _0,
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
|
||||
_0,
|
||||
#[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
|
||||
_1,
|
||||
}
|
||||
|
|
|
|||
|
|
@ -56,8 +56,10 @@ impl CHPRIR {
|
|||
#[doc = "Possible values of the field `DPA`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum DPAR {
|
||||
#[doc = "Channel n can suspend a lower priority channel."] _0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."] _1,
|
||||
#[doc = "Channel n can suspend a lower priority channel."]
|
||||
_0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
|
||||
_1,
|
||||
}
|
||||
impl DPAR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -101,7 +103,8 @@ impl DPAR {
|
|||
#[doc = "Possible values of the field `ECP`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ECPR {
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."] _0,
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
|
||||
_0,
|
||||
#[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
|
||||
_1,
|
||||
}
|
||||
|
|
@ -161,8 +164,10 @@ impl<'a> _CHPRIW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `DPA`"]
|
||||
pub enum DPAW {
|
||||
#[doc = "Channel n can suspend a lower priority channel."] _0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."] _1,
|
||||
#[doc = "Channel n can suspend a lower priority channel."]
|
||||
_0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
|
||||
_1,
|
||||
}
|
||||
impl DPAW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -217,7 +222,8 @@ impl<'a> _DPAW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `ECP`"]
|
||||
pub enum ECPW {
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."] _0,
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
|
||||
_0,
|
||||
#[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
|
||||
_1,
|
||||
}
|
||||
|
|
|
|||
|
|
@ -56,8 +56,10 @@ impl CHPRIR {
|
|||
#[doc = "Possible values of the field `DPA`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum DPAR {
|
||||
#[doc = "Channel n can suspend a lower priority channel."] _0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."] _1,
|
||||
#[doc = "Channel n can suspend a lower priority channel."]
|
||||
_0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
|
||||
_1,
|
||||
}
|
||||
impl DPAR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -101,7 +103,8 @@ impl DPAR {
|
|||
#[doc = "Possible values of the field `ECP`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ECPR {
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."] _0,
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
|
||||
_0,
|
||||
#[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
|
||||
_1,
|
||||
}
|
||||
|
|
@ -161,8 +164,10 @@ impl<'a> _CHPRIW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `DPA`"]
|
||||
pub enum DPAW {
|
||||
#[doc = "Channel n can suspend a lower priority channel."] _0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."] _1,
|
||||
#[doc = "Channel n can suspend a lower priority channel."]
|
||||
_0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
|
||||
_1,
|
||||
}
|
||||
impl DPAW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -217,7 +222,8 @@ impl<'a> _DPAW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `ECP`"]
|
||||
pub enum ECPW {
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."] _0,
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
|
||||
_0,
|
||||
#[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
|
||||
_1,
|
||||
}
|
||||
|
|
|
|||
|
|
@ -56,8 +56,10 @@ impl CHPRIR {
|
|||
#[doc = "Possible values of the field `DPA`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum DPAR {
|
||||
#[doc = "Channel n can suspend a lower priority channel."] _0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."] _1,
|
||||
#[doc = "Channel n can suspend a lower priority channel."]
|
||||
_0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
|
||||
_1,
|
||||
}
|
||||
impl DPAR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -101,7 +103,8 @@ impl DPAR {
|
|||
#[doc = "Possible values of the field `ECP`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ECPR {
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."] _0,
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
|
||||
_0,
|
||||
#[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
|
||||
_1,
|
||||
}
|
||||
|
|
@ -161,8 +164,10 @@ impl<'a> _CHPRIW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `DPA`"]
|
||||
pub enum DPAW {
|
||||
#[doc = "Channel n can suspend a lower priority channel."] _0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."] _1,
|
||||
#[doc = "Channel n can suspend a lower priority channel."]
|
||||
_0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
|
||||
_1,
|
||||
}
|
||||
impl DPAW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -217,7 +222,8 @@ impl<'a> _DPAW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `ECP`"]
|
||||
pub enum ECPW {
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."] _0,
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
|
||||
_0,
|
||||
#[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
|
||||
_1,
|
||||
}
|
||||
|
|
|
|||
|
|
@ -56,8 +56,10 @@ impl CHPRIR {
|
|||
#[doc = "Possible values of the field `DPA`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum DPAR {
|
||||
#[doc = "Channel n can suspend a lower priority channel."] _0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."] _1,
|
||||
#[doc = "Channel n can suspend a lower priority channel."]
|
||||
_0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
|
||||
_1,
|
||||
}
|
||||
impl DPAR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -101,7 +103,8 @@ impl DPAR {
|
|||
#[doc = "Possible values of the field `ECP`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ECPR {
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."] _0,
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
|
||||
_0,
|
||||
#[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
|
||||
_1,
|
||||
}
|
||||
|
|
@ -161,8 +164,10 @@ impl<'a> _CHPRIW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `DPA`"]
|
||||
pub enum DPAW {
|
||||
#[doc = "Channel n can suspend a lower priority channel."] _0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."] _1,
|
||||
#[doc = "Channel n can suspend a lower priority channel."]
|
||||
_0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
|
||||
_1,
|
||||
}
|
||||
impl DPAW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -217,7 +222,8 @@ impl<'a> _DPAW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `ECP`"]
|
||||
pub enum ECPW {
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."] _0,
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
|
||||
_0,
|
||||
#[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
|
||||
_1,
|
||||
}
|
||||
|
|
|
|||
|
|
@ -56,8 +56,10 @@ impl CHPRIR {
|
|||
#[doc = "Possible values of the field `DPA`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum DPAR {
|
||||
#[doc = "Channel n can suspend a lower priority channel."] _0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."] _1,
|
||||
#[doc = "Channel n can suspend a lower priority channel."]
|
||||
_0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
|
||||
_1,
|
||||
}
|
||||
impl DPAR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -101,7 +103,8 @@ impl DPAR {
|
|||
#[doc = "Possible values of the field `ECP`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ECPR {
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."] _0,
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
|
||||
_0,
|
||||
#[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
|
||||
_1,
|
||||
}
|
||||
|
|
@ -161,8 +164,10 @@ impl<'a> _CHPRIW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `DPA`"]
|
||||
pub enum DPAW {
|
||||
#[doc = "Channel n can suspend a lower priority channel."] _0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."] _1,
|
||||
#[doc = "Channel n can suspend a lower priority channel."]
|
||||
_0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
|
||||
_1,
|
||||
}
|
||||
impl DPAW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -217,7 +222,8 @@ impl<'a> _DPAW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `ECP`"]
|
||||
pub enum ECPW {
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."] _0,
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
|
||||
_0,
|
||||
#[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
|
||||
_1,
|
||||
}
|
||||
|
|
|
|||
|
|
@ -56,8 +56,10 @@ impl CHPRIR {
|
|||
#[doc = "Possible values of the field `DPA`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum DPAR {
|
||||
#[doc = "Channel n can suspend a lower priority channel."] _0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."] _1,
|
||||
#[doc = "Channel n can suspend a lower priority channel."]
|
||||
_0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
|
||||
_1,
|
||||
}
|
||||
impl DPAR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -101,7 +103,8 @@ impl DPAR {
|
|||
#[doc = "Possible values of the field `ECP`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ECPR {
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."] _0,
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
|
||||
_0,
|
||||
#[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
|
||||
_1,
|
||||
}
|
||||
|
|
@ -161,8 +164,10 @@ impl<'a> _CHPRIW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `DPA`"]
|
||||
pub enum DPAW {
|
||||
#[doc = "Channel n can suspend a lower priority channel."] _0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."] _1,
|
||||
#[doc = "Channel n can suspend a lower priority channel."]
|
||||
_0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
|
||||
_1,
|
||||
}
|
||||
impl DPAW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -217,7 +222,8 @@ impl<'a> _DPAW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `ECP`"]
|
||||
pub enum ECPW {
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."] _0,
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
|
||||
_0,
|
||||
#[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
|
||||
_1,
|
||||
}
|
||||
|
|
|
|||
|
|
@ -56,8 +56,10 @@ impl CHPRIR {
|
|||
#[doc = "Possible values of the field `DPA`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum DPAR {
|
||||
#[doc = "Channel n can suspend a lower priority channel."] _0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."] _1,
|
||||
#[doc = "Channel n can suspend a lower priority channel."]
|
||||
_0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
|
||||
_1,
|
||||
}
|
||||
impl DPAR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -101,7 +103,8 @@ impl DPAR {
|
|||
#[doc = "Possible values of the field `ECP`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ECPR {
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."] _0,
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
|
||||
_0,
|
||||
#[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
|
||||
_1,
|
||||
}
|
||||
|
|
@ -161,8 +164,10 @@ impl<'a> _CHPRIW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `DPA`"]
|
||||
pub enum DPAW {
|
||||
#[doc = "Channel n can suspend a lower priority channel."] _0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."] _1,
|
||||
#[doc = "Channel n can suspend a lower priority channel."]
|
||||
_0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
|
||||
_1,
|
||||
}
|
||||
impl DPAW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -217,7 +222,8 @@ impl<'a> _DPAW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `ECP`"]
|
||||
pub enum ECPW {
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."] _0,
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
|
||||
_0,
|
||||
#[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
|
||||
_1,
|
||||
}
|
||||
|
|
|
|||
|
|
@ -56,8 +56,10 @@ impl CHPRIR {
|
|||
#[doc = "Possible values of the field `DPA`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum DPAR {
|
||||
#[doc = "Channel n can suspend a lower priority channel."] _0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."] _1,
|
||||
#[doc = "Channel n can suspend a lower priority channel."]
|
||||
_0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
|
||||
_1,
|
||||
}
|
||||
impl DPAR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -101,7 +103,8 @@ impl DPAR {
|
|||
#[doc = "Possible values of the field `ECP`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ECPR {
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."] _0,
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
|
||||
_0,
|
||||
#[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
|
||||
_1,
|
||||
}
|
||||
|
|
@ -161,8 +164,10 @@ impl<'a> _CHPRIW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `DPA`"]
|
||||
pub enum DPAW {
|
||||
#[doc = "Channel n can suspend a lower priority channel."] _0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."] _1,
|
||||
#[doc = "Channel n can suspend a lower priority channel."]
|
||||
_0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
|
||||
_1,
|
||||
}
|
||||
impl DPAW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -217,7 +222,8 @@ impl<'a> _DPAW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `ECP`"]
|
||||
pub enum ECPW {
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."] _0,
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
|
||||
_0,
|
||||
#[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
|
||||
_1,
|
||||
}
|
||||
|
|
|
|||
|
|
@ -56,8 +56,10 @@ impl CHPRIR {
|
|||
#[doc = "Possible values of the field `DPA`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum DPAR {
|
||||
#[doc = "Channel n can suspend a lower priority channel."] _0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."] _1,
|
||||
#[doc = "Channel n can suspend a lower priority channel."]
|
||||
_0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
|
||||
_1,
|
||||
}
|
||||
impl DPAR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -101,7 +103,8 @@ impl DPAR {
|
|||
#[doc = "Possible values of the field `ECP`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ECPR {
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."] _0,
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
|
||||
_0,
|
||||
#[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
|
||||
_1,
|
||||
}
|
||||
|
|
@ -161,8 +164,10 @@ impl<'a> _CHPRIW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `DPA`"]
|
||||
pub enum DPAW {
|
||||
#[doc = "Channel n can suspend a lower priority channel."] _0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."] _1,
|
||||
#[doc = "Channel n can suspend a lower priority channel."]
|
||||
_0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
|
||||
_1,
|
||||
}
|
||||
impl DPAW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -217,7 +222,8 @@ impl<'a> _DPAW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `ECP`"]
|
||||
pub enum ECPW {
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."] _0,
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
|
||||
_0,
|
||||
#[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
|
||||
_1,
|
||||
}
|
||||
|
|
|
|||
|
|
@ -56,8 +56,10 @@ impl CHPRIR {
|
|||
#[doc = "Possible values of the field `DPA`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum DPAR {
|
||||
#[doc = "Channel n can suspend a lower priority channel."] _0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."] _1,
|
||||
#[doc = "Channel n can suspend a lower priority channel."]
|
||||
_0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
|
||||
_1,
|
||||
}
|
||||
impl DPAR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -101,7 +103,8 @@ impl DPAR {
|
|||
#[doc = "Possible values of the field `ECP`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ECPR {
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."] _0,
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
|
||||
_0,
|
||||
#[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
|
||||
_1,
|
||||
}
|
||||
|
|
@ -161,8 +164,10 @@ impl<'a> _CHPRIW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `DPA`"]
|
||||
pub enum DPAW {
|
||||
#[doc = "Channel n can suspend a lower priority channel."] _0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."] _1,
|
||||
#[doc = "Channel n can suspend a lower priority channel."]
|
||||
_0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
|
||||
_1,
|
||||
}
|
||||
impl DPAW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -217,7 +222,8 @@ impl<'a> _DPAW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `ECP`"]
|
||||
pub enum ECPW {
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."] _0,
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
|
||||
_0,
|
||||
#[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
|
||||
_1,
|
||||
}
|
||||
|
|
|
|||
|
|
@ -56,8 +56,10 @@ impl CHPRIR {
|
|||
#[doc = "Possible values of the field `DPA`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum DPAR {
|
||||
#[doc = "Channel n can suspend a lower priority channel."] _0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."] _1,
|
||||
#[doc = "Channel n can suspend a lower priority channel."]
|
||||
_0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
|
||||
_1,
|
||||
}
|
||||
impl DPAR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -101,7 +103,8 @@ impl DPAR {
|
|||
#[doc = "Possible values of the field `ECP`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ECPR {
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."] _0,
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
|
||||
_0,
|
||||
#[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
|
||||
_1,
|
||||
}
|
||||
|
|
@ -161,8 +164,10 @@ impl<'a> _CHPRIW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `DPA`"]
|
||||
pub enum DPAW {
|
||||
#[doc = "Channel n can suspend a lower priority channel."] _0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."] _1,
|
||||
#[doc = "Channel n can suspend a lower priority channel."]
|
||||
_0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
|
||||
_1,
|
||||
}
|
||||
impl DPAW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -217,7 +222,8 @@ impl<'a> _DPAW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `ECP`"]
|
||||
pub enum ECPW {
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."] _0,
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
|
||||
_0,
|
||||
#[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
|
||||
_1,
|
||||
}
|
||||
|
|
|
|||
|
|
@ -56,8 +56,10 @@ impl CHPRIR {
|
|||
#[doc = "Possible values of the field `DPA`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum DPAR {
|
||||
#[doc = "Channel n can suspend a lower priority channel."] _0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."] _1,
|
||||
#[doc = "Channel n can suspend a lower priority channel."]
|
||||
_0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
|
||||
_1,
|
||||
}
|
||||
impl DPAR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -101,7 +103,8 @@ impl DPAR {
|
|||
#[doc = "Possible values of the field `ECP`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ECPR {
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."] _0,
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
|
||||
_0,
|
||||
#[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
|
||||
_1,
|
||||
}
|
||||
|
|
@ -161,8 +164,10 @@ impl<'a> _CHPRIW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `DPA`"]
|
||||
pub enum DPAW {
|
||||
#[doc = "Channel n can suspend a lower priority channel."] _0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."] _1,
|
||||
#[doc = "Channel n can suspend a lower priority channel."]
|
||||
_0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
|
||||
_1,
|
||||
}
|
||||
impl DPAW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -217,7 +222,8 @@ impl<'a> _DPAW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `ECP`"]
|
||||
pub enum ECPW {
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."] _0,
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
|
||||
_0,
|
||||
#[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
|
||||
_1,
|
||||
}
|
||||
|
|
|
|||
|
|
@ -45,8 +45,10 @@ impl super::EARS {
|
|||
#[doc = "Possible values of the field `EDREQ_0`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum EDREQ_0R {
|
||||
#[doc = "Disable asynchronous DMA request for channel 0."] _0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 0."] _1,
|
||||
#[doc = "Disable asynchronous DMA request for channel 0."]
|
||||
_0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 0."]
|
||||
_1,
|
||||
}
|
||||
impl EDREQ_0R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -90,8 +92,10 @@ impl EDREQ_0R {
|
|||
#[doc = "Possible values of the field `EDREQ_1`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum EDREQ_1R {
|
||||
#[doc = "Disable asynchronous DMA request for channel 1"] _0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 1."] _1,
|
||||
#[doc = "Disable asynchronous DMA request for channel 1"]
|
||||
_0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 1."]
|
||||
_1,
|
||||
}
|
||||
impl EDREQ_1R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -135,8 +139,10 @@ impl EDREQ_1R {
|
|||
#[doc = "Possible values of the field `EDREQ_2`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum EDREQ_2R {
|
||||
#[doc = "Disable asynchronous DMA request for channel 2."] _0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 2."] _1,
|
||||
#[doc = "Disable asynchronous DMA request for channel 2."]
|
||||
_0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 2."]
|
||||
_1,
|
||||
}
|
||||
impl EDREQ_2R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -180,8 +186,10 @@ impl EDREQ_2R {
|
|||
#[doc = "Possible values of the field `EDREQ_3`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum EDREQ_3R {
|
||||
#[doc = "Disable asynchronous DMA request for channel 3."] _0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 3."] _1,
|
||||
#[doc = "Disable asynchronous DMA request for channel 3."]
|
||||
_0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 3."]
|
||||
_1,
|
||||
}
|
||||
impl EDREQ_3R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -225,8 +233,10 @@ impl EDREQ_3R {
|
|||
#[doc = "Possible values of the field `EDREQ_4`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum EDREQ_4R {
|
||||
#[doc = "Disable asynchronous DMA request for channel 4."] _0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 4."] _1,
|
||||
#[doc = "Disable asynchronous DMA request for channel 4."]
|
||||
_0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 4."]
|
||||
_1,
|
||||
}
|
||||
impl EDREQ_4R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -270,8 +280,10 @@ impl EDREQ_4R {
|
|||
#[doc = "Possible values of the field `EDREQ_5`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum EDREQ_5R {
|
||||
#[doc = "Disable asynchronous DMA request for channel 5."] _0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 5."] _1,
|
||||
#[doc = "Disable asynchronous DMA request for channel 5."]
|
||||
_0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 5."]
|
||||
_1,
|
||||
}
|
||||
impl EDREQ_5R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -315,8 +327,10 @@ impl EDREQ_5R {
|
|||
#[doc = "Possible values of the field `EDREQ_6`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum EDREQ_6R {
|
||||
#[doc = "Disable asynchronous DMA request for channel 6."] _0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 6."] _1,
|
||||
#[doc = "Disable asynchronous DMA request for channel 6."]
|
||||
_0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 6."]
|
||||
_1,
|
||||
}
|
||||
impl EDREQ_6R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -360,8 +374,10 @@ impl EDREQ_6R {
|
|||
#[doc = "Possible values of the field `EDREQ_7`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum EDREQ_7R {
|
||||
#[doc = "Disable asynchronous DMA request for channel 7."] _0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 7."] _1,
|
||||
#[doc = "Disable asynchronous DMA request for channel 7."]
|
||||
_0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 7."]
|
||||
_1,
|
||||
}
|
||||
impl EDREQ_7R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -405,8 +421,10 @@ impl EDREQ_7R {
|
|||
#[doc = "Possible values of the field `EDREQ_8`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum EDREQ_8R {
|
||||
#[doc = "Disable asynchronous DMA request for channel 8."] _0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 8."] _1,
|
||||
#[doc = "Disable asynchronous DMA request for channel 8."]
|
||||
_0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 8."]
|
||||
_1,
|
||||
}
|
||||
impl EDREQ_8R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -450,8 +468,10 @@ impl EDREQ_8R {
|
|||
#[doc = "Possible values of the field `EDREQ_9`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum EDREQ_9R {
|
||||
#[doc = "Disable asynchronous DMA request for channel 9."] _0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 9."] _1,
|
||||
#[doc = "Disable asynchronous DMA request for channel 9."]
|
||||
_0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 9."]
|
||||
_1,
|
||||
}
|
||||
impl EDREQ_9R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -495,8 +515,10 @@ impl EDREQ_9R {
|
|||
#[doc = "Possible values of the field `EDREQ_10`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum EDREQ_10R {
|
||||
#[doc = "Disable asynchronous DMA request for channel 10."] _0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 10."] _1,
|
||||
#[doc = "Disable asynchronous DMA request for channel 10."]
|
||||
_0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 10."]
|
||||
_1,
|
||||
}
|
||||
impl EDREQ_10R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -540,8 +562,10 @@ impl EDREQ_10R {
|
|||
#[doc = "Possible values of the field `EDREQ_11`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum EDREQ_11R {
|
||||
#[doc = "Disable asynchronous DMA request for channel 11."] _0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 11."] _1,
|
||||
#[doc = "Disable asynchronous DMA request for channel 11."]
|
||||
_0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 11."]
|
||||
_1,
|
||||
}
|
||||
impl EDREQ_11R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -585,8 +609,10 @@ impl EDREQ_11R {
|
|||
#[doc = "Possible values of the field `EDREQ_12`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum EDREQ_12R {
|
||||
#[doc = "Disable asynchronous DMA request for channel 12."] _0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 12."] _1,
|
||||
#[doc = "Disable asynchronous DMA request for channel 12."]
|
||||
_0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 12."]
|
||||
_1,
|
||||
}
|
||||
impl EDREQ_12R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -630,8 +656,10 @@ impl EDREQ_12R {
|
|||
#[doc = "Possible values of the field `EDREQ_13`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum EDREQ_13R {
|
||||
#[doc = "Disable asynchronous DMA request for channel 13."] _0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 13."] _1,
|
||||
#[doc = "Disable asynchronous DMA request for channel 13."]
|
||||
_0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 13."]
|
||||
_1,
|
||||
}
|
||||
impl EDREQ_13R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -675,8 +703,10 @@ impl EDREQ_13R {
|
|||
#[doc = "Possible values of the field `EDREQ_14`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum EDREQ_14R {
|
||||
#[doc = "Disable asynchronous DMA request for channel 14."] _0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 14."] _1,
|
||||
#[doc = "Disable asynchronous DMA request for channel 14."]
|
||||
_0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 14."]
|
||||
_1,
|
||||
}
|
||||
impl EDREQ_14R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -720,8 +750,10 @@ impl EDREQ_14R {
|
|||
#[doc = "Possible values of the field `EDREQ_15`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum EDREQ_15R {
|
||||
#[doc = "Disable asynchronous DMA request for channel 15."] _0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 15."] _1,
|
||||
#[doc = "Disable asynchronous DMA request for channel 15."]
|
||||
_0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 15."]
|
||||
_1,
|
||||
}
|
||||
impl EDREQ_15R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -764,8 +796,10 @@ impl EDREQ_15R {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `EDREQ_0`"]
|
||||
pub enum EDREQ_0W {
|
||||
#[doc = "Disable asynchronous DMA request for channel 0."] _0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 0."] _1,
|
||||
#[doc = "Disable asynchronous DMA request for channel 0."]
|
||||
_0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 0."]
|
||||
_1,
|
||||
}
|
||||
impl EDREQ_0W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -820,8 +854,10 @@ impl<'a> _EDREQ_0W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `EDREQ_1`"]
|
||||
pub enum EDREQ_1W {
|
||||
#[doc = "Disable asynchronous DMA request for channel 1"] _0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 1."] _1,
|
||||
#[doc = "Disable asynchronous DMA request for channel 1"]
|
||||
_0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 1."]
|
||||
_1,
|
||||
}
|
||||
impl EDREQ_1W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -876,8 +912,10 @@ impl<'a> _EDREQ_1W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `EDREQ_2`"]
|
||||
pub enum EDREQ_2W {
|
||||
#[doc = "Disable asynchronous DMA request for channel 2."] _0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 2."] _1,
|
||||
#[doc = "Disable asynchronous DMA request for channel 2."]
|
||||
_0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 2."]
|
||||
_1,
|
||||
}
|
||||
impl EDREQ_2W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -932,8 +970,10 @@ impl<'a> _EDREQ_2W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `EDREQ_3`"]
|
||||
pub enum EDREQ_3W {
|
||||
#[doc = "Disable asynchronous DMA request for channel 3."] _0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 3."] _1,
|
||||
#[doc = "Disable asynchronous DMA request for channel 3."]
|
||||
_0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 3."]
|
||||
_1,
|
||||
}
|
||||
impl EDREQ_3W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -988,8 +1028,10 @@ impl<'a> _EDREQ_3W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `EDREQ_4`"]
|
||||
pub enum EDREQ_4W {
|
||||
#[doc = "Disable asynchronous DMA request for channel 4."] _0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 4."] _1,
|
||||
#[doc = "Disable asynchronous DMA request for channel 4."]
|
||||
_0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 4."]
|
||||
_1,
|
||||
}
|
||||
impl EDREQ_4W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1044,8 +1086,10 @@ impl<'a> _EDREQ_4W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `EDREQ_5`"]
|
||||
pub enum EDREQ_5W {
|
||||
#[doc = "Disable asynchronous DMA request for channel 5."] _0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 5."] _1,
|
||||
#[doc = "Disable asynchronous DMA request for channel 5."]
|
||||
_0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 5."]
|
||||
_1,
|
||||
}
|
||||
impl EDREQ_5W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1100,8 +1144,10 @@ impl<'a> _EDREQ_5W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `EDREQ_6`"]
|
||||
pub enum EDREQ_6W {
|
||||
#[doc = "Disable asynchronous DMA request for channel 6."] _0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 6."] _1,
|
||||
#[doc = "Disable asynchronous DMA request for channel 6."]
|
||||
_0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 6."]
|
||||
_1,
|
||||
}
|
||||
impl EDREQ_6W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1156,8 +1202,10 @@ impl<'a> _EDREQ_6W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `EDREQ_7`"]
|
||||
pub enum EDREQ_7W {
|
||||
#[doc = "Disable asynchronous DMA request for channel 7."] _0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 7."] _1,
|
||||
#[doc = "Disable asynchronous DMA request for channel 7."]
|
||||
_0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 7."]
|
||||
_1,
|
||||
}
|
||||
impl EDREQ_7W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1212,8 +1260,10 @@ impl<'a> _EDREQ_7W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `EDREQ_8`"]
|
||||
pub enum EDREQ_8W {
|
||||
#[doc = "Disable asynchronous DMA request for channel 8."] _0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 8."] _1,
|
||||
#[doc = "Disable asynchronous DMA request for channel 8."]
|
||||
_0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 8."]
|
||||
_1,
|
||||
}
|
||||
impl EDREQ_8W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1268,8 +1318,10 @@ impl<'a> _EDREQ_8W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `EDREQ_9`"]
|
||||
pub enum EDREQ_9W {
|
||||
#[doc = "Disable asynchronous DMA request for channel 9."] _0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 9."] _1,
|
||||
#[doc = "Disable asynchronous DMA request for channel 9."]
|
||||
_0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 9."]
|
||||
_1,
|
||||
}
|
||||
impl EDREQ_9W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1324,8 +1376,10 @@ impl<'a> _EDREQ_9W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `EDREQ_10`"]
|
||||
pub enum EDREQ_10W {
|
||||
#[doc = "Disable asynchronous DMA request for channel 10."] _0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 10."] _1,
|
||||
#[doc = "Disable asynchronous DMA request for channel 10."]
|
||||
_0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 10."]
|
||||
_1,
|
||||
}
|
||||
impl EDREQ_10W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1380,8 +1434,10 @@ impl<'a> _EDREQ_10W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `EDREQ_11`"]
|
||||
pub enum EDREQ_11W {
|
||||
#[doc = "Disable asynchronous DMA request for channel 11."] _0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 11."] _1,
|
||||
#[doc = "Disable asynchronous DMA request for channel 11."]
|
||||
_0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 11."]
|
||||
_1,
|
||||
}
|
||||
impl EDREQ_11W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1436,8 +1492,10 @@ impl<'a> _EDREQ_11W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `EDREQ_12`"]
|
||||
pub enum EDREQ_12W {
|
||||
#[doc = "Disable asynchronous DMA request for channel 12."] _0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 12."] _1,
|
||||
#[doc = "Disable asynchronous DMA request for channel 12."]
|
||||
_0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 12."]
|
||||
_1,
|
||||
}
|
||||
impl EDREQ_12W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1492,8 +1550,10 @@ impl<'a> _EDREQ_12W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `EDREQ_13`"]
|
||||
pub enum EDREQ_13W {
|
||||
#[doc = "Disable asynchronous DMA request for channel 13."] _0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 13."] _1,
|
||||
#[doc = "Disable asynchronous DMA request for channel 13."]
|
||||
_0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 13."]
|
||||
_1,
|
||||
}
|
||||
impl EDREQ_13W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1548,8 +1608,10 @@ impl<'a> _EDREQ_13W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `EDREQ_14`"]
|
||||
pub enum EDREQ_14W {
|
||||
#[doc = "Disable asynchronous DMA request for channel 14."] _0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 14."] _1,
|
||||
#[doc = "Disable asynchronous DMA request for channel 14."]
|
||||
_0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 14."]
|
||||
_1,
|
||||
}
|
||||
impl EDREQ_14W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1604,8 +1666,10 @@ impl<'a> _EDREQ_14W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `EDREQ_15`"]
|
||||
pub enum EDREQ_15W {
|
||||
#[doc = "Disable asynchronous DMA request for channel 15."] _0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 15."] _1,
|
||||
#[doc = "Disable asynchronous DMA request for channel 15."]
|
||||
_0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 15."]
|
||||
_1,
|
||||
}
|
||||
impl EDREQ_15W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
|
|||
|
|
@ -45,7 +45,8 @@ impl super::EEI {
|
|||
#[doc = "Possible values of the field `EEI0`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum EEI0R {
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"] _0,
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"]
|
||||
_0,
|
||||
#[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
|
||||
_1,
|
||||
}
|
||||
|
|
@ -91,7 +92,8 @@ impl EEI0R {
|
|||
#[doc = "Possible values of the field `EEI1`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum EEI1R {
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"] _0,
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"]
|
||||
_0,
|
||||
#[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
|
||||
_1,
|
||||
}
|
||||
|
|
@ -137,7 +139,8 @@ impl EEI1R {
|
|||
#[doc = "Possible values of the field `EEI2`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum EEI2R {
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"] _0,
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"]
|
||||
_0,
|
||||
#[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
|
||||
_1,
|
||||
}
|
||||
|
|
@ -183,7 +186,8 @@ impl EEI2R {
|
|||
#[doc = "Possible values of the field `EEI3`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum EEI3R {
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"] _0,
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"]
|
||||
_0,
|
||||
#[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
|
||||
_1,
|
||||
}
|
||||
|
|
@ -229,7 +233,8 @@ impl EEI3R {
|
|||
#[doc = "Possible values of the field `EEI4`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum EEI4R {
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"] _0,
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"]
|
||||
_0,
|
||||
#[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
|
||||
_1,
|
||||
}
|
||||
|
|
@ -275,7 +280,8 @@ impl EEI4R {
|
|||
#[doc = "Possible values of the field `EEI5`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum EEI5R {
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"] _0,
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"]
|
||||
_0,
|
||||
#[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
|
||||
_1,
|
||||
}
|
||||
|
|
@ -321,7 +327,8 @@ impl EEI5R {
|
|||
#[doc = "Possible values of the field `EEI6`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum EEI6R {
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"] _0,
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"]
|
||||
_0,
|
||||
#[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
|
||||
_1,
|
||||
}
|
||||
|
|
@ -367,7 +374,8 @@ impl EEI6R {
|
|||
#[doc = "Possible values of the field `EEI7`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum EEI7R {
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"] _0,
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"]
|
||||
_0,
|
||||
#[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
|
||||
_1,
|
||||
}
|
||||
|
|
@ -413,7 +421,8 @@ impl EEI7R {
|
|||
#[doc = "Possible values of the field `EEI8`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum EEI8R {
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"] _0,
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"]
|
||||
_0,
|
||||
#[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
|
||||
_1,
|
||||
}
|
||||
|
|
@ -459,7 +468,8 @@ impl EEI8R {
|
|||
#[doc = "Possible values of the field `EEI9`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum EEI9R {
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"] _0,
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"]
|
||||
_0,
|
||||
#[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
|
||||
_1,
|
||||
}
|
||||
|
|
@ -505,7 +515,8 @@ impl EEI9R {
|
|||
#[doc = "Possible values of the field `EEI10`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum EEI10R {
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"] _0,
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"]
|
||||
_0,
|
||||
#[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
|
||||
_1,
|
||||
}
|
||||
|
|
@ -551,7 +562,8 @@ impl EEI10R {
|
|||
#[doc = "Possible values of the field `EEI11`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum EEI11R {
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"] _0,
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"]
|
||||
_0,
|
||||
#[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
|
||||
_1,
|
||||
}
|
||||
|
|
@ -597,7 +609,8 @@ impl EEI11R {
|
|||
#[doc = "Possible values of the field `EEI12`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum EEI12R {
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"] _0,
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"]
|
||||
_0,
|
||||
#[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
|
||||
_1,
|
||||
}
|
||||
|
|
@ -643,7 +656,8 @@ impl EEI12R {
|
|||
#[doc = "Possible values of the field `EEI13`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum EEI13R {
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"] _0,
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"]
|
||||
_0,
|
||||
#[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
|
||||
_1,
|
||||
}
|
||||
|
|
@ -689,7 +703,8 @@ impl EEI13R {
|
|||
#[doc = "Possible values of the field `EEI14`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum EEI14R {
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"] _0,
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"]
|
||||
_0,
|
||||
#[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
|
||||
_1,
|
||||
}
|
||||
|
|
@ -735,7 +750,8 @@ impl EEI14R {
|
|||
#[doc = "Possible values of the field `EEI15`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum EEI15R {
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"] _0,
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"]
|
||||
_0,
|
||||
#[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
|
||||
_1,
|
||||
}
|
||||
|
|
@ -780,7 +796,8 @@ impl EEI15R {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `EEI0`"]
|
||||
pub enum EEI0W {
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"] _0,
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"]
|
||||
_0,
|
||||
#[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
|
||||
_1,
|
||||
}
|
||||
|
|
@ -837,7 +854,8 @@ impl<'a> _EEI0W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `EEI1`"]
|
||||
pub enum EEI1W {
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"] _0,
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"]
|
||||
_0,
|
||||
#[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
|
||||
_1,
|
||||
}
|
||||
|
|
@ -894,7 +912,8 @@ impl<'a> _EEI1W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `EEI2`"]
|
||||
pub enum EEI2W {
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"] _0,
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"]
|
||||
_0,
|
||||
#[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
|
||||
_1,
|
||||
}
|
||||
|
|
@ -951,7 +970,8 @@ impl<'a> _EEI2W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `EEI3`"]
|
||||
pub enum EEI3W {
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"] _0,
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"]
|
||||
_0,
|
||||
#[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
|
||||
_1,
|
||||
}
|
||||
|
|
@ -1008,7 +1028,8 @@ impl<'a> _EEI3W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `EEI4`"]
|
||||
pub enum EEI4W {
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"] _0,
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"]
|
||||
_0,
|
||||
#[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
|
||||
_1,
|
||||
}
|
||||
|
|
@ -1065,7 +1086,8 @@ impl<'a> _EEI4W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `EEI5`"]
|
||||
pub enum EEI5W {
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"] _0,
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"]
|
||||
_0,
|
||||
#[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
|
||||
_1,
|
||||
}
|
||||
|
|
@ -1122,7 +1144,8 @@ impl<'a> _EEI5W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `EEI6`"]
|
||||
pub enum EEI6W {
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"] _0,
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"]
|
||||
_0,
|
||||
#[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
|
||||
_1,
|
||||
}
|
||||
|
|
@ -1179,7 +1202,8 @@ impl<'a> _EEI6W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `EEI7`"]
|
||||
pub enum EEI7W {
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"] _0,
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"]
|
||||
_0,
|
||||
#[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
|
||||
_1,
|
||||
}
|
||||
|
|
@ -1236,7 +1260,8 @@ impl<'a> _EEI7W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `EEI8`"]
|
||||
pub enum EEI8W {
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"] _0,
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"]
|
||||
_0,
|
||||
#[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
|
||||
_1,
|
||||
}
|
||||
|
|
@ -1293,7 +1318,8 @@ impl<'a> _EEI8W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `EEI9`"]
|
||||
pub enum EEI9W {
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"] _0,
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"]
|
||||
_0,
|
||||
#[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
|
||||
_1,
|
||||
}
|
||||
|
|
@ -1350,7 +1376,8 @@ impl<'a> _EEI9W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `EEI10`"]
|
||||
pub enum EEI10W {
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"] _0,
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"]
|
||||
_0,
|
||||
#[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
|
||||
_1,
|
||||
}
|
||||
|
|
@ -1407,7 +1434,8 @@ impl<'a> _EEI10W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `EEI11`"]
|
||||
pub enum EEI11W {
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"] _0,
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"]
|
||||
_0,
|
||||
#[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
|
||||
_1,
|
||||
}
|
||||
|
|
@ -1464,7 +1492,8 @@ impl<'a> _EEI11W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `EEI12`"]
|
||||
pub enum EEI12W {
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"] _0,
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"]
|
||||
_0,
|
||||
#[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
|
||||
_1,
|
||||
}
|
||||
|
|
@ -1521,7 +1550,8 @@ impl<'a> _EEI12W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `EEI13`"]
|
||||
pub enum EEI13W {
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"] _0,
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"]
|
||||
_0,
|
||||
#[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
|
||||
_1,
|
||||
}
|
||||
|
|
@ -1578,7 +1608,8 @@ impl<'a> _EEI13W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `EEI14`"]
|
||||
pub enum EEI14W {
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"] _0,
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"]
|
||||
_0,
|
||||
#[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
|
||||
_1,
|
||||
}
|
||||
|
|
@ -1635,7 +1666,8 @@ impl<'a> _EEI14W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `EEI15`"]
|
||||
pub enum EEI15W {
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"] _0,
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"]
|
||||
_0,
|
||||
#[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
|
||||
_1,
|
||||
}
|
||||
|
|
|
|||
|
|
@ -45,8 +45,10 @@ impl super::ERQ {
|
|||
#[doc = "Possible values of the field `ERQ0`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ERQ0R {
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"] _0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"] _1,
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"]
|
||||
_0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ERQ0R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -90,8 +92,10 @@ impl ERQ0R {
|
|||
#[doc = "Possible values of the field `ERQ1`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ERQ1R {
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"] _0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"] _1,
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"]
|
||||
_0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ERQ1R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -135,8 +139,10 @@ impl ERQ1R {
|
|||
#[doc = "Possible values of the field `ERQ2`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ERQ2R {
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"] _0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"] _1,
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"]
|
||||
_0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ERQ2R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -180,8 +186,10 @@ impl ERQ2R {
|
|||
#[doc = "Possible values of the field `ERQ3`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ERQ3R {
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"] _0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"] _1,
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"]
|
||||
_0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ERQ3R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -225,8 +233,10 @@ impl ERQ3R {
|
|||
#[doc = "Possible values of the field `ERQ4`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ERQ4R {
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"] _0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"] _1,
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"]
|
||||
_0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ERQ4R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -270,8 +280,10 @@ impl ERQ4R {
|
|||
#[doc = "Possible values of the field `ERQ5`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ERQ5R {
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"] _0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"] _1,
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"]
|
||||
_0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ERQ5R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -315,8 +327,10 @@ impl ERQ5R {
|
|||
#[doc = "Possible values of the field `ERQ6`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ERQ6R {
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"] _0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"] _1,
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"]
|
||||
_0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ERQ6R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -360,8 +374,10 @@ impl ERQ6R {
|
|||
#[doc = "Possible values of the field `ERQ7`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ERQ7R {
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"] _0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"] _1,
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"]
|
||||
_0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ERQ7R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -405,8 +421,10 @@ impl ERQ7R {
|
|||
#[doc = "Possible values of the field `ERQ8`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ERQ8R {
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"] _0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"] _1,
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"]
|
||||
_0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ERQ8R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -450,8 +468,10 @@ impl ERQ8R {
|
|||
#[doc = "Possible values of the field `ERQ9`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ERQ9R {
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"] _0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"] _1,
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"]
|
||||
_0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ERQ9R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -495,8 +515,10 @@ impl ERQ9R {
|
|||
#[doc = "Possible values of the field `ERQ10`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ERQ10R {
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"] _0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"] _1,
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"]
|
||||
_0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ERQ10R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -540,8 +562,10 @@ impl ERQ10R {
|
|||
#[doc = "Possible values of the field `ERQ11`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ERQ11R {
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"] _0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"] _1,
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"]
|
||||
_0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ERQ11R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -585,8 +609,10 @@ impl ERQ11R {
|
|||
#[doc = "Possible values of the field `ERQ12`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ERQ12R {
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"] _0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"] _1,
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"]
|
||||
_0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ERQ12R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -630,8 +656,10 @@ impl ERQ12R {
|
|||
#[doc = "Possible values of the field `ERQ13`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ERQ13R {
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"] _0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"] _1,
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"]
|
||||
_0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ERQ13R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -675,8 +703,10 @@ impl ERQ13R {
|
|||
#[doc = "Possible values of the field `ERQ14`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ERQ14R {
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"] _0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"] _1,
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"]
|
||||
_0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ERQ14R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -720,8 +750,10 @@ impl ERQ14R {
|
|||
#[doc = "Possible values of the field `ERQ15`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ERQ15R {
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"] _0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"] _1,
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"]
|
||||
_0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ERQ15R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -764,8 +796,10 @@ impl ERQ15R {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `ERQ0`"]
|
||||
pub enum ERQ0W {
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"] _0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"] _1,
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"]
|
||||
_0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ERQ0W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -820,8 +854,10 @@ impl<'a> _ERQ0W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `ERQ1`"]
|
||||
pub enum ERQ1W {
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"] _0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"] _1,
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"]
|
||||
_0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ERQ1W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -876,8 +912,10 @@ impl<'a> _ERQ1W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `ERQ2`"]
|
||||
pub enum ERQ2W {
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"] _0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"] _1,
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"]
|
||||
_0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ERQ2W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -932,8 +970,10 @@ impl<'a> _ERQ2W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `ERQ3`"]
|
||||
pub enum ERQ3W {
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"] _0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"] _1,
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"]
|
||||
_0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ERQ3W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -988,8 +1028,10 @@ impl<'a> _ERQ3W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `ERQ4`"]
|
||||
pub enum ERQ4W {
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"] _0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"] _1,
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"]
|
||||
_0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ERQ4W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1044,8 +1086,10 @@ impl<'a> _ERQ4W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `ERQ5`"]
|
||||
pub enum ERQ5W {
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"] _0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"] _1,
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"]
|
||||
_0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ERQ5W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1100,8 +1144,10 @@ impl<'a> _ERQ5W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `ERQ6`"]
|
||||
pub enum ERQ6W {
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"] _0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"] _1,
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"]
|
||||
_0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ERQ6W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1156,8 +1202,10 @@ impl<'a> _ERQ6W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `ERQ7`"]
|
||||
pub enum ERQ7W {
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"] _0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"] _1,
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"]
|
||||
_0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ERQ7W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1212,8 +1260,10 @@ impl<'a> _ERQ7W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `ERQ8`"]
|
||||
pub enum ERQ8W {
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"] _0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"] _1,
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"]
|
||||
_0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ERQ8W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1268,8 +1318,10 @@ impl<'a> _ERQ8W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `ERQ9`"]
|
||||
pub enum ERQ9W {
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"] _0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"] _1,
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"]
|
||||
_0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ERQ9W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1324,8 +1376,10 @@ impl<'a> _ERQ9W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `ERQ10`"]
|
||||
pub enum ERQ10W {
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"] _0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"] _1,
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"]
|
||||
_0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ERQ10W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1380,8 +1434,10 @@ impl<'a> _ERQ10W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `ERQ11`"]
|
||||
pub enum ERQ11W {
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"] _0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"] _1,
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"]
|
||||
_0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ERQ11W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1436,8 +1492,10 @@ impl<'a> _ERQ11W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `ERQ12`"]
|
||||
pub enum ERQ12W {
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"] _0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"] _1,
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"]
|
||||
_0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ERQ12W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1492,8 +1550,10 @@ impl<'a> _ERQ12W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `ERQ13`"]
|
||||
pub enum ERQ13W {
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"] _0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"] _1,
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"]
|
||||
_0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ERQ13W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1548,8 +1608,10 @@ impl<'a> _ERQ13W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `ERQ14`"]
|
||||
pub enum ERQ14W {
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"] _0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"] _1,
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"]
|
||||
_0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ERQ14W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1604,8 +1666,10 @@ impl<'a> _ERQ14W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `ERQ15`"]
|
||||
pub enum ERQ15W {
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"] _0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"] _1,
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"]
|
||||
_0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ERQ15W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
|
|||
|
|
@ -45,8 +45,10 @@ impl super::ERR {
|
|||
#[doc = "Possible values of the field `ERR0`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ERR0R {
|
||||
#[doc = "An error in this channel has not occurred"] _0,
|
||||
#[doc = "An error in this channel has occurred"] _1,
|
||||
#[doc = "An error in this channel has not occurred"]
|
||||
_0,
|
||||
#[doc = "An error in this channel has occurred"]
|
||||
_1,
|
||||
}
|
||||
impl ERR0R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -90,8 +92,10 @@ impl ERR0R {
|
|||
#[doc = "Possible values of the field `ERR1`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ERR1R {
|
||||
#[doc = "An error in this channel has not occurred"] _0,
|
||||
#[doc = "An error in this channel has occurred"] _1,
|
||||
#[doc = "An error in this channel has not occurred"]
|
||||
_0,
|
||||
#[doc = "An error in this channel has occurred"]
|
||||
_1,
|
||||
}
|
||||
impl ERR1R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -135,8 +139,10 @@ impl ERR1R {
|
|||
#[doc = "Possible values of the field `ERR2`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ERR2R {
|
||||
#[doc = "An error in this channel has not occurred"] _0,
|
||||
#[doc = "An error in this channel has occurred"] _1,
|
||||
#[doc = "An error in this channel has not occurred"]
|
||||
_0,
|
||||
#[doc = "An error in this channel has occurred"]
|
||||
_1,
|
||||
}
|
||||
impl ERR2R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -180,8 +186,10 @@ impl ERR2R {
|
|||
#[doc = "Possible values of the field `ERR3`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ERR3R {
|
||||
#[doc = "An error in this channel has not occurred"] _0,
|
||||
#[doc = "An error in this channel has occurred"] _1,
|
||||
#[doc = "An error in this channel has not occurred"]
|
||||
_0,
|
||||
#[doc = "An error in this channel has occurred"]
|
||||
_1,
|
||||
}
|
||||
impl ERR3R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -225,8 +233,10 @@ impl ERR3R {
|
|||
#[doc = "Possible values of the field `ERR4`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ERR4R {
|
||||
#[doc = "An error in this channel has not occurred"] _0,
|
||||
#[doc = "An error in this channel has occurred"] _1,
|
||||
#[doc = "An error in this channel has not occurred"]
|
||||
_0,
|
||||
#[doc = "An error in this channel has occurred"]
|
||||
_1,
|
||||
}
|
||||
impl ERR4R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -270,8 +280,10 @@ impl ERR4R {
|
|||
#[doc = "Possible values of the field `ERR5`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ERR5R {
|
||||
#[doc = "An error in this channel has not occurred"] _0,
|
||||
#[doc = "An error in this channel has occurred"] _1,
|
||||
#[doc = "An error in this channel has not occurred"]
|
||||
_0,
|
||||
#[doc = "An error in this channel has occurred"]
|
||||
_1,
|
||||
}
|
||||
impl ERR5R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -315,8 +327,10 @@ impl ERR5R {
|
|||
#[doc = "Possible values of the field `ERR6`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ERR6R {
|
||||
#[doc = "An error in this channel has not occurred"] _0,
|
||||
#[doc = "An error in this channel has occurred"] _1,
|
||||
#[doc = "An error in this channel has not occurred"]
|
||||
_0,
|
||||
#[doc = "An error in this channel has occurred"]
|
||||
_1,
|
||||
}
|
||||
impl ERR6R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -360,8 +374,10 @@ impl ERR6R {
|
|||
#[doc = "Possible values of the field `ERR7`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ERR7R {
|
||||
#[doc = "An error in this channel has not occurred"] _0,
|
||||
#[doc = "An error in this channel has occurred"] _1,
|
||||
#[doc = "An error in this channel has not occurred"]
|
||||
_0,
|
||||
#[doc = "An error in this channel has occurred"]
|
||||
_1,
|
||||
}
|
||||
impl ERR7R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -405,8 +421,10 @@ impl ERR7R {
|
|||
#[doc = "Possible values of the field `ERR8`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ERR8R {
|
||||
#[doc = "An error in this channel has not occurred"] _0,
|
||||
#[doc = "An error in this channel has occurred"] _1,
|
||||
#[doc = "An error in this channel has not occurred"]
|
||||
_0,
|
||||
#[doc = "An error in this channel has occurred"]
|
||||
_1,
|
||||
}
|
||||
impl ERR8R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -450,8 +468,10 @@ impl ERR8R {
|
|||
#[doc = "Possible values of the field `ERR9`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ERR9R {
|
||||
#[doc = "An error in this channel has not occurred"] _0,
|
||||
#[doc = "An error in this channel has occurred"] _1,
|
||||
#[doc = "An error in this channel has not occurred"]
|
||||
_0,
|
||||
#[doc = "An error in this channel has occurred"]
|
||||
_1,
|
||||
}
|
||||
impl ERR9R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -495,8 +515,10 @@ impl ERR9R {
|
|||
#[doc = "Possible values of the field `ERR10`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ERR10R {
|
||||
#[doc = "An error in this channel has not occurred"] _0,
|
||||
#[doc = "An error in this channel has occurred"] _1,
|
||||
#[doc = "An error in this channel has not occurred"]
|
||||
_0,
|
||||
#[doc = "An error in this channel has occurred"]
|
||||
_1,
|
||||
}
|
||||
impl ERR10R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -540,8 +562,10 @@ impl ERR10R {
|
|||
#[doc = "Possible values of the field `ERR11`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ERR11R {
|
||||
#[doc = "An error in this channel has not occurred"] _0,
|
||||
#[doc = "An error in this channel has occurred"] _1,
|
||||
#[doc = "An error in this channel has not occurred"]
|
||||
_0,
|
||||
#[doc = "An error in this channel has occurred"]
|
||||
_1,
|
||||
}
|
||||
impl ERR11R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -585,8 +609,10 @@ impl ERR11R {
|
|||
#[doc = "Possible values of the field `ERR12`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ERR12R {
|
||||
#[doc = "An error in this channel has not occurred"] _0,
|
||||
#[doc = "An error in this channel has occurred"] _1,
|
||||
#[doc = "An error in this channel has not occurred"]
|
||||
_0,
|
||||
#[doc = "An error in this channel has occurred"]
|
||||
_1,
|
||||
}
|
||||
impl ERR12R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -630,8 +656,10 @@ impl ERR12R {
|
|||
#[doc = "Possible values of the field `ERR13`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ERR13R {
|
||||
#[doc = "An error in this channel has not occurred"] _0,
|
||||
#[doc = "An error in this channel has occurred"] _1,
|
||||
#[doc = "An error in this channel has not occurred"]
|
||||
_0,
|
||||
#[doc = "An error in this channel has occurred"]
|
||||
_1,
|
||||
}
|
||||
impl ERR13R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -675,8 +703,10 @@ impl ERR13R {
|
|||
#[doc = "Possible values of the field `ERR14`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ERR14R {
|
||||
#[doc = "An error in this channel has not occurred"] _0,
|
||||
#[doc = "An error in this channel has occurred"] _1,
|
||||
#[doc = "An error in this channel has not occurred"]
|
||||
_0,
|
||||
#[doc = "An error in this channel has occurred"]
|
||||
_1,
|
||||
}
|
||||
impl ERR14R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -720,8 +750,10 @@ impl ERR14R {
|
|||
#[doc = "Possible values of the field `ERR15`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ERR15R {
|
||||
#[doc = "An error in this channel has not occurred"] _0,
|
||||
#[doc = "An error in this channel has occurred"] _1,
|
||||
#[doc = "An error in this channel has not occurred"]
|
||||
_0,
|
||||
#[doc = "An error in this channel has occurred"]
|
||||
_1,
|
||||
}
|
||||
impl ERR15R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -764,8 +796,10 @@ impl ERR15R {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `ERR0`"]
|
||||
pub enum ERR0W {
|
||||
#[doc = "An error in this channel has not occurred"] _0,
|
||||
#[doc = "An error in this channel has occurred"] _1,
|
||||
#[doc = "An error in this channel has not occurred"]
|
||||
_0,
|
||||
#[doc = "An error in this channel has occurred"]
|
||||
_1,
|
||||
}
|
||||
impl ERR0W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -820,8 +854,10 @@ impl<'a> _ERR0W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `ERR1`"]
|
||||
pub enum ERR1W {
|
||||
#[doc = "An error in this channel has not occurred"] _0,
|
||||
#[doc = "An error in this channel has occurred"] _1,
|
||||
#[doc = "An error in this channel has not occurred"]
|
||||
_0,
|
||||
#[doc = "An error in this channel has occurred"]
|
||||
_1,
|
||||
}
|
||||
impl ERR1W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -876,8 +912,10 @@ impl<'a> _ERR1W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `ERR2`"]
|
||||
pub enum ERR2W {
|
||||
#[doc = "An error in this channel has not occurred"] _0,
|
||||
#[doc = "An error in this channel has occurred"] _1,
|
||||
#[doc = "An error in this channel has not occurred"]
|
||||
_0,
|
||||
#[doc = "An error in this channel has occurred"]
|
||||
_1,
|
||||
}
|
||||
impl ERR2W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -932,8 +970,10 @@ impl<'a> _ERR2W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `ERR3`"]
|
||||
pub enum ERR3W {
|
||||
#[doc = "An error in this channel has not occurred"] _0,
|
||||
#[doc = "An error in this channel has occurred"] _1,
|
||||
#[doc = "An error in this channel has not occurred"]
|
||||
_0,
|
||||
#[doc = "An error in this channel has occurred"]
|
||||
_1,
|
||||
}
|
||||
impl ERR3W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -988,8 +1028,10 @@ impl<'a> _ERR3W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `ERR4`"]
|
||||
pub enum ERR4W {
|
||||
#[doc = "An error in this channel has not occurred"] _0,
|
||||
#[doc = "An error in this channel has occurred"] _1,
|
||||
#[doc = "An error in this channel has not occurred"]
|
||||
_0,
|
||||
#[doc = "An error in this channel has occurred"]
|
||||
_1,
|
||||
}
|
||||
impl ERR4W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1044,8 +1086,10 @@ impl<'a> _ERR4W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `ERR5`"]
|
||||
pub enum ERR5W {
|
||||
#[doc = "An error in this channel has not occurred"] _0,
|
||||
#[doc = "An error in this channel has occurred"] _1,
|
||||
#[doc = "An error in this channel has not occurred"]
|
||||
_0,
|
||||
#[doc = "An error in this channel has occurred"]
|
||||
_1,
|
||||
}
|
||||
impl ERR5W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1100,8 +1144,10 @@ impl<'a> _ERR5W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `ERR6`"]
|
||||
pub enum ERR6W {
|
||||
#[doc = "An error in this channel has not occurred"] _0,
|
||||
#[doc = "An error in this channel has occurred"] _1,
|
||||
#[doc = "An error in this channel has not occurred"]
|
||||
_0,
|
||||
#[doc = "An error in this channel has occurred"]
|
||||
_1,
|
||||
}
|
||||
impl ERR6W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1156,8 +1202,10 @@ impl<'a> _ERR6W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `ERR7`"]
|
||||
pub enum ERR7W {
|
||||
#[doc = "An error in this channel has not occurred"] _0,
|
||||
#[doc = "An error in this channel has occurred"] _1,
|
||||
#[doc = "An error in this channel has not occurred"]
|
||||
_0,
|
||||
#[doc = "An error in this channel has occurred"]
|
||||
_1,
|
||||
}
|
||||
impl ERR7W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1212,8 +1260,10 @@ impl<'a> _ERR7W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `ERR8`"]
|
||||
pub enum ERR8W {
|
||||
#[doc = "An error in this channel has not occurred"] _0,
|
||||
#[doc = "An error in this channel has occurred"] _1,
|
||||
#[doc = "An error in this channel has not occurred"]
|
||||
_0,
|
||||
#[doc = "An error in this channel has occurred"]
|
||||
_1,
|
||||
}
|
||||
impl ERR8W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1268,8 +1318,10 @@ impl<'a> _ERR8W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `ERR9`"]
|
||||
pub enum ERR9W {
|
||||
#[doc = "An error in this channel has not occurred"] _0,
|
||||
#[doc = "An error in this channel has occurred"] _1,
|
||||
#[doc = "An error in this channel has not occurred"]
|
||||
_0,
|
||||
#[doc = "An error in this channel has occurred"]
|
||||
_1,
|
||||
}
|
||||
impl ERR9W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1324,8 +1376,10 @@ impl<'a> _ERR9W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `ERR10`"]
|
||||
pub enum ERR10W {
|
||||
#[doc = "An error in this channel has not occurred"] _0,
|
||||
#[doc = "An error in this channel has occurred"] _1,
|
||||
#[doc = "An error in this channel has not occurred"]
|
||||
_0,
|
||||
#[doc = "An error in this channel has occurred"]
|
||||
_1,
|
||||
}
|
||||
impl ERR10W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1380,8 +1434,10 @@ impl<'a> _ERR10W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `ERR11`"]
|
||||
pub enum ERR11W {
|
||||
#[doc = "An error in this channel has not occurred"] _0,
|
||||
#[doc = "An error in this channel has occurred"] _1,
|
||||
#[doc = "An error in this channel has not occurred"]
|
||||
_0,
|
||||
#[doc = "An error in this channel has occurred"]
|
||||
_1,
|
||||
}
|
||||
impl ERR11W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1436,8 +1492,10 @@ impl<'a> _ERR11W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `ERR12`"]
|
||||
pub enum ERR12W {
|
||||
#[doc = "An error in this channel has not occurred"] _0,
|
||||
#[doc = "An error in this channel has occurred"] _1,
|
||||
#[doc = "An error in this channel has not occurred"]
|
||||
_0,
|
||||
#[doc = "An error in this channel has occurred"]
|
||||
_1,
|
||||
}
|
||||
impl ERR12W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1492,8 +1550,10 @@ impl<'a> _ERR12W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `ERR13`"]
|
||||
pub enum ERR13W {
|
||||
#[doc = "An error in this channel has not occurred"] _0,
|
||||
#[doc = "An error in this channel has occurred"] _1,
|
||||
#[doc = "An error in this channel has not occurred"]
|
||||
_0,
|
||||
#[doc = "An error in this channel has occurred"]
|
||||
_1,
|
||||
}
|
||||
impl ERR13W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1548,8 +1608,10 @@ impl<'a> _ERR13W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `ERR14`"]
|
||||
pub enum ERR14W {
|
||||
#[doc = "An error in this channel has not occurred"] _0,
|
||||
#[doc = "An error in this channel has occurred"] _1,
|
||||
#[doc = "An error in this channel has not occurred"]
|
||||
_0,
|
||||
#[doc = "An error in this channel has occurred"]
|
||||
_1,
|
||||
}
|
||||
impl ERR14W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1604,8 +1666,10 @@ impl<'a> _ERR14W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `ERR15`"]
|
||||
pub enum ERR15W {
|
||||
#[doc = "An error in this channel has not occurred"] _0,
|
||||
#[doc = "An error in this channel has occurred"] _1,
|
||||
#[doc = "An error in this channel has not occurred"]
|
||||
_0,
|
||||
#[doc = "An error in this channel has occurred"]
|
||||
_1,
|
||||
}
|
||||
impl ERR15W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
|
|||
|
|
@ -14,8 +14,10 @@ impl super::ES {
|
|||
#[doc = "Possible values of the field `DBE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum DBER {
|
||||
#[doc = "No destination bus error"] _0,
|
||||
#[doc = "The last recorded error was a bus error on a destination write"] _1,
|
||||
#[doc = "No destination bus error"]
|
||||
_0,
|
||||
#[doc = "The last recorded error was a bus error on a destination write"]
|
||||
_1,
|
||||
}
|
||||
impl DBER {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -59,8 +61,10 @@ impl DBER {
|
|||
#[doc = "Possible values of the field `SBE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SBER {
|
||||
#[doc = "No source bus error"] _0,
|
||||
#[doc = "The last recorded error was a bus error on a source read"] _1,
|
||||
#[doc = "No source bus error"]
|
||||
_0,
|
||||
#[doc = "The last recorded error was a bus error on a source read"]
|
||||
_1,
|
||||
}
|
||||
impl SBER {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -104,7 +108,8 @@ impl SBER {
|
|||
#[doc = "Possible values of the field `SGE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SGER {
|
||||
#[doc = "No scatter/gather configuration error"] _0,
|
||||
#[doc = "No scatter/gather configuration error"]
|
||||
_0,
|
||||
#[doc = "The last recorded error was a configuration error detected in the TCDn_DLASTSGA field. This field is checked at the beginning of a scatter/gather operation after major loop completion if TCDn_CSR[ESG] is enabled. TCDn_DLASTSGA is not on a 32 byte boundary."]
|
||||
_1,
|
||||
}
|
||||
|
|
@ -150,8 +155,10 @@ impl SGER {
|
|||
#[doc = "Possible values of the field `NCE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum NCER {
|
||||
#[doc = "No NBYTES/CITER configuration error"] _0,
|
||||
#[doc = r" Reserved"] _Reserved(bool),
|
||||
#[doc = "No NBYTES/CITER configuration error"]
|
||||
_0,
|
||||
#[doc = r" Reserved"]
|
||||
_Reserved(bool),
|
||||
}
|
||||
impl NCER {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -190,7 +197,8 @@ impl NCER {
|
|||
#[doc = "Possible values of the field `DOE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum DOER {
|
||||
#[doc = "No destination offset configuration error"] _0,
|
||||
#[doc = "No destination offset configuration error"]
|
||||
_0,
|
||||
#[doc = "The last recorded error was a configuration error detected in the TCDn_DOFF field. TCDn_DOFF is inconsistent with TCDn_ATTR[DSIZE]."]
|
||||
_1,
|
||||
}
|
||||
|
|
@ -236,7 +244,8 @@ impl DOER {
|
|||
#[doc = "Possible values of the field `DAE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum DAER {
|
||||
#[doc = "No destination address configuration error"] _0,
|
||||
#[doc = "No destination address configuration error"]
|
||||
_0,
|
||||
#[doc = "The last recorded error was a configuration error detected in the TCDn_DADDR field. TCDn_DADDR is inconsistent with TCDn_ATTR[DSIZE]."]
|
||||
_1,
|
||||
}
|
||||
|
|
@ -282,7 +291,8 @@ impl DAER {
|
|||
#[doc = "Possible values of the field `SOE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SOER {
|
||||
#[doc = "No source offset configuration error"] _0,
|
||||
#[doc = "No source offset configuration error"]
|
||||
_0,
|
||||
#[doc = "The last recorded error was a configuration error detected in the TCDn_SOFF field. TCDn_SOFF is inconsistent with TCDn_ATTR[SSIZE]."]
|
||||
_1,
|
||||
}
|
||||
|
|
@ -328,7 +338,8 @@ impl SOER {
|
|||
#[doc = "Possible values of the field `SAE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SAER {
|
||||
#[doc = "No source address configuration error."] _0,
|
||||
#[doc = "No source address configuration error."]
|
||||
_0,
|
||||
#[doc = "The last recorded error was a configuration error detected in the TCDn_SADDR field. TCDn_SADDR is inconsistent with TCDn_ATTR[SSIZE]."]
|
||||
_1,
|
||||
}
|
||||
|
|
@ -385,8 +396,10 @@ impl ERRCHNR {
|
|||
#[doc = "Possible values of the field `CPE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum CPER {
|
||||
#[doc = "No channel priority error"] _0,
|
||||
#[doc = r" Reserved"] _Reserved(bool),
|
||||
#[doc = "No channel priority error"]
|
||||
_0,
|
||||
#[doc = r" Reserved"]
|
||||
_Reserved(bool),
|
||||
}
|
||||
impl CPER {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -425,8 +438,10 @@ impl CPER {
|
|||
#[doc = "Possible values of the field `ECX`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ECXR {
|
||||
#[doc = "No canceled transfers"] _0,
|
||||
#[doc = "The last recorded entry was a canceled transfer by the error cancel transfer input"] _1,
|
||||
#[doc = "No canceled transfers"]
|
||||
_0,
|
||||
#[doc = "The last recorded entry was a canceled transfer by the error cancel transfer input"]
|
||||
_1,
|
||||
}
|
||||
impl ECXR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -470,7 +485,8 @@ impl ECXR {
|
|||
#[doc = "Possible values of the field `VLD`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum VLDR {
|
||||
#[doc = "No ERR bits are set."] _0,
|
||||
#[doc = "No ERR bits are set."]
|
||||
_0,
|
||||
#[doc = "At least one ERR bit is set indicating a valid error exists that has not been cleared."]
|
||||
_1,
|
||||
}
|
||||
|
|
|
|||
|
|
@ -14,8 +14,10 @@ impl super::HRS {
|
|||
#[doc = "Possible values of the field `HRS0`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum HRS0R {
|
||||
#[doc = "A hardware service request for channel 0 is not present"] _0,
|
||||
#[doc = "A hardware service request for channel 0 is present"] _1,
|
||||
#[doc = "A hardware service request for channel 0 is not present"]
|
||||
_0,
|
||||
#[doc = "A hardware service request for channel 0 is present"]
|
||||
_1,
|
||||
}
|
||||
impl HRS0R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -59,8 +61,10 @@ impl HRS0R {
|
|||
#[doc = "Possible values of the field `HRS1`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum HRS1R {
|
||||
#[doc = "A hardware service request for channel 1 is not present"] _0,
|
||||
#[doc = "A hardware service request for channel 1 is present"] _1,
|
||||
#[doc = "A hardware service request for channel 1 is not present"]
|
||||
_0,
|
||||
#[doc = "A hardware service request for channel 1 is present"]
|
||||
_1,
|
||||
}
|
||||
impl HRS1R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -104,8 +108,10 @@ impl HRS1R {
|
|||
#[doc = "Possible values of the field `HRS2`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum HRS2R {
|
||||
#[doc = "A hardware service request for channel 2 is not present"] _0,
|
||||
#[doc = "A hardware service request for channel 2 is present"] _1,
|
||||
#[doc = "A hardware service request for channel 2 is not present"]
|
||||
_0,
|
||||
#[doc = "A hardware service request for channel 2 is present"]
|
||||
_1,
|
||||
}
|
||||
impl HRS2R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -149,8 +155,10 @@ impl HRS2R {
|
|||
#[doc = "Possible values of the field `HRS3`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum HRS3R {
|
||||
#[doc = "A hardware service request for channel 3 is not present"] _0,
|
||||
#[doc = "A hardware service request for channel 3 is present"] _1,
|
||||
#[doc = "A hardware service request for channel 3 is not present"]
|
||||
_0,
|
||||
#[doc = "A hardware service request for channel 3 is present"]
|
||||
_1,
|
||||
}
|
||||
impl HRS3R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -194,8 +202,10 @@ impl HRS3R {
|
|||
#[doc = "Possible values of the field `HRS4`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum HRS4R {
|
||||
#[doc = "A hardware service request for channel 4 is not present"] _0,
|
||||
#[doc = "A hardware service request for channel 4 is present"] _1,
|
||||
#[doc = "A hardware service request for channel 4 is not present"]
|
||||
_0,
|
||||
#[doc = "A hardware service request for channel 4 is present"]
|
||||
_1,
|
||||
}
|
||||
impl HRS4R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -239,8 +249,10 @@ impl HRS4R {
|
|||
#[doc = "Possible values of the field `HRS5`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum HRS5R {
|
||||
#[doc = "A hardware service request for channel 5 is not present"] _0,
|
||||
#[doc = "A hardware service request for channel 5 is present"] _1,
|
||||
#[doc = "A hardware service request for channel 5 is not present"]
|
||||
_0,
|
||||
#[doc = "A hardware service request for channel 5 is present"]
|
||||
_1,
|
||||
}
|
||||
impl HRS5R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -284,8 +296,10 @@ impl HRS5R {
|
|||
#[doc = "Possible values of the field `HRS6`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum HRS6R {
|
||||
#[doc = "A hardware service request for channel 6 is not present"] _0,
|
||||
#[doc = "A hardware service request for channel 6 is present"] _1,
|
||||
#[doc = "A hardware service request for channel 6 is not present"]
|
||||
_0,
|
||||
#[doc = "A hardware service request for channel 6 is present"]
|
||||
_1,
|
||||
}
|
||||
impl HRS6R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -329,8 +343,10 @@ impl HRS6R {
|
|||
#[doc = "Possible values of the field `HRS7`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum HRS7R {
|
||||
#[doc = "A hardware service request for channel 7 is not present"] _0,
|
||||
#[doc = "A hardware service request for channel 7 is present"] _1,
|
||||
#[doc = "A hardware service request for channel 7 is not present"]
|
||||
_0,
|
||||
#[doc = "A hardware service request for channel 7 is present"]
|
||||
_1,
|
||||
}
|
||||
impl HRS7R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -374,8 +390,10 @@ impl HRS7R {
|
|||
#[doc = "Possible values of the field `HRS8`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum HRS8R {
|
||||
#[doc = "A hardware service request for channel 8 is not present"] _0,
|
||||
#[doc = "A hardware service request for channel 8 is present"] _1,
|
||||
#[doc = "A hardware service request for channel 8 is not present"]
|
||||
_0,
|
||||
#[doc = "A hardware service request for channel 8 is present"]
|
||||
_1,
|
||||
}
|
||||
impl HRS8R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -419,8 +437,10 @@ impl HRS8R {
|
|||
#[doc = "Possible values of the field `HRS9`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum HRS9R {
|
||||
#[doc = "A hardware service request for channel 9 is not present"] _0,
|
||||
#[doc = "A hardware service request for channel 9 is present"] _1,
|
||||
#[doc = "A hardware service request for channel 9 is not present"]
|
||||
_0,
|
||||
#[doc = "A hardware service request for channel 9 is present"]
|
||||
_1,
|
||||
}
|
||||
impl HRS9R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -464,8 +484,10 @@ impl HRS9R {
|
|||
#[doc = "Possible values of the field `HRS10`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum HRS10R {
|
||||
#[doc = "A hardware service request for channel 10 is not present"] _0,
|
||||
#[doc = "A hardware service request for channel 10 is present"] _1,
|
||||
#[doc = "A hardware service request for channel 10 is not present"]
|
||||
_0,
|
||||
#[doc = "A hardware service request for channel 10 is present"]
|
||||
_1,
|
||||
}
|
||||
impl HRS10R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -509,8 +531,10 @@ impl HRS10R {
|
|||
#[doc = "Possible values of the field `HRS11`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum HRS11R {
|
||||
#[doc = "A hardware service request for channel 11 is not present"] _0,
|
||||
#[doc = "A hardware service request for channel 11 is present"] _1,
|
||||
#[doc = "A hardware service request for channel 11 is not present"]
|
||||
_0,
|
||||
#[doc = "A hardware service request for channel 11 is present"]
|
||||
_1,
|
||||
}
|
||||
impl HRS11R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -554,8 +578,10 @@ impl HRS11R {
|
|||
#[doc = "Possible values of the field `HRS12`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum HRS12R {
|
||||
#[doc = "A hardware service request for channel 12 is not present"] _0,
|
||||
#[doc = "A hardware service request for channel 12 is present"] _1,
|
||||
#[doc = "A hardware service request for channel 12 is not present"]
|
||||
_0,
|
||||
#[doc = "A hardware service request for channel 12 is present"]
|
||||
_1,
|
||||
}
|
||||
impl HRS12R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -599,8 +625,10 @@ impl HRS12R {
|
|||
#[doc = "Possible values of the field `HRS13`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum HRS13R {
|
||||
#[doc = "A hardware service request for channel 13 is not present"] _0,
|
||||
#[doc = "A hardware service request for channel 13 is present"] _1,
|
||||
#[doc = "A hardware service request for channel 13 is not present"]
|
||||
_0,
|
||||
#[doc = "A hardware service request for channel 13 is present"]
|
||||
_1,
|
||||
}
|
||||
impl HRS13R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -644,8 +672,10 @@ impl HRS13R {
|
|||
#[doc = "Possible values of the field `HRS14`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum HRS14R {
|
||||
#[doc = "A hardware service request for channel 14 is not present"] _0,
|
||||
#[doc = "A hardware service request for channel 14 is present"] _1,
|
||||
#[doc = "A hardware service request for channel 14 is not present"]
|
||||
_0,
|
||||
#[doc = "A hardware service request for channel 14 is present"]
|
||||
_1,
|
||||
}
|
||||
impl HRS14R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -689,8 +719,10 @@ impl HRS14R {
|
|||
#[doc = "Possible values of the field `HRS15`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum HRS15R {
|
||||
#[doc = "A hardware service request for channel 15 is not present"] _0,
|
||||
#[doc = "A hardware service request for channel 15 is present"] _1,
|
||||
#[doc = "A hardware service request for channel 15 is not present"]
|
||||
_0,
|
||||
#[doc = "A hardware service request for channel 15 is present"]
|
||||
_1,
|
||||
}
|
||||
impl HRS15R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
|
|||
|
|
@ -45,8 +45,10 @@ impl super::INT {
|
|||
#[doc = "Possible values of the field `INT0`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum INT0R {
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"] _0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"] _1,
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"]
|
||||
_0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"]
|
||||
_1,
|
||||
}
|
||||
impl INT0R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -90,8 +92,10 @@ impl INT0R {
|
|||
#[doc = "Possible values of the field `INT1`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum INT1R {
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"] _0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"] _1,
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"]
|
||||
_0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"]
|
||||
_1,
|
||||
}
|
||||
impl INT1R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -135,8 +139,10 @@ impl INT1R {
|
|||
#[doc = "Possible values of the field `INT2`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum INT2R {
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"] _0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"] _1,
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"]
|
||||
_0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"]
|
||||
_1,
|
||||
}
|
||||
impl INT2R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -180,8 +186,10 @@ impl INT2R {
|
|||
#[doc = "Possible values of the field `INT3`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum INT3R {
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"] _0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"] _1,
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"]
|
||||
_0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"]
|
||||
_1,
|
||||
}
|
||||
impl INT3R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -225,8 +233,10 @@ impl INT3R {
|
|||
#[doc = "Possible values of the field `INT4`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum INT4R {
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"] _0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"] _1,
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"]
|
||||
_0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"]
|
||||
_1,
|
||||
}
|
||||
impl INT4R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -270,8 +280,10 @@ impl INT4R {
|
|||
#[doc = "Possible values of the field `INT5`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum INT5R {
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"] _0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"] _1,
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"]
|
||||
_0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"]
|
||||
_1,
|
||||
}
|
||||
impl INT5R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -315,8 +327,10 @@ impl INT5R {
|
|||
#[doc = "Possible values of the field `INT6`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum INT6R {
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"] _0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"] _1,
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"]
|
||||
_0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"]
|
||||
_1,
|
||||
}
|
||||
impl INT6R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -360,8 +374,10 @@ impl INT6R {
|
|||
#[doc = "Possible values of the field `INT7`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum INT7R {
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"] _0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"] _1,
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"]
|
||||
_0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"]
|
||||
_1,
|
||||
}
|
||||
impl INT7R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -405,8 +421,10 @@ impl INT7R {
|
|||
#[doc = "Possible values of the field `INT8`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum INT8R {
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"] _0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"] _1,
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"]
|
||||
_0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"]
|
||||
_1,
|
||||
}
|
||||
impl INT8R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -450,8 +468,10 @@ impl INT8R {
|
|||
#[doc = "Possible values of the field `INT9`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum INT9R {
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"] _0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"] _1,
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"]
|
||||
_0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"]
|
||||
_1,
|
||||
}
|
||||
impl INT9R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -495,8 +515,10 @@ impl INT9R {
|
|||
#[doc = "Possible values of the field `INT10`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum INT10R {
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"] _0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"] _1,
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"]
|
||||
_0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"]
|
||||
_1,
|
||||
}
|
||||
impl INT10R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -540,8 +562,10 @@ impl INT10R {
|
|||
#[doc = "Possible values of the field `INT11`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum INT11R {
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"] _0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"] _1,
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"]
|
||||
_0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"]
|
||||
_1,
|
||||
}
|
||||
impl INT11R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -585,8 +609,10 @@ impl INT11R {
|
|||
#[doc = "Possible values of the field `INT12`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum INT12R {
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"] _0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"] _1,
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"]
|
||||
_0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"]
|
||||
_1,
|
||||
}
|
||||
impl INT12R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -630,8 +656,10 @@ impl INT12R {
|
|||
#[doc = "Possible values of the field `INT13`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum INT13R {
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"] _0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"] _1,
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"]
|
||||
_0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"]
|
||||
_1,
|
||||
}
|
||||
impl INT13R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -675,8 +703,10 @@ impl INT13R {
|
|||
#[doc = "Possible values of the field `INT14`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum INT14R {
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"] _0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"] _1,
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"]
|
||||
_0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"]
|
||||
_1,
|
||||
}
|
||||
impl INT14R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -720,8 +750,10 @@ impl INT14R {
|
|||
#[doc = "Possible values of the field `INT15`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum INT15R {
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"] _0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"] _1,
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"]
|
||||
_0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"]
|
||||
_1,
|
||||
}
|
||||
impl INT15R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -764,8 +796,10 @@ impl INT15R {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `INT0`"]
|
||||
pub enum INT0W {
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"] _0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"] _1,
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"]
|
||||
_0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"]
|
||||
_1,
|
||||
}
|
||||
impl INT0W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -820,8 +854,10 @@ impl<'a> _INT0W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `INT1`"]
|
||||
pub enum INT1W {
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"] _0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"] _1,
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"]
|
||||
_0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"]
|
||||
_1,
|
||||
}
|
||||
impl INT1W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -876,8 +912,10 @@ impl<'a> _INT1W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `INT2`"]
|
||||
pub enum INT2W {
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"] _0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"] _1,
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"]
|
||||
_0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"]
|
||||
_1,
|
||||
}
|
||||
impl INT2W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -932,8 +970,10 @@ impl<'a> _INT2W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `INT3`"]
|
||||
pub enum INT3W {
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"] _0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"] _1,
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"]
|
||||
_0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"]
|
||||
_1,
|
||||
}
|
||||
impl INT3W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -988,8 +1028,10 @@ impl<'a> _INT3W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `INT4`"]
|
||||
pub enum INT4W {
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"] _0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"] _1,
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"]
|
||||
_0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"]
|
||||
_1,
|
||||
}
|
||||
impl INT4W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1044,8 +1086,10 @@ impl<'a> _INT4W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `INT5`"]
|
||||
pub enum INT5W {
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"] _0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"] _1,
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"]
|
||||
_0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"]
|
||||
_1,
|
||||
}
|
||||
impl INT5W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1100,8 +1144,10 @@ impl<'a> _INT5W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `INT6`"]
|
||||
pub enum INT6W {
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"] _0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"] _1,
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"]
|
||||
_0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"]
|
||||
_1,
|
||||
}
|
||||
impl INT6W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1156,8 +1202,10 @@ impl<'a> _INT6W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `INT7`"]
|
||||
pub enum INT7W {
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"] _0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"] _1,
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"]
|
||||
_0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"]
|
||||
_1,
|
||||
}
|
||||
impl INT7W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1212,8 +1260,10 @@ impl<'a> _INT7W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `INT8`"]
|
||||
pub enum INT8W {
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"] _0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"] _1,
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"]
|
||||
_0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"]
|
||||
_1,
|
||||
}
|
||||
impl INT8W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1268,8 +1318,10 @@ impl<'a> _INT8W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `INT9`"]
|
||||
pub enum INT9W {
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"] _0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"] _1,
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"]
|
||||
_0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"]
|
||||
_1,
|
||||
}
|
||||
impl INT9W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1324,8 +1376,10 @@ impl<'a> _INT9W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `INT10`"]
|
||||
pub enum INT10W {
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"] _0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"] _1,
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"]
|
||||
_0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"]
|
||||
_1,
|
||||
}
|
||||
impl INT10W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1380,8 +1434,10 @@ impl<'a> _INT10W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `INT11`"]
|
||||
pub enum INT11W {
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"] _0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"] _1,
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"]
|
||||
_0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"]
|
||||
_1,
|
||||
}
|
||||
impl INT11W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1436,8 +1492,10 @@ impl<'a> _INT11W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `INT12`"]
|
||||
pub enum INT12W {
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"] _0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"] _1,
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"]
|
||||
_0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"]
|
||||
_1,
|
||||
}
|
||||
impl INT12W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1492,8 +1550,10 @@ impl<'a> _INT12W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `INT13`"]
|
||||
pub enum INT13W {
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"] _0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"] _1,
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"]
|
||||
_0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"]
|
||||
_1,
|
||||
}
|
||||
impl INT13W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1548,8 +1608,10 @@ impl<'a> _INT13W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `INT14`"]
|
||||
pub enum INT14W {
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"] _0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"] _1,
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"]
|
||||
_0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"]
|
||||
_1,
|
||||
}
|
||||
impl INT14W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1604,8 +1666,10 @@ impl<'a> _INT14W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `INT15`"]
|
||||
pub enum INT15W {
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"] _0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"] _1,
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"]
|
||||
_0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"]
|
||||
_1,
|
||||
}
|
||||
impl INT15W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
|
|||
480
src/dma/mod.rs
480
src/dma/mod.rs
|
|
@ -2,300 +2,428 @@ use vcell::VolatileCell;
|
|||
#[doc = r" Register block"]
|
||||
#[repr(C)]
|
||||
pub struct RegisterBlock {
|
||||
#[doc = "0x00 - Control Register"] pub cr: CR,
|
||||
#[doc = "0x04 - Error Status Register"] pub es: ES,
|
||||
#[doc = "0x00 - Control Register"]
|
||||
pub cr: CR,
|
||||
#[doc = "0x04 - Error Status Register"]
|
||||
pub es: ES,
|
||||
_reserved0: [u8; 4usize],
|
||||
#[doc = "0x0c - Enable Request Register"] pub erq: ERQ,
|
||||
#[doc = "0x0c - Enable Request Register"]
|
||||
pub erq: ERQ,
|
||||
_reserved1: [u8; 4usize],
|
||||
#[doc = "0x14 - Enable Error Interrupt Register"] pub eei: EEI,
|
||||
#[doc = "0x18 - Clear Enable Error Interrupt Register"] pub ceei: CEEI,
|
||||
#[doc = "0x19 - Set Enable Error Interrupt Register"] pub seei: SEEI,
|
||||
#[doc = "0x1a - Clear Enable Request Register"] pub cerq: CERQ,
|
||||
#[doc = "0x1b - Set Enable Request Register"] pub serq: SERQ,
|
||||
#[doc = "0x1c - Clear DONE Status Bit Register"] pub cdne: CDNE,
|
||||
#[doc = "0x1d - Set START Bit Register"] pub ssrt: SSRT,
|
||||
#[doc = "0x1e - Clear Error Register"] pub cerr: CERR,
|
||||
#[doc = "0x1f - Clear Interrupt Request Register"] pub cint: CINT,
|
||||
#[doc = "0x14 - Enable Error Interrupt Register"]
|
||||
pub eei: EEI,
|
||||
#[doc = "0x18 - Clear Enable Error Interrupt Register"]
|
||||
pub ceei: CEEI,
|
||||
#[doc = "0x19 - Set Enable Error Interrupt Register"]
|
||||
pub seei: SEEI,
|
||||
#[doc = "0x1a - Clear Enable Request Register"]
|
||||
pub cerq: CERQ,
|
||||
#[doc = "0x1b - Set Enable Request Register"]
|
||||
pub serq: SERQ,
|
||||
#[doc = "0x1c - Clear DONE Status Bit Register"]
|
||||
pub cdne: CDNE,
|
||||
#[doc = "0x1d - Set START Bit Register"]
|
||||
pub ssrt: SSRT,
|
||||
#[doc = "0x1e - Clear Error Register"]
|
||||
pub cerr: CERR,
|
||||
#[doc = "0x1f - Clear Interrupt Request Register"]
|
||||
pub cint: CINT,
|
||||
_reserved2: [u8; 4usize],
|
||||
#[doc = "0x24 - Interrupt Request Register"] pub int: INT,
|
||||
#[doc = "0x24 - Interrupt Request Register"]
|
||||
pub int: INT,
|
||||
_reserved3: [u8; 4usize],
|
||||
#[doc = "0x2c - Error Register"] pub err: ERR,
|
||||
#[doc = "0x2c - Error Register"]
|
||||
pub err: ERR,
|
||||
_reserved4: [u8; 4usize],
|
||||
#[doc = "0x34 - Hardware Request Status Register"] pub hrs: HRS,
|
||||
#[doc = "0x34 - Hardware Request Status Register"]
|
||||
pub hrs: HRS,
|
||||
_reserved5: [u8; 12usize],
|
||||
#[doc = "0x44 - Enable Asynchronous Request in Stop Register"] pub ears: EARS,
|
||||
#[doc = "0x44 - Enable Asynchronous Request in Stop Register"]
|
||||
pub ears: EARS,
|
||||
_reserved6: [u8; 184usize],
|
||||
#[doc = "0x100 - Channel n Priority Register"] pub dchpri3: DCHPRI3,
|
||||
#[doc = "0x101 - Channel n Priority Register"] pub dchpri2: DCHPRI2,
|
||||
#[doc = "0x102 - Channel n Priority Register"] pub dchpri1: DCHPRI1,
|
||||
#[doc = "0x103 - Channel n Priority Register"] pub dchpri0: DCHPRI0,
|
||||
#[doc = "0x104 - Channel n Priority Register"] pub dchpri7: DCHPRI7,
|
||||
#[doc = "0x105 - Channel n Priority Register"] pub dchpri6: DCHPRI6,
|
||||
#[doc = "0x106 - Channel n Priority Register"] pub dchpri5: DCHPRI5,
|
||||
#[doc = "0x107 - Channel n Priority Register"] pub dchpri4: DCHPRI4,
|
||||
#[doc = "0x108 - Channel n Priority Register"] pub dchpri11: DCHPRI11,
|
||||
#[doc = "0x109 - Channel n Priority Register"] pub dchpri10: DCHPRI10,
|
||||
#[doc = "0x10a - Channel n Priority Register"] pub dchpri9: DCHPRI9,
|
||||
#[doc = "0x10b - Channel n Priority Register"] pub dchpri8: DCHPRI8,
|
||||
#[doc = "0x10c - Channel n Priority Register"] pub dchpri15: DCHPRI15,
|
||||
#[doc = "0x10d - Channel n Priority Register"] pub dchpri14: DCHPRI14,
|
||||
#[doc = "0x10e - Channel n Priority Register"] pub dchpri13: DCHPRI13,
|
||||
#[doc = "0x10f - Channel n Priority Register"] pub dchpri12: DCHPRI12,
|
||||
#[doc = "0x100 - Channel n Priority Register"]
|
||||
pub dchpri3: DCHPRI3,
|
||||
#[doc = "0x101 - Channel n Priority Register"]
|
||||
pub dchpri2: DCHPRI2,
|
||||
#[doc = "0x102 - Channel n Priority Register"]
|
||||
pub dchpri1: DCHPRI1,
|
||||
#[doc = "0x103 - Channel n Priority Register"]
|
||||
pub dchpri0: DCHPRI0,
|
||||
#[doc = "0x104 - Channel n Priority Register"]
|
||||
pub dchpri7: DCHPRI7,
|
||||
#[doc = "0x105 - Channel n Priority Register"]
|
||||
pub dchpri6: DCHPRI6,
|
||||
#[doc = "0x106 - Channel n Priority Register"]
|
||||
pub dchpri5: DCHPRI5,
|
||||
#[doc = "0x107 - Channel n Priority Register"]
|
||||
pub dchpri4: DCHPRI4,
|
||||
#[doc = "0x108 - Channel n Priority Register"]
|
||||
pub dchpri11: DCHPRI11,
|
||||
#[doc = "0x109 - Channel n Priority Register"]
|
||||
pub dchpri10: DCHPRI10,
|
||||
#[doc = "0x10a - Channel n Priority Register"]
|
||||
pub dchpri9: DCHPRI9,
|
||||
#[doc = "0x10b - Channel n Priority Register"]
|
||||
pub dchpri8: DCHPRI8,
|
||||
#[doc = "0x10c - Channel n Priority Register"]
|
||||
pub dchpri15: DCHPRI15,
|
||||
#[doc = "0x10d - Channel n Priority Register"]
|
||||
pub dchpri14: DCHPRI14,
|
||||
#[doc = "0x10e - Channel n Priority Register"]
|
||||
pub dchpri13: DCHPRI13,
|
||||
#[doc = "0x10f - Channel n Priority Register"]
|
||||
pub dchpri12: DCHPRI12,
|
||||
_reserved7: [u8; 3824usize],
|
||||
#[doc = "0x1000 - TCD Source Address"] pub tcd0_saddr: TCD0_SADDR,
|
||||
#[doc = "0x1004 - TCD Signed Source Address Offset"] pub tcd0_soff: TCD0_SOFF,
|
||||
#[doc = "0x1006 - TCD Transfer Attributes"] pub tcd0_attr: TCD0_ATTR,
|
||||
#[doc = "0x1000 - TCD Source Address"]
|
||||
pub tcd0_saddr: TCD0_SADDR,
|
||||
#[doc = "0x1004 - TCD Signed Source Address Offset"]
|
||||
pub tcd0_soff: TCD0_SOFF,
|
||||
#[doc = "0x1006 - TCD Transfer Attributes"]
|
||||
pub tcd0_attr: TCD0_ATTR,
|
||||
#[doc = "0x1008 - TCD Minor Byte Count (Minor Loop Mapping Disabled)"]
|
||||
pub tcd0_nbytes_mlno:
|
||||
TCD0_NBYTES_MLNO,
|
||||
#[doc = "0x100c - TCD Last Source Address Adjustment"] pub tcd0_slast: TCD0_SLAST,
|
||||
#[doc = "0x1010 - TCD Destination Address"] pub tcd0_daddr: TCD0_DADDR,
|
||||
#[doc = "0x1014 - TCD Signed Destination Address Offset"] pub tcd0_doff: TCD0_DOFF,
|
||||
pub tcd0_nbytes_mlno: TCD0_NBYTES_MLNO,
|
||||
#[doc = "0x100c - TCD Last Source Address Adjustment"]
|
||||
pub tcd0_slast: TCD0_SLAST,
|
||||
#[doc = "0x1010 - TCD Destination Address"]
|
||||
pub tcd0_daddr: TCD0_DADDR,
|
||||
#[doc = "0x1014 - TCD Signed Destination Address Offset"]
|
||||
pub tcd0_doff: TCD0_DOFF,
|
||||
#[doc = "0x1016 - TCD Current Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
|
||||
pub tcd0_citer_elinkno: TCD0_CITER_ELINKNO,
|
||||
#[doc = "0x1018 - TCD Last Destination Address Adjustment/Scatter Gather Address"]
|
||||
pub tcd0_dlastsga: TCD0_DLASTSGA,
|
||||
#[doc = "0x101c - TCD Control and Status"] pub tcd0_csr: TCD0_CSR,
|
||||
#[doc = "0x101c - TCD Control and Status"]
|
||||
pub tcd0_csr: TCD0_CSR,
|
||||
#[doc = "0x101e - TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
|
||||
pub tcd0_biter_elinkno: TCD0_BITER_ELINKNO,
|
||||
#[doc = "0x1020 - TCD Source Address"] pub tcd1_saddr: TCD1_SADDR,
|
||||
#[doc = "0x1024 - TCD Signed Source Address Offset"] pub tcd1_soff: TCD1_SOFF,
|
||||
#[doc = "0x1026 - TCD Transfer Attributes"] pub tcd1_attr: TCD1_ATTR,
|
||||
#[doc = "0x1020 - TCD Source Address"]
|
||||
pub tcd1_saddr: TCD1_SADDR,
|
||||
#[doc = "0x1024 - TCD Signed Source Address Offset"]
|
||||
pub tcd1_soff: TCD1_SOFF,
|
||||
#[doc = "0x1026 - TCD Transfer Attributes"]
|
||||
pub tcd1_attr: TCD1_ATTR,
|
||||
#[doc = "0x1028 - TCD Minor Byte Count (Minor Loop Mapping Disabled)"]
|
||||
pub tcd1_nbytes_mlno:
|
||||
TCD1_NBYTES_MLNO,
|
||||
#[doc = "0x102c - TCD Last Source Address Adjustment"] pub tcd1_slast: TCD1_SLAST,
|
||||
#[doc = "0x1030 - TCD Destination Address"] pub tcd1_daddr: TCD1_DADDR,
|
||||
#[doc = "0x1034 - TCD Signed Destination Address Offset"] pub tcd1_doff: TCD1_DOFF,
|
||||
pub tcd1_nbytes_mlno: TCD1_NBYTES_MLNO,
|
||||
#[doc = "0x102c - TCD Last Source Address Adjustment"]
|
||||
pub tcd1_slast: TCD1_SLAST,
|
||||
#[doc = "0x1030 - TCD Destination Address"]
|
||||
pub tcd1_daddr: TCD1_DADDR,
|
||||
#[doc = "0x1034 - TCD Signed Destination Address Offset"]
|
||||
pub tcd1_doff: TCD1_DOFF,
|
||||
#[doc = "0x1036 - TCD Current Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
|
||||
pub tcd1_citer_elinkno: TCD1_CITER_ELINKNO,
|
||||
#[doc = "0x1038 - TCD Last Destination Address Adjustment/Scatter Gather Address"]
|
||||
pub tcd1_dlastsga: TCD1_DLASTSGA,
|
||||
#[doc = "0x103c - TCD Control and Status"] pub tcd1_csr: TCD1_CSR,
|
||||
#[doc = "0x103c - TCD Control and Status"]
|
||||
pub tcd1_csr: TCD1_CSR,
|
||||
#[doc = "0x103e - TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
|
||||
pub tcd1_biter_elinkno: TCD1_BITER_ELINKNO,
|
||||
#[doc = "0x1040 - TCD Source Address"] pub tcd2_saddr: TCD2_SADDR,
|
||||
#[doc = "0x1044 - TCD Signed Source Address Offset"] pub tcd2_soff: TCD2_SOFF,
|
||||
#[doc = "0x1046 - TCD Transfer Attributes"] pub tcd2_attr: TCD2_ATTR,
|
||||
#[doc = "0x1040 - TCD Source Address"]
|
||||
pub tcd2_saddr: TCD2_SADDR,
|
||||
#[doc = "0x1044 - TCD Signed Source Address Offset"]
|
||||
pub tcd2_soff: TCD2_SOFF,
|
||||
#[doc = "0x1046 - TCD Transfer Attributes"]
|
||||
pub tcd2_attr: TCD2_ATTR,
|
||||
#[doc = "0x1048 - TCD Minor Byte Count (Minor Loop Mapping Disabled)"]
|
||||
pub tcd2_nbytes_mlno:
|
||||
TCD2_NBYTES_MLNO,
|
||||
#[doc = "0x104c - TCD Last Source Address Adjustment"] pub tcd2_slast: TCD2_SLAST,
|
||||
#[doc = "0x1050 - TCD Destination Address"] pub tcd2_daddr: TCD2_DADDR,
|
||||
#[doc = "0x1054 - TCD Signed Destination Address Offset"] pub tcd2_doff: TCD2_DOFF,
|
||||
pub tcd2_nbytes_mlno: TCD2_NBYTES_MLNO,
|
||||
#[doc = "0x104c - TCD Last Source Address Adjustment"]
|
||||
pub tcd2_slast: TCD2_SLAST,
|
||||
#[doc = "0x1050 - TCD Destination Address"]
|
||||
pub tcd2_daddr: TCD2_DADDR,
|
||||
#[doc = "0x1054 - TCD Signed Destination Address Offset"]
|
||||
pub tcd2_doff: TCD2_DOFF,
|
||||
#[doc = "0x1056 - TCD Current Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
|
||||
pub tcd2_citer_elinkno: TCD2_CITER_ELINKNO,
|
||||
#[doc = "0x1058 - TCD Last Destination Address Adjustment/Scatter Gather Address"]
|
||||
pub tcd2_dlastsga: TCD2_DLASTSGA,
|
||||
#[doc = "0x105c - TCD Control and Status"] pub tcd2_csr: TCD2_CSR,
|
||||
#[doc = "0x105c - TCD Control and Status"]
|
||||
pub tcd2_csr: TCD2_CSR,
|
||||
#[doc = "0x105e - TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
|
||||
pub tcd2_biter_elinkno: TCD2_BITER_ELINKNO,
|
||||
#[doc = "0x1060 - TCD Source Address"] pub tcd3_saddr: TCD3_SADDR,
|
||||
#[doc = "0x1064 - TCD Signed Source Address Offset"] pub tcd3_soff: TCD3_SOFF,
|
||||
#[doc = "0x1066 - TCD Transfer Attributes"] pub tcd3_attr: TCD3_ATTR,
|
||||
#[doc = "0x1060 - TCD Source Address"]
|
||||
pub tcd3_saddr: TCD3_SADDR,
|
||||
#[doc = "0x1064 - TCD Signed Source Address Offset"]
|
||||
pub tcd3_soff: TCD3_SOFF,
|
||||
#[doc = "0x1066 - TCD Transfer Attributes"]
|
||||
pub tcd3_attr: TCD3_ATTR,
|
||||
#[doc = "0x1068 - TCD Minor Byte Count (Minor Loop Mapping Disabled)"]
|
||||
pub tcd3_nbytes_mlno:
|
||||
TCD3_NBYTES_MLNO,
|
||||
#[doc = "0x106c - TCD Last Source Address Adjustment"] pub tcd3_slast: TCD3_SLAST,
|
||||
#[doc = "0x1070 - TCD Destination Address"] pub tcd3_daddr: TCD3_DADDR,
|
||||
#[doc = "0x1074 - TCD Signed Destination Address Offset"] pub tcd3_doff: TCD3_DOFF,
|
||||
pub tcd3_nbytes_mlno: TCD3_NBYTES_MLNO,
|
||||
#[doc = "0x106c - TCD Last Source Address Adjustment"]
|
||||
pub tcd3_slast: TCD3_SLAST,
|
||||
#[doc = "0x1070 - TCD Destination Address"]
|
||||
pub tcd3_daddr: TCD3_DADDR,
|
||||
#[doc = "0x1074 - TCD Signed Destination Address Offset"]
|
||||
pub tcd3_doff: TCD3_DOFF,
|
||||
#[doc = "0x1076 - TCD Current Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
|
||||
pub tcd3_citer_elinkno: TCD3_CITER_ELINKNO,
|
||||
#[doc = "0x1078 - TCD Last Destination Address Adjustment/Scatter Gather Address"]
|
||||
pub tcd3_dlastsga: TCD3_DLASTSGA,
|
||||
#[doc = "0x107c - TCD Control and Status"] pub tcd3_csr: TCD3_CSR,
|
||||
#[doc = "0x107c - TCD Control and Status"]
|
||||
pub tcd3_csr: TCD3_CSR,
|
||||
#[doc = "0x107e - TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
|
||||
pub tcd3_biter_elinkno: TCD3_BITER_ELINKNO,
|
||||
#[doc = "0x1080 - TCD Source Address"] pub tcd4_saddr: TCD4_SADDR,
|
||||
#[doc = "0x1084 - TCD Signed Source Address Offset"] pub tcd4_soff: TCD4_SOFF,
|
||||
#[doc = "0x1086 - TCD Transfer Attributes"] pub tcd4_attr: TCD4_ATTR,
|
||||
#[doc = "0x1080 - TCD Source Address"]
|
||||
pub tcd4_saddr: TCD4_SADDR,
|
||||
#[doc = "0x1084 - TCD Signed Source Address Offset"]
|
||||
pub tcd4_soff: TCD4_SOFF,
|
||||
#[doc = "0x1086 - TCD Transfer Attributes"]
|
||||
pub tcd4_attr: TCD4_ATTR,
|
||||
#[doc = "0x1088 - TCD Minor Byte Count (Minor Loop Mapping Disabled)"]
|
||||
pub tcd4_nbytes_mlno:
|
||||
TCD4_NBYTES_MLNO,
|
||||
#[doc = "0x108c - TCD Last Source Address Adjustment"] pub tcd4_slast: TCD4_SLAST,
|
||||
#[doc = "0x1090 - TCD Destination Address"] pub tcd4_daddr: TCD4_DADDR,
|
||||
#[doc = "0x1094 - TCD Signed Destination Address Offset"] pub tcd4_doff: TCD4_DOFF,
|
||||
pub tcd4_nbytes_mlno: TCD4_NBYTES_MLNO,
|
||||
#[doc = "0x108c - TCD Last Source Address Adjustment"]
|
||||
pub tcd4_slast: TCD4_SLAST,
|
||||
#[doc = "0x1090 - TCD Destination Address"]
|
||||
pub tcd4_daddr: TCD4_DADDR,
|
||||
#[doc = "0x1094 - TCD Signed Destination Address Offset"]
|
||||
pub tcd4_doff: TCD4_DOFF,
|
||||
#[doc = "0x1096 - TCD Current Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
|
||||
pub tcd4_citer_elinkno: TCD4_CITER_ELINKNO,
|
||||
#[doc = "0x1098 - TCD Last Destination Address Adjustment/Scatter Gather Address"]
|
||||
pub tcd4_dlastsga: TCD4_DLASTSGA,
|
||||
#[doc = "0x109c - TCD Control and Status"] pub tcd4_csr: TCD4_CSR,
|
||||
#[doc = "0x109c - TCD Control and Status"]
|
||||
pub tcd4_csr: TCD4_CSR,
|
||||
#[doc = "0x109e - TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
|
||||
pub tcd4_biter_elinkno: TCD4_BITER_ELINKNO,
|
||||
#[doc = "0x10a0 - TCD Source Address"] pub tcd5_saddr: TCD5_SADDR,
|
||||
#[doc = "0x10a4 - TCD Signed Source Address Offset"] pub tcd5_soff: TCD5_SOFF,
|
||||
#[doc = "0x10a6 - TCD Transfer Attributes"] pub tcd5_attr: TCD5_ATTR,
|
||||
#[doc = "0x10a0 - TCD Source Address"]
|
||||
pub tcd5_saddr: TCD5_SADDR,
|
||||
#[doc = "0x10a4 - TCD Signed Source Address Offset"]
|
||||
pub tcd5_soff: TCD5_SOFF,
|
||||
#[doc = "0x10a6 - TCD Transfer Attributes"]
|
||||
pub tcd5_attr: TCD5_ATTR,
|
||||
#[doc = "0x10a8 - TCD Minor Byte Count (Minor Loop Mapping Disabled)"]
|
||||
pub tcd5_nbytes_mlno:
|
||||
TCD5_NBYTES_MLNO,
|
||||
#[doc = "0x10ac - TCD Last Source Address Adjustment"] pub tcd5_slast: TCD5_SLAST,
|
||||
#[doc = "0x10b0 - TCD Destination Address"] pub tcd5_daddr: TCD5_DADDR,
|
||||
#[doc = "0x10b4 - TCD Signed Destination Address Offset"] pub tcd5_doff: TCD5_DOFF,
|
||||
pub tcd5_nbytes_mlno: TCD5_NBYTES_MLNO,
|
||||
#[doc = "0x10ac - TCD Last Source Address Adjustment"]
|
||||
pub tcd5_slast: TCD5_SLAST,
|
||||
#[doc = "0x10b0 - TCD Destination Address"]
|
||||
pub tcd5_daddr: TCD5_DADDR,
|
||||
#[doc = "0x10b4 - TCD Signed Destination Address Offset"]
|
||||
pub tcd5_doff: TCD5_DOFF,
|
||||
#[doc = "0x10b6 - TCD Current Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
|
||||
pub tcd5_citer_elinkno: TCD5_CITER_ELINKNO,
|
||||
#[doc = "0x10b8 - TCD Last Destination Address Adjustment/Scatter Gather Address"]
|
||||
pub tcd5_dlastsga: TCD5_DLASTSGA,
|
||||
#[doc = "0x10bc - TCD Control and Status"] pub tcd5_csr: TCD5_CSR,
|
||||
#[doc = "0x10bc - TCD Control and Status"]
|
||||
pub tcd5_csr: TCD5_CSR,
|
||||
#[doc = "0x10be - TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
|
||||
pub tcd5_biter_elinkno: TCD5_BITER_ELINKNO,
|
||||
#[doc = "0x10c0 - TCD Source Address"] pub tcd6_saddr: TCD6_SADDR,
|
||||
#[doc = "0x10c4 - TCD Signed Source Address Offset"] pub tcd6_soff: TCD6_SOFF,
|
||||
#[doc = "0x10c6 - TCD Transfer Attributes"] pub tcd6_attr: TCD6_ATTR,
|
||||
#[doc = "0x10c0 - TCD Source Address"]
|
||||
pub tcd6_saddr: TCD6_SADDR,
|
||||
#[doc = "0x10c4 - TCD Signed Source Address Offset"]
|
||||
pub tcd6_soff: TCD6_SOFF,
|
||||
#[doc = "0x10c6 - TCD Transfer Attributes"]
|
||||
pub tcd6_attr: TCD6_ATTR,
|
||||
#[doc = "0x10c8 - TCD Minor Byte Count (Minor Loop Mapping Disabled)"]
|
||||
pub tcd6_nbytes_mlno:
|
||||
TCD6_NBYTES_MLNO,
|
||||
#[doc = "0x10cc - TCD Last Source Address Adjustment"] pub tcd6_slast: TCD6_SLAST,
|
||||
#[doc = "0x10d0 - TCD Destination Address"] pub tcd6_daddr: TCD6_DADDR,
|
||||
#[doc = "0x10d4 - TCD Signed Destination Address Offset"] pub tcd6_doff: TCD6_DOFF,
|
||||
pub tcd6_nbytes_mlno: TCD6_NBYTES_MLNO,
|
||||
#[doc = "0x10cc - TCD Last Source Address Adjustment"]
|
||||
pub tcd6_slast: TCD6_SLAST,
|
||||
#[doc = "0x10d0 - TCD Destination Address"]
|
||||
pub tcd6_daddr: TCD6_DADDR,
|
||||
#[doc = "0x10d4 - TCD Signed Destination Address Offset"]
|
||||
pub tcd6_doff: TCD6_DOFF,
|
||||
#[doc = "0x10d6 - TCD Current Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
|
||||
pub tcd6_citer_elinkno: TCD6_CITER_ELINKNO,
|
||||
#[doc = "0x10d8 - TCD Last Destination Address Adjustment/Scatter Gather Address"]
|
||||
pub tcd6_dlastsga: TCD6_DLASTSGA,
|
||||
#[doc = "0x10dc - TCD Control and Status"] pub tcd6_csr: TCD6_CSR,
|
||||
#[doc = "0x10dc - TCD Control and Status"]
|
||||
pub tcd6_csr: TCD6_CSR,
|
||||
#[doc = "0x10de - TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
|
||||
pub tcd6_biter_elinkno: TCD6_BITER_ELINKNO,
|
||||
#[doc = "0x10e0 - TCD Source Address"] pub tcd7_saddr: TCD7_SADDR,
|
||||
#[doc = "0x10e4 - TCD Signed Source Address Offset"] pub tcd7_soff: TCD7_SOFF,
|
||||
#[doc = "0x10e6 - TCD Transfer Attributes"] pub tcd7_attr: TCD7_ATTR,
|
||||
#[doc = "0x10e0 - TCD Source Address"]
|
||||
pub tcd7_saddr: TCD7_SADDR,
|
||||
#[doc = "0x10e4 - TCD Signed Source Address Offset"]
|
||||
pub tcd7_soff: TCD7_SOFF,
|
||||
#[doc = "0x10e6 - TCD Transfer Attributes"]
|
||||
pub tcd7_attr: TCD7_ATTR,
|
||||
#[doc = "0x10e8 - TCD Minor Byte Count (Minor Loop Mapping Disabled)"]
|
||||
pub tcd7_nbytes_mlno:
|
||||
TCD7_NBYTES_MLNO,
|
||||
#[doc = "0x10ec - TCD Last Source Address Adjustment"] pub tcd7_slast: TCD7_SLAST,
|
||||
#[doc = "0x10f0 - TCD Destination Address"] pub tcd7_daddr: TCD7_DADDR,
|
||||
#[doc = "0x10f4 - TCD Signed Destination Address Offset"] pub tcd7_doff: TCD7_DOFF,
|
||||
pub tcd7_nbytes_mlno: TCD7_NBYTES_MLNO,
|
||||
#[doc = "0x10ec - TCD Last Source Address Adjustment"]
|
||||
pub tcd7_slast: TCD7_SLAST,
|
||||
#[doc = "0x10f0 - TCD Destination Address"]
|
||||
pub tcd7_daddr: TCD7_DADDR,
|
||||
#[doc = "0x10f4 - TCD Signed Destination Address Offset"]
|
||||
pub tcd7_doff: TCD7_DOFF,
|
||||
#[doc = "0x10f6 - TCD Current Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
|
||||
pub tcd7_citer_elinkno: TCD7_CITER_ELINKNO,
|
||||
#[doc = "0x10f8 - TCD Last Destination Address Adjustment/Scatter Gather Address"]
|
||||
pub tcd7_dlastsga: TCD7_DLASTSGA,
|
||||
#[doc = "0x10fc - TCD Control and Status"] pub tcd7_csr: TCD7_CSR,
|
||||
#[doc = "0x10fc - TCD Control and Status"]
|
||||
pub tcd7_csr: TCD7_CSR,
|
||||
#[doc = "0x10fe - TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
|
||||
pub tcd7_biter_elinkno: TCD7_BITER_ELINKNO,
|
||||
#[doc = "0x1100 - TCD Source Address"] pub tcd8_saddr: TCD8_SADDR,
|
||||
#[doc = "0x1104 - TCD Signed Source Address Offset"] pub tcd8_soff: TCD8_SOFF,
|
||||
#[doc = "0x1106 - TCD Transfer Attributes"] pub tcd8_attr: TCD8_ATTR,
|
||||
#[doc = "0x1100 - TCD Source Address"]
|
||||
pub tcd8_saddr: TCD8_SADDR,
|
||||
#[doc = "0x1104 - TCD Signed Source Address Offset"]
|
||||
pub tcd8_soff: TCD8_SOFF,
|
||||
#[doc = "0x1106 - TCD Transfer Attributes"]
|
||||
pub tcd8_attr: TCD8_ATTR,
|
||||
#[doc = "0x1108 - TCD Minor Byte Count (Minor Loop Mapping Disabled)"]
|
||||
pub tcd8_nbytes_mlno:
|
||||
TCD8_NBYTES_MLNO,
|
||||
#[doc = "0x110c - TCD Last Source Address Adjustment"] pub tcd8_slast: TCD8_SLAST,
|
||||
#[doc = "0x1110 - TCD Destination Address"] pub tcd8_daddr: TCD8_DADDR,
|
||||
#[doc = "0x1114 - TCD Signed Destination Address Offset"] pub tcd8_doff: TCD8_DOFF,
|
||||
pub tcd8_nbytes_mlno: TCD8_NBYTES_MLNO,
|
||||
#[doc = "0x110c - TCD Last Source Address Adjustment"]
|
||||
pub tcd8_slast: TCD8_SLAST,
|
||||
#[doc = "0x1110 - TCD Destination Address"]
|
||||
pub tcd8_daddr: TCD8_DADDR,
|
||||
#[doc = "0x1114 - TCD Signed Destination Address Offset"]
|
||||
pub tcd8_doff: TCD8_DOFF,
|
||||
#[doc = "0x1116 - TCD Current Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
|
||||
pub tcd8_citer_elinkno: TCD8_CITER_ELINKNO,
|
||||
#[doc = "0x1118 - TCD Last Destination Address Adjustment/Scatter Gather Address"]
|
||||
pub tcd8_dlastsga: TCD8_DLASTSGA,
|
||||
#[doc = "0x111c - TCD Control and Status"] pub tcd8_csr: TCD8_CSR,
|
||||
#[doc = "0x111c - TCD Control and Status"]
|
||||
pub tcd8_csr: TCD8_CSR,
|
||||
#[doc = "0x111e - TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
|
||||
pub tcd8_biter_elinkno: TCD8_BITER_ELINKNO,
|
||||
#[doc = "0x1120 - TCD Source Address"] pub tcd9_saddr: TCD9_SADDR,
|
||||
#[doc = "0x1124 - TCD Signed Source Address Offset"] pub tcd9_soff: TCD9_SOFF,
|
||||
#[doc = "0x1126 - TCD Transfer Attributes"] pub tcd9_attr: TCD9_ATTR,
|
||||
#[doc = "0x1120 - TCD Source Address"]
|
||||
pub tcd9_saddr: TCD9_SADDR,
|
||||
#[doc = "0x1124 - TCD Signed Source Address Offset"]
|
||||
pub tcd9_soff: TCD9_SOFF,
|
||||
#[doc = "0x1126 - TCD Transfer Attributes"]
|
||||
pub tcd9_attr: TCD9_ATTR,
|
||||
#[doc = "0x1128 - TCD Minor Byte Count (Minor Loop Mapping Disabled)"]
|
||||
pub tcd9_nbytes_mlno:
|
||||
TCD9_NBYTES_MLNO,
|
||||
#[doc = "0x112c - TCD Last Source Address Adjustment"] pub tcd9_slast: TCD9_SLAST,
|
||||
#[doc = "0x1130 - TCD Destination Address"] pub tcd9_daddr: TCD9_DADDR,
|
||||
#[doc = "0x1134 - TCD Signed Destination Address Offset"] pub tcd9_doff: TCD9_DOFF,
|
||||
pub tcd9_nbytes_mlno: TCD9_NBYTES_MLNO,
|
||||
#[doc = "0x112c - TCD Last Source Address Adjustment"]
|
||||
pub tcd9_slast: TCD9_SLAST,
|
||||
#[doc = "0x1130 - TCD Destination Address"]
|
||||
pub tcd9_daddr: TCD9_DADDR,
|
||||
#[doc = "0x1134 - TCD Signed Destination Address Offset"]
|
||||
pub tcd9_doff: TCD9_DOFF,
|
||||
#[doc = "0x1136 - TCD Current Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
|
||||
pub tcd9_citer_elinkno: TCD9_CITER_ELINKNO,
|
||||
#[doc = "0x1138 - TCD Last Destination Address Adjustment/Scatter Gather Address"]
|
||||
pub tcd9_dlastsga: TCD9_DLASTSGA,
|
||||
#[doc = "0x113c - TCD Control and Status"] pub tcd9_csr: TCD9_CSR,
|
||||
#[doc = "0x113c - TCD Control and Status"]
|
||||
pub tcd9_csr: TCD9_CSR,
|
||||
#[doc = "0x113e - TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
|
||||
pub tcd9_biter_elinkno: TCD9_BITER_ELINKNO,
|
||||
#[doc = "0x1140 - TCD Source Address"] pub tcd10_saddr: TCD10_SADDR,
|
||||
#[doc = "0x1144 - TCD Signed Source Address Offset"] pub tcd10_soff: TCD10_SOFF,
|
||||
#[doc = "0x1146 - TCD Transfer Attributes"] pub tcd10_attr: TCD10_ATTR,
|
||||
#[doc = "0x1140 - TCD Source Address"]
|
||||
pub tcd10_saddr: TCD10_SADDR,
|
||||
#[doc = "0x1144 - TCD Signed Source Address Offset"]
|
||||
pub tcd10_soff: TCD10_SOFF,
|
||||
#[doc = "0x1146 - TCD Transfer Attributes"]
|
||||
pub tcd10_attr: TCD10_ATTR,
|
||||
#[doc = "0x1148 - TCD Minor Byte Count (Minor Loop Mapping Disabled)"]
|
||||
pub tcd10_nbytes_mlno:
|
||||
TCD10_NBYTES_MLNO,
|
||||
#[doc = "0x114c - TCD Last Source Address Adjustment"] pub tcd10_slast: TCD10_SLAST,
|
||||
#[doc = "0x1150 - TCD Destination Address"] pub tcd10_daddr: TCD10_DADDR,
|
||||
#[doc = "0x1154 - TCD Signed Destination Address Offset"] pub tcd10_doff: TCD10_DOFF,
|
||||
pub tcd10_nbytes_mlno: TCD10_NBYTES_MLNO,
|
||||
#[doc = "0x114c - TCD Last Source Address Adjustment"]
|
||||
pub tcd10_slast: TCD10_SLAST,
|
||||
#[doc = "0x1150 - TCD Destination Address"]
|
||||
pub tcd10_daddr: TCD10_DADDR,
|
||||
#[doc = "0x1154 - TCD Signed Destination Address Offset"]
|
||||
pub tcd10_doff: TCD10_DOFF,
|
||||
#[doc = "0x1156 - TCD Current Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
|
||||
pub tcd10_citer_elinkno: TCD10_CITER_ELINKNO,
|
||||
#[doc = "0x1158 - TCD Last Destination Address Adjustment/Scatter Gather Address"]
|
||||
pub tcd10_dlastsga: TCD10_DLASTSGA,
|
||||
#[doc = "0x115c - TCD Control and Status"] pub tcd10_csr: TCD10_CSR,
|
||||
#[doc = "0x115c - TCD Control and Status"]
|
||||
pub tcd10_csr: TCD10_CSR,
|
||||
#[doc = "0x115e - TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
|
||||
pub tcd10_biter_elinkno: TCD10_BITER_ELINKNO,
|
||||
#[doc = "0x1160 - TCD Source Address"] pub tcd11_saddr: TCD11_SADDR,
|
||||
#[doc = "0x1164 - TCD Signed Source Address Offset"] pub tcd11_soff: TCD11_SOFF,
|
||||
#[doc = "0x1166 - TCD Transfer Attributes"] pub tcd11_attr: TCD11_ATTR,
|
||||
#[doc = "0x1160 - TCD Source Address"]
|
||||
pub tcd11_saddr: TCD11_SADDR,
|
||||
#[doc = "0x1164 - TCD Signed Source Address Offset"]
|
||||
pub tcd11_soff: TCD11_SOFF,
|
||||
#[doc = "0x1166 - TCD Transfer Attributes"]
|
||||
pub tcd11_attr: TCD11_ATTR,
|
||||
#[doc = "0x1168 - TCD Minor Byte Count (Minor Loop Mapping Disabled)"]
|
||||
pub tcd11_nbytes_mlno:
|
||||
TCD11_NBYTES_MLNO,
|
||||
#[doc = "0x116c - TCD Last Source Address Adjustment"] pub tcd11_slast: TCD11_SLAST,
|
||||
#[doc = "0x1170 - TCD Destination Address"] pub tcd11_daddr: TCD11_DADDR,
|
||||
#[doc = "0x1174 - TCD Signed Destination Address Offset"] pub tcd11_doff: TCD11_DOFF,
|
||||
pub tcd11_nbytes_mlno: TCD11_NBYTES_MLNO,
|
||||
#[doc = "0x116c - TCD Last Source Address Adjustment"]
|
||||
pub tcd11_slast: TCD11_SLAST,
|
||||
#[doc = "0x1170 - TCD Destination Address"]
|
||||
pub tcd11_daddr: TCD11_DADDR,
|
||||
#[doc = "0x1174 - TCD Signed Destination Address Offset"]
|
||||
pub tcd11_doff: TCD11_DOFF,
|
||||
#[doc = "0x1176 - TCD Current Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
|
||||
pub tcd11_citer_elinkno: TCD11_CITER_ELINKNO,
|
||||
#[doc = "0x1178 - TCD Last Destination Address Adjustment/Scatter Gather Address"]
|
||||
pub tcd11_dlastsga: TCD11_DLASTSGA,
|
||||
#[doc = "0x117c - TCD Control and Status"] pub tcd11_csr: TCD11_CSR,
|
||||
#[doc = "0x117c - TCD Control and Status"]
|
||||
pub tcd11_csr: TCD11_CSR,
|
||||
#[doc = "0x117e - TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
|
||||
pub tcd11_biter_elinkno: TCD11_BITER_ELINKNO,
|
||||
#[doc = "0x1180 - TCD Source Address"] pub tcd12_saddr: TCD12_SADDR,
|
||||
#[doc = "0x1184 - TCD Signed Source Address Offset"] pub tcd12_soff: TCD12_SOFF,
|
||||
#[doc = "0x1186 - TCD Transfer Attributes"] pub tcd12_attr: TCD12_ATTR,
|
||||
#[doc = "0x1180 - TCD Source Address"]
|
||||
pub tcd12_saddr: TCD12_SADDR,
|
||||
#[doc = "0x1184 - TCD Signed Source Address Offset"]
|
||||
pub tcd12_soff: TCD12_SOFF,
|
||||
#[doc = "0x1186 - TCD Transfer Attributes"]
|
||||
pub tcd12_attr: TCD12_ATTR,
|
||||
#[doc = "0x1188 - TCD Minor Byte Count (Minor Loop Mapping Disabled)"]
|
||||
pub tcd12_nbytes_mlno:
|
||||
TCD12_NBYTES_MLNO,
|
||||
#[doc = "0x118c - TCD Last Source Address Adjustment"] pub tcd12_slast: TCD12_SLAST,
|
||||
#[doc = "0x1190 - TCD Destination Address"] pub tcd12_daddr: TCD12_DADDR,
|
||||
#[doc = "0x1194 - TCD Signed Destination Address Offset"] pub tcd12_doff: TCD12_DOFF,
|
||||
pub tcd12_nbytes_mlno: TCD12_NBYTES_MLNO,
|
||||
#[doc = "0x118c - TCD Last Source Address Adjustment"]
|
||||
pub tcd12_slast: TCD12_SLAST,
|
||||
#[doc = "0x1190 - TCD Destination Address"]
|
||||
pub tcd12_daddr: TCD12_DADDR,
|
||||
#[doc = "0x1194 - TCD Signed Destination Address Offset"]
|
||||
pub tcd12_doff: TCD12_DOFF,
|
||||
#[doc = "0x1196 - TCD Current Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
|
||||
pub tcd12_citer_elinkno: TCD12_CITER_ELINKNO,
|
||||
#[doc = "0x1198 - TCD Last Destination Address Adjustment/Scatter Gather Address"]
|
||||
pub tcd12_dlastsga: TCD12_DLASTSGA,
|
||||
#[doc = "0x119c - TCD Control and Status"] pub tcd12_csr: TCD12_CSR,
|
||||
#[doc = "0x119c - TCD Control and Status"]
|
||||
pub tcd12_csr: TCD12_CSR,
|
||||
#[doc = "0x119e - TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
|
||||
pub tcd12_biter_elinkno: TCD12_BITER_ELINKNO,
|
||||
#[doc = "0x11a0 - TCD Source Address"] pub tcd13_saddr: TCD13_SADDR,
|
||||
#[doc = "0x11a4 - TCD Signed Source Address Offset"] pub tcd13_soff: TCD13_SOFF,
|
||||
#[doc = "0x11a6 - TCD Transfer Attributes"] pub tcd13_attr: TCD13_ATTR,
|
||||
#[doc = "0x11a0 - TCD Source Address"]
|
||||
pub tcd13_saddr: TCD13_SADDR,
|
||||
#[doc = "0x11a4 - TCD Signed Source Address Offset"]
|
||||
pub tcd13_soff: TCD13_SOFF,
|
||||
#[doc = "0x11a6 - TCD Transfer Attributes"]
|
||||
pub tcd13_attr: TCD13_ATTR,
|
||||
#[doc = "0x11a8 - TCD Minor Byte Count (Minor Loop Mapping Disabled)"]
|
||||
pub tcd13_nbytes_mlno:
|
||||
TCD13_NBYTES_MLNO,
|
||||
#[doc = "0x11ac - TCD Last Source Address Adjustment"] pub tcd13_slast: TCD13_SLAST,
|
||||
#[doc = "0x11b0 - TCD Destination Address"] pub tcd13_daddr: TCD13_DADDR,
|
||||
#[doc = "0x11b4 - TCD Signed Destination Address Offset"] pub tcd13_doff: TCD13_DOFF,
|
||||
pub tcd13_nbytes_mlno: TCD13_NBYTES_MLNO,
|
||||
#[doc = "0x11ac - TCD Last Source Address Adjustment"]
|
||||
pub tcd13_slast: TCD13_SLAST,
|
||||
#[doc = "0x11b0 - TCD Destination Address"]
|
||||
pub tcd13_daddr: TCD13_DADDR,
|
||||
#[doc = "0x11b4 - TCD Signed Destination Address Offset"]
|
||||
pub tcd13_doff: TCD13_DOFF,
|
||||
#[doc = "0x11b6 - TCD Current Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
|
||||
pub tcd13_citer_elinkno: TCD13_CITER_ELINKNO,
|
||||
#[doc = "0x11b8 - TCD Last Destination Address Adjustment/Scatter Gather Address"]
|
||||
pub tcd13_dlastsga: TCD13_DLASTSGA,
|
||||
#[doc = "0x11bc - TCD Control and Status"] pub tcd13_csr: TCD13_CSR,
|
||||
#[doc = "0x11bc - TCD Control and Status"]
|
||||
pub tcd13_csr: TCD13_CSR,
|
||||
#[doc = "0x11be - TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
|
||||
pub tcd13_biter_elinkno: TCD13_BITER_ELINKNO,
|
||||
#[doc = "0x11c0 - TCD Source Address"] pub tcd14_saddr: TCD14_SADDR,
|
||||
#[doc = "0x11c4 - TCD Signed Source Address Offset"] pub tcd14_soff: TCD14_SOFF,
|
||||
#[doc = "0x11c6 - TCD Transfer Attributes"] pub tcd14_attr: TCD14_ATTR,
|
||||
#[doc = "0x11c0 - TCD Source Address"]
|
||||
pub tcd14_saddr: TCD14_SADDR,
|
||||
#[doc = "0x11c4 - TCD Signed Source Address Offset"]
|
||||
pub tcd14_soff: TCD14_SOFF,
|
||||
#[doc = "0x11c6 - TCD Transfer Attributes"]
|
||||
pub tcd14_attr: TCD14_ATTR,
|
||||
#[doc = "0x11c8 - TCD Minor Byte Count (Minor Loop Mapping Disabled)"]
|
||||
pub tcd14_nbytes_mlno:
|
||||
TCD14_NBYTES_MLNO,
|
||||
#[doc = "0x11cc - TCD Last Source Address Adjustment"] pub tcd14_slast: TCD14_SLAST,
|
||||
#[doc = "0x11d0 - TCD Destination Address"] pub tcd14_daddr: TCD14_DADDR,
|
||||
#[doc = "0x11d4 - TCD Signed Destination Address Offset"] pub tcd14_doff: TCD14_DOFF,
|
||||
pub tcd14_nbytes_mlno: TCD14_NBYTES_MLNO,
|
||||
#[doc = "0x11cc - TCD Last Source Address Adjustment"]
|
||||
pub tcd14_slast: TCD14_SLAST,
|
||||
#[doc = "0x11d0 - TCD Destination Address"]
|
||||
pub tcd14_daddr: TCD14_DADDR,
|
||||
#[doc = "0x11d4 - TCD Signed Destination Address Offset"]
|
||||
pub tcd14_doff: TCD14_DOFF,
|
||||
#[doc = "0x11d6 - TCD Current Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
|
||||
pub tcd14_citer_elinkno: TCD14_CITER_ELINKNO,
|
||||
#[doc = "0x11d8 - TCD Last Destination Address Adjustment/Scatter Gather Address"]
|
||||
pub tcd14_dlastsga: TCD14_DLASTSGA,
|
||||
#[doc = "0x11dc - TCD Control and Status"] pub tcd14_csr: TCD14_CSR,
|
||||
#[doc = "0x11dc - TCD Control and Status"]
|
||||
pub tcd14_csr: TCD14_CSR,
|
||||
#[doc = "0x11de - TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
|
||||
pub tcd14_biter_elinkno: TCD14_BITER_ELINKNO,
|
||||
#[doc = "0x11e0 - TCD Source Address"] pub tcd15_saddr: TCD15_SADDR,
|
||||
#[doc = "0x11e4 - TCD Signed Source Address Offset"] pub tcd15_soff: TCD15_SOFF,
|
||||
#[doc = "0x11e6 - TCD Transfer Attributes"] pub tcd15_attr: TCD15_ATTR,
|
||||
#[doc = "0x11e0 - TCD Source Address"]
|
||||
pub tcd15_saddr: TCD15_SADDR,
|
||||
#[doc = "0x11e4 - TCD Signed Source Address Offset"]
|
||||
pub tcd15_soff: TCD15_SOFF,
|
||||
#[doc = "0x11e6 - TCD Transfer Attributes"]
|
||||
pub tcd15_attr: TCD15_ATTR,
|
||||
#[doc = "0x11e8 - TCD Minor Byte Count (Minor Loop Mapping Disabled)"]
|
||||
pub tcd15_nbytes_mlno:
|
||||
TCD15_NBYTES_MLNO,
|
||||
#[doc = "0x11ec - TCD Last Source Address Adjustment"] pub tcd15_slast: TCD15_SLAST,
|
||||
#[doc = "0x11f0 - TCD Destination Address"] pub tcd15_daddr: TCD15_DADDR,
|
||||
#[doc = "0x11f4 - TCD Signed Destination Address Offset"] pub tcd15_doff: TCD15_DOFF,
|
||||
pub tcd15_nbytes_mlno: TCD15_NBYTES_MLNO,
|
||||
#[doc = "0x11ec - TCD Last Source Address Adjustment"]
|
||||
pub tcd15_slast: TCD15_SLAST,
|
||||
#[doc = "0x11f0 - TCD Destination Address"]
|
||||
pub tcd15_daddr: TCD15_DADDR,
|
||||
#[doc = "0x11f4 - TCD Signed Destination Address Offset"]
|
||||
pub tcd15_doff: TCD15_DOFF,
|
||||
#[doc = "0x11f6 - TCD Current Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
|
||||
pub tcd15_citer_elinkno: TCD15_CITER_ELINKNO,
|
||||
#[doc = "0x11f8 - TCD Last Destination Address Adjustment/Scatter Gather Address"]
|
||||
pub tcd15_dlastsga: TCD15_DLASTSGA,
|
||||
#[doc = "0x11fc - TCD Control and Status"] pub tcd15_csr: TCD15_CSR,
|
||||
#[doc = "0x11fc - TCD Control and Status"]
|
||||
pub tcd15_csr: TCD15_CSR,
|
||||
#[doc = "0x11fe - TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
|
||||
pub tcd15_biter_elinkno: TCD15_BITER_ELINKNO,
|
||||
}
|
||||
|
|
|
|||
|
|
@ -54,8 +54,10 @@ impl<'a> _SAEEW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `NOP`"]
|
||||
pub enum NOPW {
|
||||
#[doc = "Normal operation"] _0,
|
||||
#[doc = "No operation, ignore the other bits in this register"] _1,
|
||||
#[doc = "Normal operation"]
|
||||
_0,
|
||||
#[doc = "No operation, ignore the other bits in this register"]
|
||||
_1,
|
||||
}
|
||||
impl NOPW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
|
|||
|
|
@ -54,8 +54,10 @@ impl<'a> _SAERW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `NOP`"]
|
||||
pub enum NOPW {
|
||||
#[doc = "Normal operation"] _0,
|
||||
#[doc = "No operation, ignore the other bits in this register"] _1,
|
||||
#[doc = "Normal operation"]
|
||||
_0,
|
||||
#[doc = "No operation, ignore the other bits in this register"]
|
||||
_1,
|
||||
}
|
||||
impl NOPW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
|
|||
|
|
@ -31,8 +31,10 @@ impl<'a> _SSRTW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SAST`"]
|
||||
pub enum SASTW {
|
||||
#[doc = "Set only the TCDn_CSR[START] bit specified in the SSRT field"] _0,
|
||||
#[doc = "Set all bits in TCDn_CSR[START]"] _1,
|
||||
#[doc = "Set only the TCDn_CSR[START] bit specified in the SSRT field"]
|
||||
_0,
|
||||
#[doc = "Set all bits in TCDn_CSR[START]"]
|
||||
_1,
|
||||
}
|
||||
impl SASTW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -87,8 +89,10 @@ impl<'a> _SASTW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `NOP`"]
|
||||
pub enum NOPW {
|
||||
#[doc = "Normal operation"] _0,
|
||||
#[doc = "No operation, ignore the other bits in this register"] _1,
|
||||
#[doc = "Normal operation"]
|
||||
_0,
|
||||
#[doc = "No operation, ignore the other bits in this register"]
|
||||
_1,
|
||||
}
|
||||
impl NOPW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
|
|||
|
|
@ -67,10 +67,14 @@ impl DMODR {
|
|||
#[doc = "Possible values of the field `SSIZE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SSIZER {
|
||||
#[doc = "8-bit"] _0,
|
||||
#[doc = "16-bit"] _1,
|
||||
#[doc = "32-bit"] _10,
|
||||
#[doc = r" Reserved"] _Reserved(u8),
|
||||
#[doc = "8-bit"]
|
||||
_0,
|
||||
#[doc = "16-bit"]
|
||||
_1,
|
||||
#[doc = "32-bit"]
|
||||
_10,
|
||||
#[doc = r" Reserved"]
|
||||
_Reserved(u8),
|
||||
}
|
||||
impl SSIZER {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
|
|
@ -113,8 +117,10 @@ impl SSIZER {
|
|||
#[doc = "Possible values of the field `SMOD`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SMODR {
|
||||
#[doc = "Source address modulo feature is disabled"] _0,
|
||||
#[doc = r" Reserved"] _Reserved(u8),
|
||||
#[doc = "Source address modulo feature is disabled"]
|
||||
_0,
|
||||
#[doc = r" Reserved"]
|
||||
_Reserved(u8),
|
||||
}
|
||||
impl SMODR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
|
|
@ -172,9 +178,12 @@ impl<'a> _DMODW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SSIZE`"]
|
||||
pub enum SSIZEW {
|
||||
#[doc = "8-bit"] _0,
|
||||
#[doc = "16-bit"] _1,
|
||||
#[doc = "32-bit"] _10,
|
||||
#[doc = "8-bit"]
|
||||
_0,
|
||||
#[doc = "16-bit"]
|
||||
_1,
|
||||
#[doc = "32-bit"]
|
||||
_10,
|
||||
}
|
||||
impl SSIZEW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -225,7 +234,8 @@ impl<'a> _SSIZEW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SMOD`"]
|
||||
pub enum SMODW {
|
||||
#[doc = "Source address modulo feature is disabled"] _0,
|
||||
#[doc = "Source address modulo feature is disabled"]
|
||||
_0,
|
||||
}
|
||||
impl SMODW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
|
|||
|
|
@ -56,8 +56,10 @@ impl BITERR {
|
|||
#[doc = "Possible values of the field `ELINK`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ELINKR {
|
||||
#[doc = "The channel-to-channel linking is disabled"] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled"] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled"]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ELINKR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -115,8 +117,10 @@ impl<'a> _BITERW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `ELINK`"]
|
||||
pub enum ELINKW {
|
||||
#[doc = "The channel-to-channel linking is disabled"] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled"] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled"]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ELINKW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
|
|||
|
|
@ -67,8 +67,10 @@ impl LINKCHR {
|
|||
#[doc = "Possible values of the field `ELINK`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ELINKR {
|
||||
#[doc = "The channel-to-channel linking is disabled"] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled"] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled"]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ELINKR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -141,8 +143,10 @@ impl<'a> _LINKCHW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `ELINK`"]
|
||||
pub enum ELINKW {
|
||||
#[doc = "The channel-to-channel linking is disabled"] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled"] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled"]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ELINKW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
|
|||
|
|
@ -56,8 +56,10 @@ impl CITERR {
|
|||
#[doc = "Possible values of the field `ELINK`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ELINKR {
|
||||
#[doc = "The channel-to-channel linking is disabled"] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled"] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled"]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ELINKR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -115,8 +117,10 @@ impl<'a> _CITERW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `ELINK`"]
|
||||
pub enum ELINKW {
|
||||
#[doc = "The channel-to-channel linking is disabled"] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled"] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled"]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ELINKW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
|
|||
|
|
@ -67,8 +67,10 @@ impl LINKCHR {
|
|||
#[doc = "Possible values of the field `ELINK`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ELINKR {
|
||||
#[doc = "The channel-to-channel linking is disabled"] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled"] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled"]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ELINKR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -141,8 +143,10 @@ impl<'a> _LINKCHW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `ELINK`"]
|
||||
pub enum ELINKW {
|
||||
#[doc = "The channel-to-channel linking is disabled"] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled"] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled"]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ELINKW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
|
|||
|
|
@ -45,8 +45,10 @@ impl super::TCD0_CSR {
|
|||
#[doc = "Possible values of the field `START`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum STARTR {
|
||||
#[doc = "The channel is not explicitly started."] _0,
|
||||
#[doc = "The channel is explicitly started via a software initiated service request."] _1,
|
||||
#[doc = "The channel is not explicitly started."]
|
||||
_0,
|
||||
#[doc = "The channel is explicitly started via a software initiated service request."]
|
||||
_1,
|
||||
}
|
||||
impl STARTR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -90,8 +92,10 @@ impl STARTR {
|
|||
#[doc = "Possible values of the field `INTMAJOR`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum INTMAJORR {
|
||||
#[doc = "The end-of-major loop interrupt is disabled."] _0,
|
||||
#[doc = "The end-of-major loop interrupt is enabled."] _1,
|
||||
#[doc = "The end-of-major loop interrupt is disabled."]
|
||||
_0,
|
||||
#[doc = "The end-of-major loop interrupt is enabled."]
|
||||
_1,
|
||||
}
|
||||
impl INTMAJORR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -135,8 +139,10 @@ impl INTMAJORR {
|
|||
#[doc = "Possible values of the field `INTHALF`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum INTHALFR {
|
||||
#[doc = "The half-point interrupt is disabled."] _0,
|
||||
#[doc = "The half-point interrupt is enabled."] _1,
|
||||
#[doc = "The half-point interrupt is disabled."]
|
||||
_0,
|
||||
#[doc = "The half-point interrupt is enabled."]
|
||||
_1,
|
||||
}
|
||||
impl INTHALFR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -201,7 +207,8 @@ impl DREQR {
|
|||
#[doc = "Possible values of the field `ESG`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ESGR {
|
||||
#[doc = "The current channel's TCD is normal format."] _0,
|
||||
#[doc = "The current channel's TCD is normal format."]
|
||||
_0,
|
||||
#[doc = "The current channel's TCD specifies a scatter gather format. The DLASTSGA field provides a memory pointer to the next TCD to be loaded into this channel after the major loop completes its execution."]
|
||||
_1,
|
||||
}
|
||||
|
|
@ -247,8 +254,10 @@ impl ESGR {
|
|||
#[doc = "Possible values of the field `MAJORELINK`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum MAJORELINKR {
|
||||
#[doc = "The channel-to-channel linking is disabled."] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled."] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled."]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled."]
|
||||
_1,
|
||||
}
|
||||
impl MAJORELINKR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -345,10 +354,14 @@ impl MAJORLINKCHR {
|
|||
#[doc = "Possible values of the field `BWC`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum BWCR {
|
||||
#[doc = "No eDMA engine stalls."] _0,
|
||||
#[doc = "eDMA engine stalls for 4 cycles after each R/W."] _10,
|
||||
#[doc = "eDMA engine stalls for 8 cycles after each R/W."] _11,
|
||||
#[doc = r" Reserved"] _Reserved(u8),
|
||||
#[doc = "No eDMA engine stalls."]
|
||||
_0,
|
||||
#[doc = "eDMA engine stalls for 4 cycles after each R/W."]
|
||||
_10,
|
||||
#[doc = "eDMA engine stalls for 8 cycles after each R/W."]
|
||||
_11,
|
||||
#[doc = r" Reserved"]
|
||||
_Reserved(u8),
|
||||
}
|
||||
impl BWCR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
|
|
@ -390,8 +403,10 @@ impl BWCR {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `START`"]
|
||||
pub enum STARTW {
|
||||
#[doc = "The channel is not explicitly started."] _0,
|
||||
#[doc = "The channel is explicitly started via a software initiated service request."] _1,
|
||||
#[doc = "The channel is not explicitly started."]
|
||||
_0,
|
||||
#[doc = "The channel is explicitly started via a software initiated service request."]
|
||||
_1,
|
||||
}
|
||||
impl STARTW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -446,8 +461,10 @@ impl<'a> _STARTW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `INTMAJOR`"]
|
||||
pub enum INTMAJORW {
|
||||
#[doc = "The end-of-major loop interrupt is disabled."] _0,
|
||||
#[doc = "The end-of-major loop interrupt is enabled."] _1,
|
||||
#[doc = "The end-of-major loop interrupt is disabled."]
|
||||
_0,
|
||||
#[doc = "The end-of-major loop interrupt is enabled."]
|
||||
_1,
|
||||
}
|
||||
impl INTMAJORW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -502,8 +519,10 @@ impl<'a> _INTMAJORW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `INTHALF`"]
|
||||
pub enum INTHALFW {
|
||||
#[doc = "The half-point interrupt is disabled."] _0,
|
||||
#[doc = "The half-point interrupt is enabled."] _1,
|
||||
#[doc = "The half-point interrupt is disabled."]
|
||||
_0,
|
||||
#[doc = "The half-point interrupt is enabled."]
|
||||
_1,
|
||||
}
|
||||
impl INTHALFW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -581,7 +600,8 @@ impl<'a> _DREQW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `ESG`"]
|
||||
pub enum ESGW {
|
||||
#[doc = "The current channel's TCD is normal format."] _0,
|
||||
#[doc = "The current channel's TCD is normal format."]
|
||||
_0,
|
||||
#[doc = "The current channel's TCD specifies a scatter gather format. The DLASTSGA field provides a memory pointer to the next TCD to be loaded into this channel after the major loop completes its execution."]
|
||||
_1,
|
||||
}
|
||||
|
|
@ -638,8 +658,10 @@ impl<'a> _ESGW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `MAJORELINK`"]
|
||||
pub enum MAJORELINKW {
|
||||
#[doc = "The channel-to-channel linking is disabled."] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled."] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled."]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled."]
|
||||
_1,
|
||||
}
|
||||
impl MAJORELINKW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -755,9 +777,12 @@ impl<'a> _MAJORLINKCHW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `BWC`"]
|
||||
pub enum BWCW {
|
||||
#[doc = "No eDMA engine stalls."] _0,
|
||||
#[doc = "eDMA engine stalls for 4 cycles after each R/W."] _10,
|
||||
#[doc = "eDMA engine stalls for 8 cycles after each R/W."] _11,
|
||||
#[doc = "No eDMA engine stalls."]
|
||||
_0,
|
||||
#[doc = "eDMA engine stalls for 4 cycles after each R/W."]
|
||||
_10,
|
||||
#[doc = "eDMA engine stalls for 8 cycles after each R/W."]
|
||||
_11,
|
||||
}
|
||||
impl BWCW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
|
|||
|
|
@ -56,8 +56,10 @@ impl NBYTESR {
|
|||
#[doc = "Possible values of the field `DMLOE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum DMLOER {
|
||||
#[doc = "The minor loop offset is not applied to the DADDR"] _0,
|
||||
#[doc = "The minor loop offset is applied to the DADDR"] _1,
|
||||
#[doc = "The minor loop offset is not applied to the DADDR"]
|
||||
_0,
|
||||
#[doc = "The minor loop offset is applied to the DADDR"]
|
||||
_1,
|
||||
}
|
||||
impl DMLOER {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -101,8 +103,10 @@ impl DMLOER {
|
|||
#[doc = "Possible values of the field `SMLOE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SMLOER {
|
||||
#[doc = "The minor loop offset is not applied to the SADDR"] _0,
|
||||
#[doc = "The minor loop offset is applied to the SADDR"] _1,
|
||||
#[doc = "The minor loop offset is not applied to the SADDR"]
|
||||
_0,
|
||||
#[doc = "The minor loop offset is applied to the SADDR"]
|
||||
_1,
|
||||
}
|
||||
impl SMLOER {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -160,8 +164,10 @@ impl<'a> _NBYTESW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `DMLOE`"]
|
||||
pub enum DMLOEW {
|
||||
#[doc = "The minor loop offset is not applied to the DADDR"] _0,
|
||||
#[doc = "The minor loop offset is applied to the DADDR"] _1,
|
||||
#[doc = "The minor loop offset is not applied to the DADDR"]
|
||||
_0,
|
||||
#[doc = "The minor loop offset is applied to the DADDR"]
|
||||
_1,
|
||||
}
|
||||
impl DMLOEW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -216,8 +222,10 @@ impl<'a> _DMLOEW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SMLOE`"]
|
||||
pub enum SMLOEW {
|
||||
#[doc = "The minor loop offset is not applied to the SADDR"] _0,
|
||||
#[doc = "The minor loop offset is applied to the SADDR"] _1,
|
||||
#[doc = "The minor loop offset is not applied to the SADDR"]
|
||||
_0,
|
||||
#[doc = "The minor loop offset is applied to the SADDR"]
|
||||
_1,
|
||||
}
|
||||
impl SMLOEW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
|
|||
|
|
@ -67,8 +67,10 @@ impl MLOFFR {
|
|||
#[doc = "Possible values of the field `DMLOE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum DMLOER {
|
||||
#[doc = "The minor loop offset is not applied to the DADDR"] _0,
|
||||
#[doc = "The minor loop offset is applied to the DADDR"] _1,
|
||||
#[doc = "The minor loop offset is not applied to the DADDR"]
|
||||
_0,
|
||||
#[doc = "The minor loop offset is applied to the DADDR"]
|
||||
_1,
|
||||
}
|
||||
impl DMLOER {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -112,8 +114,10 @@ impl DMLOER {
|
|||
#[doc = "Possible values of the field `SMLOE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SMLOER {
|
||||
#[doc = "The minor loop offset is not applied to the SADDR"] _0,
|
||||
#[doc = "The minor loop offset is applied to the SADDR"] _1,
|
||||
#[doc = "The minor loop offset is not applied to the SADDR"]
|
||||
_0,
|
||||
#[doc = "The minor loop offset is applied to the SADDR"]
|
||||
_1,
|
||||
}
|
||||
impl SMLOER {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -186,8 +190,10 @@ impl<'a> _MLOFFW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `DMLOE`"]
|
||||
pub enum DMLOEW {
|
||||
#[doc = "The minor loop offset is not applied to the DADDR"] _0,
|
||||
#[doc = "The minor loop offset is applied to the DADDR"] _1,
|
||||
#[doc = "The minor loop offset is not applied to the DADDR"]
|
||||
_0,
|
||||
#[doc = "The minor loop offset is applied to the DADDR"]
|
||||
_1,
|
||||
}
|
||||
impl DMLOEW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -242,8 +248,10 @@ impl<'a> _DMLOEW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SMLOE`"]
|
||||
pub enum SMLOEW {
|
||||
#[doc = "The minor loop offset is not applied to the SADDR"] _0,
|
||||
#[doc = "The minor loop offset is applied to the SADDR"] _1,
|
||||
#[doc = "The minor loop offset is not applied to the SADDR"]
|
||||
_0,
|
||||
#[doc = "The minor loop offset is applied to the SADDR"]
|
||||
_1,
|
||||
}
|
||||
impl SMLOEW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
|
|||
|
|
@ -67,10 +67,14 @@ impl DMODR {
|
|||
#[doc = "Possible values of the field `SSIZE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SSIZER {
|
||||
#[doc = "8-bit"] _0,
|
||||
#[doc = "16-bit"] _1,
|
||||
#[doc = "32-bit"] _10,
|
||||
#[doc = r" Reserved"] _Reserved(u8),
|
||||
#[doc = "8-bit"]
|
||||
_0,
|
||||
#[doc = "16-bit"]
|
||||
_1,
|
||||
#[doc = "32-bit"]
|
||||
_10,
|
||||
#[doc = r" Reserved"]
|
||||
_Reserved(u8),
|
||||
}
|
||||
impl SSIZER {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
|
|
@ -113,8 +117,10 @@ impl SSIZER {
|
|||
#[doc = "Possible values of the field `SMOD`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SMODR {
|
||||
#[doc = "Source address modulo feature is disabled"] _0,
|
||||
#[doc = r" Reserved"] _Reserved(u8),
|
||||
#[doc = "Source address modulo feature is disabled"]
|
||||
_0,
|
||||
#[doc = r" Reserved"]
|
||||
_Reserved(u8),
|
||||
}
|
||||
impl SMODR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
|
|
@ -172,9 +178,12 @@ impl<'a> _DMODW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SSIZE`"]
|
||||
pub enum SSIZEW {
|
||||
#[doc = "8-bit"] _0,
|
||||
#[doc = "16-bit"] _1,
|
||||
#[doc = "32-bit"] _10,
|
||||
#[doc = "8-bit"]
|
||||
_0,
|
||||
#[doc = "16-bit"]
|
||||
_1,
|
||||
#[doc = "32-bit"]
|
||||
_10,
|
||||
}
|
||||
impl SSIZEW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -225,7 +234,8 @@ impl<'a> _SSIZEW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SMOD`"]
|
||||
pub enum SMODW {
|
||||
#[doc = "Source address modulo feature is disabled"] _0,
|
||||
#[doc = "Source address modulo feature is disabled"]
|
||||
_0,
|
||||
}
|
||||
impl SMODW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
|
|||
|
|
@ -56,8 +56,10 @@ impl BITERR {
|
|||
#[doc = "Possible values of the field `ELINK`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ELINKR {
|
||||
#[doc = "The channel-to-channel linking is disabled"] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled"] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled"]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ELINKR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -115,8 +117,10 @@ impl<'a> _BITERW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `ELINK`"]
|
||||
pub enum ELINKW {
|
||||
#[doc = "The channel-to-channel linking is disabled"] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled"] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled"]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ELINKW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
|
|||
|
|
@ -67,8 +67,10 @@ impl LINKCHR {
|
|||
#[doc = "Possible values of the field `ELINK`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ELINKR {
|
||||
#[doc = "The channel-to-channel linking is disabled"] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled"] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled"]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ELINKR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -141,8 +143,10 @@ impl<'a> _LINKCHW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `ELINK`"]
|
||||
pub enum ELINKW {
|
||||
#[doc = "The channel-to-channel linking is disabled"] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled"] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled"]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ELINKW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
|
|||
|
|
@ -56,8 +56,10 @@ impl CITERR {
|
|||
#[doc = "Possible values of the field `ELINK`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ELINKR {
|
||||
#[doc = "The channel-to-channel linking is disabled"] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled"] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled"]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ELINKR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -115,8 +117,10 @@ impl<'a> _CITERW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `ELINK`"]
|
||||
pub enum ELINKW {
|
||||
#[doc = "The channel-to-channel linking is disabled"] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled"] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled"]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ELINKW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
|
|||
|
|
@ -67,8 +67,10 @@ impl LINKCHR {
|
|||
#[doc = "Possible values of the field `ELINK`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ELINKR {
|
||||
#[doc = "The channel-to-channel linking is disabled"] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled"] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled"]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ELINKR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -141,8 +143,10 @@ impl<'a> _LINKCHW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `ELINK`"]
|
||||
pub enum ELINKW {
|
||||
#[doc = "The channel-to-channel linking is disabled"] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled"] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled"]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ELINKW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
|
|||
|
|
@ -45,8 +45,10 @@ impl super::TCD10_CSR {
|
|||
#[doc = "Possible values of the field `START`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum STARTR {
|
||||
#[doc = "The channel is not explicitly started."] _0,
|
||||
#[doc = "The channel is explicitly started via a software initiated service request."] _1,
|
||||
#[doc = "The channel is not explicitly started."]
|
||||
_0,
|
||||
#[doc = "The channel is explicitly started via a software initiated service request."]
|
||||
_1,
|
||||
}
|
||||
impl STARTR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -90,8 +92,10 @@ impl STARTR {
|
|||
#[doc = "Possible values of the field `INTMAJOR`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum INTMAJORR {
|
||||
#[doc = "The end-of-major loop interrupt is disabled."] _0,
|
||||
#[doc = "The end-of-major loop interrupt is enabled."] _1,
|
||||
#[doc = "The end-of-major loop interrupt is disabled."]
|
||||
_0,
|
||||
#[doc = "The end-of-major loop interrupt is enabled."]
|
||||
_1,
|
||||
}
|
||||
impl INTMAJORR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -135,8 +139,10 @@ impl INTMAJORR {
|
|||
#[doc = "Possible values of the field `INTHALF`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum INTHALFR {
|
||||
#[doc = "The half-point interrupt is disabled."] _0,
|
||||
#[doc = "The half-point interrupt is enabled."] _1,
|
||||
#[doc = "The half-point interrupt is disabled."]
|
||||
_0,
|
||||
#[doc = "The half-point interrupt is enabled."]
|
||||
_1,
|
||||
}
|
||||
impl INTHALFR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -201,7 +207,8 @@ impl DREQR {
|
|||
#[doc = "Possible values of the field `ESG`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ESGR {
|
||||
#[doc = "The current channel's TCD is normal format."] _0,
|
||||
#[doc = "The current channel's TCD is normal format."]
|
||||
_0,
|
||||
#[doc = "The current channel's TCD specifies a scatter gather format. The DLASTSGA field provides a memory pointer to the next TCD to be loaded into this channel after the major loop completes its execution."]
|
||||
_1,
|
||||
}
|
||||
|
|
@ -247,8 +254,10 @@ impl ESGR {
|
|||
#[doc = "Possible values of the field `MAJORELINK`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum MAJORELINKR {
|
||||
#[doc = "The channel-to-channel linking is disabled."] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled."] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled."]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled."]
|
||||
_1,
|
||||
}
|
||||
impl MAJORELINKR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -345,10 +354,14 @@ impl MAJORLINKCHR {
|
|||
#[doc = "Possible values of the field `BWC`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum BWCR {
|
||||
#[doc = "No eDMA engine stalls."] _0,
|
||||
#[doc = "eDMA engine stalls for 4 cycles after each R/W."] _10,
|
||||
#[doc = "eDMA engine stalls for 8 cycles after each R/W."] _11,
|
||||
#[doc = r" Reserved"] _Reserved(u8),
|
||||
#[doc = "No eDMA engine stalls."]
|
||||
_0,
|
||||
#[doc = "eDMA engine stalls for 4 cycles after each R/W."]
|
||||
_10,
|
||||
#[doc = "eDMA engine stalls for 8 cycles after each R/W."]
|
||||
_11,
|
||||
#[doc = r" Reserved"]
|
||||
_Reserved(u8),
|
||||
}
|
||||
impl BWCR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
|
|
@ -390,8 +403,10 @@ impl BWCR {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `START`"]
|
||||
pub enum STARTW {
|
||||
#[doc = "The channel is not explicitly started."] _0,
|
||||
#[doc = "The channel is explicitly started via a software initiated service request."] _1,
|
||||
#[doc = "The channel is not explicitly started."]
|
||||
_0,
|
||||
#[doc = "The channel is explicitly started via a software initiated service request."]
|
||||
_1,
|
||||
}
|
||||
impl STARTW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -446,8 +461,10 @@ impl<'a> _STARTW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `INTMAJOR`"]
|
||||
pub enum INTMAJORW {
|
||||
#[doc = "The end-of-major loop interrupt is disabled."] _0,
|
||||
#[doc = "The end-of-major loop interrupt is enabled."] _1,
|
||||
#[doc = "The end-of-major loop interrupt is disabled."]
|
||||
_0,
|
||||
#[doc = "The end-of-major loop interrupt is enabled."]
|
||||
_1,
|
||||
}
|
||||
impl INTMAJORW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -502,8 +519,10 @@ impl<'a> _INTMAJORW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `INTHALF`"]
|
||||
pub enum INTHALFW {
|
||||
#[doc = "The half-point interrupt is disabled."] _0,
|
||||
#[doc = "The half-point interrupt is enabled."] _1,
|
||||
#[doc = "The half-point interrupt is disabled."]
|
||||
_0,
|
||||
#[doc = "The half-point interrupt is enabled."]
|
||||
_1,
|
||||
}
|
||||
impl INTHALFW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -581,7 +600,8 @@ impl<'a> _DREQW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `ESG`"]
|
||||
pub enum ESGW {
|
||||
#[doc = "The current channel's TCD is normal format."] _0,
|
||||
#[doc = "The current channel's TCD is normal format."]
|
||||
_0,
|
||||
#[doc = "The current channel's TCD specifies a scatter gather format. The DLASTSGA field provides a memory pointer to the next TCD to be loaded into this channel after the major loop completes its execution."]
|
||||
_1,
|
||||
}
|
||||
|
|
@ -638,8 +658,10 @@ impl<'a> _ESGW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `MAJORELINK`"]
|
||||
pub enum MAJORELINKW {
|
||||
#[doc = "The channel-to-channel linking is disabled."] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled."] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled."]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled."]
|
||||
_1,
|
||||
}
|
||||
impl MAJORELINKW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -755,9 +777,12 @@ impl<'a> _MAJORLINKCHW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `BWC`"]
|
||||
pub enum BWCW {
|
||||
#[doc = "No eDMA engine stalls."] _0,
|
||||
#[doc = "eDMA engine stalls for 4 cycles after each R/W."] _10,
|
||||
#[doc = "eDMA engine stalls for 8 cycles after each R/W."] _11,
|
||||
#[doc = "No eDMA engine stalls."]
|
||||
_0,
|
||||
#[doc = "eDMA engine stalls for 4 cycles after each R/W."]
|
||||
_10,
|
||||
#[doc = "eDMA engine stalls for 8 cycles after each R/W."]
|
||||
_11,
|
||||
}
|
||||
impl BWCW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
|
|||
|
|
@ -56,8 +56,10 @@ impl NBYTESR {
|
|||
#[doc = "Possible values of the field `DMLOE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum DMLOER {
|
||||
#[doc = "The minor loop offset is not applied to the DADDR"] _0,
|
||||
#[doc = "The minor loop offset is applied to the DADDR"] _1,
|
||||
#[doc = "The minor loop offset is not applied to the DADDR"]
|
||||
_0,
|
||||
#[doc = "The minor loop offset is applied to the DADDR"]
|
||||
_1,
|
||||
}
|
||||
impl DMLOER {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -101,8 +103,10 @@ impl DMLOER {
|
|||
#[doc = "Possible values of the field `SMLOE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SMLOER {
|
||||
#[doc = "The minor loop offset is not applied to the SADDR"] _0,
|
||||
#[doc = "The minor loop offset is applied to the SADDR"] _1,
|
||||
#[doc = "The minor loop offset is not applied to the SADDR"]
|
||||
_0,
|
||||
#[doc = "The minor loop offset is applied to the SADDR"]
|
||||
_1,
|
||||
}
|
||||
impl SMLOER {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -160,8 +164,10 @@ impl<'a> _NBYTESW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `DMLOE`"]
|
||||
pub enum DMLOEW {
|
||||
#[doc = "The minor loop offset is not applied to the DADDR"] _0,
|
||||
#[doc = "The minor loop offset is applied to the DADDR"] _1,
|
||||
#[doc = "The minor loop offset is not applied to the DADDR"]
|
||||
_0,
|
||||
#[doc = "The minor loop offset is applied to the DADDR"]
|
||||
_1,
|
||||
}
|
||||
impl DMLOEW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -216,8 +222,10 @@ impl<'a> _DMLOEW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SMLOE`"]
|
||||
pub enum SMLOEW {
|
||||
#[doc = "The minor loop offset is not applied to the SADDR"] _0,
|
||||
#[doc = "The minor loop offset is applied to the SADDR"] _1,
|
||||
#[doc = "The minor loop offset is not applied to the SADDR"]
|
||||
_0,
|
||||
#[doc = "The minor loop offset is applied to the SADDR"]
|
||||
_1,
|
||||
}
|
||||
impl SMLOEW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
|
|||
|
|
@ -67,8 +67,10 @@ impl MLOFFR {
|
|||
#[doc = "Possible values of the field `DMLOE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum DMLOER {
|
||||
#[doc = "The minor loop offset is not applied to the DADDR"] _0,
|
||||
#[doc = "The minor loop offset is applied to the DADDR"] _1,
|
||||
#[doc = "The minor loop offset is not applied to the DADDR"]
|
||||
_0,
|
||||
#[doc = "The minor loop offset is applied to the DADDR"]
|
||||
_1,
|
||||
}
|
||||
impl DMLOER {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -112,8 +114,10 @@ impl DMLOER {
|
|||
#[doc = "Possible values of the field `SMLOE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SMLOER {
|
||||
#[doc = "The minor loop offset is not applied to the SADDR"] _0,
|
||||
#[doc = "The minor loop offset is applied to the SADDR"] _1,
|
||||
#[doc = "The minor loop offset is not applied to the SADDR"]
|
||||
_0,
|
||||
#[doc = "The minor loop offset is applied to the SADDR"]
|
||||
_1,
|
||||
}
|
||||
impl SMLOER {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -186,8 +190,10 @@ impl<'a> _MLOFFW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `DMLOE`"]
|
||||
pub enum DMLOEW {
|
||||
#[doc = "The minor loop offset is not applied to the DADDR"] _0,
|
||||
#[doc = "The minor loop offset is applied to the DADDR"] _1,
|
||||
#[doc = "The minor loop offset is not applied to the DADDR"]
|
||||
_0,
|
||||
#[doc = "The minor loop offset is applied to the DADDR"]
|
||||
_1,
|
||||
}
|
||||
impl DMLOEW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -242,8 +248,10 @@ impl<'a> _DMLOEW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SMLOE`"]
|
||||
pub enum SMLOEW {
|
||||
#[doc = "The minor loop offset is not applied to the SADDR"] _0,
|
||||
#[doc = "The minor loop offset is applied to the SADDR"] _1,
|
||||
#[doc = "The minor loop offset is not applied to the SADDR"]
|
||||
_0,
|
||||
#[doc = "The minor loop offset is applied to the SADDR"]
|
||||
_1,
|
||||
}
|
||||
impl SMLOEW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
|
|||
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue