1361 lines
36 KiB
Rust
1361 lines
36 KiB
Rust
#[doc = r" Value read from the register"]
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pub struct R {
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bits: u32,
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}
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#[doc = r" Value to write to the register"]
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pub struct W {
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bits: u32,
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}
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impl super::C2 {
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#[doc = r" Modifies the contents of the register"]
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#[inline]
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pub fn modify<F>(&self, f: F)
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where
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for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
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{
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let bits = self.register.get();
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let r = R { bits: bits };
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let mut w = W { bits: bits };
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f(&r, &mut w);
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self.register.set(w.bits);
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}
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#[doc = r" Reads the contents of the register"]
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#[inline]
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pub fn read(&self) -> R {
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R {
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bits: self.register.get(),
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}
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}
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#[doc = r" Writes to the register"]
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#[inline]
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pub fn write<F>(&self, f: F)
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where
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F: FnOnce(&mut W) -> &mut W,
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{
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let mut w = W::reset_value();
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f(&mut w);
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self.register.set(w.bits);
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}
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#[doc = r" Writes the reset value to the register"]
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#[inline]
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pub fn reset(&self) {
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self.write(|w| w)
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}
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}
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#[doc = r" Value of the field"]
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pub struct ACONR {
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bits: u8,
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}
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impl ACONR {
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#[doc = r" Value of the field as raw bits"]
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#[inline]
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pub fn bits(&self) -> u8 {
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self.bits
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}
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}
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#[doc = "Possible values of the field `INITMOD`"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum INITMODR {
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#[doc = "The modulus is set to 64(same with 111111)."]
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_000000,
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#[doc = r" Reserved"]
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_Reserved(u8),
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}
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impl INITMODR {
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#[doc = r" Value of the field as raw bits"]
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#[inline]
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pub fn bits(&self) -> u8 {
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match *self {
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INITMODR::_000000 => 0,
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INITMODR::_Reserved(bits) => bits,
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}
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}
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#[allow(missing_docs)]
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#[doc(hidden)]
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#[inline]
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pub fn _from(value: u8) -> INITMODR {
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match value {
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0 => INITMODR::_000000,
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i => INITMODR::_Reserved(i),
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}
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}
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#[doc = "Checks if the value of the field is `_000000`"]
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#[inline]
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pub fn is_000000(&self) -> bool {
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*self == INITMODR::_000000
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}
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}
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#[doc = "Possible values of the field `NSAM`"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum NSAMR {
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#[doc = "The comparison result is sampled as soon as the active channel is scanned in one round-robin clock."]
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_00,
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#[doc = "The sampling takes place 1 round-robin clock cycle after the next cycle of the round-robin clock."]
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_01,
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#[doc = "The sampling takes place 2 round-robin clock cycles after the next cycle of the round-robin clock."]
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_10,
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#[doc = "The sampling takes place 3 round-robin clock cycles after the next cycle of the round-robin clock."]
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_11,
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}
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impl NSAMR {
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#[doc = r" Value of the field as raw bits"]
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#[inline]
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pub fn bits(&self) -> u8 {
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match *self {
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NSAMR::_00 => 0,
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NSAMR::_01 => 1,
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NSAMR::_10 => 2,
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NSAMR::_11 => 3,
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}
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}
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#[allow(missing_docs)]
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#[doc(hidden)]
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#[inline]
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pub fn _from(value: u8) -> NSAMR {
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match value {
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0 => NSAMR::_00,
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1 => NSAMR::_01,
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2 => NSAMR::_10,
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3 => NSAMR::_11,
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_ => unreachable!(),
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}
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}
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#[doc = "Checks if the value of the field is `_00`"]
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#[inline]
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pub fn is_00(&self) -> bool {
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*self == NSAMR::_00
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}
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#[doc = "Checks if the value of the field is `_01`"]
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#[inline]
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pub fn is_01(&self) -> bool {
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*self == NSAMR::_01
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}
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#[doc = "Checks if the value of the field is `_10`"]
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#[inline]
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pub fn is_10(&self) -> bool {
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*self == NSAMR::_10
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}
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#[doc = "Checks if the value of the field is `_11`"]
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#[inline]
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pub fn is_11(&self) -> bool {
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*self == NSAMR::_11
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}
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}
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#[doc = r" Value of the field"]
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pub struct CH0FR {
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bits: bool,
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}
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impl CH0FR {
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#[doc = r" Value of the field as raw bits"]
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#[inline]
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pub fn bit(&self) -> bool {
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self.bits
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}
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#[doc = r" Returns `true` if the bit is clear (0)"]
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#[inline]
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pub fn bit_is_clear(&self) -> bool {
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!self.bit()
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}
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#[doc = r" Returns `true` if the bit is set (1)"]
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#[inline]
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pub fn bit_is_set(&self) -> bool {
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self.bit()
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}
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}
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#[doc = r" Value of the field"]
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pub struct CH1FR {
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bits: bool,
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}
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impl CH1FR {
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#[doc = r" Value of the field as raw bits"]
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#[inline]
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pub fn bit(&self) -> bool {
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self.bits
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}
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#[doc = r" Returns `true` if the bit is clear (0)"]
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#[inline]
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pub fn bit_is_clear(&self) -> bool {
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!self.bit()
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}
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#[doc = r" Returns `true` if the bit is set (1)"]
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#[inline]
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pub fn bit_is_set(&self) -> bool {
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self.bit()
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}
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}
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#[doc = r" Value of the field"]
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pub struct CH2FR {
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bits: bool,
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}
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impl CH2FR {
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#[doc = r" Value of the field as raw bits"]
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#[inline]
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pub fn bit(&self) -> bool {
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self.bits
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}
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#[doc = r" Returns `true` if the bit is clear (0)"]
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#[inline]
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pub fn bit_is_clear(&self) -> bool {
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!self.bit()
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}
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#[doc = r" Returns `true` if the bit is set (1)"]
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#[inline]
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pub fn bit_is_set(&self) -> bool {
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self.bit()
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}
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}
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#[doc = r" Value of the field"]
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pub struct CH3FR {
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bits: bool,
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}
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impl CH3FR {
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#[doc = r" Value of the field as raw bits"]
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#[inline]
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pub fn bit(&self) -> bool {
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self.bits
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}
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#[doc = r" Returns `true` if the bit is clear (0)"]
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#[inline]
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pub fn bit_is_clear(&self) -> bool {
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!self.bit()
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}
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#[doc = r" Returns `true` if the bit is set (1)"]
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#[inline]
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pub fn bit_is_set(&self) -> bool {
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self.bit()
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}
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}
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#[doc = r" Value of the field"]
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pub struct CH4FR {
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bits: bool,
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}
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impl CH4FR {
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#[doc = r" Value of the field as raw bits"]
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#[inline]
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pub fn bit(&self) -> bool {
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self.bits
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}
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#[doc = r" Returns `true` if the bit is clear (0)"]
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#[inline]
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pub fn bit_is_clear(&self) -> bool {
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!self.bit()
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}
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#[doc = r" Returns `true` if the bit is set (1)"]
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#[inline]
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pub fn bit_is_set(&self) -> bool {
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self.bit()
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}
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}
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#[doc = r" Value of the field"]
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pub struct CH5FR {
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bits: bool,
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}
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impl CH5FR {
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#[doc = r" Value of the field as raw bits"]
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#[inline]
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pub fn bit(&self) -> bool {
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self.bits
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}
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#[doc = r" Returns `true` if the bit is clear (0)"]
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#[inline]
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pub fn bit_is_clear(&self) -> bool {
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!self.bit()
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}
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#[doc = r" Returns `true` if the bit is set (1)"]
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#[inline]
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pub fn bit_is_set(&self) -> bool {
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self.bit()
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}
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}
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#[doc = r" Value of the field"]
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pub struct CH6FR {
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bits: bool,
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}
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impl CH6FR {
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#[doc = r" Value of the field as raw bits"]
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#[inline]
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pub fn bit(&self) -> bool {
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self.bits
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}
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#[doc = r" Returns `true` if the bit is clear (0)"]
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#[inline]
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pub fn bit_is_clear(&self) -> bool {
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!self.bit()
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}
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#[doc = r" Returns `true` if the bit is set (1)"]
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#[inline]
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pub fn bit_is_set(&self) -> bool {
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self.bit()
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}
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}
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#[doc = r" Value of the field"]
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pub struct CH7FR {
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bits: bool,
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}
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impl CH7FR {
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#[doc = r" Value of the field as raw bits"]
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#[inline]
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pub fn bit(&self) -> bool {
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self.bits
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}
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#[doc = r" Returns `true` if the bit is clear (0)"]
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#[inline]
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pub fn bit_is_clear(&self) -> bool {
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!self.bit()
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}
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#[doc = r" Returns `true` if the bit is set (1)"]
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#[inline]
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pub fn bit_is_set(&self) -> bool {
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self.bit()
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}
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}
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#[doc = "Possible values of the field `FXMXCH`"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum FXMXCHR {
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#[doc = "Channel 0 is selected as the fixed reference input for the fixed mux port."]
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_000,
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#[doc = "Channel 1 is selected as the fixed reference input for the fixed mux port."]
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_001,
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#[doc = "Channel 2 is selected as the fixed reference input for the fixed mux port."]
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_010,
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#[doc = "Channel 3 is selected as the fixed reference input for the fixed mux port."]
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_011,
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#[doc = "Channel 4 is selected as the fixed reference input for the fixed mux port."]
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_100,
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#[doc = "Channel 5 is selected as the fixed reference input for the fixed mux port."]
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_101,
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#[doc = "Channel 6 is selected as the fixed reference input for the fixed mux port."]
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_110,
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#[doc = "Channel 7 is selected as the fixed reference input for the fixed mux port."]
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_111,
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}
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impl FXMXCHR {
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#[doc = r" Value of the field as raw bits"]
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#[inline]
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pub fn bits(&self) -> u8 {
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match *self {
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FXMXCHR::_000 => 0,
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FXMXCHR::_001 => 1,
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FXMXCHR::_010 => 2,
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FXMXCHR::_011 => 3,
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FXMXCHR::_100 => 4,
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FXMXCHR::_101 => 5,
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FXMXCHR::_110 => 6,
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FXMXCHR::_111 => 7,
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}
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}
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#[allow(missing_docs)]
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#[doc(hidden)]
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#[inline]
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pub fn _from(value: u8) -> FXMXCHR {
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match value {
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0 => FXMXCHR::_000,
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1 => FXMXCHR::_001,
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2 => FXMXCHR::_010,
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3 => FXMXCHR::_011,
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4 => FXMXCHR::_100,
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5 => FXMXCHR::_101,
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6 => FXMXCHR::_110,
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7 => FXMXCHR::_111,
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_ => unreachable!(),
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}
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}
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|
#[doc = "Checks if the value of the field is `_000`"]
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#[inline]
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pub fn is_000(&self) -> bool {
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*self == FXMXCHR::_000
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}
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#[doc = "Checks if the value of the field is `_001`"]
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#[inline]
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pub fn is_001(&self) -> bool {
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*self == FXMXCHR::_001
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}
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#[doc = "Checks if the value of the field is `_010`"]
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|
#[inline]
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pub fn is_010(&self) -> bool {
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*self == FXMXCHR::_010
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}
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|
#[doc = "Checks if the value of the field is `_011`"]
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#[inline]
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pub fn is_011(&self) -> bool {
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*self == FXMXCHR::_011
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}
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|
#[doc = "Checks if the value of the field is `_100`"]
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#[inline]
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pub fn is_100(&self) -> bool {
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*self == FXMXCHR::_100
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}
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#[doc = "Checks if the value of the field is `_101`"]
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#[inline]
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pub fn is_101(&self) -> bool {
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*self == FXMXCHR::_101
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}
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#[doc = "Checks if the value of the field is `_110`"]
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#[inline]
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pub fn is_110(&self) -> bool {
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*self == FXMXCHR::_110
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|
}
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|
#[doc = "Checks if the value of the field is `_111`"]
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|
#[inline]
|
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pub fn is_111(&self) -> bool {
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*self == FXMXCHR::_111
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}
|
|
}
|
|
#[doc = "Possible values of the field `FXMP`"]
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|
#[derive(Clone, Copy, Debug, PartialEq)]
|
|
pub enum FXMPR {
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|
#[doc = "The Plus port is fixed. Only the inputs to the Minus port are swept in each round."]
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|
_0,
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#[doc = "The Minus port is fixed. Only the inputs to the Plus port are swept in each round."]
|
|
_1,
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|
}
|
|
impl FXMPR {
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|
#[doc = r" Returns `true` if the bit is clear (0)"]
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|
#[inline]
|
|
pub fn bit_is_clear(&self) -> bool {
|
|
!self.bit()
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|
}
|
|
#[doc = r" Returns `true` if the bit is set (1)"]
|
|
#[inline]
|
|
pub fn bit_is_set(&self) -> bool {
|
|
self.bit()
|
|
}
|
|
#[doc = r" Value of the field as raw bits"]
|
|
#[inline]
|
|
pub fn bit(&self) -> bool {
|
|
match *self {
|
|
FXMPR::_0 => false,
|
|
FXMPR::_1 => true,
|
|
}
|
|
}
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
#[inline]
|
|
pub fn _from(value: bool) -> FXMPR {
|
|
match value {
|
|
false => FXMPR::_0,
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|
true => FXMPR::_1,
|
|
}
|
|
}
|
|
#[doc = "Checks if the value of the field is `_0`"]
|
|
#[inline]
|
|
pub fn is_0(&self) -> bool {
|
|
*self == FXMPR::_0
|
|
}
|
|
#[doc = "Checks if the value of the field is `_1`"]
|
|
#[inline]
|
|
pub fn is_1(&self) -> bool {
|
|
*self == FXMPR::_1
|
|
}
|
|
}
|
|
#[doc = "Possible values of the field `RRIE`"]
|
|
#[derive(Clone, Copy, Debug, PartialEq)]
|
|
pub enum RRIER {
|
|
#[doc = "The round-robin interrupt is disabled."]
|
|
_0,
|
|
#[doc = "The round-robin interrupt is enabled when a comparison result changes from the last sample."]
|
|
_1,
|
|
}
|
|
impl RRIER {
|
|
#[doc = r" Returns `true` if the bit is clear (0)"]
|
|
#[inline]
|
|
pub fn bit_is_clear(&self) -> bool {
|
|
!self.bit()
|
|
}
|
|
#[doc = r" Returns `true` if the bit is set (1)"]
|
|
#[inline]
|
|
pub fn bit_is_set(&self) -> bool {
|
|
self.bit()
|
|
}
|
|
#[doc = r" Value of the field as raw bits"]
|
|
#[inline]
|
|
pub fn bit(&self) -> bool {
|
|
match *self {
|
|
RRIER::_0 => false,
|
|
RRIER::_1 => true,
|
|
}
|
|
}
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
#[inline]
|
|
pub fn _from(value: bool) -> RRIER {
|
|
match value {
|
|
false => RRIER::_0,
|
|
true => RRIER::_1,
|
|
}
|
|
}
|
|
#[doc = "Checks if the value of the field is `_0`"]
|
|
#[inline]
|
|
pub fn is_0(&self) -> bool {
|
|
*self == RRIER::_0
|
|
}
|
|
#[doc = "Checks if the value of the field is `_1`"]
|
|
#[inline]
|
|
pub fn is_1(&self) -> bool {
|
|
*self == RRIER::_1
|
|
}
|
|
}
|
|
#[doc = "Possible values of the field `RRE`"]
|
|
#[derive(Clone, Copy, Debug, PartialEq)]
|
|
pub enum RRER {
|
|
#[doc = "Round-robin operation is disabled."]
|
|
_0,
|
|
#[doc = "Round-robin operation is enabled."]
|
|
_1,
|
|
}
|
|
impl RRER {
|
|
#[doc = r" Returns `true` if the bit is clear (0)"]
|
|
#[inline]
|
|
pub fn bit_is_clear(&self) -> bool {
|
|
!self.bit()
|
|
}
|
|
#[doc = r" Returns `true` if the bit is set (1)"]
|
|
#[inline]
|
|
pub fn bit_is_set(&self) -> bool {
|
|
self.bit()
|
|
}
|
|
#[doc = r" Value of the field as raw bits"]
|
|
#[inline]
|
|
pub fn bit(&self) -> bool {
|
|
match *self {
|
|
RRER::_0 => false,
|
|
RRER::_1 => true,
|
|
}
|
|
}
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
#[inline]
|
|
pub fn _from(value: bool) -> RRER {
|
|
match value {
|
|
false => RRER::_0,
|
|
true => RRER::_1,
|
|
}
|
|
}
|
|
#[doc = "Checks if the value of the field is `_0`"]
|
|
#[inline]
|
|
pub fn is_0(&self) -> bool {
|
|
*self == RRER::_0
|
|
}
|
|
#[doc = "Checks if the value of the field is `_1`"]
|
|
#[inline]
|
|
pub fn is_1(&self) -> bool {
|
|
*self == RRER::_1
|
|
}
|
|
}
|
|
#[doc = r" Proxy"]
|
|
pub struct _ACONW<'a> {
|
|
w: &'a mut W,
|
|
}
|
|
impl<'a> _ACONW<'a> {
|
|
#[doc = r" Writes raw bits to the field"]
|
|
#[inline]
|
|
pub unsafe fn bits(self, value: u8) -> &'a mut W {
|
|
const MASK: u8 = 255;
|
|
const OFFSET: u8 = 0;
|
|
self.w.bits &= !((MASK as u32) << OFFSET);
|
|
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
|
self.w
|
|
}
|
|
}
|
|
#[doc = "Values that can be written to the field `INITMOD`"]
|
|
pub enum INITMODW {
|
|
#[doc = "The modulus is set to 64(same with 111111)."]
|
|
_000000,
|
|
}
|
|
impl INITMODW {
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
#[inline]
|
|
pub fn _bits(&self) -> u8 {
|
|
match *self {
|
|
INITMODW::_000000 => 0,
|
|
}
|
|
}
|
|
}
|
|
#[doc = r" Proxy"]
|
|
pub struct _INITMODW<'a> {
|
|
w: &'a mut W,
|
|
}
|
|
impl<'a> _INITMODW<'a> {
|
|
#[doc = r" Writes `variant` to the field"]
|
|
#[inline]
|
|
pub fn variant(self, variant: INITMODW) -> &'a mut W {
|
|
unsafe { self.bits(variant._bits()) }
|
|
}
|
|
#[doc = "The modulus is set to 64(same with 111111)."]
|
|
#[inline]
|
|
pub fn _000000(self) -> &'a mut W {
|
|
self.variant(INITMODW::_000000)
|
|
}
|
|
#[doc = r" Writes raw bits to the field"]
|
|
#[inline]
|
|
pub unsafe fn bits(self, value: u8) -> &'a mut W {
|
|
const MASK: u8 = 63;
|
|
const OFFSET: u8 = 8;
|
|
self.w.bits &= !((MASK as u32) << OFFSET);
|
|
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
|
self.w
|
|
}
|
|
}
|
|
#[doc = "Values that can be written to the field `NSAM`"]
|
|
pub enum NSAMW {
|
|
#[doc = "The comparison result is sampled as soon as the active channel is scanned in one round-robin clock."]
|
|
_00,
|
|
#[doc = "The sampling takes place 1 round-robin clock cycle after the next cycle of the round-robin clock."]
|
|
_01,
|
|
#[doc = "The sampling takes place 2 round-robin clock cycles after the next cycle of the round-robin clock."]
|
|
_10,
|
|
#[doc = "The sampling takes place 3 round-robin clock cycles after the next cycle of the round-robin clock."]
|
|
_11,
|
|
}
|
|
impl NSAMW {
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
#[inline]
|
|
pub fn _bits(&self) -> u8 {
|
|
match *self {
|
|
NSAMW::_00 => 0,
|
|
NSAMW::_01 => 1,
|
|
NSAMW::_10 => 2,
|
|
NSAMW::_11 => 3,
|
|
}
|
|
}
|
|
}
|
|
#[doc = r" Proxy"]
|
|
pub struct _NSAMW<'a> {
|
|
w: &'a mut W,
|
|
}
|
|
impl<'a> _NSAMW<'a> {
|
|
#[doc = r" Writes `variant` to the field"]
|
|
#[inline]
|
|
pub fn variant(self, variant: NSAMW) -> &'a mut W {
|
|
{
|
|
self.bits(variant._bits())
|
|
}
|
|
}
|
|
#[doc = "The comparison result is sampled as soon as the active channel is scanned in one round-robin clock."]
|
|
#[inline]
|
|
pub fn _00(self) -> &'a mut W {
|
|
self.variant(NSAMW::_00)
|
|
}
|
|
#[doc = "The sampling takes place 1 round-robin clock cycle after the next cycle of the round-robin clock."]
|
|
#[inline]
|
|
pub fn _01(self) -> &'a mut W {
|
|
self.variant(NSAMW::_01)
|
|
}
|
|
#[doc = "The sampling takes place 2 round-robin clock cycles after the next cycle of the round-robin clock."]
|
|
#[inline]
|
|
pub fn _10(self) -> &'a mut W {
|
|
self.variant(NSAMW::_10)
|
|
}
|
|
#[doc = "The sampling takes place 3 round-robin clock cycles after the next cycle of the round-robin clock."]
|
|
#[inline]
|
|
pub fn _11(self) -> &'a mut W {
|
|
self.variant(NSAMW::_11)
|
|
}
|
|
#[doc = r" Writes raw bits to the field"]
|
|
#[inline]
|
|
pub fn bits(self, value: u8) -> &'a mut W {
|
|
const MASK: u8 = 3;
|
|
const OFFSET: u8 = 14;
|
|
self.w.bits &= !((MASK as u32) << OFFSET);
|
|
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
|
self.w
|
|
}
|
|
}
|
|
#[doc = r" Proxy"]
|
|
pub struct _CH0FW<'a> {
|
|
w: &'a mut W,
|
|
}
|
|
impl<'a> _CH0FW<'a> {
|
|
#[doc = r" Sets the field bit"]
|
|
pub fn set_bit(self) -> &'a mut W {
|
|
self.bit(true)
|
|
}
|
|
#[doc = r" Clears the field bit"]
|
|
pub fn clear_bit(self) -> &'a mut W {
|
|
self.bit(false)
|
|
}
|
|
#[doc = r" Writes raw bits to the field"]
|
|
#[inline]
|
|
pub fn bit(self, value: bool) -> &'a mut W {
|
|
const MASK: bool = true;
|
|
const OFFSET: u8 = 16;
|
|
self.w.bits &= !((MASK as u32) << OFFSET);
|
|
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
|
self.w
|
|
}
|
|
}
|
|
#[doc = r" Proxy"]
|
|
pub struct _CH1FW<'a> {
|
|
w: &'a mut W,
|
|
}
|
|
impl<'a> _CH1FW<'a> {
|
|
#[doc = r" Sets the field bit"]
|
|
pub fn set_bit(self) -> &'a mut W {
|
|
self.bit(true)
|
|
}
|
|
#[doc = r" Clears the field bit"]
|
|
pub fn clear_bit(self) -> &'a mut W {
|
|
self.bit(false)
|
|
}
|
|
#[doc = r" Writes raw bits to the field"]
|
|
#[inline]
|
|
pub fn bit(self, value: bool) -> &'a mut W {
|
|
const MASK: bool = true;
|
|
const OFFSET: u8 = 17;
|
|
self.w.bits &= !((MASK as u32) << OFFSET);
|
|
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
|
self.w
|
|
}
|
|
}
|
|
#[doc = r" Proxy"]
|
|
pub struct _CH2FW<'a> {
|
|
w: &'a mut W,
|
|
}
|
|
impl<'a> _CH2FW<'a> {
|
|
#[doc = r" Sets the field bit"]
|
|
pub fn set_bit(self) -> &'a mut W {
|
|
self.bit(true)
|
|
}
|
|
#[doc = r" Clears the field bit"]
|
|
pub fn clear_bit(self) -> &'a mut W {
|
|
self.bit(false)
|
|
}
|
|
#[doc = r" Writes raw bits to the field"]
|
|
#[inline]
|
|
pub fn bit(self, value: bool) -> &'a mut W {
|
|
const MASK: bool = true;
|
|
const OFFSET: u8 = 18;
|
|
self.w.bits &= !((MASK as u32) << OFFSET);
|
|
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
|
self.w
|
|
}
|
|
}
|
|
#[doc = r" Proxy"]
|
|
pub struct _CH3FW<'a> {
|
|
w: &'a mut W,
|
|
}
|
|
impl<'a> _CH3FW<'a> {
|
|
#[doc = r" Sets the field bit"]
|
|
pub fn set_bit(self) -> &'a mut W {
|
|
self.bit(true)
|
|
}
|
|
#[doc = r" Clears the field bit"]
|
|
pub fn clear_bit(self) -> &'a mut W {
|
|
self.bit(false)
|
|
}
|
|
#[doc = r" Writes raw bits to the field"]
|
|
#[inline]
|
|
pub fn bit(self, value: bool) -> &'a mut W {
|
|
const MASK: bool = true;
|
|
const OFFSET: u8 = 19;
|
|
self.w.bits &= !((MASK as u32) << OFFSET);
|
|
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
|
self.w
|
|
}
|
|
}
|
|
#[doc = r" Proxy"]
|
|
pub struct _CH4FW<'a> {
|
|
w: &'a mut W,
|
|
}
|
|
impl<'a> _CH4FW<'a> {
|
|
#[doc = r" Sets the field bit"]
|
|
pub fn set_bit(self) -> &'a mut W {
|
|
self.bit(true)
|
|
}
|
|
#[doc = r" Clears the field bit"]
|
|
pub fn clear_bit(self) -> &'a mut W {
|
|
self.bit(false)
|
|
}
|
|
#[doc = r" Writes raw bits to the field"]
|
|
#[inline]
|
|
pub fn bit(self, value: bool) -> &'a mut W {
|
|
const MASK: bool = true;
|
|
const OFFSET: u8 = 20;
|
|
self.w.bits &= !((MASK as u32) << OFFSET);
|
|
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
|
self.w
|
|
}
|
|
}
|
|
#[doc = r" Proxy"]
|
|
pub struct _CH5FW<'a> {
|
|
w: &'a mut W,
|
|
}
|
|
impl<'a> _CH5FW<'a> {
|
|
#[doc = r" Sets the field bit"]
|
|
pub fn set_bit(self) -> &'a mut W {
|
|
self.bit(true)
|
|
}
|
|
#[doc = r" Clears the field bit"]
|
|
pub fn clear_bit(self) -> &'a mut W {
|
|
self.bit(false)
|
|
}
|
|
#[doc = r" Writes raw bits to the field"]
|
|
#[inline]
|
|
pub fn bit(self, value: bool) -> &'a mut W {
|
|
const MASK: bool = true;
|
|
const OFFSET: u8 = 21;
|
|
self.w.bits &= !((MASK as u32) << OFFSET);
|
|
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
|
self.w
|
|
}
|
|
}
|
|
#[doc = r" Proxy"]
|
|
pub struct _CH6FW<'a> {
|
|
w: &'a mut W,
|
|
}
|
|
impl<'a> _CH6FW<'a> {
|
|
#[doc = r" Sets the field bit"]
|
|
pub fn set_bit(self) -> &'a mut W {
|
|
self.bit(true)
|
|
}
|
|
#[doc = r" Clears the field bit"]
|
|
pub fn clear_bit(self) -> &'a mut W {
|
|
self.bit(false)
|
|
}
|
|
#[doc = r" Writes raw bits to the field"]
|
|
#[inline]
|
|
pub fn bit(self, value: bool) -> &'a mut W {
|
|
const MASK: bool = true;
|
|
const OFFSET: u8 = 22;
|
|
self.w.bits &= !((MASK as u32) << OFFSET);
|
|
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
|
self.w
|
|
}
|
|
}
|
|
#[doc = r" Proxy"]
|
|
pub struct _CH7FW<'a> {
|
|
w: &'a mut W,
|
|
}
|
|
impl<'a> _CH7FW<'a> {
|
|
#[doc = r" Sets the field bit"]
|
|
pub fn set_bit(self) -> &'a mut W {
|
|
self.bit(true)
|
|
}
|
|
#[doc = r" Clears the field bit"]
|
|
pub fn clear_bit(self) -> &'a mut W {
|
|
self.bit(false)
|
|
}
|
|
#[doc = r" Writes raw bits to the field"]
|
|
#[inline]
|
|
pub fn bit(self, value: bool) -> &'a mut W {
|
|
const MASK: bool = true;
|
|
const OFFSET: u8 = 23;
|
|
self.w.bits &= !((MASK as u32) << OFFSET);
|
|
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
|
self.w
|
|
}
|
|
}
|
|
#[doc = "Values that can be written to the field `FXMXCH`"]
|
|
pub enum FXMXCHW {
|
|
#[doc = "Channel 0 is selected as the fixed reference input for the fixed mux port."]
|
|
_000,
|
|
#[doc = "Channel 1 is selected as the fixed reference input for the fixed mux port."]
|
|
_001,
|
|
#[doc = "Channel 2 is selected as the fixed reference input for the fixed mux port."]
|
|
_010,
|
|
#[doc = "Channel 3 is selected as the fixed reference input for the fixed mux port."]
|
|
_011,
|
|
#[doc = "Channel 4 is selected as the fixed reference input for the fixed mux port."]
|
|
_100,
|
|
#[doc = "Channel 5 is selected as the fixed reference input for the fixed mux port."]
|
|
_101,
|
|
#[doc = "Channel 6 is selected as the fixed reference input for the fixed mux port."]
|
|
_110,
|
|
#[doc = "Channel 7 is selected as the fixed reference input for the fixed mux port."]
|
|
_111,
|
|
}
|
|
impl FXMXCHW {
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
#[inline]
|
|
pub fn _bits(&self) -> u8 {
|
|
match *self {
|
|
FXMXCHW::_000 => 0,
|
|
FXMXCHW::_001 => 1,
|
|
FXMXCHW::_010 => 2,
|
|
FXMXCHW::_011 => 3,
|
|
FXMXCHW::_100 => 4,
|
|
FXMXCHW::_101 => 5,
|
|
FXMXCHW::_110 => 6,
|
|
FXMXCHW::_111 => 7,
|
|
}
|
|
}
|
|
}
|
|
#[doc = r" Proxy"]
|
|
pub struct _FXMXCHW<'a> {
|
|
w: &'a mut W,
|
|
}
|
|
impl<'a> _FXMXCHW<'a> {
|
|
#[doc = r" Writes `variant` to the field"]
|
|
#[inline]
|
|
pub fn variant(self, variant: FXMXCHW) -> &'a mut W {
|
|
{
|
|
self.bits(variant._bits())
|
|
}
|
|
}
|
|
#[doc = "Channel 0 is selected as the fixed reference input for the fixed mux port."]
|
|
#[inline]
|
|
pub fn _000(self) -> &'a mut W {
|
|
self.variant(FXMXCHW::_000)
|
|
}
|
|
#[doc = "Channel 1 is selected as the fixed reference input for the fixed mux port."]
|
|
#[inline]
|
|
pub fn _001(self) -> &'a mut W {
|
|
self.variant(FXMXCHW::_001)
|
|
}
|
|
#[doc = "Channel 2 is selected as the fixed reference input for the fixed mux port."]
|
|
#[inline]
|
|
pub fn _010(self) -> &'a mut W {
|
|
self.variant(FXMXCHW::_010)
|
|
}
|
|
#[doc = "Channel 3 is selected as the fixed reference input for the fixed mux port."]
|
|
#[inline]
|
|
pub fn _011(self) -> &'a mut W {
|
|
self.variant(FXMXCHW::_011)
|
|
}
|
|
#[doc = "Channel 4 is selected as the fixed reference input for the fixed mux port."]
|
|
#[inline]
|
|
pub fn _100(self) -> &'a mut W {
|
|
self.variant(FXMXCHW::_100)
|
|
}
|
|
#[doc = "Channel 5 is selected as the fixed reference input for the fixed mux port."]
|
|
#[inline]
|
|
pub fn _101(self) -> &'a mut W {
|
|
self.variant(FXMXCHW::_101)
|
|
}
|
|
#[doc = "Channel 6 is selected as the fixed reference input for the fixed mux port."]
|
|
#[inline]
|
|
pub fn _110(self) -> &'a mut W {
|
|
self.variant(FXMXCHW::_110)
|
|
}
|
|
#[doc = "Channel 7 is selected as the fixed reference input for the fixed mux port."]
|
|
#[inline]
|
|
pub fn _111(self) -> &'a mut W {
|
|
self.variant(FXMXCHW::_111)
|
|
}
|
|
#[doc = r" Writes raw bits to the field"]
|
|
#[inline]
|
|
pub fn bits(self, value: u8) -> &'a mut W {
|
|
const MASK: u8 = 7;
|
|
const OFFSET: u8 = 25;
|
|
self.w.bits &= !((MASK as u32) << OFFSET);
|
|
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
|
self.w
|
|
}
|
|
}
|
|
#[doc = "Values that can be written to the field `FXMP`"]
|
|
pub enum FXMPW {
|
|
#[doc = "The Plus port is fixed. Only the inputs to the Minus port are swept in each round."]
|
|
_0,
|
|
#[doc = "The Minus port is fixed. Only the inputs to the Plus port are swept in each round."]
|
|
_1,
|
|
}
|
|
impl FXMPW {
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
#[inline]
|
|
pub fn _bits(&self) -> bool {
|
|
match *self {
|
|
FXMPW::_0 => false,
|
|
FXMPW::_1 => true,
|
|
}
|
|
}
|
|
}
|
|
#[doc = r" Proxy"]
|
|
pub struct _FXMPW<'a> {
|
|
w: &'a mut W,
|
|
}
|
|
impl<'a> _FXMPW<'a> {
|
|
#[doc = r" Writes `variant` to the field"]
|
|
#[inline]
|
|
pub fn variant(self, variant: FXMPW) -> &'a mut W {
|
|
{
|
|
self.bit(variant._bits())
|
|
}
|
|
}
|
|
#[doc = "The Plus port is fixed. Only the inputs to the Minus port are swept in each round."]
|
|
#[inline]
|
|
pub fn _0(self) -> &'a mut W {
|
|
self.variant(FXMPW::_0)
|
|
}
|
|
#[doc = "The Minus port is fixed. Only the inputs to the Plus port are swept in each round."]
|
|
#[inline]
|
|
pub fn _1(self) -> &'a mut W {
|
|
self.variant(FXMPW::_1)
|
|
}
|
|
#[doc = r" Sets the field bit"]
|
|
pub fn set_bit(self) -> &'a mut W {
|
|
self.bit(true)
|
|
}
|
|
#[doc = r" Clears the field bit"]
|
|
pub fn clear_bit(self) -> &'a mut W {
|
|
self.bit(false)
|
|
}
|
|
#[doc = r" Writes raw bits to the field"]
|
|
#[inline]
|
|
pub fn bit(self, value: bool) -> &'a mut W {
|
|
const MASK: bool = true;
|
|
const OFFSET: u8 = 29;
|
|
self.w.bits &= !((MASK as u32) << OFFSET);
|
|
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
|
self.w
|
|
}
|
|
}
|
|
#[doc = "Values that can be written to the field `RRIE`"]
|
|
pub enum RRIEW {
|
|
#[doc = "The round-robin interrupt is disabled."]
|
|
_0,
|
|
#[doc = "The round-robin interrupt is enabled when a comparison result changes from the last sample."]
|
|
_1,
|
|
}
|
|
impl RRIEW {
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
#[inline]
|
|
pub fn _bits(&self) -> bool {
|
|
match *self {
|
|
RRIEW::_0 => false,
|
|
RRIEW::_1 => true,
|
|
}
|
|
}
|
|
}
|
|
#[doc = r" Proxy"]
|
|
pub struct _RRIEW<'a> {
|
|
w: &'a mut W,
|
|
}
|
|
impl<'a> _RRIEW<'a> {
|
|
#[doc = r" Writes `variant` to the field"]
|
|
#[inline]
|
|
pub fn variant(self, variant: RRIEW) -> &'a mut W {
|
|
{
|
|
self.bit(variant._bits())
|
|
}
|
|
}
|
|
#[doc = "The round-robin interrupt is disabled."]
|
|
#[inline]
|
|
pub fn _0(self) -> &'a mut W {
|
|
self.variant(RRIEW::_0)
|
|
}
|
|
#[doc = "The round-robin interrupt is enabled when a comparison result changes from the last sample."]
|
|
#[inline]
|
|
pub fn _1(self) -> &'a mut W {
|
|
self.variant(RRIEW::_1)
|
|
}
|
|
#[doc = r" Sets the field bit"]
|
|
pub fn set_bit(self) -> &'a mut W {
|
|
self.bit(true)
|
|
}
|
|
#[doc = r" Clears the field bit"]
|
|
pub fn clear_bit(self) -> &'a mut W {
|
|
self.bit(false)
|
|
}
|
|
#[doc = r" Writes raw bits to the field"]
|
|
#[inline]
|
|
pub fn bit(self, value: bool) -> &'a mut W {
|
|
const MASK: bool = true;
|
|
const OFFSET: u8 = 30;
|
|
self.w.bits &= !((MASK as u32) << OFFSET);
|
|
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
|
self.w
|
|
}
|
|
}
|
|
#[doc = "Values that can be written to the field `RRE`"]
|
|
pub enum RREW {
|
|
#[doc = "Round-robin operation is disabled."]
|
|
_0,
|
|
#[doc = "Round-robin operation is enabled."]
|
|
_1,
|
|
}
|
|
impl RREW {
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
#[inline]
|
|
pub fn _bits(&self) -> bool {
|
|
match *self {
|
|
RREW::_0 => false,
|
|
RREW::_1 => true,
|
|
}
|
|
}
|
|
}
|
|
#[doc = r" Proxy"]
|
|
pub struct _RREW<'a> {
|
|
w: &'a mut W,
|
|
}
|
|
impl<'a> _RREW<'a> {
|
|
#[doc = r" Writes `variant` to the field"]
|
|
#[inline]
|
|
pub fn variant(self, variant: RREW) -> &'a mut W {
|
|
{
|
|
self.bit(variant._bits())
|
|
}
|
|
}
|
|
#[doc = "Round-robin operation is disabled."]
|
|
#[inline]
|
|
pub fn _0(self) -> &'a mut W {
|
|
self.variant(RREW::_0)
|
|
}
|
|
#[doc = "Round-robin operation is enabled."]
|
|
#[inline]
|
|
pub fn _1(self) -> &'a mut W {
|
|
self.variant(RREW::_1)
|
|
}
|
|
#[doc = r" Sets the field bit"]
|
|
pub fn set_bit(self) -> &'a mut W {
|
|
self.bit(true)
|
|
}
|
|
#[doc = r" Clears the field bit"]
|
|
pub fn clear_bit(self) -> &'a mut W {
|
|
self.bit(false)
|
|
}
|
|
#[doc = r" Writes raw bits to the field"]
|
|
#[inline]
|
|
pub fn bit(self, value: bool) -> &'a mut W {
|
|
const MASK: bool = true;
|
|
const OFFSET: u8 = 31;
|
|
self.w.bits &= !((MASK as u32) << OFFSET);
|
|
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
|
self.w
|
|
}
|
|
}
|
|
impl R {
|
|
#[doc = r" Value of the register as raw bits"]
|
|
#[inline]
|
|
pub fn bits(&self) -> u32 {
|
|
self.bits
|
|
}
|
|
#[doc = "Bits 0:7 - The result of the input comparison for channel n"]
|
|
#[inline]
|
|
pub fn acon(&self) -> ACONR {
|
|
let bits = {
|
|
const MASK: u8 = 255;
|
|
const OFFSET: u8 = 0;
|
|
((self.bits >> OFFSET) & MASK as u32) as u8
|
|
};
|
|
ACONR { bits }
|
|
}
|
|
#[doc = "Bits 8:13 - Comparator and DAC initialization delay modulus."]
|
|
#[inline]
|
|
pub fn initmod(&self) -> INITMODR {
|
|
INITMODR::_from({
|
|
const MASK: u8 = 63;
|
|
const OFFSET: u8 = 8;
|
|
((self.bits >> OFFSET) & MASK as u32) as u8
|
|
})
|
|
}
|
|
#[doc = "Bits 14:15 - Number of sample clocks"]
|
|
#[inline]
|
|
pub fn nsam(&self) -> NSAMR {
|
|
NSAMR::_from({
|
|
const MASK: u8 = 3;
|
|
const OFFSET: u8 = 14;
|
|
((self.bits >> OFFSET) & MASK as u32) as u8
|
|
})
|
|
}
|
|
#[doc = "Bit 16 - Channel 0 input changed flag"]
|
|
#[inline]
|
|
pub fn ch0f(&self) -> CH0FR {
|
|
let bits = {
|
|
const MASK: bool = true;
|
|
const OFFSET: u8 = 16;
|
|
((self.bits >> OFFSET) & MASK as u32) != 0
|
|
};
|
|
CH0FR { bits }
|
|
}
|
|
#[doc = "Bit 17 - Channel 1 input changed flag"]
|
|
#[inline]
|
|
pub fn ch1f(&self) -> CH1FR {
|
|
let bits = {
|
|
const MASK: bool = true;
|
|
const OFFSET: u8 = 17;
|
|
((self.bits >> OFFSET) & MASK as u32) != 0
|
|
};
|
|
CH1FR { bits }
|
|
}
|
|
#[doc = "Bit 18 - Channel 2 input changed flag"]
|
|
#[inline]
|
|
pub fn ch2f(&self) -> CH2FR {
|
|
let bits = {
|
|
const MASK: bool = true;
|
|
const OFFSET: u8 = 18;
|
|
((self.bits >> OFFSET) & MASK as u32) != 0
|
|
};
|
|
CH2FR { bits }
|
|
}
|
|
#[doc = "Bit 19 - Channel 3 input changed flag"]
|
|
#[inline]
|
|
pub fn ch3f(&self) -> CH3FR {
|
|
let bits = {
|
|
const MASK: bool = true;
|
|
const OFFSET: u8 = 19;
|
|
((self.bits >> OFFSET) & MASK as u32) != 0
|
|
};
|
|
CH3FR { bits }
|
|
}
|
|
#[doc = "Bit 20 - Channel 4 input changed flag"]
|
|
#[inline]
|
|
pub fn ch4f(&self) -> CH4FR {
|
|
let bits = {
|
|
const MASK: bool = true;
|
|
const OFFSET: u8 = 20;
|
|
((self.bits >> OFFSET) & MASK as u32) != 0
|
|
};
|
|
CH4FR { bits }
|
|
}
|
|
#[doc = "Bit 21 - Channel 5 input changed flag"]
|
|
#[inline]
|
|
pub fn ch5f(&self) -> CH5FR {
|
|
let bits = {
|
|
const MASK: bool = true;
|
|
const OFFSET: u8 = 21;
|
|
((self.bits >> OFFSET) & MASK as u32) != 0
|
|
};
|
|
CH5FR { bits }
|
|
}
|
|
#[doc = "Bit 22 - Channel 6 input changed flag"]
|
|
#[inline]
|
|
pub fn ch6f(&self) -> CH6FR {
|
|
let bits = {
|
|
const MASK: bool = true;
|
|
const OFFSET: u8 = 22;
|
|
((self.bits >> OFFSET) & MASK as u32) != 0
|
|
};
|
|
CH6FR { bits }
|
|
}
|
|
#[doc = "Bit 23 - Channel 7 input changed flag"]
|
|
#[inline]
|
|
pub fn ch7f(&self) -> CH7FR {
|
|
let bits = {
|
|
const MASK: bool = true;
|
|
const OFFSET: u8 = 23;
|
|
((self.bits >> OFFSET) & MASK as u32) != 0
|
|
};
|
|
CH7FR { bits }
|
|
}
|
|
#[doc = "Bits 25:27 - Fixed channel selection"]
|
|
#[inline]
|
|
pub fn fxmxch(&self) -> FXMXCHR {
|
|
FXMXCHR::_from({
|
|
const MASK: u8 = 7;
|
|
const OFFSET: u8 = 25;
|
|
((self.bits >> OFFSET) & MASK as u32) as u8
|
|
})
|
|
}
|
|
#[doc = "Bit 29 - Fixed MUX Port"]
|
|
#[inline]
|
|
pub fn fxmp(&self) -> FXMPR {
|
|
FXMPR::_from({
|
|
const MASK: bool = true;
|
|
const OFFSET: u8 = 29;
|
|
((self.bits >> OFFSET) & MASK as u32) != 0
|
|
})
|
|
}
|
|
#[doc = "Bit 30 - Round-Robin interrupt enable"]
|
|
#[inline]
|
|
pub fn rrie(&self) -> RRIER {
|
|
RRIER::_from({
|
|
const MASK: bool = true;
|
|
const OFFSET: u8 = 30;
|
|
((self.bits >> OFFSET) & MASK as u32) != 0
|
|
})
|
|
}
|
|
#[doc = "Bit 31 - Round-Robin Enable"]
|
|
#[inline]
|
|
pub fn rre(&self) -> RRER {
|
|
RRER::_from({
|
|
const MASK: bool = true;
|
|
const OFFSET: u8 = 31;
|
|
((self.bits >> OFFSET) & MASK as u32) != 0
|
|
})
|
|
}
|
|
}
|
|
impl W {
|
|
#[doc = r" Reset value of the register"]
|
|
#[inline]
|
|
pub fn reset_value() -> W {
|
|
W { bits: 0 }
|
|
}
|
|
#[doc = r" Writes raw bits to the register"]
|
|
#[inline]
|
|
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
|
self.bits = bits;
|
|
self
|
|
}
|
|
#[doc = "Bits 0:7 - The result of the input comparison for channel n"]
|
|
#[inline]
|
|
pub fn acon(&mut self) -> _ACONW {
|
|
_ACONW { w: self }
|
|
}
|
|
#[doc = "Bits 8:13 - Comparator and DAC initialization delay modulus."]
|
|
#[inline]
|
|
pub fn initmod(&mut self) -> _INITMODW {
|
|
_INITMODW { w: self }
|
|
}
|
|
#[doc = "Bits 14:15 - Number of sample clocks"]
|
|
#[inline]
|
|
pub fn nsam(&mut self) -> _NSAMW {
|
|
_NSAMW { w: self }
|
|
}
|
|
#[doc = "Bit 16 - Channel 0 input changed flag"]
|
|
#[inline]
|
|
pub fn ch0f(&mut self) -> _CH0FW {
|
|
_CH0FW { w: self }
|
|
}
|
|
#[doc = "Bit 17 - Channel 1 input changed flag"]
|
|
#[inline]
|
|
pub fn ch1f(&mut self) -> _CH1FW {
|
|
_CH1FW { w: self }
|
|
}
|
|
#[doc = "Bit 18 - Channel 2 input changed flag"]
|
|
#[inline]
|
|
pub fn ch2f(&mut self) -> _CH2FW {
|
|
_CH2FW { w: self }
|
|
}
|
|
#[doc = "Bit 19 - Channel 3 input changed flag"]
|
|
#[inline]
|
|
pub fn ch3f(&mut self) -> _CH3FW {
|
|
_CH3FW { w: self }
|
|
}
|
|
#[doc = "Bit 20 - Channel 4 input changed flag"]
|
|
#[inline]
|
|
pub fn ch4f(&mut self) -> _CH4FW {
|
|
_CH4FW { w: self }
|
|
}
|
|
#[doc = "Bit 21 - Channel 5 input changed flag"]
|
|
#[inline]
|
|
pub fn ch5f(&mut self) -> _CH5FW {
|
|
_CH5FW { w: self }
|
|
}
|
|
#[doc = "Bit 22 - Channel 6 input changed flag"]
|
|
#[inline]
|
|
pub fn ch6f(&mut self) -> _CH6FW {
|
|
_CH6FW { w: self }
|
|
}
|
|
#[doc = "Bit 23 - Channel 7 input changed flag"]
|
|
#[inline]
|
|
pub fn ch7f(&mut self) -> _CH7FW {
|
|
_CH7FW { w: self }
|
|
}
|
|
#[doc = "Bits 25:27 - Fixed channel selection"]
|
|
#[inline]
|
|
pub fn fxmxch(&mut self) -> _FXMXCHW {
|
|
_FXMXCHW { w: self }
|
|
}
|
|
#[doc = "Bit 29 - Fixed MUX Port"]
|
|
#[inline]
|
|
pub fn fxmp(&mut self) -> _FXMPW {
|
|
_FXMPW { w: self }
|
|
}
|
|
#[doc = "Bit 30 - Round-Robin interrupt enable"]
|
|
#[inline]
|
|
pub fn rrie(&mut self) -> _RRIEW {
|
|
_RRIEW { w: self }
|
|
}
|
|
#[doc = "Bit 31 - Round-Robin Enable"]
|
|
#[inline]
|
|
pub fn rre(&mut self) -> _RREW {
|
|
_RREW { w: self }
|
|
}
|
|
}
|