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@ -22,7 +22,9 @@ impl super::PCC_FLEXCAN2 {
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#[doc = r" Reads the contents of the register"]
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#[inline]
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pub fn read(&self) -> R {
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R { bits: self.register.get() }
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R {
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bits: self.register.get(),
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}
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}
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#[doc = r" Writes to the register"]
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#[inline]
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@ -43,10 +45,8 @@ impl super::PCC_FLEXCAN2 {
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#[doc = "Possible values of the field `CGC`"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum CGCR {
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#[doc = "Clock disabled"]
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_0,
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#[doc = "Clock enabled. The current clock selection and divider options are locked."]
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_1,
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#[doc = "Clock disabled"] _0,
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#[doc = "Clock enabled. The current clock selection and divider options are locked."] _1,
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}
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impl CGCR {
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#[doc = r" Returns `true` if the bit is clear (0)"]
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@ -90,10 +90,8 @@ impl CGCR {
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#[doc = "Possible values of the field `PR`"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum PRR {
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#[doc = "Peripheral is not present."]
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_0,
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#[doc = "Peripheral is present."]
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_1,
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#[doc = "Peripheral is not present."] _0,
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#[doc = "Peripheral is present."] _1,
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}
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impl PRR {
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#[doc = r" Returns `true` if the bit is clear (0)"]
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@ -136,10 +134,8 @@ impl PRR {
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}
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#[doc = "Values that can be written to the field `CGC`"]
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pub enum CGCW {
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#[doc = "Clock disabled"]
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_0,
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#[doc = "Clock enabled. The current clock selection and divider options are locked."]
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_1,
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#[doc = "Clock disabled"] _0,
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#[doc = "Clock enabled. The current clock selection and divider options are locked."] _1,
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}
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impl CGCW {
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#[allow(missing_docs)]
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