Run with updated version of rustfmt
This commit is contained in:
Kjetil Kjeka
parent
7facea48b2
commit
2fc3ce22de
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@ -22,7 +22,9 @@ impl super::BASE_OFS {
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#[doc = r" Reads the contents of the register"]
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#[inline]
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pub fn read(&self) -> R {
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R { bits: self.register.get() }
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R {
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bits: self.register.get(),
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}
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}
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#[doc = r" Writes to the register"]
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#[inline]
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@ -22,7 +22,9 @@ impl super::CFG1 {
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#[doc = r" Reads the contents of the register"]
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#[inline]
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pub fn read(&self) -> R {
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R { bits: self.register.get() }
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R {
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bits: self.register.get(),
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}
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}
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#[doc = r" Writes to the register"]
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#[inline]
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@ -43,14 +45,10 @@ impl super::CFG1 {
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#[doc = "Possible values of the field `ADICLK`"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum ADICLKR {
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#[doc = "Alternate clock 1 (ADC_ALTCLK1)"]
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_00,
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#[doc = "Alternate clock 2 (ADC_ALTCLK2)"]
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_01,
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#[doc = "Alternate clock 3 (ADC_ALTCLK3)"]
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_10,
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#[doc = "Alternate clock 4 (ADC_ALTCLK4)"]
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_11,
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#[doc = "Alternate clock 1 (ADC_ALTCLK1)"] _00,
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#[doc = "Alternate clock 2 (ADC_ALTCLK2)"] _01,
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#[doc = "Alternate clock 3 (ADC_ALTCLK3)"] _10,
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#[doc = "Alternate clock 4 (ADC_ALTCLK4)"] _11,
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}
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impl ADICLKR {
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#[doc = r" Value of the field as raw bits"]
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@ -99,14 +97,10 @@ impl ADICLKR {
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#[doc = "Possible values of the field `MODE`"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum MODER {
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#[doc = "8-bit conversion."]
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_00,
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#[doc = "12-bit conversion."]
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_01,
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#[doc = "10-bit conversion."]
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_10,
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#[doc = r" Reserved"]
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_Reserved(u8),
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#[doc = "8-bit conversion."] _00,
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#[doc = "12-bit conversion."] _01,
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#[doc = "10-bit conversion."] _10,
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#[doc = r" Reserved"] _Reserved(u8),
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}
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impl MODER {
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#[doc = r" Value of the field as raw bits"]
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@ -149,14 +143,10 @@ impl MODER {
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#[doc = "Possible values of the field `ADIV`"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum ADIVR {
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#[doc = "The divide ratio is 1 and the clock rate is input clock."]
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_00,
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#[doc = "The divide ratio is 2 and the clock rate is (input clock)/2."]
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_01,
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#[doc = "The divide ratio is 4 and the clock rate is (input clock)/4."]
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_10,
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#[doc = "The divide ratio is 8 and the clock rate is (input clock)/8."]
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_11,
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#[doc = "The divide ratio is 1 and the clock rate is input clock."] _00,
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#[doc = "The divide ratio is 2 and the clock rate is (input clock)/2."] _01,
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#[doc = "The divide ratio is 4 and the clock rate is (input clock)/4."] _10,
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#[doc = "The divide ratio is 8 and the clock rate is (input clock)/8."] _11,
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}
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impl ADIVR {
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#[doc = r" Value of the field as raw bits"]
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@ -204,14 +194,10 @@ impl ADIVR {
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}
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#[doc = "Values that can be written to the field `ADICLK`"]
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pub enum ADICLKW {
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#[doc = "Alternate clock 1 (ADC_ALTCLK1)"]
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_00,
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#[doc = "Alternate clock 2 (ADC_ALTCLK2)"]
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_01,
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#[doc = "Alternate clock 3 (ADC_ALTCLK3)"]
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_10,
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#[doc = "Alternate clock 4 (ADC_ALTCLK4)"]
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_11,
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#[doc = "Alternate clock 1 (ADC_ALTCLK1)"] _00,
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#[doc = "Alternate clock 2 (ADC_ALTCLK2)"] _01,
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#[doc = "Alternate clock 3 (ADC_ALTCLK3)"] _10,
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#[doc = "Alternate clock 4 (ADC_ALTCLK4)"] _11,
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}
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impl ADICLKW {
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#[allow(missing_docs)]
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@ -270,12 +256,9 @@ impl<'a> _ADICLKW<'a> {
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}
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#[doc = "Values that can be written to the field `MODE`"]
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pub enum MODEW {
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#[doc = "8-bit conversion."]
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_00,
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#[doc = "12-bit conversion."]
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_01,
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#[doc = "10-bit conversion."]
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_10,
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#[doc = "8-bit conversion."] _00,
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#[doc = "12-bit conversion."] _01,
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#[doc = "10-bit conversion."] _10,
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}
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impl MODEW {
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#[allow(missing_docs)]
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@ -326,14 +309,10 @@ impl<'a> _MODEW<'a> {
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}
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#[doc = "Values that can be written to the field `ADIV`"]
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pub enum ADIVW {
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#[doc = "The divide ratio is 1 and the clock rate is input clock."]
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_00,
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#[doc = "The divide ratio is 2 and the clock rate is (input clock)/2."]
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_01,
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#[doc = "The divide ratio is 4 and the clock rate is (input clock)/4."]
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_10,
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#[doc = "The divide ratio is 8 and the clock rate is (input clock)/8."]
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_11,
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#[doc = "The divide ratio is 1 and the clock rate is input clock."] _00,
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#[doc = "The divide ratio is 2 and the clock rate is (input clock)/2."] _01,
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#[doc = "The divide ratio is 4 and the clock rate is (input clock)/4."] _10,
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#[doc = "The divide ratio is 8 and the clock rate is (input clock)/8."] _11,
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}
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impl ADIVW {
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#[allow(missing_docs)]
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@ -22,7 +22,9 @@ impl super::CFG2 {
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#[doc = r" Reads the contents of the register"]
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#[inline]
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pub fn read(&self) -> R {
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R { bits: self.register.get() }
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R {
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bits: self.register.get(),
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}
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}
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#[doc = r" Writes to the register"]
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#[inline]
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@ -22,7 +22,9 @@ impl super::CLP0 {
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#[doc = r" Reads the contents of the register"]
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#[inline]
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pub fn read(&self) -> R {
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R { bits: self.register.get() }
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R {
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bits: self.register.get(),
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}
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}
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#[doc = r" Writes to the register"]
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#[inline]
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@ -22,7 +22,9 @@ impl super::CLP0_OFS {
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#[doc = r" Reads the contents of the register"]
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#[inline]
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pub fn read(&self) -> R {
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R { bits: self.register.get() }
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R {
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bits: self.register.get(),
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}
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}
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#[doc = r" Writes to the register"]
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#[inline]
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@ -22,7 +22,9 @@ impl super::CLP1 {
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#[doc = r" Reads the contents of the register"]
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#[inline]
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pub fn read(&self) -> R {
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R { bits: self.register.get() }
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R {
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bits: self.register.get(),
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}
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}
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#[doc = r" Writes to the register"]
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#[inline]
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@ -22,7 +22,9 @@ impl super::CLP1_OFS {
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#[doc = r" Reads the contents of the register"]
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#[inline]
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pub fn read(&self) -> R {
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R { bits: self.register.get() }
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R {
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bits: self.register.get(),
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}
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}
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#[doc = r" Writes to the register"]
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#[inline]
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@ -22,7 +22,9 @@ impl super::CLP2 {
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#[doc = r" Reads the contents of the register"]
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#[inline]
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pub fn read(&self) -> R {
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R { bits: self.register.get() }
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R {
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bits: self.register.get(),
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}
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}
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#[doc = r" Writes to the register"]
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#[inline]
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@ -22,7 +22,9 @@ impl super::CLP2_OFS {
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#[doc = r" Reads the contents of the register"]
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#[inline]
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pub fn read(&self) -> R {
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R { bits: self.register.get() }
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R {
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bits: self.register.get(),
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}
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}
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#[doc = r" Writes to the register"]
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#[inline]
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@ -22,7 +22,9 @@ impl super::CLP3 {
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#[doc = r" Reads the contents of the register"]
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#[inline]
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pub fn read(&self) -> R {
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R { bits: self.register.get() }
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R {
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bits: self.register.get(),
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}
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}
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#[doc = r" Writes to the register"]
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#[inline]
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@ -22,7 +22,9 @@ impl super::CLP3_OFS {
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#[doc = r" Reads the contents of the register"]
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#[inline]
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pub fn read(&self) -> R {
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R { bits: self.register.get() }
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R {
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bits: self.register.get(),
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}
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}
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#[doc = r" Writes to the register"]
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#[inline]
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@ -22,7 +22,9 @@ impl super::CLP9 {
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#[doc = r" Reads the contents of the register"]
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#[inline]
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pub fn read(&self) -> R {
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R { bits: self.register.get() }
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R {
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bits: self.register.get(),
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}
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}
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#[doc = r" Writes to the register"]
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#[inline]
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@ -22,7 +22,9 @@ impl super::CLP9_OFS {
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#[doc = r" Reads the contents of the register"]
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#[inline]
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pub fn read(&self) -> R {
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R { bits: self.register.get() }
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R {
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bits: self.register.get(),
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}
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}
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#[doc = r" Writes to the register"]
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#[inline]
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@ -22,7 +22,9 @@ impl super::CLPS {
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#[doc = r" Reads the contents of the register"]
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#[inline]
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pub fn read(&self) -> R {
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R { bits: self.register.get() }
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R {
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bits: self.register.get(),
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}
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}
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#[doc = r" Writes to the register"]
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#[inline]
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@ -22,7 +22,9 @@ impl super::CLPS_OFS {
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#[doc = r" Reads the contents of the register"]
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#[inline]
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pub fn read(&self) -> R {
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R { bits: self.register.get() }
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R {
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bits: self.register.get(),
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}
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}
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#[doc = r" Writes to the register"]
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#[inline]
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@ -22,7 +22,9 @@ impl super::CLPX {
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#[doc = r" Reads the contents of the register"]
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#[inline]
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pub fn read(&self) -> R {
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R { bits: self.register.get() }
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R {
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bits: self.register.get(),
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}
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}
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#[doc = r" Writes to the register"]
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#[inline]
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@ -22,7 +22,9 @@ impl super::CLPX_OFS {
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#[doc = r" Reads the contents of the register"]
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#[inline]
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pub fn read(&self) -> R {
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R { bits: self.register.get() }
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R {
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bits: self.register.get(),
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}
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}
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#[doc = r" Writes to the register"]
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#[inline]
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@ -22,7 +22,9 @@ impl super::CV {
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#[doc = r" Reads the contents of the register"]
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#[inline]
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pub fn read(&self) -> R {
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R { bits: self.register.get() }
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R {
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bits: self.register.get(),
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}
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}
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#[doc = r" Writes to the register"]
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#[inline]
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@ -22,7 +22,9 @@ impl super::G {
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#[doc = r" Reads the contents of the register"]
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#[inline]
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pub fn read(&self) -> R {
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R { bits: self.register.get() }
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R {
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bits: self.register.get(),
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}
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}
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#[doc = r" Writes to the register"]
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#[inline]
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177
src/adc0/mod.rs
177
src/adc0/mod.rs
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@ -2,124 +2,77 @@ use vcell::VolatileCell;
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#[doc = r" Register block"]
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#[repr(C)]
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pub struct RegisterBlock {
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#[doc = "0x00 - ADC Status and Control Register 1"]
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pub sc1a: SC1,
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#[doc = "0x04 - ADC Status and Control Register 1"]
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pub sc1b: SC1,
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#[doc = "0x08 - ADC Status and Control Register 1"]
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pub sc1c: SC1,
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#[doc = "0x0c - ADC Status and Control Register 1"]
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pub sc1d: SC1,
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#[doc = "0x10 - ADC Status and Control Register 1"]
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pub sc1e: SC1,
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#[doc = "0x14 - ADC Status and Control Register 1"]
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pub sc1f: SC1,
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#[doc = "0x18 - ADC Status and Control Register 1"]
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pub sc1g: SC1,
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#[doc = "0x1c - ADC Status and Control Register 1"]
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pub sc1h: SC1,
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#[doc = "0x20 - ADC Status and Control Register 1"]
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pub sc1i: SC1,
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#[doc = "0x24 - ADC Status and Control Register 1"]
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pub sc1j: SC1,
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#[doc = "0x28 - ADC Status and Control Register 1"]
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pub sc1k: SC1,
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#[doc = "0x2c - ADC Status and Control Register 1"]
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pub sc1l: SC1,
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#[doc = "0x30 - ADC Status and Control Register 1"]
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pub sc1m: SC1,
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#[doc = "0x34 - ADC Status and Control Register 1"]
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pub sc1n: SC1,
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#[doc = "0x38 - ADC Status and Control Register 1"]
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pub sc1o: SC1,
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#[doc = "0x3c - ADC Status and Control Register 1"]
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pub sc1p: SC1,
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#[doc = "0x40 - ADC Configuration Register 1"]
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pub cfg1: CFG1,
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#[doc = "0x44 - ADC Configuration Register 2"]
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pub cfg2: CFG2,
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#[doc = "0x48 - ADC Data Result Registers"]
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pub ra: R,
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#[doc = "0x4c - ADC Data Result Registers"]
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pub rb: R,
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#[doc = "0x50 - ADC Data Result Registers"]
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pub rc: R,
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#[doc = "0x54 - ADC Data Result Registers"]
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pub rd: R,
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#[doc = "0x58 - ADC Data Result Registers"]
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pub re: R,
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#[doc = "0x5c - ADC Data Result Registers"]
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pub rf: R,
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#[doc = "0x60 - ADC Data Result Registers"]
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pub rg: R,
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#[doc = "0x64 - ADC Data Result Registers"]
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pub rh: R,
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#[doc = "0x68 - ADC Data Result Registers"]
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pub ri: R,
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#[doc = "0x6c - ADC Data Result Registers"]
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pub rj: R,
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#[doc = "0x70 - ADC Data Result Registers"]
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pub rk: R,
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#[doc = "0x74 - ADC Data Result Registers"]
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pub rl: R,
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#[doc = "0x78 - ADC Data Result Registers"]
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pub rm: R,
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#[doc = "0x7c - ADC Data Result Registers"]
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pub rn: R,
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#[doc = "0x80 - ADC Data Result Registers"]
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pub ro: R,
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#[doc = "0x84 - ADC Data Result Registers"]
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pub rp: R,
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#[doc = "0x88 - Compare Value Registers"]
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pub cv1: CV,
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#[doc = "0x8c - Compare Value Registers"]
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pub cv2: CV,
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#[doc = "0x90 - Status and Control Register 2"]
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pub sc2: SC2,
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#[doc = "0x94 - Status and Control Register 3"]
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pub sc3: SC3,
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#[doc = "0x98 - BASE Offset Register"]
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pub base_ofs: BASE_OFS,
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#[doc = "0x9c - ADC Offset Correction Register"]
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pub ofs: OFS,
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#[doc = "0xa0 - USER Offset Correction Register"]
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pub usr_ofs: USR_OFS,
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#[doc = "0xa4 - ADC X Offset Correction Register"]
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pub xofs: XOFS,
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#[doc = "0xa8 - ADC Y Offset Correction Register"]
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pub yofs: YOFS,
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#[doc = "0xac - ADC Gain Register"]
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pub g: G,
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#[doc = "0xb0 - ADC User Gain Register"]
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pub ug: UG,
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#[doc = "0xb4 - ADC General Calibration Value Register S"]
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pub clps: CLPS,
|
||||
#[doc = "0xb8 - ADC Plus-Side General Calibration Value Register 3"]
|
||||
pub clp3: CLP3,
|
||||
#[doc = "0xbc - ADC Plus-Side General Calibration Value Register 2"]
|
||||
pub clp2: CLP2,
|
||||
#[doc = "0xc0 - ADC Plus-Side General Calibration Value Register 1"]
|
||||
pub clp1: CLP1,
|
||||
#[doc = "0xc4 - ADC Plus-Side General Calibration Value Register 0"]
|
||||
pub clp0: CLP0,
|
||||
#[doc = "0xc8 - ADC Plus-Side General Calibration Value Register X"]
|
||||
pub clpx: CLPX,
|
||||
#[doc = "0xcc - ADC Plus-Side General Calibration Value Register 9"]
|
||||
pub clp9: CLP9,
|
||||
#[doc = "0xd0 - ADC General Calibration Offset Value Register S"]
|
||||
pub clps_ofs: CLPS_OFS,
|
||||
#[doc = "0x00 - ADC Status and Control Register 1"] pub sc1a: SC1,
|
||||
#[doc = "0x04 - ADC Status and Control Register 1"] pub sc1b: SC1,
|
||||
#[doc = "0x08 - ADC Status and Control Register 1"] pub sc1c: SC1,
|
||||
#[doc = "0x0c - ADC Status and Control Register 1"] pub sc1d: SC1,
|
||||
#[doc = "0x10 - ADC Status and Control Register 1"] pub sc1e: SC1,
|
||||
#[doc = "0x14 - ADC Status and Control Register 1"] pub sc1f: SC1,
|
||||
#[doc = "0x18 - ADC Status and Control Register 1"] pub sc1g: SC1,
|
||||
#[doc = "0x1c - ADC Status and Control Register 1"] pub sc1h: SC1,
|
||||
#[doc = "0x20 - ADC Status and Control Register 1"] pub sc1i: SC1,
|
||||
#[doc = "0x24 - ADC Status and Control Register 1"] pub sc1j: SC1,
|
||||
#[doc = "0x28 - ADC Status and Control Register 1"] pub sc1k: SC1,
|
||||
#[doc = "0x2c - ADC Status and Control Register 1"] pub sc1l: SC1,
|
||||
#[doc = "0x30 - ADC Status and Control Register 1"] pub sc1m: SC1,
|
||||
#[doc = "0x34 - ADC Status and Control Register 1"] pub sc1n: SC1,
|
||||
#[doc = "0x38 - ADC Status and Control Register 1"] pub sc1o: SC1,
|
||||
#[doc = "0x3c - ADC Status and Control Register 1"] pub sc1p: SC1,
|
||||
#[doc = "0x40 - ADC Configuration Register 1"] pub cfg1: CFG1,
|
||||
#[doc = "0x44 - ADC Configuration Register 2"] pub cfg2: CFG2,
|
||||
#[doc = "0x48 - ADC Data Result Registers"] pub ra: R,
|
||||
#[doc = "0x4c - ADC Data Result Registers"] pub rb: R,
|
||||
#[doc = "0x50 - ADC Data Result Registers"] pub rc: R,
|
||||
#[doc = "0x54 - ADC Data Result Registers"] pub rd: R,
|
||||
#[doc = "0x58 - ADC Data Result Registers"] pub re: R,
|
||||
#[doc = "0x5c - ADC Data Result Registers"] pub rf: R,
|
||||
#[doc = "0x60 - ADC Data Result Registers"] pub rg: R,
|
||||
#[doc = "0x64 - ADC Data Result Registers"] pub rh: R,
|
||||
#[doc = "0x68 - ADC Data Result Registers"] pub ri: R,
|
||||
#[doc = "0x6c - ADC Data Result Registers"] pub rj: R,
|
||||
#[doc = "0x70 - ADC Data Result Registers"] pub rk: R,
|
||||
#[doc = "0x74 - ADC Data Result Registers"] pub rl: R,
|
||||
#[doc = "0x78 - ADC Data Result Registers"] pub rm: R,
|
||||
#[doc = "0x7c - ADC Data Result Registers"] pub rn: R,
|
||||
#[doc = "0x80 - ADC Data Result Registers"] pub ro: R,
|
||||
#[doc = "0x84 - ADC Data Result Registers"] pub rp: R,
|
||||
#[doc = "0x88 - Compare Value Registers"] pub cv1: CV,
|
||||
#[doc = "0x8c - Compare Value Registers"] pub cv2: CV,
|
||||
#[doc = "0x90 - Status and Control Register 2"] pub sc2: SC2,
|
||||
#[doc = "0x94 - Status and Control Register 3"] pub sc3: SC3,
|
||||
#[doc = "0x98 - BASE Offset Register"] pub base_ofs: BASE_OFS,
|
||||
#[doc = "0x9c - ADC Offset Correction Register"] pub ofs: OFS,
|
||||
#[doc = "0xa0 - USER Offset Correction Register"] pub usr_ofs: USR_OFS,
|
||||
#[doc = "0xa4 - ADC X Offset Correction Register"] pub xofs: XOFS,
|
||||
#[doc = "0xa8 - ADC Y Offset Correction Register"] pub yofs: YOFS,
|
||||
#[doc = "0xac - ADC Gain Register"] pub g: G,
|
||||
#[doc = "0xb0 - ADC User Gain Register"] pub ug: UG,
|
||||
#[doc = "0xb4 - ADC General Calibration Value Register S"] pub clps: CLPS,
|
||||
#[doc = "0xb8 - ADC Plus-Side General Calibration Value Register 3"] pub clp3: CLP3,
|
||||
#[doc = "0xbc - ADC Plus-Side General Calibration Value Register 2"] pub clp2: CLP2,
|
||||
#[doc = "0xc0 - ADC Plus-Side General Calibration Value Register 1"] pub clp1: CLP1,
|
||||
#[doc = "0xc4 - ADC Plus-Side General Calibration Value Register 0"] pub clp0: CLP0,
|
||||
#[doc = "0xc8 - ADC Plus-Side General Calibration Value Register X"] pub clpx: CLPX,
|
||||
#[doc = "0xcc - ADC Plus-Side General Calibration Value Register 9"] pub clp9: CLP9,
|
||||
#[doc = "0xd0 - ADC General Calibration Offset Value Register S"] pub clps_ofs: CLPS_OFS,
|
||||
#[doc = "0xd4 - ADC Plus-Side General Calibration Offset Value Register 3"]
|
||||
pub clp3_ofs: CLP3_OFS,
|
||||
pub clp3_ofs:
|
||||
CLP3_OFS,
|
||||
#[doc = "0xd8 - ADC Plus-Side General Calibration Offset Value Register 2"]
|
||||
pub clp2_ofs: CLP2_OFS,
|
||||
pub clp2_ofs:
|
||||
CLP2_OFS,
|
||||
#[doc = "0xdc - ADC Plus-Side General Calibration Offset Value Register 1"]
|
||||
pub clp1_ofs: CLP1_OFS,
|
||||
pub clp1_ofs:
|
||||
CLP1_OFS,
|
||||
#[doc = "0xe0 - ADC Plus-Side General Calibration Offset Value Register 0"]
|
||||
pub clp0_ofs: CLP0_OFS,
|
||||
pub clp0_ofs:
|
||||
CLP0_OFS,
|
||||
#[doc = "0xe4 - ADC Plus-Side General Calibration Offset Value Register X"]
|
||||
pub clpx_ofs: CLPX_OFS,
|
||||
pub clpx_ofs:
|
||||
CLPX_OFS,
|
||||
#[doc = "0xe8 - ADC Plus-Side General Calibration Offset Value Register 9"]
|
||||
pub clp9_ofs: CLP9_OFS,
|
||||
pub clp9_ofs:
|
||||
CLP9_OFS,
|
||||
}
|
||||
#[doc = "ADC Status and Control Register 1"]
|
||||
pub struct SC1 {
|
||||
|
|
|
|||
|
|
@ -22,7 +22,9 @@ impl super::OFS {
|
|||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
|
|
|
|||
|
|
@ -6,7 +6,9 @@ impl super::R {
|
|||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
}
|
||||
}
|
||||
#[doc = r" Value of the field"]
|
||||
|
|
|
|||
|
|
@ -22,7 +22,9 @@ impl super::SC1 {
|
|||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
|
|
@ -43,62 +45,36 @@ impl super::SC1 {
|
|||
#[doc = "Possible values of the field `ADCH`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ADCHR {
|
||||
#[doc = "Exernal channel 0 is selected as input."]
|
||||
_00000,
|
||||
#[doc = "Exernal channel 1 is selected as input."]
|
||||
_00001,
|
||||
#[doc = "Exernal channel 2 is selected as input."]
|
||||
_00010,
|
||||
#[doc = "Exernal channel 3 is selected as input."]
|
||||
_00011,
|
||||
#[doc = "Exernal channel 4 is selected as input."]
|
||||
_00100,
|
||||
#[doc = "Exernal channel 5 is selected as input."]
|
||||
_00101,
|
||||
#[doc = "Exernal channel 6 is selected as input."]
|
||||
_00110,
|
||||
#[doc = "Exernal channel 7 is selected as input."]
|
||||
_00111,
|
||||
#[doc = "Exernal channel 8 is selected as input."]
|
||||
_01000,
|
||||
#[doc = "Exernal channel 9 is selected as input."]
|
||||
_01001,
|
||||
#[doc = "Exernal channel 10 is selected as input."]
|
||||
_01010,
|
||||
#[doc = "Exernal channel 11 is selected as input."]
|
||||
_01011,
|
||||
#[doc = "Exernal channel 12 is selected as input."]
|
||||
_01100,
|
||||
#[doc = "Exernal channel 13 is selected as input."]
|
||||
_01101,
|
||||
#[doc = "Exernal channel 14 is selected as input."]
|
||||
_01110,
|
||||
#[doc = "Exernal channel 15 is selected as input."]
|
||||
_01111,
|
||||
#[doc = "Exernal channel 18 is selected as input."]
|
||||
_10010,
|
||||
#[doc = "Exernal channel 19 is selected as input."]
|
||||
_10011,
|
||||
#[doc = "Internal channel 0 is selected as input."]
|
||||
_10101,
|
||||
#[doc = "Internal channel 1 is selected as input."]
|
||||
_10110,
|
||||
#[doc = "Internal channel 2 is selected as input."]
|
||||
_10111,
|
||||
#[doc = "Temp Sensor"]
|
||||
_11010,
|
||||
#[doc = "Band Gap"]
|
||||
_11011,
|
||||
#[doc = "Internal channel 3 is selected as input."]
|
||||
_11100,
|
||||
#[doc = "Exernal channel 0 is selected as input."] _00000,
|
||||
#[doc = "Exernal channel 1 is selected as input."] _00001,
|
||||
#[doc = "Exernal channel 2 is selected as input."] _00010,
|
||||
#[doc = "Exernal channel 3 is selected as input."] _00011,
|
||||
#[doc = "Exernal channel 4 is selected as input."] _00100,
|
||||
#[doc = "Exernal channel 5 is selected as input."] _00101,
|
||||
#[doc = "Exernal channel 6 is selected as input."] _00110,
|
||||
#[doc = "Exernal channel 7 is selected as input."] _00111,
|
||||
#[doc = "Exernal channel 8 is selected as input."] _01000,
|
||||
#[doc = "Exernal channel 9 is selected as input."] _01001,
|
||||
#[doc = "Exernal channel 10 is selected as input."] _01010,
|
||||
#[doc = "Exernal channel 11 is selected as input."] _01011,
|
||||
#[doc = "Exernal channel 12 is selected as input."] _01100,
|
||||
#[doc = "Exernal channel 13 is selected as input."] _01101,
|
||||
#[doc = "Exernal channel 14 is selected as input."] _01110,
|
||||
#[doc = "Exernal channel 15 is selected as input."] _01111,
|
||||
#[doc = "Exernal channel 18 is selected as input."] _10010,
|
||||
#[doc = "Exernal channel 19 is selected as input."] _10011,
|
||||
#[doc = "Internal channel 0 is selected as input."] _10101,
|
||||
#[doc = "Internal channel 1 is selected as input."] _10110,
|
||||
#[doc = "Internal channel 2 is selected as input."] _10111,
|
||||
#[doc = "Temp Sensor"] _11010,
|
||||
#[doc = "Band Gap"] _11011,
|
||||
#[doc = "Internal channel 3 is selected as input."] _11100,
|
||||
#[doc = "VREFSH is selected as input. Voltage reference selected is determined by SC2[REFSEL]."]
|
||||
_11101,
|
||||
#[doc = "VREFSL is selected as input. Voltage reference selected is determined by SC2[REFSEL]."]
|
||||
_11110,
|
||||
#[doc = "Module is disabled"]
|
||||
_11111,
|
||||
#[doc = r" Reserved"]
|
||||
_Reserved(u8),
|
||||
#[doc = "Module is disabled"] _11111,
|
||||
#[doc = r" Reserved"] _Reserved(u8),
|
||||
}
|
||||
impl ADCHR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
|
|
@ -309,10 +285,8 @@ impl ADCHR {
|
|||
#[doc = "Possible values of the field `AIEN`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum AIENR {
|
||||
#[doc = "Conversion complete interrupt is disabled."]
|
||||
_0,
|
||||
#[doc = "Conversion complete interrupt is enabled."]
|
||||
_1,
|
||||
#[doc = "Conversion complete interrupt is disabled."] _0,
|
||||
#[doc = "Conversion complete interrupt is enabled."] _1,
|
||||
}
|
||||
impl AIENR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -356,10 +330,8 @@ impl AIENR {
|
|||
#[doc = "Possible values of the field `COCO`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum COCOR {
|
||||
#[doc = "Conversion is not completed."]
|
||||
_0,
|
||||
#[doc = "Conversion is completed."]
|
||||
_1,
|
||||
#[doc = "Conversion is not completed."] _0,
|
||||
#[doc = "Conversion is completed."] _1,
|
||||
}
|
||||
impl COCOR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -402,60 +374,35 @@ impl COCOR {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `ADCH`"]
|
||||
pub enum ADCHW {
|
||||
#[doc = "Exernal channel 0 is selected as input."]
|
||||
_00000,
|
||||
#[doc = "Exernal channel 1 is selected as input."]
|
||||
_00001,
|
||||
#[doc = "Exernal channel 2 is selected as input."]
|
||||
_00010,
|
||||
#[doc = "Exernal channel 3 is selected as input."]
|
||||
_00011,
|
||||
#[doc = "Exernal channel 4 is selected as input."]
|
||||
_00100,
|
||||
#[doc = "Exernal channel 5 is selected as input."]
|
||||
_00101,
|
||||
#[doc = "Exernal channel 6 is selected as input."]
|
||||
_00110,
|
||||
#[doc = "Exernal channel 7 is selected as input."]
|
||||
_00111,
|
||||
#[doc = "Exernal channel 8 is selected as input."]
|
||||
_01000,
|
||||
#[doc = "Exernal channel 9 is selected as input."]
|
||||
_01001,
|
||||
#[doc = "Exernal channel 10 is selected as input."]
|
||||
_01010,
|
||||
#[doc = "Exernal channel 11 is selected as input."]
|
||||
_01011,
|
||||
#[doc = "Exernal channel 12 is selected as input."]
|
||||
_01100,
|
||||
#[doc = "Exernal channel 13 is selected as input."]
|
||||
_01101,
|
||||
#[doc = "Exernal channel 14 is selected as input."]
|
||||
_01110,
|
||||
#[doc = "Exernal channel 15 is selected as input."]
|
||||
_01111,
|
||||
#[doc = "Exernal channel 18 is selected as input."]
|
||||
_10010,
|
||||
#[doc = "Exernal channel 19 is selected as input."]
|
||||
_10011,
|
||||
#[doc = "Internal channel 0 is selected as input."]
|
||||
_10101,
|
||||
#[doc = "Internal channel 1 is selected as input."]
|
||||
_10110,
|
||||
#[doc = "Internal channel 2 is selected as input."]
|
||||
_10111,
|
||||
#[doc = "Temp Sensor"]
|
||||
_11010,
|
||||
#[doc = "Band Gap"]
|
||||
_11011,
|
||||
#[doc = "Internal channel 3 is selected as input."]
|
||||
_11100,
|
||||
#[doc = "Exernal channel 0 is selected as input."] _00000,
|
||||
#[doc = "Exernal channel 1 is selected as input."] _00001,
|
||||
#[doc = "Exernal channel 2 is selected as input."] _00010,
|
||||
#[doc = "Exernal channel 3 is selected as input."] _00011,
|
||||
#[doc = "Exernal channel 4 is selected as input."] _00100,
|
||||
#[doc = "Exernal channel 5 is selected as input."] _00101,
|
||||
#[doc = "Exernal channel 6 is selected as input."] _00110,
|
||||
#[doc = "Exernal channel 7 is selected as input."] _00111,
|
||||
#[doc = "Exernal channel 8 is selected as input."] _01000,
|
||||
#[doc = "Exernal channel 9 is selected as input."] _01001,
|
||||
#[doc = "Exernal channel 10 is selected as input."] _01010,
|
||||
#[doc = "Exernal channel 11 is selected as input."] _01011,
|
||||
#[doc = "Exernal channel 12 is selected as input."] _01100,
|
||||
#[doc = "Exernal channel 13 is selected as input."] _01101,
|
||||
#[doc = "Exernal channel 14 is selected as input."] _01110,
|
||||
#[doc = "Exernal channel 15 is selected as input."] _01111,
|
||||
#[doc = "Exernal channel 18 is selected as input."] _10010,
|
||||
#[doc = "Exernal channel 19 is selected as input."] _10011,
|
||||
#[doc = "Internal channel 0 is selected as input."] _10101,
|
||||
#[doc = "Internal channel 1 is selected as input."] _10110,
|
||||
#[doc = "Internal channel 2 is selected as input."] _10111,
|
||||
#[doc = "Temp Sensor"] _11010,
|
||||
#[doc = "Band Gap"] _11011,
|
||||
#[doc = "Internal channel 3 is selected as input."] _11100,
|
||||
#[doc = "VREFSH is selected as input. Voltage reference selected is determined by SC2[REFSEL]."]
|
||||
_11101,
|
||||
#[doc = "VREFSL is selected as input. Voltage reference selected is determined by SC2[REFSEL]."]
|
||||
_11110,
|
||||
#[doc = "Module is disabled"]
|
||||
_11111,
|
||||
#[doc = "Module is disabled"] _11111,
|
||||
}
|
||||
impl ADCHW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -650,10 +597,8 @@ impl<'a> _ADCHW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `AIEN`"]
|
||||
pub enum AIENW {
|
||||
#[doc = "Conversion complete interrupt is disabled."]
|
||||
_0,
|
||||
#[doc = "Conversion complete interrupt is enabled."]
|
||||
_1,
|
||||
#[doc = "Conversion complete interrupt is disabled."] _0,
|
||||
#[doc = "Conversion complete interrupt is enabled."] _1,
|
||||
}
|
||||
impl AIENW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
|
|||
|
|
@ -22,7 +22,9 @@ impl super::SC2 {
|
|||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
|
|
@ -43,12 +45,10 @@ impl super::SC2 {
|
|||
#[doc = "Possible values of the field `REFSEL`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum REFSELR {
|
||||
#[doc = "Default voltage reference pin pair, that is, external pins VREFH and VREFL"]
|
||||
_00,
|
||||
#[doc = "Default voltage reference pin pair, that is, external pins VREFH and VREFL"] _00,
|
||||
#[doc = "Alternate reference voltage, that is, VALTH. This voltage may be additional external pin or internal source depending on the MCU configuration. See the chip configuration information for details specific to this MCU."]
|
||||
_01,
|
||||
#[doc = r" Reserved"]
|
||||
_Reserved(u8),
|
||||
#[doc = r" Reserved"] _Reserved(u8),
|
||||
}
|
||||
impl REFSELR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
|
|
@ -84,8 +84,7 @@ impl REFSELR {
|
|||
#[doc = "Possible values of the field `DMAEN`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum DMAENR {
|
||||
#[doc = "DMA is disabled."]
|
||||
_0,
|
||||
#[doc = "DMA is disabled."] _0,
|
||||
#[doc = "DMA is enabled and will assert the ADC DMA request during an ADC conversion complete event , which is indicated when any SC1n[COCO] flag is asserted."]
|
||||
_1,
|
||||
}
|
||||
|
|
@ -173,10 +172,8 @@ impl ACFGTR {
|
|||
#[doc = "Possible values of the field `ACFE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ACFER {
|
||||
#[doc = "Compare function disabled."]
|
||||
_0,
|
||||
#[doc = "Compare function enabled."]
|
||||
_1,
|
||||
#[doc = "Compare function disabled."] _0,
|
||||
#[doc = "Compare function enabled."] _1,
|
||||
}
|
||||
impl ACFER {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -220,10 +217,8 @@ impl ACFER {
|
|||
#[doc = "Possible values of the field `ADTRG`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ADTRGR {
|
||||
#[doc = "Software trigger selected."]
|
||||
_0,
|
||||
#[doc = "Hardware trigger selected."]
|
||||
_1,
|
||||
#[doc = "Software trigger selected."] _0,
|
||||
#[doc = "Hardware trigger selected."] _1,
|
||||
}
|
||||
impl ADTRGR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -267,10 +262,8 @@ impl ADTRGR {
|
|||
#[doc = "Possible values of the field `ADACT`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ADACTR {
|
||||
#[doc = "Conversion not in progress."]
|
||||
_0,
|
||||
#[doc = "Conversion in progress."]
|
||||
_1,
|
||||
#[doc = "Conversion not in progress."] _0,
|
||||
#[doc = "Conversion in progress."] _1,
|
||||
}
|
||||
impl ADACTR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -325,12 +318,9 @@ impl TRGPRNUMR {
|
|||
#[doc = "Possible values of the field `TRGSTLAT`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TRGSTLATR {
|
||||
#[doc = "No trigger request has been latched"]
|
||||
_0,
|
||||
#[doc = "A trigger request has been latched"]
|
||||
_1,
|
||||
#[doc = r" Reserved"]
|
||||
_Reserved(u8),
|
||||
#[doc = "No trigger request has been latched"] _0,
|
||||
#[doc = "A trigger request has been latched"] _1,
|
||||
#[doc = r" Reserved"] _Reserved(u8),
|
||||
}
|
||||
impl TRGSTLATR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
|
|
@ -366,12 +356,9 @@ impl TRGSTLATR {
|
|||
#[doc = "Possible values of the field `TRGSTERR`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TRGSTERRR {
|
||||
#[doc = "No error has occurred"]
|
||||
_0,
|
||||
#[doc = "An error has occurred"]
|
||||
_1,
|
||||
#[doc = r" Reserved"]
|
||||
_Reserved(u8),
|
||||
#[doc = "No error has occurred"] _0,
|
||||
#[doc = "An error has occurred"] _1,
|
||||
#[doc = r" Reserved"] _Reserved(u8),
|
||||
}
|
||||
impl TRGSTERRR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
|
|
@ -406,8 +393,7 @@ impl TRGSTERRR {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `REFSEL`"]
|
||||
pub enum REFSELW {
|
||||
#[doc = "Default voltage reference pin pair, that is, external pins VREFH and VREFL"]
|
||||
_00,
|
||||
#[doc = "Default voltage reference pin pair, that is, external pins VREFH and VREFL"] _00,
|
||||
#[doc = "Alternate reference voltage, that is, VALTH. This voltage may be additional external pin or internal source depending on the MCU configuration. See the chip configuration information for details specific to this MCU."]
|
||||
_01,
|
||||
}
|
||||
|
|
@ -454,8 +440,7 @@ impl<'a> _REFSELW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `DMAEN`"]
|
||||
pub enum DMAENW {
|
||||
#[doc = "DMA is disabled."]
|
||||
_0,
|
||||
#[doc = "DMA is disabled."] _0,
|
||||
#[doc = "DMA is enabled and will assert the ADC DMA request during an ADC conversion complete event , which is indicated when any SC1n[COCO] flag is asserted."]
|
||||
_1,
|
||||
}
|
||||
|
|
@ -558,10 +543,8 @@ impl<'a> _ACFGTW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `ACFE`"]
|
||||
pub enum ACFEW {
|
||||
#[doc = "Compare function disabled."]
|
||||
_0,
|
||||
#[doc = "Compare function enabled."]
|
||||
_1,
|
||||
#[doc = "Compare function disabled."] _0,
|
||||
#[doc = "Compare function enabled."] _1,
|
||||
}
|
||||
impl ACFEW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -616,10 +599,8 @@ impl<'a> _ACFEW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `ADTRG`"]
|
||||
pub enum ADTRGW {
|
||||
#[doc = "Software trigger selected."]
|
||||
_0,
|
||||
#[doc = "Hardware trigger selected."]
|
||||
_1,
|
||||
#[doc = "Software trigger selected."] _0,
|
||||
#[doc = "Hardware trigger selected."] _1,
|
||||
}
|
||||
impl ADTRGW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
|
|||
|
|
@ -22,7 +22,9 @@ impl super::SC3 {
|
|||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
|
|
@ -43,14 +45,10 @@ impl super::SC3 {
|
|||
#[doc = "Possible values of the field `AVGS`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum AVGSR {
|
||||
#[doc = "4 samples averaged."]
|
||||
_00,
|
||||
#[doc = "8 samples averaged."]
|
||||
_01,
|
||||
#[doc = "16 samples averaged."]
|
||||
_10,
|
||||
#[doc = "32 samples averaged."]
|
||||
_11,
|
||||
#[doc = "4 samples averaged."] _00,
|
||||
#[doc = "8 samples averaged."] _01,
|
||||
#[doc = "16 samples averaged."] _10,
|
||||
#[doc = "32 samples averaged."] _11,
|
||||
}
|
||||
impl AVGSR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
|
|
@ -99,10 +97,8 @@ impl AVGSR {
|
|||
#[doc = "Possible values of the field `AVGE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum AVGER {
|
||||
#[doc = "Hardware average function disabled."]
|
||||
_0,
|
||||
#[doc = "Hardware average function enabled."]
|
||||
_1,
|
||||
#[doc = "Hardware average function disabled."] _0,
|
||||
#[doc = "Hardware average function enabled."] _1,
|
||||
}
|
||||
impl AVGER {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -213,14 +209,10 @@ impl CALR {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `AVGS`"]
|
||||
pub enum AVGSW {
|
||||
#[doc = "4 samples averaged."]
|
||||
_00,
|
||||
#[doc = "8 samples averaged."]
|
||||
_01,
|
||||
#[doc = "16 samples averaged."]
|
||||
_10,
|
||||
#[doc = "32 samples averaged."]
|
||||
_11,
|
||||
#[doc = "4 samples averaged."] _00,
|
||||
#[doc = "8 samples averaged."] _01,
|
||||
#[doc = "16 samples averaged."] _10,
|
||||
#[doc = "32 samples averaged."] _11,
|
||||
}
|
||||
impl AVGSW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -279,10 +271,8 @@ impl<'a> _AVGSW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `AVGE`"]
|
||||
pub enum AVGEW {
|
||||
#[doc = "Hardware average function disabled."]
|
||||
_0,
|
||||
#[doc = "Hardware average function enabled."]
|
||||
_1,
|
||||
#[doc = "Hardware average function disabled."] _0,
|
||||
#[doc = "Hardware average function enabled."] _1,
|
||||
}
|
||||
impl AVGEW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
|
|||
|
|
@ -22,7 +22,9 @@ impl super::UG {
|
|||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
|
|
|
|||
|
|
@ -22,7 +22,9 @@ impl super::USR_OFS {
|
|||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
|
|
|
|||
|
|
@ -22,7 +22,9 @@ impl super::XOFS {
|
|||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
|
|
|
|||
|
|
@ -22,7 +22,9 @@ impl super::YOFS {
|
|||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
|
|
|
|||
|
|
@ -22,7 +22,9 @@ impl super::BASE_OFS {
|
|||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
|
|
|
|||
|
|
@ -22,7 +22,9 @@ impl super::CFG1 {
|
|||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
|
|
@ -43,14 +45,10 @@ impl super::CFG1 {
|
|||
#[doc = "Possible values of the field `ADICLK`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ADICLKR {
|
||||
#[doc = "Alternate clock 1 (ADC_ALTCLK1)"]
|
||||
_00,
|
||||
#[doc = "Alternate clock 2 (ADC_ALTCLK2)"]
|
||||
_01,
|
||||
#[doc = "Alternate clock 3 (ADC_ALTCLK3)"]
|
||||
_10,
|
||||
#[doc = "Alternate clock 4 (ADC_ALTCLK4)"]
|
||||
_11,
|
||||
#[doc = "Alternate clock 1 (ADC_ALTCLK1)"] _00,
|
||||
#[doc = "Alternate clock 2 (ADC_ALTCLK2)"] _01,
|
||||
#[doc = "Alternate clock 3 (ADC_ALTCLK3)"] _10,
|
||||
#[doc = "Alternate clock 4 (ADC_ALTCLK4)"] _11,
|
||||
}
|
||||
impl ADICLKR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
|
|
@ -99,14 +97,10 @@ impl ADICLKR {
|
|||
#[doc = "Possible values of the field `MODE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum MODER {
|
||||
#[doc = "8-bit conversion."]
|
||||
_00,
|
||||
#[doc = "12-bit conversion."]
|
||||
_01,
|
||||
#[doc = "10-bit conversion."]
|
||||
_10,
|
||||
#[doc = r" Reserved"]
|
||||
_Reserved(u8),
|
||||
#[doc = "8-bit conversion."] _00,
|
||||
#[doc = "12-bit conversion."] _01,
|
||||
#[doc = "10-bit conversion."] _10,
|
||||
#[doc = r" Reserved"] _Reserved(u8),
|
||||
}
|
||||
impl MODER {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
|
|
@ -149,14 +143,10 @@ impl MODER {
|
|||
#[doc = "Possible values of the field `ADIV`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ADIVR {
|
||||
#[doc = "The divide ratio is 1 and the clock rate is input clock."]
|
||||
_00,
|
||||
#[doc = "The divide ratio is 2 and the clock rate is (input clock)/2."]
|
||||
_01,
|
||||
#[doc = "The divide ratio is 4 and the clock rate is (input clock)/4."]
|
||||
_10,
|
||||
#[doc = "The divide ratio is 8 and the clock rate is (input clock)/8."]
|
||||
_11,
|
||||
#[doc = "The divide ratio is 1 and the clock rate is input clock."] _00,
|
||||
#[doc = "The divide ratio is 2 and the clock rate is (input clock)/2."] _01,
|
||||
#[doc = "The divide ratio is 4 and the clock rate is (input clock)/4."] _10,
|
||||
#[doc = "The divide ratio is 8 and the clock rate is (input clock)/8."] _11,
|
||||
}
|
||||
impl ADIVR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
|
|
@ -204,14 +194,10 @@ impl ADIVR {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `ADICLK`"]
|
||||
pub enum ADICLKW {
|
||||
#[doc = "Alternate clock 1 (ADC_ALTCLK1)"]
|
||||
_00,
|
||||
#[doc = "Alternate clock 2 (ADC_ALTCLK2)"]
|
||||
_01,
|
||||
#[doc = "Alternate clock 3 (ADC_ALTCLK3)"]
|
||||
_10,
|
||||
#[doc = "Alternate clock 4 (ADC_ALTCLK4)"]
|
||||
_11,
|
||||
#[doc = "Alternate clock 1 (ADC_ALTCLK1)"] _00,
|
||||
#[doc = "Alternate clock 2 (ADC_ALTCLK2)"] _01,
|
||||
#[doc = "Alternate clock 3 (ADC_ALTCLK3)"] _10,
|
||||
#[doc = "Alternate clock 4 (ADC_ALTCLK4)"] _11,
|
||||
}
|
||||
impl ADICLKW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -270,12 +256,9 @@ impl<'a> _ADICLKW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `MODE`"]
|
||||
pub enum MODEW {
|
||||
#[doc = "8-bit conversion."]
|
||||
_00,
|
||||
#[doc = "12-bit conversion."]
|
||||
_01,
|
||||
#[doc = "10-bit conversion."]
|
||||
_10,
|
||||
#[doc = "8-bit conversion."] _00,
|
||||
#[doc = "12-bit conversion."] _01,
|
||||
#[doc = "10-bit conversion."] _10,
|
||||
}
|
||||
impl MODEW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -326,14 +309,10 @@ impl<'a> _MODEW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `ADIV`"]
|
||||
pub enum ADIVW {
|
||||
#[doc = "The divide ratio is 1 and the clock rate is input clock."]
|
||||
_00,
|
||||
#[doc = "The divide ratio is 2 and the clock rate is (input clock)/2."]
|
||||
_01,
|
||||
#[doc = "The divide ratio is 4 and the clock rate is (input clock)/4."]
|
||||
_10,
|
||||
#[doc = "The divide ratio is 8 and the clock rate is (input clock)/8."]
|
||||
_11,
|
||||
#[doc = "The divide ratio is 1 and the clock rate is input clock."] _00,
|
||||
#[doc = "The divide ratio is 2 and the clock rate is (input clock)/2."] _01,
|
||||
#[doc = "The divide ratio is 4 and the clock rate is (input clock)/4."] _10,
|
||||
#[doc = "The divide ratio is 8 and the clock rate is (input clock)/8."] _11,
|
||||
}
|
||||
impl ADIVW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
|
|||
|
|
@ -22,7 +22,9 @@ impl super::CFG2 {
|
|||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
|
|
|
|||
|
|
@ -22,7 +22,9 @@ impl super::CLP0 {
|
|||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
|
|
|
|||
|
|
@ -22,7 +22,9 @@ impl super::CLP0_OFS {
|
|||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
|
|
|
|||
|
|
@ -22,7 +22,9 @@ impl super::CLP1 {
|
|||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
|
|
|
|||
|
|
@ -22,7 +22,9 @@ impl super::CLP1_OFS {
|
|||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
|
|
|
|||
|
|
@ -22,7 +22,9 @@ impl super::CLP2 {
|
|||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
|
|
|
|||
|
|
@ -22,7 +22,9 @@ impl super::CLP2_OFS {
|
|||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
|
|
|
|||
|
|
@ -22,7 +22,9 @@ impl super::CLP3 {
|
|||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
|
|
|
|||
|
|
@ -22,7 +22,9 @@ impl super::CLP3_OFS {
|
|||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
|
|
|
|||
|
|
@ -22,7 +22,9 @@ impl super::CLP9 {
|
|||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
|
|
|
|||
|
|
@ -22,7 +22,9 @@ impl super::CLP9_OFS {
|
|||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
|
|
|
|||
|
|
@ -22,7 +22,9 @@ impl super::CLPS {
|
|||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
|
|
|
|||
|
|
@ -22,7 +22,9 @@ impl super::CLPS_OFS {
|
|||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
|
|
|
|||
|
|
@ -22,7 +22,9 @@ impl super::CLPX {
|
|||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
|
|
|
|||
|
|
@ -22,7 +22,9 @@ impl super::CLPX_OFS {
|
|||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
|
|
|
|||
|
|
@ -22,7 +22,9 @@ impl super::CV {
|
|||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
|
|
|
|||
|
|
@ -22,7 +22,9 @@ impl super::G {
|
|||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
|
|
|
|||
177
src/adc1/mod.rs
177
src/adc1/mod.rs
|
|
@ -2,124 +2,77 @@ use vcell::VolatileCell;
|
|||
#[doc = r" Register block"]
|
||||
#[repr(C)]
|
||||
pub struct RegisterBlock {
|
||||
#[doc = "0x00 - ADC Status and Control Register 1"]
|
||||
pub sc1a: SC1,
|
||||
#[doc = "0x04 - ADC Status and Control Register 1"]
|
||||
pub sc1b: SC1,
|
||||
#[doc = "0x08 - ADC Status and Control Register 1"]
|
||||
pub sc1c: SC1,
|
||||
#[doc = "0x0c - ADC Status and Control Register 1"]
|
||||
pub sc1d: SC1,
|
||||
#[doc = "0x10 - ADC Status and Control Register 1"]
|
||||
pub sc1e: SC1,
|
||||
#[doc = "0x14 - ADC Status and Control Register 1"]
|
||||
pub sc1f: SC1,
|
||||
#[doc = "0x18 - ADC Status and Control Register 1"]
|
||||
pub sc1g: SC1,
|
||||
#[doc = "0x1c - ADC Status and Control Register 1"]
|
||||
pub sc1h: SC1,
|
||||
#[doc = "0x20 - ADC Status and Control Register 1"]
|
||||
pub sc1i: SC1,
|
||||
#[doc = "0x24 - ADC Status and Control Register 1"]
|
||||
pub sc1j: SC1,
|
||||
#[doc = "0x28 - ADC Status and Control Register 1"]
|
||||
pub sc1k: SC1,
|
||||
#[doc = "0x2c - ADC Status and Control Register 1"]
|
||||
pub sc1l: SC1,
|
||||
#[doc = "0x30 - ADC Status and Control Register 1"]
|
||||
pub sc1m: SC1,
|
||||
#[doc = "0x34 - ADC Status and Control Register 1"]
|
||||
pub sc1n: SC1,
|
||||
#[doc = "0x38 - ADC Status and Control Register 1"]
|
||||
pub sc1o: SC1,
|
||||
#[doc = "0x3c - ADC Status and Control Register 1"]
|
||||
pub sc1p: SC1,
|
||||
#[doc = "0x40 - ADC Configuration Register 1"]
|
||||
pub cfg1: CFG1,
|
||||
#[doc = "0x44 - ADC Configuration Register 2"]
|
||||
pub cfg2: CFG2,
|
||||
#[doc = "0x48 - ADC Data Result Registers"]
|
||||
pub ra: R,
|
||||
#[doc = "0x4c - ADC Data Result Registers"]
|
||||
pub rb: R,
|
||||
#[doc = "0x50 - ADC Data Result Registers"]
|
||||
pub rc: R,
|
||||
#[doc = "0x54 - ADC Data Result Registers"]
|
||||
pub rd: R,
|
||||
#[doc = "0x58 - ADC Data Result Registers"]
|
||||
pub re: R,
|
||||
#[doc = "0x5c - ADC Data Result Registers"]
|
||||
pub rf: R,
|
||||
#[doc = "0x60 - ADC Data Result Registers"]
|
||||
pub rg: R,
|
||||
#[doc = "0x64 - ADC Data Result Registers"]
|
||||
pub rh: R,
|
||||
#[doc = "0x68 - ADC Data Result Registers"]
|
||||
pub ri: R,
|
||||
#[doc = "0x6c - ADC Data Result Registers"]
|
||||
pub rj: R,
|
||||
#[doc = "0x70 - ADC Data Result Registers"]
|
||||
pub rk: R,
|
||||
#[doc = "0x74 - ADC Data Result Registers"]
|
||||
pub rl: R,
|
||||
#[doc = "0x78 - ADC Data Result Registers"]
|
||||
pub rm: R,
|
||||
#[doc = "0x7c - ADC Data Result Registers"]
|
||||
pub rn: R,
|
||||
#[doc = "0x80 - ADC Data Result Registers"]
|
||||
pub ro: R,
|
||||
#[doc = "0x84 - ADC Data Result Registers"]
|
||||
pub rp: R,
|
||||
#[doc = "0x88 - Compare Value Registers"]
|
||||
pub cv1: CV,
|
||||
#[doc = "0x8c - Compare Value Registers"]
|
||||
pub cv2: CV,
|
||||
#[doc = "0x90 - Status and Control Register 2"]
|
||||
pub sc2: SC2,
|
||||
#[doc = "0x94 - Status and Control Register 3"]
|
||||
pub sc3: SC3,
|
||||
#[doc = "0x98 - BASE Offset Register"]
|
||||
pub base_ofs: BASE_OFS,
|
||||
#[doc = "0x9c - ADC Offset Correction Register"]
|
||||
pub ofs: OFS,
|
||||
#[doc = "0xa0 - USER Offset Correction Register"]
|
||||
pub usr_ofs: USR_OFS,
|
||||
#[doc = "0xa4 - ADC X Offset Correction Register"]
|
||||
pub xofs: XOFS,
|
||||
#[doc = "0xa8 - ADC Y Offset Correction Register"]
|
||||
pub yofs: YOFS,
|
||||
#[doc = "0xac - ADC Gain Register"]
|
||||
pub g: G,
|
||||
#[doc = "0xb0 - ADC User Gain Register"]
|
||||
pub ug: UG,
|
||||
#[doc = "0xb4 - ADC General Calibration Value Register S"]
|
||||
pub clps: CLPS,
|
||||
#[doc = "0xb8 - ADC Plus-Side General Calibration Value Register 3"]
|
||||
pub clp3: CLP3,
|
||||
#[doc = "0xbc - ADC Plus-Side General Calibration Value Register 2"]
|
||||
pub clp2: CLP2,
|
||||
#[doc = "0xc0 - ADC Plus-Side General Calibration Value Register 1"]
|
||||
pub clp1: CLP1,
|
||||
#[doc = "0xc4 - ADC Plus-Side General Calibration Value Register 0"]
|
||||
pub clp0: CLP0,
|
||||
#[doc = "0xc8 - ADC Plus-Side General Calibration Value Register X"]
|
||||
pub clpx: CLPX,
|
||||
#[doc = "0xcc - ADC Plus-Side General Calibration Value Register 9"]
|
||||
pub clp9: CLP9,
|
||||
#[doc = "0xd0 - ADC General Calibration Offset Value Register S"]
|
||||
pub clps_ofs: CLPS_OFS,
|
||||
#[doc = "0x00 - ADC Status and Control Register 1"] pub sc1a: SC1,
|
||||
#[doc = "0x04 - ADC Status and Control Register 1"] pub sc1b: SC1,
|
||||
#[doc = "0x08 - ADC Status and Control Register 1"] pub sc1c: SC1,
|
||||
#[doc = "0x0c - ADC Status and Control Register 1"] pub sc1d: SC1,
|
||||
#[doc = "0x10 - ADC Status and Control Register 1"] pub sc1e: SC1,
|
||||
#[doc = "0x14 - ADC Status and Control Register 1"] pub sc1f: SC1,
|
||||
#[doc = "0x18 - ADC Status and Control Register 1"] pub sc1g: SC1,
|
||||
#[doc = "0x1c - ADC Status and Control Register 1"] pub sc1h: SC1,
|
||||
#[doc = "0x20 - ADC Status and Control Register 1"] pub sc1i: SC1,
|
||||
#[doc = "0x24 - ADC Status and Control Register 1"] pub sc1j: SC1,
|
||||
#[doc = "0x28 - ADC Status and Control Register 1"] pub sc1k: SC1,
|
||||
#[doc = "0x2c - ADC Status and Control Register 1"] pub sc1l: SC1,
|
||||
#[doc = "0x30 - ADC Status and Control Register 1"] pub sc1m: SC1,
|
||||
#[doc = "0x34 - ADC Status and Control Register 1"] pub sc1n: SC1,
|
||||
#[doc = "0x38 - ADC Status and Control Register 1"] pub sc1o: SC1,
|
||||
#[doc = "0x3c - ADC Status and Control Register 1"] pub sc1p: SC1,
|
||||
#[doc = "0x40 - ADC Configuration Register 1"] pub cfg1: CFG1,
|
||||
#[doc = "0x44 - ADC Configuration Register 2"] pub cfg2: CFG2,
|
||||
#[doc = "0x48 - ADC Data Result Registers"] pub ra: R,
|
||||
#[doc = "0x4c - ADC Data Result Registers"] pub rb: R,
|
||||
#[doc = "0x50 - ADC Data Result Registers"] pub rc: R,
|
||||
#[doc = "0x54 - ADC Data Result Registers"] pub rd: R,
|
||||
#[doc = "0x58 - ADC Data Result Registers"] pub re: R,
|
||||
#[doc = "0x5c - ADC Data Result Registers"] pub rf: R,
|
||||
#[doc = "0x60 - ADC Data Result Registers"] pub rg: R,
|
||||
#[doc = "0x64 - ADC Data Result Registers"] pub rh: R,
|
||||
#[doc = "0x68 - ADC Data Result Registers"] pub ri: R,
|
||||
#[doc = "0x6c - ADC Data Result Registers"] pub rj: R,
|
||||
#[doc = "0x70 - ADC Data Result Registers"] pub rk: R,
|
||||
#[doc = "0x74 - ADC Data Result Registers"] pub rl: R,
|
||||
#[doc = "0x78 - ADC Data Result Registers"] pub rm: R,
|
||||
#[doc = "0x7c - ADC Data Result Registers"] pub rn: R,
|
||||
#[doc = "0x80 - ADC Data Result Registers"] pub ro: R,
|
||||
#[doc = "0x84 - ADC Data Result Registers"] pub rp: R,
|
||||
#[doc = "0x88 - Compare Value Registers"] pub cv1: CV,
|
||||
#[doc = "0x8c - Compare Value Registers"] pub cv2: CV,
|
||||
#[doc = "0x90 - Status and Control Register 2"] pub sc2: SC2,
|
||||
#[doc = "0x94 - Status and Control Register 3"] pub sc3: SC3,
|
||||
#[doc = "0x98 - BASE Offset Register"] pub base_ofs: BASE_OFS,
|
||||
#[doc = "0x9c - ADC Offset Correction Register"] pub ofs: OFS,
|
||||
#[doc = "0xa0 - USER Offset Correction Register"] pub usr_ofs: USR_OFS,
|
||||
#[doc = "0xa4 - ADC X Offset Correction Register"] pub xofs: XOFS,
|
||||
#[doc = "0xa8 - ADC Y Offset Correction Register"] pub yofs: YOFS,
|
||||
#[doc = "0xac - ADC Gain Register"] pub g: G,
|
||||
#[doc = "0xb0 - ADC User Gain Register"] pub ug: UG,
|
||||
#[doc = "0xb4 - ADC General Calibration Value Register S"] pub clps: CLPS,
|
||||
#[doc = "0xb8 - ADC Plus-Side General Calibration Value Register 3"] pub clp3: CLP3,
|
||||
#[doc = "0xbc - ADC Plus-Side General Calibration Value Register 2"] pub clp2: CLP2,
|
||||
#[doc = "0xc0 - ADC Plus-Side General Calibration Value Register 1"] pub clp1: CLP1,
|
||||
#[doc = "0xc4 - ADC Plus-Side General Calibration Value Register 0"] pub clp0: CLP0,
|
||||
#[doc = "0xc8 - ADC Plus-Side General Calibration Value Register X"] pub clpx: CLPX,
|
||||
#[doc = "0xcc - ADC Plus-Side General Calibration Value Register 9"] pub clp9: CLP9,
|
||||
#[doc = "0xd0 - ADC General Calibration Offset Value Register S"] pub clps_ofs: CLPS_OFS,
|
||||
#[doc = "0xd4 - ADC Plus-Side General Calibration Offset Value Register 3"]
|
||||
pub clp3_ofs: CLP3_OFS,
|
||||
pub clp3_ofs:
|
||||
CLP3_OFS,
|
||||
#[doc = "0xd8 - ADC Plus-Side General Calibration Offset Value Register 2"]
|
||||
pub clp2_ofs: CLP2_OFS,
|
||||
pub clp2_ofs:
|
||||
CLP2_OFS,
|
||||
#[doc = "0xdc - ADC Plus-Side General Calibration Offset Value Register 1"]
|
||||
pub clp1_ofs: CLP1_OFS,
|
||||
pub clp1_ofs:
|
||||
CLP1_OFS,
|
||||
#[doc = "0xe0 - ADC Plus-Side General Calibration Offset Value Register 0"]
|
||||
pub clp0_ofs: CLP0_OFS,
|
||||
pub clp0_ofs:
|
||||
CLP0_OFS,
|
||||
#[doc = "0xe4 - ADC Plus-Side General Calibration Offset Value Register X"]
|
||||
pub clpx_ofs: CLPX_OFS,
|
||||
pub clpx_ofs:
|
||||
CLPX_OFS,
|
||||
#[doc = "0xe8 - ADC Plus-Side General Calibration Offset Value Register 9"]
|
||||
pub clp9_ofs: CLP9_OFS,
|
||||
pub clp9_ofs:
|
||||
CLP9_OFS,
|
||||
}
|
||||
#[doc = "ADC Status and Control Register 1"]
|
||||
pub struct SC1 {
|
||||
|
|
|
|||
|
|
@ -22,7 +22,9 @@ impl super::OFS {
|
|||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
|
|
|
|||
|
|
@ -6,7 +6,9 @@ impl super::R {
|
|||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
}
|
||||
}
|
||||
#[doc = r" Value of the field"]
|
||||
|
|
|
|||
|
|
@ -22,7 +22,9 @@ impl super::SC1 {
|
|||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
|
|
@ -43,62 +45,36 @@ impl super::SC1 {
|
|||
#[doc = "Possible values of the field `ADCH`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ADCHR {
|
||||
#[doc = "Exernal channel 0 is selected as input."]
|
||||
_00000,
|
||||
#[doc = "Exernal channel 1 is selected as input."]
|
||||
_00001,
|
||||
#[doc = "Exernal channel 2 is selected as input."]
|
||||
_00010,
|
||||
#[doc = "Exernal channel 3 is selected as input."]
|
||||
_00011,
|
||||
#[doc = "Exernal channel 4 is selected as input."]
|
||||
_00100,
|
||||
#[doc = "Exernal channel 5 is selected as input."]
|
||||
_00101,
|
||||
#[doc = "Exernal channel 6 is selected as input."]
|
||||
_00110,
|
||||
#[doc = "Exernal channel 7 is selected as input."]
|
||||
_00111,
|
||||
#[doc = "Exernal channel 8 is selected as input."]
|
||||
_01000,
|
||||
#[doc = "Exernal channel 9 is selected as input."]
|
||||
_01001,
|
||||
#[doc = "Exernal channel 10 is selected as input."]
|
||||
_01010,
|
||||
#[doc = "Exernal channel 11 is selected as input."]
|
||||
_01011,
|
||||
#[doc = "Exernal channel 12 is selected as input."]
|
||||
_01100,
|
||||
#[doc = "Exernal channel 13 is selected as input."]
|
||||
_01101,
|
||||
#[doc = "Exernal channel 14 is selected as input."]
|
||||
_01110,
|
||||
#[doc = "Exernal channel 15 is selected as input."]
|
||||
_01111,
|
||||
#[doc = "Exernal channel 18 is selected as input."]
|
||||
_10010,
|
||||
#[doc = "Exernal channel 19 is selected as input."]
|
||||
_10011,
|
||||
#[doc = "Internal channel 0 is selected as input."]
|
||||
_10101,
|
||||
#[doc = "Internal channel 1 is selected as input."]
|
||||
_10110,
|
||||
#[doc = "Internal channel 2 is selected as input."]
|
||||
_10111,
|
||||
#[doc = "Temp Sensor"]
|
||||
_11010,
|
||||
#[doc = "Band Gap"]
|
||||
_11011,
|
||||
#[doc = "Internal channel 3 is selected as input."]
|
||||
_11100,
|
||||
#[doc = "Exernal channel 0 is selected as input."] _00000,
|
||||
#[doc = "Exernal channel 1 is selected as input."] _00001,
|
||||
#[doc = "Exernal channel 2 is selected as input."] _00010,
|
||||
#[doc = "Exernal channel 3 is selected as input."] _00011,
|
||||
#[doc = "Exernal channel 4 is selected as input."] _00100,
|
||||
#[doc = "Exernal channel 5 is selected as input."] _00101,
|
||||
#[doc = "Exernal channel 6 is selected as input."] _00110,
|
||||
#[doc = "Exernal channel 7 is selected as input."] _00111,
|
||||
#[doc = "Exernal channel 8 is selected as input."] _01000,
|
||||
#[doc = "Exernal channel 9 is selected as input."] _01001,
|
||||
#[doc = "Exernal channel 10 is selected as input."] _01010,
|
||||
#[doc = "Exernal channel 11 is selected as input."] _01011,
|
||||
#[doc = "Exernal channel 12 is selected as input."] _01100,
|
||||
#[doc = "Exernal channel 13 is selected as input."] _01101,
|
||||
#[doc = "Exernal channel 14 is selected as input."] _01110,
|
||||
#[doc = "Exernal channel 15 is selected as input."] _01111,
|
||||
#[doc = "Exernal channel 18 is selected as input."] _10010,
|
||||
#[doc = "Exernal channel 19 is selected as input."] _10011,
|
||||
#[doc = "Internal channel 0 is selected as input."] _10101,
|
||||
#[doc = "Internal channel 1 is selected as input."] _10110,
|
||||
#[doc = "Internal channel 2 is selected as input."] _10111,
|
||||
#[doc = "Temp Sensor"] _11010,
|
||||
#[doc = "Band Gap"] _11011,
|
||||
#[doc = "Internal channel 3 is selected as input."] _11100,
|
||||
#[doc = "VREFSH is selected as input. Voltage reference selected is determined by SC2[REFSEL]."]
|
||||
_11101,
|
||||
#[doc = "VREFSL is selected as input. Voltage reference selected is determined by SC2[REFSEL]."]
|
||||
_11110,
|
||||
#[doc = "Module is disabled"]
|
||||
_11111,
|
||||
#[doc = r" Reserved"]
|
||||
_Reserved(u8),
|
||||
#[doc = "Module is disabled"] _11111,
|
||||
#[doc = r" Reserved"] _Reserved(u8),
|
||||
}
|
||||
impl ADCHR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
|
|
@ -309,10 +285,8 @@ impl ADCHR {
|
|||
#[doc = "Possible values of the field `AIEN`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum AIENR {
|
||||
#[doc = "Conversion complete interrupt is disabled."]
|
||||
_0,
|
||||
#[doc = "Conversion complete interrupt is enabled."]
|
||||
_1,
|
||||
#[doc = "Conversion complete interrupt is disabled."] _0,
|
||||
#[doc = "Conversion complete interrupt is enabled."] _1,
|
||||
}
|
||||
impl AIENR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -356,10 +330,8 @@ impl AIENR {
|
|||
#[doc = "Possible values of the field `COCO`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum COCOR {
|
||||
#[doc = "Conversion is not completed."]
|
||||
_0,
|
||||
#[doc = "Conversion is completed."]
|
||||
_1,
|
||||
#[doc = "Conversion is not completed."] _0,
|
||||
#[doc = "Conversion is completed."] _1,
|
||||
}
|
||||
impl COCOR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -402,60 +374,35 @@ impl COCOR {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `ADCH`"]
|
||||
pub enum ADCHW {
|
||||
#[doc = "Exernal channel 0 is selected as input."]
|
||||
_00000,
|
||||
#[doc = "Exernal channel 1 is selected as input."]
|
||||
_00001,
|
||||
#[doc = "Exernal channel 2 is selected as input."]
|
||||
_00010,
|
||||
#[doc = "Exernal channel 3 is selected as input."]
|
||||
_00011,
|
||||
#[doc = "Exernal channel 4 is selected as input."]
|
||||
_00100,
|
||||
#[doc = "Exernal channel 5 is selected as input."]
|
||||
_00101,
|
||||
#[doc = "Exernal channel 6 is selected as input."]
|
||||
_00110,
|
||||
#[doc = "Exernal channel 7 is selected as input."]
|
||||
_00111,
|
||||
#[doc = "Exernal channel 8 is selected as input."]
|
||||
_01000,
|
||||
#[doc = "Exernal channel 9 is selected as input."]
|
||||
_01001,
|
||||
#[doc = "Exernal channel 10 is selected as input."]
|
||||
_01010,
|
||||
#[doc = "Exernal channel 11 is selected as input."]
|
||||
_01011,
|
||||
#[doc = "Exernal channel 12 is selected as input."]
|
||||
_01100,
|
||||
#[doc = "Exernal channel 13 is selected as input."]
|
||||
_01101,
|
||||
#[doc = "Exernal channel 14 is selected as input."]
|
||||
_01110,
|
||||
#[doc = "Exernal channel 15 is selected as input."]
|
||||
_01111,
|
||||
#[doc = "Exernal channel 18 is selected as input."]
|
||||
_10010,
|
||||
#[doc = "Exernal channel 19 is selected as input."]
|
||||
_10011,
|
||||
#[doc = "Internal channel 0 is selected as input."]
|
||||
_10101,
|
||||
#[doc = "Internal channel 1 is selected as input."]
|
||||
_10110,
|
||||
#[doc = "Internal channel 2 is selected as input."]
|
||||
_10111,
|
||||
#[doc = "Temp Sensor"]
|
||||
_11010,
|
||||
#[doc = "Band Gap"]
|
||||
_11011,
|
||||
#[doc = "Internal channel 3 is selected as input."]
|
||||
_11100,
|
||||
#[doc = "Exernal channel 0 is selected as input."] _00000,
|
||||
#[doc = "Exernal channel 1 is selected as input."] _00001,
|
||||
#[doc = "Exernal channel 2 is selected as input."] _00010,
|
||||
#[doc = "Exernal channel 3 is selected as input."] _00011,
|
||||
#[doc = "Exernal channel 4 is selected as input."] _00100,
|
||||
#[doc = "Exernal channel 5 is selected as input."] _00101,
|
||||
#[doc = "Exernal channel 6 is selected as input."] _00110,
|
||||
#[doc = "Exernal channel 7 is selected as input."] _00111,
|
||||
#[doc = "Exernal channel 8 is selected as input."] _01000,
|
||||
#[doc = "Exernal channel 9 is selected as input."] _01001,
|
||||
#[doc = "Exernal channel 10 is selected as input."] _01010,
|
||||
#[doc = "Exernal channel 11 is selected as input."] _01011,
|
||||
#[doc = "Exernal channel 12 is selected as input."] _01100,
|
||||
#[doc = "Exernal channel 13 is selected as input."] _01101,
|
||||
#[doc = "Exernal channel 14 is selected as input."] _01110,
|
||||
#[doc = "Exernal channel 15 is selected as input."] _01111,
|
||||
#[doc = "Exernal channel 18 is selected as input."] _10010,
|
||||
#[doc = "Exernal channel 19 is selected as input."] _10011,
|
||||
#[doc = "Internal channel 0 is selected as input."] _10101,
|
||||
#[doc = "Internal channel 1 is selected as input."] _10110,
|
||||
#[doc = "Internal channel 2 is selected as input."] _10111,
|
||||
#[doc = "Temp Sensor"] _11010,
|
||||
#[doc = "Band Gap"] _11011,
|
||||
#[doc = "Internal channel 3 is selected as input."] _11100,
|
||||
#[doc = "VREFSH is selected as input. Voltage reference selected is determined by SC2[REFSEL]."]
|
||||
_11101,
|
||||
#[doc = "VREFSL is selected as input. Voltage reference selected is determined by SC2[REFSEL]."]
|
||||
_11110,
|
||||
#[doc = "Module is disabled"]
|
||||
_11111,
|
||||
#[doc = "Module is disabled"] _11111,
|
||||
}
|
||||
impl ADCHW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -650,10 +597,8 @@ impl<'a> _ADCHW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `AIEN`"]
|
||||
pub enum AIENW {
|
||||
#[doc = "Conversion complete interrupt is disabled."]
|
||||
_0,
|
||||
#[doc = "Conversion complete interrupt is enabled."]
|
||||
_1,
|
||||
#[doc = "Conversion complete interrupt is disabled."] _0,
|
||||
#[doc = "Conversion complete interrupt is enabled."] _1,
|
||||
}
|
||||
impl AIENW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
|
|||
|
|
@ -22,7 +22,9 @@ impl super::SC2 {
|
|||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
|
|
@ -43,12 +45,10 @@ impl super::SC2 {
|
|||
#[doc = "Possible values of the field `REFSEL`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum REFSELR {
|
||||
#[doc = "Default voltage reference pin pair, that is, external pins VREFH and VREFL"]
|
||||
_00,
|
||||
#[doc = "Default voltage reference pin pair, that is, external pins VREFH and VREFL"] _00,
|
||||
#[doc = "Alternate reference voltage, that is, VALTH. This voltage may be additional external pin or internal source depending on the MCU configuration. See the chip configuration information for details specific to this MCU."]
|
||||
_01,
|
||||
#[doc = r" Reserved"]
|
||||
_Reserved(u8),
|
||||
#[doc = r" Reserved"] _Reserved(u8),
|
||||
}
|
||||
impl REFSELR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
|
|
@ -84,8 +84,7 @@ impl REFSELR {
|
|||
#[doc = "Possible values of the field `DMAEN`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum DMAENR {
|
||||
#[doc = "DMA is disabled."]
|
||||
_0,
|
||||
#[doc = "DMA is disabled."] _0,
|
||||
#[doc = "DMA is enabled and will assert the ADC DMA request during an ADC conversion complete event , which is indicated when any SC1n[COCO] flag is asserted."]
|
||||
_1,
|
||||
}
|
||||
|
|
@ -173,10 +172,8 @@ impl ACFGTR {
|
|||
#[doc = "Possible values of the field `ACFE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ACFER {
|
||||
#[doc = "Compare function disabled."]
|
||||
_0,
|
||||
#[doc = "Compare function enabled."]
|
||||
_1,
|
||||
#[doc = "Compare function disabled."] _0,
|
||||
#[doc = "Compare function enabled."] _1,
|
||||
}
|
||||
impl ACFER {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -220,10 +217,8 @@ impl ACFER {
|
|||
#[doc = "Possible values of the field `ADTRG`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ADTRGR {
|
||||
#[doc = "Software trigger selected."]
|
||||
_0,
|
||||
#[doc = "Hardware trigger selected."]
|
||||
_1,
|
||||
#[doc = "Software trigger selected."] _0,
|
||||
#[doc = "Hardware trigger selected."] _1,
|
||||
}
|
||||
impl ADTRGR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -267,10 +262,8 @@ impl ADTRGR {
|
|||
#[doc = "Possible values of the field `ADACT`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ADACTR {
|
||||
#[doc = "Conversion not in progress."]
|
||||
_0,
|
||||
#[doc = "Conversion in progress."]
|
||||
_1,
|
||||
#[doc = "Conversion not in progress."] _0,
|
||||
#[doc = "Conversion in progress."] _1,
|
||||
}
|
||||
impl ADACTR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -325,12 +318,9 @@ impl TRGPRNUMR {
|
|||
#[doc = "Possible values of the field `TRGSTLAT`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TRGSTLATR {
|
||||
#[doc = "No trigger request has been latched"]
|
||||
_0,
|
||||
#[doc = "A trigger request has been latched"]
|
||||
_1,
|
||||
#[doc = r" Reserved"]
|
||||
_Reserved(u8),
|
||||
#[doc = "No trigger request has been latched"] _0,
|
||||
#[doc = "A trigger request has been latched"] _1,
|
||||
#[doc = r" Reserved"] _Reserved(u8),
|
||||
}
|
||||
impl TRGSTLATR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
|
|
@ -366,12 +356,9 @@ impl TRGSTLATR {
|
|||
#[doc = "Possible values of the field `TRGSTERR`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TRGSTERRR {
|
||||
#[doc = "No error has occurred"]
|
||||
_0,
|
||||
#[doc = "An error has occurred"]
|
||||
_1,
|
||||
#[doc = r" Reserved"]
|
||||
_Reserved(u8),
|
||||
#[doc = "No error has occurred"] _0,
|
||||
#[doc = "An error has occurred"] _1,
|
||||
#[doc = r" Reserved"] _Reserved(u8),
|
||||
}
|
||||
impl TRGSTERRR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
|
|
@ -406,8 +393,7 @@ impl TRGSTERRR {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `REFSEL`"]
|
||||
pub enum REFSELW {
|
||||
#[doc = "Default voltage reference pin pair, that is, external pins VREFH and VREFL"]
|
||||
_00,
|
||||
#[doc = "Default voltage reference pin pair, that is, external pins VREFH and VREFL"] _00,
|
||||
#[doc = "Alternate reference voltage, that is, VALTH. This voltage may be additional external pin or internal source depending on the MCU configuration. See the chip configuration information for details specific to this MCU."]
|
||||
_01,
|
||||
}
|
||||
|
|
@ -454,8 +440,7 @@ impl<'a> _REFSELW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `DMAEN`"]
|
||||
pub enum DMAENW {
|
||||
#[doc = "DMA is disabled."]
|
||||
_0,
|
||||
#[doc = "DMA is disabled."] _0,
|
||||
#[doc = "DMA is enabled and will assert the ADC DMA request during an ADC conversion complete event , which is indicated when any SC1n[COCO] flag is asserted."]
|
||||
_1,
|
||||
}
|
||||
|
|
@ -558,10 +543,8 @@ impl<'a> _ACFGTW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `ACFE`"]
|
||||
pub enum ACFEW {
|
||||
#[doc = "Compare function disabled."]
|
||||
_0,
|
||||
#[doc = "Compare function enabled."]
|
||||
_1,
|
||||
#[doc = "Compare function disabled."] _0,
|
||||
#[doc = "Compare function enabled."] _1,
|
||||
}
|
||||
impl ACFEW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -616,10 +599,8 @@ impl<'a> _ACFEW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `ADTRG`"]
|
||||
pub enum ADTRGW {
|
||||
#[doc = "Software trigger selected."]
|
||||
_0,
|
||||
#[doc = "Hardware trigger selected."]
|
||||
_1,
|
||||
#[doc = "Software trigger selected."] _0,
|
||||
#[doc = "Hardware trigger selected."] _1,
|
||||
}
|
||||
impl ADTRGW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
|
|||
|
|
@ -22,7 +22,9 @@ impl super::SC3 {
|
|||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
|
|
@ -43,14 +45,10 @@ impl super::SC3 {
|
|||
#[doc = "Possible values of the field `AVGS`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum AVGSR {
|
||||
#[doc = "4 samples averaged."]
|
||||
_00,
|
||||
#[doc = "8 samples averaged."]
|
||||
_01,
|
||||
#[doc = "16 samples averaged."]
|
||||
_10,
|
||||
#[doc = "32 samples averaged."]
|
||||
_11,
|
||||
#[doc = "4 samples averaged."] _00,
|
||||
#[doc = "8 samples averaged."] _01,
|
||||
#[doc = "16 samples averaged."] _10,
|
||||
#[doc = "32 samples averaged."] _11,
|
||||
}
|
||||
impl AVGSR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
|
|
@ -99,10 +97,8 @@ impl AVGSR {
|
|||
#[doc = "Possible values of the field `AVGE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum AVGER {
|
||||
#[doc = "Hardware average function disabled."]
|
||||
_0,
|
||||
#[doc = "Hardware average function enabled."]
|
||||
_1,
|
||||
#[doc = "Hardware average function disabled."] _0,
|
||||
#[doc = "Hardware average function enabled."] _1,
|
||||
}
|
||||
impl AVGER {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -213,14 +209,10 @@ impl CALR {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `AVGS`"]
|
||||
pub enum AVGSW {
|
||||
#[doc = "4 samples averaged."]
|
||||
_00,
|
||||
#[doc = "8 samples averaged."]
|
||||
_01,
|
||||
#[doc = "16 samples averaged."]
|
||||
_10,
|
||||
#[doc = "32 samples averaged."]
|
||||
_11,
|
||||
#[doc = "4 samples averaged."] _00,
|
||||
#[doc = "8 samples averaged."] _01,
|
||||
#[doc = "16 samples averaged."] _10,
|
||||
#[doc = "32 samples averaged."] _11,
|
||||
}
|
||||
impl AVGSW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -279,10 +271,8 @@ impl<'a> _AVGSW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `AVGE`"]
|
||||
pub enum AVGEW {
|
||||
#[doc = "Hardware average function disabled."]
|
||||
_0,
|
||||
#[doc = "Hardware average function enabled."]
|
||||
_1,
|
||||
#[doc = "Hardware average function disabled."] _0,
|
||||
#[doc = "Hardware average function enabled."] _1,
|
||||
}
|
||||
impl AVGEW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
|
|||
|
|
@ -22,7 +22,9 @@ impl super::UG {
|
|||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
|
|
|
|||
|
|
@ -22,7 +22,9 @@ impl super::USR_OFS {
|
|||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
|
|
|
|||
|
|
@ -22,7 +22,9 @@ impl super::XOFS {
|
|||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
|
|
|
|||
|
|
@ -22,7 +22,9 @@ impl super::YOFS {
|
|||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
|
|
|
|||
|
|
@ -2,42 +2,25 @@ use vcell::VolatileCell;
|
|||
#[doc = r" Register block"]
|
||||
#[repr(C)]
|
||||
pub struct RegisterBlock {
|
||||
#[doc = "0x00 - Master Privilege Register A"]
|
||||
pub mpra: MPRA,
|
||||
#[doc = "0x00 - Master Privilege Register A"] pub mpra: MPRA,
|
||||
_reserved0: [u8; 28usize],
|
||||
#[doc = "0x20 - Peripheral Access Control Register"]
|
||||
pub pacra: PACRA,
|
||||
#[doc = "0x24 - Peripheral Access Control Register"]
|
||||
pub pacrb: PACRB,
|
||||
#[doc = "0x28 - Peripheral Access Control Register"]
|
||||
pub pacrc: PACRC,
|
||||
#[doc = "0x2c - Peripheral Access Control Register"]
|
||||
pub pacrd: PACRD,
|
||||
#[doc = "0x20 - Peripheral Access Control Register"] pub pacra: PACRA,
|
||||
#[doc = "0x24 - Peripheral Access Control Register"] pub pacrb: PACRB,
|
||||
#[doc = "0x28 - Peripheral Access Control Register"] pub pacrc: PACRC,
|
||||
#[doc = "0x2c - Peripheral Access Control Register"] pub pacrd: PACRD,
|
||||
_reserved1: [u8; 16usize],
|
||||
#[doc = "0x40 - Off-Platform Peripheral Access Control Register"]
|
||||
pub opacra: OPACRA,
|
||||
#[doc = "0x44 - Off-Platform Peripheral Access Control Register"]
|
||||
pub opacrb: OPACRB,
|
||||
#[doc = "0x48 - Off-Platform Peripheral Access Control Register"]
|
||||
pub opacrc: OPACRC,
|
||||
#[doc = "0x4c - Off-Platform Peripheral Access Control Register"]
|
||||
pub opacrd: OPACRD,
|
||||
#[doc = "0x50 - Off-Platform Peripheral Access Control Register"]
|
||||
pub opacre: OPACRE,
|
||||
#[doc = "0x54 - Off-Platform Peripheral Access Control Register"]
|
||||
pub opacrf: OPACRF,
|
||||
#[doc = "0x58 - Off-Platform Peripheral Access Control Register"]
|
||||
pub opacrg: OPACRG,
|
||||
#[doc = "0x5c - Off-Platform Peripheral Access Control Register"]
|
||||
pub opacrh: OPACRH,
|
||||
#[doc = "0x60 - Off-Platform Peripheral Access Control Register"]
|
||||
pub opacri: OPACRI,
|
||||
#[doc = "0x64 - Off-Platform Peripheral Access Control Register"]
|
||||
pub opacrj: OPACRJ,
|
||||
#[doc = "0x68 - Off-Platform Peripheral Access Control Register"]
|
||||
pub opacrk: OPACRK,
|
||||
#[doc = "0x6c - Off-Platform Peripheral Access Control Register"]
|
||||
pub opacrl: OPACRL,
|
||||
#[doc = "0x40 - Off-Platform Peripheral Access Control Register"] pub opacra: OPACRA,
|
||||
#[doc = "0x44 - Off-Platform Peripheral Access Control Register"] pub opacrb: OPACRB,
|
||||
#[doc = "0x48 - Off-Platform Peripheral Access Control Register"] pub opacrc: OPACRC,
|
||||
#[doc = "0x4c - Off-Platform Peripheral Access Control Register"] pub opacrd: OPACRD,
|
||||
#[doc = "0x50 - Off-Platform Peripheral Access Control Register"] pub opacre: OPACRE,
|
||||
#[doc = "0x54 - Off-Platform Peripheral Access Control Register"] pub opacrf: OPACRF,
|
||||
#[doc = "0x58 - Off-Platform Peripheral Access Control Register"] pub opacrg: OPACRG,
|
||||
#[doc = "0x5c - Off-Platform Peripheral Access Control Register"] pub opacrh: OPACRH,
|
||||
#[doc = "0x60 - Off-Platform Peripheral Access Control Register"] pub opacri: OPACRI,
|
||||
#[doc = "0x64 - Off-Platform Peripheral Access Control Register"] pub opacrj: OPACRJ,
|
||||
#[doc = "0x68 - Off-Platform Peripheral Access Control Register"] pub opacrk: OPACRK,
|
||||
#[doc = "0x6c - Off-Platform Peripheral Access Control Register"] pub opacrl: OPACRL,
|
||||
}
|
||||
#[doc = "Master Privilege Register A"]
|
||||
pub struct MPRA {
|
||||
|
|
|
|||
|
|
@ -22,7 +22,9 @@ impl super::MPRA {
|
|||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
|
|
@ -43,10 +45,8 @@ impl super::MPRA {
|
|||
#[doc = "Possible values of the field `MPL2`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum MPL2R {
|
||||
#[doc = "Accesses from this master are forced to user-mode."]
|
||||
_0,
|
||||
#[doc = "Accesses from this master are not forced to user-mode."]
|
||||
_1,
|
||||
#[doc = "Accesses from this master are forced to user-mode."] _0,
|
||||
#[doc = "Accesses from this master are not forced to user-mode."] _1,
|
||||
}
|
||||
impl MPL2R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -90,10 +90,8 @@ impl MPL2R {
|
|||
#[doc = "Possible values of the field `MTW2`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum MTW2R {
|
||||
#[doc = "This master is not trusted for write accesses."]
|
||||
_0,
|
||||
#[doc = "This master is trusted for write accesses."]
|
||||
_1,
|
||||
#[doc = "This master is not trusted for write accesses."] _0,
|
||||
#[doc = "This master is trusted for write accesses."] _1,
|
||||
}
|
||||
impl MTW2R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -137,10 +135,8 @@ impl MTW2R {
|
|||
#[doc = "Possible values of the field `MTR2`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum MTR2R {
|
||||
#[doc = "This master is not trusted for read accesses."]
|
||||
_0,
|
||||
#[doc = "This master is trusted for read accesses."]
|
||||
_1,
|
||||
#[doc = "This master is not trusted for read accesses."] _0,
|
||||
#[doc = "This master is trusted for read accesses."] _1,
|
||||
}
|
||||
impl MTR2R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -184,10 +180,8 @@ impl MTR2R {
|
|||
#[doc = "Possible values of the field `MPL1`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum MPL1R {
|
||||
#[doc = "Accesses from this master are forced to user-mode."]
|
||||
_0,
|
||||
#[doc = "Accesses from this master are not forced to user-mode."]
|
||||
_1,
|
||||
#[doc = "Accesses from this master are forced to user-mode."] _0,
|
||||
#[doc = "Accesses from this master are not forced to user-mode."] _1,
|
||||
}
|
||||
impl MPL1R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -231,10 +225,8 @@ impl MPL1R {
|
|||
#[doc = "Possible values of the field `MTW1`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum MTW1R {
|
||||
#[doc = "This master is not trusted for write accesses."]
|
||||
_0,
|
||||
#[doc = "This master is trusted for write accesses."]
|
||||
_1,
|
||||
#[doc = "This master is not trusted for write accesses."] _0,
|
||||
#[doc = "This master is trusted for write accesses."] _1,
|
||||
}
|
||||
impl MTW1R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -278,10 +270,8 @@ impl MTW1R {
|
|||
#[doc = "Possible values of the field `MTR1`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum MTR1R {
|
||||
#[doc = "This master is not trusted for read accesses."]
|
||||
_0,
|
||||
#[doc = "This master is trusted for read accesses."]
|
||||
_1,
|
||||
#[doc = "This master is not trusted for read accesses."] _0,
|
||||
#[doc = "This master is trusted for read accesses."] _1,
|
||||
}
|
||||
impl MTR1R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -325,10 +315,8 @@ impl MTR1R {
|
|||
#[doc = "Possible values of the field `MPL0`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum MPL0R {
|
||||
#[doc = "Accesses from this master are forced to user-mode."]
|
||||
_0,
|
||||
#[doc = "Accesses from this master are not forced to user-mode."]
|
||||
_1,
|
||||
#[doc = "Accesses from this master are forced to user-mode."] _0,
|
||||
#[doc = "Accesses from this master are not forced to user-mode."] _1,
|
||||
}
|
||||
impl MPL0R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -372,10 +360,8 @@ impl MPL0R {
|
|||
#[doc = "Possible values of the field `MTW0`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum MTW0R {
|
||||
#[doc = "This master is not trusted for write accesses."]
|
||||
_0,
|
||||
#[doc = "This master is trusted for write accesses."]
|
||||
_1,
|
||||
#[doc = "This master is not trusted for write accesses."] _0,
|
||||
#[doc = "This master is trusted for write accesses."] _1,
|
||||
}
|
||||
impl MTW0R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -419,10 +405,8 @@ impl MTW0R {
|
|||
#[doc = "Possible values of the field `MTR0`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum MTR0R {
|
||||
#[doc = "This master is not trusted for read accesses."]
|
||||
_0,
|
||||
#[doc = "This master is trusted for read accesses."]
|
||||
_1,
|
||||
#[doc = "This master is not trusted for read accesses."] _0,
|
||||
#[doc = "This master is trusted for read accesses."] _1,
|
||||
}
|
||||
impl MTR0R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -465,10 +449,8 @@ impl MTR0R {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `MPL2`"]
|
||||
pub enum MPL2W {
|
||||
#[doc = "Accesses from this master are forced to user-mode."]
|
||||
_0,
|
||||
#[doc = "Accesses from this master are not forced to user-mode."]
|
||||
_1,
|
||||
#[doc = "Accesses from this master are forced to user-mode."] _0,
|
||||
#[doc = "Accesses from this master are not forced to user-mode."] _1,
|
||||
}
|
||||
impl MPL2W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -523,10 +505,8 @@ impl<'a> _MPL2W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `MTW2`"]
|
||||
pub enum MTW2W {
|
||||
#[doc = "This master is not trusted for write accesses."]
|
||||
_0,
|
||||
#[doc = "This master is trusted for write accesses."]
|
||||
_1,
|
||||
#[doc = "This master is not trusted for write accesses."] _0,
|
||||
#[doc = "This master is trusted for write accesses."] _1,
|
||||
}
|
||||
impl MTW2W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -581,10 +561,8 @@ impl<'a> _MTW2W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `MTR2`"]
|
||||
pub enum MTR2W {
|
||||
#[doc = "This master is not trusted for read accesses."]
|
||||
_0,
|
||||
#[doc = "This master is trusted for read accesses."]
|
||||
_1,
|
||||
#[doc = "This master is not trusted for read accesses."] _0,
|
||||
#[doc = "This master is trusted for read accesses."] _1,
|
||||
}
|
||||
impl MTR2W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -639,10 +617,8 @@ impl<'a> _MTR2W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `MPL1`"]
|
||||
pub enum MPL1W {
|
||||
#[doc = "Accesses from this master are forced to user-mode."]
|
||||
_0,
|
||||
#[doc = "Accesses from this master are not forced to user-mode."]
|
||||
_1,
|
||||
#[doc = "Accesses from this master are forced to user-mode."] _0,
|
||||
#[doc = "Accesses from this master are not forced to user-mode."] _1,
|
||||
}
|
||||
impl MPL1W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -697,10 +673,8 @@ impl<'a> _MPL1W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `MTW1`"]
|
||||
pub enum MTW1W {
|
||||
#[doc = "This master is not trusted for write accesses."]
|
||||
_0,
|
||||
#[doc = "This master is trusted for write accesses."]
|
||||
_1,
|
||||
#[doc = "This master is not trusted for write accesses."] _0,
|
||||
#[doc = "This master is trusted for write accesses."] _1,
|
||||
}
|
||||
impl MTW1W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -755,10 +729,8 @@ impl<'a> _MTW1W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `MTR1`"]
|
||||
pub enum MTR1W {
|
||||
#[doc = "This master is not trusted for read accesses."]
|
||||
_0,
|
||||
#[doc = "This master is trusted for read accesses."]
|
||||
_1,
|
||||
#[doc = "This master is not trusted for read accesses."] _0,
|
||||
#[doc = "This master is trusted for read accesses."] _1,
|
||||
}
|
||||
impl MTR1W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -813,10 +785,8 @@ impl<'a> _MTR1W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `MPL0`"]
|
||||
pub enum MPL0W {
|
||||
#[doc = "Accesses from this master are forced to user-mode."]
|
||||
_0,
|
||||
#[doc = "Accesses from this master are not forced to user-mode."]
|
||||
_1,
|
||||
#[doc = "Accesses from this master are forced to user-mode."] _0,
|
||||
#[doc = "Accesses from this master are not forced to user-mode."] _1,
|
||||
}
|
||||
impl MPL0W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -871,10 +841,8 @@ impl<'a> _MPL0W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `MTW0`"]
|
||||
pub enum MTW0W {
|
||||
#[doc = "This master is not trusted for write accesses."]
|
||||
_0,
|
||||
#[doc = "This master is trusted for write accesses."]
|
||||
_1,
|
||||
#[doc = "This master is not trusted for write accesses."] _0,
|
||||
#[doc = "This master is trusted for write accesses."] _1,
|
||||
}
|
||||
impl MTW0W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -929,10 +897,8 @@ impl<'a> _MTW0W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `MTR0`"]
|
||||
pub enum MTR0W {
|
||||
#[doc = "This master is not trusted for read accesses."]
|
||||
_0,
|
||||
#[doc = "This master is trusted for read accesses."]
|
||||
_1,
|
||||
#[doc = "This master is not trusted for read accesses."] _0,
|
||||
#[doc = "This master is trusted for read accesses."] _1,
|
||||
}
|
||||
impl MTR0W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
|
|||
|
|
@ -22,7 +22,9 @@ impl super::OPACRA {
|
|||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
|
|
@ -43,10 +45,8 @@ impl super::OPACRA {
|
|||
#[doc = "Possible values of the field `TP7`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TP7R {
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
}
|
||||
impl TP7R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -90,10 +90,8 @@ impl TP7R {
|
|||
#[doc = "Possible values of the field `WP7`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WP7R {
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
}
|
||||
impl WP7R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -137,10 +135,8 @@ impl WP7R {
|
|||
#[doc = "Possible values of the field `SP7`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SP7R {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
}
|
||||
impl SP7R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -184,10 +180,8 @@ impl SP7R {
|
|||
#[doc = "Possible values of the field `TP6`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TP6R {
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
}
|
||||
impl TP6R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -231,10 +225,8 @@ impl TP6R {
|
|||
#[doc = "Possible values of the field `WP6`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WP6R {
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
}
|
||||
impl WP6R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -278,10 +270,8 @@ impl WP6R {
|
|||
#[doc = "Possible values of the field `SP6`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SP6R {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
}
|
||||
impl SP6R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -325,10 +315,8 @@ impl SP6R {
|
|||
#[doc = "Possible values of the field `TP5`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TP5R {
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
}
|
||||
impl TP5R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -372,10 +360,8 @@ impl TP5R {
|
|||
#[doc = "Possible values of the field `WP5`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WP5R {
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
}
|
||||
impl WP5R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -419,10 +405,8 @@ impl WP5R {
|
|||
#[doc = "Possible values of the field `SP5`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SP5R {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
}
|
||||
impl SP5R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -466,10 +450,8 @@ impl SP5R {
|
|||
#[doc = "Possible values of the field `TP4`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TP4R {
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
}
|
||||
impl TP4R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -513,10 +495,8 @@ impl TP4R {
|
|||
#[doc = "Possible values of the field `WP4`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WP4R {
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
}
|
||||
impl WP4R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -560,10 +540,8 @@ impl WP4R {
|
|||
#[doc = "Possible values of the field `SP4`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SP4R {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
}
|
||||
impl SP4R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -607,10 +585,8 @@ impl SP4R {
|
|||
#[doc = "Possible values of the field `TP1`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TP1R {
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
}
|
||||
impl TP1R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -654,10 +630,8 @@ impl TP1R {
|
|||
#[doc = "Possible values of the field `WP1`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WP1R {
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
}
|
||||
impl WP1R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -701,10 +675,8 @@ impl WP1R {
|
|||
#[doc = "Possible values of the field `SP1`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SP1R {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
}
|
||||
impl SP1R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -748,10 +720,8 @@ impl SP1R {
|
|||
#[doc = "Possible values of the field `TP0`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TP0R {
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
}
|
||||
impl TP0R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -795,10 +765,8 @@ impl TP0R {
|
|||
#[doc = "Possible values of the field `WP0`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WP0R {
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
}
|
||||
impl WP0R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -842,10 +810,8 @@ impl WP0R {
|
|||
#[doc = "Possible values of the field `SP0`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SP0R {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
}
|
||||
impl SP0R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -888,10 +854,8 @@ impl SP0R {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TP7`"]
|
||||
pub enum TP7W {
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
}
|
||||
impl TP7W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -946,10 +910,8 @@ impl<'a> _TP7W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WP7`"]
|
||||
pub enum WP7W {
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
}
|
||||
impl WP7W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1004,10 +966,8 @@ impl<'a> _WP7W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SP7`"]
|
||||
pub enum SP7W {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
}
|
||||
impl SP7W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1062,10 +1022,8 @@ impl<'a> _SP7W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TP6`"]
|
||||
pub enum TP6W {
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
}
|
||||
impl TP6W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1120,10 +1078,8 @@ impl<'a> _TP6W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WP6`"]
|
||||
pub enum WP6W {
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
}
|
||||
impl WP6W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1178,10 +1134,8 @@ impl<'a> _WP6W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SP6`"]
|
||||
pub enum SP6W {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
}
|
||||
impl SP6W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1236,10 +1190,8 @@ impl<'a> _SP6W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TP5`"]
|
||||
pub enum TP5W {
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
}
|
||||
impl TP5W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1294,10 +1246,8 @@ impl<'a> _TP5W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WP5`"]
|
||||
pub enum WP5W {
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
}
|
||||
impl WP5W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1352,10 +1302,8 @@ impl<'a> _WP5W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SP5`"]
|
||||
pub enum SP5W {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
}
|
||||
impl SP5W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1410,10 +1358,8 @@ impl<'a> _SP5W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TP4`"]
|
||||
pub enum TP4W {
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
}
|
||||
impl TP4W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1468,10 +1414,8 @@ impl<'a> _TP4W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WP4`"]
|
||||
pub enum WP4W {
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
}
|
||||
impl WP4W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1526,10 +1470,8 @@ impl<'a> _WP4W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SP4`"]
|
||||
pub enum SP4W {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
}
|
||||
impl SP4W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1584,10 +1526,8 @@ impl<'a> _SP4W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TP1`"]
|
||||
pub enum TP1W {
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
}
|
||||
impl TP1W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1642,10 +1582,8 @@ impl<'a> _TP1W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WP1`"]
|
||||
pub enum WP1W {
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
}
|
||||
impl WP1W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1700,10 +1638,8 @@ impl<'a> _WP1W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SP1`"]
|
||||
pub enum SP1W {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
}
|
||||
impl SP1W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1758,10 +1694,8 @@ impl<'a> _SP1W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TP0`"]
|
||||
pub enum TP0W {
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
}
|
||||
impl TP0W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1816,10 +1750,8 @@ impl<'a> _TP0W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WP0`"]
|
||||
pub enum WP0W {
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
}
|
||||
impl WP0W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1874,10 +1806,8 @@ impl<'a> _WP0W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SP0`"]
|
||||
pub enum SP0W {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
}
|
||||
impl SP0W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
|
|||
|
|
@ -22,7 +22,9 @@ impl super::OPACRB {
|
|||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
|
|
@ -43,10 +45,8 @@ impl super::OPACRB {
|
|||
#[doc = "Possible values of the field `TP6`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TP6R {
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
}
|
||||
impl TP6R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -90,10 +90,8 @@ impl TP6R {
|
|||
#[doc = "Possible values of the field `WP6`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WP6R {
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
}
|
||||
impl WP6R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -137,10 +135,8 @@ impl WP6R {
|
|||
#[doc = "Possible values of the field `SP6`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SP6R {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
}
|
||||
impl SP6R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -184,10 +180,8 @@ impl SP6R {
|
|||
#[doc = "Possible values of the field `TP5`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TP5R {
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
}
|
||||
impl TP5R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -231,10 +225,8 @@ impl TP5R {
|
|||
#[doc = "Possible values of the field `WP5`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WP5R {
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
}
|
||||
impl WP5R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -278,10 +270,8 @@ impl WP5R {
|
|||
#[doc = "Possible values of the field `SP5`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SP5R {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
}
|
||||
impl SP5R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -325,10 +315,8 @@ impl SP5R {
|
|||
#[doc = "Possible values of the field `TP4`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TP4R {
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
}
|
||||
impl TP4R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -372,10 +360,8 @@ impl TP4R {
|
|||
#[doc = "Possible values of the field `WP4`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WP4R {
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
}
|
||||
impl WP4R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -419,10 +405,8 @@ impl WP4R {
|
|||
#[doc = "Possible values of the field `SP4`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SP4R {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
}
|
||||
impl SP4R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -466,10 +450,8 @@ impl SP4R {
|
|||
#[doc = "Possible values of the field `TP3`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TP3R {
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
}
|
||||
impl TP3R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -513,10 +495,8 @@ impl TP3R {
|
|||
#[doc = "Possible values of the field `WP3`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WP3R {
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
}
|
||||
impl WP3R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -560,10 +540,8 @@ impl WP3R {
|
|||
#[doc = "Possible values of the field `SP3`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SP3R {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
}
|
||||
impl SP3R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -606,10 +584,8 @@ impl SP3R {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TP6`"]
|
||||
pub enum TP6W {
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
}
|
||||
impl TP6W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -664,10 +640,8 @@ impl<'a> _TP6W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WP6`"]
|
||||
pub enum WP6W {
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
}
|
||||
impl WP6W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -722,10 +696,8 @@ impl<'a> _WP6W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SP6`"]
|
||||
pub enum SP6W {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
}
|
||||
impl SP6W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -780,10 +752,8 @@ impl<'a> _SP6W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TP5`"]
|
||||
pub enum TP5W {
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
}
|
||||
impl TP5W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -838,10 +808,8 @@ impl<'a> _TP5W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WP5`"]
|
||||
pub enum WP5W {
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
}
|
||||
impl WP5W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -896,10 +864,8 @@ impl<'a> _WP5W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SP5`"]
|
||||
pub enum SP5W {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
}
|
||||
impl SP5W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -954,10 +920,8 @@ impl<'a> _SP5W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TP4`"]
|
||||
pub enum TP4W {
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
}
|
||||
impl TP4W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1012,10 +976,8 @@ impl<'a> _TP4W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WP4`"]
|
||||
pub enum WP4W {
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
}
|
||||
impl WP4W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1070,10 +1032,8 @@ impl<'a> _WP4W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SP4`"]
|
||||
pub enum SP4W {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
}
|
||||
impl SP4W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1128,10 +1088,8 @@ impl<'a> _SP4W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TP3`"]
|
||||
pub enum TP3W {
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
}
|
||||
impl TP3W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1186,10 +1144,8 @@ impl<'a> _TP3W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WP3`"]
|
||||
pub enum WP3W {
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
}
|
||||
impl WP3W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1244,10 +1200,8 @@ impl<'a> _WP3W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SP3`"]
|
||||
pub enum SP3W {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
}
|
||||
impl SP3W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
|
|||
|
|
@ -22,7 +22,9 @@ impl super::OPACRC {
|
|||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
|
|
@ -43,10 +45,8 @@ impl super::OPACRC {
|
|||
#[doc = "Possible values of the field `TP7`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TP7R {
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
}
|
||||
impl TP7R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -90,10 +90,8 @@ impl TP7R {
|
|||
#[doc = "Possible values of the field `WP7`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WP7R {
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
}
|
||||
impl WP7R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -137,10 +135,8 @@ impl WP7R {
|
|||
#[doc = "Possible values of the field `SP7`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SP7R {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
}
|
||||
impl SP7R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -184,10 +180,8 @@ impl SP7R {
|
|||
#[doc = "Possible values of the field `TP6`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TP6R {
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
}
|
||||
impl TP6R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -231,10 +225,8 @@ impl TP6R {
|
|||
#[doc = "Possible values of the field `WP6`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WP6R {
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
}
|
||||
impl WP6R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -278,10 +270,8 @@ impl WP6R {
|
|||
#[doc = "Possible values of the field `SP6`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SP6R {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
}
|
||||
impl SP6R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -325,10 +315,8 @@ impl SP6R {
|
|||
#[doc = "Possible values of the field `TP2`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TP2R {
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
}
|
||||
impl TP2R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -372,10 +360,8 @@ impl TP2R {
|
|||
#[doc = "Possible values of the field `WP2`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WP2R {
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
}
|
||||
impl WP2R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -419,10 +405,8 @@ impl WP2R {
|
|||
#[doc = "Possible values of the field `SP2`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SP2R {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
}
|
||||
impl SP2R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -466,10 +450,8 @@ impl SP2R {
|
|||
#[doc = "Possible values of the field `TP1`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TP1R {
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
}
|
||||
impl TP1R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -513,10 +495,8 @@ impl TP1R {
|
|||
#[doc = "Possible values of the field `WP1`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WP1R {
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
}
|
||||
impl WP1R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -560,10 +540,8 @@ impl WP1R {
|
|||
#[doc = "Possible values of the field `SP1`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SP1R {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
}
|
||||
impl SP1R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -606,10 +584,8 @@ impl SP1R {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TP7`"]
|
||||
pub enum TP7W {
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
}
|
||||
impl TP7W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -664,10 +640,8 @@ impl<'a> _TP7W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WP7`"]
|
||||
pub enum WP7W {
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
}
|
||||
impl WP7W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -722,10 +696,8 @@ impl<'a> _WP7W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SP7`"]
|
||||
pub enum SP7W {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
}
|
||||
impl SP7W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -780,10 +752,8 @@ impl<'a> _SP7W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TP6`"]
|
||||
pub enum TP6W {
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
}
|
||||
impl TP6W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -838,10 +808,8 @@ impl<'a> _TP6W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WP6`"]
|
||||
pub enum WP6W {
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
}
|
||||
impl WP6W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -896,10 +864,8 @@ impl<'a> _WP6W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SP6`"]
|
||||
pub enum SP6W {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
}
|
||||
impl SP6W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -954,10 +920,8 @@ impl<'a> _SP6W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TP2`"]
|
||||
pub enum TP2W {
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
}
|
||||
impl TP2W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1012,10 +976,8 @@ impl<'a> _TP2W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WP2`"]
|
||||
pub enum WP2W {
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
}
|
||||
impl WP2W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1070,10 +1032,8 @@ impl<'a> _WP2W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SP2`"]
|
||||
pub enum SP2W {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
}
|
||||
impl SP2W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1128,10 +1088,8 @@ impl<'a> _SP2W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TP1`"]
|
||||
pub enum TP1W {
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
}
|
||||
impl TP1W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1186,10 +1144,8 @@ impl<'a> _TP1W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WP1`"]
|
||||
pub enum WP1W {
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
}
|
||||
impl WP1W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1244,10 +1200,8 @@ impl<'a> _WP1W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SP1`"]
|
||||
pub enum SP1W {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
}
|
||||
impl SP1W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
|
|||
|
|
@ -22,7 +22,9 @@ impl super::OPACRD {
|
|||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
|
|
@ -43,10 +45,8 @@ impl super::OPACRD {
|
|||
#[doc = "Possible values of the field `TP5`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TP5R {
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
}
|
||||
impl TP5R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -90,10 +90,8 @@ impl TP5R {
|
|||
#[doc = "Possible values of the field `WP5`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WP5R {
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
}
|
||||
impl WP5R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -137,10 +135,8 @@ impl WP5R {
|
|||
#[doc = "Possible values of the field `SP5`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SP5R {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
}
|
||||
impl SP5R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -184,10 +180,8 @@ impl SP5R {
|
|||
#[doc = "Possible values of the field `TP3`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TP3R {
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
}
|
||||
impl TP3R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -231,10 +225,8 @@ impl TP3R {
|
|||
#[doc = "Possible values of the field `WP3`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WP3R {
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
}
|
||||
impl WP3R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -278,10 +270,8 @@ impl WP3R {
|
|||
#[doc = "Possible values of the field `SP3`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SP3R {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
}
|
||||
impl SP3R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -325,10 +315,8 @@ impl SP3R {
|
|||
#[doc = "Possible values of the field `TP2`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TP2R {
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
}
|
||||
impl TP2R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -372,10 +360,8 @@ impl TP2R {
|
|||
#[doc = "Possible values of the field `WP2`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WP2R {
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
}
|
||||
impl WP2R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -419,10 +405,8 @@ impl WP2R {
|
|||
#[doc = "Possible values of the field `SP2`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SP2R {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
}
|
||||
impl SP2R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -466,10 +450,8 @@ impl SP2R {
|
|||
#[doc = "Possible values of the field `TP1`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TP1R {
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
}
|
||||
impl TP1R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -513,10 +495,8 @@ impl TP1R {
|
|||
#[doc = "Possible values of the field `WP1`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WP1R {
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
}
|
||||
impl WP1R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -560,10 +540,8 @@ impl WP1R {
|
|||
#[doc = "Possible values of the field `SP1`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SP1R {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
}
|
||||
impl SP1R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -607,10 +585,8 @@ impl SP1R {
|
|||
#[doc = "Possible values of the field `TP0`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TP0R {
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
}
|
||||
impl TP0R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -654,10 +630,8 @@ impl TP0R {
|
|||
#[doc = "Possible values of the field `WP0`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WP0R {
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
}
|
||||
impl WP0R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -701,10 +675,8 @@ impl WP0R {
|
|||
#[doc = "Possible values of the field `SP0`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SP0R {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
}
|
||||
impl SP0R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -747,10 +719,8 @@ impl SP0R {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TP5`"]
|
||||
pub enum TP5W {
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
}
|
||||
impl TP5W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -805,10 +775,8 @@ impl<'a> _TP5W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WP5`"]
|
||||
pub enum WP5W {
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
}
|
||||
impl WP5W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -863,10 +831,8 @@ impl<'a> _WP5W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SP5`"]
|
||||
pub enum SP5W {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
}
|
||||
impl SP5W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -921,10 +887,8 @@ impl<'a> _SP5W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TP3`"]
|
||||
pub enum TP3W {
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
}
|
||||
impl TP3W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -979,10 +943,8 @@ impl<'a> _TP3W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WP3`"]
|
||||
pub enum WP3W {
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
}
|
||||
impl WP3W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1037,10 +999,8 @@ impl<'a> _WP3W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SP3`"]
|
||||
pub enum SP3W {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
}
|
||||
impl SP3W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1095,10 +1055,8 @@ impl<'a> _SP3W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TP2`"]
|
||||
pub enum TP2W {
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
}
|
||||
impl TP2W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1153,10 +1111,8 @@ impl<'a> _TP2W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WP2`"]
|
||||
pub enum WP2W {
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
}
|
||||
impl WP2W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1211,10 +1167,8 @@ impl<'a> _WP2W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SP2`"]
|
||||
pub enum SP2W {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
}
|
||||
impl SP2W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1269,10 +1223,8 @@ impl<'a> _SP2W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TP1`"]
|
||||
pub enum TP1W {
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
}
|
||||
impl TP1W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1327,10 +1279,8 @@ impl<'a> _TP1W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WP1`"]
|
||||
pub enum WP1W {
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
}
|
||||
impl WP1W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1385,10 +1335,8 @@ impl<'a> _WP1W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SP1`"]
|
||||
pub enum SP1W {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
}
|
||||
impl SP1W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1443,10 +1391,8 @@ impl<'a> _SP1W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TP0`"]
|
||||
pub enum TP0W {
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
}
|
||||
impl TP0W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1501,10 +1447,8 @@ impl<'a> _TP0W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WP0`"]
|
||||
pub enum WP0W {
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
}
|
||||
impl WP0W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1559,10 +1503,8 @@ impl<'a> _WP0W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SP0`"]
|
||||
pub enum SP0W {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
}
|
||||
impl SP0W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
|
|||
|
|
@ -22,7 +22,9 @@ impl super::OPACRE {
|
|||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
|
|
@ -43,10 +45,8 @@ impl super::OPACRE {
|
|||
#[doc = "Possible values of the field `TP6`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TP6R {
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
}
|
||||
impl TP6R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -90,10 +90,8 @@ impl TP6R {
|
|||
#[doc = "Possible values of the field `WP6`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WP6R {
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
}
|
||||
impl WP6R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -137,10 +135,8 @@ impl WP6R {
|
|||
#[doc = "Possible values of the field `SP6`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SP6R {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
}
|
||||
impl SP6R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -184,10 +180,8 @@ impl SP6R {
|
|||
#[doc = "Possible values of the field `TP0`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TP0R {
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
}
|
||||
impl TP0R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -231,10 +225,8 @@ impl TP0R {
|
|||
#[doc = "Possible values of the field `WP0`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WP0R {
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
}
|
||||
impl WP0R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -278,10 +270,8 @@ impl WP0R {
|
|||
#[doc = "Possible values of the field `SP0`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SP0R {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
}
|
||||
impl SP0R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -324,10 +314,8 @@ impl SP0R {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TP6`"]
|
||||
pub enum TP6W {
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
}
|
||||
impl TP6W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -382,10 +370,8 @@ impl<'a> _TP6W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WP6`"]
|
||||
pub enum WP6W {
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
}
|
||||
impl WP6W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -440,10 +426,8 @@ impl<'a> _WP6W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SP6`"]
|
||||
pub enum SP6W {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
}
|
||||
impl SP6W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -498,10 +482,8 @@ impl<'a> _SP6W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TP0`"]
|
||||
pub enum TP0W {
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
}
|
||||
impl TP0W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -556,10 +538,8 @@ impl<'a> _TP0W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WP0`"]
|
||||
pub enum WP0W {
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
}
|
||||
impl WP0W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -614,10 +594,8 @@ impl<'a> _WP0W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SP0`"]
|
||||
pub enum SP0W {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
}
|
||||
impl SP0W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
|
|||
|
|
@ -22,7 +22,9 @@ impl super::OPACRF {
|
|||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
|
|
@ -43,10 +45,8 @@ impl super::OPACRF {
|
|||
#[doc = "Possible values of the field `TP5`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TP5R {
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
}
|
||||
impl TP5R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -90,10 +90,8 @@ impl TP5R {
|
|||
#[doc = "Possible values of the field `WP5`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WP5R {
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
}
|
||||
impl WP5R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -137,10 +135,8 @@ impl WP5R {
|
|||
#[doc = "Possible values of the field `SP5`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SP5R {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
}
|
||||
impl SP5R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -184,10 +180,8 @@ impl SP5R {
|
|||
#[doc = "Possible values of the field `TP4`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TP4R {
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
}
|
||||
impl TP4R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -231,10 +225,8 @@ impl TP4R {
|
|||
#[doc = "Possible values of the field `WP4`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WP4R {
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
}
|
||||
impl WP4R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -278,10 +270,8 @@ impl WP4R {
|
|||
#[doc = "Possible values of the field `SP4`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SP4R {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
}
|
||||
impl SP4R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -325,10 +315,8 @@ impl SP4R {
|
|||
#[doc = "Possible values of the field `TP3`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TP3R {
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
}
|
||||
impl TP3R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -372,10 +360,8 @@ impl TP3R {
|
|||
#[doc = "Possible values of the field `WP3`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WP3R {
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
}
|
||||
impl WP3R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -419,10 +405,8 @@ impl WP3R {
|
|||
#[doc = "Possible values of the field `SP3`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SP3R {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
}
|
||||
impl SP3R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -466,10 +450,8 @@ impl SP3R {
|
|||
#[doc = "Possible values of the field `TP2`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TP2R {
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
}
|
||||
impl TP2R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -513,10 +495,8 @@ impl TP2R {
|
|||
#[doc = "Possible values of the field `WP2`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WP2R {
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
}
|
||||
impl WP2R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -560,10 +540,8 @@ impl WP2R {
|
|||
#[doc = "Possible values of the field `SP2`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SP2R {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
}
|
||||
impl SP2R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -607,10 +585,8 @@ impl SP2R {
|
|||
#[doc = "Possible values of the field `TP1`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TP1R {
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
}
|
||||
impl TP1R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -654,10 +630,8 @@ impl TP1R {
|
|||
#[doc = "Possible values of the field `WP1`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WP1R {
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
}
|
||||
impl WP1R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -701,10 +675,8 @@ impl WP1R {
|
|||
#[doc = "Possible values of the field `SP1`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SP1R {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
}
|
||||
impl SP1R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -748,10 +720,8 @@ impl SP1R {
|
|||
#[doc = "Possible values of the field `TP0`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TP0R {
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
}
|
||||
impl TP0R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -795,10 +765,8 @@ impl TP0R {
|
|||
#[doc = "Possible values of the field `WP0`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WP0R {
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
}
|
||||
impl WP0R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -842,10 +810,8 @@ impl WP0R {
|
|||
#[doc = "Possible values of the field `SP0`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SP0R {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
}
|
||||
impl SP0R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -888,10 +854,8 @@ impl SP0R {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TP5`"]
|
||||
pub enum TP5W {
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
}
|
||||
impl TP5W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -946,10 +910,8 @@ impl<'a> _TP5W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WP5`"]
|
||||
pub enum WP5W {
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
}
|
||||
impl WP5W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1004,10 +966,8 @@ impl<'a> _WP5W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SP5`"]
|
||||
pub enum SP5W {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
}
|
||||
impl SP5W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1062,10 +1022,8 @@ impl<'a> _SP5W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TP4`"]
|
||||
pub enum TP4W {
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
}
|
||||
impl TP4W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1120,10 +1078,8 @@ impl<'a> _TP4W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WP4`"]
|
||||
pub enum WP4W {
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
}
|
||||
impl WP4W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1178,10 +1134,8 @@ impl<'a> _WP4W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SP4`"]
|
||||
pub enum SP4W {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
}
|
||||
impl SP4W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1236,10 +1190,8 @@ impl<'a> _SP4W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TP3`"]
|
||||
pub enum TP3W {
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
}
|
||||
impl TP3W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1294,10 +1246,8 @@ impl<'a> _TP3W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WP3`"]
|
||||
pub enum WP3W {
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
}
|
||||
impl WP3W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1352,10 +1302,8 @@ impl<'a> _WP3W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SP3`"]
|
||||
pub enum SP3W {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
}
|
||||
impl SP3W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1410,10 +1358,8 @@ impl<'a> _SP3W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TP2`"]
|
||||
pub enum TP2W {
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
}
|
||||
impl TP2W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1468,10 +1414,8 @@ impl<'a> _TP2W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WP2`"]
|
||||
pub enum WP2W {
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
}
|
||||
impl WP2W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1526,10 +1470,8 @@ impl<'a> _WP2W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SP2`"]
|
||||
pub enum SP2W {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
}
|
||||
impl SP2W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1584,10 +1526,8 @@ impl<'a> _SP2W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TP1`"]
|
||||
pub enum TP1W {
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
}
|
||||
impl TP1W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1642,10 +1582,8 @@ impl<'a> _TP1W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WP1`"]
|
||||
pub enum WP1W {
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
}
|
||||
impl WP1W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1700,10 +1638,8 @@ impl<'a> _WP1W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SP1`"]
|
||||
pub enum SP1W {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
}
|
||||
impl SP1W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1758,10 +1694,8 @@ impl<'a> _SP1W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TP0`"]
|
||||
pub enum TP0W {
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
}
|
||||
impl TP0W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1816,10 +1750,8 @@ impl<'a> _TP0W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WP0`"]
|
||||
pub enum WP0W {
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
}
|
||||
impl WP0W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1874,10 +1806,8 @@ impl<'a> _WP0W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SP0`"]
|
||||
pub enum SP0W {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
}
|
||||
impl SP0W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
|
|||
|
|
@ -22,7 +22,9 @@ impl super::OPACRG {
|
|||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
|
|
@ -43,10 +45,8 @@ impl super::OPACRG {
|
|||
#[doc = "Possible values of the field `TP2`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TP2R {
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
}
|
||||
impl TP2R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -90,10 +90,8 @@ impl TP2R {
|
|||
#[doc = "Possible values of the field `WP2`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WP2R {
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
}
|
||||
impl WP2R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -137,10 +135,8 @@ impl WP2R {
|
|||
#[doc = "Possible values of the field `SP2`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SP2R {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
}
|
||||
impl SP2R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -183,10 +179,8 @@ impl SP2R {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TP2`"]
|
||||
pub enum TP2W {
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
}
|
||||
impl TP2W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -241,10 +235,8 @@ impl<'a> _TP2W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WP2`"]
|
||||
pub enum WP2W {
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
}
|
||||
impl WP2W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -299,10 +291,8 @@ impl<'a> _WP2W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SP2`"]
|
||||
pub enum SP2W {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
}
|
||||
impl SP2W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
|
|||
|
|
@ -22,7 +22,9 @@ impl super::OPACRH {
|
|||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
|
|
@ -43,10 +45,8 @@ impl super::OPACRH {
|
|||
#[doc = "Possible values of the field `TP2`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TP2R {
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
}
|
||||
impl TP2R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -90,10 +90,8 @@ impl TP2R {
|
|||
#[doc = "Possible values of the field `WP2`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WP2R {
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
}
|
||||
impl WP2R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -137,10 +135,8 @@ impl WP2R {
|
|||
#[doc = "Possible values of the field `SP2`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SP2R {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
}
|
||||
impl SP2R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -183,10 +179,8 @@ impl SP2R {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TP2`"]
|
||||
pub enum TP2W {
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
}
|
||||
impl TP2W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -241,10 +235,8 @@ impl<'a> _TP2W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WP2`"]
|
||||
pub enum WP2W {
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
}
|
||||
impl WP2W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -299,10 +291,8 @@ impl<'a> _WP2W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SP2`"]
|
||||
pub enum SP2W {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
}
|
||||
impl SP2W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
|
|||
|
|
@ -22,7 +22,9 @@ impl super::OPACRI {
|
|||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
|
|
@ -43,10 +45,8 @@ impl super::OPACRI {
|
|||
#[doc = "Possible values of the field `TP6`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TP6R {
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
}
|
||||
impl TP6R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -90,10 +90,8 @@ impl TP6R {
|
|||
#[doc = "Possible values of the field `WP6`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WP6R {
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
}
|
||||
impl WP6R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -137,10 +135,8 @@ impl WP6R {
|
|||
#[doc = "Possible values of the field `SP6`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SP6R {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
}
|
||||
impl SP6R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -184,10 +180,8 @@ impl SP6R {
|
|||
#[doc = "Possible values of the field `TP5`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TP5R {
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
}
|
||||
impl TP5R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -231,10 +225,8 @@ impl TP5R {
|
|||
#[doc = "Possible values of the field `WP5`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WP5R {
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
}
|
||||
impl WP5R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -278,10 +270,8 @@ impl WP5R {
|
|||
#[doc = "Possible values of the field `SP5`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SP5R {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
}
|
||||
impl SP5R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -325,10 +315,8 @@ impl SP5R {
|
|||
#[doc = "Possible values of the field `TP4`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TP4R {
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
}
|
||||
impl TP4R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -372,10 +360,8 @@ impl TP4R {
|
|||
#[doc = "Possible values of the field `WP4`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WP4R {
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
}
|
||||
impl WP4R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -419,10 +405,8 @@ impl WP4R {
|
|||
#[doc = "Possible values of the field `SP4`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SP4R {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
}
|
||||
impl SP4R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -466,10 +450,8 @@ impl SP4R {
|
|||
#[doc = "Possible values of the field `TP3`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TP3R {
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
}
|
||||
impl TP3R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -513,10 +495,8 @@ impl TP3R {
|
|||
#[doc = "Possible values of the field `WP3`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WP3R {
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
}
|
||||
impl WP3R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -560,10 +540,8 @@ impl WP3R {
|
|||
#[doc = "Possible values of the field `SP3`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SP3R {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
}
|
||||
impl SP3R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -607,10 +585,8 @@ impl SP3R {
|
|||
#[doc = "Possible values of the field `TP1`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TP1R {
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
}
|
||||
impl TP1R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -654,10 +630,8 @@ impl TP1R {
|
|||
#[doc = "Possible values of the field `WP1`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WP1R {
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
}
|
||||
impl WP1R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -701,10 +675,8 @@ impl WP1R {
|
|||
#[doc = "Possible values of the field `SP1`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SP1R {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
}
|
||||
impl SP1R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -747,10 +719,8 @@ impl SP1R {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TP6`"]
|
||||
pub enum TP6W {
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
}
|
||||
impl TP6W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -805,10 +775,8 @@ impl<'a> _TP6W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WP6`"]
|
||||
pub enum WP6W {
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
}
|
||||
impl WP6W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -863,10 +831,8 @@ impl<'a> _WP6W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SP6`"]
|
||||
pub enum SP6W {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
}
|
||||
impl SP6W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -921,10 +887,8 @@ impl<'a> _SP6W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TP5`"]
|
||||
pub enum TP5W {
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
}
|
||||
impl TP5W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -979,10 +943,8 @@ impl<'a> _TP5W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WP5`"]
|
||||
pub enum WP5W {
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
}
|
||||
impl WP5W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1037,10 +999,8 @@ impl<'a> _WP5W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SP5`"]
|
||||
pub enum SP5W {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
}
|
||||
impl SP5W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1095,10 +1055,8 @@ impl<'a> _SP5W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TP4`"]
|
||||
pub enum TP4W {
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
}
|
||||
impl TP4W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1153,10 +1111,8 @@ impl<'a> _TP4W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WP4`"]
|
||||
pub enum WP4W {
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
}
|
||||
impl WP4W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1211,10 +1167,8 @@ impl<'a> _WP4W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SP4`"]
|
||||
pub enum SP4W {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
}
|
||||
impl SP4W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1269,10 +1223,8 @@ impl<'a> _SP4W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TP3`"]
|
||||
pub enum TP3W {
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
}
|
||||
impl TP3W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1327,10 +1279,8 @@ impl<'a> _TP3W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WP3`"]
|
||||
pub enum WP3W {
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
}
|
||||
impl WP3W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1385,10 +1335,8 @@ impl<'a> _WP3W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SP3`"]
|
||||
pub enum SP3W {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
}
|
||||
impl SP3W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1443,10 +1391,8 @@ impl<'a> _SP3W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TP1`"]
|
||||
pub enum TP1W {
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
}
|
||||
impl TP1W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1501,10 +1447,8 @@ impl<'a> _TP1W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WP1`"]
|
||||
pub enum WP1W {
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
}
|
||||
impl WP1W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1559,10 +1503,8 @@ impl<'a> _WP1W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SP1`"]
|
||||
pub enum SP1W {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
}
|
||||
impl SP1W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
|
|||
|
|
@ -22,7 +22,9 @@ impl super::OPACRJ {
|
|||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
|
|
@ -43,10 +45,8 @@ impl super::OPACRJ {
|
|||
#[doc = "Possible values of the field `TP4`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TP4R {
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
}
|
||||
impl TP4R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -90,10 +90,8 @@ impl TP4R {
|
|||
#[doc = "Possible values of the field `WP4`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WP4R {
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
}
|
||||
impl WP4R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -137,10 +135,8 @@ impl WP4R {
|
|||
#[doc = "Possible values of the field `SP4`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SP4R {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
}
|
||||
impl SP4R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -184,10 +180,8 @@ impl SP4R {
|
|||
#[doc = "Possible values of the field `TP3`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TP3R {
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
}
|
||||
impl TP3R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -231,10 +225,8 @@ impl TP3R {
|
|||
#[doc = "Possible values of the field `WP3`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WP3R {
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
}
|
||||
impl WP3R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -278,10 +270,8 @@ impl WP3R {
|
|||
#[doc = "Possible values of the field `SP3`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SP3R {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
}
|
||||
impl SP3R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -325,10 +315,8 @@ impl SP3R {
|
|||
#[doc = "Possible values of the field `TP2`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TP2R {
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
}
|
||||
impl TP2R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -372,10 +360,8 @@ impl TP2R {
|
|||
#[doc = "Possible values of the field `WP2`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WP2R {
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
}
|
||||
impl WP2R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -419,10 +405,8 @@ impl WP2R {
|
|||
#[doc = "Possible values of the field `SP2`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SP2R {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
}
|
||||
impl SP2R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -465,10 +449,8 @@ impl SP2R {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TP4`"]
|
||||
pub enum TP4W {
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
}
|
||||
impl TP4W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -523,10 +505,8 @@ impl<'a> _TP4W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WP4`"]
|
||||
pub enum WP4W {
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
}
|
||||
impl WP4W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -581,10 +561,8 @@ impl<'a> _WP4W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SP4`"]
|
||||
pub enum SP4W {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
}
|
||||
impl SP4W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -639,10 +617,8 @@ impl<'a> _SP4W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TP3`"]
|
||||
pub enum TP3W {
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
}
|
||||
impl TP3W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -697,10 +673,8 @@ impl<'a> _TP3W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WP3`"]
|
||||
pub enum WP3W {
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
}
|
||||
impl WP3W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -755,10 +729,8 @@ impl<'a> _WP3W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SP3`"]
|
||||
pub enum SP3W {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
}
|
||||
impl SP3W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -813,10 +785,8 @@ impl<'a> _SP3W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TP2`"]
|
||||
pub enum TP2W {
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
}
|
||||
impl TP2W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -871,10 +841,8 @@ impl<'a> _TP2W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WP2`"]
|
||||
pub enum WP2W {
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
}
|
||||
impl WP2W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -929,10 +897,8 @@ impl<'a> _WP2W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SP2`"]
|
||||
pub enum SP2W {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
}
|
||||
impl SP2W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
|
|||
|
|
@ -22,7 +22,9 @@ impl super::OPACRK {
|
|||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
|
|
@ -43,10 +45,8 @@ impl super::OPACRK {
|
|||
#[doc = "Possible values of the field `TP3`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TP3R {
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
}
|
||||
impl TP3R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -90,10 +90,8 @@ impl TP3R {
|
|||
#[doc = "Possible values of the field `WP3`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WP3R {
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
}
|
||||
impl WP3R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -137,10 +135,8 @@ impl WP3R {
|
|||
#[doc = "Possible values of the field `SP3`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SP3R {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
}
|
||||
impl SP3R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -183,10 +179,8 @@ impl SP3R {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TP3`"]
|
||||
pub enum TP3W {
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
}
|
||||
impl TP3W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -241,10 +235,8 @@ impl<'a> _TP3W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WP3`"]
|
||||
pub enum WP3W {
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
}
|
||||
impl WP3W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -299,10 +291,8 @@ impl<'a> _WP3W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SP3`"]
|
||||
pub enum SP3W {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
}
|
||||
impl SP3W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
|
|||
|
|
@ -22,7 +22,9 @@ impl super::OPACRL {
|
|||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
|
|
@ -43,10 +45,8 @@ impl super::OPACRL {
|
|||
#[doc = "Possible values of the field `TP7`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TP7R {
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
}
|
||||
impl TP7R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -90,10 +90,8 @@ impl TP7R {
|
|||
#[doc = "Possible values of the field `WP7`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WP7R {
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
}
|
||||
impl WP7R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -137,10 +135,8 @@ impl WP7R {
|
|||
#[doc = "Possible values of the field `SP7`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SP7R {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
}
|
||||
impl SP7R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -184,10 +180,8 @@ impl SP7R {
|
|||
#[doc = "Possible values of the field `TP6`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TP6R {
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
}
|
||||
impl TP6R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -231,10 +225,8 @@ impl TP6R {
|
|||
#[doc = "Possible values of the field `WP6`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WP6R {
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
}
|
||||
impl WP6R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -278,10 +270,8 @@ impl WP6R {
|
|||
#[doc = "Possible values of the field `SP6`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SP6R {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
}
|
||||
impl SP6R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -325,10 +315,8 @@ impl SP6R {
|
|||
#[doc = "Possible values of the field `TP5`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TP5R {
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
}
|
||||
impl TP5R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -372,10 +360,8 @@ impl TP5R {
|
|||
#[doc = "Possible values of the field `WP5`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WP5R {
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
}
|
||||
impl WP5R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -419,10 +405,8 @@ impl WP5R {
|
|||
#[doc = "Possible values of the field `SP5`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SP5R {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
}
|
||||
impl SP5R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -465,10 +449,8 @@ impl SP5R {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TP7`"]
|
||||
pub enum TP7W {
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
}
|
||||
impl TP7W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -523,10 +505,8 @@ impl<'a> _TP7W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WP7`"]
|
||||
pub enum WP7W {
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
}
|
||||
impl WP7W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -581,10 +561,8 @@ impl<'a> _WP7W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SP7`"]
|
||||
pub enum SP7W {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
}
|
||||
impl SP7W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -639,10 +617,8 @@ impl<'a> _SP7W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TP6`"]
|
||||
pub enum TP6W {
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
}
|
||||
impl TP6W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -697,10 +673,8 @@ impl<'a> _TP6W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WP6`"]
|
||||
pub enum WP6W {
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
}
|
||||
impl WP6W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -755,10 +729,8 @@ impl<'a> _WP6W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SP6`"]
|
||||
pub enum SP6W {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
}
|
||||
impl SP6W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -813,10 +785,8 @@ impl<'a> _SP6W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TP5`"]
|
||||
pub enum TP5W {
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
}
|
||||
impl TP5W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -871,10 +841,8 @@ impl<'a> _TP5W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WP5`"]
|
||||
pub enum WP5W {
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
}
|
||||
impl WP5W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -929,10 +897,8 @@ impl<'a> _WP5W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SP5`"]
|
||||
pub enum SP5W {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
}
|
||||
impl SP5W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
|
|||
|
|
@ -22,7 +22,9 @@ impl super::PACRA {
|
|||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
|
|
@ -43,10 +45,8 @@ impl super::PACRA {
|
|||
#[doc = "Possible values of the field `TP1`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TP1R {
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
}
|
||||
impl TP1R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -90,10 +90,8 @@ impl TP1R {
|
|||
#[doc = "Possible values of the field `WP1`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WP1R {
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
}
|
||||
impl WP1R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -137,10 +135,8 @@ impl WP1R {
|
|||
#[doc = "Possible values of the field `SP1`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SP1R {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
}
|
||||
impl SP1R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -184,10 +180,8 @@ impl SP1R {
|
|||
#[doc = "Possible values of the field `TP0`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TP0R {
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
}
|
||||
impl TP0R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -231,10 +225,8 @@ impl TP0R {
|
|||
#[doc = "Possible values of the field `WP0`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WP0R {
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
}
|
||||
impl WP0R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -278,10 +270,8 @@ impl WP0R {
|
|||
#[doc = "Possible values of the field `SP0`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SP0R {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
}
|
||||
impl SP0R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -324,10 +314,8 @@ impl SP0R {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TP1`"]
|
||||
pub enum TP1W {
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
}
|
||||
impl TP1W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -382,10 +370,8 @@ impl<'a> _TP1W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WP1`"]
|
||||
pub enum WP1W {
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
}
|
||||
impl WP1W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -440,10 +426,8 @@ impl<'a> _WP1W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SP1`"]
|
||||
pub enum SP1W {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
}
|
||||
impl SP1W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -498,10 +482,8 @@ impl<'a> _SP1W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TP0`"]
|
||||
pub enum TP0W {
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
}
|
||||
impl TP0W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -556,10 +538,8 @@ impl<'a> _TP0W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WP0`"]
|
||||
pub enum WP0W {
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
}
|
||||
impl WP0W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -614,10 +594,8 @@ impl<'a> _WP0W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SP0`"]
|
||||
pub enum SP0W {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
}
|
||||
impl SP0W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
|
|||
|
|
@ -22,7 +22,9 @@ impl super::PACRB {
|
|||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
|
|
@ -43,10 +45,8 @@ impl super::PACRB {
|
|||
#[doc = "Possible values of the field `TP5`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TP5R {
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
}
|
||||
impl TP5R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -90,10 +90,8 @@ impl TP5R {
|
|||
#[doc = "Possible values of the field `WP5`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WP5R {
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
}
|
||||
impl WP5R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -137,10 +135,8 @@ impl WP5R {
|
|||
#[doc = "Possible values of the field `SP5`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SP5R {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
}
|
||||
impl SP5R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -184,10 +180,8 @@ impl SP5R {
|
|||
#[doc = "Possible values of the field `TP1`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TP1R {
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
}
|
||||
impl TP1R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -231,10 +225,8 @@ impl TP1R {
|
|||
#[doc = "Possible values of the field `WP1`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WP1R {
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
}
|
||||
impl WP1R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -278,10 +270,8 @@ impl WP1R {
|
|||
#[doc = "Possible values of the field `SP1`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SP1R {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
}
|
||||
impl SP1R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -325,10 +315,8 @@ impl SP1R {
|
|||
#[doc = "Possible values of the field `TP0`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TP0R {
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
}
|
||||
impl TP0R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -372,10 +360,8 @@ impl TP0R {
|
|||
#[doc = "Possible values of the field `WP0`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WP0R {
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
}
|
||||
impl WP0R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -419,10 +405,8 @@ impl WP0R {
|
|||
#[doc = "Possible values of the field `SP0`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SP0R {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
}
|
||||
impl SP0R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -465,10 +449,8 @@ impl SP0R {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TP5`"]
|
||||
pub enum TP5W {
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
}
|
||||
impl TP5W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -523,10 +505,8 @@ impl<'a> _TP5W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WP5`"]
|
||||
pub enum WP5W {
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
}
|
||||
impl WP5W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -581,10 +561,8 @@ impl<'a> _WP5W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SP5`"]
|
||||
pub enum SP5W {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
}
|
||||
impl SP5W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -639,10 +617,8 @@ impl<'a> _SP5W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TP1`"]
|
||||
pub enum TP1W {
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
}
|
||||
impl TP1W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -697,10 +673,8 @@ impl<'a> _TP1W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WP1`"]
|
||||
pub enum WP1W {
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
}
|
||||
impl WP1W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -755,10 +729,8 @@ impl<'a> _WP1W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SP1`"]
|
||||
pub enum SP1W {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
}
|
||||
impl SP1W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -813,10 +785,8 @@ impl<'a> _SP1W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TP0`"]
|
||||
pub enum TP0W {
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
}
|
||||
impl TP0W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -871,10 +841,8 @@ impl<'a> _TP0W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WP0`"]
|
||||
pub enum WP0W {
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
}
|
||||
impl WP0W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -929,10 +897,8 @@ impl<'a> _WP0W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SP0`"]
|
||||
pub enum SP0W {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
}
|
||||
impl SP0W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
|
|||
|
|
@ -6,7 +6,9 @@ impl super::PACRC {
|
|||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
|
|
|
|||
|
|
@ -22,7 +22,9 @@ impl super::PACRD {
|
|||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
|
|
@ -43,10 +45,8 @@ impl super::PACRD {
|
|||
#[doc = "Possible values of the field `TP1`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TP1R {
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
}
|
||||
impl TP1R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -90,10 +90,8 @@ impl TP1R {
|
|||
#[doc = "Possible values of the field `WP1`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WP1R {
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
}
|
||||
impl WP1R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -137,10 +135,8 @@ impl WP1R {
|
|||
#[doc = "Possible values of the field `SP1`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SP1R {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
}
|
||||
impl SP1R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -184,10 +180,8 @@ impl SP1R {
|
|||
#[doc = "Possible values of the field `TP0`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TP0R {
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
}
|
||||
impl TP0R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -231,10 +225,8 @@ impl TP0R {
|
|||
#[doc = "Possible values of the field `WP0`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WP0R {
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
}
|
||||
impl WP0R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -278,10 +270,8 @@ impl WP0R {
|
|||
#[doc = "Possible values of the field `SP0`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SP0R {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
}
|
||||
impl SP0R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -324,10 +314,8 @@ impl SP0R {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TP1`"]
|
||||
pub enum TP1W {
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
}
|
||||
impl TP1W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -382,10 +370,8 @@ impl<'a> _TP1W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WP1`"]
|
||||
pub enum WP1W {
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
}
|
||||
impl WP1W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -440,10 +426,8 @@ impl<'a> _WP1W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SP1`"]
|
||||
pub enum SP1W {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
}
|
||||
impl SP1W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -498,10 +482,8 @@ impl<'a> _SP1W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TP0`"]
|
||||
pub enum TP0W {
|
||||
#[doc = "Accesses from an untrusted master are allowed."]
|
||||
_0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."]
|
||||
_1,
|
||||
#[doc = "Accesses from an untrusted master are allowed."] _0,
|
||||
#[doc = "Accesses from an untrusted master are not allowed."] _1,
|
||||
}
|
||||
impl TP0W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -556,10 +538,8 @@ impl<'a> _TP0W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WP0`"]
|
||||
pub enum WP0W {
|
||||
#[doc = "This peripheral allows write accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral is write protected."]
|
||||
_1,
|
||||
#[doc = "This peripheral allows write accesses."] _0,
|
||||
#[doc = "This peripheral is write protected."] _1,
|
||||
}
|
||||
impl WP0W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -614,10 +594,8 @@ impl<'a> _WP0W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SP0`"]
|
||||
pub enum SP0W {
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."]
|
||||
_0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."]
|
||||
_1,
|
||||
#[doc = "This peripheral does not require supervisor privilege level for accesses."] _0,
|
||||
#[doc = "This peripheral requires supervisor privilege level for accesses."] _1,
|
||||
}
|
||||
impl SP0W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
|
|||
|
|
@ -22,7 +22,9 @@ impl super::CBT {
|
|||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
|
|
@ -98,10 +100,8 @@ impl EPRESDIVR {
|
|||
#[doc = "Possible values of the field `BTF`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum BTFR {
|
||||
#[doc = "Extended bit time definitions disabled."]
|
||||
_0,
|
||||
#[doc = "Extended bit time definitions enabled."]
|
||||
_1,
|
||||
#[doc = "Extended bit time definitions disabled."] _0,
|
||||
#[doc = "Extended bit time definitions enabled."] _1,
|
||||
}
|
||||
impl BTFR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -219,10 +219,8 @@ impl<'a> _EPRESDIVW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `BTF`"]
|
||||
pub enum BTFW {
|
||||
#[doc = "Extended bit time definitions disabled."]
|
||||
_0,
|
||||
#[doc = "Extended bit time definitions enabled."]
|
||||
_1,
|
||||
#[doc = "Extended bit time definitions disabled."] _0,
|
||||
#[doc = "Extended bit time definitions enabled."] _1,
|
||||
}
|
||||
impl BTFW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
|
|||
|
|
@ -6,7 +6,9 @@ impl super::CRCR {
|
|||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
}
|
||||
}
|
||||
#[doc = r" Value of the field"]
|
||||
|
|
|
|||
|
|
@ -22,7 +22,9 @@ impl super::CTRL1 {
|
|||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
|
|
@ -54,10 +56,8 @@ impl PROPSEGR {
|
|||
#[doc = "Possible values of the field `LOM`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum LOMR {
|
||||
#[doc = "Listen-Only mode is deactivated."]
|
||||
_0,
|
||||
#[doc = "FlexCAN module operates in Listen-Only mode."]
|
||||
_1,
|
||||
#[doc = "Listen-Only mode is deactivated."] _0,
|
||||
#[doc = "FlexCAN module operates in Listen-Only mode."] _1,
|
||||
}
|
||||
impl LOMR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -101,10 +101,8 @@ impl LOMR {
|
|||
#[doc = "Possible values of the field `LBUF`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum LBUFR {
|
||||
#[doc = "Buffer with highest priority is transmitted first."]
|
||||
_0,
|
||||
#[doc = "Lowest number buffer is transmitted first."]
|
||||
_1,
|
||||
#[doc = "Buffer with highest priority is transmitted first."] _0,
|
||||
#[doc = "Lowest number buffer is transmitted first."] _1,
|
||||
}
|
||||
impl LBUFR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -148,10 +146,8 @@ impl LBUFR {
|
|||
#[doc = "Possible values of the field `TSYN`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TSYNR {
|
||||
#[doc = "Timer Sync feature disabled"]
|
||||
_0,
|
||||
#[doc = "Timer Sync feature enabled"]
|
||||
_1,
|
||||
#[doc = "Timer Sync feature disabled"] _0,
|
||||
#[doc = "Timer Sync feature enabled"] _1,
|
||||
}
|
||||
impl TSYNR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -195,10 +191,8 @@ impl TSYNR {
|
|||
#[doc = "Possible values of the field `BOFFREC`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum BOFFRECR {
|
||||
#[doc = "Automatic recovering from Bus Off state enabled."]
|
||||
_0,
|
||||
#[doc = "Automatic recovering from Bus Off state disabled."]
|
||||
_1,
|
||||
#[doc = "Automatic recovering from Bus Off state enabled."] _0,
|
||||
#[doc = "Automatic recovering from Bus Off state disabled."] _1,
|
||||
}
|
||||
impl BOFFRECR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -242,8 +236,7 @@ impl BOFFRECR {
|
|||
#[doc = "Possible values of the field `SMP`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SMPR {
|
||||
#[doc = "Just one sample is used to determine the bit value."]
|
||||
_0,
|
||||
#[doc = "Just one sample is used to determine the bit value."] _0,
|
||||
#[doc = "Three samples are used to determine the value of the received bit: the regular one (sample point) and 2 preceding samples; a majority rule is used."]
|
||||
_1,
|
||||
}
|
||||
|
|
@ -289,10 +282,8 @@ impl SMPR {
|
|||
#[doc = "Possible values of the field `RWRNMSK`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum RWRNMSKR {
|
||||
#[doc = "Rx Warning Interrupt disabled."]
|
||||
_0,
|
||||
#[doc = "Rx Warning Interrupt enabled."]
|
||||
_1,
|
||||
#[doc = "Rx Warning Interrupt disabled."] _0,
|
||||
#[doc = "Rx Warning Interrupt enabled."] _1,
|
||||
}
|
||||
impl RWRNMSKR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -336,10 +327,8 @@ impl RWRNMSKR {
|
|||
#[doc = "Possible values of the field `TWRNMSK`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TWRNMSKR {
|
||||
#[doc = "Tx Warning Interrupt disabled."]
|
||||
_0,
|
||||
#[doc = "Tx Warning Interrupt enabled."]
|
||||
_1,
|
||||
#[doc = "Tx Warning Interrupt disabled."] _0,
|
||||
#[doc = "Tx Warning Interrupt enabled."] _1,
|
||||
}
|
||||
impl TWRNMSKR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -383,10 +372,8 @@ impl TWRNMSKR {
|
|||
#[doc = "Possible values of the field `LPB`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum LPBR {
|
||||
#[doc = "Loop Back disabled."]
|
||||
_0,
|
||||
#[doc = "Loop Back enabled."]
|
||||
_1,
|
||||
#[doc = "Loop Back disabled."] _0,
|
||||
#[doc = "Loop Back enabled."] _1,
|
||||
}
|
||||
impl LPBR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -432,8 +419,7 @@ impl LPBR {
|
|||
pub enum CLKSRCR {
|
||||
#[doc = "The CAN engine clock source is the oscillator clock. Under this condition, the oscillator clock frequency must be lower than the bus clock."]
|
||||
_0,
|
||||
#[doc = "The CAN engine clock source is the peripheral clock."]
|
||||
_1,
|
||||
#[doc = "The CAN engine clock source is the peripheral clock."] _1,
|
||||
}
|
||||
impl CLKSRCR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -477,10 +463,8 @@ impl CLKSRCR {
|
|||
#[doc = "Possible values of the field `ERRMSK`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ERRMSKR {
|
||||
#[doc = "Error interrupt disabled."]
|
||||
_0,
|
||||
#[doc = "Error interrupt enabled."]
|
||||
_1,
|
||||
#[doc = "Error interrupt disabled."] _0,
|
||||
#[doc = "Error interrupt enabled."] _1,
|
||||
}
|
||||
impl ERRMSKR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -524,10 +508,8 @@ impl ERRMSKR {
|
|||
#[doc = "Possible values of the field `BOFFMSK`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum BOFFMSKR {
|
||||
#[doc = "Bus Off interrupt disabled."]
|
||||
_0,
|
||||
#[doc = "Bus Off interrupt enabled."]
|
||||
_1,
|
||||
#[doc = "Bus Off interrupt disabled."] _0,
|
||||
#[doc = "Bus Off interrupt enabled."] _1,
|
||||
}
|
||||
impl BOFFMSKR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -629,10 +611,8 @@ impl<'a> _PROPSEGW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `LOM`"]
|
||||
pub enum LOMW {
|
||||
#[doc = "Listen-Only mode is deactivated."]
|
||||
_0,
|
||||
#[doc = "FlexCAN module operates in Listen-Only mode."]
|
||||
_1,
|
||||
#[doc = "Listen-Only mode is deactivated."] _0,
|
||||
#[doc = "FlexCAN module operates in Listen-Only mode."] _1,
|
||||
}
|
||||
impl LOMW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -687,10 +667,8 @@ impl<'a> _LOMW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `LBUF`"]
|
||||
pub enum LBUFW {
|
||||
#[doc = "Buffer with highest priority is transmitted first."]
|
||||
_0,
|
||||
#[doc = "Lowest number buffer is transmitted first."]
|
||||
_1,
|
||||
#[doc = "Buffer with highest priority is transmitted first."] _0,
|
||||
#[doc = "Lowest number buffer is transmitted first."] _1,
|
||||
}
|
||||
impl LBUFW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -745,10 +723,8 @@ impl<'a> _LBUFW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TSYN`"]
|
||||
pub enum TSYNW {
|
||||
#[doc = "Timer Sync feature disabled"]
|
||||
_0,
|
||||
#[doc = "Timer Sync feature enabled"]
|
||||
_1,
|
||||
#[doc = "Timer Sync feature disabled"] _0,
|
||||
#[doc = "Timer Sync feature enabled"] _1,
|
||||
}
|
||||
impl TSYNW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -803,10 +779,8 @@ impl<'a> _TSYNW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `BOFFREC`"]
|
||||
pub enum BOFFRECW {
|
||||
#[doc = "Automatic recovering from Bus Off state enabled."]
|
||||
_0,
|
||||
#[doc = "Automatic recovering from Bus Off state disabled."]
|
||||
_1,
|
||||
#[doc = "Automatic recovering from Bus Off state enabled."] _0,
|
||||
#[doc = "Automatic recovering from Bus Off state disabled."] _1,
|
||||
}
|
||||
impl BOFFRECW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -861,8 +835,7 @@ impl<'a> _BOFFRECW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SMP`"]
|
||||
pub enum SMPW {
|
||||
#[doc = "Just one sample is used to determine the bit value."]
|
||||
_0,
|
||||
#[doc = "Just one sample is used to determine the bit value."] _0,
|
||||
#[doc = "Three samples are used to determine the value of the received bit: the regular one (sample point) and 2 preceding samples; a majority rule is used."]
|
||||
_1,
|
||||
}
|
||||
|
|
@ -919,10 +892,8 @@ impl<'a> _SMPW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `RWRNMSK`"]
|
||||
pub enum RWRNMSKW {
|
||||
#[doc = "Rx Warning Interrupt disabled."]
|
||||
_0,
|
||||
#[doc = "Rx Warning Interrupt enabled."]
|
||||
_1,
|
||||
#[doc = "Rx Warning Interrupt disabled."] _0,
|
||||
#[doc = "Rx Warning Interrupt enabled."] _1,
|
||||
}
|
||||
impl RWRNMSKW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -977,10 +948,8 @@ impl<'a> _RWRNMSKW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TWRNMSK`"]
|
||||
pub enum TWRNMSKW {
|
||||
#[doc = "Tx Warning Interrupt disabled."]
|
||||
_0,
|
||||
#[doc = "Tx Warning Interrupt enabled."]
|
||||
_1,
|
||||
#[doc = "Tx Warning Interrupt disabled."] _0,
|
||||
#[doc = "Tx Warning Interrupt enabled."] _1,
|
||||
}
|
||||
impl TWRNMSKW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1035,10 +1004,8 @@ impl<'a> _TWRNMSKW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `LPB`"]
|
||||
pub enum LPBW {
|
||||
#[doc = "Loop Back disabled."]
|
||||
_0,
|
||||
#[doc = "Loop Back enabled."]
|
||||
_1,
|
||||
#[doc = "Loop Back disabled."] _0,
|
||||
#[doc = "Loop Back enabled."] _1,
|
||||
}
|
||||
impl LPBW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1095,8 +1062,7 @@ impl<'a> _LPBW<'a> {
|
|||
pub enum CLKSRCW {
|
||||
#[doc = "The CAN engine clock source is the oscillator clock. Under this condition, the oscillator clock frequency must be lower than the bus clock."]
|
||||
_0,
|
||||
#[doc = "The CAN engine clock source is the peripheral clock."]
|
||||
_1,
|
||||
#[doc = "The CAN engine clock source is the peripheral clock."] _1,
|
||||
}
|
||||
impl CLKSRCW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1151,10 +1117,8 @@ impl<'a> _CLKSRCW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `ERRMSK`"]
|
||||
pub enum ERRMSKW {
|
||||
#[doc = "Error interrupt disabled."]
|
||||
_0,
|
||||
#[doc = "Error interrupt enabled."]
|
||||
_1,
|
||||
#[doc = "Error interrupt disabled."] _0,
|
||||
#[doc = "Error interrupt enabled."] _1,
|
||||
}
|
||||
impl ERRMSKW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1209,10 +1173,8 @@ impl<'a> _ERRMSKW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `BOFFMSK`"]
|
||||
pub enum BOFFMSKW {
|
||||
#[doc = "Bus Off interrupt disabled."]
|
||||
_0,
|
||||
#[doc = "Bus Off interrupt enabled."]
|
||||
_1,
|
||||
#[doc = "Bus Off interrupt disabled."] _0,
|
||||
#[doc = "Bus Off interrupt enabled."] _1,
|
||||
}
|
||||
impl BOFFMSKW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
|
|||
|
|
@ -22,7 +22,9 @@ impl super::CTRL1_PN {
|
|||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
|
|
@ -43,14 +45,10 @@ impl super::CTRL1_PN {
|
|||
#[doc = "Possible values of the field `FCS`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum FCSR {
|
||||
#[doc = "Message ID filtering only"]
|
||||
_00,
|
||||
#[doc = "Message ID filtering and payload filtering"]
|
||||
_01,
|
||||
#[doc = "Message ID filtering occurring a specified number of times."]
|
||||
_10,
|
||||
#[doc = "Message ID filtering and payload filtering a specified number of times"]
|
||||
_11,
|
||||
#[doc = "Message ID filtering only"] _00,
|
||||
#[doc = "Message ID filtering and payload filtering"] _01,
|
||||
#[doc = "Message ID filtering occurring a specified number of times."] _10,
|
||||
#[doc = "Message ID filtering and payload filtering a specified number of times"] _11,
|
||||
}
|
||||
impl FCSR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
|
|
@ -99,12 +97,9 @@ impl FCSR {
|
|||
#[doc = "Possible values of the field `IDFS`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum IDFSR {
|
||||
#[doc = "Match upon a ID contents against an exact target value"]
|
||||
_00,
|
||||
#[doc = "Match upon a ID value greater than or equal to a specified target value"]
|
||||
_01,
|
||||
#[doc = "Match upon a ID value smaller than or equal to a specified target value"]
|
||||
_10,
|
||||
#[doc = "Match upon a ID contents against an exact target value"] _00,
|
||||
#[doc = "Match upon a ID value greater than or equal to a specified target value"] _01,
|
||||
#[doc = "Match upon a ID value smaller than or equal to a specified target value"] _10,
|
||||
#[doc = "Match upon a ID value inside a range, greater than or equal to a specified lower limit and smaller than or equal a specified upper limit"]
|
||||
_11,
|
||||
}
|
||||
|
|
@ -155,12 +150,9 @@ impl IDFSR {
|
|||
#[doc = "Possible values of the field `PLFS`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum PLFSR {
|
||||
#[doc = "Match upon a payload contents against an exact target value"]
|
||||
_00,
|
||||
#[doc = "Match upon a payload value greater than or equal to a specified target value"]
|
||||
_01,
|
||||
#[doc = "Match upon a payload value smaller than or equal to a specified target value"]
|
||||
_10,
|
||||
#[doc = "Match upon a payload contents against an exact target value"] _00,
|
||||
#[doc = "Match upon a payload value greater than or equal to a specified target value"] _01,
|
||||
#[doc = "Match upon a payload value smaller than or equal to a specified target value"] _10,
|
||||
#[doc = "Match upon a payload value inside a range, greater than or equal to a specified lower limit and smaller than or equal a specified upper limit"]
|
||||
_11,
|
||||
}
|
||||
|
|
@ -217,8 +209,7 @@ pub enum NMATCHR {
|
|||
_00000010,
|
||||
#[doc = "Received message must match the predefined filtering criteria for ID and/or PL 255 times before generating a wake up event."]
|
||||
_11111111,
|
||||
#[doc = r" Reserved"]
|
||||
_Reserved(u8),
|
||||
#[doc = r" Reserved"] _Reserved(u8),
|
||||
}
|
||||
impl NMATCHR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
|
|
@ -261,10 +252,8 @@ impl NMATCHR {
|
|||
#[doc = "Possible values of the field `WUMF_MSK`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WUMF_MSKR {
|
||||
#[doc = "Wake up match event is disabled"]
|
||||
_0,
|
||||
#[doc = "Wake up match event is enabled"]
|
||||
_1,
|
||||
#[doc = "Wake up match event is disabled"] _0,
|
||||
#[doc = "Wake up match event is enabled"] _1,
|
||||
}
|
||||
impl WUMF_MSKR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -308,10 +297,8 @@ impl WUMF_MSKR {
|
|||
#[doc = "Possible values of the field `WTOF_MSK`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WTOF_MSKR {
|
||||
#[doc = "Timeout wake up event is disabled"]
|
||||
_0,
|
||||
#[doc = "Timeout wake up event is enabled"]
|
||||
_1,
|
||||
#[doc = "Timeout wake up event is disabled"] _0,
|
||||
#[doc = "Timeout wake up event is enabled"] _1,
|
||||
}
|
||||
impl WTOF_MSKR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -354,14 +341,10 @@ impl WTOF_MSKR {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `FCS`"]
|
||||
pub enum FCSW {
|
||||
#[doc = "Message ID filtering only"]
|
||||
_00,
|
||||
#[doc = "Message ID filtering and payload filtering"]
|
||||
_01,
|
||||
#[doc = "Message ID filtering occurring a specified number of times."]
|
||||
_10,
|
||||
#[doc = "Message ID filtering and payload filtering a specified number of times"]
|
||||
_11,
|
||||
#[doc = "Message ID filtering only"] _00,
|
||||
#[doc = "Message ID filtering and payload filtering"] _01,
|
||||
#[doc = "Message ID filtering occurring a specified number of times."] _10,
|
||||
#[doc = "Message ID filtering and payload filtering a specified number of times"] _11,
|
||||
}
|
||||
impl FCSW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -420,12 +403,9 @@ impl<'a> _FCSW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `IDFS`"]
|
||||
pub enum IDFSW {
|
||||
#[doc = "Match upon a ID contents against an exact target value"]
|
||||
_00,
|
||||
#[doc = "Match upon a ID value greater than or equal to a specified target value"]
|
||||
_01,
|
||||
#[doc = "Match upon a ID value smaller than or equal to a specified target value"]
|
||||
_10,
|
||||
#[doc = "Match upon a ID contents against an exact target value"] _00,
|
||||
#[doc = "Match upon a ID value greater than or equal to a specified target value"] _01,
|
||||
#[doc = "Match upon a ID value smaller than or equal to a specified target value"] _10,
|
||||
#[doc = "Match upon a ID value inside a range, greater than or equal to a specified lower limit and smaller than or equal a specified upper limit"]
|
||||
_11,
|
||||
}
|
||||
|
|
@ -486,12 +466,9 @@ impl<'a> _IDFSW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `PLFS`"]
|
||||
pub enum PLFSW {
|
||||
#[doc = "Match upon a payload contents against an exact target value"]
|
||||
_00,
|
||||
#[doc = "Match upon a payload value greater than or equal to a specified target value"]
|
||||
_01,
|
||||
#[doc = "Match upon a payload value smaller than or equal to a specified target value"]
|
||||
_10,
|
||||
#[doc = "Match upon a payload contents against an exact target value"] _00,
|
||||
#[doc = "Match upon a payload value greater than or equal to a specified target value"] _01,
|
||||
#[doc = "Match upon a payload value smaller than or equal to a specified target value"] _10,
|
||||
#[doc = "Match upon a payload value inside a range, greater than or equal to a specified lower limit and smaller than or equal a specified upper limit"]
|
||||
_11,
|
||||
}
|
||||
|
|
@ -608,10 +585,8 @@ impl<'a> _NMATCHW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WUMF_MSK`"]
|
||||
pub enum WUMF_MSKW {
|
||||
#[doc = "Wake up match event is disabled"]
|
||||
_0,
|
||||
#[doc = "Wake up match event is enabled"]
|
||||
_1,
|
||||
#[doc = "Wake up match event is disabled"] _0,
|
||||
#[doc = "Wake up match event is enabled"] _1,
|
||||
}
|
||||
impl WUMF_MSKW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -666,10 +641,8 @@ impl<'a> _WUMF_MSKW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `WTOF_MSK`"]
|
||||
pub enum WTOF_MSKW {
|
||||
#[doc = "Timeout wake up event is disabled"]
|
||||
_0,
|
||||
#[doc = "Timeout wake up event is enabled"]
|
||||
_1,
|
||||
#[doc = "Timeout wake up event is disabled"] _0,
|
||||
#[doc = "Timeout wake up event is enabled"] _1,
|
||||
}
|
||||
impl WTOF_MSKW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
|
|||
|
|
@ -22,7 +22,9 @@ impl super::CTRL2 {
|
|||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
|
|
@ -43,10 +45,8 @@ impl super::CTRL2 {
|
|||
#[doc = "Possible values of the field `EDFLTDIS`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum EDFLTDISR {
|
||||
#[doc = "Edge Filter is enabled."]
|
||||
_0,
|
||||
#[doc = "Edge Filter is disabled."]
|
||||
_1,
|
||||
#[doc = "Edge Filter is enabled."] _0,
|
||||
#[doc = "Edge Filter is disabled."] _1,
|
||||
}
|
||||
impl EDFLTDISR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -90,10 +90,8 @@ impl EDFLTDISR {
|
|||
#[doc = "Possible values of the field `ISOCANFDEN`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ISOCANFDENR {
|
||||
#[doc = "FlexCAN operates using the non-ISO CAN FD protocol."]
|
||||
_0,
|
||||
#[doc = "FlexCAN operates using the ISO CAN FD protocol (ISO 11898-1)."]
|
||||
_1,
|
||||
#[doc = "FlexCAN operates using the non-ISO CAN FD protocol."] _0,
|
||||
#[doc = "FlexCAN operates using the ISO CAN FD protocol (ISO 11898-1)."] _1,
|
||||
}
|
||||
impl ISOCANFDENR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -137,10 +135,8 @@ impl ISOCANFDENR {
|
|||
#[doc = "Possible values of the field `PREXCEN`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum PREXCENR {
|
||||
#[doc = "Protocol Exception is disabled."]
|
||||
_0,
|
||||
#[doc = "Protocol Exception is enabled."]
|
||||
_1,
|
||||
#[doc = "Protocol Exception is disabled."] _0,
|
||||
#[doc = "Protocol Exception is enabled."] _1,
|
||||
}
|
||||
impl PREXCENR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -278,10 +274,8 @@ impl EACENR {
|
|||
#[doc = "Possible values of the field `RRS`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum RRSR {
|
||||
#[doc = "Remote Response Frame is generated."]
|
||||
_0,
|
||||
#[doc = "Remote Request Frame is stored."]
|
||||
_1,
|
||||
#[doc = "Remote Response Frame is generated."] _0,
|
||||
#[doc = "Remote Request Frame is stored."] _1,
|
||||
}
|
||||
impl RRSR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -325,10 +319,8 @@ impl RRSR {
|
|||
#[doc = "Possible values of the field `MRP`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum MRPR {
|
||||
#[doc = "Matching starts from Rx FIFO and continues on Mailboxes."]
|
||||
_0,
|
||||
#[doc = "Matching starts from Mailboxes and continues on Rx FIFO."]
|
||||
_1,
|
||||
#[doc = "Matching starts from Rx FIFO and continues on Mailboxes."] _0,
|
||||
#[doc = "Matching starts from Mailboxes and continues on Rx FIFO."] _1,
|
||||
}
|
||||
impl MRPR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -394,10 +386,8 @@ impl RFFNR {
|
|||
#[doc = "Possible values of the field `BOFFDONEMSK`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum BOFFDONEMSKR {
|
||||
#[doc = "Bus Off Done interrupt disabled."]
|
||||
_0,
|
||||
#[doc = "Bus Off Done interrupt enabled."]
|
||||
_1,
|
||||
#[doc = "Bus Off Done interrupt disabled."] _0,
|
||||
#[doc = "Bus Off Done interrupt enabled."] _1,
|
||||
}
|
||||
impl BOFFDONEMSKR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -441,10 +431,8 @@ impl BOFFDONEMSKR {
|
|||
#[doc = "Possible values of the field `ERRMSK_FAST`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ERRMSK_FASTR {
|
||||
#[doc = "ERRINT_FAST Error interrupt disabled."]
|
||||
_0,
|
||||
#[doc = "ERRINT_FAST Error interrupt enabled."]
|
||||
_1,
|
||||
#[doc = "ERRINT_FAST Error interrupt disabled."] _0,
|
||||
#[doc = "ERRINT_FAST Error interrupt enabled."] _1,
|
||||
}
|
||||
impl ERRMSK_FASTR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -487,10 +475,8 @@ impl ERRMSK_FASTR {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `EDFLTDIS`"]
|
||||
pub enum EDFLTDISW {
|
||||
#[doc = "Edge Filter is enabled."]
|
||||
_0,
|
||||
#[doc = "Edge Filter is disabled."]
|
||||
_1,
|
||||
#[doc = "Edge Filter is enabled."] _0,
|
||||
#[doc = "Edge Filter is disabled."] _1,
|
||||
}
|
||||
impl EDFLTDISW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -545,10 +531,8 @@ impl<'a> _EDFLTDISW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `ISOCANFDEN`"]
|
||||
pub enum ISOCANFDENW {
|
||||
#[doc = "FlexCAN operates using the non-ISO CAN FD protocol."]
|
||||
_0,
|
||||
#[doc = "FlexCAN operates using the ISO CAN FD protocol (ISO 11898-1)."]
|
||||
_1,
|
||||
#[doc = "FlexCAN operates using the non-ISO CAN FD protocol."] _0,
|
||||
#[doc = "FlexCAN operates using the ISO CAN FD protocol (ISO 11898-1)."] _1,
|
||||
}
|
||||
impl ISOCANFDENW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -603,10 +587,8 @@ impl<'a> _ISOCANFDENW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `PREXCEN`"]
|
||||
pub enum PREXCENW {
|
||||
#[doc = "Protocol Exception is disabled."]
|
||||
_0,
|
||||
#[doc = "Protocol Exception is enabled."]
|
||||
_1,
|
||||
#[doc = "Protocol Exception is disabled."] _0,
|
||||
#[doc = "Protocol Exception is enabled."] _1,
|
||||
}
|
||||
impl PREXCENW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -777,10 +759,8 @@ impl<'a> _EACENW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `RRS`"]
|
||||
pub enum RRSW {
|
||||
#[doc = "Remote Response Frame is generated."]
|
||||
_0,
|
||||
#[doc = "Remote Request Frame is stored."]
|
||||
_1,
|
||||
#[doc = "Remote Response Frame is generated."] _0,
|
||||
#[doc = "Remote Request Frame is stored."] _1,
|
||||
}
|
||||
impl RRSW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -835,10 +815,8 @@ impl<'a> _RRSW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `MRP`"]
|
||||
pub enum MRPW {
|
||||
#[doc = "Matching starts from Rx FIFO and continues on Mailboxes."]
|
||||
_0,
|
||||
#[doc = "Matching starts from Mailboxes and continues on Rx FIFO."]
|
||||
_1,
|
||||
#[doc = "Matching starts from Rx FIFO and continues on Mailboxes."] _0,
|
||||
#[doc = "Matching starts from Mailboxes and continues on Rx FIFO."] _1,
|
||||
}
|
||||
impl MRPW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -923,10 +901,8 @@ impl<'a> _RFFNW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `BOFFDONEMSK`"]
|
||||
pub enum BOFFDONEMSKW {
|
||||
#[doc = "Bus Off Done interrupt disabled."]
|
||||
_0,
|
||||
#[doc = "Bus Off Done interrupt enabled."]
|
||||
_1,
|
||||
#[doc = "Bus Off Done interrupt disabled."] _0,
|
||||
#[doc = "Bus Off Done interrupt enabled."] _1,
|
||||
}
|
||||
impl BOFFDONEMSKW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -981,10 +957,8 @@ impl<'a> _BOFFDONEMSKW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `ERRMSK_FAST`"]
|
||||
pub enum ERRMSK_FASTW {
|
||||
#[doc = "ERRINT_FAST Error interrupt disabled."]
|
||||
_0,
|
||||
#[doc = "ERRINT_FAST Error interrupt enabled."]
|
||||
_1,
|
||||
#[doc = "ERRINT_FAST Error interrupt disabled."] _0,
|
||||
#[doc = "ERRINT_FAST Error interrupt enabled."] _1,
|
||||
}
|
||||
impl ERRMSK_FASTW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
|
|||
|
|
@ -22,7 +22,9 @@ impl super::CTRL2_PN {
|
|||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
|
|
|
|||
|
|
@ -22,7 +22,9 @@ impl super::ECR {
|
|||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
|
|
|
|||
|
|
@ -22,7 +22,9 @@ impl super::EMBEDDEDRAM {
|
|||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
|
|
|
|||
|
|
@ -22,7 +22,9 @@ impl super::ESR1 {
|
|||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
|
|
@ -43,10 +45,8 @@ impl super::ESR1 {
|
|||
#[doc = "Possible values of the field `ERRINT`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ERRINTR {
|
||||
#[doc = "No such occurrence."]
|
||||
_0,
|
||||
#[doc = "Indicates setting of any Error Bit in the Error and Status Register."]
|
||||
_1,
|
||||
#[doc = "No such occurrence."] _0,
|
||||
#[doc = "Indicates setting of any Error Bit in the Error and Status Register."] _1,
|
||||
}
|
||||
impl ERRINTR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -90,10 +90,8 @@ impl ERRINTR {
|
|||
#[doc = "Possible values of the field `BOFFINT`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum BOFFINTR {
|
||||
#[doc = "No such occurrence."]
|
||||
_0,
|
||||
#[doc = "FlexCAN module entered Bus Off state."]
|
||||
_1,
|
||||
#[doc = "No such occurrence."] _0,
|
||||
#[doc = "FlexCAN module entered Bus Off state."] _1,
|
||||
}
|
||||
impl BOFFINTR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -137,10 +135,8 @@ impl BOFFINTR {
|
|||
#[doc = "Possible values of the field `RX`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum RXR {
|
||||
#[doc = "FlexCAN is not receiving a message."]
|
||||
_0,
|
||||
#[doc = "FlexCAN is receiving a message."]
|
||||
_1,
|
||||
#[doc = "FlexCAN is not receiving a message."] _0,
|
||||
#[doc = "FlexCAN is receiving a message."] _1,
|
||||
}
|
||||
impl RXR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -184,14 +180,10 @@ impl RXR {
|
|||
#[doc = "Possible values of the field `FLTCONF`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum FLTCONFR {
|
||||
#[doc = "Error Active"]
|
||||
_00,
|
||||
#[doc = "Error Passive"]
|
||||
_01,
|
||||
#[doc = "Bus Off"]
|
||||
_1X,
|
||||
#[doc = r" Reserved"]
|
||||
_Reserved(u8),
|
||||
#[doc = "Error Active"] _00,
|
||||
#[doc = "Error Passive"] _01,
|
||||
#[doc = "Bus Off"] _1X,
|
||||
#[doc = r" Reserved"] _Reserved(u8),
|
||||
}
|
||||
impl FLTCONFR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
|
|
@ -234,10 +226,8 @@ impl FLTCONFR {
|
|||
#[doc = "Possible values of the field `TX`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TXR {
|
||||
#[doc = "FlexCAN is not transmitting a message."]
|
||||
_0,
|
||||
#[doc = "FlexCAN is transmitting a message."]
|
||||
_1,
|
||||
#[doc = "FlexCAN is not transmitting a message."] _0,
|
||||
#[doc = "FlexCAN is transmitting a message."] _1,
|
||||
}
|
||||
impl TXR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -281,10 +271,8 @@ impl TXR {
|
|||
#[doc = "Possible values of the field `IDLE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum IDLER {
|
||||
#[doc = "No such occurrence."]
|
||||
_0,
|
||||
#[doc = "CAN bus is now IDLE."]
|
||||
_1,
|
||||
#[doc = "No such occurrence."] _0,
|
||||
#[doc = "CAN bus is now IDLE."] _1,
|
||||
}
|
||||
impl IDLER {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -328,10 +316,8 @@ impl IDLER {
|
|||
#[doc = "Possible values of the field `RXWRN`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum RXWRNR {
|
||||
#[doc = "No such occurrence."]
|
||||
_0,
|
||||
#[doc = "RXERRCNT is greater than or equal to 96."]
|
||||
_1,
|
||||
#[doc = "No such occurrence."] _0,
|
||||
#[doc = "RXERRCNT is greater than or equal to 96."] _1,
|
||||
}
|
||||
impl RXWRNR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -375,10 +361,8 @@ impl RXWRNR {
|
|||
#[doc = "Possible values of the field `TXWRN`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TXWRNR {
|
||||
#[doc = "No such occurrence."]
|
||||
_0,
|
||||
#[doc = "TXERRCNT is greater than or equal to 96."]
|
||||
_1,
|
||||
#[doc = "No such occurrence."] _0,
|
||||
#[doc = "TXERRCNT is greater than or equal to 96."] _1,
|
||||
}
|
||||
impl TXWRNR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -422,10 +406,8 @@ impl TXWRNR {
|
|||
#[doc = "Possible values of the field `STFERR`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum STFERRR {
|
||||
#[doc = "No such occurrence."]
|
||||
_0,
|
||||
#[doc = "A Stuffing Error occurred since last read of this register."]
|
||||
_1,
|
||||
#[doc = "No such occurrence."] _0,
|
||||
#[doc = "A Stuffing Error occurred since last read of this register."] _1,
|
||||
}
|
||||
impl STFERRR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -469,10 +451,8 @@ impl STFERRR {
|
|||
#[doc = "Possible values of the field `FRMERR`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum FRMERRR {
|
||||
#[doc = "No such occurrence."]
|
||||
_0,
|
||||
#[doc = "A Form Error occurred since last read of this register."]
|
||||
_1,
|
||||
#[doc = "No such occurrence."] _0,
|
||||
#[doc = "A Form Error occurred since last read of this register."] _1,
|
||||
}
|
||||
impl FRMERRR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -516,10 +496,8 @@ impl FRMERRR {
|
|||
#[doc = "Possible values of the field `CRCERR`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum CRCERRR {
|
||||
#[doc = "No such occurrence."]
|
||||
_0,
|
||||
#[doc = "A CRC error occurred since last read of this register."]
|
||||
_1,
|
||||
#[doc = "No such occurrence."] _0,
|
||||
#[doc = "A CRC error occurred since last read of this register."] _1,
|
||||
}
|
||||
impl CRCERRR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -563,10 +541,8 @@ impl CRCERRR {
|
|||
#[doc = "Possible values of the field `ACKERR`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ACKERRR {
|
||||
#[doc = "No such occurrence."]
|
||||
_0,
|
||||
#[doc = "An ACK error occurred since last read of this register."]
|
||||
_1,
|
||||
#[doc = "No such occurrence."] _0,
|
||||
#[doc = "An ACK error occurred since last read of this register."] _1,
|
||||
}
|
||||
impl ACKERRR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -610,10 +586,8 @@ impl ACKERRR {
|
|||
#[doc = "Possible values of the field `BIT0ERR`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum BIT0ERRR {
|
||||
#[doc = "No such occurrence."]
|
||||
_0,
|
||||
#[doc = "At least one bit sent as dominant is received as recessive."]
|
||||
_1,
|
||||
#[doc = "No such occurrence."] _0,
|
||||
#[doc = "At least one bit sent as dominant is received as recessive."] _1,
|
||||
}
|
||||
impl BIT0ERRR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -657,10 +631,8 @@ impl BIT0ERRR {
|
|||
#[doc = "Possible values of the field `BIT1ERR`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum BIT1ERRR {
|
||||
#[doc = "No such occurrence."]
|
||||
_0,
|
||||
#[doc = "At least one bit sent as recessive is received as dominant."]
|
||||
_1,
|
||||
#[doc = "No such occurrence."] _0,
|
||||
#[doc = "At least one bit sent as recessive is received as dominant."] _1,
|
||||
}
|
||||
impl BIT1ERRR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -704,8 +676,7 @@ impl BIT1ERRR {
|
|||
#[doc = "Possible values of the field `RWRNINT`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum RWRNINTR {
|
||||
#[doc = "No such occurrence."]
|
||||
_0,
|
||||
#[doc = "No such occurrence."] _0,
|
||||
#[doc = "The Rx error counter transitioned from less than 96 to greater than or equal to 96."]
|
||||
_1,
|
||||
}
|
||||
|
|
@ -751,8 +722,7 @@ impl RWRNINTR {
|
|||
#[doc = "Possible values of the field `TWRNINT`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TWRNINTR {
|
||||
#[doc = "No such occurrence."]
|
||||
_0,
|
||||
#[doc = "No such occurrence."] _0,
|
||||
#[doc = "The Tx error counter transitioned from less than 96 to greater than or equal to 96."]
|
||||
_1,
|
||||
}
|
||||
|
|
@ -798,10 +768,8 @@ impl TWRNINTR {
|
|||
#[doc = "Possible values of the field `SYNCH`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SYNCHR {
|
||||
#[doc = "FlexCAN is not synchronized to the CAN bus."]
|
||||
_0,
|
||||
#[doc = "FlexCAN is synchronized to the CAN bus."]
|
||||
_1,
|
||||
#[doc = "FlexCAN is not synchronized to the CAN bus."] _0,
|
||||
#[doc = "FlexCAN is synchronized to the CAN bus."] _1,
|
||||
}
|
||||
impl SYNCHR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -845,10 +813,8 @@ impl SYNCHR {
|
|||
#[doc = "Possible values of the field `BOFFDONEINT`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum BOFFDONEINTR {
|
||||
#[doc = "No such occurrence."]
|
||||
_0,
|
||||
#[doc = "FlexCAN module has completed Bus Off process."]
|
||||
_1,
|
||||
#[doc = "No such occurrence."] _0,
|
||||
#[doc = "FlexCAN module has completed Bus Off process."] _1,
|
||||
}
|
||||
impl BOFFDONEINTR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -892,8 +858,7 @@ impl BOFFDONEINTR {
|
|||
#[doc = "Possible values of the field `ERRINT_FAST`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ERRINT_FASTR {
|
||||
#[doc = "No such occurrence."]
|
||||
_0,
|
||||
#[doc = "No such occurrence."] _0,
|
||||
#[doc = "Indicates setting of any Error Bit detected in the Data Phase of CAN FD frames with the BRS bit set."]
|
||||
_1,
|
||||
}
|
||||
|
|
@ -939,10 +904,8 @@ impl ERRINT_FASTR {
|
|||
#[doc = "Possible values of the field `ERROVR`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ERROVRR {
|
||||
#[doc = "Overrun has not occurred."]
|
||||
_0,
|
||||
#[doc = "Overrun has occurred."]
|
||||
_1,
|
||||
#[doc = "Overrun has not occurred."] _0,
|
||||
#[doc = "Overrun has occurred."] _1,
|
||||
}
|
||||
impl ERROVRR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -986,10 +949,8 @@ impl ERROVRR {
|
|||
#[doc = "Possible values of the field `STFERR_FAST`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum STFERR_FASTR {
|
||||
#[doc = "No such occurrence."]
|
||||
_0,
|
||||
#[doc = "A Stuffing Error occurred since last read of this register."]
|
||||
_1,
|
||||
#[doc = "No such occurrence."] _0,
|
||||
#[doc = "A Stuffing Error occurred since last read of this register."] _1,
|
||||
}
|
||||
impl STFERR_FASTR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -1033,10 +994,8 @@ impl STFERR_FASTR {
|
|||
#[doc = "Possible values of the field `FRMERR_FAST`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum FRMERR_FASTR {
|
||||
#[doc = "No such occurrence."]
|
||||
_0,
|
||||
#[doc = "A Form Error occurred since last read of this register."]
|
||||
_1,
|
||||
#[doc = "No such occurrence."] _0,
|
||||
#[doc = "A Form Error occurred since last read of this register."] _1,
|
||||
}
|
||||
impl FRMERR_FASTR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -1080,10 +1039,8 @@ impl FRMERR_FASTR {
|
|||
#[doc = "Possible values of the field `CRCERR_FAST`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum CRCERR_FASTR {
|
||||
#[doc = "No such occurrence."]
|
||||
_0,
|
||||
#[doc = "A CRC error occurred since last read of this register."]
|
||||
_1,
|
||||
#[doc = "No such occurrence."] _0,
|
||||
#[doc = "A CRC error occurred since last read of this register."] _1,
|
||||
}
|
||||
impl CRCERR_FASTR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -1127,10 +1084,8 @@ impl CRCERR_FASTR {
|
|||
#[doc = "Possible values of the field `BIT0ERR_FAST`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum BIT0ERR_FASTR {
|
||||
#[doc = "No such occurrence."]
|
||||
_0,
|
||||
#[doc = "At least one bit sent as dominant is received as recessive."]
|
||||
_1,
|
||||
#[doc = "No such occurrence."] _0,
|
||||
#[doc = "At least one bit sent as dominant is received as recessive."] _1,
|
||||
}
|
||||
impl BIT0ERR_FASTR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -1174,10 +1129,8 @@ impl BIT0ERR_FASTR {
|
|||
#[doc = "Possible values of the field `BIT1ERR_FAST`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum BIT1ERR_FASTR {
|
||||
#[doc = "No such occurrence."]
|
||||
_0,
|
||||
#[doc = "At least one bit sent as recessive is received as dominant."]
|
||||
_1,
|
||||
#[doc = "No such occurrence."] _0,
|
||||
#[doc = "At least one bit sent as recessive is received as dominant."] _1,
|
||||
}
|
||||
impl BIT1ERR_FASTR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -1220,10 +1173,8 @@ impl BIT1ERR_FASTR {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `ERRINT`"]
|
||||
pub enum ERRINTW {
|
||||
#[doc = "No such occurrence."]
|
||||
_0,
|
||||
#[doc = "Indicates setting of any Error Bit in the Error and Status Register."]
|
||||
_1,
|
||||
#[doc = "No such occurrence."] _0,
|
||||
#[doc = "Indicates setting of any Error Bit in the Error and Status Register."] _1,
|
||||
}
|
||||
impl ERRINTW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1278,10 +1229,8 @@ impl<'a> _ERRINTW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `BOFFINT`"]
|
||||
pub enum BOFFINTW {
|
||||
#[doc = "No such occurrence."]
|
||||
_0,
|
||||
#[doc = "FlexCAN module entered Bus Off state."]
|
||||
_1,
|
||||
#[doc = "No such occurrence."] _0,
|
||||
#[doc = "FlexCAN module entered Bus Off state."] _1,
|
||||
}
|
||||
impl BOFFINTW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1336,8 +1285,7 @@ impl<'a> _BOFFINTW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `RWRNINT`"]
|
||||
pub enum RWRNINTW {
|
||||
#[doc = "No such occurrence."]
|
||||
_0,
|
||||
#[doc = "No such occurrence."] _0,
|
||||
#[doc = "The Rx error counter transitioned from less than 96 to greater than or equal to 96."]
|
||||
_1,
|
||||
}
|
||||
|
|
@ -1394,8 +1342,7 @@ impl<'a> _RWRNINTW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TWRNINT`"]
|
||||
pub enum TWRNINTW {
|
||||
#[doc = "No such occurrence."]
|
||||
_0,
|
||||
#[doc = "No such occurrence."] _0,
|
||||
#[doc = "The Tx error counter transitioned from less than 96 to greater than or equal to 96."]
|
||||
_1,
|
||||
}
|
||||
|
|
@ -1452,10 +1399,8 @@ impl<'a> _TWRNINTW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `BOFFDONEINT`"]
|
||||
pub enum BOFFDONEINTW {
|
||||
#[doc = "No such occurrence."]
|
||||
_0,
|
||||
#[doc = "FlexCAN module has completed Bus Off process."]
|
||||
_1,
|
||||
#[doc = "No such occurrence."] _0,
|
||||
#[doc = "FlexCAN module has completed Bus Off process."] _1,
|
||||
}
|
||||
impl BOFFDONEINTW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1510,8 +1455,7 @@ impl<'a> _BOFFDONEINTW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `ERRINT_FAST`"]
|
||||
pub enum ERRINT_FASTW {
|
||||
#[doc = "No such occurrence."]
|
||||
_0,
|
||||
#[doc = "No such occurrence."] _0,
|
||||
#[doc = "Indicates setting of any Error Bit detected in the Data Phase of CAN FD frames with the BRS bit set."]
|
||||
_1,
|
||||
}
|
||||
|
|
@ -1568,10 +1512,8 @@ impl<'a> _ERRINT_FASTW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `ERROVR`"]
|
||||
pub enum ERROVRW {
|
||||
#[doc = "Overrun has not occurred."]
|
||||
_0,
|
||||
#[doc = "Overrun has occurred."]
|
||||
_1,
|
||||
#[doc = "Overrun has not occurred."] _0,
|
||||
#[doc = "Overrun has occurred."] _1,
|
||||
}
|
||||
impl ERROVRW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
|
|||
|
|
@ -6,14 +6,15 @@ impl super::ESR2 {
|
|||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `IMB`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum IMBR {
|
||||
#[doc = "If ESR2[VPS] is asserted, the ESR2[LPTM] is not an inactive Mailbox."]
|
||||
_0,
|
||||
#[doc = "If ESR2[VPS] is asserted, the ESR2[LPTM] is not an inactive Mailbox."] _0,
|
||||
#[doc = "If ESR2[VPS] is asserted, there is at least one inactive Mailbox. LPTM content is the number of the first one."]
|
||||
_1,
|
||||
}
|
||||
|
|
@ -59,10 +60,8 @@ impl IMBR {
|
|||
#[doc = "Possible values of the field `VPS`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum VPSR {
|
||||
#[doc = "Contents of IMB and LPTM are invalid."]
|
||||
_0,
|
||||
#[doc = "Contents of IMB and LPTM are valid."]
|
||||
_1,
|
||||
#[doc = "Contents of IMB and LPTM are invalid."] _0,
|
||||
#[doc = "Contents of IMB and LPTM are valid."] _1,
|
||||
}
|
||||
impl VPSR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
|
|||
|
|
@ -22,7 +22,9 @@ impl super::FDCBT {
|
|||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
|
|
|
|||
|
|
@ -6,7 +6,9 @@ impl super::FDCRC {
|
|||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
}
|
||||
}
|
||||
#[doc = r" Value of the field"]
|
||||
|
|
|
|||
|
|
@ -22,7 +22,9 @@ impl super::FDCTRL {
|
|||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
|
|
@ -65,10 +67,8 @@ impl TDCOFFR {
|
|||
#[doc = "Possible values of the field `TDCFAIL`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TDCFAILR {
|
||||
#[doc = "Measured loop delay is in range."]
|
||||
_0,
|
||||
#[doc = "Measured loop delay is out of range."]
|
||||
_1,
|
||||
#[doc = "Measured loop delay is in range."] _0,
|
||||
#[doc = "Measured loop delay is out of range."] _1,
|
||||
}
|
||||
impl TDCFAILR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -112,10 +112,8 @@ impl TDCFAILR {
|
|||
#[doc = "Possible values of the field `TDCEN`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TDCENR {
|
||||
#[doc = "TDC is disabled"]
|
||||
_0,
|
||||
#[doc = "TDC is enabled"]
|
||||
_1,
|
||||
#[doc = "TDC is disabled"] _0,
|
||||
#[doc = "TDC is enabled"] _1,
|
||||
}
|
||||
impl TDCENR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -159,14 +157,10 @@ impl TDCENR {
|
|||
#[doc = "Possible values of the field `MBDSR0`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum MBDSR0R {
|
||||
#[doc = "Selects 8 bytes per Message Buffer."]
|
||||
_00,
|
||||
#[doc = "Selects 16 bytes per Message Buffer."]
|
||||
_01,
|
||||
#[doc = "Selects 32 bytes per Message Buffer."]
|
||||
_10,
|
||||
#[doc = "Selects 64 bytes per Message Buffer."]
|
||||
_11,
|
||||
#[doc = "Selects 8 bytes per Message Buffer."] _00,
|
||||
#[doc = "Selects 16 bytes per Message Buffer."] _01,
|
||||
#[doc = "Selects 32 bytes per Message Buffer."] _10,
|
||||
#[doc = "Selects 64 bytes per Message Buffer."] _11,
|
||||
}
|
||||
impl MBDSR0R {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
|
|
@ -215,10 +209,8 @@ impl MBDSR0R {
|
|||
#[doc = "Possible values of the field `FDRATE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum FDRATER {
|
||||
#[doc = "Transmit a frame in nominal rate. The BRS bit in the Tx MB has no effect."]
|
||||
_0,
|
||||
#[doc = "Transmit a frame with bit rate switching if the BRS bit in the Tx MB is recessive."]
|
||||
_1,
|
||||
#[doc = "Transmit a frame in nominal rate. The BRS bit in the Tx MB has no effect."] _0,
|
||||
#[doc = "Transmit a frame with bit rate switching if the BRS bit in the Tx MB is recessive."] _1,
|
||||
}
|
||||
impl FDRATER {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -276,10 +268,8 @@ impl<'a> _TDCOFFW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TDCFAIL`"]
|
||||
pub enum TDCFAILW {
|
||||
#[doc = "Measured loop delay is in range."]
|
||||
_0,
|
||||
#[doc = "Measured loop delay is out of range."]
|
||||
_1,
|
||||
#[doc = "Measured loop delay is in range."] _0,
|
||||
#[doc = "Measured loop delay is out of range."] _1,
|
||||
}
|
||||
impl TDCFAILW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -334,10 +324,8 @@ impl<'a> _TDCFAILW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `TDCEN`"]
|
||||
pub enum TDCENW {
|
||||
#[doc = "TDC is disabled"]
|
||||
_0,
|
||||
#[doc = "TDC is enabled"]
|
||||
_1,
|
||||
#[doc = "TDC is disabled"] _0,
|
||||
#[doc = "TDC is enabled"] _1,
|
||||
}
|
||||
impl TDCENW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -392,14 +380,10 @@ impl<'a> _TDCENW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `MBDSR0`"]
|
||||
pub enum MBDSR0W {
|
||||
#[doc = "Selects 8 bytes per Message Buffer."]
|
||||
_00,
|
||||
#[doc = "Selects 16 bytes per Message Buffer."]
|
||||
_01,
|
||||
#[doc = "Selects 32 bytes per Message Buffer."]
|
||||
_10,
|
||||
#[doc = "Selects 64 bytes per Message Buffer."]
|
||||
_11,
|
||||
#[doc = "Selects 8 bytes per Message Buffer."] _00,
|
||||
#[doc = "Selects 16 bytes per Message Buffer."] _01,
|
||||
#[doc = "Selects 32 bytes per Message Buffer."] _10,
|
||||
#[doc = "Selects 64 bytes per Message Buffer."] _11,
|
||||
}
|
||||
impl MBDSR0W {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -458,10 +442,8 @@ impl<'a> _MBDSR0W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `FDRATE`"]
|
||||
pub enum FDRATEW {
|
||||
#[doc = "Transmit a frame in nominal rate. The BRS bit in the Tx MB has no effect."]
|
||||
_0,
|
||||
#[doc = "Transmit a frame with bit rate switching if the BRS bit in the Tx MB is recessive."]
|
||||
_1,
|
||||
#[doc = "Transmit a frame in nominal rate. The BRS bit in the Tx MB has no effect."] _0,
|
||||
#[doc = "Transmit a frame with bit rate switching if the BRS bit in the Tx MB is recessive."] _1,
|
||||
}
|
||||
impl FDRATEW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
|
|||
|
|
@ -22,7 +22,9 @@ impl super::FLT_DLC {
|
|||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
|
|
|
|||
|
|
@ -22,7 +22,9 @@ impl super::FLT_ID1 {
|
|||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
|
|
@ -54,10 +56,8 @@ impl FLT_ID1R {
|
|||
#[doc = "Possible values of the field `FLT_RTR`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum FLT_RTRR {
|
||||
#[doc = "Reject remote frame (accept data frame)"]
|
||||
_0,
|
||||
#[doc = "Accept remote frame"]
|
||||
_1,
|
||||
#[doc = "Reject remote frame (accept data frame)"] _0,
|
||||
#[doc = "Accept remote frame"] _1,
|
||||
}
|
||||
impl FLT_RTRR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -101,10 +101,8 @@ impl FLT_RTRR {
|
|||
#[doc = "Possible values of the field `FLT_IDE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum FLT_IDER {
|
||||
#[doc = "Accept standard frame format"]
|
||||
_0,
|
||||
#[doc = "Accept extended frame format"]
|
||||
_1,
|
||||
#[doc = "Accept standard frame format"] _0,
|
||||
#[doc = "Accept extended frame format"] _1,
|
||||
}
|
||||
impl FLT_IDER {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -162,10 +160,8 @@ impl<'a> _FLT_ID1W<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `FLT_RTR`"]
|
||||
pub enum FLT_RTRW {
|
||||
#[doc = "Reject remote frame (accept data frame)"]
|
||||
_0,
|
||||
#[doc = "Accept remote frame"]
|
||||
_1,
|
||||
#[doc = "Reject remote frame (accept data frame)"] _0,
|
||||
#[doc = "Accept remote frame"] _1,
|
||||
}
|
||||
impl FLT_RTRW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -220,10 +216,8 @@ impl<'a> _FLT_RTRW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `FLT_IDE`"]
|
||||
pub enum FLT_IDEW {
|
||||
#[doc = "Accept standard frame format"]
|
||||
_0,
|
||||
#[doc = "Accept extended frame format"]
|
||||
_1,
|
||||
#[doc = "Accept standard frame format"] _0,
|
||||
#[doc = "Accept extended frame format"] _1,
|
||||
}
|
||||
impl FLT_IDEW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
|
|||
|
|
@ -22,7 +22,9 @@ impl super::FLT_ID2_IDMASK {
|
|||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
|
|
@ -54,10 +56,8 @@ impl FLT_ID2_IDMASKR {
|
|||
#[doc = "Possible values of the field `RTR_MSK`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum RTR_MSKR {
|
||||
#[doc = "The corresponding bit in the filter is \"don't care\""]
|
||||
_0,
|
||||
#[doc = "The corresponding bit in the filter is checked"]
|
||||
_1,
|
||||
#[doc = "The corresponding bit in the filter is \"don't care\""] _0,
|
||||
#[doc = "The corresponding bit in the filter is checked"] _1,
|
||||
}
|
||||
impl RTR_MSKR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -101,10 +101,8 @@ impl RTR_MSKR {
|
|||
#[doc = "Possible values of the field `IDE_MSK`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum IDE_MSKR {
|
||||
#[doc = "The corresponding bit in the filter is \"don't care\""]
|
||||
_0,
|
||||
#[doc = "The corresponding bit in the filter is checked"]
|
||||
_1,
|
||||
#[doc = "The corresponding bit in the filter is \"don't care\""] _0,
|
||||
#[doc = "The corresponding bit in the filter is checked"] _1,
|
||||
}
|
||||
impl IDE_MSKR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -162,10 +160,8 @@ impl<'a> _FLT_ID2_IDMASKW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `RTR_MSK`"]
|
||||
pub enum RTR_MSKW {
|
||||
#[doc = "The corresponding bit in the filter is \"don't care\""]
|
||||
_0,
|
||||
#[doc = "The corresponding bit in the filter is checked"]
|
||||
_1,
|
||||
#[doc = "The corresponding bit in the filter is \"don't care\""] _0,
|
||||
#[doc = "The corresponding bit in the filter is checked"] _1,
|
||||
}
|
||||
impl RTR_MSKW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -220,10 +216,8 @@ impl<'a> _RTR_MSKW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `IDE_MSK`"]
|
||||
pub enum IDE_MSKW {
|
||||
#[doc = "The corresponding bit in the filter is \"don't care\""]
|
||||
_0,
|
||||
#[doc = "The corresponding bit in the filter is checked"]
|
||||
_1,
|
||||
#[doc = "The corresponding bit in the filter is \"don't care\""] _0,
|
||||
#[doc = "The corresponding bit in the filter is checked"] _1,
|
||||
}
|
||||
impl IDE_MSKW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
|
|||
|
|
@ -22,7 +22,9 @@ impl super::IFLAG1 {
|
|||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
|
|
|
|||
|
|
@ -22,7 +22,9 @@ impl super::IMASK1 {
|
|||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
|
|
|
|||
|
|
@ -22,7 +22,9 @@ impl super::MCR {
|
|||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
|
|
@ -54,14 +56,11 @@ impl MAXMBR {
|
|||
#[doc = "Possible values of the field `IDAM`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum IDAMR {
|
||||
#[doc = "Format A: One full ID (standard and extended) per ID Filter Table element."]
|
||||
_00,
|
||||
#[doc = "Format A: One full ID (standard and extended) per ID Filter Table element."] _00,
|
||||
#[doc = "Format B: Two full standard IDs or two partial 14-bit (standard and extended) IDs per ID Filter Table element."]
|
||||
_01,
|
||||
#[doc = "Format C: Four partial 8-bit Standard IDs per ID Filter Table element."]
|
||||
_10,
|
||||
#[doc = "Format D: All frames rejected."]
|
||||
_11,
|
||||
#[doc = "Format C: Four partial 8-bit Standard IDs per ID Filter Table element."] _10,
|
||||
#[doc = "Format D: All frames rejected."] _11,
|
||||
}
|
||||
impl IDAMR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
|
|
@ -157,10 +156,8 @@ impl FDENR {
|
|||
#[doc = "Possible values of the field `AEN`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum AENR {
|
||||
#[doc = "Abort disabled."]
|
||||
_0,
|
||||
#[doc = "Abort enabled."]
|
||||
_1,
|
||||
#[doc = "Abort disabled."] _0,
|
||||
#[doc = "Abort enabled."] _1,
|
||||
}
|
||||
impl AENR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -204,10 +201,8 @@ impl AENR {
|
|||
#[doc = "Possible values of the field `LPRIOEN`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum LPRIOENR {
|
||||
#[doc = "Local Priority disabled."]
|
||||
_0,
|
||||
#[doc = "Local Priority enabled."]
|
||||
_1,
|
||||
#[doc = "Local Priority disabled."] _0,
|
||||
#[doc = "Local Priority enabled."] _1,
|
||||
}
|
||||
impl LPRIOENR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -251,10 +246,8 @@ impl LPRIOENR {
|
|||
#[doc = "Possible values of the field `PNET_EN`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum PNET_ENR {
|
||||
#[doc = "Pretended Networking mode is disabled."]
|
||||
_0,
|
||||
#[doc = "Pretended Networking mode is enabled."]
|
||||
_1,
|
||||
#[doc = "Pretended Networking mode is disabled."] _0,
|
||||
#[doc = "Pretended Networking mode is enabled."] _1,
|
||||
}
|
||||
impl PNET_ENR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -298,10 +291,8 @@ impl PNET_ENR {
|
|||
#[doc = "Possible values of the field `DMA`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum DMAR {
|
||||
#[doc = "DMA feature for RX FIFO disabled."]
|
||||
_0,
|
||||
#[doc = "DMA feature for RX FIFO enabled."]
|
||||
_1,
|
||||
#[doc = "DMA feature for RX FIFO disabled."] _0,
|
||||
#[doc = "DMA feature for RX FIFO enabled."] _1,
|
||||
}
|
||||
impl DMAR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -347,8 +338,7 @@ impl DMAR {
|
|||
pub enum IRMQR {
|
||||
#[doc = "Individual Rx masking and queue feature are disabled. For backward compatibility with legacy applications, the reading of C/S word locks the MB even if it is EMPTY."]
|
||||
_0,
|
||||
#[doc = "Individual Rx masking and queue feature are enabled."]
|
||||
_1,
|
||||
#[doc = "Individual Rx masking and queue feature are enabled."] _1,
|
||||
}
|
||||
impl IRMQR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -392,10 +382,8 @@ impl IRMQR {
|
|||
#[doc = "Possible values of the field `SRXDIS`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SRXDISR {
|
||||
#[doc = "Self reception enabled."]
|
||||
_0,
|
||||
#[doc = "Self reception disabled."]
|
||||
_1,
|
||||
#[doc = "Self reception enabled."] _0,
|
||||
#[doc = "Self reception disabled."] _1,
|
||||
}
|
||||
impl SRXDISR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -439,10 +427,8 @@ impl SRXDISR {
|
|||
#[doc = "Possible values of the field `LPMACK`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum LPMACKR {
|
||||
#[doc = "FlexCAN is not in a low-power mode."]
|
||||
_0,
|
||||
#[doc = "FlexCAN is in a low-power mode."]
|
||||
_1,
|
||||
#[doc = "FlexCAN is not in a low-power mode."] _0,
|
||||
#[doc = "FlexCAN is in a low-power mode."] _1,
|
||||
}
|
||||
impl LPMACKR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -554,10 +540,8 @@ impl SUPVR {
|
|||
#[doc = "Possible values of the field `FRZACK`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum FRZACKR {
|
||||
#[doc = "FlexCAN not in Freeze mode, prescaler running."]
|
||||
_0,
|
||||
#[doc = "FlexCAN in Freeze mode, prescaler stopped."]
|
||||
_1,
|
||||
#[doc = "FlexCAN not in Freeze mode, prescaler running."] _0,
|
||||
#[doc = "FlexCAN in Freeze mode, prescaler stopped."] _1,
|
||||
}
|
||||
impl FRZACKR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -601,10 +585,8 @@ impl FRZACKR {
|
|||
#[doc = "Possible values of the field `SOFTRST`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SOFTRSTR {
|
||||
#[doc = "No reset request."]
|
||||
_0,
|
||||
#[doc = "Resets the registers affected by soft reset."]
|
||||
_1,
|
||||
#[doc = "No reset request."] _0,
|
||||
#[doc = "Resets the registers affected by soft reset."] _1,
|
||||
}
|
||||
impl SOFTRSTR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -648,10 +630,8 @@ impl SOFTRSTR {
|
|||
#[doc = "Possible values of the field `NOTRDY`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum NOTRDYR {
|
||||
#[doc = "FlexCAN module is either in Normal mode, Listen-Only mode or Loop-Back mode."]
|
||||
_0,
|
||||
#[doc = r" Reserved"]
|
||||
_Reserved(bool),
|
||||
#[doc = "FlexCAN module is either in Normal mode, Listen-Only mode or Loop-Back mode."] _0,
|
||||
#[doc = r" Reserved"] _Reserved(bool),
|
||||
}
|
||||
impl NOTRDYR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -690,10 +670,8 @@ impl NOTRDYR {
|
|||
#[doc = "Possible values of the field `HALT`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum HALTR {
|
||||
#[doc = "No Freeze mode request."]
|
||||
_0,
|
||||
#[doc = "Enters Freeze mode if the FRZ bit is asserted."]
|
||||
_1,
|
||||
#[doc = "No Freeze mode request."] _0,
|
||||
#[doc = "Enters Freeze mode if the FRZ bit is asserted."] _1,
|
||||
}
|
||||
impl HALTR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -737,10 +715,8 @@ impl HALTR {
|
|||
#[doc = "Possible values of the field `RFEN`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum RFENR {
|
||||
#[doc = "Rx FIFO not enabled."]
|
||||
_0,
|
||||
#[doc = "Rx FIFO enabled."]
|
||||
_1,
|
||||
#[doc = "Rx FIFO not enabled."] _0,
|
||||
#[doc = "Rx FIFO enabled."] _1,
|
||||
}
|
||||
impl RFENR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -784,10 +760,8 @@ impl RFENR {
|
|||
#[doc = "Possible values of the field `FRZ`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum FRZR {
|
||||
#[doc = "Not enabled to enter Freeze mode."]
|
||||
_0,
|
||||
#[doc = "Enabled to enter Freeze mode."]
|
||||
_1,
|
||||
#[doc = "Not enabled to enter Freeze mode."] _0,
|
||||
#[doc = "Enabled to enter Freeze mode."] _1,
|
||||
}
|
||||
impl FRZR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -831,10 +805,8 @@ impl FRZR {
|
|||
#[doc = "Possible values of the field `MDIS`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum MDISR {
|
||||
#[doc = "Enable the FlexCAN module."]
|
||||
_0,
|
||||
#[doc = "Disable the FlexCAN module."]
|
||||
_1,
|
||||
#[doc = "Enable the FlexCAN module."] _0,
|
||||
#[doc = "Disable the FlexCAN module."] _1,
|
||||
}
|
||||
impl MDISR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
|
@ -892,14 +864,11 @@ impl<'a> _MAXMBW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `IDAM`"]
|
||||
pub enum IDAMW {
|
||||
#[doc = "Format A: One full ID (standard and extended) per ID Filter Table element."]
|
||||
_00,
|
||||
#[doc = "Format A: One full ID (standard and extended) per ID Filter Table element."] _00,
|
||||
#[doc = "Format B: Two full standard IDs or two partial 14-bit (standard and extended) IDs per ID Filter Table element."]
|
||||
_01,
|
||||
#[doc = "Format C: Four partial 8-bit Standard IDs per ID Filter Table element."]
|
||||
_10,
|
||||
#[doc = "Format D: All frames rejected."]
|
||||
_11,
|
||||
#[doc = "Format C: Four partial 8-bit Standard IDs per ID Filter Table element."] _10,
|
||||
#[doc = "Format D: All frames rejected."] _11,
|
||||
}
|
||||
impl IDAMW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1016,10 +985,8 @@ impl<'a> _FDENW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `AEN`"]
|
||||
pub enum AENW {
|
||||
#[doc = "Abort disabled."]
|
||||
_0,
|
||||
#[doc = "Abort enabled."]
|
||||
_1,
|
||||
#[doc = "Abort disabled."] _0,
|
||||
#[doc = "Abort enabled."] _1,
|
||||
}
|
||||
impl AENW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1074,10 +1041,8 @@ impl<'a> _AENW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `LPRIOEN`"]
|
||||
pub enum LPRIOENW {
|
||||
#[doc = "Local Priority disabled."]
|
||||
_0,
|
||||
#[doc = "Local Priority enabled."]
|
||||
_1,
|
||||
#[doc = "Local Priority disabled."] _0,
|
||||
#[doc = "Local Priority enabled."] _1,
|
||||
}
|
||||
impl LPRIOENW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1132,10 +1097,8 @@ impl<'a> _LPRIOENW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `PNET_EN`"]
|
||||
pub enum PNET_ENW {
|
||||
#[doc = "Pretended Networking mode is disabled."]
|
||||
_0,
|
||||
#[doc = "Pretended Networking mode is enabled."]
|
||||
_1,
|
||||
#[doc = "Pretended Networking mode is disabled."] _0,
|
||||
#[doc = "Pretended Networking mode is enabled."] _1,
|
||||
}
|
||||
impl PNET_ENW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1190,10 +1153,8 @@ impl<'a> _PNET_ENW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `DMA`"]
|
||||
pub enum DMAW {
|
||||
#[doc = "DMA feature for RX FIFO disabled."]
|
||||
_0,
|
||||
#[doc = "DMA feature for RX FIFO enabled."]
|
||||
_1,
|
||||
#[doc = "DMA feature for RX FIFO disabled."] _0,
|
||||
#[doc = "DMA feature for RX FIFO enabled."] _1,
|
||||
}
|
||||
impl DMAW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1250,8 +1211,7 @@ impl<'a> _DMAW<'a> {
|
|||
pub enum IRMQW {
|
||||
#[doc = "Individual Rx masking and queue feature are disabled. For backward compatibility with legacy applications, the reading of C/S word locks the MB even if it is EMPTY."]
|
||||
_0,
|
||||
#[doc = "Individual Rx masking and queue feature are enabled."]
|
||||
_1,
|
||||
#[doc = "Individual Rx masking and queue feature are enabled."] _1,
|
||||
}
|
||||
impl IRMQW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1306,10 +1266,8 @@ impl<'a> _IRMQW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SRXDIS`"]
|
||||
pub enum SRXDISW {
|
||||
#[doc = "Self reception enabled."]
|
||||
_0,
|
||||
#[doc = "Self reception disabled."]
|
||||
_1,
|
||||
#[doc = "Self reception enabled."] _0,
|
||||
#[doc = "Self reception disabled."] _1,
|
||||
}
|
||||
impl SRXDISW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1445,10 +1403,8 @@ impl<'a> _SUPVW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `SOFTRST`"]
|
||||
pub enum SOFTRSTW {
|
||||
#[doc = "No reset request."]
|
||||
_0,
|
||||
#[doc = "Resets the registers affected by soft reset."]
|
||||
_1,
|
||||
#[doc = "No reset request."] _0,
|
||||
#[doc = "Resets the registers affected by soft reset."] _1,
|
||||
}
|
||||
impl SOFTRSTW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1503,10 +1459,8 @@ impl<'a> _SOFTRSTW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `HALT`"]
|
||||
pub enum HALTW {
|
||||
#[doc = "No Freeze mode request."]
|
||||
_0,
|
||||
#[doc = "Enters Freeze mode if the FRZ bit is asserted."]
|
||||
_1,
|
||||
#[doc = "No Freeze mode request."] _0,
|
||||
#[doc = "Enters Freeze mode if the FRZ bit is asserted."] _1,
|
||||
}
|
||||
impl HALTW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1561,10 +1515,8 @@ impl<'a> _HALTW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `RFEN`"]
|
||||
pub enum RFENW {
|
||||
#[doc = "Rx FIFO not enabled."]
|
||||
_0,
|
||||
#[doc = "Rx FIFO enabled."]
|
||||
_1,
|
||||
#[doc = "Rx FIFO not enabled."] _0,
|
||||
#[doc = "Rx FIFO enabled."] _1,
|
||||
}
|
||||
impl RFENW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1619,10 +1571,8 @@ impl<'a> _RFENW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `FRZ`"]
|
||||
pub enum FRZW {
|
||||
#[doc = "Not enabled to enter Freeze mode."]
|
||||
_0,
|
||||
#[doc = "Enabled to enter Freeze mode."]
|
||||
_1,
|
||||
#[doc = "Not enabled to enter Freeze mode."] _0,
|
||||
#[doc = "Enabled to enter Freeze mode."] _1,
|
||||
}
|
||||
impl FRZW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
@ -1677,10 +1627,8 @@ impl<'a> _FRZW<'a> {
|
|||
}
|
||||
#[doc = "Values that can be written to the field `MDIS`"]
|
||||
pub enum MDISW {
|
||||
#[doc = "Enable the FlexCAN module."]
|
||||
_0,
|
||||
#[doc = "Disable the FlexCAN module."]
|
||||
_1,
|
||||
#[doc = "Enable the FlexCAN module."] _0,
|
||||
#[doc = "Disable the FlexCAN module."] _1,
|
||||
}
|
||||
impl MDISW {
|
||||
#[allow(missing_docs)]
|
||||
|
|
|
|||
177
src/can0/mod.rs
177
src/can0/mod.rs
|
|
@ -2,93 +2,53 @@ use vcell::VolatileCell;
|
|||
#[doc = r" Register block"]
|
||||
#[repr(C)]
|
||||
pub struct RegisterBlock {
|
||||
#[doc = "0x00 - Module Configuration Register"]
|
||||
pub mcr: MCR,
|
||||
#[doc = "0x04 - Control 1 register"]
|
||||
pub ctrl1: CTRL1,
|
||||
#[doc = "0x08 - Free Running Timer"]
|
||||
pub timer: TIMER,
|
||||
#[doc = "0x00 - Module Configuration Register"] pub mcr: MCR,
|
||||
#[doc = "0x04 - Control 1 register"] pub ctrl1: CTRL1,
|
||||
#[doc = "0x08 - Free Running Timer"] pub timer: TIMER,
|
||||
_reserved0: [u8; 4usize],
|
||||
#[doc = "0x10 - Rx Mailboxes Global Mask Register"]
|
||||
pub rxmgmask: RXMGMASK,
|
||||
#[doc = "0x14 - Rx 14 Mask register"]
|
||||
pub rx14mask: RX14MASK,
|
||||
#[doc = "0x18 - Rx 15 Mask register"]
|
||||
pub rx15mask: RX15MASK,
|
||||
#[doc = "0x1c - Error Counter"]
|
||||
pub ecr: ECR,
|
||||
#[doc = "0x20 - Error and Status 1 register"]
|
||||
pub esr1: ESR1,
|
||||
#[doc = "0x10 - Rx Mailboxes Global Mask Register"] pub rxmgmask: RXMGMASK,
|
||||
#[doc = "0x14 - Rx 14 Mask register"] pub rx14mask: RX14MASK,
|
||||
#[doc = "0x18 - Rx 15 Mask register"] pub rx15mask: RX15MASK,
|
||||
#[doc = "0x1c - Error Counter"] pub ecr: ECR,
|
||||
#[doc = "0x20 - Error and Status 1 register"] pub esr1: ESR1,
|
||||
_reserved1: [u8; 4usize],
|
||||
#[doc = "0x28 - Interrupt Masks 1 register"]
|
||||
pub imask1: IMASK1,
|
||||
#[doc = "0x28 - Interrupt Masks 1 register"] pub imask1: IMASK1,
|
||||
_reserved2: [u8; 4usize],
|
||||
#[doc = "0x30 - Interrupt Flags 1 register"]
|
||||
pub iflag1: IFLAG1,
|
||||
#[doc = "0x34 - Control 2 register"]
|
||||
pub ctrl2: CTRL2,
|
||||
#[doc = "0x38 - Error and Status 2 register"]
|
||||
pub esr2: ESR2,
|
||||
#[doc = "0x30 - Interrupt Flags 1 register"] pub iflag1: IFLAG1,
|
||||
#[doc = "0x34 - Control 2 register"] pub ctrl2: CTRL2,
|
||||
#[doc = "0x38 - Error and Status 2 register"] pub esr2: ESR2,
|
||||
_reserved3: [u8; 8usize],
|
||||
#[doc = "0x44 - CRC Register"]
|
||||
pub crcr: CRCR,
|
||||
#[doc = "0x48 - Rx FIFO Global Mask register"]
|
||||
pub rxfgmask: RXFGMASK,
|
||||
#[doc = "0x4c - Rx FIFO Information Register"]
|
||||
pub rxfir: RXFIR,
|
||||
#[doc = "0x50 - CAN Bit Timing Register"]
|
||||
pub cbt: CBT,
|
||||
#[doc = "0x44 - CRC Register"] pub crcr: CRCR,
|
||||
#[doc = "0x48 - Rx FIFO Global Mask register"] pub rxfgmask: RXFGMASK,
|
||||
#[doc = "0x4c - Rx FIFO Information Register"] pub rxfir: RXFIR,
|
||||
#[doc = "0x50 - CAN Bit Timing Register"] pub cbt: CBT,
|
||||
_reserved4: [u8; 44usize],
|
||||
#[doc = "0x80 - Embedded RAM"]
|
||||
pub embedded_ram: [EMBEDDEDRAM; 128],
|
||||
#[doc = "0x80 - Embedded RAM"] pub embedded_ram: [EMBEDDEDRAM; 128],
|
||||
_reserved5: [u8; 1536usize],
|
||||
#[doc = "0x880 - Rx Individual Mask Registers"]
|
||||
pub rximr0: RXIMR0,
|
||||
#[doc = "0x884 - Rx Individual Mask Registers"]
|
||||
pub rximr1: RXIMR1,
|
||||
#[doc = "0x888 - Rx Individual Mask Registers"]
|
||||
pub rximr2: RXIMR2,
|
||||
#[doc = "0x88c - Rx Individual Mask Registers"]
|
||||
pub rximr3: RXIMR3,
|
||||
#[doc = "0x890 - Rx Individual Mask Registers"]
|
||||
pub rximr4: RXIMR4,
|
||||
#[doc = "0x894 - Rx Individual Mask Registers"]
|
||||
pub rximr5: RXIMR5,
|
||||
#[doc = "0x898 - Rx Individual Mask Registers"]
|
||||
pub rximr6: RXIMR6,
|
||||
#[doc = "0x89c - Rx Individual Mask Registers"]
|
||||
pub rximr7: RXIMR7,
|
||||
#[doc = "0x8a0 - Rx Individual Mask Registers"]
|
||||
pub rximr8: RXIMR8,
|
||||
#[doc = "0x8a4 - Rx Individual Mask Registers"]
|
||||
pub rximr9: RXIMR9,
|
||||
#[doc = "0x8a8 - Rx Individual Mask Registers"]
|
||||
pub rximr10: RXIMR10,
|
||||
#[doc = "0x8ac - Rx Individual Mask Registers"]
|
||||
pub rximr11: RXIMR11,
|
||||
#[doc = "0x8b0 - Rx Individual Mask Registers"]
|
||||
pub rximr12: RXIMR12,
|
||||
#[doc = "0x8b4 - Rx Individual Mask Registers"]
|
||||
pub rximr13: RXIMR13,
|
||||
#[doc = "0x8b8 - Rx Individual Mask Registers"]
|
||||
pub rximr14: RXIMR14,
|
||||
#[doc = "0x8bc - Rx Individual Mask Registers"]
|
||||
pub rximr15: RXIMR15,
|
||||
#[doc = "0x880 - Rx Individual Mask Registers"] pub rximr0: RXIMR0,
|
||||
#[doc = "0x884 - Rx Individual Mask Registers"] pub rximr1: RXIMR1,
|
||||
#[doc = "0x888 - Rx Individual Mask Registers"] pub rximr2: RXIMR2,
|
||||
#[doc = "0x88c - Rx Individual Mask Registers"] pub rximr3: RXIMR3,
|
||||
#[doc = "0x890 - Rx Individual Mask Registers"] pub rximr4: RXIMR4,
|
||||
#[doc = "0x894 - Rx Individual Mask Registers"] pub rximr5: RXIMR5,
|
||||
#[doc = "0x898 - Rx Individual Mask Registers"] pub rximr6: RXIMR6,
|
||||
#[doc = "0x89c - Rx Individual Mask Registers"] pub rximr7: RXIMR7,
|
||||
#[doc = "0x8a0 - Rx Individual Mask Registers"] pub rximr8: RXIMR8,
|
||||
#[doc = "0x8a4 - Rx Individual Mask Registers"] pub rximr9: RXIMR9,
|
||||
#[doc = "0x8a8 - Rx Individual Mask Registers"] pub rximr10: RXIMR10,
|
||||
#[doc = "0x8ac - Rx Individual Mask Registers"] pub rximr11: RXIMR11,
|
||||
#[doc = "0x8b0 - Rx Individual Mask Registers"] pub rximr12: RXIMR12,
|
||||
#[doc = "0x8b4 - Rx Individual Mask Registers"] pub rximr13: RXIMR13,
|
||||
#[doc = "0x8b8 - Rx Individual Mask Registers"] pub rximr14: RXIMR14,
|
||||
#[doc = "0x8bc - Rx Individual Mask Registers"] pub rximr15: RXIMR15,
|
||||
_reserved6: [u8; 576usize],
|
||||
#[doc = "0xb00 - Pretended Networking Control 1 Register"]
|
||||
pub ctrl1_pn: CTRL1_PN,
|
||||
#[doc = "0xb04 - Pretended Networking Control 2 Register"]
|
||||
pub ctrl2_pn: CTRL2_PN,
|
||||
#[doc = "0xb08 - Pretended Networking Wake Up Match Register"]
|
||||
pub wu_mtc: WU_MTC,
|
||||
#[doc = "0xb0c - Pretended Networking ID Filter 1 Register"]
|
||||
pub flt_id1: FLT_ID1,
|
||||
#[doc = "0xb10 - Pretended Networking DLC Filter Register"]
|
||||
pub flt_dlc: FLT_DLC,
|
||||
#[doc = "0xb14 - Pretended Networking Payload Low Filter 1 Register"]
|
||||
pub pl1_lo: PL1_LO,
|
||||
#[doc = "0xb18 - Pretended Networking Payload High Filter 1 Register"]
|
||||
pub pl1_hi: PL1_HI,
|
||||
#[doc = "0xb00 - Pretended Networking Control 1 Register"] pub ctrl1_pn: CTRL1_PN,
|
||||
#[doc = "0xb04 - Pretended Networking Control 2 Register"] pub ctrl2_pn: CTRL2_PN,
|
||||
#[doc = "0xb08 - Pretended Networking Wake Up Match Register"] pub wu_mtc: WU_MTC,
|
||||
#[doc = "0xb0c - Pretended Networking ID Filter 1 Register"] pub flt_id1: FLT_ID1,
|
||||
#[doc = "0xb10 - Pretended Networking DLC Filter Register"] pub flt_dlc: FLT_DLC,
|
||||
#[doc = "0xb14 - Pretended Networking Payload Low Filter 1 Register"] pub pl1_lo: PL1_LO,
|
||||
#[doc = "0xb18 - Pretended Networking Payload High Filter 1 Register"] pub pl1_hi: PL1_HI,
|
||||
#[doc = "0xb1c - Pretended Networking ID Filter 2 Register / ID Mask Register"]
|
||||
pub flt_id2_idmask: FLT_ID2_IDMASK,
|
||||
#[doc = "0xb20 - Pretended Networking Payload Low Filter 2 Register / Payload Low Mask Register"]
|
||||
|
|
@ -96,45 +56,26 @@ pub struct RegisterBlock {
|
|||
#[doc = "0xb24 - Pretended Networking Payload High Filter 2 low order bits / Payload High Mask Register"]
|
||||
pub pl2_plmask_hi: PL2_PLMASK_HI,
|
||||
_reserved7: [u8; 24usize],
|
||||
#[doc = "0xb40 - Wake Up Message Buffer Register for C/S"]
|
||||
pub wmb0_cs: WMB0_CS,
|
||||
#[doc = "0xb44 - Wake Up Message Buffer Register for ID"]
|
||||
pub wmb0_id: WMB0_ID,
|
||||
#[doc = "0xb48 - Wake Up Message Buffer Register for Data 0-3"]
|
||||
pub wmb0_d03: WMB0_D03,
|
||||
#[doc = "0xb4c - Wake Up Message Buffer Register Data 4-7"]
|
||||
pub wmb0_d47: WMB0_D47,
|
||||
#[doc = "0xb50 - Wake Up Message Buffer Register for C/S"]
|
||||
pub wmb1_cs: WMB1_CS,
|
||||
#[doc = "0xb54 - Wake Up Message Buffer Register for ID"]
|
||||
pub wmb1_id: WMB1_ID,
|
||||
#[doc = "0xb58 - Wake Up Message Buffer Register for Data 0-3"]
|
||||
pub wmb1_d03: WMB1_D03,
|
||||
#[doc = "0xb5c - Wake Up Message Buffer Register Data 4-7"]
|
||||
pub wmb1_d47: WMB1_D47,
|
||||
#[doc = "0xb60 - Wake Up Message Buffer Register for C/S"]
|
||||
pub wmb2_cs: WMB2_CS,
|
||||
#[doc = "0xb64 - Wake Up Message Buffer Register for ID"]
|
||||
pub wmb2_id: WMB2_ID,
|
||||
#[doc = "0xb68 - Wake Up Message Buffer Register for Data 0-3"]
|
||||
pub wmb2_d03: WMB2_D03,
|
||||
#[doc = "0xb6c - Wake Up Message Buffer Register Data 4-7"]
|
||||
pub wmb2_d47: WMB2_D47,
|
||||
#[doc = "0xb70 - Wake Up Message Buffer Register for C/S"]
|
||||
pub wmb3_cs: WMB3_CS,
|
||||
#[doc = "0xb74 - Wake Up Message Buffer Register for ID"]
|
||||
pub wmb3_id: WMB3_ID,
|
||||
#[doc = "0xb78 - Wake Up Message Buffer Register for Data 0-3"]
|
||||
pub wmb3_d03: WMB3_D03,
|
||||
#[doc = "0xb7c - Wake Up Message Buffer Register Data 4-7"]
|
||||
pub wmb3_d47: WMB3_D47,
|
||||
#[doc = "0xb40 - Wake Up Message Buffer Register for C/S"] pub wmb0_cs: WMB0_CS,
|
||||
#[doc = "0xb44 - Wake Up Message Buffer Register for ID"] pub wmb0_id: WMB0_ID,
|
||||
#[doc = "0xb48 - Wake Up Message Buffer Register for Data 0-3"] pub wmb0_d03: WMB0_D03,
|
||||
#[doc = "0xb4c - Wake Up Message Buffer Register Data 4-7"] pub wmb0_d47: WMB0_D47,
|
||||
#[doc = "0xb50 - Wake Up Message Buffer Register for C/S"] pub wmb1_cs: WMB1_CS,
|
||||
#[doc = "0xb54 - Wake Up Message Buffer Register for ID"] pub wmb1_id: WMB1_ID,
|
||||
#[doc = "0xb58 - Wake Up Message Buffer Register for Data 0-3"] pub wmb1_d03: WMB1_D03,
|
||||
#[doc = "0xb5c - Wake Up Message Buffer Register Data 4-7"] pub wmb1_d47: WMB1_D47,
|
||||
#[doc = "0xb60 - Wake Up Message Buffer Register for C/S"] pub wmb2_cs: WMB2_CS,
|
||||
#[doc = "0xb64 - Wake Up Message Buffer Register for ID"] pub wmb2_id: WMB2_ID,
|
||||
#[doc = "0xb68 - Wake Up Message Buffer Register for Data 0-3"] pub wmb2_d03: WMB2_D03,
|
||||
#[doc = "0xb6c - Wake Up Message Buffer Register Data 4-7"] pub wmb2_d47: WMB2_D47,
|
||||
#[doc = "0xb70 - Wake Up Message Buffer Register for C/S"] pub wmb3_cs: WMB3_CS,
|
||||
#[doc = "0xb74 - Wake Up Message Buffer Register for ID"] pub wmb3_id: WMB3_ID,
|
||||
#[doc = "0xb78 - Wake Up Message Buffer Register for Data 0-3"] pub wmb3_d03: WMB3_D03,
|
||||
#[doc = "0xb7c - Wake Up Message Buffer Register Data 4-7"] pub wmb3_d47: WMB3_D47,
|
||||
_reserved8: [u8; 128usize],
|
||||
#[doc = "0xc00 - CAN FD Control Register"]
|
||||
pub fdctrl: FDCTRL,
|
||||
#[doc = "0xc04 - CAN FD Bit Timing Register"]
|
||||
pub fdcbt: FDCBT,
|
||||
#[doc = "0xc08 - CAN FD CRC Register"]
|
||||
pub fdcrc: FDCRC,
|
||||
#[doc = "0xc00 - CAN FD Control Register"] pub fdctrl: FDCTRL,
|
||||
#[doc = "0xc04 - CAN FD Bit Timing Register"] pub fdcbt: FDCBT,
|
||||
#[doc = "0xc08 - CAN FD CRC Register"] pub fdcrc: FDCRC,
|
||||
}
|
||||
#[doc = "Module Configuration Register"]
|
||||
pub struct MCR {
|
||||
|
|
|
|||
|
|
@ -22,7 +22,9 @@ impl super::PL1_HI {
|
|||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
|
|
|
|||
|
|
@ -22,7 +22,9 @@ impl super::PL1_LO {
|
|||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
|
|
|
|||
|
|
@ -22,7 +22,9 @@ impl super::PL2_PLMASK_HI {
|
|||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
|
|
|
|||
|
|
@ -22,7 +22,9 @@ impl super::PL2_PLMASK_LO {
|
|||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
|
|
|
|||
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Reference in New Issue