xobs/s32k118.rs
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Run with updated version of rustfmt

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This commit is contained in:
Kjetil Kjeka
2017-09-23 20:31:10 +02:00
parent 7facea48b2
commit 2fc3ce22de
1658 changed files with 25191 additions and 42351 deletions
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64
src/ftm1/c2sc/mod.rs
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@ -22,7 +22,9 @@ impl super::C2SC {
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R { bits: self.register.get() }
R {
bits: self.register.get(),
}
}
#[doc = r" Writes to the register"]
#[inline]
@ -43,10 +45,8 @@ impl super::C2SC {
#[doc = "Possible values of the field `DMA`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum DMAR {
#[doc = "Disable DMA transfers."]
_0,
#[doc = "Enable DMA transfers."]
_1,
#[doc = "Disable DMA transfers."] _0,
#[doc = "Enable DMA transfers."] _1,
}
impl DMAR {
#[doc = r" Returns `true` if the bit is clear (0)"]
@ -90,10 +90,8 @@ impl DMAR {
#[doc = "Possible values of the field `ICRST`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum ICRSTR {
#[doc = "FTM counter is not reset when the selected channel (n) input event is detected."]
_0,
#[doc = "FTM counter is reset when the selected channel (n) input event is detected."]
_1,
#[doc = "FTM counter is not reset when the selected channel (n) input event is detected."] _0,
#[doc = "FTM counter is reset when the selected channel (n) input event is detected."] _1,
}
impl ICRSTR {
#[doc = r" Returns `true` if the bit is clear (0)"]
@ -221,10 +219,8 @@ impl MSBR {
#[doc = "Possible values of the field `CHIE`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum CHIER {
#[doc = "Disable channel (n) interrupt. Use software polling."]
_0,
#[doc = "Enable channel (n) interrupt."]
_1,
#[doc = "Disable channel (n) interrupt. Use software polling."] _0,
#[doc = "Enable channel (n) interrupt."] _1,
}
impl CHIER {
#[doc = r" Returns `true` if the bit is clear (0)"]
@ -268,10 +264,8 @@ impl CHIER {
#[doc = "Possible values of the field `CHF`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum CHFR {
#[doc = "No channel (n) event has occurred."]
_0,
#[doc = "A channel (n) event has occurred."]
_1,
#[doc = "No channel (n) event has occurred."] _0,
#[doc = "A channel (n) event has occurred."] _1,
}
impl CHFR {
#[doc = r" Returns `true` if the bit is clear (0)"]
@ -315,8 +309,7 @@ impl CHFR {
#[doc = "Possible values of the field `TRIGMODE`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum TRIGMODER {
#[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."]
_0,
#[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."] _0,
#[doc = "If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
_1,
}
@ -362,10 +355,8 @@ impl TRIGMODER {
#[doc = "Possible values of the field `CHIS`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum CHISR {
#[doc = "The channel (n) input is zero."]
_0,
#[doc = "The channel (n) input is one."]
_1,
#[doc = "The channel (n) input is zero."] _0,
#[doc = "The channel (n) input is one."] _1,
}
impl CHISR {
#[doc = r" Returns `true` if the bit is clear (0)"]
@ -409,10 +400,8 @@ impl CHISR {
#[doc = "Possible values of the field `CHOV`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum CHOVR {
#[doc = "The channel (n) output is zero."]
_0,
#[doc = "The channel (n) output is one."]
_1,
#[doc = "The channel (n) output is zero."] _0,
#[doc = "The channel (n) output is one."] _1,
}
impl CHOVR {
#[doc = r" Returns `true` if the bit is clear (0)"]
@ -455,10 +444,8 @@ impl CHOVR {
}
#[doc = "Values that can be written to the field `DMA`"]
pub enum DMAW {
#[doc = "Disable DMA transfers."]
_0,
#[doc = "Enable DMA transfers."]
_1,
#[doc = "Disable DMA transfers."] _0,
#[doc = "Enable DMA transfers."] _1,
}
impl DMAW {
#[allow(missing_docs)]
@ -513,10 +500,8 @@ impl<'a> _DMAW<'a> {
}
#[doc = "Values that can be written to the field `ICRST`"]
pub enum ICRSTW {
#[doc = "FTM counter is not reset when the selected channel (n) input event is detected."]
_0,
#[doc = "FTM counter is reset when the selected channel (n) input event is detected."]
_1,
#[doc = "FTM counter is not reset when the selected channel (n) input event is detected."] _0,
#[doc = "FTM counter is reset when the selected channel (n) input event is detected."] _1,
}
impl ICRSTW {
#[allow(missing_docs)]
@ -663,10 +648,8 @@ impl<'a> _MSBW<'a> {
}
#[doc = "Values that can be written to the field `CHIE`"]
pub enum CHIEW {
#[doc = "Disable channel (n) interrupt. Use software polling."]
_0,
#[doc = "Enable channel (n) interrupt."]
_1,
#[doc = "Disable channel (n) interrupt. Use software polling."] _0,
#[doc = "Enable channel (n) interrupt."] _1,
}
impl CHIEW {
#[allow(missing_docs)]
@ -721,8 +704,7 @@ impl<'a> _CHIEW<'a> {
}
#[doc = "Values that can be written to the field `TRIGMODE`"]
pub enum TRIGMODEW {
#[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."]
_0,
#[doc = "Channel outputs will generate the normal PWM outputs without generating a pulse."] _0,
#[doc = "If a match in the channel occurs, a trigger generation on channel output will happen. The trigger pulse width has one FTM clock cycle."]
_1,
}