2017-09-23 18:09:53 +00:00
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#[doc = r" Value read from the register"]
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pub struct R {
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bits: u32,
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}
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#[doc = r" Value to write to the register"]
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pub struct W {
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bits: u32,
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}
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impl super::TCR {
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#[doc = r" Modifies the contents of the register"]
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#[inline]
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pub fn modify<F>(&self, f: F)
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where
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for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
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{
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let bits = self.register.get();
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let r = R { bits: bits };
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let mut w = W { bits: bits };
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f(&r, &mut w);
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self.register.set(w.bits);
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}
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#[doc = r" Reads the contents of the register"]
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#[inline]
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pub fn read(&self) -> R {
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2019-01-16 14:39:25 +00:00
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R { bits: self.register.get() }
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2017-09-23 18:09:53 +00:00
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}
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#[doc = r" Writes to the register"]
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#[inline]
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pub fn write<F>(&self, f: F)
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where
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F: FnOnce(&mut W) -> &mut W,
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{
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let mut w = W::reset_value();
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f(&mut w);
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self.register.set(w.bits);
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}
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#[doc = r" Writes the reset value to the register"]
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#[inline]
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pub fn reset(&self) {
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self.write(|w| w)
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}
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}
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#[doc = "Possible values of the field `TCR`"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum TCRR {
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2018-02-06 14:15:10 +00:00
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#[doc = "Time Prescaler Register overflows every 32896 clock cycles."]
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_10000000,
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#[doc = "Time Prescaler Register overflows every 32895 clock cycles."]
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_10000001,
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#[doc = "Time Prescaler Register overflows every 32769 clock cycles."]
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_11111111,
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#[doc = "Time Prescaler Register overflows every 32768 clock cycles."]
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_00000000,
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#[doc = "Time Prescaler Register overflows every 32767 clock cycles."]
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_00000001,
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#[doc = "Time Prescaler Register overflows every 32642 clock cycles."]
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_01111110,
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#[doc = "Time Prescaler Register overflows every 32641 clock cycles."]
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_01111111,
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#[doc = r" Reserved"]
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_Reserved(u8),
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2017-09-23 18:09:53 +00:00
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}
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impl TCRR {
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#[doc = r" Value of the field as raw bits"]
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#[inline]
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pub fn bits(&self) -> u8 {
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match *self {
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TCRR::_10000000 => 128,
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TCRR::_10000001 => 129,
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TCRR::_11111111 => 255,
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TCRR::_00000000 => 0,
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TCRR::_00000001 => 1,
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TCRR::_01111110 => 126,
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TCRR::_01111111 => 127,
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TCRR::_Reserved(bits) => bits,
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}
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}
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#[allow(missing_docs)]
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#[doc(hidden)]
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#[inline]
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pub fn _from(value: u8) -> TCRR {
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match value {
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128 => TCRR::_10000000,
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129 => TCRR::_10000001,
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255 => TCRR::_11111111,
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0 => TCRR::_00000000,
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1 => TCRR::_00000001,
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126 => TCRR::_01111110,
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127 => TCRR::_01111111,
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i => TCRR::_Reserved(i),
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}
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}
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#[doc = "Checks if the value of the field is `_10000000`"]
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#[inline]
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pub fn is_10000000(&self) -> bool {
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*self == TCRR::_10000000
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}
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#[doc = "Checks if the value of the field is `_10000001`"]
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#[inline]
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pub fn is_10000001(&self) -> bool {
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*self == TCRR::_10000001
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}
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#[doc = "Checks if the value of the field is `_11111111`"]
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#[inline]
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pub fn is_11111111(&self) -> bool {
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*self == TCRR::_11111111
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}
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#[doc = "Checks if the value of the field is `_00000000`"]
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#[inline]
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pub fn is_00000000(&self) -> bool {
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*self == TCRR::_00000000
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}
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#[doc = "Checks if the value of the field is `_00000001`"]
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#[inline]
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pub fn is_00000001(&self) -> bool {
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*self == TCRR::_00000001
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}
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#[doc = "Checks if the value of the field is `_01111110`"]
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#[inline]
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pub fn is_01111110(&self) -> bool {
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*self == TCRR::_01111110
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}
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#[doc = "Checks if the value of the field is `_01111111`"]
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#[inline]
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pub fn is_01111111(&self) -> bool {
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*self == TCRR::_01111111
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}
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}
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#[doc = r" Value of the field"]
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pub struct CIRR {
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bits: u8,
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}
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impl CIRR {
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#[doc = r" Value of the field as raw bits"]
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#[inline]
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pub fn bits(&self) -> u8 {
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self.bits
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}
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}
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#[doc = r" Value of the field"]
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pub struct TCVR {
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bits: u8,
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}
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impl TCVR {
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#[doc = r" Value of the field as raw bits"]
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#[inline]
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pub fn bits(&self) -> u8 {
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self.bits
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}
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}
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#[doc = r" Value of the field"]
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pub struct CICR {
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bits: u8,
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}
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impl CICR {
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#[doc = r" Value of the field as raw bits"]
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#[inline]
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pub fn bits(&self) -> u8 {
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self.bits
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}
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}
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#[doc = "Values that can be written to the field `TCR`"]
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pub enum TCRW {
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2018-02-06 14:15:10 +00:00
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#[doc = "Time Prescaler Register overflows every 32896 clock cycles."]
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_10000000,
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#[doc = "Time Prescaler Register overflows every 32895 clock cycles."]
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_10000001,
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#[doc = "Time Prescaler Register overflows every 32769 clock cycles."]
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_11111111,
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#[doc = "Time Prescaler Register overflows every 32768 clock cycles."]
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_00000000,
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#[doc = "Time Prescaler Register overflows every 32767 clock cycles."]
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_00000001,
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#[doc = "Time Prescaler Register overflows every 32642 clock cycles."]
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_01111110,
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#[doc = "Time Prescaler Register overflows every 32641 clock cycles."]
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_01111111,
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2017-09-23 18:09:53 +00:00
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}
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impl TCRW {
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#[allow(missing_docs)]
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#[doc(hidden)]
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#[inline]
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pub fn _bits(&self) -> u8 {
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match *self {
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TCRW::_10000000 => 128,
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TCRW::_10000001 => 129,
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TCRW::_11111111 => 255,
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TCRW::_00000000 => 0,
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TCRW::_00000001 => 1,
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TCRW::_01111110 => 126,
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TCRW::_01111111 => 127,
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}
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}
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}
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#[doc = r" Proxy"]
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pub struct _TCRW<'a> {
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w: &'a mut W,
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}
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impl<'a> _TCRW<'a> {
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#[doc = r" Writes `variant` to the field"]
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#[inline]
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pub fn variant(self, variant: TCRW) -> &'a mut W {
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unsafe { self.bits(variant._bits()) }
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}
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#[doc = "Time Prescaler Register overflows every 32896 clock cycles."]
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#[inline]
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pub fn _10000000(self) -> &'a mut W {
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self.variant(TCRW::_10000000)
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}
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#[doc = "Time Prescaler Register overflows every 32895 clock cycles."]
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#[inline]
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pub fn _10000001(self) -> &'a mut W {
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self.variant(TCRW::_10000001)
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}
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#[doc = "Time Prescaler Register overflows every 32769 clock cycles."]
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#[inline]
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pub fn _11111111(self) -> &'a mut W {
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self.variant(TCRW::_11111111)
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}
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#[doc = "Time Prescaler Register overflows every 32768 clock cycles."]
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#[inline]
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pub fn _00000000(self) -> &'a mut W {
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self.variant(TCRW::_00000000)
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}
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#[doc = "Time Prescaler Register overflows every 32767 clock cycles."]
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#[inline]
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pub fn _00000001(self) -> &'a mut W {
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self.variant(TCRW::_00000001)
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}
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#[doc = "Time Prescaler Register overflows every 32642 clock cycles."]
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#[inline]
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pub fn _01111110(self) -> &'a mut W {
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self.variant(TCRW::_01111110)
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}
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#[doc = "Time Prescaler Register overflows every 32641 clock cycles."]
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#[inline]
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pub fn _01111111(self) -> &'a mut W {
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self.variant(TCRW::_01111111)
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}
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#[doc = r" Writes raw bits to the field"]
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#[inline]
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pub unsafe fn bits(self, value: u8) -> &'a mut W {
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const MASK: u8 = 255;
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const OFFSET: u8 = 0;
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self.w.bits &= !((MASK as u32) << OFFSET);
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self.w.bits |= ((value & MASK) as u32) << OFFSET;
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self.w
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}
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}
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#[doc = r" Proxy"]
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pub struct _CIRW<'a> {
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w: &'a mut W,
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}
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impl<'a> _CIRW<'a> {
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#[doc = r" Writes raw bits to the field"]
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#[inline]
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pub unsafe fn bits(self, value: u8) -> &'a mut W {
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const MASK: u8 = 255;
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const OFFSET: u8 = 8;
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self.w.bits &= !((MASK as u32) << OFFSET);
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self.w.bits |= ((value & MASK) as u32) << OFFSET;
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self.w
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}
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}
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impl R {
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#[doc = r" Value of the register as raw bits"]
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#[inline]
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pub fn bits(&self) -> u32 {
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self.bits
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}
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#[doc = "Bits 0:7 - Time Compensation Register"]
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#[inline]
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pub fn tcr(&self) -> TCRR {
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TCRR::_from({
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const MASK: u8 = 255;
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const OFFSET: u8 = 0;
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((self.bits >> OFFSET) & MASK as u32) as u8
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})
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}
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#[doc = "Bits 8:15 - Compensation Interval Register"]
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#[inline]
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pub fn cir(&self) -> CIRR {
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let bits = {
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const MASK: u8 = 255;
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const OFFSET: u8 = 8;
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((self.bits >> OFFSET) & MASK as u32) as u8
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};
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CIRR { bits }
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}
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#[doc = "Bits 16:23 - Time Compensation Value"]
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#[inline]
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pub fn tcv(&self) -> TCVR {
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let bits = {
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const MASK: u8 = 255;
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const OFFSET: u8 = 16;
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((self.bits >> OFFSET) & MASK as u32) as u8
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};
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TCVR { bits }
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}
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#[doc = "Bits 24:31 - Compensation Interval Counter"]
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#[inline]
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pub fn cic(&self) -> CICR {
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let bits = {
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const MASK: u8 = 255;
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const OFFSET: u8 = 24;
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((self.bits >> OFFSET) & MASK as u32) as u8
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};
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CICR { bits }
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}
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}
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impl W {
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#[doc = r" Reset value of the register"]
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#[inline]
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pub fn reset_value() -> W {
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W { bits: 0 }
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}
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#[doc = r" Writes raw bits to the register"]
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#[inline]
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pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
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self.bits = bits;
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self
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}
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#[doc = "Bits 0:7 - Time Compensation Register"]
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#[inline]
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pub fn tcr(&mut self) -> _TCRW {
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_TCRW { w: self }
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}
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#[doc = "Bits 8:15 - Compensation Interval Register"]
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#[inline]
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pub fn cir(&mut self) -> _CIRW {
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_CIRW { w: self }
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}
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}
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