2017-09-23 18:09:53 +00:00
|
|
|
#[doc = r" Register block"]
|
|
|
|
#[repr(C)]
|
|
|
|
pub struct RegisterBlock {
|
2018-02-06 14:15:10 +00:00
|
|
|
#[doc = "0x00 - Version ID Register"]
|
|
|
|
pub verid: VERID,
|
|
|
|
#[doc = "0x04 - Parameter Register"]
|
|
|
|
pub param: PARAM,
|
2017-09-23 18:09:53 +00:00
|
|
|
_reserved0: [u8; 8usize],
|
2018-02-06 14:15:10 +00:00
|
|
|
#[doc = "0x10 - Clock Status Register"]
|
|
|
|
pub csr: CSR,
|
|
|
|
#[doc = "0x14 - Run Clock Control Register"]
|
|
|
|
pub rccr: RCCR,
|
|
|
|
#[doc = "0x18 - VLPR Clock Control Register"]
|
|
|
|
pub vccr: VCCR,
|
|
|
|
#[doc = "0x1c - HSRUN Clock Control Register"]
|
|
|
|
pub hccr: HCCR,
|
|
|
|
#[doc = "0x20 - SCG CLKOUT Configuration Register"]
|
|
|
|
pub clkoutcnfg: CLKOUTCNFG,
|
2017-09-23 18:09:53 +00:00
|
|
|
_reserved1: [u8; 220usize],
|
2018-02-06 14:15:10 +00:00
|
|
|
#[doc = "0x100 - System OSC Control Status Register"]
|
|
|
|
pub sosccsr: SOSCCSR,
|
|
|
|
#[doc = "0x104 - System OSC Divide Register"]
|
|
|
|
pub soscdiv: SOSCDIV,
|
|
|
|
#[doc = "0x108 - System Oscillator Configuration Register"]
|
|
|
|
pub sosccfg: SOSCCFG,
|
2017-09-23 18:09:53 +00:00
|
|
|
_reserved2: [u8; 244usize],
|
2018-02-06 14:15:10 +00:00
|
|
|
#[doc = "0x200 - Slow IRC Control Status Register"]
|
|
|
|
pub sirccsr: SIRCCSR,
|
|
|
|
#[doc = "0x204 - Slow IRC Divide Register"]
|
|
|
|
pub sircdiv: SIRCDIV,
|
|
|
|
#[doc = "0x208 - Slow IRC Configuration Register"]
|
|
|
|
pub sirccfg: SIRCCFG,
|
2017-09-23 18:09:53 +00:00
|
|
|
_reserved3: [u8; 244usize],
|
2018-02-06 14:15:10 +00:00
|
|
|
#[doc = "0x300 - Fast IRC Control Status Register"]
|
|
|
|
pub firccsr: FIRCCSR,
|
|
|
|
#[doc = "0x304 - Fast IRC Divide Register"]
|
|
|
|
pub fircdiv: FIRCDIV,
|
|
|
|
#[doc = "0x308 - Fast IRC Configuration Register"]
|
|
|
|
pub firccfg: FIRCCFG,
|
2017-09-23 18:09:53 +00:00
|
|
|
_reserved4: [u8; 756usize],
|
2018-02-06 14:15:10 +00:00
|
|
|
#[doc = "0x600 - System PLL Control Status Register"]
|
|
|
|
pub spllcsr: SPLLCSR,
|
|
|
|
#[doc = "0x604 - System PLL Divide Register"]
|
|
|
|
pub splldiv: SPLLDIV,
|
|
|
|
#[doc = "0x608 - System PLL Configuration Register"]
|
|
|
|
pub spllcfg: SPLLCFG,
|
2017-09-23 18:09:53 +00:00
|
|
|
}
|
|
|
|
#[doc = "Version ID Register"]
|
|
|
|
pub struct VERID {
|
2019-01-16 14:39:25 +00:00
|
|
|
register: ::vcell::VolatileCell<u32>,
|
2017-09-23 18:09:53 +00:00
|
|
|
}
|
|
|
|
#[doc = "Version ID Register"]
|
|
|
|
pub mod verid;
|
|
|
|
#[doc = "Parameter Register"]
|
|
|
|
pub struct PARAM {
|
2019-01-16 14:39:25 +00:00
|
|
|
register: ::vcell::VolatileCell<u32>,
|
2017-09-23 18:09:53 +00:00
|
|
|
}
|
|
|
|
#[doc = "Parameter Register"]
|
|
|
|
pub mod param;
|
|
|
|
#[doc = "Clock Status Register"]
|
|
|
|
pub struct CSR {
|
2019-01-16 14:39:25 +00:00
|
|
|
register: ::vcell::VolatileCell<u32>,
|
2017-09-23 18:09:53 +00:00
|
|
|
}
|
|
|
|
#[doc = "Clock Status Register"]
|
|
|
|
pub mod csr;
|
|
|
|
#[doc = "Run Clock Control Register"]
|
|
|
|
pub struct RCCR {
|
2019-01-16 14:39:25 +00:00
|
|
|
register: ::vcell::VolatileCell<u32>,
|
2017-09-23 18:09:53 +00:00
|
|
|
}
|
|
|
|
#[doc = "Run Clock Control Register"]
|
|
|
|
pub mod rccr;
|
|
|
|
#[doc = "VLPR Clock Control Register"]
|
|
|
|
pub struct VCCR {
|
2019-01-16 14:39:25 +00:00
|
|
|
register: ::vcell::VolatileCell<u32>,
|
2017-09-23 18:09:53 +00:00
|
|
|
}
|
|
|
|
#[doc = "VLPR Clock Control Register"]
|
|
|
|
pub mod vccr;
|
|
|
|
#[doc = "HSRUN Clock Control Register"]
|
|
|
|
pub struct HCCR {
|
2019-01-16 14:39:25 +00:00
|
|
|
register: ::vcell::VolatileCell<u32>,
|
2017-09-23 18:09:53 +00:00
|
|
|
}
|
|
|
|
#[doc = "HSRUN Clock Control Register"]
|
|
|
|
pub mod hccr;
|
|
|
|
#[doc = "SCG CLKOUT Configuration Register"]
|
|
|
|
pub struct CLKOUTCNFG {
|
2019-01-16 14:39:25 +00:00
|
|
|
register: ::vcell::VolatileCell<u32>,
|
2017-09-23 18:09:53 +00:00
|
|
|
}
|
|
|
|
#[doc = "SCG CLKOUT Configuration Register"]
|
|
|
|
pub mod clkoutcnfg;
|
|
|
|
#[doc = "System OSC Control Status Register"]
|
|
|
|
pub struct SOSCCSR {
|
2019-01-16 14:39:25 +00:00
|
|
|
register: ::vcell::VolatileCell<u32>,
|
2017-09-23 18:09:53 +00:00
|
|
|
}
|
|
|
|
#[doc = "System OSC Control Status Register"]
|
|
|
|
pub mod sosccsr;
|
|
|
|
#[doc = "System OSC Divide Register"]
|
|
|
|
pub struct SOSCDIV {
|
2019-01-16 14:39:25 +00:00
|
|
|
register: ::vcell::VolatileCell<u32>,
|
2017-09-23 18:09:53 +00:00
|
|
|
}
|
|
|
|
#[doc = "System OSC Divide Register"]
|
|
|
|
pub mod soscdiv;
|
|
|
|
#[doc = "System Oscillator Configuration Register"]
|
|
|
|
pub struct SOSCCFG {
|
2019-01-16 14:39:25 +00:00
|
|
|
register: ::vcell::VolatileCell<u32>,
|
2017-09-23 18:09:53 +00:00
|
|
|
}
|
|
|
|
#[doc = "System Oscillator Configuration Register"]
|
|
|
|
pub mod sosccfg;
|
|
|
|
#[doc = "Slow IRC Control Status Register"]
|
|
|
|
pub struct SIRCCSR {
|
2019-01-16 14:39:25 +00:00
|
|
|
register: ::vcell::VolatileCell<u32>,
|
2017-09-23 18:09:53 +00:00
|
|
|
}
|
|
|
|
#[doc = "Slow IRC Control Status Register"]
|
|
|
|
pub mod sirccsr;
|
|
|
|
#[doc = "Slow IRC Divide Register"]
|
|
|
|
pub struct SIRCDIV {
|
2019-01-16 14:39:25 +00:00
|
|
|
register: ::vcell::VolatileCell<u32>,
|
2017-09-23 18:09:53 +00:00
|
|
|
}
|
|
|
|
#[doc = "Slow IRC Divide Register"]
|
|
|
|
pub mod sircdiv;
|
|
|
|
#[doc = "Slow IRC Configuration Register"]
|
|
|
|
pub struct SIRCCFG {
|
2019-01-16 14:39:25 +00:00
|
|
|
register: ::vcell::VolatileCell<u32>,
|
2017-09-23 18:09:53 +00:00
|
|
|
}
|
|
|
|
#[doc = "Slow IRC Configuration Register"]
|
|
|
|
pub mod sirccfg;
|
|
|
|
#[doc = "Fast IRC Control Status Register"]
|
|
|
|
pub struct FIRCCSR {
|
2019-01-16 14:39:25 +00:00
|
|
|
register: ::vcell::VolatileCell<u32>,
|
2017-09-23 18:09:53 +00:00
|
|
|
}
|
|
|
|
#[doc = "Fast IRC Control Status Register"]
|
|
|
|
pub mod firccsr;
|
|
|
|
#[doc = "Fast IRC Divide Register"]
|
|
|
|
pub struct FIRCDIV {
|
2019-01-16 14:39:25 +00:00
|
|
|
register: ::vcell::VolatileCell<u32>,
|
2017-09-23 18:09:53 +00:00
|
|
|
}
|
|
|
|
#[doc = "Fast IRC Divide Register"]
|
|
|
|
pub mod fircdiv;
|
|
|
|
#[doc = "Fast IRC Configuration Register"]
|
|
|
|
pub struct FIRCCFG {
|
2019-01-16 14:39:25 +00:00
|
|
|
register: ::vcell::VolatileCell<u32>,
|
2017-09-23 18:09:53 +00:00
|
|
|
}
|
|
|
|
#[doc = "Fast IRC Configuration Register"]
|
|
|
|
pub mod firccfg;
|
|
|
|
#[doc = "System PLL Control Status Register"]
|
|
|
|
pub struct SPLLCSR {
|
2019-01-16 14:39:25 +00:00
|
|
|
register: ::vcell::VolatileCell<u32>,
|
2017-09-23 18:09:53 +00:00
|
|
|
}
|
|
|
|
#[doc = "System PLL Control Status Register"]
|
|
|
|
pub mod spllcsr;
|
|
|
|
#[doc = "System PLL Divide Register"]
|
|
|
|
pub struct SPLLDIV {
|
2019-01-16 14:39:25 +00:00
|
|
|
register: ::vcell::VolatileCell<u32>,
|
2017-09-23 18:09:53 +00:00
|
|
|
}
|
|
|
|
#[doc = "System PLL Divide Register"]
|
|
|
|
pub mod splldiv;
|
|
|
|
#[doc = "System PLL Configuration Register"]
|
|
|
|
pub struct SPLLCFG {
|
2019-01-16 14:39:25 +00:00
|
|
|
register: ::vcell::VolatileCell<u32>,
|
2017-09-23 18:09:53 +00:00
|
|
|
}
|
|
|
|
#[doc = "System PLL Configuration Register"]
|
|
|
|
pub mod spllcfg;
|