xobs/foboot
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2fd01b8303
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16 Commits

Author SHA1 Message Date
Sean Cross
2fd01b8303 foboot-bitstream: more help description, add dvt support 
Signed-off-by: Sean Cross <sean@xobs.io>
 2019-04-01 10:09:20 +08:00
Sean Cross
7191c12490 wip: just need to get WARMBOOT working 
Signed-off-by: Sean Cross <sean@xobs.io>
 2019-03-28 11:11:36 +08:00
Sean Cross
3d6acaf51e sw: wip commit -- getting dfu working 
Now that we have SPI and USB both working, we can start to close the
loop and get DFU working.

Signed-off-by: Sean Cross <sean@xobs.io>
 2019-03-25 17:39:06 +08:00
Sean Cross
23b9962067 hw: foboot-bitstream: remove pmod debug comments 
Signed-off-by: Sean Cross <sean@xobs.io>
 2019-03-20 13:12:53 +08:00
Sean Cross
fa690d63ed hw: foboot-bitstream: clean up debug generation 
Signed-off-by: Sean Cross <sean@xobs.io>
 2019-03-20 13:12:29 +08:00
Sean Cross
4f0507fc77 hw: foboot-bitstream: remove "generating firmware" message 
Signed-off-by: Sean Cross <sean@xobs.io>
 2019-03-20 13:12:08 +08:00
Sean Cross
f3d779787b hw: foboot-bitstream: add reset to usb_48 
This is required to meet timing.

Signed-off-by: Sean Cross <sean@xobs.io>
 2019-03-20 13:11:45 +08:00
Sean Cross
b09333f023 hw: add spi and new vexriscv to foboot 
This is the beginning of having SPI.

Also add a new two-stage pipeline.

Signed-off-by: Sean Cross <sean@xobs.io>
 2019-03-20 11:25:09 +08:00
Sean Cross
2d7c7794f5 hw: foboot-bitstream: remove debug pins, use epfifo 
Remove the debug pins to let timing close.

Signed-off-by: Sean Cross <sean@xobs.io>
 2019-03-10 21:06:37 +08:00
Sean Cross
0c6e444789 hw: foboot-bitstream: add -relut and friends to nextpnr 
Shrink the resulting gate count by adding -relut and adjusting the
number of luts that a CE signal can use.

Signed-off-by: Sean Cross <sean@xobs.io>
 2019-03-10 21:05:51 +08:00
Sean Cross
8aed600cd6 hw: foboot-bitstream: specify additional clock domain constraints 
Specify all the clock domain constraints for every possible signal, to
work around the fact that nextpnr currently will pick one and ignore the
rest.

Signed-off-by: Sean Cross <sean@xobs.io>
 2019-03-10 21:05:12 +08:00
Sean Cross
6638801886 hw: foboot-bitstream: remove clk48_in signal 
It's unused.

Signed-off-by: Sean Cross <sean@xobs.io>
 2019-03-10 21:04:19 +08:00
Sean Cross
8fb6b5977b hw: foboot-bitstream: remove unused clk48 net 
We only use the raw and usb48 nets.

Signed-off-by: Sean Cross <sean@xobs.io>
 2019-03-10 20:53:58 +08:00
Sean Cross
d603113b6f foboot-bitstream: send clk48 through shifter, then through pll 
Signed-off-by: Sean Cross <sean@xobs.io>
 2019-03-08 20:47:42 +08:00
Sean Cross
3df59a866d metastable fix: wip 
Trying to figure out what's causing this problem.

Signed-off-by: Sean Cross <sean@xobs.io>
 2019-03-05 20:28:54 +08:00
Sean Cross
8fe27d9371 Add 'hw/' from commit 'd812378c4d61f7c957ac4bcba15a8344fb7fb458' 
git-subtree-dir: hw
git-subtree-mainline: e4af98b4aa
git-subtree-split: d812378c4d
 2019-03-05 09:05:50 +08:00