Sean Cross 9e6faf4456 sch: mark VCCPLL regulator as DNP, use filter circuit ... The VCCPLL line is extraordinarily sensitive to voltage rise times, and appears to cause the FPGA to go into latchup very very easily. As a result, the VCCPLL regulator burns all 250 mA of its budget constantly, as the FPGA shunts VCCPLL to GND. This would be ideal during an ESD event, but not ideal during normal operations. Indicate the VCCPLL Regulator approach is DNP, and that the VCCPLL Filter Network is preferred. Mostly because the regulator doesn't work at all. Signed-off-by: Sean Cross <sean@xobs.io>		2018-11-23 15:56:35 +08:00
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tomu-fpga.pretty	hardware: library: add oscillator and TVM parts	2018-11-20 22:52:33 +08:00
fp-lib-table	hardware: pcb: add footprint library table	2018-10-31 12:58:07 +08:00
pcb.jpg	hardware: pcb: add initial screenshot	2018-10-31 16:05:54 +08:00
tomu-fpga-cache.lib	sch: mark VCCPLL regulator as DNP, use filter circuit	2018-11-23 15:56:35 +08:00
tomu-fpga.dcm	hardware: dcm: update with rpi header	2018-11-13 10:43:03 +08:00
tomu-fpga.kicad_pcb	pcb: rework pcb with correct footprints, add tvs diodes	2018-11-20 22:51:43 +08:00
tomu-fpga.lib	hardware: lib: add rpi connector to tomu-fpga.lib	2018-11-13 10:35:56 +08:00
tomu-fpga.pro	pcb: hook up more debug wires	2018-10-31 10:45:27 +08:00
tomu-fpga.sch	sch: mark VCCPLL regulator as DNP, use filter circuit	2018-11-23 15:56:35 +08:00