50f783ba42
sch: change name to "Fomu"
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Signed-off-by: Sean Cross <sean@xobs.io>
2018-12-25 12:16:19 +08:00
e7eb26bf16
releases: tag evt3
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Signed-off-by: Sean Cross <sean@xobs.io>
2018-12-25 10:23:52 +08:00
ccd95ea61d
hardware: pcb: update rpi header name
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Signed-off-by: Sean Cross <sean@xobs.io>
2018-12-25 10:23:18 +08:00
10352f9564
hardware: sch: update text to read "evt3"
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Signed-off-by: Sean Cross <sean@xobs.io>
2018-12-25 10:23:05 +08:00
7092711673
pcb: fatten up some traces, mark silk url as evt3
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Signed-off-by: Sean Cross <sean@xobs.io>
2018-12-25 01:10:03 +08:00
4a31da4ef2
pcb: widen up gnd near usb connector
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Make the gnd pour a little bit wider near the USB connector.
Signed-off-by: Sean Cross <sean@xobs.io>
2018-12-25 00:58:18 +08:00
24f141a272
pcb: ECO003: don't put copper or solder mask on USB underside
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Leave bare FR4 on the underside of the USB connector, so there isn't
anything to scrape off.
Signed-off-by: Sean Cross <sean@xobs.io>
2018-12-25 00:55:25 +08:00
869536cf72
pcb: ECO002 / ECO004: update pcb with second pmod, swap dat4
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Signed-off-by: Sean Cross <sean@xobs.io>
2018-12-25 00:37:31 +08:00
83d368c34e
sch: ECO004: add PMODb, swap PMODa_1 and DAT4
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Swap PMODa_1 and DAT4 so that PMODa gets two I3C-capable pins.
Signed-off-by: Sean Cross <sean@xobs.io>
2018-12-25 00:37:21 +08:00
f8324c73f0
pcb: eco001: swap R3/R13 designators
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They were crossed somehow.
Signed-off-by: Sean Cross <sean@xobs.io>
2018-12-24 17:32:05 +08:00
cd4d928adb
hardware: sch: fix up DNP columns
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Mark parts as DNP with an "X" in the "DNP" column.
Signed-off-by: Sean Cross <sean@xobs.io>
2018-11-29 08:52:07 -05:00
9fe1b36c6b
hardware: releases: evt2: update "DNP" columns
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We weren't marking every DNP column correctly.
Signed-off-by: Sean Cross <sean@xobs.io>
2018-11-29 08:51:38 -05:00
c02bb8bb2b
hardware: footprints: mark various things as virtual
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Signed-off-by: Sean Cross <sean@xobs.io>
2018-11-24 16:56:21 -05:00
1e9391c679
releases: evt2: regenerate file after marking "virtual" components
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Signed-off-by: Sean Cross <sean@xobs.io>
2018-11-24 16:55:50 -05:00
9dd84bc90c
releases: regenerate evt2 with proper bom file
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Signed-off-by: Sean Cross <sean@xobs.io>
2018-11-24 16:52:08 -05:00
7dd7b9d915
hardware: pcb: update footprint SMT flags for diodes
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Signed-off-by: Sean Cross <sean@xobs.io>
2018-11-24 16:51:35 -05:00
dd030c6333
hardware: footprints: make smt components "SMT"
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Mark these components as "SMT" rather than "through-hole", which causes
them to be included in the pick-and-place file.
Signed-off-by: Sean Cross <sean@xobs.io>
2018-11-24 16:50:57 -05:00
b39f62f812
pcb: no changes
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This appears to be kicad deciding to rewrite the whole file for no
particular reason.
Signed-off-by: Sean Cross <sean@xobs.io>
2018-11-24 15:25:01 -05:00
b354879d66
pcb: redo evt2 with "pin 1" dots as circles
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Redo the "pin 1" dots so they are circle graphcs and not pads, which
don't seem to render in most Gerber files.
Signed-off-by: Sean Cross <sean@xobs.io>
2018-11-25 04:22:44 +08:00
8544a55853
releases: evt2: commit evt2 release of PCB
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This fixes the XTAL footprint, the SPI FLASH footprint, and depopulates
the VCCPLL Regulator in favor of the VCCPLL Filter Network.
Signed-off-by: Sean Cross <sean@xobs.io>
2018-11-23 16:26:22 +08:00
f84237a9e5
hardware: footprints: add model for 5V TVM diode
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Signed-off-by: Sean Cross <sean@xobs.io>
2018-11-23 16:26:05 +08:00
29d29111d3
hardware: pcb: commit evt2 version of pcb
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Signed-off-by: Sean Cross <sean@xobs.io>
2018-11-23 16:25:39 +08:00
84990ef80e
hardware: pcb: redo dbg numbering and add silk to rpi header
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Redo the numbering for the dbg pins. While we're at it, add some silk
to the Raspberry Pi header so that we know what we're looking at.
Signed-off-by: Sean Cross <sean@xobs.io>
2018-11-23 16:14:46 +08:00
c9d52e9802
hardware: sch: re-number DBG pins to be consecutive
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Since there are only 6 pins, it doesn't make sense to have numbers such
as "DBG_10" and "DBG_9" anymore.
Signed-off-by: Sean Cross <sean@xobs.io>
2018-11-23 16:13:29 +08:00
f318629747
hardware: sch: update designation to EVT2
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Signed-off-by: Sean Cross <sean@xobs.io>
2018-11-23 15:59:28 +08:00
9e6faf4456
sch: mark VCCPLL regulator as DNP, use filter circuit
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The VCCPLL line is extraordinarily sensitive to voltage rise times, and
appears to cause the FPGA to go into latchup very very easily.
As a result, the VCCPLL regulator burns all 250 mA of its budget
constantly, as the FPGA shunts VCCPLL to GND. This would be ideal
during an ESD event, but not ideal during normal operations.
Indicate the VCCPLL Regulator approach is DNP, and that the VCCPLL
Filter Network is preferred. Mostly because the regulator doesn't work
at all.
Signed-off-by: Sean Cross <sean@xobs.io>
2018-11-23 15:56:35 +08:00
fbd26383f8
hardware: evt1a: work-in-progress charactarization
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Signed-off-by: Sean Cross <sean@xobs.io>
2018-11-23 11:40:31 +08:00
d61d45f516
hardware: add some misc notes about evt
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Signed-off-by: Sean Cross <sean@xobs.io>
2018-11-20 22:53:13 +08:00
6cc58eee66
hardware: library: add oscillator and TVM parts
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Signed-off-by: Sean Cross <sean@xobs.io>
2018-11-20 22:52:33 +08:00
6a392e57d2
pcb: rework pcb with correct footprints, add tvs diodes
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Add TVS diodes, so we make sure they work.
Also, rework the PCB so that the clock actually functions now.
Signed-off-by: Sean Cross <sean@xobs.io>
2018-11-20 22:51:43 +08:00
1f878d4fe6
hardware: footprints: fix SOIC-8
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This footprint was completely incorrect. The footprint appears to be
for a SON-8 not a SOIC-8.
Signed-off-by: Sean Cross <sean@xobs.io>
2018-11-19 22:29:48 +08:00
6b0d4cd082
hardware: footprints: xtal: correct pad orientation
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The footprint was backwards, which lead to some serious performance
issues.
Signed-off-by: Sean Cross <sean@xobs.io>
2018-11-19 21:57:34 +08:00
70c3c758da
hardware: pcb: update footprints and 3d models for pin 1 marker
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Update the footprints so that the pin 1 marker is actually visible by
using silk where possible.
Signed-off-by: Sean Cross <sean@xobs.io>
2018-11-13 10:51:06 +08:00
cd761fe680
hardware: cache: update cached library
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Signed-off-by: Sean Cross <sean@xobs.io>
2018-11-13 10:43:34 +08:00
5d4c48e48d
hardware: dcm: update with rpi header
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Still not sure what this file is, exactly...
Signed-off-by: Sean Cross <sean@xobs.io>
2018-11-13 10:43:03 +08:00
a4cc3b6729
hardware: pretty: remove 3D model from connectors
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On this PCB, these are unpopulated.
Signed-off-by: Sean Cross <sean@xobs.io>
2018-11-13 10:42:31 +08:00
a4fdc6365d
hardware: sch: use local copy of 20pin header
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Signed-off-by: Sean Cross <sean@xobs.io>
2018-11-13 10:41:16 +08:00
836b4c5d86
hardware: lib: add rpi connector to tomu-fpga.lib
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A hedge in case this part gets renamed.
Signed-off-by: Sean Cross <sean@xobs.io>
2018-11-13 10:35:56 +08:00
1f0152ebf0
hardware: sw-spst: replace 3d model with local copy
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This is another example of a 3D model that has gotten moved, causing
kicad to not work between versions. Use a local copy of the 3D model.
Signed-off-by: Sean Cross <sean@xobs.io>
2018-11-13 10:28:06 +08:00
6c54083400
hardware: 3d: add switch model
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Signed-off-by: Sean Cross <sean@xobs.io>
2018-11-13 10:27:39 +08:00
bb8e644b99
hardware: pretty: xtal: replace pin 1 marker pad with drawing
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Signed-off-by: Sean Cross <sean@xobs.io>
2018-11-13 10:24:44 +08:00
bb279832f7
hardware: pretty: led-rgb: replace pin 1 indicator with drawing
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Replace the pin 1 indicator with a drawing, so that kicad will export
it. It was a pad before.
Signed-off-by: Sean Cross <sean@xobs.io>
2018-11-13 10:21:42 +08:00
312cf92730
hardware: pretty: mems: replace pin 1 with drawing
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Replace the pin 1 pad with a drawing, so kicad will export it.
Signed-off-by: Sean Cross <sean@xobs.io>
2018-11-13 10:20:50 +08:00
9fc3dbc90a
hardware: pretty: led: replace pin1 marker with silk
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It turns out that if you put pads down on the silk layer, kicad doesn't
export them. As a result, evt1 had no pin1 marker for this LED.
Signed-off-by: Sean Cross <sean@xobs.io>
2018-11-13 10:19:08 +08:00
b8f4eb8cb3
hardware: pcb: fill pcb
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Re-do the fill, because the last commit was done with an unpoured fill.
Signed-off-by: Sean Cross <sean@xobs.io>
2018-11-10 12:27:38 +08:00
6c95306fbb
hardware: misc kicad-related commits
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Update the cache file, as well as the evt1 xml source file.
Signed-off-by: Sean Cross <sean@xobs.io>
2018-11-10 12:25:48 +08:00
37ff812b49
hardware: pcb: replace "text" with "value" for buttons
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Previously, we used text to display the "5" and "6" designators for the
physical buttons. Replace this with a value of "5" and "6", and remove
the extra text.
Additionally, display "SW??" under the switch, to make hand-assembly
easier.
Do the same thing for the "Reset" button.
Signed-off-by: Sean Cross <sean@xobs.io>
2018-11-10 12:12:13 +08:00
ac7446dc12
hardware: sch: change "value" for user switches
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Change the "Value" of the user switch from "USER1" and "USER2" to "5"
and "6". This way we can use the "Value" as the silk rather than adding
another text layer.
Signed-off-by: Sean Cross <sean@xobs.io>
2018-11-10 12:11:11 +08:00
988566e6c6
releases: evt1: add trimmed BOM
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This BOM only includes components that are used.
Signed-off-by: Sean Cross <sean@xobs.io>
2018-11-10 12:02:33 +08:00
12eed495f2
hardawre: pcb: remove 3D models for headers
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These are nominally DNP, so remove the 3D models to make the render more
accurate.
Signed-off-by: Sean Cross <sean@xobs.io>
2018-11-10 11:35:31 +08:00
