Regenerate crate with svd2rust v0.14.0

src/rtc/cr.rs

@@ -22,9 +22,7 @@ impl super::CR {
     #[doc = r" Reads the contents of the register"]
     #[inline]
     pub fn read(&self) -> R {
-        R {
-            bits: self.register.get(),
-        }
+        R { bits: self.register.get() }
     }
     #[doc = r" Writes to the register"]
     #[inline]
@@ -230,7 +228,7 @@ impl CPSR {
 pub enum LPOSR {
     #[doc = "RTC prescaler increments using 32kHz crystal."]
     _0,
-    #[doc = "RTC prescaler increments using 1kHz LPO, bits [4:0] of the prescaler are ignored."]
+    #[doc = "RTC prescaler increments using 1kHz LPO, bits \\[4:0\\] of the prescaler are ignored."]
     _1,
 }
 impl LPOSR {
@@ -547,7 +545,7 @@ impl<'a> _CPSW<'a> {
 pub enum LPOSW {
     #[doc = "RTC prescaler increments using 32kHz crystal."]
     _0,
-    #[doc = "RTC prescaler increments using 1kHz LPO, bits [4:0] of the prescaler are ignored."]
+    #[doc = "RTC prescaler increments using 1kHz LPO, bits \\[4:0\\] of the prescaler are ignored."]
     _1,
 }
 impl LPOSW {
@@ -578,7 +576,7 @@ impl<'a> _LPOSW<'a> {
     pub fn _0(self) -> &'a mut W {
         self.variant(LPOSW::_0)
     }
-    #[doc = "RTC prescaler increments using 1kHz LPO, bits [4:0] of the prescaler are ignored."]
+    #[doc = "RTC prescaler increments using 1kHz LPO, bits \\[4:0\\] of the prescaler are ignored."]
     #[inline]
     pub fn _1(self) -> &'a mut W {
         self.variant(LPOSW::_1)

src/rtc/ier.rs

@@ -22,9 +22,7 @@ impl super::IER {
     #[doc = r" Reads the contents of the register"]
     #[inline]
     pub fn read(&self) -> R {
-        R {
-            bits: self.register.get(),
-        }
+        R { bits: self.register.get() }
     }
     #[doc = r" Writes to the register"]
     #[inline]

src/rtc/lr.rs

@@ -22,9 +22,7 @@ impl super::LR {
     #[doc = r" Reads the contents of the register"]
     #[inline]
     pub fn read(&self) -> R {
-        R {
-            bits: self.register.get(),
-        }
+        R { bits: self.register.get() }
     }
     #[doc = r" Writes to the register"]
     #[inline]

src/rtc/mod.rs

@@ -1,69 +0,0 @@
-use vcell::VolatileCell;
-#[doc = r" Register block"]
-#[repr(C)]
-pub struct RegisterBlock {
-    #[doc = "0x00 - RTC Time Seconds Register"]
-    pub tsr: TSR,
-    #[doc = "0x04 - RTC Time Prescaler Register"]
-    pub tpr: TPR,
-    #[doc = "0x08 - RTC Time Alarm Register"]
-    pub tar: TAR,
-    #[doc = "0x0c - RTC Time Compensation Register"]
-    pub tcr: TCR,
-    #[doc = "0x10 - RTC Control Register"]
-    pub cr: CR,
-    #[doc = "0x14 - RTC Status Register"]
-    pub sr: SR,
-    #[doc = "0x18 - RTC Lock Register"]
-    pub lr: LR,
-    #[doc = "0x1c - RTC Interrupt Enable Register"]
-    pub ier: IER,
-}
-#[doc = "RTC Time Seconds Register"]
-pub struct TSR {
-    register: VolatileCell<u32>,
-}
-#[doc = "RTC Time Seconds Register"]
-pub mod tsr;
-#[doc = "RTC Time Prescaler Register"]
-pub struct TPR {
-    register: VolatileCell<u32>,
-}
-#[doc = "RTC Time Prescaler Register"]
-pub mod tpr;
-#[doc = "RTC Time Alarm Register"]
-pub struct TAR {
-    register: VolatileCell<u32>,
-}
-#[doc = "RTC Time Alarm Register"]
-pub mod tar;
-#[doc = "RTC Time Compensation Register"]
-pub struct TCR {
-    register: VolatileCell<u32>,
-}
-#[doc = "RTC Time Compensation Register"]
-pub mod tcr;
-#[doc = "RTC Control Register"]
-pub struct CR {
-    register: VolatileCell<u32>,
-}
-#[doc = "RTC Control Register"]
-pub mod cr;
-#[doc = "RTC Status Register"]
-pub struct SR {
-    register: VolatileCell<u32>,
-}
-#[doc = "RTC Status Register"]
-pub mod sr;
-#[doc = "RTC Lock Register"]
-pub struct LR {
-    register: VolatileCell<u32>,
-}
-#[doc = "RTC Lock Register"]
-pub mod lr;
-#[doc = "RTC Interrupt Enable Register"]
-pub struct IER {
-    register: VolatileCell<u32>,
-}
-#[doc = "RTC Interrupt Enable Register"]
-pub mod ier;

src/rtc/sr.rs

@@ -22,9 +22,7 @@ impl super::SR {
     #[doc = r" Reads the contents of the register"]
     #[inline]
     pub fn read(&self) -> R {
-        R {
-            bits: self.register.get(),
-        }
+        R { bits: self.register.get() }
     }
     #[doc = r" Writes to the register"]
     #[inline]

src/rtc/tar.rs

@@ -22,9 +22,7 @@ impl super::TAR {
     #[doc = r" Reads the contents of the register"]
     #[inline]
     pub fn read(&self) -> R {
-        R {
-            bits: self.register.get(),
-        }
+        R { bits: self.register.get() }
     }
     #[doc = r" Writes to the register"]
     #[inline]

src/rtc/tcr.rs

@@ -22,9 +22,7 @@ impl super::TCR {
     #[doc = r" Reads the contents of the register"]
     #[inline]
     pub fn read(&self) -> R {
-        R {
-            bits: self.register.get(),
-        }
+        R { bits: self.register.get() }
     }
     #[doc = r" Writes to the register"]
     #[inline]

src/rtc/tpr.rs

@@ -22,9 +22,7 @@ impl super::TPR {
     #[doc = r" Reads the contents of the register"]
     #[inline]
     pub fn read(&self) -> R {
-        R {
-            bits: self.register.get(),
-        }
+        R { bits: self.register.get() }
     }
     #[doc = r" Writes to the register"]
     #[inline]

src/rtc/tsr.rs

@@ -22,9 +22,7 @@ impl super::TSR {
     #[doc = r" Reads the contents of the register"]
     #[inline]
     pub fn read(&self) -> R {
-        R {
-            bits: self.register.get(),
-        }
+        R { bits: self.register.get() }
     }
     #[doc = r" Writes to the register"]
     #[inline]