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s32k118.rs
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Made CAN1 and CAN2 the same kind of struct as CAN0 by using deriveFrom svd functionality

This commit is contained in:
Kjetil Kjeka 2017-09-24 13:56:31 +02:00
parent 2e5e8fdbb5
commit e08108558f
129 changed files with 20 additions and 39923 deletions
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6685
S32K144.svd
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384
src/can1/cbt/mod.rs
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#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
#[doc = r" Value to write to the register"]
pub struct W {
bits: u32,
}
impl super::CBT {
#[doc = r" Modifies the contents of the register"]
#[inline]
pub fn modify<F>(&self, f: F)
where
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
{
let bits = self.register.get();
let r = R { bits: bits };
let mut w = W { bits: bits };
f(&r, &mut w);
self.register.set(w.bits);
}
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
#[doc = r" Writes to the register"]
#[inline]
pub fn write<F>(&self, f: F)
where
F: FnOnce(&mut W) -> &mut W,
{
let mut w = W::reset_value();
f(&mut w);
self.register.set(w.bits);
}
#[doc = r" Writes the reset value to the register"]
#[inline]
pub fn reset(&self) {
self.write(|w| w)
}
}
#[doc = r" Value of the field"]
pub struct EPSEG2R {
bits: u8,
}
impl EPSEG2R {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct EPSEG1R {
bits: u8,
}
impl EPSEG1R {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct EPROPSEGR {
bits: u8,
}
impl EPROPSEGR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct ERJWR {
bits: u8,
}
impl ERJWR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct EPRESDIVR {
bits: u16,
}
impl EPRESDIVR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u16 {
self.bits
}
}
#[doc = "Possible values of the field `BTF`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum BTFR {
#[doc = "Extended bit time definitions disabled."] _0,
#[doc = "Extended bit time definitions enabled."] _1,
}
impl BTFR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
BTFR::_0 => false,
BTFR::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> BTFR {
match value {
false => BTFR::_0,
true => BTFR::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == BTFR::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == BTFR::_1
}
}
#[doc = r" Proxy"]
pub struct _EPSEG2W<'a> {
w: &'a mut W,
}
impl<'a> _EPSEG2W<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 31;
const OFFSET: u8 = 0;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = r" Proxy"]
pub struct _EPSEG1W<'a> {
w: &'a mut W,
}
impl<'a> _EPSEG1W<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 31;
const OFFSET: u8 = 5;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = r" Proxy"]
pub struct _EPROPSEGW<'a> {
w: &'a mut W,
}
impl<'a> _EPROPSEGW<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 63;
const OFFSET: u8 = 10;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = r" Proxy"]
pub struct _ERJWW<'a> {
w: &'a mut W,
}
impl<'a> _ERJWW<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 31;
const OFFSET: u8 = 16;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = r" Proxy"]
pub struct _EPRESDIVW<'a> {
w: &'a mut W,
}
impl<'a> _EPRESDIVW<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u16) -> &'a mut W {
const MASK: u16 = 1023;
const OFFSET: u8 = 21;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `BTF`"]
pub enum BTFW {
#[doc = "Extended bit time definitions disabled."] _0,
#[doc = "Extended bit time definitions enabled."] _1,
}
impl BTFW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
BTFW::_0 => false,
BTFW::_1 => true,
}
}
}
#[doc = r" Proxy"]
pub struct _BTFW<'a> {
w: &'a mut W,
}
impl<'a> _BTFW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: BTFW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Extended bit time definitions disabled."]
#[inline]
pub fn _0(self) -> &'a mut W {
self.variant(BTFW::_0)
}
#[doc = "Extended bit time definitions enabled."]
#[inline]
pub fn _1(self) -> &'a mut W {
self.variant(BTFW::_1)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 31;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 0:4 - Extended Phase Segment 2"]
#[inline]
pub fn epseg2(&self) -> EPSEG2R {
let bits = {
const MASK: u8 = 31;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) as u8
};
EPSEG2R { bits }
}
#[doc = "Bits 5:9 - Extended Phase Segment 1"]
#[inline]
pub fn epseg1(&self) -> EPSEG1R {
let bits = {
const MASK: u8 = 31;
const OFFSET: u8 = 5;
((self.bits >> OFFSET) & MASK as u32) as u8
};
EPSEG1R { bits }
}
#[doc = "Bits 10:15 - Extended Propagation Segment"]
#[inline]
pub fn epropseg(&self) -> EPROPSEGR {
let bits = {
const MASK: u8 = 63;
const OFFSET: u8 = 10;
((self.bits >> OFFSET) & MASK as u32) as u8
};
EPROPSEGR { bits }
}
#[doc = "Bits 16:20 - Extended Resync Jump Width"]
#[inline]
pub fn erjw(&self) -> ERJWR {
let bits = {
const MASK: u8 = 31;
const OFFSET: u8 = 16;
((self.bits >> OFFSET) & MASK as u32) as u8
};
ERJWR { bits }
}
#[doc = "Bits 21:30 - Extended Prescaler Division Factor"]
#[inline]
pub fn epresdiv(&self) -> EPRESDIVR {
let bits = {
const MASK: u16 = 1023;
const OFFSET: u8 = 21;
((self.bits >> OFFSET) & MASK as u32) as u16
};
EPRESDIVR { bits }
}
#[doc = "Bit 31 - Bit Timing Format Enable"]
#[inline]
pub fn btf(&self) -> BTFR {
BTFR::_from({
const MASK: bool = true;
const OFFSET: u8 = 31;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
}
impl W {
#[doc = r" Reset value of the register"]
#[inline]
pub fn reset_value() -> W {
W { bits: 0 }
}
#[doc = r" Writes raw bits to the register"]
#[inline]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.bits = bits;
self
}
#[doc = "Bits 0:4 - Extended Phase Segment 2"]
#[inline]
pub fn epseg2(&mut self) -> _EPSEG2W {
_EPSEG2W { w: self }
}
#[doc = "Bits 5:9 - Extended Phase Segment 1"]
#[inline]
pub fn epseg1(&mut self) -> _EPSEG1W {
_EPSEG1W { w: self }
}
#[doc = "Bits 10:15 - Extended Propagation Segment"]
#[inline]
pub fn epropseg(&mut self) -> _EPROPSEGW {
_EPROPSEGW { w: self }
}
#[doc = "Bits 16:20 - Extended Resync Jump Width"]
#[inline]
pub fn erjw(&mut self) -> _ERJWW {
_ERJWW { w: self }
}
#[doc = "Bits 21:30 - Extended Prescaler Division Factor"]
#[inline]
pub fn epresdiv(&mut self) -> _EPRESDIVW {
_EPRESDIVW { w: self }
}
#[doc = "Bit 31 - Bit Timing Format Enable"]
#[inline]
pub fn btf(&mut self) -> _BTFW {
_BTFW { w: self }
}
}

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src/can1/crcr/mod.rs
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#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
impl super::CRCR {
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
}
#[doc = r" Value of the field"]
pub struct TXCRCR {
bits: u16,
}
impl TXCRCR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u16 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct MBCRCR {
bits: u8,
}
impl MBCRCR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 0:14 - Transmitted CRC value"]
#[inline]
pub fn txcrc(&self) -> TXCRCR {
let bits = {
const MASK: u16 = 32767;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) as u16
};
TXCRCR { bits }
}
#[doc = "Bits 16:22 - CRC Mailbox"]
#[inline]
pub fn mbcrc(&self) -> MBCRCR {
let bits = {
const MASK: u8 = 127;
const OFFSET: u8 = 16;
((self.bits >> OFFSET) & MASK as u32) as u8
};
MBCRCR { bits }
}
}

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src/can1/ctrl1/mod.rs
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src/can1/ctrl1_pn/mod.rs
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#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
#[doc = r" Value to write to the register"]
pub struct W {
bits: u32,
}
impl super::CTRL1_PN {
#[doc = r" Modifies the contents of the register"]
#[inline]
pub fn modify<F>(&self, f: F)
where
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
{
let bits = self.register.get();
let r = R { bits: bits };
let mut w = W { bits: bits };
f(&r, &mut w);
self.register.set(w.bits);
}
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
#[doc = r" Writes to the register"]
#[inline]
pub fn write<F>(&self, f: F)
where
F: FnOnce(&mut W) -> &mut W,
{
let mut w = W::reset_value();
f(&mut w);
self.register.set(w.bits);
}
#[doc = r" Writes the reset value to the register"]
#[inline]
pub fn reset(&self) {
self.write(|w| w)
}
}
#[doc = "Possible values of the field `FCS`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum FCSR {
#[doc = "Message ID filtering only"] _00,
#[doc = "Message ID filtering and payload filtering"] _01,
#[doc = "Message ID filtering occurring a specified number of times."] _10,
#[doc = "Message ID filtering and payload filtering a specified number of times"] _11,
}
impl FCSR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
match *self {
FCSR::_00 => 0,
FCSR::_01 => 1,
FCSR::_10 => 2,
FCSR::_11 => 3,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: u8) -> FCSR {
match value {
0 => FCSR::_00,
1 => FCSR::_01,
2 => FCSR::_10,
3 => FCSR::_11,
_ => unreachable!(),
}
}
#[doc = "Checks if the value of the field is `_00`"]
#[inline]
pub fn is_00(&self) -> bool {
*self == FCSR::_00
}
#[doc = "Checks if the value of the field is `_01`"]
#[inline]
pub fn is_01(&self) -> bool {
*self == FCSR::_01
}
#[doc = "Checks if the value of the field is `_10`"]
#[inline]
pub fn is_10(&self) -> bool {
*self == FCSR::_10
}
#[doc = "Checks if the value of the field is `_11`"]
#[inline]
pub fn is_11(&self) -> bool {
*self == FCSR::_11
}
}
#[doc = "Possible values of the field `IDFS`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum IDFSR {
#[doc = "Match upon a ID contents against an exact target value"] _00,
#[doc = "Match upon a ID value greater than or equal to a specified target value"] _01,
#[doc = "Match upon a ID value smaller than or equal to a specified target value"] _10,
#[doc = "Match upon a ID value inside a range, greater than or equal to a specified lower limit and smaller than or equal a specified upper limit"]
_11,
}
impl IDFSR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
match *self {
IDFSR::_00 => 0,
IDFSR::_01 => 1,
IDFSR::_10 => 2,
IDFSR::_11 => 3,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: u8) -> IDFSR {
match value {
0 => IDFSR::_00,
1 => IDFSR::_01,
2 => IDFSR::_10,
3 => IDFSR::_11,
_ => unreachable!(),
}
}
#[doc = "Checks if the value of the field is `_00`"]
#[inline]
pub fn is_00(&self) -> bool {
*self == IDFSR::_00
}
#[doc = "Checks if the value of the field is `_01`"]
#[inline]
pub fn is_01(&self) -> bool {
*self == IDFSR::_01
}
#[doc = "Checks if the value of the field is `_10`"]
#[inline]
pub fn is_10(&self) -> bool {
*self == IDFSR::_10
}
#[doc = "Checks if the value of the field is `_11`"]
#[inline]
pub fn is_11(&self) -> bool {
*self == IDFSR::_11
}
}
#[doc = "Possible values of the field `PLFS`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum PLFSR {
#[doc = "Match upon a payload contents against an exact target value"] _00,
#[doc = "Match upon a payload value greater than or equal to a specified target value"] _01,
#[doc = "Match upon a payload value smaller than or equal to a specified target value"] _10,
#[doc = "Match upon a payload value inside a range, greater than or equal to a specified lower limit and smaller than or equal a specified upper limit"]
_11,
}
impl PLFSR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
match *self {
PLFSR::_00 => 0,
PLFSR::_01 => 1,
PLFSR::_10 => 2,
PLFSR::_11 => 3,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: u8) -> PLFSR {
match value {
0 => PLFSR::_00,
1 => PLFSR::_01,
2 => PLFSR::_10,
3 => PLFSR::_11,
_ => unreachable!(),
}
}
#[doc = "Checks if the value of the field is `_00`"]
#[inline]
pub fn is_00(&self) -> bool {
*self == PLFSR::_00
}
#[doc = "Checks if the value of the field is `_01`"]
#[inline]
pub fn is_01(&self) -> bool {
*self == PLFSR::_01
}
#[doc = "Checks if the value of the field is `_10`"]
#[inline]
pub fn is_10(&self) -> bool {
*self == PLFSR::_10
}
#[doc = "Checks if the value of the field is `_11`"]
#[inline]
pub fn is_11(&self) -> bool {
*self == PLFSR::_11
}
}
#[doc = "Possible values of the field `NMATCH`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum NMATCHR {
#[doc = "Received message must match the predefined filtering criteria for ID and/or PL once before generating a wake up event."]
_00000001,
#[doc = "Received message must match the predefined filtering criteria for ID and/or PL twice before generating a wake up event."]
_00000010,
#[doc = "Received message must match the predefined filtering criteria for ID and/or PL 255 times before generating a wake up event."]
_11111111,
#[doc = r" Reserved"] _Reserved(u8),
}
impl NMATCHR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
match *self {
NMATCHR::_00000001 => 1,
NMATCHR::_00000010 => 2,
NMATCHR::_11111111 => 255,
NMATCHR::_Reserved(bits) => bits,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: u8) -> NMATCHR {
match value {
1 => NMATCHR::_00000001,
2 => NMATCHR::_00000010,
255 => NMATCHR::_11111111,
i => NMATCHR::_Reserved(i),
}
}
#[doc = "Checks if the value of the field is `_00000001`"]
#[inline]
pub fn is_00000001(&self) -> bool {
*self == NMATCHR::_00000001
}
#[doc = "Checks if the value of the field is `_00000010`"]
#[inline]
pub fn is_00000010(&self) -> bool {
*self == NMATCHR::_00000010
}
#[doc = "Checks if the value of the field is `_11111111`"]
#[inline]
pub fn is_11111111(&self) -> bool {
*self == NMATCHR::_11111111
}
}
#[doc = "Possible values of the field `WUMF_MSK`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum WUMF_MSKR {
#[doc = "Wake up match event is disabled"] _0,
#[doc = "Wake up match event is enabled"] _1,
}
impl WUMF_MSKR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
WUMF_MSKR::_0 => false,
WUMF_MSKR::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> WUMF_MSKR {
match value {
false => WUMF_MSKR::_0,
true => WUMF_MSKR::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == WUMF_MSKR::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == WUMF_MSKR::_1
}
}
#[doc = "Possible values of the field `WTOF_MSK`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum WTOF_MSKR {
#[doc = "Timeout wake up event is disabled"] _0,
#[doc = "Timeout wake up event is enabled"] _1,
}
impl WTOF_MSKR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
WTOF_MSKR::_0 => false,
WTOF_MSKR::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> WTOF_MSKR {
match value {
false => WTOF_MSKR::_0,
true => WTOF_MSKR::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == WTOF_MSKR::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == WTOF_MSKR::_1
}
}
#[doc = "Values that can be written to the field `FCS`"]
pub enum FCSW {
#[doc = "Message ID filtering only"] _00,
#[doc = "Message ID filtering and payload filtering"] _01,
#[doc = "Message ID filtering occurring a specified number of times."] _10,
#[doc = "Message ID filtering and payload filtering a specified number of times"] _11,
}
impl FCSW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> u8 {
match *self {
FCSW::_00 => 0,
FCSW::_01 => 1,
FCSW::_10 => 2,
FCSW::_11 => 3,
}
}
}
#[doc = r" Proxy"]
pub struct _FCSW<'a> {
w: &'a mut W,
}
impl<'a> _FCSW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: FCSW) -> &'a mut W {
{
self.bits(variant._bits())
}
}
#[doc = "Message ID filtering only"]
#[inline]
pub fn _00(self) -> &'a mut W {
self.variant(FCSW::_00)
}
#[doc = "Message ID filtering and payload filtering"]
#[inline]
pub fn _01(self) -> &'a mut W {
self.variant(FCSW::_01)
}
#[doc = "Message ID filtering occurring a specified number of times."]
#[inline]
pub fn _10(self) -> &'a mut W {
self.variant(FCSW::_10)
}
#[doc = "Message ID filtering and payload filtering a specified number of times"]
#[inline]
pub fn _11(self) -> &'a mut W {
self.variant(FCSW::_11)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 3;
const OFFSET: u8 = 0;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `IDFS`"]
pub enum IDFSW {
#[doc = "Match upon a ID contents against an exact target value"] _00,
#[doc = "Match upon a ID value greater than or equal to a specified target value"] _01,
#[doc = "Match upon a ID value smaller than or equal to a specified target value"] _10,
#[doc = "Match upon a ID value inside a range, greater than or equal to a specified lower limit and smaller than or equal a specified upper limit"]
_11,
}
impl IDFSW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> u8 {
match *self {
IDFSW::_00 => 0,
IDFSW::_01 => 1,
IDFSW::_10 => 2,
IDFSW::_11 => 3,
}
}
}
#[doc = r" Proxy"]
pub struct _IDFSW<'a> {
w: &'a mut W,
}
impl<'a> _IDFSW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: IDFSW) -> &'a mut W {
{
self.bits(variant._bits())
}
}
#[doc = "Match upon a ID contents against an exact target value"]
#[inline]
pub fn _00(self) -> &'a mut W {
self.variant(IDFSW::_00)
}
#[doc = "Match upon a ID value greater than or equal to a specified target value"]
#[inline]
pub fn _01(self) -> &'a mut W {
self.variant(IDFSW::_01)
}
#[doc = "Match upon a ID value smaller than or equal to a specified target value"]
#[inline]
pub fn _10(self) -> &'a mut W {
self.variant(IDFSW::_10)
}
#[doc = "Match upon a ID value inside a range, greater than or equal to a specified lower limit and smaller than or equal a specified upper limit"]
#[inline]
pub fn _11(self) -> &'a mut W {
self.variant(IDFSW::_11)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 3;
const OFFSET: u8 = 2;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `PLFS`"]
pub enum PLFSW {
#[doc = "Match upon a payload contents against an exact target value"] _00,
#[doc = "Match upon a payload value greater than or equal to a specified target value"] _01,
#[doc = "Match upon a payload value smaller than or equal to a specified target value"] _10,
#[doc = "Match upon a payload value inside a range, greater than or equal to a specified lower limit and smaller than or equal a specified upper limit"]
_11,
}
impl PLFSW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> u8 {
match *self {
PLFSW::_00 => 0,
PLFSW::_01 => 1,
PLFSW::_10 => 2,
PLFSW::_11 => 3,
}
}
}
#[doc = r" Proxy"]
pub struct _PLFSW<'a> {
w: &'a mut W,
}
impl<'a> _PLFSW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: PLFSW) -> &'a mut W {
{
self.bits(variant._bits())
}
}
#[doc = "Match upon a payload contents against an exact target value"]
#[inline]
pub fn _00(self) -> &'a mut W {
self.variant(PLFSW::_00)
}
#[doc = "Match upon a payload value greater than or equal to a specified target value"]
#[inline]
pub fn _01(self) -> &'a mut W {
self.variant(PLFSW::_01)
}
#[doc = "Match upon a payload value smaller than or equal to a specified target value"]
#[inline]
pub fn _10(self) -> &'a mut W {
self.variant(PLFSW::_10)
}
#[doc = "Match upon a payload value inside a range, greater than or equal to a specified lower limit and smaller than or equal a specified upper limit"]
#[inline]
pub fn _11(self) -> &'a mut W {
self.variant(PLFSW::_11)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 3;
const OFFSET: u8 = 4;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `NMATCH`"]
pub enum NMATCHW {
#[doc = "Received message must match the predefined filtering criteria for ID and/or PL once before generating a wake up event."]
_00000001,
#[doc = "Received message must match the predefined filtering criteria for ID and/or PL twice before generating a wake up event."]
_00000010,
#[doc = "Received message must match the predefined filtering criteria for ID and/or PL 255 times before generating a wake up event."]
_11111111,
}
impl NMATCHW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> u8 {
match *self {
NMATCHW::_00000001 => 1,
NMATCHW::_00000010 => 2,
NMATCHW::_11111111 => 255,
}
}
}
#[doc = r" Proxy"]
pub struct _NMATCHW<'a> {
w: &'a mut W,
}
impl<'a> _NMATCHW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: NMATCHW) -> &'a mut W {
unsafe { self.bits(variant._bits()) }
}
#[doc = "Received message must match the predefined filtering criteria for ID and/or PL once before generating a wake up event."]
#[inline]
pub fn _00000001(self) -> &'a mut W {
self.variant(NMATCHW::_00000001)
}
#[doc = "Received message must match the predefined filtering criteria for ID and/or PL twice before generating a wake up event."]
#[inline]
pub fn _00000010(self) -> &'a mut W {
self.variant(NMATCHW::_00000010)
}
#[doc = "Received message must match the predefined filtering criteria for ID and/or PL 255 times before generating a wake up event."]
#[inline]
pub fn _11111111(self) -> &'a mut W {
self.variant(NMATCHW::_11111111)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 255;
const OFFSET: u8 = 8;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `WUMF_MSK`"]
pub enum WUMF_MSKW {
#[doc = "Wake up match event is disabled"] _0,
#[doc = "Wake up match event is enabled"] _1,
}
impl WUMF_MSKW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
WUMF_MSKW::_0 => false,
WUMF_MSKW::_1 => true,
}
}
}
#[doc = r" Proxy"]
pub struct _WUMF_MSKW<'a> {
w: &'a mut W,
}
impl<'a> _WUMF_MSKW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: WUMF_MSKW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Wake up match event is disabled"]
#[inline]
pub fn _0(self) -> &'a mut W {
self.variant(WUMF_MSKW::_0)
}
#[doc = "Wake up match event is enabled"]
#[inline]
pub fn _1(self) -> &'a mut W {
self.variant(WUMF_MSKW::_1)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 16;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `WTOF_MSK`"]
pub enum WTOF_MSKW {
#[doc = "Timeout wake up event is disabled"] _0,
#[doc = "Timeout wake up event is enabled"] _1,
}
impl WTOF_MSKW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
WTOF_MSKW::_0 => false,
WTOF_MSKW::_1 => true,
}
}
}
#[doc = r" Proxy"]
pub struct _WTOF_MSKW<'a> {
w: &'a mut W,
}
impl<'a> _WTOF_MSKW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: WTOF_MSKW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Timeout wake up event is disabled"]
#[inline]
pub fn _0(self) -> &'a mut W {
self.variant(WTOF_MSKW::_0)
}
#[doc = "Timeout wake up event is enabled"]
#[inline]
pub fn _1(self) -> &'a mut W {
self.variant(WTOF_MSKW::_1)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 17;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 0:1 - Filtering Combination Selection"]
#[inline]
pub fn fcs(&self) -> FCSR {
FCSR::_from({
const MASK: u8 = 3;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) as u8
})
}
#[doc = "Bits 2:3 - ID Filtering Selection"]
#[inline]
pub fn idfs(&self) -> IDFSR {
IDFSR::_from({
const MASK: u8 = 3;
const OFFSET: u8 = 2;
((self.bits >> OFFSET) & MASK as u32) as u8
})
}
#[doc = "Bits 4:5 - Payload Filtering Selection"]
#[inline]
pub fn plfs(&self) -> PLFSR {
PLFSR::_from({
const MASK: u8 = 3;
const OFFSET: u8 = 4;
((self.bits >> OFFSET) & MASK as u32) as u8
})
}
#[doc = "Bits 8:15 - Number of Messages Matching the Same Filtering Criteria"]
#[inline]
pub fn nmatch(&self) -> NMATCHR {
NMATCHR::_from({
const MASK: u8 = 255;
const OFFSET: u8 = 8;
((self.bits >> OFFSET) & MASK as u32) as u8
})
}
#[doc = "Bit 16 - Wake Up by Match Flag Mask Bit"]
#[inline]
pub fn wumf_msk(&self) -> WUMF_MSKR {
WUMF_MSKR::_from({
const MASK: bool = true;
const OFFSET: u8 = 16;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 17 - Wake Up by Timeout Flag Mask Bit"]
#[inline]
pub fn wtof_msk(&self) -> WTOF_MSKR {
WTOF_MSKR::_from({
const MASK: bool = true;
const OFFSET: u8 = 17;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
}
impl W {
#[doc = r" Reset value of the register"]
#[inline]
pub fn reset_value() -> W {
W { bits: 256 }
}
#[doc = r" Writes raw bits to the register"]
#[inline]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.bits = bits;
self
}
#[doc = "Bits 0:1 - Filtering Combination Selection"]
#[inline]
pub fn fcs(&mut self) -> _FCSW {
_FCSW { w: self }
}
#[doc = "Bits 2:3 - ID Filtering Selection"]
#[inline]
pub fn idfs(&mut self) -> _IDFSW {
_IDFSW { w: self }
}
#[doc = "Bits 4:5 - Payload Filtering Selection"]
#[inline]
pub fn plfs(&mut self) -> _PLFSW {
_PLFSW { w: self }
}
#[doc = "Bits 8:15 - Number of Messages Matching the Same Filtering Criteria"]
#[inline]
pub fn nmatch(&mut self) -> _NMATCHW {
_NMATCHW { w: self }
}
#[doc = "Bit 16 - Wake Up by Match Flag Mask Bit"]
#[inline]
pub fn wumf_msk(&mut self) -> _WUMF_MSKW {
_WUMF_MSKW { w: self }
}
#[doc = "Bit 17 - Wake Up by Timeout Flag Mask Bit"]
#[inline]
pub fn wtof_msk(&mut self) -> _WTOF_MSKW {
_WTOF_MSKW { w: self }
}
}

1189
src/can1/ctrl2/mod.rs
View File

File diff suppressed because it is too large Load Diff

105
src/can1/ctrl2_pn/mod.rs
View File

@ -1,105 +0,0 @@
#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
#[doc = r" Value to write to the register"]
pub struct W {
bits: u32,
}
impl super::CTRL2_PN {
#[doc = r" Modifies the contents of the register"]
#[inline]
pub fn modify<F>(&self, f: F)
where
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
{
let bits = self.register.get();
let r = R { bits: bits };
let mut w = W { bits: bits };
f(&r, &mut w);
self.register.set(w.bits);
}
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
#[doc = r" Writes to the register"]
#[inline]
pub fn write<F>(&self, f: F)
where
F: FnOnce(&mut W) -> &mut W,
{
let mut w = W::reset_value();
f(&mut w);
self.register.set(w.bits);
}
#[doc = r" Writes the reset value to the register"]
#[inline]
pub fn reset(&self) {
self.write(|w| w)
}
}
#[doc = r" Value of the field"]
pub struct MATCHTOR {
bits: u16,
}
impl MATCHTOR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u16 {
self.bits
}
}
#[doc = r" Proxy"]
pub struct _MATCHTOW<'a> {
w: &'a mut W,
}
impl<'a> _MATCHTOW<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u16) -> &'a mut W {
const MASK: u16 = 65535;
const OFFSET: u8 = 0;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 0:15 - Timeout for No Message Matching the Filtering Criteria"]
#[inline]
pub fn matchto(&self) -> MATCHTOR {
let bits = {
const MASK: u16 = 65535;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) as u16
};
MATCHTOR { bits }
}
}
impl W {
#[doc = r" Reset value of the register"]
#[inline]
pub fn reset_value() -> W {
W { bits: 0 }
}
#[doc = r" Writes raw bits to the register"]
#[inline]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.bits = bits;
self
}
#[doc = "Bits 0:15 - Timeout for No Message Matching the Filtering Criteria"]
#[inline]
pub fn matchto(&mut self) -> _MATCHTOW {
_MATCHTOW { w: self }
}
}

228
src/can1/ecr/mod.rs
View File

@ -1,228 +0,0 @@
#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
#[doc = r" Value to write to the register"]
pub struct W {
bits: u32,
}
impl super::ECR {
#[doc = r" Modifies the contents of the register"]
#[inline]
pub fn modify<F>(&self, f: F)
where
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
{
let bits = self.register.get();
let r = R { bits: bits };
let mut w = W { bits: bits };
f(&r, &mut w);
self.register.set(w.bits);
}
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
#[doc = r" Writes to the register"]
#[inline]
pub fn write<F>(&self, f: F)
where
F: FnOnce(&mut W) -> &mut W,
{
let mut w = W::reset_value();
f(&mut w);
self.register.set(w.bits);
}
#[doc = r" Writes the reset value to the register"]
#[inline]
pub fn reset(&self) {
self.write(|w| w)
}
}
#[doc = r" Value of the field"]
pub struct TXERRCNTR {
bits: u8,
}
impl TXERRCNTR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct RXERRCNTR {
bits: u8,
}
impl RXERRCNTR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct TXERRCNT_FASTR {
bits: u8,
}
impl TXERRCNT_FASTR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct RXERRCNT_FASTR {
bits: u8,
}
impl RXERRCNT_FASTR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Proxy"]
pub struct _TXERRCNTW<'a> {
w: &'a mut W,
}
impl<'a> _TXERRCNTW<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 255;
const OFFSET: u8 = 0;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = r" Proxy"]
pub struct _RXERRCNTW<'a> {
w: &'a mut W,
}
impl<'a> _RXERRCNTW<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 255;
const OFFSET: u8 = 8;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = r" Proxy"]
pub struct _TXERRCNT_FASTW<'a> {
w: &'a mut W,
}
impl<'a> _TXERRCNT_FASTW<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 255;
const OFFSET: u8 = 16;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = r" Proxy"]
pub struct _RXERRCNT_FASTW<'a> {
w: &'a mut W,
}
impl<'a> _RXERRCNT_FASTW<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 255;
const OFFSET: u8 = 24;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 0:7 - Transmit Error Counter"]
#[inline]
pub fn txerrcnt(&self) -> TXERRCNTR {
let bits = {
const MASK: u8 = 255;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) as u8
};
TXERRCNTR { bits }
}
#[doc = "Bits 8:15 - Receive Error Counter"]
#[inline]
pub fn rxerrcnt(&self) -> RXERRCNTR {
let bits = {
const MASK: u8 = 255;
const OFFSET: u8 = 8;
((self.bits >> OFFSET) & MASK as u32) as u8
};
RXERRCNTR { bits }
}
#[doc = "Bits 16:23 - Transmit Error Counter for fast bits"]
#[inline]
pub fn txerrcnt_fast(&self) -> TXERRCNT_FASTR {
let bits = {
const MASK: u8 = 255;
const OFFSET: u8 = 16;
((self.bits >> OFFSET) & MASK as u32) as u8
};
TXERRCNT_FASTR { bits }
}
#[doc = "Bits 24:31 - Receive Error Counter for fast bits"]
#[inline]
pub fn rxerrcnt_fast(&self) -> RXERRCNT_FASTR {
let bits = {
const MASK: u8 = 255;
const OFFSET: u8 = 24;
((self.bits >> OFFSET) & MASK as u32) as u8
};
RXERRCNT_FASTR { bits }
}
}
impl W {
#[doc = r" Reset value of the register"]
#[inline]
pub fn reset_value() -> W {
W { bits: 0 }
}
#[doc = r" Writes raw bits to the register"]
#[inline]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.bits = bits;
self
}
#[doc = "Bits 0:7 - Transmit Error Counter"]
#[inline]
pub fn txerrcnt(&mut self) -> _TXERRCNTW {
_TXERRCNTW { w: self }
}
#[doc = "Bits 8:15 - Receive Error Counter"]
#[inline]
pub fn rxerrcnt(&mut self) -> _RXERRCNTW {
_RXERRCNTW { w: self }
}
#[doc = "Bits 16:23 - Transmit Error Counter for fast bits"]
#[inline]
pub fn txerrcnt_fast(&mut self) -> _TXERRCNT_FASTW {
_TXERRCNT_FASTW { w: self }
}
#[doc = "Bits 24:31 - Receive Error Counter for fast bits"]
#[inline]
pub fn rxerrcnt_fast(&mut self) -> _RXERRCNT_FASTW {
_RXERRCNT_FASTW { w: self }
}
}

228
src/can1/embedded_ram/mod.rs
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@ -1,228 +0,0 @@
#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
#[doc = r" Value to write to the register"]
pub struct W {
bits: u32,
}
impl super::EMBEDDEDRAM {
#[doc = r" Modifies the contents of the register"]
#[inline]
pub fn modify<F>(&self, f: F)
where
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
{
let bits = self.register.get();
let r = R { bits: bits };
let mut w = W { bits: bits };
f(&r, &mut w);
self.register.set(w.bits);
}
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
#[doc = r" Writes to the register"]
#[inline]
pub fn write<F>(&self, f: F)
where
F: FnOnce(&mut W) -> &mut W,
{
let mut w = W::reset_value();
f(&mut w);
self.register.set(w.bits);
}
#[doc = r" Writes the reset value to the register"]
#[inline]
pub fn reset(&self) {
self.write(|w| w)
}
}
#[doc = r" Value of the field"]
pub struct DATA_BYTE_3R {
bits: u8,
}
impl DATA_BYTE_3R {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct DATA_BYTE_2R {
bits: u8,
}
impl DATA_BYTE_2R {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct DATA_BYTE_1R {
bits: u8,
}
impl DATA_BYTE_1R {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct DATA_BYTE_0R {
bits: u8,
}
impl DATA_BYTE_0R {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Proxy"]
pub struct _DATA_BYTE_3W<'a> {
w: &'a mut W,
}
impl<'a> _DATA_BYTE_3W<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 255;
const OFFSET: u8 = 0;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = r" Proxy"]
pub struct _DATA_BYTE_2W<'a> {
w: &'a mut W,
}
impl<'a> _DATA_BYTE_2W<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 255;
const OFFSET: u8 = 8;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = r" Proxy"]
pub struct _DATA_BYTE_1W<'a> {
w: &'a mut W,
}
impl<'a> _DATA_BYTE_1W<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 255;
const OFFSET: u8 = 16;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = r" Proxy"]
pub struct _DATA_BYTE_0W<'a> {
w: &'a mut W,
}
impl<'a> _DATA_BYTE_0W<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 255;
const OFFSET: u8 = 24;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 0:7 - Data byte 3 of Rx/Tx frame."]
#[inline]
pub fn data_byte_3(&self) -> DATA_BYTE_3R {
let bits = {
const MASK: u8 = 255;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) as u8
};
DATA_BYTE_3R { bits }
}
#[doc = "Bits 8:15 - Data byte 2 of Rx/Tx frame."]
#[inline]
pub fn data_byte_2(&self) -> DATA_BYTE_2R {
let bits = {
const MASK: u8 = 255;
const OFFSET: u8 = 8;
((self.bits >> OFFSET) & MASK as u32) as u8
};
DATA_BYTE_2R { bits }
}
#[doc = "Bits 16:23 - Data byte 1 of Rx/Tx frame."]
#[inline]
pub fn data_byte_1(&self) -> DATA_BYTE_1R {
let bits = {
const MASK: u8 = 255;
const OFFSET: u8 = 16;
((self.bits >> OFFSET) & MASK as u32) as u8
};
DATA_BYTE_1R { bits }
}
#[doc = "Bits 24:31 - Data byte 0 of Rx/Tx frame."]
#[inline]
pub fn data_byte_0(&self) -> DATA_BYTE_0R {
let bits = {
const MASK: u8 = 255;
const OFFSET: u8 = 24;
((self.bits >> OFFSET) & MASK as u32) as u8
};
DATA_BYTE_0R { bits }
}
}
impl W {
#[doc = r" Reset value of the register"]
#[inline]
pub fn reset_value() -> W {
W { bits: 0 }
}
#[doc = r" Writes raw bits to the register"]
#[inline]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.bits = bits;
self
}
#[doc = "Bits 0:7 - Data byte 3 of Rx/Tx frame."]
#[inline]
pub fn data_byte_3(&mut self) -> _DATA_BYTE_3W {
_DATA_BYTE_3W { w: self }
}
#[doc = "Bits 8:15 - Data byte 2 of Rx/Tx frame."]
#[inline]
pub fn data_byte_2(&mut self) -> _DATA_BYTE_2W {
_DATA_BYTE_2W { w: self }
}
#[doc = "Bits 16:23 - Data byte 1 of Rx/Tx frame."]
#[inline]
pub fn data_byte_1(&mut self) -> _DATA_BYTE_1W {
_DATA_BYTE_1W { w: self }
}
#[doc = "Bits 24:31 - Data byte 0 of Rx/Tx frame."]
#[inline]
pub fn data_byte_0(&mut self) -> _DATA_BYTE_0W {
_DATA_BYTE_0W { w: self }
}
}

1848
src/can1/esr1/mod.rs
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File diff suppressed because it is too large Load Diff

150
src/can1/esr2/mod.rs
View File

@ -1,150 +0,0 @@
#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
impl super::ESR2 {
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
}
#[doc = "Possible values of the field `IMB`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum IMBR {
#[doc = "If ESR2[VPS] is asserted, the ESR2[LPTM] is not an inactive Mailbox."] _0,
#[doc = "If ESR2[VPS] is asserted, there is at least one inactive Mailbox. LPTM content is the number of the first one."]
_1,
}
impl IMBR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
IMBR::_0 => false,
IMBR::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> IMBR {
match value {
false => IMBR::_0,
true => IMBR::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == IMBR::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == IMBR::_1
}
}
#[doc = "Possible values of the field `VPS`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum VPSR {
#[doc = "Contents of IMB and LPTM are invalid."] _0,
#[doc = "Contents of IMB and LPTM are valid."] _1,
}
impl VPSR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
VPSR::_0 => false,
VPSR::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> VPSR {
match value {
false => VPSR::_0,
true => VPSR::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == VPSR::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == VPSR::_1
}
}
#[doc = r" Value of the field"]
pub struct LPTMR {
bits: u8,
}
impl LPTMR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bit 13 - Inactive Mailbox"]
#[inline]
pub fn imb(&self) -> IMBR {
IMBR::_from({
const MASK: bool = true;
const OFFSET: u8 = 13;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 14 - Valid Priority Status"]
#[inline]
pub fn vps(&self) -> VPSR {
VPSR::_from({
const MASK: bool = true;
const OFFSET: u8 = 14;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bits 16:22 - Lowest Priority Tx Mailbox"]
#[inline]
pub fn lptm(&self) -> LPTMR {
let bits = {
const MASK: u8 = 127;
const OFFSET: u8 = 16;
((self.bits >> OFFSET) & MASK as u32) as u8
};
LPTMR { bits }
}
}

269
src/can1/fdcbt/mod.rs
View File

@ -1,269 +0,0 @@
#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
#[doc = r" Value to write to the register"]
pub struct W {
bits: u32,
}
impl super::FDCBT {
#[doc = r" Modifies the contents of the register"]
#[inline]
pub fn modify<F>(&self, f: F)
where
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
{
let bits = self.register.get();
let r = R { bits: bits };
let mut w = W { bits: bits };
f(&r, &mut w);
self.register.set(w.bits);
}
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
#[doc = r" Writes to the register"]
#[inline]
pub fn write<F>(&self, f: F)
where
F: FnOnce(&mut W) -> &mut W,
{
let mut w = W::reset_value();
f(&mut w);
self.register.set(w.bits);
}
#[doc = r" Writes the reset value to the register"]
#[inline]
pub fn reset(&self) {
self.write(|w| w)
}
}
#[doc = r" Value of the field"]
pub struct FPSEG2R {
bits: u8,
}
impl FPSEG2R {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct FPSEG1R {
bits: u8,
}
impl FPSEG1R {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct FPROPSEGR {
bits: u8,
}
impl FPROPSEGR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct FRJWR {
bits: u8,
}
impl FRJWR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct FPRESDIVR {
bits: u16,
}
impl FPRESDIVR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u16 {
self.bits
}
}
#[doc = r" Proxy"]
pub struct _FPSEG2W<'a> {
w: &'a mut W,
}
impl<'a> _FPSEG2W<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 7;
const OFFSET: u8 = 0;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = r" Proxy"]
pub struct _FPSEG1W<'a> {
w: &'a mut W,
}
impl<'a> _FPSEG1W<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 7;
const OFFSET: u8 = 5;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = r" Proxy"]
pub struct _FPROPSEGW<'a> {
w: &'a mut W,
}
impl<'a> _FPROPSEGW<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 31;
const OFFSET: u8 = 10;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = r" Proxy"]
pub struct _FRJWW<'a> {
w: &'a mut W,
}
impl<'a> _FRJWW<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 7;
const OFFSET: u8 = 16;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = r" Proxy"]
pub struct _FPRESDIVW<'a> {
w: &'a mut W,
}
impl<'a> _FPRESDIVW<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u16) -> &'a mut W {
const MASK: u16 = 1023;
const OFFSET: u8 = 20;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 0:2 - Fast Phase Segment 2"]
#[inline]
pub fn fpseg2(&self) -> FPSEG2R {
let bits = {
const MASK: u8 = 7;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) as u8
};
FPSEG2R { bits }
}
#[doc = "Bits 5:7 - Fast Phase Segment 1"]
#[inline]
pub fn fpseg1(&self) -> FPSEG1R {
let bits = {
const MASK: u8 = 7;
const OFFSET: u8 = 5;
((self.bits >> OFFSET) & MASK as u32) as u8
};
FPSEG1R { bits }
}
#[doc = "Bits 10:14 - Fast Propagation Segment"]
#[inline]
pub fn fpropseg(&self) -> FPROPSEGR {
let bits = {
const MASK: u8 = 31;
const OFFSET: u8 = 10;
((self.bits >> OFFSET) & MASK as u32) as u8
};
FPROPSEGR { bits }
}
#[doc = "Bits 16:18 - Fast Resync Jump Width"]
#[inline]
pub fn frjw(&self) -> FRJWR {
let bits = {
const MASK: u8 = 7;
const OFFSET: u8 = 16;
((self.bits >> OFFSET) & MASK as u32) as u8
};
FRJWR { bits }
}
#[doc = "Bits 20:29 - Fast Prescaler Division Factor"]
#[inline]
pub fn fpresdiv(&self) -> FPRESDIVR {
let bits = {
const MASK: u16 = 1023;
const OFFSET: u8 = 20;
((self.bits >> OFFSET) & MASK as u32) as u16
};
FPRESDIVR { bits }
}
}
impl W {
#[doc = r" Reset value of the register"]
#[inline]
pub fn reset_value() -> W {
W { bits: 0 }
}
#[doc = r" Writes raw bits to the register"]
#[inline]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.bits = bits;
self
}
#[doc = "Bits 0:2 - Fast Phase Segment 2"]
#[inline]
pub fn fpseg2(&mut self) -> _FPSEG2W {
_FPSEG2W { w: self }
}
#[doc = "Bits 5:7 - Fast Phase Segment 1"]
#[inline]
pub fn fpseg1(&mut self) -> _FPSEG1W {
_FPSEG1W { w: self }
}
#[doc = "Bits 10:14 - Fast Propagation Segment"]
#[inline]
pub fn fpropseg(&mut self) -> _FPROPSEGW {
_FPROPSEGW { w: self }
}
#[doc = "Bits 16:18 - Fast Resync Jump Width"]
#[inline]
pub fn frjw(&mut self) -> _FRJWW {
_FRJWW { w: self }
}
#[doc = "Bits 20:29 - Fast Prescaler Division Factor"]
#[inline]
pub fn fpresdiv(&mut self) -> _FPRESDIVW {
_FPRESDIVW { w: self }
}
}

62
src/can1/fdcrc/mod.rs
View File

@ -1,62 +0,0 @@
#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
impl super::FDCRC {
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
}
#[doc = r" Value of the field"]
pub struct FD_TXCRCR {
bits: u32,
}
impl FD_TXCRCR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct FD_MBCRCR {
bits: u8,
}
impl FD_MBCRCR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 0:20 - Extended Transmitted CRC value"]
#[inline]
pub fn fd_txcrc(&self) -> FD_TXCRCR {
let bits = {
const MASK: u32 = 2097151;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) as u32
};
FD_TXCRCR { bits }
}
#[doc = "Bits 24:30 - CRC Mailbox Number for FD_TXCRC"]
#[inline]
pub fn fd_mbcrc(&self) -> FD_MBCRCR {
let bits = {
const MASK: u8 = 127;
const OFFSET: u8 = 24;
((self.bits >> OFFSET) & MASK as u32) as u8
};
FD_MBCRCR { bits }
}
}

599
src/can1/fdctrl/mod.rs
View File

@ -1,599 +0,0 @@
#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
#[doc = r" Value to write to the register"]
pub struct W {
bits: u32,
}
impl super::FDCTRL {
#[doc = r" Modifies the contents of the register"]
#[inline]
pub fn modify<F>(&self, f: F)
where
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
{
let bits = self.register.get();
let r = R { bits: bits };
let mut w = W { bits: bits };
f(&r, &mut w);
self.register.set(w.bits);
}
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
#[doc = r" Writes to the register"]
#[inline]
pub fn write<F>(&self, f: F)
where
F: FnOnce(&mut W) -> &mut W,
{
let mut w = W::reset_value();
f(&mut w);
self.register.set(w.bits);
}
#[doc = r" Writes the reset value to the register"]
#[inline]
pub fn reset(&self) {
self.write(|w| w)
}
}
#[doc = r" Value of the field"]
pub struct TDCVALR {
bits: u8,
}
impl TDCVALR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct TDCOFFR {
bits: u8,
}
impl TDCOFFR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = "Possible values of the field `TDCFAIL`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum TDCFAILR {
#[doc = "Measured loop delay is in range."] _0,
#[doc = "Measured loop delay is out of range."] _1,
}
impl TDCFAILR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
TDCFAILR::_0 => false,
TDCFAILR::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> TDCFAILR {
match value {
false => TDCFAILR::_0,
true => TDCFAILR::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == TDCFAILR::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == TDCFAILR::_1
}
}
#[doc = "Possible values of the field `TDCEN`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum TDCENR {
#[doc = "TDC is disabled"] _0,
#[doc = "TDC is enabled"] _1,
}
impl TDCENR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
TDCENR::_0 => false,
TDCENR::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> TDCENR {
match value {
false => TDCENR::_0,
true => TDCENR::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == TDCENR::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == TDCENR::_1
}
}
#[doc = "Possible values of the field `MBDSR0`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum MBDSR0R {
#[doc = "Selects 8 bytes per Message Buffer."] _00,
#[doc = "Selects 16 bytes per Message Buffer."] _01,
#[doc = "Selects 32 bytes per Message Buffer."] _10,
#[doc = "Selects 64 bytes per Message Buffer."] _11,
}
impl MBDSR0R {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
match *self {
MBDSR0R::_00 => 0,
MBDSR0R::_01 => 1,
MBDSR0R::_10 => 2,
MBDSR0R::_11 => 3,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: u8) -> MBDSR0R {
match value {
0 => MBDSR0R::_00,
1 => MBDSR0R::_01,
2 => MBDSR0R::_10,
3 => MBDSR0R::_11,
_ => unreachable!(),
}
}
#[doc = "Checks if the value of the field is `_00`"]
#[inline]
pub fn is_00(&self) -> bool {
*self == MBDSR0R::_00
}
#[doc = "Checks if the value of the field is `_01`"]
#[inline]
pub fn is_01(&self) -> bool {
*self == MBDSR0R::_01
}
#[doc = "Checks if the value of the field is `_10`"]
#[inline]
pub fn is_10(&self) -> bool {
*self == MBDSR0R::_10
}
#[doc = "Checks if the value of the field is `_11`"]
#[inline]
pub fn is_11(&self) -> bool {
*self == MBDSR0R::_11
}
}
#[doc = "Possible values of the field `FDRATE`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum FDRATER {
#[doc = "Transmit a frame in nominal rate. The BRS bit in the Tx MB has no effect."] _0,
#[doc = "Transmit a frame with bit rate switching if the BRS bit in the Tx MB is recessive."] _1,
}
impl FDRATER {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
FDRATER::_0 => false,
FDRATER::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> FDRATER {
match value {
false => FDRATER::_0,
true => FDRATER::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == FDRATER::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == FDRATER::_1
}
}
#[doc = r" Proxy"]
pub struct _TDCOFFW<'a> {
w: &'a mut W,
}
impl<'a> _TDCOFFW<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 31;
const OFFSET: u8 = 8;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `TDCFAIL`"]
pub enum TDCFAILW {
#[doc = "Measured loop delay is in range."] _0,
#[doc = "Measured loop delay is out of range."] _1,
}
impl TDCFAILW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
TDCFAILW::_0 => false,
TDCFAILW::_1 => true,
}
}
}
#[doc = r" Proxy"]
pub struct _TDCFAILW<'a> {
w: &'a mut W,
}
impl<'a> _TDCFAILW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: TDCFAILW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Measured loop delay is in range."]
#[inline]
pub fn _0(self) -> &'a mut W {
self.variant(TDCFAILW::_0)
}
#[doc = "Measured loop delay is out of range."]
#[inline]
pub fn _1(self) -> &'a mut W {
self.variant(TDCFAILW::_1)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 14;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `TDCEN`"]
pub enum TDCENW {
#[doc = "TDC is disabled"] _0,
#[doc = "TDC is enabled"] _1,
}
impl TDCENW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
TDCENW::_0 => false,
TDCENW::_1 => true,
}
}
}
#[doc = r" Proxy"]
pub struct _TDCENW<'a> {
w: &'a mut W,
}
impl<'a> _TDCENW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: TDCENW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "TDC is disabled"]
#[inline]
pub fn _0(self) -> &'a mut W {
self.variant(TDCENW::_0)
}
#[doc = "TDC is enabled"]
#[inline]
pub fn _1(self) -> &'a mut W {
self.variant(TDCENW::_1)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 15;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `MBDSR0`"]
pub enum MBDSR0W {
#[doc = "Selects 8 bytes per Message Buffer."] _00,
#[doc = "Selects 16 bytes per Message Buffer."] _01,
#[doc = "Selects 32 bytes per Message Buffer."] _10,
#[doc = "Selects 64 bytes per Message Buffer."] _11,
}
impl MBDSR0W {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> u8 {
match *self {
MBDSR0W::_00 => 0,
MBDSR0W::_01 => 1,
MBDSR0W::_10 => 2,
MBDSR0W::_11 => 3,
}
}
}
#[doc = r" Proxy"]
pub struct _MBDSR0W<'a> {
w: &'a mut W,
}
impl<'a> _MBDSR0W<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: MBDSR0W) -> &'a mut W {
{
self.bits(variant._bits())
}
}
#[doc = "Selects 8 bytes per Message Buffer."]
#[inline]
pub fn _00(self) -> &'a mut W {
self.variant(MBDSR0W::_00)
}
#[doc = "Selects 16 bytes per Message Buffer."]
#[inline]
pub fn _01(self) -> &'a mut W {
self.variant(MBDSR0W::_01)
}
#[doc = "Selects 32 bytes per Message Buffer."]
#[inline]
pub fn _10(self) -> &'a mut W {
self.variant(MBDSR0W::_10)
}
#[doc = "Selects 64 bytes per Message Buffer."]
#[inline]
pub fn _11(self) -> &'a mut W {
self.variant(MBDSR0W::_11)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 3;
const OFFSET: u8 = 16;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `FDRATE`"]
pub enum FDRATEW {
#[doc = "Transmit a frame in nominal rate. The BRS bit in the Tx MB has no effect."] _0,
#[doc = "Transmit a frame with bit rate switching if the BRS bit in the Tx MB is recessive."] _1,
}
impl FDRATEW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
FDRATEW::_0 => false,
FDRATEW::_1 => true,
}
}
}
#[doc = r" Proxy"]
pub struct _FDRATEW<'a> {
w: &'a mut W,
}
impl<'a> _FDRATEW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: FDRATEW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Transmit a frame in nominal rate. The BRS bit in the Tx MB has no effect."]
#[inline]
pub fn _0(self) -> &'a mut W {
self.variant(FDRATEW::_0)
}
#[doc = "Transmit a frame with bit rate switching if the BRS bit in the Tx MB is recessive."]
#[inline]
pub fn _1(self) -> &'a mut W {
self.variant(FDRATEW::_1)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 31;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 0:5 - Transceiver Delay Compensation Value"]
#[inline]
pub fn tdcval(&self) -> TDCVALR {
let bits = {
const MASK: u8 = 63;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) as u8
};
TDCVALR { bits }
}
#[doc = "Bits 8:12 - Transceiver Delay Compensation Offset"]
#[inline]
pub fn tdcoff(&self) -> TDCOFFR {
let bits = {
const MASK: u8 = 31;
const OFFSET: u8 = 8;
((self.bits >> OFFSET) & MASK as u32) as u8
};
TDCOFFR { bits }
}
#[doc = "Bit 14 - Transceiver Delay Compensation Fail"]
#[inline]
pub fn tdcfail(&self) -> TDCFAILR {
TDCFAILR::_from({
const MASK: bool = true;
const OFFSET: u8 = 14;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 15 - Transceiver Delay Compensation Enable"]
#[inline]
pub fn tdcen(&self) -> TDCENR {
TDCENR::_from({
const MASK: bool = true;
const OFFSET: u8 = 15;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bits 16:17 - Message Buffer Data Size for Region 0"]
#[inline]
pub fn mbdsr0(&self) -> MBDSR0R {
MBDSR0R::_from({
const MASK: u8 = 3;
const OFFSET: u8 = 16;
((self.bits >> OFFSET) & MASK as u32) as u8
})
}
#[doc = "Bit 31 - Bit Rate Switch Enable"]
#[inline]
pub fn fdrate(&self) -> FDRATER {
FDRATER::_from({
const MASK: bool = true;
const OFFSET: u8 = 31;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
}
impl W {
#[doc = r" Reset value of the register"]
#[inline]
pub fn reset_value() -> W {
W { bits: 2147483904 }
}
#[doc = r" Writes raw bits to the register"]
#[inline]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.bits = bits;
self
}
#[doc = "Bits 8:12 - Transceiver Delay Compensation Offset"]
#[inline]
pub fn tdcoff(&mut self) -> _TDCOFFW {
_TDCOFFW { w: self }
}
#[doc = "Bit 14 - Transceiver Delay Compensation Fail"]
#[inline]
pub fn tdcfail(&mut self) -> _TDCFAILW {
_TDCFAILW { w: self }
}
#[doc = "Bit 15 - Transceiver Delay Compensation Enable"]
#[inline]
pub fn tdcen(&mut self) -> _TDCENW {
_TDCENW { w: self }
}
#[doc = "Bits 16:17 - Message Buffer Data Size for Region 0"]
#[inline]
pub fn mbdsr0(&mut self) -> _MBDSR0W {
_MBDSR0W { w: self }
}
#[doc = "Bit 31 - Bit Rate Switch Enable"]
#[inline]
pub fn fdrate(&mut self) -> _FDRATEW {
_FDRATEW { w: self }
}
}

146
src/can1/flt_dlc/mod.rs
View File

@ -1,146 +0,0 @@
#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
#[doc = r" Value to write to the register"]
pub struct W {
bits: u32,
}
impl super::FLT_DLC {
#[doc = r" Modifies the contents of the register"]
#[inline]
pub fn modify<F>(&self, f: F)
where
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
{
let bits = self.register.get();
let r = R { bits: bits };
let mut w = W { bits: bits };
f(&r, &mut w);
self.register.set(w.bits);
}
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
#[doc = r" Writes to the register"]
#[inline]
pub fn write<F>(&self, f: F)
where
F: FnOnce(&mut W) -> &mut W,
{
let mut w = W::reset_value();
f(&mut w);
self.register.set(w.bits);
}
#[doc = r" Writes the reset value to the register"]
#[inline]
pub fn reset(&self) {
self.write(|w| w)
}
}
#[doc = r" Value of the field"]
pub struct FLT_DLC_HIR {
bits: u8,
}
impl FLT_DLC_HIR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct FLT_DLC_LOR {
bits: u8,
}
impl FLT_DLC_LOR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Proxy"]
pub struct _FLT_DLC_HIW<'a> {
w: &'a mut W,
}
impl<'a> _FLT_DLC_HIW<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 15;
const OFFSET: u8 = 0;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = r" Proxy"]
pub struct _FLT_DLC_LOW<'a> {
w: &'a mut W,
}
impl<'a> _FLT_DLC_LOW<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 15;
const OFFSET: u8 = 16;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 0:3 - Upper Limit for Length of Data Bytes Filter"]
#[inline]
pub fn flt_dlc_hi(&self) -> FLT_DLC_HIR {
let bits = {
const MASK: u8 = 15;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) as u8
};
FLT_DLC_HIR { bits }
}
#[doc = "Bits 16:19 - Lower Limit for Length of Data Bytes Filter"]
#[inline]
pub fn flt_dlc_lo(&self) -> FLT_DLC_LOR {
let bits = {
const MASK: u8 = 15;
const OFFSET: u8 = 16;
((self.bits >> OFFSET) & MASK as u32) as u8
};
FLT_DLC_LOR { bits }
}
}
impl W {
#[doc = r" Reset value of the register"]
#[inline]
pub fn reset_value() -> W {
W { bits: 8 }
}
#[doc = r" Writes raw bits to the register"]
#[inline]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.bits = bits;
self
}
#[doc = "Bits 0:3 - Upper Limit for Length of Data Bytes Filter"]
#[inline]
pub fn flt_dlc_hi(&mut self) -> _FLT_DLC_HIW {
_FLT_DLC_HIW { w: self }
}
#[doc = "Bits 16:19 - Lower Limit for Length of Data Bytes Filter"]
#[inline]
pub fn flt_dlc_lo(&mut self) -> _FLT_DLC_LOW {
_FLT_DLC_LOW { w: self }
}
}

335
src/can1/flt_id1/mod.rs
View File

@ -1,335 +0,0 @@
#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
#[doc = r" Value to write to the register"]
pub struct W {
bits: u32,
}
impl super::FLT_ID1 {
#[doc = r" Modifies the contents of the register"]
#[inline]
pub fn modify<F>(&self, f: F)
where
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
{
let bits = self.register.get();
let r = R { bits: bits };
let mut w = W { bits: bits };
f(&r, &mut w);
self.register.set(w.bits);
}
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
#[doc = r" Writes to the register"]
#[inline]
pub fn write<F>(&self, f: F)
where
F: FnOnce(&mut W) -> &mut W,
{
let mut w = W::reset_value();
f(&mut w);
self.register.set(w.bits);
}
#[doc = r" Writes the reset value to the register"]
#[inline]
pub fn reset(&self) {
self.write(|w| w)
}
}
#[doc = r" Value of the field"]
pub struct FLT_ID1R {
bits: u32,
}
impl FLT_ID1R {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
}
#[doc = "Possible values of the field `FLT_RTR`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum FLT_RTRR {
#[doc = "Reject remote frame (accept data frame)"] _0,
#[doc = "Accept remote frame"] _1,
}
impl FLT_RTRR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
FLT_RTRR::_0 => false,
FLT_RTRR::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> FLT_RTRR {
match value {
false => FLT_RTRR::_0,
true => FLT_RTRR::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == FLT_RTRR::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == FLT_RTRR::_1
}
}
#[doc = "Possible values of the field `FLT_IDE`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum FLT_IDER {
#[doc = "Accept standard frame format"] _0,
#[doc = "Accept extended frame format"] _1,
}
impl FLT_IDER {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
FLT_IDER::_0 => false,
FLT_IDER::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> FLT_IDER {
match value {
false => FLT_IDER::_0,
true => FLT_IDER::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == FLT_IDER::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == FLT_IDER::_1
}
}
#[doc = r" Proxy"]
pub struct _FLT_ID1W<'a> {
w: &'a mut W,
}
impl<'a> _FLT_ID1W<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u32) -> &'a mut W {
const MASK: u32 = 536870911;
const OFFSET: u8 = 0;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `FLT_RTR`"]
pub enum FLT_RTRW {
#[doc = "Reject remote frame (accept data frame)"] _0,
#[doc = "Accept remote frame"] _1,
}
impl FLT_RTRW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
FLT_RTRW::_0 => false,
FLT_RTRW::_1 => true,
}
}
}
#[doc = r" Proxy"]
pub struct _FLT_RTRW<'a> {
w: &'a mut W,
}
impl<'a> _FLT_RTRW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: FLT_RTRW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Reject remote frame (accept data frame)"]
#[inline]
pub fn _0(self) -> &'a mut W {
self.variant(FLT_RTRW::_0)
}
#[doc = "Accept remote frame"]
#[inline]
pub fn _1(self) -> &'a mut W {
self.variant(FLT_RTRW::_1)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 29;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `FLT_IDE`"]
pub enum FLT_IDEW {
#[doc = "Accept standard frame format"] _0,
#[doc = "Accept extended frame format"] _1,
}
impl FLT_IDEW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
FLT_IDEW::_0 => false,
FLT_IDEW::_1 => true,
}
}
}
#[doc = r" Proxy"]
pub struct _FLT_IDEW<'a> {
w: &'a mut W,
}
impl<'a> _FLT_IDEW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: FLT_IDEW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Accept standard frame format"]
#[inline]
pub fn _0(self) -> &'a mut W {
self.variant(FLT_IDEW::_0)
}
#[doc = "Accept extended frame format"]
#[inline]
pub fn _1(self) -> &'a mut W {
self.variant(FLT_IDEW::_1)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 30;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 0:28 - ID Filter 1 for Pretended Networking filtering"]
#[inline]
pub fn flt_id1(&self) -> FLT_ID1R {
let bits = {
const MASK: u32 = 536870911;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) as u32
};
FLT_ID1R { bits }
}
#[doc = "Bit 29 - Remote Transmission Request Filter"]
#[inline]
pub fn flt_rtr(&self) -> FLT_RTRR {
FLT_RTRR::_from({
const MASK: bool = true;
const OFFSET: u8 = 29;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 30 - ID Extended Filter"]
#[inline]
pub fn flt_ide(&self) -> FLT_IDER {
FLT_IDER::_from({
const MASK: bool = true;
const OFFSET: u8 = 30;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
}
impl W {
#[doc = r" Reset value of the register"]
#[inline]
pub fn reset_value() -> W {
W { bits: 0 }
}
#[doc = r" Writes raw bits to the register"]
#[inline]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.bits = bits;
self
}
#[doc = "Bits 0:28 - ID Filter 1 for Pretended Networking filtering"]
#[inline]
pub fn flt_id1(&mut self) -> _FLT_ID1W {
_FLT_ID1W { w: self }
}
#[doc = "Bit 29 - Remote Transmission Request Filter"]
#[inline]
pub fn flt_rtr(&mut self) -> _FLT_RTRW {
_FLT_RTRW { w: self }
}
#[doc = "Bit 30 - ID Extended Filter"]
#[inline]
pub fn flt_ide(&mut self) -> _FLT_IDEW {
_FLT_IDEW { w: self }
}
}

335
src/can1/flt_id2_idmask/mod.rs
View File

@ -1,335 +0,0 @@
#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
#[doc = r" Value to write to the register"]
pub struct W {
bits: u32,
}
impl super::FLT_ID2_IDMASK {
#[doc = r" Modifies the contents of the register"]
#[inline]
pub fn modify<F>(&self, f: F)
where
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
{
let bits = self.register.get();
let r = R { bits: bits };
let mut w = W { bits: bits };
f(&r, &mut w);
self.register.set(w.bits);
}
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
#[doc = r" Writes to the register"]
#[inline]
pub fn write<F>(&self, f: F)
where
F: FnOnce(&mut W) -> &mut W,
{
let mut w = W::reset_value();
f(&mut w);
self.register.set(w.bits);
}
#[doc = r" Writes the reset value to the register"]
#[inline]
pub fn reset(&self) {
self.write(|w| w)
}
}
#[doc = r" Value of the field"]
pub struct FLT_ID2_IDMASKR {
bits: u32,
}
impl FLT_ID2_IDMASKR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
}
#[doc = "Possible values of the field `RTR_MSK`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum RTR_MSKR {
#[doc = "The corresponding bit in the filter is \"don't care\""] _0,
#[doc = "The corresponding bit in the filter is checked"] _1,
}
impl RTR_MSKR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
RTR_MSKR::_0 => false,
RTR_MSKR::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> RTR_MSKR {
match value {
false => RTR_MSKR::_0,
true => RTR_MSKR::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == RTR_MSKR::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == RTR_MSKR::_1
}
}
#[doc = "Possible values of the field `IDE_MSK`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum IDE_MSKR {
#[doc = "The corresponding bit in the filter is \"don't care\""] _0,
#[doc = "The corresponding bit in the filter is checked"] _1,
}
impl IDE_MSKR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
IDE_MSKR::_0 => false,
IDE_MSKR::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> IDE_MSKR {
match value {
false => IDE_MSKR::_0,
true => IDE_MSKR::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == IDE_MSKR::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == IDE_MSKR::_1
}
}
#[doc = r" Proxy"]
pub struct _FLT_ID2_IDMASKW<'a> {
w: &'a mut W,
}
impl<'a> _FLT_ID2_IDMASKW<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u32) -> &'a mut W {
const MASK: u32 = 536870911;
const OFFSET: u8 = 0;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `RTR_MSK`"]
pub enum RTR_MSKW {
#[doc = "The corresponding bit in the filter is \"don't care\""] _0,
#[doc = "The corresponding bit in the filter is checked"] _1,
}
impl RTR_MSKW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
RTR_MSKW::_0 => false,
RTR_MSKW::_1 => true,
}
}
}
#[doc = r" Proxy"]
pub struct _RTR_MSKW<'a> {
w: &'a mut W,
}
impl<'a> _RTR_MSKW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: RTR_MSKW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "The corresponding bit in the filter is \"don't care\""]
#[inline]
pub fn _0(self) -> &'a mut W {
self.variant(RTR_MSKW::_0)
}
#[doc = "The corresponding bit in the filter is checked"]
#[inline]
pub fn _1(self) -> &'a mut W {
self.variant(RTR_MSKW::_1)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 29;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `IDE_MSK`"]
pub enum IDE_MSKW {
#[doc = "The corresponding bit in the filter is \"don't care\""] _0,
#[doc = "The corresponding bit in the filter is checked"] _1,
}
impl IDE_MSKW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
IDE_MSKW::_0 => false,
IDE_MSKW::_1 => true,
}
}
}
#[doc = r" Proxy"]
pub struct _IDE_MSKW<'a> {
w: &'a mut W,
}
impl<'a> _IDE_MSKW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: IDE_MSKW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "The corresponding bit in the filter is \"don't care\""]
#[inline]
pub fn _0(self) -> &'a mut W {
self.variant(IDE_MSKW::_0)
}
#[doc = "The corresponding bit in the filter is checked"]
#[inline]
pub fn _1(self) -> &'a mut W {
self.variant(IDE_MSKW::_1)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 30;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 0:28 - ID Filter 2 for Pretended Networking Filtering / ID Mask Bits for Pretended Networking ID Filtering"]
#[inline]
pub fn flt_id2_idmask(&self) -> FLT_ID2_IDMASKR {
let bits = {
const MASK: u32 = 536870911;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) as u32
};
FLT_ID2_IDMASKR { bits }
}
#[doc = "Bit 29 - Remote Transmission Request Mask Bit"]
#[inline]
pub fn rtr_msk(&self) -> RTR_MSKR {
RTR_MSKR::_from({
const MASK: bool = true;
const OFFSET: u8 = 29;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 30 - ID Extended Mask Bit"]
#[inline]
pub fn ide_msk(&self) -> IDE_MSKR {
IDE_MSKR::_from({
const MASK: bool = true;
const OFFSET: u8 = 30;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
}
impl W {
#[doc = r" Reset value of the register"]
#[inline]
pub fn reset_value() -> W {
W { bits: 0 }
}
#[doc = r" Writes raw bits to the register"]
#[inline]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.bits = bits;
self
}
#[doc = "Bits 0:28 - ID Filter 2 for Pretended Networking Filtering / ID Mask Bits for Pretended Networking ID Filtering"]
#[inline]
pub fn flt_id2_idmask(&mut self) -> _FLT_ID2_IDMASKW {
_FLT_ID2_IDMASKW { w: self }
}
#[doc = "Bit 29 - Remote Transmission Request Mask Bit"]
#[inline]
pub fn rtr_msk(&mut self) -> _RTR_MSKW {
_RTR_MSKW { w: self }
}
#[doc = "Bit 30 - ID Extended Mask Bit"]
#[inline]
pub fn ide_msk(&mut self) -> _IDE_MSKW {
_IDE_MSKW { w: self }
}
}

622
src/can1/iflag1/mod.rs
View File

@ -1,622 +0,0 @@
#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
#[doc = r" Value to write to the register"]
pub struct W {
bits: u32,
}
impl super::IFLAG1 {
#[doc = r" Modifies the contents of the register"]
#[inline]
pub fn modify<F>(&self, f: F)
where
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
{
let bits = self.register.get();
let r = R { bits: bits };
let mut w = W { bits: bits };
f(&r, &mut w);
self.register.set(w.bits);
}
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
#[doc = r" Writes to the register"]
#[inline]
pub fn write<F>(&self, f: F)
where
F: FnOnce(&mut W) -> &mut W,
{
let mut w = W::reset_value();
f(&mut w);
self.register.set(w.bits);
}
#[doc = r" Writes the reset value to the register"]
#[inline]
pub fn reset(&self) {
self.write(|w| w)
}
}
#[doc = "Possible values of the field `BUF0I`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum BUF0IR {
#[doc = "The corresponding buffer has no occurrence of successfully completed transmission or reception when MCR[RFEN]=0."]
_0,
#[doc = "The corresponding buffer has successfully completed transmission or reception when MCR[RFEN]=0."]
_1,
}
impl BUF0IR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
BUF0IR::_0 => false,
BUF0IR::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> BUF0IR {
match value {
false => BUF0IR::_0,
true => BUF0IR::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == BUF0IR::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == BUF0IR::_1
}
}
#[doc = r" Value of the field"]
pub struct BUF4TO1IR {
bits: u8,
}
impl BUF4TO1IR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = "Possible values of the field `BUF5I`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum BUF5IR {
#[doc = "No occurrence of MB5 completing transmission/reception when MCR[RFEN]=0, or of frame(s) available in the FIFO, when MCR[RFEN]=1"]
_0,
#[doc = "MB5 completed transmission/reception when MCR[RFEN]=0, or frame(s) available in the Rx FIFO when MCR[RFEN]=1. It generates a DMA request in case of MCR[RFEN] and MCR[DMA] are enabled."]
_1,
}
impl BUF5IR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
BUF5IR::_0 => false,
BUF5IR::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> BUF5IR {
match value {
false => BUF5IR::_0,
true => BUF5IR::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == BUF5IR::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == BUF5IR::_1
}
}
#[doc = "Possible values of the field `BUF6I`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum BUF6IR {
#[doc = "No occurrence of MB6 completing transmission/reception when MCR[RFEN]=0, or of Rx FIFO almost full when MCR[RFEN]=1"]
_0,
#[doc = "MB6 completed transmission/reception when MCR[RFEN]=0, or Rx FIFO almost full when MCR[RFEN]=1"]
_1,
}
impl BUF6IR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
BUF6IR::_0 => false,
BUF6IR::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> BUF6IR {
match value {
false => BUF6IR::_0,
true => BUF6IR::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == BUF6IR::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == BUF6IR::_1
}
}
#[doc = "Possible values of the field `BUF7I`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum BUF7IR {
#[doc = "No occurrence of MB7 completing transmission/reception when MCR[RFEN]=0, or of Rx FIFO overflow when MCR[RFEN]=1"]
_0,
#[doc = "MB7 completed transmission/reception when MCR[RFEN]=0, or Rx FIFO overflow when MCR[RFEN]=1"]
_1,
}
impl BUF7IR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
BUF7IR::_0 => false,
BUF7IR::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> BUF7IR {
match value {
false => BUF7IR::_0,
true => BUF7IR::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == BUF7IR::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == BUF7IR::_1
}
}
#[doc = r" Value of the field"]
pub struct BUF31TO8IR {
bits: u32,
}
impl BUF31TO8IR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
}
#[doc = "Values that can be written to the field `BUF0I`"]
pub enum BUF0IW {
#[doc = "The corresponding buffer has no occurrence of successfully completed transmission or reception when MCR[RFEN]=0."]
_0,
#[doc = "The corresponding buffer has successfully completed transmission or reception when MCR[RFEN]=0."]
_1,
}
impl BUF0IW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
BUF0IW::_0 => false,
BUF0IW::_1 => true,
}
}
}
#[doc = r" Proxy"]
pub struct _BUF0IW<'a> {
w: &'a mut W,
}
impl<'a> _BUF0IW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: BUF0IW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "The corresponding buffer has no occurrence of successfully completed transmission or reception when MCR[RFEN]=0."]
#[inline]
pub fn _0(self) -> &'a mut W {
self.variant(BUF0IW::_0)
}
#[doc = "The corresponding buffer has successfully completed transmission or reception when MCR[RFEN]=0."]
#[inline]
pub fn _1(self) -> &'a mut W {
self.variant(BUF0IW::_1)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 0;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = r" Proxy"]
pub struct _BUF4TO1IW<'a> {
w: &'a mut W,
}
impl<'a> _BUF4TO1IW<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 15;
const OFFSET: u8 = 1;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `BUF5I`"]
pub enum BUF5IW {
#[doc = "No occurrence of MB5 completing transmission/reception when MCR[RFEN]=0, or of frame(s) available in the FIFO, when MCR[RFEN]=1"]
_0,
#[doc = "MB5 completed transmission/reception when MCR[RFEN]=0, or frame(s) available in the Rx FIFO when MCR[RFEN]=1. It generates a DMA request in case of MCR[RFEN] and MCR[DMA] are enabled."]
_1,
}
impl BUF5IW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
BUF5IW::_0 => false,
BUF5IW::_1 => true,
}
}
}
#[doc = r" Proxy"]
pub struct _BUF5IW<'a> {
w: &'a mut W,
}
impl<'a> _BUF5IW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: BUF5IW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "No occurrence of MB5 completing transmission/reception when MCR[RFEN]=0, or of frame(s) available in the FIFO, when MCR[RFEN]=1"]
#[inline]
pub fn _0(self) -> &'a mut W {
self.variant(BUF5IW::_0)
}
#[doc = "MB5 completed transmission/reception when MCR[RFEN]=0, or frame(s) available in the Rx FIFO when MCR[RFEN]=1. It generates a DMA request in case of MCR[RFEN] and MCR[DMA] are enabled."]
#[inline]
pub fn _1(self) -> &'a mut W {
self.variant(BUF5IW::_1)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 5;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `BUF6I`"]
pub enum BUF6IW {
#[doc = "No occurrence of MB6 completing transmission/reception when MCR[RFEN]=0, or of Rx FIFO almost full when MCR[RFEN]=1"]
_0,
#[doc = "MB6 completed transmission/reception when MCR[RFEN]=0, or Rx FIFO almost full when MCR[RFEN]=1"]
_1,
}
impl BUF6IW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
BUF6IW::_0 => false,
BUF6IW::_1 => true,
}
}
}
#[doc = r" Proxy"]
pub struct _BUF6IW<'a> {
w: &'a mut W,
}
impl<'a> _BUF6IW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: BUF6IW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "No occurrence of MB6 completing transmission/reception when MCR[RFEN]=0, or of Rx FIFO almost full when MCR[RFEN]=1"]
#[inline]
pub fn _0(self) -> &'a mut W {
self.variant(BUF6IW::_0)
}
#[doc = "MB6 completed transmission/reception when MCR[RFEN]=0, or Rx FIFO almost full when MCR[RFEN]=1"]
#[inline]
pub fn _1(self) -> &'a mut W {
self.variant(BUF6IW::_1)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 6;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `BUF7I`"]
pub enum BUF7IW {
#[doc = "No occurrence of MB7 completing transmission/reception when MCR[RFEN]=0, or of Rx FIFO overflow when MCR[RFEN]=1"]
_0,
#[doc = "MB7 completed transmission/reception when MCR[RFEN]=0, or Rx FIFO overflow when MCR[RFEN]=1"]
_1,
}
impl BUF7IW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
BUF7IW::_0 => false,
BUF7IW::_1 => true,
}
}
}
#[doc = r" Proxy"]
pub struct _BUF7IW<'a> {
w: &'a mut W,
}
impl<'a> _BUF7IW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: BUF7IW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "No occurrence of MB7 completing transmission/reception when MCR[RFEN]=0, or of Rx FIFO overflow when MCR[RFEN]=1"]
#[inline]
pub fn _0(self) -> &'a mut W {
self.variant(BUF7IW::_0)
}
#[doc = "MB7 completed transmission/reception when MCR[RFEN]=0, or Rx FIFO overflow when MCR[RFEN]=1"]
#[inline]
pub fn _1(self) -> &'a mut W {
self.variant(BUF7IW::_1)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 7;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = r" Proxy"]
pub struct _BUF31TO8IW<'a> {
w: &'a mut W,
}
impl<'a> _BUF31TO8IW<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u32) -> &'a mut W {
const MASK: u32 = 16777215;
const OFFSET: u8 = 8;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bit 0 - Buffer MB0 Interrupt Or Clear FIFO bit"]
#[inline]
pub fn buf0i(&self) -> BUF0IR {
BUF0IR::_from({
const MASK: bool = true;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bits 1:4 - Buffer MB i Interrupt Or \"reserved\""]
#[inline]
pub fn buf4to1i(&self) -> BUF4TO1IR {
let bits = {
const MASK: u8 = 15;
const OFFSET: u8 = 1;
((self.bits >> OFFSET) & MASK as u32) as u8
};
BUF4TO1IR { bits }
}
#[doc = "Bit 5 - Buffer MB5 Interrupt Or \"Frames available in Rx FIFO\""]
#[inline]
pub fn buf5i(&self) -> BUF5IR {
BUF5IR::_from({
const MASK: bool = true;
const OFFSET: u8 = 5;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 6 - Buffer MB6 Interrupt Or \"Rx FIFO Warning\""]
#[inline]
pub fn buf6i(&self) -> BUF6IR {
BUF6IR::_from({
const MASK: bool = true;
const OFFSET: u8 = 6;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 7 - Buffer MB7 Interrupt Or \"Rx FIFO Overflow\""]
#[inline]
pub fn buf7i(&self) -> BUF7IR {
BUF7IR::_from({
const MASK: bool = true;
const OFFSET: u8 = 7;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bits 8:31 - Buffer MBi Interrupt"]
#[inline]
pub fn buf31to8i(&self) -> BUF31TO8IR {
let bits = {
const MASK: u32 = 16777215;
const OFFSET: u8 = 8;
((self.bits >> OFFSET) & MASK as u32) as u32
};
BUF31TO8IR { bits }
}
}
impl W {
#[doc = r" Reset value of the register"]
#[inline]
pub fn reset_value() -> W {
W { bits: 0 }
}
#[doc = r" Writes raw bits to the register"]
#[inline]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.bits = bits;
self
}
#[doc = "Bit 0 - Buffer MB0 Interrupt Or Clear FIFO bit"]
#[inline]
pub fn buf0i(&mut self) -> _BUF0IW {
_BUF0IW { w: self }
}
#[doc = "Bits 1:4 - Buffer MB i Interrupt Or \"reserved\""]
#[inline]
pub fn buf4to1i(&mut self) -> _BUF4TO1IW {
_BUF4TO1IW { w: self }
}
#[doc = "Bit 5 - Buffer MB5 Interrupt Or \"Frames available in Rx FIFO\""]
#[inline]
pub fn buf5i(&mut self) -> _BUF5IW {
_BUF5IW { w: self }
}
#[doc = "Bit 6 - Buffer MB6 Interrupt Or \"Rx FIFO Warning\""]
#[inline]
pub fn buf6i(&mut self) -> _BUF6IW {
_BUF6IW { w: self }
}
#[doc = "Bit 7 - Buffer MB7 Interrupt Or \"Rx FIFO Overflow\""]
#[inline]
pub fn buf7i(&mut self) -> _BUF7IW {
_BUF7IW { w: self }
}
#[doc = "Bits 8:31 - Buffer MBi Interrupt"]
#[inline]
pub fn buf31to8i(&mut self) -> _BUF31TO8IW {
_BUF31TO8IW { w: self }
}
}

105
src/can1/imask1/mod.rs
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@ -1,105 +0,0 @@
#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
#[doc = r" Value to write to the register"]
pub struct W {
bits: u32,
}
impl super::IMASK1 {
#[doc = r" Modifies the contents of the register"]
#[inline]
pub fn modify<F>(&self, f: F)
where
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
{
let bits = self.register.get();
let r = R { bits: bits };
let mut w = W { bits: bits };
f(&r, &mut w);
self.register.set(w.bits);
}
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
#[doc = r" Writes to the register"]
#[inline]
pub fn write<F>(&self, f: F)
where
F: FnOnce(&mut W) -> &mut W,
{
let mut w = W::reset_value();
f(&mut w);
self.register.set(w.bits);
}
#[doc = r" Writes the reset value to the register"]
#[inline]
pub fn reset(&self) {
self.write(|w| w)
}
}
#[doc = r" Value of the field"]
pub struct BUF31TO0MR {
bits: u32,
}
impl BUF31TO0MR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
}
#[doc = r" Proxy"]
pub struct _BUF31TO0MW<'a> {
w: &'a mut W,
}
impl<'a> _BUF31TO0MW<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u32) -> &'a mut W {
const MASK: u32 = 4294967295;
const OFFSET: u8 = 0;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 0:31 - Buffer MB i Mask"]
#[inline]
pub fn buf31to0m(&self) -> BUF31TO0MR {
let bits = {
const MASK: u32 = 4294967295;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) as u32
};
BUF31TO0MR { bits }
}
}
impl W {
#[doc = r" Reset value of the register"]
#[inline]
pub fn reset_value() -> W {
W { bits: 0 }
}
#[doc = r" Writes raw bits to the register"]
#[inline]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.bits = bits;
self
}
#[doc = "Bits 0:31 - Buffer MB i Mask"]
#[inline]
pub fn buf31to0m(&mut self) -> _BUF31TO0MW {
_BUF31TO0MW { w: self }
}
}

1956
src/can1/mcr/mod.rs
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451
src/can1/mod.rs
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@ -1,451 +0,0 @@
use vcell::VolatileCell;
#[doc = r" Register block"]
#[repr(C)]
pub struct RegisterBlock {
#[doc = "0x00 - Module Configuration Register"] pub mcr: MCR,
#[doc = "0x04 - Control 1 register"] pub ctrl1: CTRL1,
#[doc = "0x08 - Free Running Timer"] pub timer: TIMER,
_reserved0: [u8; 4usize],
#[doc = "0x10 - Rx Mailboxes Global Mask Register"] pub rxmgmask: RXMGMASK,
#[doc = "0x14 - Rx 14 Mask register"] pub rx14mask: RX14MASK,
#[doc = "0x18 - Rx 15 Mask register"] pub rx15mask: RX15MASK,
#[doc = "0x1c - Error Counter"] pub ecr: ECR,
#[doc = "0x20 - Error and Status 1 register"] pub esr1: ESR1,
_reserved1: [u8; 4usize],
#[doc = "0x28 - Interrupt Masks 1 register"] pub imask1: IMASK1,
_reserved2: [u8; 4usize],
#[doc = "0x30 - Interrupt Flags 1 register"] pub iflag1: IFLAG1,
#[doc = "0x34 - Control 2 register"] pub ctrl2: CTRL2,
#[doc = "0x38 - Error and Status 2 register"] pub esr2: ESR2,
_reserved3: [u8; 8usize],
#[doc = "0x44 - CRC Register"] pub crcr: CRCR,
#[doc = "0x48 - Rx FIFO Global Mask register"] pub rxfgmask: RXFGMASK,
#[doc = "0x4c - Rx FIFO Information Register"] pub rxfir: RXFIR,
#[doc = "0x50 - CAN Bit Timing Register"] pub cbt: CBT,
_reserved4: [u8; 44usize],
#[doc = "0x80 - Embedded RAM"] pub embedded_ram: [EMBEDDEDRAM; 128],
_reserved5: [u8; 1536usize],
#[doc = "0x880 - Rx Individual Mask Registers"] pub rximr0: RXIMR0,
#[doc = "0x884 - Rx Individual Mask Registers"] pub rximr1: RXIMR1,
#[doc = "0x888 - Rx Individual Mask Registers"] pub rximr2: RXIMR2,
#[doc = "0x88c - Rx Individual Mask Registers"] pub rximr3: RXIMR3,
#[doc = "0x890 - Rx Individual Mask Registers"] pub rximr4: RXIMR4,
#[doc = "0x894 - Rx Individual Mask Registers"] pub rximr5: RXIMR5,
#[doc = "0x898 - Rx Individual Mask Registers"] pub rximr6: RXIMR6,
#[doc = "0x89c - Rx Individual Mask Registers"] pub rximr7: RXIMR7,
#[doc = "0x8a0 - Rx Individual Mask Registers"] pub rximr8: RXIMR8,
#[doc = "0x8a4 - Rx Individual Mask Registers"] pub rximr9: RXIMR9,
#[doc = "0x8a8 - Rx Individual Mask Registers"] pub rximr10: RXIMR10,
#[doc = "0x8ac - Rx Individual Mask Registers"] pub rximr11: RXIMR11,
#[doc = "0x8b0 - Rx Individual Mask Registers"] pub rximr12: RXIMR12,
#[doc = "0x8b4 - Rx Individual Mask Registers"] pub rximr13: RXIMR13,
#[doc = "0x8b8 - Rx Individual Mask Registers"] pub rximr14: RXIMR14,
#[doc = "0x8bc - Rx Individual Mask Registers"] pub rximr15: RXIMR15,
_reserved6: [u8; 576usize],
#[doc = "0xb00 - Pretended Networking Control 1 Register"] pub ctrl1_pn: CTRL1_PN,
#[doc = "0xb04 - Pretended Networking Control 2 Register"] pub ctrl2_pn: CTRL2_PN,
#[doc = "0xb08 - Pretended Networking Wake Up Match Register"] pub wu_mtc: WU_MTC,
#[doc = "0xb0c - Pretended Networking ID Filter 1 Register"] pub flt_id1: FLT_ID1,
#[doc = "0xb10 - Pretended Networking DLC Filter Register"] pub flt_dlc: FLT_DLC,
#[doc = "0xb14 - Pretended Networking Payload Low Filter 1 Register"] pub pl1_lo: PL1_LO,
#[doc = "0xb18 - Pretended Networking Payload High Filter 1 Register"] pub pl1_hi: PL1_HI,
#[doc = "0xb1c - Pretended Networking ID Filter 2 Register / ID Mask Register"]
pub flt_id2_idmask: FLT_ID2_IDMASK,
#[doc = "0xb20 - Pretended Networking Payload Low Filter 2 Register / Payload Low Mask Register"]
pub pl2_plmask_lo: PL2_PLMASK_LO,
#[doc = "0xb24 - Pretended Networking Payload High Filter 2 low order bits / Payload High Mask Register"]
pub pl2_plmask_hi: PL2_PLMASK_HI,
_reserved7: [u8; 24usize],
#[doc = "0xb40 - Wake Up Message Buffer Register for C/S"] pub wmb0_cs: WMB0_CS,
#[doc = "0xb44 - Wake Up Message Buffer Register for ID"] pub wmb0_id: WMB0_ID,
#[doc = "0xb48 - Wake Up Message Buffer Register for Data 0-3"] pub wmb0_d03: WMB0_D03,
#[doc = "0xb4c - Wake Up Message Buffer Register Data 4-7"] pub wmb0_d47: WMB0_D47,
#[doc = "0xb50 - Wake Up Message Buffer Register for C/S"] pub wmb1_cs: WMB1_CS,
#[doc = "0xb54 - Wake Up Message Buffer Register for ID"] pub wmb1_id: WMB1_ID,
#[doc = "0xb58 - Wake Up Message Buffer Register for Data 0-3"] pub wmb1_d03: WMB1_D03,
#[doc = "0xb5c - Wake Up Message Buffer Register Data 4-7"] pub wmb1_d47: WMB1_D47,
#[doc = "0xb60 - Wake Up Message Buffer Register for C/S"] pub wmb2_cs: WMB2_CS,
#[doc = "0xb64 - Wake Up Message Buffer Register for ID"] pub wmb2_id: WMB2_ID,
#[doc = "0xb68 - Wake Up Message Buffer Register for Data 0-3"] pub wmb2_d03: WMB2_D03,
#[doc = "0xb6c - Wake Up Message Buffer Register Data 4-7"] pub wmb2_d47: WMB2_D47,
#[doc = "0xb70 - Wake Up Message Buffer Register for C/S"] pub wmb3_cs: WMB3_CS,
#[doc = "0xb74 - Wake Up Message Buffer Register for ID"] pub wmb3_id: WMB3_ID,
#[doc = "0xb78 - Wake Up Message Buffer Register for Data 0-3"] pub wmb3_d03: WMB3_D03,
#[doc = "0xb7c - Wake Up Message Buffer Register Data 4-7"] pub wmb3_d47: WMB3_D47,
_reserved8: [u8; 128usize],
#[doc = "0xc00 - CAN FD Control Register"] pub fdctrl: FDCTRL,
#[doc = "0xc04 - CAN FD Bit Timing Register"] pub fdcbt: FDCBT,
#[doc = "0xc08 - CAN FD CRC Register"] pub fdcrc: FDCRC,
}
#[doc = "Module Configuration Register"]
pub struct MCR {
register: VolatileCell<u32>,
}
#[doc = "Module Configuration Register"]
pub mod mcr;
#[doc = "Control 1 register"]
pub struct CTRL1 {
register: VolatileCell<u32>,
}
#[doc = "Control 1 register"]
pub mod ctrl1;
#[doc = "Free Running Timer"]
pub struct TIMER {
register: VolatileCell<u32>,
}
#[doc = "Free Running Timer"]
pub mod timer;
#[doc = "Rx Mailboxes Global Mask Register"]
pub struct RXMGMASK {
register: VolatileCell<u32>,
}
#[doc = "Rx Mailboxes Global Mask Register"]
pub mod rxmgmask;
#[doc = "Rx 14 Mask register"]
pub struct RX14MASK {
register: VolatileCell<u32>,
}
#[doc = "Rx 14 Mask register"]
pub mod rx14mask;
#[doc = "Rx 15 Mask register"]
pub struct RX15MASK {
register: VolatileCell<u32>,
}
#[doc = "Rx 15 Mask register"]
pub mod rx15mask;
#[doc = "Error Counter"]
pub struct ECR {
register: VolatileCell<u32>,
}
#[doc = "Error Counter"]
pub mod ecr;
#[doc = "Error and Status 1 register"]
pub struct ESR1 {
register: VolatileCell<u32>,
}
#[doc = "Error and Status 1 register"]
pub mod esr1;
#[doc = "Interrupt Masks 1 register"]
pub struct IMASK1 {
register: VolatileCell<u32>,
}
#[doc = "Interrupt Masks 1 register"]
pub mod imask1;
#[doc = "Interrupt Flags 1 register"]
pub struct IFLAG1 {
register: VolatileCell<u32>,
}
#[doc = "Interrupt Flags 1 register"]
pub mod iflag1;
#[doc = "Control 2 register"]
pub struct CTRL2 {
register: VolatileCell<u32>,
}
#[doc = "Control 2 register"]
pub mod ctrl2;
#[doc = "Error and Status 2 register"]
pub struct ESR2 {
register: VolatileCell<u32>,
}
#[doc = "Error and Status 2 register"]
pub mod esr2;
#[doc = "CRC Register"]
pub struct CRCR {
register: VolatileCell<u32>,
}
#[doc = "CRC Register"]
pub mod crcr;
#[doc = "Rx FIFO Global Mask register"]
pub struct RXFGMASK {
register: VolatileCell<u32>,
}
#[doc = "Rx FIFO Global Mask register"]
pub mod rxfgmask;
#[doc = "Rx FIFO Information Register"]
pub struct RXFIR {
register: VolatileCell<u32>,
}
#[doc = "Rx FIFO Information Register"]
pub mod rxfir;
#[doc = "CAN Bit Timing Register"]
pub struct CBT {
register: VolatileCell<u32>,
}
#[doc = "CAN Bit Timing Register"]
pub mod cbt;
#[doc = "Embedded RAM"]
pub struct EMBEDDEDRAM {
register: VolatileCell<u32>,
}
#[doc = "Embedded RAM"]
pub mod embedded_ram;
#[doc = "Rx Individual Mask Registers"]
pub struct RXIMR0 {
register: VolatileCell<u32>,
}
#[doc = "Rx Individual Mask Registers"]
pub mod rximr0;
#[doc = "Rx Individual Mask Registers"]
pub struct RXIMR1 {
register: VolatileCell<u32>,
}
#[doc = "Rx Individual Mask Registers"]
pub mod rximr1;
#[doc = "Rx Individual Mask Registers"]
pub struct RXIMR2 {
register: VolatileCell<u32>,
}
#[doc = "Rx Individual Mask Registers"]
pub mod rximr2;
#[doc = "Rx Individual Mask Registers"]
pub struct RXIMR3 {
register: VolatileCell<u32>,
}
#[doc = "Rx Individual Mask Registers"]
pub mod rximr3;
#[doc = "Rx Individual Mask Registers"]
pub struct RXIMR4 {
register: VolatileCell<u32>,
}
#[doc = "Rx Individual Mask Registers"]
pub mod rximr4;
#[doc = "Rx Individual Mask Registers"]
pub struct RXIMR5 {
register: VolatileCell<u32>,
}
#[doc = "Rx Individual Mask Registers"]
pub mod rximr5;
#[doc = "Rx Individual Mask Registers"]
pub struct RXIMR6 {
register: VolatileCell<u32>,
}
#[doc = "Rx Individual Mask Registers"]
pub mod rximr6;
#[doc = "Rx Individual Mask Registers"]
pub struct RXIMR7 {
register: VolatileCell<u32>,
}
#[doc = "Rx Individual Mask Registers"]
pub mod rximr7;
#[doc = "Rx Individual Mask Registers"]
pub struct RXIMR8 {
register: VolatileCell<u32>,
}
#[doc = "Rx Individual Mask Registers"]
pub mod rximr8;
#[doc = "Rx Individual Mask Registers"]
pub struct RXIMR9 {
register: VolatileCell<u32>,
}
#[doc = "Rx Individual Mask Registers"]
pub mod rximr9;
#[doc = "Rx Individual Mask Registers"]
pub struct RXIMR10 {
register: VolatileCell<u32>,
}
#[doc = "Rx Individual Mask Registers"]
pub mod rximr10;
#[doc = "Rx Individual Mask Registers"]
pub struct RXIMR11 {
register: VolatileCell<u32>,
}
#[doc = "Rx Individual Mask Registers"]
pub mod rximr11;
#[doc = "Rx Individual Mask Registers"]
pub struct RXIMR12 {
register: VolatileCell<u32>,
}
#[doc = "Rx Individual Mask Registers"]
pub mod rximr12;
#[doc = "Rx Individual Mask Registers"]
pub struct RXIMR13 {
register: VolatileCell<u32>,
}
#[doc = "Rx Individual Mask Registers"]
pub mod rximr13;
#[doc = "Rx Individual Mask Registers"]
pub struct RXIMR14 {
register: VolatileCell<u32>,
}
#[doc = "Rx Individual Mask Registers"]
pub mod rximr14;
#[doc = "Rx Individual Mask Registers"]
pub struct RXIMR15 {
register: VolatileCell<u32>,
}
#[doc = "Rx Individual Mask Registers"]
pub mod rximr15;
#[doc = "Pretended Networking Control 1 Register"]
pub struct CTRL1_PN {
register: VolatileCell<u32>,
}
#[doc = "Pretended Networking Control 1 Register"]
pub mod ctrl1_pn;
#[doc = "Pretended Networking Control 2 Register"]
pub struct CTRL2_PN {
register: VolatileCell<u32>,
}
#[doc = "Pretended Networking Control 2 Register"]
pub mod ctrl2_pn;
#[doc = "Pretended Networking Wake Up Match Register"]
pub struct WU_MTC {
register: VolatileCell<u32>,
}
#[doc = "Pretended Networking Wake Up Match Register"]
pub mod wu_mtc;
#[doc = "Pretended Networking ID Filter 1 Register"]
pub struct FLT_ID1 {
register: VolatileCell<u32>,
}
#[doc = "Pretended Networking ID Filter 1 Register"]
pub mod flt_id1;
#[doc = "Pretended Networking DLC Filter Register"]
pub struct FLT_DLC {
register: VolatileCell<u32>,
}
#[doc = "Pretended Networking DLC Filter Register"]
pub mod flt_dlc;
#[doc = "Pretended Networking Payload Low Filter 1 Register"]
pub struct PL1_LO {
register: VolatileCell<u32>,
}
#[doc = "Pretended Networking Payload Low Filter 1 Register"]
pub mod pl1_lo;
#[doc = "Pretended Networking Payload High Filter 1 Register"]
pub struct PL1_HI {
register: VolatileCell<u32>,
}
#[doc = "Pretended Networking Payload High Filter 1 Register"]
pub mod pl1_hi;
#[doc = "Pretended Networking ID Filter 2 Register / ID Mask Register"]
pub struct FLT_ID2_IDMASK {
register: VolatileCell<u32>,
}
#[doc = "Pretended Networking ID Filter 2 Register / ID Mask Register"]
pub mod flt_id2_idmask;
#[doc = "Pretended Networking Payload Low Filter 2 Register / Payload Low Mask Register"]
pub struct PL2_PLMASK_LO {
register: VolatileCell<u32>,
}
#[doc = "Pretended Networking Payload Low Filter 2 Register / Payload Low Mask Register"]
pub mod pl2_plmask_lo;
#[doc = "Pretended Networking Payload High Filter 2 low order bits / Payload High Mask Register"]
pub struct PL2_PLMASK_HI {
register: VolatileCell<u32>,
}
#[doc = "Pretended Networking Payload High Filter 2 low order bits / Payload High Mask Register"]
pub mod pl2_plmask_hi;
#[doc = "Wake Up Message Buffer Register for C/S"]
pub struct WMB0_CS {
register: VolatileCell<u32>,
}
#[doc = "Wake Up Message Buffer Register for C/S"]
pub mod wmb0_cs;
#[doc = "Wake Up Message Buffer Register for ID"]
pub struct WMB0_ID {
register: VolatileCell<u32>,
}
#[doc = "Wake Up Message Buffer Register for ID"]
pub mod wmb0_id;
#[doc = "Wake Up Message Buffer Register for Data 0-3"]
pub struct WMB0_D03 {
register: VolatileCell<u32>,
}
#[doc = "Wake Up Message Buffer Register for Data 0-3"]
pub mod wmb0_d03;
#[doc = "Wake Up Message Buffer Register Data 4-7"]
pub struct WMB0_D47 {
register: VolatileCell<u32>,
}
#[doc = "Wake Up Message Buffer Register Data 4-7"]
pub mod wmb0_d47;
#[doc = "Wake Up Message Buffer Register for C/S"]
pub struct WMB1_CS {
register: VolatileCell<u32>,
}
#[doc = "Wake Up Message Buffer Register for C/S"]
pub mod wmb1_cs;
#[doc = "Wake Up Message Buffer Register for ID"]
pub struct WMB1_ID {
register: VolatileCell<u32>,
}
#[doc = "Wake Up Message Buffer Register for ID"]
pub mod wmb1_id;
#[doc = "Wake Up Message Buffer Register for Data 0-3"]
pub struct WMB1_D03 {
register: VolatileCell<u32>,
}
#[doc = "Wake Up Message Buffer Register for Data 0-3"]
pub mod wmb1_d03;
#[doc = "Wake Up Message Buffer Register Data 4-7"]
pub struct WMB1_D47 {
register: VolatileCell<u32>,
}
#[doc = "Wake Up Message Buffer Register Data 4-7"]
pub mod wmb1_d47;
#[doc = "Wake Up Message Buffer Register for C/S"]
pub struct WMB2_CS {
register: VolatileCell<u32>,
}
#[doc = "Wake Up Message Buffer Register for C/S"]
pub mod wmb2_cs;
#[doc = "Wake Up Message Buffer Register for ID"]
pub struct WMB2_ID {
register: VolatileCell<u32>,
}
#[doc = "Wake Up Message Buffer Register for ID"]
pub mod wmb2_id;
#[doc = "Wake Up Message Buffer Register for Data 0-3"]
pub struct WMB2_D03 {
register: VolatileCell<u32>,
}
#[doc = "Wake Up Message Buffer Register for Data 0-3"]
pub mod wmb2_d03;
#[doc = "Wake Up Message Buffer Register Data 4-7"]
pub struct WMB2_D47 {
register: VolatileCell<u32>,
}
#[doc = "Wake Up Message Buffer Register Data 4-7"]
pub mod wmb2_d47;
#[doc = "Wake Up Message Buffer Register for C/S"]
pub struct WMB3_CS {
register: VolatileCell<u32>,
}
#[doc = "Wake Up Message Buffer Register for C/S"]
pub mod wmb3_cs;
#[doc = "Wake Up Message Buffer Register for ID"]
pub struct WMB3_ID {
register: VolatileCell<u32>,
}
#[doc = "Wake Up Message Buffer Register for ID"]
pub mod wmb3_id;
#[doc = "Wake Up Message Buffer Register for Data 0-3"]
pub struct WMB3_D03 {
register: VolatileCell<u32>,
}
#[doc = "Wake Up Message Buffer Register for Data 0-3"]
pub mod wmb3_d03;
#[doc = "Wake Up Message Buffer Register Data 4-7"]
pub struct WMB3_D47 {
register: VolatileCell<u32>,
}
#[doc = "Wake Up Message Buffer Register Data 4-7"]
pub mod wmb3_d47;
#[doc = "CAN FD Control Register"]
pub struct FDCTRL {
register: VolatileCell<u32>,
}
#[doc = "CAN FD Control Register"]
pub mod fdctrl;
#[doc = "CAN FD Bit Timing Register"]
pub struct FDCBT {
register: VolatileCell<u32>,
}
#[doc = "CAN FD Bit Timing Register"]
pub mod fdcbt;
#[doc = "CAN FD CRC Register"]
pub struct FDCRC {
register: VolatileCell<u32>,
}
#[doc = "CAN FD CRC Register"]
pub mod fdcrc;

228
src/can1/pl1_hi/mod.rs
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@ -1,228 +0,0 @@
#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
#[doc = r" Value to write to the register"]
pub struct W {
bits: u32,
}
impl super::PL1_HI {
#[doc = r" Modifies the contents of the register"]
#[inline]
pub fn modify<F>(&self, f: F)
where
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
{
let bits = self.register.get();
let r = R { bits: bits };
let mut w = W { bits: bits };
f(&r, &mut w);
self.register.set(w.bits);
}
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
#[doc = r" Writes to the register"]
#[inline]
pub fn write<F>(&self, f: F)
where
F: FnOnce(&mut W) -> &mut W,
{
let mut w = W::reset_value();
f(&mut w);
self.register.set(w.bits);
}
#[doc = r" Writes the reset value to the register"]
#[inline]
pub fn reset(&self) {
self.write(|w| w)
}
}
#[doc = r" Value of the field"]
pub struct DATA_BYTE_7R {
bits: u8,
}
impl DATA_BYTE_7R {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct DATA_BYTE_6R {
bits: u8,
}
impl DATA_BYTE_6R {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct DATA_BYTE_5R {
bits: u8,
}
impl DATA_BYTE_5R {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct DATA_BYTE_4R {
bits: u8,
}
impl DATA_BYTE_4R {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Proxy"]
pub struct _DATA_BYTE_7W<'a> {
w: &'a mut W,
}
impl<'a> _DATA_BYTE_7W<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 255;
const OFFSET: u8 = 0;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = r" Proxy"]
pub struct _DATA_BYTE_6W<'a> {
w: &'a mut W,
}
impl<'a> _DATA_BYTE_6W<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 255;
const OFFSET: u8 = 8;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = r" Proxy"]
pub struct _DATA_BYTE_5W<'a> {
w: &'a mut W,
}
impl<'a> _DATA_BYTE_5W<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 255;
const OFFSET: u8 = 16;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = r" Proxy"]
pub struct _DATA_BYTE_4W<'a> {
w: &'a mut W,
}
impl<'a> _DATA_BYTE_4W<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 255;
const OFFSET: u8 = 24;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 0:7 - Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 7."]
#[inline]
pub fn data_byte_7(&self) -> DATA_BYTE_7R {
let bits = {
const MASK: u8 = 255;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) as u8
};
DATA_BYTE_7R { bits }
}
#[doc = "Bits 8:15 - Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 6."]
#[inline]
pub fn data_byte_6(&self) -> DATA_BYTE_6R {
let bits = {
const MASK: u8 = 255;
const OFFSET: u8 = 8;
((self.bits >> OFFSET) & MASK as u32) as u8
};
DATA_BYTE_6R { bits }
}
#[doc = "Bits 16:23 - Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 5."]
#[inline]
pub fn data_byte_5(&self) -> DATA_BYTE_5R {
let bits = {
const MASK: u8 = 255;
const OFFSET: u8 = 16;
((self.bits >> OFFSET) & MASK as u32) as u8
};
DATA_BYTE_5R { bits }
}
#[doc = "Bits 24:31 - Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 4."]
#[inline]
pub fn data_byte_4(&self) -> DATA_BYTE_4R {
let bits = {
const MASK: u8 = 255;
const OFFSET: u8 = 24;
((self.bits >> OFFSET) & MASK as u32) as u8
};
DATA_BYTE_4R { bits }
}
}
impl W {
#[doc = r" Reset value of the register"]
#[inline]
pub fn reset_value() -> W {
W { bits: 0 }
}
#[doc = r" Writes raw bits to the register"]
#[inline]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.bits = bits;
self
}
#[doc = "Bits 0:7 - Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 7."]
#[inline]
pub fn data_byte_7(&mut self) -> _DATA_BYTE_7W {
_DATA_BYTE_7W { w: self }
}
#[doc = "Bits 8:15 - Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 6."]
#[inline]
pub fn data_byte_6(&mut self) -> _DATA_BYTE_6W {
_DATA_BYTE_6W { w: self }
}
#[doc = "Bits 16:23 - Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 5."]
#[inline]
pub fn data_byte_5(&mut self) -> _DATA_BYTE_5W {
_DATA_BYTE_5W { w: self }
}
#[doc = "Bits 24:31 - Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 4."]
#[inline]
pub fn data_byte_4(&mut self) -> _DATA_BYTE_4W {
_DATA_BYTE_4W { w: self }
}
}

228
src/can1/pl1_lo/mod.rs
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@ -1,228 +0,0 @@
#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
#[doc = r" Value to write to the register"]
pub struct W {
bits: u32,
}
impl super::PL1_LO {
#[doc = r" Modifies the contents of the register"]
#[inline]
pub fn modify<F>(&self, f: F)
where
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
{
let bits = self.register.get();
let r = R { bits: bits };
let mut w = W { bits: bits };
f(&r, &mut w);
self.register.set(w.bits);
}
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
#[doc = r" Writes to the register"]
#[inline]
pub fn write<F>(&self, f: F)
where
F: FnOnce(&mut W) -> &mut W,
{
let mut w = W::reset_value();
f(&mut w);
self.register.set(w.bits);
}
#[doc = r" Writes the reset value to the register"]
#[inline]
pub fn reset(&self) {
self.write(|w| w)
}
}
#[doc = r" Value of the field"]
pub struct DATA_BYTE_3R {
bits: u8,
}
impl DATA_BYTE_3R {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct DATA_BYTE_2R {
bits: u8,
}
impl DATA_BYTE_2R {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct DATA_BYTE_1R {
bits: u8,
}
impl DATA_BYTE_1R {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct DATA_BYTE_0R {
bits: u8,
}
impl DATA_BYTE_0R {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Proxy"]
pub struct _DATA_BYTE_3W<'a> {
w: &'a mut W,
}
impl<'a> _DATA_BYTE_3W<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 255;
const OFFSET: u8 = 0;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = r" Proxy"]
pub struct _DATA_BYTE_2W<'a> {
w: &'a mut W,
}
impl<'a> _DATA_BYTE_2W<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 255;
const OFFSET: u8 = 8;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = r" Proxy"]
pub struct _DATA_BYTE_1W<'a> {
w: &'a mut W,
}
impl<'a> _DATA_BYTE_1W<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 255;
const OFFSET: u8 = 16;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = r" Proxy"]
pub struct _DATA_BYTE_0W<'a> {
w: &'a mut W,
}
impl<'a> _DATA_BYTE_0W<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 255;
const OFFSET: u8 = 24;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 0:7 - Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 3."]
#[inline]
pub fn data_byte_3(&self) -> DATA_BYTE_3R {
let bits = {
const MASK: u8 = 255;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) as u8
};
DATA_BYTE_3R { bits }
}
#[doc = "Bits 8:15 - Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 2."]
#[inline]
pub fn data_byte_2(&self) -> DATA_BYTE_2R {
let bits = {
const MASK: u8 = 255;
const OFFSET: u8 = 8;
((self.bits >> OFFSET) & MASK as u32) as u8
};
DATA_BYTE_2R { bits }
}
#[doc = "Bits 16:23 - Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 1."]
#[inline]
pub fn data_byte_1(&self) -> DATA_BYTE_1R {
let bits = {
const MASK: u8 = 255;
const OFFSET: u8 = 16;
((self.bits >> OFFSET) & MASK as u32) as u8
};
DATA_BYTE_1R { bits }
}
#[doc = "Bits 24:31 - Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 0."]
#[inline]
pub fn data_byte_0(&self) -> DATA_BYTE_0R {
let bits = {
const MASK: u8 = 255;
const OFFSET: u8 = 24;
((self.bits >> OFFSET) & MASK as u32) as u8
};
DATA_BYTE_0R { bits }
}
}
impl W {
#[doc = r" Reset value of the register"]
#[inline]
pub fn reset_value() -> W {
W { bits: 0 }
}
#[doc = r" Writes raw bits to the register"]
#[inline]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.bits = bits;
self
}
#[doc = "Bits 0:7 - Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 3."]
#[inline]
pub fn data_byte_3(&mut self) -> _DATA_BYTE_3W {
_DATA_BYTE_3W { w: self }
}
#[doc = "Bits 8:15 - Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 2."]
#[inline]
pub fn data_byte_2(&mut self) -> _DATA_BYTE_2W {
_DATA_BYTE_2W { w: self }
}
#[doc = "Bits 16:23 - Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 1."]
#[inline]
pub fn data_byte_1(&mut self) -> _DATA_BYTE_1W {
_DATA_BYTE_1W { w: self }
}
#[doc = "Bits 24:31 - Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 0."]
#[inline]
pub fn data_byte_0(&mut self) -> _DATA_BYTE_0W {
_DATA_BYTE_0W { w: self }
}
}

228
src/can1/pl2_plmask_hi/mod.rs
View File

@ -1,228 +0,0 @@
#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
#[doc = r" Value to write to the register"]
pub struct W {
bits: u32,
}
impl super::PL2_PLMASK_HI {
#[doc = r" Modifies the contents of the register"]
#[inline]
pub fn modify<F>(&self, f: F)
where
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
{
let bits = self.register.get();
let r = R { bits: bits };
let mut w = W { bits: bits };
f(&r, &mut w);
self.register.set(w.bits);
}
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
#[doc = r" Writes to the register"]
#[inline]
pub fn write<F>(&self, f: F)
where
F: FnOnce(&mut W) -> &mut W,
{
let mut w = W::reset_value();
f(&mut w);
self.register.set(w.bits);
}
#[doc = r" Writes the reset value to the register"]
#[inline]
pub fn reset(&self) {
self.write(|w| w)
}
}
#[doc = r" Value of the field"]
pub struct DATA_BYTE_7R {
bits: u8,
}
impl DATA_BYTE_7R {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct DATA_BYTE_6R {
bits: u8,
}
impl DATA_BYTE_6R {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct DATA_BYTE_5R {
bits: u8,
}
impl DATA_BYTE_5R {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct DATA_BYTE_4R {
bits: u8,
}
impl DATA_BYTE_4R {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Proxy"]
pub struct _DATA_BYTE_7W<'a> {
w: &'a mut W,
}
impl<'a> _DATA_BYTE_7W<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 255;
const OFFSET: u8 = 0;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = r" Proxy"]
pub struct _DATA_BYTE_6W<'a> {
w: &'a mut W,
}
impl<'a> _DATA_BYTE_6W<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 255;
const OFFSET: u8 = 8;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = r" Proxy"]
pub struct _DATA_BYTE_5W<'a> {
w: &'a mut W,
}
impl<'a> _DATA_BYTE_5W<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 255;
const OFFSET: u8 = 16;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = r" Proxy"]
pub struct _DATA_BYTE_4W<'a> {
w: &'a mut W,
}
impl<'a> _DATA_BYTE_4W<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 255;
const OFFSET: u8 = 24;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 0:7 - Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 7."]
#[inline]
pub fn data_byte_7(&self) -> DATA_BYTE_7R {
let bits = {
const MASK: u8 = 255;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) as u8
};
DATA_BYTE_7R { bits }
}
#[doc = "Bits 8:15 - Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 6."]
#[inline]
pub fn data_byte_6(&self) -> DATA_BYTE_6R {
let bits = {
const MASK: u8 = 255;
const OFFSET: u8 = 8;
((self.bits >> OFFSET) & MASK as u32) as u8
};
DATA_BYTE_6R { bits }
}
#[doc = "Bits 16:23 - Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 5."]
#[inline]
pub fn data_byte_5(&self) -> DATA_BYTE_5R {
let bits = {
const MASK: u8 = 255;
const OFFSET: u8 = 16;
((self.bits >> OFFSET) & MASK as u32) as u8
};
DATA_BYTE_5R { bits }
}
#[doc = "Bits 24:31 - Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 4."]
#[inline]
pub fn data_byte_4(&self) -> DATA_BYTE_4R {
let bits = {
const MASK: u8 = 255;
const OFFSET: u8 = 24;
((self.bits >> OFFSET) & MASK as u32) as u8
};
DATA_BYTE_4R { bits }
}
}
impl W {
#[doc = r" Reset value of the register"]
#[inline]
pub fn reset_value() -> W {
W { bits: 0 }
}
#[doc = r" Writes raw bits to the register"]
#[inline]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.bits = bits;
self
}
#[doc = "Bits 0:7 - Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 7."]
#[inline]
pub fn data_byte_7(&mut self) -> _DATA_BYTE_7W {
_DATA_BYTE_7W { w: self }
}
#[doc = "Bits 8:15 - Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 6."]
#[inline]
pub fn data_byte_6(&mut self) -> _DATA_BYTE_6W {
_DATA_BYTE_6W { w: self }
}
#[doc = "Bits 16:23 - Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 5."]
#[inline]
pub fn data_byte_5(&mut self) -> _DATA_BYTE_5W {
_DATA_BYTE_5W { w: self }
}
#[doc = "Bits 24:31 - Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 4."]
#[inline]
pub fn data_byte_4(&mut self) -> _DATA_BYTE_4W {
_DATA_BYTE_4W { w: self }
}
}

228
src/can1/pl2_plmask_lo/mod.rs
View File

@ -1,228 +0,0 @@
#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
#[doc = r" Value to write to the register"]
pub struct W {
bits: u32,
}
impl super::PL2_PLMASK_LO {
#[doc = r" Modifies the contents of the register"]
#[inline]
pub fn modify<F>(&self, f: F)
where
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
{
let bits = self.register.get();
let r = R { bits: bits };
let mut w = W { bits: bits };
f(&r, &mut w);
self.register.set(w.bits);
}
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
#[doc = r" Writes to the register"]
#[inline]
pub fn write<F>(&self, f: F)
where
F: FnOnce(&mut W) -> &mut W,
{
let mut w = W::reset_value();
f(&mut w);
self.register.set(w.bits);
}
#[doc = r" Writes the reset value to the register"]
#[inline]
pub fn reset(&self) {
self.write(|w| w)
}
}
#[doc = r" Value of the field"]
pub struct DATA_BYTE_3R {
bits: u8,
}
impl DATA_BYTE_3R {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct DATA_BYTE_2R {
bits: u8,
}
impl DATA_BYTE_2R {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct DATA_BYTE_1R {
bits: u8,
}
impl DATA_BYTE_1R {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct DATA_BYTE_0R {
bits: u8,
}
impl DATA_BYTE_0R {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Proxy"]
pub struct _DATA_BYTE_3W<'a> {
w: &'a mut W,
}
impl<'a> _DATA_BYTE_3W<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 255;
const OFFSET: u8 = 0;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = r" Proxy"]
pub struct _DATA_BYTE_2W<'a> {
w: &'a mut W,
}
impl<'a> _DATA_BYTE_2W<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 255;
const OFFSET: u8 = 8;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = r" Proxy"]
pub struct _DATA_BYTE_1W<'a> {
w: &'a mut W,
}
impl<'a> _DATA_BYTE_1W<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 255;
const OFFSET: u8 = 16;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = r" Proxy"]
pub struct _DATA_BYTE_0W<'a> {
w: &'a mut W,
}
impl<'a> _DATA_BYTE_0W<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 255;
const OFFSET: u8 = 24;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 0:7 - Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 3."]
#[inline]
pub fn data_byte_3(&self) -> DATA_BYTE_3R {
let bits = {
const MASK: u8 = 255;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) as u8
};
DATA_BYTE_3R { bits }
}
#[doc = "Bits 8:15 - Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 2."]
#[inline]
pub fn data_byte_2(&self) -> DATA_BYTE_2R {
let bits = {
const MASK: u8 = 255;
const OFFSET: u8 = 8;
((self.bits >> OFFSET) & MASK as u32) as u8
};
DATA_BYTE_2R { bits }
}
#[doc = "Bits 16:23 - Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 1."]
#[inline]
pub fn data_byte_1(&self) -> DATA_BYTE_1R {
let bits = {
const MASK: u8 = 255;
const OFFSET: u8 = 16;
((self.bits >> OFFSET) & MASK as u32) as u8
};
DATA_BYTE_1R { bits }
}
#[doc = "Bits 24:31 - Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 0."]
#[inline]
pub fn data_byte_0(&self) -> DATA_BYTE_0R {
let bits = {
const MASK: u8 = 255;
const OFFSET: u8 = 24;
((self.bits >> OFFSET) & MASK as u32) as u8
};
DATA_BYTE_0R { bits }
}
}
impl W {
#[doc = r" Reset value of the register"]
#[inline]
pub fn reset_value() -> W {
W { bits: 0 }
}
#[doc = r" Writes raw bits to the register"]
#[inline]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.bits = bits;
self
}
#[doc = "Bits 0:7 - Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 3."]
#[inline]
pub fn data_byte_3(&mut self) -> _DATA_BYTE_3W {
_DATA_BYTE_3W { w: self }
}
#[doc = "Bits 8:15 - Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 2."]
#[inline]
pub fn data_byte_2(&mut self) -> _DATA_BYTE_2W {
_DATA_BYTE_2W { w: self }
}
#[doc = "Bits 16:23 - Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 1."]
#[inline]
pub fn data_byte_1(&mut self) -> _DATA_BYTE_1W {
_DATA_BYTE_1W { w: self }
}
#[doc = "Bits 24:31 - Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 0."]
#[inline]
pub fn data_byte_0(&mut self) -> _DATA_BYTE_0W {
_DATA_BYTE_0W { w: self }
}
}

105
src/can1/rx14mask/mod.rs
View File

@ -1,105 +0,0 @@
#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
#[doc = r" Value to write to the register"]
pub struct W {
bits: u32,
}
impl super::RX14MASK {
#[doc = r" Modifies the contents of the register"]
#[inline]
pub fn modify<F>(&self, f: F)
where
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
{
let bits = self.register.get();
let r = R { bits: bits };
let mut w = W { bits: bits };
f(&r, &mut w);
self.register.set(w.bits);
}
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
#[doc = r" Writes to the register"]
#[inline]
pub fn write<F>(&self, f: F)
where
F: FnOnce(&mut W) -> &mut W,
{
let mut w = W::reset_value();
f(&mut w);
self.register.set(w.bits);
}
#[doc = r" Writes the reset value to the register"]
#[inline]
pub fn reset(&self) {
self.write(|w| w)
}
}
#[doc = r" Value of the field"]
pub struct RX14MR {
bits: u32,
}
impl RX14MR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
}
#[doc = r" Proxy"]
pub struct _RX14MW<'a> {
w: &'a mut W,
}
impl<'a> _RX14MW<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u32) -> &'a mut W {
const MASK: u32 = 4294967295;
const OFFSET: u8 = 0;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 0:31 - Rx Buffer 14 Mask Bits"]
#[inline]
pub fn rx14m(&self) -> RX14MR {
let bits = {
const MASK: u32 = 4294967295;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) as u32
};
RX14MR { bits }
}
}
impl W {
#[doc = r" Reset value of the register"]
#[inline]
pub fn reset_value() -> W {
W { bits: 0 }
}
#[doc = r" Writes raw bits to the register"]
#[inline]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.bits = bits;
self
}
#[doc = "Bits 0:31 - Rx Buffer 14 Mask Bits"]
#[inline]
pub fn rx14m(&mut self) -> _RX14MW {
_RX14MW { w: self }
}
}

105
src/can1/rx15mask/mod.rs
View File

@ -1,105 +0,0 @@
#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
#[doc = r" Value to write to the register"]
pub struct W {
bits: u32,
}
impl super::RX15MASK {
#[doc = r" Modifies the contents of the register"]
#[inline]
pub fn modify<F>(&self, f: F)
where
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
{
let bits = self.register.get();
let r = R { bits: bits };
let mut w = W { bits: bits };
f(&r, &mut w);
self.register.set(w.bits);
}
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
#[doc = r" Writes to the register"]
#[inline]
pub fn write<F>(&self, f: F)
where
F: FnOnce(&mut W) -> &mut W,
{
let mut w = W::reset_value();
f(&mut w);
self.register.set(w.bits);
}
#[doc = r" Writes the reset value to the register"]
#[inline]
pub fn reset(&self) {
self.write(|w| w)
}
}
#[doc = r" Value of the field"]
pub struct RX15MR {
bits: u32,
}
impl RX15MR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
}
#[doc = r" Proxy"]
pub struct _RX15MW<'a> {
w: &'a mut W,
}
impl<'a> _RX15MW<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u32) -> &'a mut W {
const MASK: u32 = 4294967295;
const OFFSET: u8 = 0;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 0:31 - Rx Buffer 15 Mask Bits"]
#[inline]
pub fn rx15m(&self) -> RX15MR {
let bits = {
const MASK: u32 = 4294967295;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) as u32
};
RX15MR { bits }
}
}
impl W {
#[doc = r" Reset value of the register"]
#[inline]
pub fn reset_value() -> W {
W { bits: 0 }
}
#[doc = r" Writes raw bits to the register"]
#[inline]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.bits = bits;
self
}
#[doc = "Bits 0:31 - Rx Buffer 15 Mask Bits"]
#[inline]
pub fn rx15m(&mut self) -> _RX15MW {
_RX15MW { w: self }
}
}

105
src/can1/rxfgmask/mod.rs
View File

@ -1,105 +0,0 @@
#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
#[doc = r" Value to write to the register"]
pub struct W {
bits: u32,
}
impl super::RXFGMASK {
#[doc = r" Modifies the contents of the register"]
#[inline]
pub fn modify<F>(&self, f: F)
where
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
{
let bits = self.register.get();
let r = R { bits: bits };
let mut w = W { bits: bits };
f(&r, &mut w);
self.register.set(w.bits);
}
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
#[doc = r" Writes to the register"]
#[inline]
pub fn write<F>(&self, f: F)
where
F: FnOnce(&mut W) -> &mut W,
{
let mut w = W::reset_value();
f(&mut w);
self.register.set(w.bits);
}
#[doc = r" Writes the reset value to the register"]
#[inline]
pub fn reset(&self) {
self.write(|w| w)
}
}
#[doc = r" Value of the field"]
pub struct FGMR {
bits: u32,
}
impl FGMR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
}
#[doc = r" Proxy"]
pub struct _FGMW<'a> {
w: &'a mut W,
}
impl<'a> _FGMW<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u32) -> &'a mut W {
const MASK: u32 = 4294967295;
const OFFSET: u8 = 0;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 0:31 - Rx FIFO Global Mask Bits"]
#[inline]
pub fn fgm(&self) -> FGMR {
let bits = {
const MASK: u32 = 4294967295;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) as u32
};
FGMR { bits }
}
}
impl W {
#[doc = r" Reset value of the register"]
#[inline]
pub fn reset_value() -> W {
W { bits: 0 }
}
#[doc = r" Writes raw bits to the register"]
#[inline]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.bits = bits;
self
}
#[doc = "Bits 0:31 - Rx FIFO Global Mask Bits"]
#[inline]
pub fn fgm(&mut self) -> _FGMW {
_FGMW { w: self }
}
}

41
src/can1/rxfir/mod.rs
View File

@ -1,41 +0,0 @@
#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
impl super::RXFIR {
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
}
#[doc = r" Value of the field"]
pub struct IDHITR {
bits: u16,
}
impl IDHITR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u16 {
self.bits
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 0:8 - Identifier Acceptance Filter Hit Indicator"]
#[inline]
pub fn idhit(&self) -> IDHITR {
let bits = {
const MASK: u16 = 511;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) as u16
};
IDHITR { bits }
}
}

105
src/can1/rximr0/mod.rs
View File

@ -1,105 +0,0 @@
#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
#[doc = r" Value to write to the register"]
pub struct W {
bits: u32,
}
impl super::RXIMR0 {
#[doc = r" Modifies the contents of the register"]
#[inline]
pub fn modify<F>(&self, f: F)
where
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
{
let bits = self.register.get();
let r = R { bits: bits };
let mut w = W { bits: bits };
f(&r, &mut w);
self.register.set(w.bits);
}
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
#[doc = r" Writes to the register"]
#[inline]
pub fn write<F>(&self, f: F)
where
F: FnOnce(&mut W) -> &mut W,
{
let mut w = W::reset_value();
f(&mut w);
self.register.set(w.bits);
}
#[doc = r" Writes the reset value to the register"]
#[inline]
pub fn reset(&self) {
self.write(|w| w)
}
}
#[doc = r" Value of the field"]
pub struct MIR {
bits: u32,
}
impl MIR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
}
#[doc = r" Proxy"]
pub struct _MIW<'a> {
w: &'a mut W,
}
impl<'a> _MIW<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u32) -> &'a mut W {
const MASK: u32 = 4294967295;
const OFFSET: u8 = 0;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 0:31 - Individual Mask Bits"]
#[inline]
pub fn mi(&self) -> MIR {
let bits = {
const MASK: u32 = 4294967295;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) as u32
};
MIR { bits }
}
}
impl W {
#[doc = r" Reset value of the register"]
#[inline]
pub fn reset_value() -> W {
W { bits: 0 }
}
#[doc = r" Writes raw bits to the register"]
#[inline]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.bits = bits;
self
}
#[doc = "Bits 0:31 - Individual Mask Bits"]
#[inline]
pub fn mi(&mut self) -> _MIW {
_MIW { w: self }
}
}

105
src/can1/rximr1/mod.rs
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@ -1,105 +0,0 @@
#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
#[doc = r" Value to write to the register"]
pub struct W {
bits: u32,
}
impl super::RXIMR1 {
#[doc = r" Modifies the contents of the register"]
#[inline]
pub fn modify<F>(&self, f: F)
where
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
{
let bits = self.register.get();
let r = R { bits: bits };
let mut w = W { bits: bits };
f(&r, &mut w);
self.register.set(w.bits);
}
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
#[doc = r" Writes to the register"]
#[inline]
pub fn write<F>(&self, f: F)
where
F: FnOnce(&mut W) -> &mut W,
{
let mut w = W::reset_value();
f(&mut w);
self.register.set(w.bits);
}
#[doc = r" Writes the reset value to the register"]
#[inline]
pub fn reset(&self) {
self.write(|w| w)
}
}
#[doc = r" Value of the field"]
pub struct MIR {
bits: u32,
}
impl MIR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
}
#[doc = r" Proxy"]
pub struct _MIW<'a> {
w: &'a mut W,
}
impl<'a> _MIW<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u32) -> &'a mut W {
const MASK: u32 = 4294967295;
const OFFSET: u8 = 0;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 0:31 - Individual Mask Bits"]
#[inline]
pub fn mi(&self) -> MIR {
let bits = {
const MASK: u32 = 4294967295;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) as u32
};
MIR { bits }
}
}
impl W {
#[doc = r" Reset value of the register"]
#[inline]
pub fn reset_value() -> W {
W { bits: 0 }
}
#[doc = r" Writes raw bits to the register"]
#[inline]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.bits = bits;
self
}
#[doc = "Bits 0:31 - Individual Mask Bits"]
#[inline]
pub fn mi(&mut self) -> _MIW {
_MIW { w: self }
}
}

105
src/can1/rximr10/mod.rs
View File

@ -1,105 +0,0 @@
#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
#[doc = r" Value to write to the register"]
pub struct W {
bits: u32,
}
impl super::RXIMR10 {
#[doc = r" Modifies the contents of the register"]
#[inline]
pub fn modify<F>(&self, f: F)
where
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
{
let bits = self.register.get();
let r = R { bits: bits };
let mut w = W { bits: bits };
f(&r, &mut w);
self.register.set(w.bits);
}
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
#[doc = r" Writes to the register"]
#[inline]
pub fn write<F>(&self, f: F)
where
F: FnOnce(&mut W) -> &mut W,
{
let mut w = W::reset_value();
f(&mut w);
self.register.set(w.bits);
}
#[doc = r" Writes the reset value to the register"]
#[inline]
pub fn reset(&self) {
self.write(|w| w)
}
}
#[doc = r" Value of the field"]
pub struct MIR {
bits: u32,
}
impl MIR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
}
#[doc = r" Proxy"]
pub struct _MIW<'a> {
w: &'a mut W,
}
impl<'a> _MIW<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u32) -> &'a mut W {
const MASK: u32 = 4294967295;
const OFFSET: u8 = 0;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 0:31 - Individual Mask Bits"]
#[inline]
pub fn mi(&self) -> MIR {
let bits = {
const MASK: u32 = 4294967295;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) as u32
};
MIR { bits }
}
}
impl W {
#[doc = r" Reset value of the register"]
#[inline]
pub fn reset_value() -> W {
W { bits: 0 }
}
#[doc = r" Writes raw bits to the register"]
#[inline]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.bits = bits;
self
}
#[doc = "Bits 0:31 - Individual Mask Bits"]
#[inline]
pub fn mi(&mut self) -> _MIW {
_MIW { w: self }
}
}

105
src/can1/rximr11/mod.rs
View File

@ -1,105 +0,0 @@
#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
#[doc = r" Value to write to the register"]
pub struct W {
bits: u32,
}
impl super::RXIMR11 {
#[doc = r" Modifies the contents of the register"]
#[inline]
pub fn modify<F>(&self, f: F)
where
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
{
let bits = self.register.get();
let r = R { bits: bits };
let mut w = W { bits: bits };
f(&r, &mut w);
self.register.set(w.bits);
}
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
#[doc = r" Writes to the register"]
#[inline]
pub fn write<F>(&self, f: F)
where
F: FnOnce(&mut W) -> &mut W,
{
let mut w = W::reset_value();
f(&mut w);
self.register.set(w.bits);
}
#[doc = r" Writes the reset value to the register"]
#[inline]
pub fn reset(&self) {
self.write(|w| w)
}
}
#[doc = r" Value of the field"]
pub struct MIR {
bits: u32,
}
impl MIR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
}
#[doc = r" Proxy"]
pub struct _MIW<'a> {
w: &'a mut W,
}
impl<'a> _MIW<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u32) -> &'a mut W {
const MASK: u32 = 4294967295;
const OFFSET: u8 = 0;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 0:31 - Individual Mask Bits"]
#[inline]
pub fn mi(&self) -> MIR {
let bits = {
const MASK: u32 = 4294967295;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) as u32
};
MIR { bits }
}
}
impl W {
#[doc = r" Reset value of the register"]
#[inline]
pub fn reset_value() -> W {
W { bits: 0 }
}
#[doc = r" Writes raw bits to the register"]
#[inline]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.bits = bits;
self
}
#[doc = "Bits 0:31 - Individual Mask Bits"]
#[inline]
pub fn mi(&mut self) -> _MIW {
_MIW { w: self }
}
}

105
src/can1/rximr12/mod.rs
View File

@ -1,105 +0,0 @@
#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
#[doc = r" Value to write to the register"]
pub struct W {
bits: u32,
}
impl super::RXIMR12 {
#[doc = r" Modifies the contents of the register"]
#[inline]
pub fn modify<F>(&self, f: F)
where
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
{
let bits = self.register.get();
let r = R { bits: bits };
let mut w = W { bits: bits };
f(&r, &mut w);
self.register.set(w.bits);
}
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
#[doc = r" Writes to the register"]
#[inline]
pub fn write<F>(&self, f: F)
where
F: FnOnce(&mut W) -> &mut W,
{
let mut w = W::reset_value();
f(&mut w);
self.register.set(w.bits);
}
#[doc = r" Writes the reset value to the register"]
#[inline]
pub fn reset(&self) {
self.write(|w| w)
}
}
#[doc = r" Value of the field"]
pub struct MIR {
bits: u32,
}
impl MIR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
}
#[doc = r" Proxy"]
pub struct _MIW<'a> {
w: &'a mut W,
}
impl<'a> _MIW<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u32) -> &'a mut W {
const MASK: u32 = 4294967295;
const OFFSET: u8 = 0;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 0:31 - Individual Mask Bits"]
#[inline]
pub fn mi(&self) -> MIR {
let bits = {
const MASK: u32 = 4294967295;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) as u32
};
MIR { bits }
}
}
impl W {
#[doc = r" Reset value of the register"]
#[inline]
pub fn reset_value() -> W {
W { bits: 0 }
}
#[doc = r" Writes raw bits to the register"]
#[inline]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.bits = bits;
self
}
#[doc = "Bits 0:31 - Individual Mask Bits"]
#[inline]
pub fn mi(&mut self) -> _MIW {
_MIW { w: self }
}
}

105
src/can1/rximr13/mod.rs
View File

@ -1,105 +0,0 @@
#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
#[doc = r" Value to write to the register"]
pub struct W {
bits: u32,
}
impl super::RXIMR13 {
#[doc = r" Modifies the contents of the register"]
#[inline]
pub fn modify<F>(&self, f: F)
where
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
{
let bits = self.register.get();
let r = R { bits: bits };
let mut w = W { bits: bits };
f(&r, &mut w);
self.register.set(w.bits);
}
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
#[doc = r" Writes to the register"]
#[inline]
pub fn write<F>(&self, f: F)
where
F: FnOnce(&mut W) -> &mut W,
{
let mut w = W::reset_value();
f(&mut w);
self.register.set(w.bits);
}
#[doc = r" Writes the reset value to the register"]
#[inline]
pub fn reset(&self) {
self.write(|w| w)
}
}
#[doc = r" Value of the field"]
pub struct MIR {
bits: u32,
}
impl MIR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
}
#[doc = r" Proxy"]
pub struct _MIW<'a> {
w: &'a mut W,
}
impl<'a> _MIW<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u32) -> &'a mut W {
const MASK: u32 = 4294967295;
const OFFSET: u8 = 0;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 0:31 - Individual Mask Bits"]
#[inline]
pub fn mi(&self) -> MIR {
let bits = {
const MASK: u32 = 4294967295;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) as u32
};
MIR { bits }
}
}
impl W {
#[doc = r" Reset value of the register"]
#[inline]
pub fn reset_value() -> W {
W { bits: 0 }
}
#[doc = r" Writes raw bits to the register"]
#[inline]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.bits = bits;
self
}
#[doc = "Bits 0:31 - Individual Mask Bits"]
#[inline]
pub fn mi(&mut self) -> _MIW {
_MIW { w: self }
}
}

105
src/can1/rximr14/mod.rs
View File

@ -1,105 +0,0 @@
#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
#[doc = r" Value to write to the register"]
pub struct W {
bits: u32,
}
impl super::RXIMR14 {
#[doc = r" Modifies the contents of the register"]
#[inline]
pub fn modify<F>(&self, f: F)
where
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
{
let bits = self.register.get();
let r = R { bits: bits };
let mut w = W { bits: bits };
f(&r, &mut w);
self.register.set(w.bits);
}
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
#[doc = r" Writes to the register"]
#[inline]
pub fn write<F>(&self, f: F)
where
F: FnOnce(&mut W) -> &mut W,
{
let mut w = W::reset_value();
f(&mut w);
self.register.set(w.bits);
}
#[doc = r" Writes the reset value to the register"]
#[inline]
pub fn reset(&self) {
self.write(|w| w)
}
}
#[doc = r" Value of the field"]
pub struct MIR {
bits: u32,
}
impl MIR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
}
#[doc = r" Proxy"]
pub struct _MIW<'a> {
w: &'a mut W,
}
impl<'a> _MIW<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u32) -> &'a mut W {
const MASK: u32 = 4294967295;
const OFFSET: u8 = 0;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 0:31 - Individual Mask Bits"]
#[inline]
pub fn mi(&self) -> MIR {
let bits = {
const MASK: u32 = 4294967295;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) as u32
};
MIR { bits }
}
}
impl W {
#[doc = r" Reset value of the register"]
#[inline]
pub fn reset_value() -> W {
W { bits: 0 }
}
#[doc = r" Writes raw bits to the register"]
#[inline]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.bits = bits;
self
}
#[doc = "Bits 0:31 - Individual Mask Bits"]
#[inline]
pub fn mi(&mut self) -> _MIW {
_MIW { w: self }
}
}

105
src/can1/rximr15/mod.rs
View File

@ -1,105 +0,0 @@
#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
#[doc = r" Value to write to the register"]
pub struct W {
bits: u32,
}
impl super::RXIMR15 {
#[doc = r" Modifies the contents of the register"]
#[inline]
pub fn modify<F>(&self, f: F)
where
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
{
let bits = self.register.get();
let r = R { bits: bits };
let mut w = W { bits: bits };
f(&r, &mut w);
self.register.set(w.bits);
}
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
#[doc = r" Writes to the register"]
#[inline]
pub fn write<F>(&self, f: F)
where
F: FnOnce(&mut W) -> &mut W,
{
let mut w = W::reset_value();
f(&mut w);
self.register.set(w.bits);
}
#[doc = r" Writes the reset value to the register"]
#[inline]
pub fn reset(&self) {
self.write(|w| w)
}
}
#[doc = r" Value of the field"]
pub struct MIR {
bits: u32,
}
impl MIR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
}
#[doc = r" Proxy"]
pub struct _MIW<'a> {
w: &'a mut W,
}
impl<'a> _MIW<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u32) -> &'a mut W {
const MASK: u32 = 4294967295;
const OFFSET: u8 = 0;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 0:31 - Individual Mask Bits"]
#[inline]
pub fn mi(&self) -> MIR {
let bits = {
const MASK: u32 = 4294967295;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) as u32
};
MIR { bits }
}
}
impl W {
#[doc = r" Reset value of the register"]
#[inline]
pub fn reset_value() -> W {
W { bits: 0 }
}
#[doc = r" Writes raw bits to the register"]
#[inline]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.bits = bits;
self
}
#[doc = "Bits 0:31 - Individual Mask Bits"]
#[inline]
pub fn mi(&mut self) -> _MIW {
_MIW { w: self }
}
}

105
src/can1/rximr2/mod.rs
View File

@ -1,105 +0,0 @@
#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
#[doc = r" Value to write to the register"]
pub struct W {
bits: u32,
}
impl super::RXIMR2 {
#[doc = r" Modifies the contents of the register"]
#[inline]
pub fn modify<F>(&self, f: F)
where
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
{
let bits = self.register.get();
let r = R { bits: bits };
let mut w = W { bits: bits };
f(&r, &mut w);
self.register.set(w.bits);
}
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
#[doc = r" Writes to the register"]
#[inline]
pub fn write<F>(&self, f: F)
where
F: FnOnce(&mut W) -> &mut W,
{
let mut w = W::reset_value();
f(&mut w);
self.register.set(w.bits);
}
#[doc = r" Writes the reset value to the register"]
#[inline]
pub fn reset(&self) {
self.write(|w| w)
}
}
#[doc = r" Value of the field"]
pub struct MIR {
bits: u32,
}
impl MIR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
}
#[doc = r" Proxy"]
pub struct _MIW<'a> {
w: &'a mut W,
}
impl<'a> _MIW<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u32) -> &'a mut W {
const MASK: u32 = 4294967295;
const OFFSET: u8 = 0;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 0:31 - Individual Mask Bits"]
#[inline]
pub fn mi(&self) -> MIR {
let bits = {
const MASK: u32 = 4294967295;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) as u32
};
MIR { bits }
}
}
impl W {
#[doc = r" Reset value of the register"]
#[inline]
pub fn reset_value() -> W {
W { bits: 0 }
}
#[doc = r" Writes raw bits to the register"]
#[inline]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.bits = bits;
self
}
#[doc = "Bits 0:31 - Individual Mask Bits"]
#[inline]
pub fn mi(&mut self) -> _MIW {
_MIW { w: self }
}
}

105
src/can1/rximr3/mod.rs
View File

@ -1,105 +0,0 @@
#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
#[doc = r" Value to write to the register"]
pub struct W {
bits: u32,
}
impl super::RXIMR3 {
#[doc = r" Modifies the contents of the register"]
#[inline]
pub fn modify<F>(&self, f: F)
where
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
{
let bits = self.register.get();
let r = R { bits: bits };
let mut w = W { bits: bits };
f(&r, &mut w);
self.register.set(w.bits);
}
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
#[doc = r" Writes to the register"]
#[inline]
pub fn write<F>(&self, f: F)
where
F: FnOnce(&mut W) -> &mut W,
{
let mut w = W::reset_value();
f(&mut w);
self.register.set(w.bits);
}
#[doc = r" Writes the reset value to the register"]
#[inline]
pub fn reset(&self) {
self.write(|w| w)
}
}
#[doc = r" Value of the field"]
pub struct MIR {
bits: u32,
}
impl MIR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
}
#[doc = r" Proxy"]
pub struct _MIW<'a> {
w: &'a mut W,
}
impl<'a> _MIW<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u32) -> &'a mut W {
const MASK: u32 = 4294967295;
const OFFSET: u8 = 0;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 0:31 - Individual Mask Bits"]
#[inline]
pub fn mi(&self) -> MIR {
let bits = {
const MASK: u32 = 4294967295;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) as u32
};
MIR { bits }
}
}
impl W {
#[doc = r" Reset value of the register"]
#[inline]
pub fn reset_value() -> W {
W { bits: 0 }
}
#[doc = r" Writes raw bits to the register"]
#[inline]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.bits = bits;
self
}
#[doc = "Bits 0:31 - Individual Mask Bits"]
#[inline]
pub fn mi(&mut self) -> _MIW {
_MIW { w: self }
}
}

105
src/can1/rximr4/mod.rs
View File

@ -1,105 +0,0 @@
#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
#[doc = r" Value to write to the register"]
pub struct W {
bits: u32,
}
impl super::RXIMR4 {
#[doc = r" Modifies the contents of the register"]
#[inline]
pub fn modify<F>(&self, f: F)
where
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
{
let bits = self.register.get();
let r = R { bits: bits };
let mut w = W { bits: bits };
f(&r, &mut w);
self.register.set(w.bits);
}
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
#[doc = r" Writes to the register"]
#[inline]
pub fn write<F>(&self, f: F)
where
F: FnOnce(&mut W) -> &mut W,
{
let mut w = W::reset_value();
f(&mut w);
self.register.set(w.bits);
}
#[doc = r" Writes the reset value to the register"]
#[inline]
pub fn reset(&self) {
self.write(|w| w)
}
}
#[doc = r" Value of the field"]
pub struct MIR {
bits: u32,
}
impl MIR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
}
#[doc = r" Proxy"]
pub struct _MIW<'a> {
w: &'a mut W,
}
impl<'a> _MIW<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u32) -> &'a mut W {
const MASK: u32 = 4294967295;
const OFFSET: u8 = 0;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 0:31 - Individual Mask Bits"]
#[inline]
pub fn mi(&self) -> MIR {
let bits = {
const MASK: u32 = 4294967295;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) as u32
};
MIR { bits }
}
}
impl W {
#[doc = r" Reset value of the register"]
#[inline]
pub fn reset_value() -> W {
W { bits: 0 }
}
#[doc = r" Writes raw bits to the register"]
#[inline]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.bits = bits;
self
}
#[doc = "Bits 0:31 - Individual Mask Bits"]
#[inline]
pub fn mi(&mut self) -> _MIW {
_MIW { w: self }
}
}

105
src/can1/rximr5/mod.rs
View File

@ -1,105 +0,0 @@
#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
#[doc = r" Value to write to the register"]
pub struct W {
bits: u32,
}
impl super::RXIMR5 {
#[doc = r" Modifies the contents of the register"]
#[inline]
pub fn modify<F>(&self, f: F)
where
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
{
let bits = self.register.get();
let r = R { bits: bits };
let mut w = W { bits: bits };
f(&r, &mut w);
self.register.set(w.bits);
}
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
#[doc = r" Writes to the register"]
#[inline]
pub fn write<F>(&self, f: F)
where
F: FnOnce(&mut W) -> &mut W,
{
let mut w = W::reset_value();
f(&mut w);
self.register.set(w.bits);
}
#[doc = r" Writes the reset value to the register"]
#[inline]
pub fn reset(&self) {
self.write(|w| w)
}
}
#[doc = r" Value of the field"]
pub struct MIR {
bits: u32,
}
impl MIR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
}
#[doc = r" Proxy"]
pub struct _MIW<'a> {
w: &'a mut W,
}
impl<'a> _MIW<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u32) -> &'a mut W {
const MASK: u32 = 4294967295;
const OFFSET: u8 = 0;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 0:31 - Individual Mask Bits"]
#[inline]
pub fn mi(&self) -> MIR {
let bits = {
const MASK: u32 = 4294967295;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) as u32
};
MIR { bits }
}
}
impl W {
#[doc = r" Reset value of the register"]
#[inline]
pub fn reset_value() -> W {
W { bits: 0 }
}
#[doc = r" Writes raw bits to the register"]
#[inline]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.bits = bits;
self
}
#[doc = "Bits 0:31 - Individual Mask Bits"]
#[inline]
pub fn mi(&mut self) -> _MIW {
_MIW { w: self }
}
}

105
src/can1/rximr6/mod.rs
View File

@ -1,105 +0,0 @@
#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
#[doc = r" Value to write to the register"]
pub struct W {
bits: u32,
}
impl super::RXIMR6 {
#[doc = r" Modifies the contents of the register"]
#[inline]
pub fn modify<F>(&self, f: F)
where
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
{
let bits = self.register.get();
let r = R { bits: bits };
let mut w = W { bits: bits };
f(&r, &mut w);
self.register.set(w.bits);
}
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
#[doc = r" Writes to the register"]
#[inline]
pub fn write<F>(&self, f: F)
where
F: FnOnce(&mut W) -> &mut W,
{
let mut w = W::reset_value();
f(&mut w);
self.register.set(w.bits);
}
#[doc = r" Writes the reset value to the register"]
#[inline]
pub fn reset(&self) {
self.write(|w| w)
}
}
#[doc = r" Value of the field"]
pub struct MIR {
bits: u32,
}
impl MIR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
}
#[doc = r" Proxy"]
pub struct _MIW<'a> {
w: &'a mut W,
}
impl<'a> _MIW<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u32) -> &'a mut W {
const MASK: u32 = 4294967295;
const OFFSET: u8 = 0;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 0:31 - Individual Mask Bits"]
#[inline]
pub fn mi(&self) -> MIR {
let bits = {
const MASK: u32 = 4294967295;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) as u32
};
MIR { bits }
}
}
impl W {
#[doc = r" Reset value of the register"]
#[inline]
pub fn reset_value() -> W {
W { bits: 0 }
}
#[doc = r" Writes raw bits to the register"]
#[inline]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.bits = bits;
self
}
#[doc = "Bits 0:31 - Individual Mask Bits"]
#[inline]
pub fn mi(&mut self) -> _MIW {
_MIW { w: self }
}
}

105
src/can1/rximr7/mod.rs
View File

@ -1,105 +0,0 @@
#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
#[doc = r" Value to write to the register"]
pub struct W {
bits: u32,
}
impl super::RXIMR7 {
#[doc = r" Modifies the contents of the register"]
#[inline]
pub fn modify<F>(&self, f: F)
where
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
{
let bits = self.register.get();
let r = R { bits: bits };
let mut w = W { bits: bits };
f(&r, &mut w);
self.register.set(w.bits);
}
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
#[doc = r" Writes to the register"]
#[inline]
pub fn write<F>(&self, f: F)
where
F: FnOnce(&mut W) -> &mut W,
{
let mut w = W::reset_value();
f(&mut w);
self.register.set(w.bits);
}
#[doc = r" Writes the reset value to the register"]
#[inline]
pub fn reset(&self) {
self.write(|w| w)
}
}
#[doc = r" Value of the field"]
pub struct MIR {
bits: u32,
}
impl MIR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
}
#[doc = r" Proxy"]
pub struct _MIW<'a> {
w: &'a mut W,
}
impl<'a> _MIW<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u32) -> &'a mut W {
const MASK: u32 = 4294967295;
const OFFSET: u8 = 0;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 0:31 - Individual Mask Bits"]
#[inline]
pub fn mi(&self) -> MIR {
let bits = {
const MASK: u32 = 4294967295;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) as u32
};
MIR { bits }
}
}
impl W {
#[doc = r" Reset value of the register"]
#[inline]
pub fn reset_value() -> W {
W { bits: 0 }
}
#[doc = r" Writes raw bits to the register"]
#[inline]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.bits = bits;
self
}
#[doc = "Bits 0:31 - Individual Mask Bits"]
#[inline]
pub fn mi(&mut self) -> _MIW {
_MIW { w: self }
}
}

105
src/can1/rximr8/mod.rs
View File

@ -1,105 +0,0 @@
#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
#[doc = r" Value to write to the register"]
pub struct W {
bits: u32,
}
impl super::RXIMR8 {
#[doc = r" Modifies the contents of the register"]
#[inline]
pub fn modify<F>(&self, f: F)
where
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
{
let bits = self.register.get();
let r = R { bits: bits };
let mut w = W { bits: bits };
f(&r, &mut w);
self.register.set(w.bits);
}
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
#[doc = r" Writes to the register"]
#[inline]
pub fn write<F>(&self, f: F)
where
F: FnOnce(&mut W) -> &mut W,
{
let mut w = W::reset_value();
f(&mut w);
self.register.set(w.bits);
}
#[doc = r" Writes the reset value to the register"]
#[inline]
pub fn reset(&self) {
self.write(|w| w)
}
}
#[doc = r" Value of the field"]
pub struct MIR {
bits: u32,
}
impl MIR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
}
#[doc = r" Proxy"]
pub struct _MIW<'a> {
w: &'a mut W,
}
impl<'a> _MIW<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u32) -> &'a mut W {
const MASK: u32 = 4294967295;
const OFFSET: u8 = 0;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 0:31 - Individual Mask Bits"]
#[inline]
pub fn mi(&self) -> MIR {
let bits = {
const MASK: u32 = 4294967295;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) as u32
};
MIR { bits }
}
}
impl W {
#[doc = r" Reset value of the register"]
#[inline]
pub fn reset_value() -> W {
W { bits: 0 }
}
#[doc = r" Writes raw bits to the register"]
#[inline]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.bits = bits;
self
}
#[doc = "Bits 0:31 - Individual Mask Bits"]
#[inline]
pub fn mi(&mut self) -> _MIW {
_MIW { w: self }
}
}

105
src/can1/rximr9/mod.rs
View File

@ -1,105 +0,0 @@
#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
#[doc = r" Value to write to the register"]
pub struct W {
bits: u32,
}
impl super::RXIMR9 {
#[doc = r" Modifies the contents of the register"]
#[inline]
pub fn modify<F>(&self, f: F)
where
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
{
let bits = self.register.get();
let r = R { bits: bits };
let mut w = W { bits: bits };
f(&r, &mut w);
self.register.set(w.bits);
}
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
#[doc = r" Writes to the register"]
#[inline]
pub fn write<F>(&self, f: F)
where
F: FnOnce(&mut W) -> &mut W,
{
let mut w = W::reset_value();
f(&mut w);
self.register.set(w.bits);
}
#[doc = r" Writes the reset value to the register"]
#[inline]
pub fn reset(&self) {
self.write(|w| w)
}
}
#[doc = r" Value of the field"]
pub struct MIR {
bits: u32,
}
impl MIR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
}
#[doc = r" Proxy"]
pub struct _MIW<'a> {
w: &'a mut W,
}
impl<'a> _MIW<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u32) -> &'a mut W {
const MASK: u32 = 4294967295;
const OFFSET: u8 = 0;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 0:31 - Individual Mask Bits"]
#[inline]
pub fn mi(&self) -> MIR {
let bits = {
const MASK: u32 = 4294967295;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) as u32
};
MIR { bits }
}
}
impl W {
#[doc = r" Reset value of the register"]
#[inline]
pub fn reset_value() -> W {
W { bits: 0 }
}
#[doc = r" Writes raw bits to the register"]
#[inline]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.bits = bits;
self
}
#[doc = "Bits 0:31 - Individual Mask Bits"]
#[inline]
pub fn mi(&mut self) -> _MIW {
_MIW { w: self }
}
}

105
src/can1/rxmgmask/mod.rs
View File

@ -1,105 +0,0 @@
#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
#[doc = r" Value to write to the register"]
pub struct W {
bits: u32,
}
impl super::RXMGMASK {
#[doc = r" Modifies the contents of the register"]
#[inline]
pub fn modify<F>(&self, f: F)
where
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
{
let bits = self.register.get();
let r = R { bits: bits };
let mut w = W { bits: bits };
f(&r, &mut w);
self.register.set(w.bits);
}
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
#[doc = r" Writes to the register"]
#[inline]
pub fn write<F>(&self, f: F)
where
F: FnOnce(&mut W) -> &mut W,
{
let mut w = W::reset_value();
f(&mut w);
self.register.set(w.bits);
}
#[doc = r" Writes the reset value to the register"]
#[inline]
pub fn reset(&self) {
self.write(|w| w)
}
}
#[doc = r" Value of the field"]
pub struct MGR {
bits: u32,
}
impl MGR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
}
#[doc = r" Proxy"]
pub struct _MGW<'a> {
w: &'a mut W,
}
impl<'a> _MGW<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u32) -> &'a mut W {
const MASK: u32 = 4294967295;
const OFFSET: u8 = 0;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 0:31 - Rx Mailboxes Global Mask Bits"]
#[inline]
pub fn mg(&self) -> MGR {
let bits = {
const MASK: u32 = 4294967295;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) as u32
};
MGR { bits }
}
}
impl W {
#[doc = r" Reset value of the register"]
#[inline]
pub fn reset_value() -> W {
W { bits: 0 }
}
#[doc = r" Writes raw bits to the register"]
#[inline]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.bits = bits;
self
}
#[doc = "Bits 0:31 - Rx Mailboxes Global Mask Bits"]
#[inline]
pub fn mg(&mut self) -> _MGW {
_MGW { w: self }
}
}

105
src/can1/timer/mod.rs
View File

@ -1,105 +0,0 @@
#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
#[doc = r" Value to write to the register"]
pub struct W {
bits: u32,
}
impl super::TIMER {
#[doc = r" Modifies the contents of the register"]
#[inline]
pub fn modify<F>(&self, f: F)
where
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
{
let bits = self.register.get();
let r = R { bits: bits };
let mut w = W { bits: bits };
f(&r, &mut w);
self.register.set(w.bits);
}
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
#[doc = r" Writes to the register"]
#[inline]
pub fn write<F>(&self, f: F)
where
F: FnOnce(&mut W) -> &mut W,
{
let mut w = W::reset_value();
f(&mut w);
self.register.set(w.bits);
}
#[doc = r" Writes the reset value to the register"]
#[inline]
pub fn reset(&self) {
self.write(|w| w)
}
}
#[doc = r" Value of the field"]
pub struct TIMERR {
bits: u16,
}
impl TIMERR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u16 {
self.bits
}
}
#[doc = r" Proxy"]
pub struct _TIMERW<'a> {
w: &'a mut W,
}
impl<'a> _TIMERW<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u16) -> &'a mut W {
const MASK: u16 = 65535;
const OFFSET: u8 = 0;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 0:15 - Timer Value"]
#[inline]
pub fn timer(&self) -> TIMERR {
let bits = {
const MASK: u16 = 65535;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) as u16
};
TIMERR { bits }
}
}
impl W {
#[doc = r" Reset value of the register"]
#[inline]
pub fn reset_value() -> W {
W { bits: 0 }
}
#[doc = r" Writes raw bits to the register"]
#[inline]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.bits = bits;
self
}
#[doc = "Bits 0:15 - Timer Value"]
#[inline]
pub fn timer(&mut self) -> _TIMERW {
_TIMERW { w: self }
}
}

180
src/can1/wmb0_cs/mod.rs
View File

@ -1,180 +0,0 @@
#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
impl super::WMB0_CS {
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
}
#[doc = r" Value of the field"]
pub struct DLCR {
bits: u8,
}
impl DLCR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = "Possible values of the field `RTR`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum RTRR {
#[doc = "Frame is data one (not remote)"] _0,
#[doc = "Frame is a remote one"] _1,
}
impl RTRR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
RTRR::_0 => false,
RTRR::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> RTRR {
match value {
false => RTRR::_0,
true => RTRR::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == RTRR::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == RTRR::_1
}
}
#[doc = "Possible values of the field `IDE`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum IDER {
#[doc = "Frame format is standard"] _0,
#[doc = "Frame format is extended"] _1,
}
impl IDER {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
IDER::_0 => false,
IDER::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> IDER {
match value {
false => IDER::_0,
true => IDER::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == IDER::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == IDER::_1
}
}
#[doc = r" Value of the field"]
pub struct SRRR {
bits: bool,
}
impl SRRR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
self.bits
}
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 16:19 - Length of Data in Bytes"]
#[inline]
pub fn dlc(&self) -> DLCR {
let bits = {
const MASK: u8 = 15;
const OFFSET: u8 = 16;
((self.bits >> OFFSET) & MASK as u32) as u8
};
DLCR { bits }
}
#[doc = "Bit 20 - Remote Transmission Request Bit"]
#[inline]
pub fn rtr(&self) -> RTRR {
RTRR::_from({
const MASK: bool = true;
const OFFSET: u8 = 20;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 21 - ID Extended Bit"]
#[inline]
pub fn ide(&self) -> IDER {
IDER::_from({
const MASK: bool = true;
const OFFSET: u8 = 21;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 22 - Substitute Remote Request"]
#[inline]
pub fn srr(&self) -> SRRR {
let bits = {
const MASK: bool = true;
const OFFSET: u8 = 22;
((self.bits >> OFFSET) & MASK as u32) != 0
};
SRRR { bits }
}
}

104
src/can1/wmb0_d03/mod.rs
View File

@ -1,104 +0,0 @@
#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
impl super::WMB0_D03 {
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
}
#[doc = r" Value of the field"]
pub struct DATA_BYTE_3R {
bits: u8,
}
impl DATA_BYTE_3R {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct DATA_BYTE_2R {
bits: u8,
}
impl DATA_BYTE_2R {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct DATA_BYTE_1R {
bits: u8,
}
impl DATA_BYTE_1R {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct DATA_BYTE_0R {
bits: u8,
}
impl DATA_BYTE_0R {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 0:7 - Received payload corresponding to the data byte 3 under Pretended Networking mode"]
#[inline]
pub fn data_byte_3(&self) -> DATA_BYTE_3R {
let bits = {
const MASK: u8 = 255;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) as u8
};
DATA_BYTE_3R { bits }
}
#[doc = "Bits 8:15 - Received payload corresponding to the data byte 2 under Pretended Networking mode"]
#[inline]
pub fn data_byte_2(&self) -> DATA_BYTE_2R {
let bits = {
const MASK: u8 = 255;
const OFFSET: u8 = 8;
((self.bits >> OFFSET) & MASK as u32) as u8
};
DATA_BYTE_2R { bits }
}
#[doc = "Bits 16:23 - Received payload corresponding to the data byte 1 under Pretended Networking mode"]
#[inline]
pub fn data_byte_1(&self) -> DATA_BYTE_1R {
let bits = {
const MASK: u8 = 255;
const OFFSET: u8 = 16;
((self.bits >> OFFSET) & MASK as u32) as u8
};
DATA_BYTE_1R { bits }
}
#[doc = "Bits 24:31 - Received payload corresponding to the data byte 0 under Pretended Networking mode"]
#[inline]
pub fn data_byte_0(&self) -> DATA_BYTE_0R {
let bits = {
const MASK: u8 = 255;
const OFFSET: u8 = 24;
((self.bits >> OFFSET) & MASK as u32) as u8
};
DATA_BYTE_0R { bits }
}
}

104
src/can1/wmb0_d47/mod.rs
View File

@ -1,104 +0,0 @@
#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
impl super::WMB0_D47 {
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
}
#[doc = r" Value of the field"]
pub struct DATA_BYTE_7R {
bits: u8,
}
impl DATA_BYTE_7R {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct DATA_BYTE_6R {
bits: u8,
}
impl DATA_BYTE_6R {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct DATA_BYTE_5R {
bits: u8,
}
impl DATA_BYTE_5R {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct DATA_BYTE_4R {
bits: u8,
}
impl DATA_BYTE_4R {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 0:7 - Received payload corresponding to the data byte 7 under Pretended Networking mode"]
#[inline]
pub fn data_byte_7(&self) -> DATA_BYTE_7R {
let bits = {
const MASK: u8 = 255;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) as u8
};
DATA_BYTE_7R { bits }
}
#[doc = "Bits 8:15 - Received payload corresponding to the data byte 6 under Pretended Networking mode"]
#[inline]
pub fn data_byte_6(&self) -> DATA_BYTE_6R {
let bits = {
const MASK: u8 = 255;
const OFFSET: u8 = 8;
((self.bits >> OFFSET) & MASK as u32) as u8
};
DATA_BYTE_6R { bits }
}
#[doc = "Bits 16:23 - Received payload corresponding to the data byte 5 under Pretended Networking mode"]
#[inline]
pub fn data_byte_5(&self) -> DATA_BYTE_5R {
let bits = {
const MASK: u8 = 255;
const OFFSET: u8 = 16;
((self.bits >> OFFSET) & MASK as u32) as u8
};
DATA_BYTE_5R { bits }
}
#[doc = "Bits 24:31 - Received payload corresponding to the data byte 4 under Pretended Networking mode"]
#[inline]
pub fn data_byte_4(&self) -> DATA_BYTE_4R {
let bits = {
const MASK: u8 = 255;
const OFFSET: u8 = 24;
((self.bits >> OFFSET) & MASK as u32) as u8
};
DATA_BYTE_4R { bits }
}
}

41
src/can1/wmb0_id/mod.rs
View File

@ -1,41 +0,0 @@
#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
impl super::WMB0_ID {
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
}
#[doc = r" Value of the field"]
pub struct IDR {
bits: u32,
}
impl IDR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 0:28 - Received ID under Pretended Networking mode"]
#[inline]
pub fn id(&self) -> IDR {
let bits = {
const MASK: u32 = 536870911;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) as u32
};
IDR { bits }
}
}

180
src/can1/wmb1_cs/mod.rs
View File

@ -1,180 +0,0 @@
#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
impl super::WMB1_CS {
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
}
#[doc = r" Value of the field"]
pub struct DLCR {
bits: u8,
}
impl DLCR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = "Possible values of the field `RTR`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum RTRR {
#[doc = "Frame is data one (not remote)"] _0,
#[doc = "Frame is a remote one"] _1,
}
impl RTRR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
RTRR::_0 => false,
RTRR::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> RTRR {
match value {
false => RTRR::_0,
true => RTRR::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == RTRR::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == RTRR::_1
}
}
#[doc = "Possible values of the field `IDE`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum IDER {
#[doc = "Frame format is standard"] _0,
#[doc = "Frame format is extended"] _1,
}
impl IDER {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
IDER::_0 => false,
IDER::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> IDER {
match value {
false => IDER::_0,
true => IDER::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == IDER::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == IDER::_1
}
}
#[doc = r" Value of the field"]
pub struct SRRR {
bits: bool,
}
impl SRRR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
self.bits
}
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 16:19 - Length of Data in Bytes"]
#[inline]
pub fn dlc(&self) -> DLCR {
let bits = {
const MASK: u8 = 15;
const OFFSET: u8 = 16;
((self.bits >> OFFSET) & MASK as u32) as u8
};
DLCR { bits }
}
#[doc = "Bit 20 - Remote Transmission Request Bit"]
#[inline]
pub fn rtr(&self) -> RTRR {
RTRR::_from({
const MASK: bool = true;
const OFFSET: u8 = 20;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 21 - ID Extended Bit"]
#[inline]
pub fn ide(&self) -> IDER {
IDER::_from({
const MASK: bool = true;
const OFFSET: u8 = 21;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 22 - Substitute Remote Request"]
#[inline]
pub fn srr(&self) -> SRRR {
let bits = {
const MASK: bool = true;
const OFFSET: u8 = 22;
((self.bits >> OFFSET) & MASK as u32) != 0
};
SRRR { bits }
}
}

104
src/can1/wmb1_d03/mod.rs
View File

@ -1,104 +0,0 @@
#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
impl super::WMB1_D03 {
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
}
#[doc = r" Value of the field"]
pub struct DATA_BYTE_3R {
bits: u8,
}
impl DATA_BYTE_3R {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct DATA_BYTE_2R {
bits: u8,
}
impl DATA_BYTE_2R {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct DATA_BYTE_1R {
bits: u8,
}
impl DATA_BYTE_1R {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct DATA_BYTE_0R {
bits: u8,
}
impl DATA_BYTE_0R {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 0:7 - Received payload corresponding to the data byte 3 under Pretended Networking mode"]
#[inline]
pub fn data_byte_3(&self) -> DATA_BYTE_3R {
let bits = {
const MASK: u8 = 255;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) as u8
};
DATA_BYTE_3R { bits }
}
#[doc = "Bits 8:15 - Received payload corresponding to the data byte 2 under Pretended Networking mode"]
#[inline]
pub fn data_byte_2(&self) -> DATA_BYTE_2R {
let bits = {
const MASK: u8 = 255;
const OFFSET: u8 = 8;
((self.bits >> OFFSET) & MASK as u32) as u8
};
DATA_BYTE_2R { bits }
}
#[doc = "Bits 16:23 - Received payload corresponding to the data byte 1 under Pretended Networking mode"]
#[inline]
pub fn data_byte_1(&self) -> DATA_BYTE_1R {
let bits = {
const MASK: u8 = 255;
const OFFSET: u8 = 16;
((self.bits >> OFFSET) & MASK as u32) as u8
};
DATA_BYTE_1R { bits }
}
#[doc = "Bits 24:31 - Received payload corresponding to the data byte 0 under Pretended Networking mode"]
#[inline]
pub fn data_byte_0(&self) -> DATA_BYTE_0R {
let bits = {
const MASK: u8 = 255;
const OFFSET: u8 = 24;
((self.bits >> OFFSET) & MASK as u32) as u8
};
DATA_BYTE_0R { bits }
}
}

104
src/can1/wmb1_d47/mod.rs
View File

@ -1,104 +0,0 @@
#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
impl super::WMB1_D47 {
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
}
#[doc = r" Value of the field"]
pub struct DATA_BYTE_7R {
bits: u8,
}
impl DATA_BYTE_7R {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct DATA_BYTE_6R {
bits: u8,
}
impl DATA_BYTE_6R {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct DATA_BYTE_5R {
bits: u8,
}
impl DATA_BYTE_5R {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct DATA_BYTE_4R {
bits: u8,
}
impl DATA_BYTE_4R {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 0:7 - Received payload corresponding to the data byte 7 under Pretended Networking mode"]
#[inline]
pub fn data_byte_7(&self) -> DATA_BYTE_7R {
let bits = {
const MASK: u8 = 255;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) as u8
};
DATA_BYTE_7R { bits }
}
#[doc = "Bits 8:15 - Received payload corresponding to the data byte 6 under Pretended Networking mode"]
#[inline]
pub fn data_byte_6(&self) -> DATA_BYTE_6R {
let bits = {
const MASK: u8 = 255;
const OFFSET: u8 = 8;
((self.bits >> OFFSET) & MASK as u32) as u8
};
DATA_BYTE_6R { bits }
}
#[doc = "Bits 16:23 - Received payload corresponding to the data byte 5 under Pretended Networking mode"]
#[inline]
pub fn data_byte_5(&self) -> DATA_BYTE_5R {
let bits = {
const MASK: u8 = 255;
const OFFSET: u8 = 16;
((self.bits >> OFFSET) & MASK as u32) as u8
};
DATA_BYTE_5R { bits }
}
#[doc = "Bits 24:31 - Received payload corresponding to the data byte 4 under Pretended Networking mode"]
#[inline]
pub fn data_byte_4(&self) -> DATA_BYTE_4R {
let bits = {
const MASK: u8 = 255;
const OFFSET: u8 = 24;
((self.bits >> OFFSET) & MASK as u32) as u8
};
DATA_BYTE_4R { bits }
}
}

41
src/can1/wmb1_id/mod.rs
View File

@ -1,41 +0,0 @@
#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
impl super::WMB1_ID {
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
}
#[doc = r" Value of the field"]
pub struct IDR {
bits: u32,
}
impl IDR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 0:28 - Received ID under Pretended Networking mode"]
#[inline]
pub fn id(&self) -> IDR {
let bits = {
const MASK: u32 = 536870911;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) as u32
};
IDR { bits }
}
}

180
src/can1/wmb2_cs/mod.rs
View File

@ -1,180 +0,0 @@
#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
impl super::WMB2_CS {
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
}
#[doc = r" Value of the field"]
pub struct DLCR {
bits: u8,
}
impl DLCR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = "Possible values of the field `RTR`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum RTRR {
#[doc = "Frame is data one (not remote)"] _0,
#[doc = "Frame is a remote one"] _1,
}
impl RTRR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
RTRR::_0 => false,
RTRR::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> RTRR {
match value {
false => RTRR::_0,
true => RTRR::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == RTRR::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == RTRR::_1
}
}
#[doc = "Possible values of the field `IDE`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum IDER {
#[doc = "Frame format is standard"] _0,
#[doc = "Frame format is extended"] _1,
}
impl IDER {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
IDER::_0 => false,
IDER::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> IDER {
match value {
false => IDER::_0,
true => IDER::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == IDER::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == IDER::_1
}
}
#[doc = r" Value of the field"]
pub struct SRRR {
bits: bool,
}
impl SRRR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
self.bits
}
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 16:19 - Length of Data in Bytes"]
#[inline]
pub fn dlc(&self) -> DLCR {
let bits = {
const MASK: u8 = 15;
const OFFSET: u8 = 16;
((self.bits >> OFFSET) & MASK as u32) as u8
};
DLCR { bits }
}
#[doc = "Bit 20 - Remote Transmission Request Bit"]
#[inline]
pub fn rtr(&self) -> RTRR {
RTRR::_from({
const MASK: bool = true;
const OFFSET: u8 = 20;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 21 - ID Extended Bit"]
#[inline]
pub fn ide(&self) -> IDER {
IDER::_from({
const MASK: bool = true;
const OFFSET: u8 = 21;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 22 - Substitute Remote Request"]
#[inline]
pub fn srr(&self) -> SRRR {
let bits = {
const MASK: bool = true;
const OFFSET: u8 = 22;
((self.bits >> OFFSET) & MASK as u32) != 0
};
SRRR { bits }
}
}

104
src/can1/wmb2_d03/mod.rs
View File

@ -1,104 +0,0 @@
#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
impl super::WMB2_D03 {
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
}
#[doc = r" Value of the field"]
pub struct DATA_BYTE_3R {
bits: u8,
}
impl DATA_BYTE_3R {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct DATA_BYTE_2R {
bits: u8,
}
impl DATA_BYTE_2R {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct DATA_BYTE_1R {
bits: u8,
}
impl DATA_BYTE_1R {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct DATA_BYTE_0R {
bits: u8,
}
impl DATA_BYTE_0R {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 0:7 - Received payload corresponding to the data byte 3 under Pretended Networking mode"]
#[inline]
pub fn data_byte_3(&self) -> DATA_BYTE_3R {
let bits = {
const MASK: u8 = 255;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) as u8
};
DATA_BYTE_3R { bits }
}
#[doc = "Bits 8:15 - Received payload corresponding to the data byte 2 under Pretended Networking mode"]
#[inline]
pub fn data_byte_2(&self) -> DATA_BYTE_2R {
let bits = {
const MASK: u8 = 255;
const OFFSET: u8 = 8;
((self.bits >> OFFSET) & MASK as u32) as u8
};
DATA_BYTE_2R { bits }
}
#[doc = "Bits 16:23 - Received payload corresponding to the data byte 1 under Pretended Networking mode"]
#[inline]
pub fn data_byte_1(&self) -> DATA_BYTE_1R {
let bits = {
const MASK: u8 = 255;
const OFFSET: u8 = 16;
((self.bits >> OFFSET) & MASK as u32) as u8
};
DATA_BYTE_1R { bits }
}
#[doc = "Bits 24:31 - Received payload corresponding to the data byte 0 under Pretended Networking mode"]
#[inline]
pub fn data_byte_0(&self) -> DATA_BYTE_0R {
let bits = {
const MASK: u8 = 255;
const OFFSET: u8 = 24;
((self.bits >> OFFSET) & MASK as u32) as u8
};
DATA_BYTE_0R { bits }
}
}

104
src/can1/wmb2_d47/mod.rs
View File

@ -1,104 +0,0 @@
#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
impl super::WMB2_D47 {
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
}
#[doc = r" Value of the field"]
pub struct DATA_BYTE_7R {
bits: u8,
}
impl DATA_BYTE_7R {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct DATA_BYTE_6R {
bits: u8,
}
impl DATA_BYTE_6R {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct DATA_BYTE_5R {
bits: u8,
}
impl DATA_BYTE_5R {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct DATA_BYTE_4R {
bits: u8,
}
impl DATA_BYTE_4R {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 0:7 - Received payload corresponding to the data byte 7 under Pretended Networking mode"]
#[inline]
pub fn data_byte_7(&self) -> DATA_BYTE_7R {
let bits = {
const MASK: u8 = 255;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) as u8
};
DATA_BYTE_7R { bits }
}
#[doc = "Bits 8:15 - Received payload corresponding to the data byte 6 under Pretended Networking mode"]
#[inline]
pub fn data_byte_6(&self) -> DATA_BYTE_6R {
let bits = {
const MASK: u8 = 255;
const OFFSET: u8 = 8;
((self.bits >> OFFSET) & MASK as u32) as u8
};
DATA_BYTE_6R { bits }
}
#[doc = "Bits 16:23 - Received payload corresponding to the data byte 5 under Pretended Networking mode"]
#[inline]
pub fn data_byte_5(&self) -> DATA_BYTE_5R {
let bits = {
const MASK: u8 = 255;
const OFFSET: u8 = 16;
((self.bits >> OFFSET) & MASK as u32) as u8
};
DATA_BYTE_5R { bits }
}
#[doc = "Bits 24:31 - Received payload corresponding to the data byte 4 under Pretended Networking mode"]
#[inline]
pub fn data_byte_4(&self) -> DATA_BYTE_4R {
let bits = {
const MASK: u8 = 255;
const OFFSET: u8 = 24;
((self.bits >> OFFSET) & MASK as u32) as u8
};
DATA_BYTE_4R { bits }
}
}

41
src/can1/wmb2_id/mod.rs
View File

@ -1,41 +0,0 @@
#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
impl super::WMB2_ID {
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
}
#[doc = r" Value of the field"]
pub struct IDR {
bits: u32,
}
impl IDR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 0:28 - Received ID under Pretended Networking mode"]
#[inline]
pub fn id(&self) -> IDR {
let bits = {
const MASK: u32 = 536870911;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) as u32
};
IDR { bits }
}
}

180
src/can1/wmb3_cs/mod.rs
View File

@ -1,180 +0,0 @@
#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
impl super::WMB3_CS {
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
}
#[doc = r" Value of the field"]
pub struct DLCR {
bits: u8,
}
impl DLCR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = "Possible values of the field `RTR`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum RTRR {
#[doc = "Frame is data one (not remote)"] _0,
#[doc = "Frame is a remote one"] _1,
}
impl RTRR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
RTRR::_0 => false,
RTRR::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> RTRR {
match value {
false => RTRR::_0,
true => RTRR::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == RTRR::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == RTRR::_1
}
}
#[doc = "Possible values of the field `IDE`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum IDER {
#[doc = "Frame format is standard"] _0,
#[doc = "Frame format is extended"] _1,
}
impl IDER {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
IDER::_0 => false,
IDER::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> IDER {
match value {
false => IDER::_0,
true => IDER::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == IDER::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == IDER::_1
}
}
#[doc = r" Value of the field"]
pub struct SRRR {
bits: bool,
}
impl SRRR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
self.bits
}
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 16:19 - Length of Data in Bytes"]
#[inline]
pub fn dlc(&self) -> DLCR {
let bits = {
const MASK: u8 = 15;
const OFFSET: u8 = 16;
((self.bits >> OFFSET) & MASK as u32) as u8
};
DLCR { bits }
}
#[doc = "Bit 20 - Remote Transmission Request Bit"]
#[inline]
pub fn rtr(&self) -> RTRR {
RTRR::_from({
const MASK: bool = true;
const OFFSET: u8 = 20;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 21 - ID Extended Bit"]
#[inline]
pub fn ide(&self) -> IDER {
IDER::_from({
const MASK: bool = true;
const OFFSET: u8 = 21;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 22 - Substitute Remote Request"]
#[inline]
pub fn srr(&self) -> SRRR {
let bits = {
const MASK: bool = true;
const OFFSET: u8 = 22;
((self.bits >> OFFSET) & MASK as u32) != 0
};
SRRR { bits }
}
}

104
src/can1/wmb3_d03/mod.rs
View File

@ -1,104 +0,0 @@
#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
impl super::WMB3_D03 {
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
}
#[doc = r" Value of the field"]
pub struct DATA_BYTE_3R {
bits: u8,
}
impl DATA_BYTE_3R {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct DATA_BYTE_2R {
bits: u8,
}
impl DATA_BYTE_2R {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct DATA_BYTE_1R {
bits: u8,
}
impl DATA_BYTE_1R {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct DATA_BYTE_0R {
bits: u8,
}
impl DATA_BYTE_0R {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 0:7 - Received payload corresponding to the data byte 3 under Pretended Networking mode"]
#[inline]
pub fn data_byte_3(&self) -> DATA_BYTE_3R {
let bits = {
const MASK: u8 = 255;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) as u8
};
DATA_BYTE_3R { bits }
}
#[doc = "Bits 8:15 - Received payload corresponding to the data byte 2 under Pretended Networking mode"]
#[inline]
pub fn data_byte_2(&self) -> DATA_BYTE_2R {
let bits = {
const MASK: u8 = 255;
const OFFSET: u8 = 8;
((self.bits >> OFFSET) & MASK as u32) as u8
};
DATA_BYTE_2R { bits }
}
#[doc = "Bits 16:23 - Received payload corresponding to the data byte 1 under Pretended Networking mode"]
#[inline]
pub fn data_byte_1(&self) -> DATA_BYTE_1R {
let bits = {
const MASK: u8 = 255;
const OFFSET: u8 = 16;
((self.bits >> OFFSET) & MASK as u32) as u8
};
DATA_BYTE_1R { bits }
}
#[doc = "Bits 24:31 - Received payload corresponding to the data byte 0 under Pretended Networking mode"]
#[inline]
pub fn data_byte_0(&self) -> DATA_BYTE_0R {
let bits = {
const MASK: u8 = 255;
const OFFSET: u8 = 24;
((self.bits >> OFFSET) & MASK as u32) as u8
};
DATA_BYTE_0R { bits }
}
}

104
src/can1/wmb3_d47/mod.rs
View File

@ -1,104 +0,0 @@
#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
impl super::WMB3_D47 {
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
}
#[doc = r" Value of the field"]
pub struct DATA_BYTE_7R {
bits: u8,
}
impl DATA_BYTE_7R {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct DATA_BYTE_6R {
bits: u8,
}
impl DATA_BYTE_6R {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct DATA_BYTE_5R {
bits: u8,
}
impl DATA_BYTE_5R {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct DATA_BYTE_4R {
bits: u8,
}
impl DATA_BYTE_4R {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 0:7 - Received payload corresponding to the data byte 7 under Pretended Networking mode"]
#[inline]
pub fn data_byte_7(&self) -> DATA_BYTE_7R {
let bits = {
const MASK: u8 = 255;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) as u8
};
DATA_BYTE_7R { bits }
}
#[doc = "Bits 8:15 - Received payload corresponding to the data byte 6 under Pretended Networking mode"]
#[inline]
pub fn data_byte_6(&self) -> DATA_BYTE_6R {
let bits = {
const MASK: u8 = 255;
const OFFSET: u8 = 8;
((self.bits >> OFFSET) & MASK as u32) as u8
};
DATA_BYTE_6R { bits }
}
#[doc = "Bits 16:23 - Received payload corresponding to the data byte 5 under Pretended Networking mode"]
#[inline]
pub fn data_byte_5(&self) -> DATA_BYTE_5R {
let bits = {
const MASK: u8 = 255;
const OFFSET: u8 = 16;
((self.bits >> OFFSET) & MASK as u32) as u8
};
DATA_BYTE_5R { bits }
}
#[doc = "Bits 24:31 - Received payload corresponding to the data byte 4 under Pretended Networking mode"]
#[inline]
pub fn data_byte_4(&self) -> DATA_BYTE_4R {
let bits = {
const MASK: u8 = 255;
const OFFSET: u8 = 24;
((self.bits >> OFFSET) & MASK as u32) as u8
};
DATA_BYTE_4R { bits }
}
}

41
src/can1/wmb3_id/mod.rs
View File

@ -1,41 +0,0 @@
#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
impl super::WMB3_ID {
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
}
#[doc = r" Value of the field"]
pub struct IDR {
bits: u32,
}
impl IDR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 0:28 - Received ID under Pretended Networking mode"]
#[inline]
pub fn id(&self) -> IDR {
let bits = {
const MASK: u32 = 536870911;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) as u32
};
IDR { bits }
}
}

315
src/can1/wu_mtc/mod.rs
View File

@ -1,315 +0,0 @@
#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
#[doc = r" Value to write to the register"]
pub struct W {
bits: u32,
}
impl super::WU_MTC {
#[doc = r" Modifies the contents of the register"]
#[inline]
pub fn modify<F>(&self, f: F)
where
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
{
let bits = self.register.get();
let r = R { bits: bits };
let mut w = W { bits: bits };
f(&r, &mut w);
self.register.set(w.bits);
}
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
#[doc = r" Writes to the register"]
#[inline]
pub fn write<F>(&self, f: F)
where
F: FnOnce(&mut W) -> &mut W,
{
let mut w = W::reset_value();
f(&mut w);
self.register.set(w.bits);
}
#[doc = r" Writes the reset value to the register"]
#[inline]
pub fn reset(&self) {
self.write(|w| w)
}
}
#[doc = r" Value of the field"]
pub struct MCOUNTERR {
bits: u8,
}
impl MCOUNTERR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = "Possible values of the field `WUMF`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum WUMFR {
#[doc = "No wake up by match event detected"] _0,
#[doc = "Wake up by match event detected"] _1,
}
impl WUMFR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
WUMFR::_0 => false,
WUMFR::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> WUMFR {
match value {
false => WUMFR::_0,
true => WUMFR::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == WUMFR::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == WUMFR::_1
}
}
#[doc = "Possible values of the field `WTOF`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum WTOFR {
#[doc = "No wake up by timeout event detected"] _0,
#[doc = "Wake up by timeout event detected"] _1,
}
impl WTOFR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
WTOFR::_0 => false,
WTOFR::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> WTOFR {
match value {
false => WTOFR::_0,
true => WTOFR::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == WTOFR::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == WTOFR::_1
}
}
#[doc = "Values that can be written to the field `WUMF`"]
pub enum WUMFW {
#[doc = "No wake up by match event detected"] _0,
#[doc = "Wake up by match event detected"] _1,
}
impl WUMFW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
WUMFW::_0 => false,
WUMFW::_1 => true,
}
}
}
#[doc = r" Proxy"]
pub struct _WUMFW<'a> {
w: &'a mut W,
}
impl<'a> _WUMFW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: WUMFW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "No wake up by match event detected"]
#[inline]
pub fn _0(self) -> &'a mut W {
self.variant(WUMFW::_0)
}
#[doc = "Wake up by match event detected"]
#[inline]
pub fn _1(self) -> &'a mut W {
self.variant(WUMFW::_1)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 16;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `WTOF`"]
pub enum WTOFW {
#[doc = "No wake up by timeout event detected"] _0,
#[doc = "Wake up by timeout event detected"] _1,
}
impl WTOFW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
WTOFW::_0 => false,
WTOFW::_1 => true,
}
}
}
#[doc = r" Proxy"]
pub struct _WTOFW<'a> {
w: &'a mut W,
}
impl<'a> _WTOFW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: WTOFW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "No wake up by timeout event detected"]
#[inline]
pub fn _0(self) -> &'a mut W {
self.variant(WTOFW::_0)
}
#[doc = "Wake up by timeout event detected"]
#[inline]
pub fn _1(self) -> &'a mut W {
self.variant(WTOFW::_1)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 17;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 8:15 - Number of Matches while in Pretended Networking"]
#[inline]
pub fn mcounter(&self) -> MCOUNTERR {
let bits = {
const MASK: u8 = 255;
const OFFSET: u8 = 8;
((self.bits >> OFFSET) & MASK as u32) as u8
};
MCOUNTERR { bits }
}
#[doc = "Bit 16 - Wake Up by Match Flag Bit"]
#[inline]
pub fn wumf(&self) -> WUMFR {
WUMFR::_from({
const MASK: bool = true;
const OFFSET: u8 = 16;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 17 - Wake Up by Timeout Flag Bit"]
#[inline]
pub fn wtof(&self) -> WTOFR {
WTOFR::_from({
const MASK: bool = true;
const OFFSET: u8 = 17;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
}
impl W {
#[doc = r" Reset value of the register"]
#[inline]
pub fn reset_value() -> W {
W { bits: 0 }
}
#[doc = r" Writes raw bits to the register"]
#[inline]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.bits = bits;
self
}
#[doc = "Bit 16 - Wake Up by Match Flag Bit"]
#[inline]
pub fn wumf(&mut self) -> _WUMFW {
_WUMFW { w: self }
}
#[doc = "Bit 17 - Wake Up by Timeout Flag Bit"]
#[inline]
pub fn wtof(&mut self) -> _WTOFW {
_WTOFW { w: self }
}
}

384
src/can2/cbt/mod.rs
View File

@ -1,384 +0,0 @@
#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
#[doc = r" Value to write to the register"]
pub struct W {
bits: u32,
}
impl super::CBT {
#[doc = r" Modifies the contents of the register"]
#[inline]
pub fn modify<F>(&self, f: F)
where
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
{
let bits = self.register.get();
let r = R { bits: bits };
let mut w = W { bits: bits };
f(&r, &mut w);
self.register.set(w.bits);
}
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
#[doc = r" Writes to the register"]
#[inline]
pub fn write<F>(&self, f: F)
where
F: FnOnce(&mut W) -> &mut W,
{
let mut w = W::reset_value();
f(&mut w);
self.register.set(w.bits);
}
#[doc = r" Writes the reset value to the register"]
#[inline]
pub fn reset(&self) {
self.write(|w| w)
}
}
#[doc = r" Value of the field"]
pub struct EPSEG2R {
bits: u8,
}
impl EPSEG2R {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct EPSEG1R {
bits: u8,
}
impl EPSEG1R {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct EPROPSEGR {
bits: u8,
}
impl EPROPSEGR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct ERJWR {
bits: u8,
}
impl ERJWR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct EPRESDIVR {
bits: u16,
}
impl EPRESDIVR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u16 {
self.bits
}
}
#[doc = "Possible values of the field `BTF`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum BTFR {
#[doc = "Extended bit time definitions disabled."] _0,
#[doc = "Extended bit time definitions enabled."] _1,
}
impl BTFR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
BTFR::_0 => false,
BTFR::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> BTFR {
match value {
false => BTFR::_0,
true => BTFR::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == BTFR::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == BTFR::_1
}
}
#[doc = r" Proxy"]
pub struct _EPSEG2W<'a> {
w: &'a mut W,
}
impl<'a> _EPSEG2W<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 31;
const OFFSET: u8 = 0;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = r" Proxy"]
pub struct _EPSEG1W<'a> {
w: &'a mut W,
}
impl<'a> _EPSEG1W<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 31;
const OFFSET: u8 = 5;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = r" Proxy"]
pub struct _EPROPSEGW<'a> {
w: &'a mut W,
}
impl<'a> _EPROPSEGW<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 63;
const OFFSET: u8 = 10;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = r" Proxy"]
pub struct _ERJWW<'a> {
w: &'a mut W,
}
impl<'a> _ERJWW<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 31;
const OFFSET: u8 = 16;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = r" Proxy"]
pub struct _EPRESDIVW<'a> {
w: &'a mut W,
}
impl<'a> _EPRESDIVW<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u16) -> &'a mut W {
const MASK: u16 = 1023;
const OFFSET: u8 = 21;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `BTF`"]
pub enum BTFW {
#[doc = "Extended bit time definitions disabled."] _0,
#[doc = "Extended bit time definitions enabled."] _1,
}
impl BTFW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
BTFW::_0 => false,
BTFW::_1 => true,
}
}
}
#[doc = r" Proxy"]
pub struct _BTFW<'a> {
w: &'a mut W,
}
impl<'a> _BTFW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: BTFW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Extended bit time definitions disabled."]
#[inline]
pub fn _0(self) -> &'a mut W {
self.variant(BTFW::_0)
}
#[doc = "Extended bit time definitions enabled."]
#[inline]
pub fn _1(self) -> &'a mut W {
self.variant(BTFW::_1)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 31;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 0:4 - Extended Phase Segment 2"]
#[inline]
pub fn epseg2(&self) -> EPSEG2R {
let bits = {
const MASK: u8 = 31;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) as u8
};
EPSEG2R { bits }
}
#[doc = "Bits 5:9 - Extended Phase Segment 1"]
#[inline]
pub fn epseg1(&self) -> EPSEG1R {
let bits = {
const MASK: u8 = 31;
const OFFSET: u8 = 5;
((self.bits >> OFFSET) & MASK as u32) as u8
};
EPSEG1R { bits }
}
#[doc = "Bits 10:15 - Extended Propagation Segment"]
#[inline]
pub fn epropseg(&self) -> EPROPSEGR {
let bits = {
const MASK: u8 = 63;
const OFFSET: u8 = 10;
((self.bits >> OFFSET) & MASK as u32) as u8
};
EPROPSEGR { bits }
}
#[doc = "Bits 16:20 - Extended Resync Jump Width"]
#[inline]
pub fn erjw(&self) -> ERJWR {
let bits = {
const MASK: u8 = 31;
const OFFSET: u8 = 16;
((self.bits >> OFFSET) & MASK as u32) as u8
};
ERJWR { bits }
}
#[doc = "Bits 21:30 - Extended Prescaler Division Factor"]
#[inline]
pub fn epresdiv(&self) -> EPRESDIVR {
let bits = {
const MASK: u16 = 1023;
const OFFSET: u8 = 21;
((self.bits >> OFFSET) & MASK as u32) as u16
};
EPRESDIVR { bits }
}
#[doc = "Bit 31 - Bit Timing Format Enable"]
#[inline]
pub fn btf(&self) -> BTFR {
BTFR::_from({
const MASK: bool = true;
const OFFSET: u8 = 31;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
}
impl W {
#[doc = r" Reset value of the register"]
#[inline]
pub fn reset_value() -> W {
W { bits: 0 }
}
#[doc = r" Writes raw bits to the register"]
#[inline]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.bits = bits;
self
}
#[doc = "Bits 0:4 - Extended Phase Segment 2"]
#[inline]
pub fn epseg2(&mut self) -> _EPSEG2W {
_EPSEG2W { w: self }
}
#[doc = "Bits 5:9 - Extended Phase Segment 1"]
#[inline]
pub fn epseg1(&mut self) -> _EPSEG1W {
_EPSEG1W { w: self }
}
#[doc = "Bits 10:15 - Extended Propagation Segment"]
#[inline]
pub fn epropseg(&mut self) -> _EPROPSEGW {
_EPROPSEGW { w: self }
}
#[doc = "Bits 16:20 - Extended Resync Jump Width"]
#[inline]
pub fn erjw(&mut self) -> _ERJWW {
_ERJWW { w: self }
}
#[doc = "Bits 21:30 - Extended Prescaler Division Factor"]
#[inline]
pub fn epresdiv(&mut self) -> _EPRESDIVW {
_EPRESDIVW { w: self }
}
#[doc = "Bit 31 - Bit Timing Format Enable"]
#[inline]
pub fn btf(&mut self) -> _BTFW {
_BTFW { w: self }
}
}

62
src/can2/crcr/mod.rs
View File

@ -1,62 +0,0 @@
#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
impl super::CRCR {
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
}
#[doc = r" Value of the field"]
pub struct TXCRCR {
bits: u16,
}
impl TXCRCR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u16 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct MBCRCR {
bits: u8,
}
impl MBCRCR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 0:14 - Transmitted CRC value"]
#[inline]
pub fn txcrc(&self) -> TXCRCR {
let bits = {
const MASK: u16 = 32767;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) as u16
};
TXCRCR { bits }
}
#[doc = "Bits 16:22 - CRC Mailbox"]
#[inline]
pub fn mbcrc(&self) -> MBCRCR {
let bits = {
const MASK: u8 = 127;
const OFFSET: u8 = 16;
((self.bits >> OFFSET) & MASK as u32) as u8
};
MBCRCR { bits }
}
}

1538
src/can2/ctrl1/mod.rs
View File

File diff suppressed because it is too large Load Diff

801
src/can2/ctrl1_pn/mod.rs
View File

@ -1,801 +0,0 @@
#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
#[doc = r" Value to write to the register"]
pub struct W {
bits: u32,
}
impl super::CTRL1_PN {
#[doc = r" Modifies the contents of the register"]
#[inline]
pub fn modify<F>(&self, f: F)
where
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
{
let bits = self.register.get();
let r = R { bits: bits };
let mut w = W { bits: bits };
f(&r, &mut w);
self.register.set(w.bits);
}
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
#[doc = r" Writes to the register"]
#[inline]
pub fn write<F>(&self, f: F)
where
F: FnOnce(&mut W) -> &mut W,
{
let mut w = W::reset_value();
f(&mut w);
self.register.set(w.bits);
}
#[doc = r" Writes the reset value to the register"]
#[inline]
pub fn reset(&self) {
self.write(|w| w)
}
}
#[doc = "Possible values of the field `FCS`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum FCSR {
#[doc = "Message ID filtering only"] _00,
#[doc = "Message ID filtering and payload filtering"] _01,
#[doc = "Message ID filtering occurring a specified number of times."] _10,
#[doc = "Message ID filtering and payload filtering a specified number of times"] _11,
}
impl FCSR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
match *self {
FCSR::_00 => 0,
FCSR::_01 => 1,
FCSR::_10 => 2,
FCSR::_11 => 3,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: u8) -> FCSR {
match value {
0 => FCSR::_00,
1 => FCSR::_01,
2 => FCSR::_10,
3 => FCSR::_11,
_ => unreachable!(),
}
}
#[doc = "Checks if the value of the field is `_00`"]
#[inline]
pub fn is_00(&self) -> bool {
*self == FCSR::_00
}
#[doc = "Checks if the value of the field is `_01`"]
#[inline]
pub fn is_01(&self) -> bool {
*self == FCSR::_01
}
#[doc = "Checks if the value of the field is `_10`"]
#[inline]
pub fn is_10(&self) -> bool {
*self == FCSR::_10
}
#[doc = "Checks if the value of the field is `_11`"]
#[inline]
pub fn is_11(&self) -> bool {
*self == FCSR::_11
}
}
#[doc = "Possible values of the field `IDFS`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum IDFSR {
#[doc = "Match upon a ID contents against an exact target value"] _00,
#[doc = "Match upon a ID value greater than or equal to a specified target value"] _01,
#[doc = "Match upon a ID value smaller than or equal to a specified target value"] _10,
#[doc = "Match upon a ID value inside a range, greater than or equal to a specified lower limit and smaller than or equal a specified upper limit"]
_11,
}
impl IDFSR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
match *self {
IDFSR::_00 => 0,
IDFSR::_01 => 1,
IDFSR::_10 => 2,
IDFSR::_11 => 3,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: u8) -> IDFSR {
match value {
0 => IDFSR::_00,
1 => IDFSR::_01,
2 => IDFSR::_10,
3 => IDFSR::_11,
_ => unreachable!(),
}
}
#[doc = "Checks if the value of the field is `_00`"]
#[inline]
pub fn is_00(&self) -> bool {
*self == IDFSR::_00
}
#[doc = "Checks if the value of the field is `_01`"]
#[inline]
pub fn is_01(&self) -> bool {
*self == IDFSR::_01
}
#[doc = "Checks if the value of the field is `_10`"]
#[inline]
pub fn is_10(&self) -> bool {
*self == IDFSR::_10
}
#[doc = "Checks if the value of the field is `_11`"]
#[inline]
pub fn is_11(&self) -> bool {
*self == IDFSR::_11
}
}
#[doc = "Possible values of the field `PLFS`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum PLFSR {
#[doc = "Match upon a payload contents against an exact target value"] _00,
#[doc = "Match upon a payload value greater than or equal to a specified target value"] _01,
#[doc = "Match upon a payload value smaller than or equal to a specified target value"] _10,
#[doc = "Match upon a payload value inside a range, greater than or equal to a specified lower limit and smaller than or equal a specified upper limit"]
_11,
}
impl PLFSR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
match *self {
PLFSR::_00 => 0,
PLFSR::_01 => 1,
PLFSR::_10 => 2,
PLFSR::_11 => 3,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: u8) -> PLFSR {
match value {
0 => PLFSR::_00,
1 => PLFSR::_01,
2 => PLFSR::_10,
3 => PLFSR::_11,
_ => unreachable!(),
}
}
#[doc = "Checks if the value of the field is `_00`"]
#[inline]
pub fn is_00(&self) -> bool {
*self == PLFSR::_00
}
#[doc = "Checks if the value of the field is `_01`"]
#[inline]
pub fn is_01(&self) -> bool {
*self == PLFSR::_01
}
#[doc = "Checks if the value of the field is `_10`"]
#[inline]
pub fn is_10(&self) -> bool {
*self == PLFSR::_10
}
#[doc = "Checks if the value of the field is `_11`"]
#[inline]
pub fn is_11(&self) -> bool {
*self == PLFSR::_11
}
}
#[doc = "Possible values of the field `NMATCH`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum NMATCHR {
#[doc = "Received message must match the predefined filtering criteria for ID and/or PL once before generating a wake up event."]
_00000001,
#[doc = "Received message must match the predefined filtering criteria for ID and/or PL twice before generating a wake up event."]
_00000010,
#[doc = "Received message must match the predefined filtering criteria for ID and/or PL 255 times before generating a wake up event."]
_11111111,
#[doc = r" Reserved"] _Reserved(u8),
}
impl NMATCHR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
match *self {
NMATCHR::_00000001 => 1,
NMATCHR::_00000010 => 2,
NMATCHR::_11111111 => 255,
NMATCHR::_Reserved(bits) => bits,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: u8) -> NMATCHR {
match value {
1 => NMATCHR::_00000001,
2 => NMATCHR::_00000010,
255 => NMATCHR::_11111111,
i => NMATCHR::_Reserved(i),
}
}
#[doc = "Checks if the value of the field is `_00000001`"]
#[inline]
pub fn is_00000001(&self) -> bool {
*self == NMATCHR::_00000001
}
#[doc = "Checks if the value of the field is `_00000010`"]
#[inline]
pub fn is_00000010(&self) -> bool {
*self == NMATCHR::_00000010
}
#[doc = "Checks if the value of the field is `_11111111`"]
#[inline]
pub fn is_11111111(&self) -> bool {
*self == NMATCHR::_11111111
}
}
#[doc = "Possible values of the field `WUMF_MSK`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum WUMF_MSKR {
#[doc = "Wake up match event is disabled"] _0,
#[doc = "Wake up match event is enabled"] _1,
}
impl WUMF_MSKR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
WUMF_MSKR::_0 => false,
WUMF_MSKR::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> WUMF_MSKR {
match value {
false => WUMF_MSKR::_0,
true => WUMF_MSKR::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == WUMF_MSKR::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == WUMF_MSKR::_1
}
}
#[doc = "Possible values of the field `WTOF_MSK`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum WTOF_MSKR {
#[doc = "Timeout wake up event is disabled"] _0,
#[doc = "Timeout wake up event is enabled"] _1,
}
impl WTOF_MSKR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
WTOF_MSKR::_0 => false,
WTOF_MSKR::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> WTOF_MSKR {
match value {
false => WTOF_MSKR::_0,
true => WTOF_MSKR::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == WTOF_MSKR::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == WTOF_MSKR::_1
}
}
#[doc = "Values that can be written to the field `FCS`"]
pub enum FCSW {
#[doc = "Message ID filtering only"] _00,
#[doc = "Message ID filtering and payload filtering"] _01,
#[doc = "Message ID filtering occurring a specified number of times."] _10,
#[doc = "Message ID filtering and payload filtering a specified number of times"] _11,
}
impl FCSW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> u8 {
match *self {
FCSW::_00 => 0,
FCSW::_01 => 1,
FCSW::_10 => 2,
FCSW::_11 => 3,
}
}
}
#[doc = r" Proxy"]
pub struct _FCSW<'a> {
w: &'a mut W,
}
impl<'a> _FCSW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: FCSW) -> &'a mut W {
{
self.bits(variant._bits())
}
}
#[doc = "Message ID filtering only"]
#[inline]
pub fn _00(self) -> &'a mut W {
self.variant(FCSW::_00)
}
#[doc = "Message ID filtering and payload filtering"]
#[inline]
pub fn _01(self) -> &'a mut W {
self.variant(FCSW::_01)
}
#[doc = "Message ID filtering occurring a specified number of times."]
#[inline]
pub fn _10(self) -> &'a mut W {
self.variant(FCSW::_10)
}
#[doc = "Message ID filtering and payload filtering a specified number of times"]
#[inline]
pub fn _11(self) -> &'a mut W {
self.variant(FCSW::_11)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 3;
const OFFSET: u8 = 0;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `IDFS`"]
pub enum IDFSW {
#[doc = "Match upon a ID contents against an exact target value"] _00,
#[doc = "Match upon a ID value greater than or equal to a specified target value"] _01,
#[doc = "Match upon a ID value smaller than or equal to a specified target value"] _10,
#[doc = "Match upon a ID value inside a range, greater than or equal to a specified lower limit and smaller than or equal a specified upper limit"]
_11,
}
impl IDFSW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> u8 {
match *self {
IDFSW::_00 => 0,
IDFSW::_01 => 1,
IDFSW::_10 => 2,
IDFSW::_11 => 3,
}
}
}
#[doc = r" Proxy"]
pub struct _IDFSW<'a> {
w: &'a mut W,
}
impl<'a> _IDFSW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: IDFSW) -> &'a mut W {
{
self.bits(variant._bits())
}
}
#[doc = "Match upon a ID contents against an exact target value"]
#[inline]
pub fn _00(self) -> &'a mut W {
self.variant(IDFSW::_00)
}
#[doc = "Match upon a ID value greater than or equal to a specified target value"]
#[inline]
pub fn _01(self) -> &'a mut W {
self.variant(IDFSW::_01)
}
#[doc = "Match upon a ID value smaller than or equal to a specified target value"]
#[inline]
pub fn _10(self) -> &'a mut W {
self.variant(IDFSW::_10)
}
#[doc = "Match upon a ID value inside a range, greater than or equal to a specified lower limit and smaller than or equal a specified upper limit"]
#[inline]
pub fn _11(self) -> &'a mut W {
self.variant(IDFSW::_11)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 3;
const OFFSET: u8 = 2;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `PLFS`"]
pub enum PLFSW {
#[doc = "Match upon a payload contents against an exact target value"] _00,
#[doc = "Match upon a payload value greater than or equal to a specified target value"] _01,
#[doc = "Match upon a payload value smaller than or equal to a specified target value"] _10,
#[doc = "Match upon a payload value inside a range, greater than or equal to a specified lower limit and smaller than or equal a specified upper limit"]
_11,
}
impl PLFSW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> u8 {
match *self {
PLFSW::_00 => 0,
PLFSW::_01 => 1,
PLFSW::_10 => 2,
PLFSW::_11 => 3,
}
}
}
#[doc = r" Proxy"]
pub struct _PLFSW<'a> {
w: &'a mut W,
}
impl<'a> _PLFSW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: PLFSW) -> &'a mut W {
{
self.bits(variant._bits())
}
}
#[doc = "Match upon a payload contents against an exact target value"]
#[inline]
pub fn _00(self) -> &'a mut W {
self.variant(PLFSW::_00)
}
#[doc = "Match upon a payload value greater than or equal to a specified target value"]
#[inline]
pub fn _01(self) -> &'a mut W {
self.variant(PLFSW::_01)
}
#[doc = "Match upon a payload value smaller than or equal to a specified target value"]
#[inline]
pub fn _10(self) -> &'a mut W {
self.variant(PLFSW::_10)
}
#[doc = "Match upon a payload value inside a range, greater than or equal to a specified lower limit and smaller than or equal a specified upper limit"]
#[inline]
pub fn _11(self) -> &'a mut W {
self.variant(PLFSW::_11)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 3;
const OFFSET: u8 = 4;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `NMATCH`"]
pub enum NMATCHW {
#[doc = "Received message must match the predefined filtering criteria for ID and/or PL once before generating a wake up event."]
_00000001,
#[doc = "Received message must match the predefined filtering criteria for ID and/or PL twice before generating a wake up event."]
_00000010,
#[doc = "Received message must match the predefined filtering criteria for ID and/or PL 255 times before generating a wake up event."]
_11111111,
}
impl NMATCHW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> u8 {
match *self {
NMATCHW::_00000001 => 1,
NMATCHW::_00000010 => 2,
NMATCHW::_11111111 => 255,
}
}
}
#[doc = r" Proxy"]
pub struct _NMATCHW<'a> {
w: &'a mut W,
}
impl<'a> _NMATCHW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: NMATCHW) -> &'a mut W {
unsafe { self.bits(variant._bits()) }
}
#[doc = "Received message must match the predefined filtering criteria for ID and/or PL once before generating a wake up event."]
#[inline]
pub fn _00000001(self) -> &'a mut W {
self.variant(NMATCHW::_00000001)
}
#[doc = "Received message must match the predefined filtering criteria for ID and/or PL twice before generating a wake up event."]
#[inline]
pub fn _00000010(self) -> &'a mut W {
self.variant(NMATCHW::_00000010)
}
#[doc = "Received message must match the predefined filtering criteria for ID and/or PL 255 times before generating a wake up event."]
#[inline]
pub fn _11111111(self) -> &'a mut W {
self.variant(NMATCHW::_11111111)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 255;
const OFFSET: u8 = 8;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `WUMF_MSK`"]
pub enum WUMF_MSKW {
#[doc = "Wake up match event is disabled"] _0,
#[doc = "Wake up match event is enabled"] _1,
}
impl WUMF_MSKW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
WUMF_MSKW::_0 => false,
WUMF_MSKW::_1 => true,
}
}
}
#[doc = r" Proxy"]
pub struct _WUMF_MSKW<'a> {
w: &'a mut W,
}
impl<'a> _WUMF_MSKW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: WUMF_MSKW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Wake up match event is disabled"]
#[inline]
pub fn _0(self) -> &'a mut W {
self.variant(WUMF_MSKW::_0)
}
#[doc = "Wake up match event is enabled"]
#[inline]
pub fn _1(self) -> &'a mut W {
self.variant(WUMF_MSKW::_1)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 16;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `WTOF_MSK`"]
pub enum WTOF_MSKW {
#[doc = "Timeout wake up event is disabled"] _0,
#[doc = "Timeout wake up event is enabled"] _1,
}
impl WTOF_MSKW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
WTOF_MSKW::_0 => false,
WTOF_MSKW::_1 => true,
}
}
}
#[doc = r" Proxy"]
pub struct _WTOF_MSKW<'a> {
w: &'a mut W,
}
impl<'a> _WTOF_MSKW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: WTOF_MSKW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Timeout wake up event is disabled"]
#[inline]
pub fn _0(self) -> &'a mut W {
self.variant(WTOF_MSKW::_0)
}
#[doc = "Timeout wake up event is enabled"]
#[inline]
pub fn _1(self) -> &'a mut W {
self.variant(WTOF_MSKW::_1)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 17;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 0:1 - Filtering Combination Selection"]
#[inline]
pub fn fcs(&self) -> FCSR {
FCSR::_from({
const MASK: u8 = 3;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) as u8
})
}
#[doc = "Bits 2:3 - ID Filtering Selection"]
#[inline]
pub fn idfs(&self) -> IDFSR {
IDFSR::_from({
const MASK: u8 = 3;
const OFFSET: u8 = 2;
((self.bits >> OFFSET) & MASK as u32) as u8
})
}
#[doc = "Bits 4:5 - Payload Filtering Selection"]
#[inline]
pub fn plfs(&self) -> PLFSR {
PLFSR::_from({
const MASK: u8 = 3;
const OFFSET: u8 = 4;
((self.bits >> OFFSET) & MASK as u32) as u8
})
}
#[doc = "Bits 8:15 - Number of Messages Matching the Same Filtering Criteria"]
#[inline]
pub fn nmatch(&self) -> NMATCHR {
NMATCHR::_from({
const MASK: u8 = 255;
const OFFSET: u8 = 8;
((self.bits >> OFFSET) & MASK as u32) as u8
})
}
#[doc = "Bit 16 - Wake Up by Match Flag Mask Bit"]
#[inline]
pub fn wumf_msk(&self) -> WUMF_MSKR {
WUMF_MSKR::_from({
const MASK: bool = true;
const OFFSET: u8 = 16;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 17 - Wake Up by Timeout Flag Mask Bit"]
#[inline]
pub fn wtof_msk(&self) -> WTOF_MSKR {
WTOF_MSKR::_from({
const MASK: bool = true;
const OFFSET: u8 = 17;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
}
impl W {
#[doc = r" Reset value of the register"]
#[inline]
pub fn reset_value() -> W {
W { bits: 256 }
}
#[doc = r" Writes raw bits to the register"]
#[inline]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.bits = bits;
self
}
#[doc = "Bits 0:1 - Filtering Combination Selection"]
#[inline]
pub fn fcs(&mut self) -> _FCSW {
_FCSW { w: self }
}
#[doc = "Bits 2:3 - ID Filtering Selection"]
#[inline]
pub fn idfs(&mut self) -> _IDFSW {
_IDFSW { w: self }
}
#[doc = "Bits 4:5 - Payload Filtering Selection"]
#[inline]
pub fn plfs(&mut self) -> _PLFSW {
_PLFSW { w: self }
}
#[doc = "Bits 8:15 - Number of Messages Matching the Same Filtering Criteria"]
#[inline]
pub fn nmatch(&mut self) -> _NMATCHW {
_NMATCHW { w: self }
}
#[doc = "Bit 16 - Wake Up by Match Flag Mask Bit"]
#[inline]
pub fn wumf_msk(&mut self) -> _WUMF_MSKW {
_WUMF_MSKW { w: self }
}
#[doc = "Bit 17 - Wake Up by Timeout Flag Mask Bit"]
#[inline]
pub fn wtof_msk(&mut self) -> _WTOF_MSKW {
_WTOF_MSKW { w: self }
}
}

1189
src/can2/ctrl2/mod.rs
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105
src/can2/ctrl2_pn/mod.rs
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@ -1,105 +0,0 @@
#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
#[doc = r" Value to write to the register"]
pub struct W {
bits: u32,
}
impl super::CTRL2_PN {
#[doc = r" Modifies the contents of the register"]
#[inline]
pub fn modify<F>(&self, f: F)
where
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
{
let bits = self.register.get();
let r = R { bits: bits };
let mut w = W { bits: bits };
f(&r, &mut w);
self.register.set(w.bits);
}
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
#[doc = r" Writes to the register"]
#[inline]
pub fn write<F>(&self, f: F)
where
F: FnOnce(&mut W) -> &mut W,
{
let mut w = W::reset_value();
f(&mut w);
self.register.set(w.bits);
}
#[doc = r" Writes the reset value to the register"]
#[inline]
pub fn reset(&self) {
self.write(|w| w)
}
}
#[doc = r" Value of the field"]
pub struct MATCHTOR {
bits: u16,
}
impl MATCHTOR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u16 {
self.bits
}
}
#[doc = r" Proxy"]
pub struct _MATCHTOW<'a> {
w: &'a mut W,
}
impl<'a> _MATCHTOW<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u16) -> &'a mut W {
const MASK: u16 = 65535;
const OFFSET: u8 = 0;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 0:15 - Timeout for No Message Matching the Filtering Criteria"]
#[inline]
pub fn matchto(&self) -> MATCHTOR {
let bits = {
const MASK: u16 = 65535;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) as u16
};
MATCHTOR { bits }
}
}
impl W {
#[doc = r" Reset value of the register"]
#[inline]
pub fn reset_value() -> W {
W { bits: 0 }
}
#[doc = r" Writes raw bits to the register"]
#[inline]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.bits = bits;
self
}
#[doc = "Bits 0:15 - Timeout for No Message Matching the Filtering Criteria"]
#[inline]
pub fn matchto(&mut self) -> _MATCHTOW {
_MATCHTOW { w: self }
}
}

228
src/can2/ecr/mod.rs
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@ -1,228 +0,0 @@
#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
#[doc = r" Value to write to the register"]
pub struct W {
bits: u32,
}
impl super::ECR {
#[doc = r" Modifies the contents of the register"]
#[inline]
pub fn modify<F>(&self, f: F)
where
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
{
let bits = self.register.get();
let r = R { bits: bits };
let mut w = W { bits: bits };
f(&r, &mut w);
self.register.set(w.bits);
}
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
#[doc = r" Writes to the register"]
#[inline]
pub fn write<F>(&self, f: F)
where
F: FnOnce(&mut W) -> &mut W,
{
let mut w = W::reset_value();
f(&mut w);
self.register.set(w.bits);
}
#[doc = r" Writes the reset value to the register"]
#[inline]
pub fn reset(&self) {
self.write(|w| w)
}
}
#[doc = r" Value of the field"]
pub struct TXERRCNTR {
bits: u8,
}
impl TXERRCNTR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct RXERRCNTR {
bits: u8,
}
impl RXERRCNTR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct TXERRCNT_FASTR {
bits: u8,
}
impl TXERRCNT_FASTR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct RXERRCNT_FASTR {
bits: u8,
}
impl RXERRCNT_FASTR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Proxy"]
pub struct _TXERRCNTW<'a> {
w: &'a mut W,
}
impl<'a> _TXERRCNTW<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 255;
const OFFSET: u8 = 0;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = r" Proxy"]
pub struct _RXERRCNTW<'a> {
w: &'a mut W,
}
impl<'a> _RXERRCNTW<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 255;
const OFFSET: u8 = 8;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = r" Proxy"]
pub struct _TXERRCNT_FASTW<'a> {
w: &'a mut W,
}
impl<'a> _TXERRCNT_FASTW<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 255;
const OFFSET: u8 = 16;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = r" Proxy"]
pub struct _RXERRCNT_FASTW<'a> {
w: &'a mut W,
}
impl<'a> _RXERRCNT_FASTW<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 255;
const OFFSET: u8 = 24;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 0:7 - Transmit Error Counter"]
#[inline]
pub fn txerrcnt(&self) -> TXERRCNTR {
let bits = {
const MASK: u8 = 255;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) as u8
};
TXERRCNTR { bits }
}
#[doc = "Bits 8:15 - Receive Error Counter"]
#[inline]
pub fn rxerrcnt(&self) -> RXERRCNTR {
let bits = {
const MASK: u8 = 255;
const OFFSET: u8 = 8;
((self.bits >> OFFSET) & MASK as u32) as u8
};
RXERRCNTR { bits }
}
#[doc = "Bits 16:23 - Transmit Error Counter for fast bits"]
#[inline]
pub fn txerrcnt_fast(&self) -> TXERRCNT_FASTR {
let bits = {
const MASK: u8 = 255;
const OFFSET: u8 = 16;
((self.bits >> OFFSET) & MASK as u32) as u8
};
TXERRCNT_FASTR { bits }
}
#[doc = "Bits 24:31 - Receive Error Counter for fast bits"]
#[inline]
pub fn rxerrcnt_fast(&self) -> RXERRCNT_FASTR {
let bits = {
const MASK: u8 = 255;
const OFFSET: u8 = 24;
((self.bits >> OFFSET) & MASK as u32) as u8
};
RXERRCNT_FASTR { bits }
}
}
impl W {
#[doc = r" Reset value of the register"]
#[inline]
pub fn reset_value() -> W {
W { bits: 0 }
}
#[doc = r" Writes raw bits to the register"]
#[inline]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.bits = bits;
self
}
#[doc = "Bits 0:7 - Transmit Error Counter"]
#[inline]
pub fn txerrcnt(&mut self) -> _TXERRCNTW {
_TXERRCNTW { w: self }
}
#[doc = "Bits 8:15 - Receive Error Counter"]
#[inline]
pub fn rxerrcnt(&mut self) -> _RXERRCNTW {
_RXERRCNTW { w: self }
}
#[doc = "Bits 16:23 - Transmit Error Counter for fast bits"]
#[inline]
pub fn txerrcnt_fast(&mut self) -> _TXERRCNT_FASTW {
_TXERRCNT_FASTW { w: self }
}
#[doc = "Bits 24:31 - Receive Error Counter for fast bits"]
#[inline]
pub fn rxerrcnt_fast(&mut self) -> _RXERRCNT_FASTW {
_RXERRCNT_FASTW { w: self }
}
}

228
src/can2/embedded_ram/mod.rs
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@ -1,228 +0,0 @@
#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
#[doc = r" Value to write to the register"]
pub struct W {
bits: u32,
}
impl super::EMBEDDEDRAM {
#[doc = r" Modifies the contents of the register"]
#[inline]
pub fn modify<F>(&self, f: F)
where
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
{
let bits = self.register.get();
let r = R { bits: bits };
let mut w = W { bits: bits };
f(&r, &mut w);
self.register.set(w.bits);
}
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
#[doc = r" Writes to the register"]
#[inline]
pub fn write<F>(&self, f: F)
where
F: FnOnce(&mut W) -> &mut W,
{
let mut w = W::reset_value();
f(&mut w);
self.register.set(w.bits);
}
#[doc = r" Writes the reset value to the register"]
#[inline]
pub fn reset(&self) {
self.write(|w| w)
}
}
#[doc = r" Value of the field"]
pub struct DATA_BYTE_3R {
bits: u8,
}
impl DATA_BYTE_3R {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct DATA_BYTE_2R {
bits: u8,
}
impl DATA_BYTE_2R {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct DATA_BYTE_1R {
bits: u8,
}
impl DATA_BYTE_1R {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct DATA_BYTE_0R {
bits: u8,
}
impl DATA_BYTE_0R {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Proxy"]
pub struct _DATA_BYTE_3W<'a> {
w: &'a mut W,
}
impl<'a> _DATA_BYTE_3W<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 255;
const OFFSET: u8 = 0;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = r" Proxy"]
pub struct _DATA_BYTE_2W<'a> {
w: &'a mut W,
}
impl<'a> _DATA_BYTE_2W<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 255;
const OFFSET: u8 = 8;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = r" Proxy"]
pub struct _DATA_BYTE_1W<'a> {
w: &'a mut W,
}
impl<'a> _DATA_BYTE_1W<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 255;
const OFFSET: u8 = 16;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = r" Proxy"]
pub struct _DATA_BYTE_0W<'a> {
w: &'a mut W,
}
impl<'a> _DATA_BYTE_0W<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 255;
const OFFSET: u8 = 24;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 0:7 - Data byte 3 of Rx/Tx frame."]
#[inline]
pub fn data_byte_3(&self) -> DATA_BYTE_3R {
let bits = {
const MASK: u8 = 255;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) as u8
};
DATA_BYTE_3R { bits }
}
#[doc = "Bits 8:15 - Data byte 2 of Rx/Tx frame."]
#[inline]
pub fn data_byte_2(&self) -> DATA_BYTE_2R {
let bits = {
const MASK: u8 = 255;
const OFFSET: u8 = 8;
((self.bits >> OFFSET) & MASK as u32) as u8
};
DATA_BYTE_2R { bits }
}
#[doc = "Bits 16:23 - Data byte 1 of Rx/Tx frame."]
#[inline]
pub fn data_byte_1(&self) -> DATA_BYTE_1R {
let bits = {
const MASK: u8 = 255;
const OFFSET: u8 = 16;
((self.bits >> OFFSET) & MASK as u32) as u8
};
DATA_BYTE_1R { bits }
}
#[doc = "Bits 24:31 - Data byte 0 of Rx/Tx frame."]
#[inline]
pub fn data_byte_0(&self) -> DATA_BYTE_0R {
let bits = {
const MASK: u8 = 255;
const OFFSET: u8 = 24;
((self.bits >> OFFSET) & MASK as u32) as u8
};
DATA_BYTE_0R { bits }
}
}
impl W {
#[doc = r" Reset value of the register"]
#[inline]
pub fn reset_value() -> W {
W { bits: 0 }
}
#[doc = r" Writes raw bits to the register"]
#[inline]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.bits = bits;
self
}
#[doc = "Bits 0:7 - Data byte 3 of Rx/Tx frame."]
#[inline]
pub fn data_byte_3(&mut self) -> _DATA_BYTE_3W {
_DATA_BYTE_3W { w: self }
}
#[doc = "Bits 8:15 - Data byte 2 of Rx/Tx frame."]
#[inline]
pub fn data_byte_2(&mut self) -> _DATA_BYTE_2W {
_DATA_BYTE_2W { w: self }
}
#[doc = "Bits 16:23 - Data byte 1 of Rx/Tx frame."]
#[inline]
pub fn data_byte_1(&mut self) -> _DATA_BYTE_1W {
_DATA_BYTE_1W { w: self }
}
#[doc = "Bits 24:31 - Data byte 0 of Rx/Tx frame."]
#[inline]
pub fn data_byte_0(&mut self) -> _DATA_BYTE_0W {
_DATA_BYTE_0W { w: self }
}
}

1848
src/can2/esr1/mod.rs
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150
src/can2/esr2/mod.rs
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@ -1,150 +0,0 @@
#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
impl super::ESR2 {
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
}
#[doc = "Possible values of the field `IMB`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum IMBR {
#[doc = "If ESR2[VPS] is asserted, the ESR2[LPTM] is not an inactive Mailbox."] _0,
#[doc = "If ESR2[VPS] is asserted, there is at least one inactive Mailbox. LPTM content is the number of the first one."]
_1,
}
impl IMBR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
IMBR::_0 => false,
IMBR::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> IMBR {
match value {
false => IMBR::_0,
true => IMBR::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == IMBR::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == IMBR::_1
}
}
#[doc = "Possible values of the field `VPS`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum VPSR {
#[doc = "Contents of IMB and LPTM are invalid."] _0,
#[doc = "Contents of IMB and LPTM are valid."] _1,
}
impl VPSR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
VPSR::_0 => false,
VPSR::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> VPSR {
match value {
false => VPSR::_0,
true => VPSR::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == VPSR::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == VPSR::_1
}
}
#[doc = r" Value of the field"]
pub struct LPTMR {
bits: u8,
}
impl LPTMR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bit 13 - Inactive Mailbox"]
#[inline]
pub fn imb(&self) -> IMBR {
IMBR::_from({
const MASK: bool = true;
const OFFSET: u8 = 13;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 14 - Valid Priority Status"]
#[inline]
pub fn vps(&self) -> VPSR {
VPSR::_from({
const MASK: bool = true;
const OFFSET: u8 = 14;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bits 16:22 - Lowest Priority Tx Mailbox"]
#[inline]
pub fn lptm(&self) -> LPTMR {
let bits = {
const MASK: u8 = 127;
const OFFSET: u8 = 16;
((self.bits >> OFFSET) & MASK as u32) as u8
};
LPTMR { bits }
}
}

269
src/can2/fdcbt/mod.rs
View File

@ -1,269 +0,0 @@
#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
#[doc = r" Value to write to the register"]
pub struct W {
bits: u32,
}
impl super::FDCBT {
#[doc = r" Modifies the contents of the register"]
#[inline]
pub fn modify<F>(&self, f: F)
where
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
{
let bits = self.register.get();
let r = R { bits: bits };
let mut w = W { bits: bits };
f(&r, &mut w);
self.register.set(w.bits);
}
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
#[doc = r" Writes to the register"]
#[inline]
pub fn write<F>(&self, f: F)
where
F: FnOnce(&mut W) -> &mut W,
{
let mut w = W::reset_value();
f(&mut w);
self.register.set(w.bits);
}
#[doc = r" Writes the reset value to the register"]
#[inline]
pub fn reset(&self) {
self.write(|w| w)
}
}
#[doc = r" Value of the field"]
pub struct FPSEG2R {
bits: u8,
}
impl FPSEG2R {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct FPSEG1R {
bits: u8,
}
impl FPSEG1R {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct FPROPSEGR {
bits: u8,
}
impl FPROPSEGR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct FRJWR {
bits: u8,
}
impl FRJWR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct FPRESDIVR {
bits: u16,
}
impl FPRESDIVR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u16 {
self.bits
}
}
#[doc = r" Proxy"]
pub struct _FPSEG2W<'a> {
w: &'a mut W,
}
impl<'a> _FPSEG2W<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 7;
const OFFSET: u8 = 0;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = r" Proxy"]
pub struct _FPSEG1W<'a> {
w: &'a mut W,
}
impl<'a> _FPSEG1W<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 7;
const OFFSET: u8 = 5;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = r" Proxy"]
pub struct _FPROPSEGW<'a> {
w: &'a mut W,
}
impl<'a> _FPROPSEGW<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 31;
const OFFSET: u8 = 10;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = r" Proxy"]
pub struct _FRJWW<'a> {
w: &'a mut W,
}
impl<'a> _FRJWW<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 7;
const OFFSET: u8 = 16;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = r" Proxy"]
pub struct _FPRESDIVW<'a> {
w: &'a mut W,
}
impl<'a> _FPRESDIVW<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u16) -> &'a mut W {
const MASK: u16 = 1023;
const OFFSET: u8 = 20;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 0:2 - Fast Phase Segment 2"]
#[inline]
pub fn fpseg2(&self) -> FPSEG2R {
let bits = {
const MASK: u8 = 7;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) as u8
};
FPSEG2R { bits }
}
#[doc = "Bits 5:7 - Fast Phase Segment 1"]
#[inline]
pub fn fpseg1(&self) -> FPSEG1R {
let bits = {
const MASK: u8 = 7;
const OFFSET: u8 = 5;
((self.bits >> OFFSET) & MASK as u32) as u8
};
FPSEG1R { bits }
}
#[doc = "Bits 10:14 - Fast Propagation Segment"]
#[inline]
pub fn fpropseg(&self) -> FPROPSEGR {
let bits = {
const MASK: u8 = 31;
const OFFSET: u8 = 10;
((self.bits >> OFFSET) & MASK as u32) as u8
};
FPROPSEGR { bits }
}
#[doc = "Bits 16:18 - Fast Resync Jump Width"]
#[inline]
pub fn frjw(&self) -> FRJWR {
let bits = {
const MASK: u8 = 7;
const OFFSET: u8 = 16;
((self.bits >> OFFSET) & MASK as u32) as u8
};
FRJWR { bits }
}
#[doc = "Bits 20:29 - Fast Prescaler Division Factor"]
#[inline]
pub fn fpresdiv(&self) -> FPRESDIVR {
let bits = {
const MASK: u16 = 1023;
const OFFSET: u8 = 20;
((self.bits >> OFFSET) & MASK as u32) as u16
};
FPRESDIVR { bits }
}
}
impl W {
#[doc = r" Reset value of the register"]
#[inline]
pub fn reset_value() -> W {
W { bits: 0 }
}
#[doc = r" Writes raw bits to the register"]
#[inline]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.bits = bits;
self
}
#[doc = "Bits 0:2 - Fast Phase Segment 2"]
#[inline]
pub fn fpseg2(&mut self) -> _FPSEG2W {
_FPSEG2W { w: self }
}
#[doc = "Bits 5:7 - Fast Phase Segment 1"]
#[inline]
pub fn fpseg1(&mut self) -> _FPSEG1W {
_FPSEG1W { w: self }
}
#[doc = "Bits 10:14 - Fast Propagation Segment"]
#[inline]
pub fn fpropseg(&mut self) -> _FPROPSEGW {
_FPROPSEGW { w: self }
}
#[doc = "Bits 16:18 - Fast Resync Jump Width"]
#[inline]
pub fn frjw(&mut self) -> _FRJWW {
_FRJWW { w: self }
}
#[doc = "Bits 20:29 - Fast Prescaler Division Factor"]
#[inline]
pub fn fpresdiv(&mut self) -> _FPRESDIVW {
_FPRESDIVW { w: self }
}
}

62
src/can2/fdcrc/mod.rs
View File

@ -1,62 +0,0 @@
#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
impl super::FDCRC {
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
}
#[doc = r" Value of the field"]
pub struct FD_TXCRCR {
bits: u32,
}
impl FD_TXCRCR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct FD_MBCRCR {
bits: u8,
}
impl FD_MBCRCR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 0:20 - Extended Transmitted CRC value"]
#[inline]
pub fn fd_txcrc(&self) -> FD_TXCRCR {
let bits = {
const MASK: u32 = 2097151;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) as u32
};
FD_TXCRCR { bits }
}
#[doc = "Bits 24:30 - CRC Mailbox Number for FD_TXCRC"]
#[inline]
pub fn fd_mbcrc(&self) -> FD_MBCRCR {
let bits = {
const MASK: u8 = 127;
const OFFSET: u8 = 24;
((self.bits >> OFFSET) & MASK as u32) as u8
};
FD_MBCRCR { bits }
}
}

599
src/can2/fdctrl/mod.rs
View File

@ -1,599 +0,0 @@
#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
#[doc = r" Value to write to the register"]
pub struct W {
bits: u32,
}
impl super::FDCTRL {
#[doc = r" Modifies the contents of the register"]
#[inline]
pub fn modify<F>(&self, f: F)
where
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
{
let bits = self.register.get();
let r = R { bits: bits };
let mut w = W { bits: bits };
f(&r, &mut w);
self.register.set(w.bits);
}
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
#[doc = r" Writes to the register"]
#[inline]
pub fn write<F>(&self, f: F)
where
F: FnOnce(&mut W) -> &mut W,
{
let mut w = W::reset_value();
f(&mut w);
self.register.set(w.bits);
}
#[doc = r" Writes the reset value to the register"]
#[inline]
pub fn reset(&self) {
self.write(|w| w)
}
}
#[doc = r" Value of the field"]
pub struct TDCVALR {
bits: u8,
}
impl TDCVALR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct TDCOFFR {
bits: u8,
}
impl TDCOFFR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = "Possible values of the field `TDCFAIL`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum TDCFAILR {
#[doc = "Measured loop delay is in range."] _0,
#[doc = "Measured loop delay is out of range."] _1,
}
impl TDCFAILR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
TDCFAILR::_0 => false,
TDCFAILR::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> TDCFAILR {
match value {
false => TDCFAILR::_0,
true => TDCFAILR::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == TDCFAILR::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == TDCFAILR::_1
}
}
#[doc = "Possible values of the field `TDCEN`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum TDCENR {
#[doc = "TDC is disabled"] _0,
#[doc = "TDC is enabled"] _1,
}
impl TDCENR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
TDCENR::_0 => false,
TDCENR::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> TDCENR {
match value {
false => TDCENR::_0,
true => TDCENR::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == TDCENR::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == TDCENR::_1
}
}
#[doc = "Possible values of the field `MBDSR0`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum MBDSR0R {
#[doc = "Selects 8 bytes per Message Buffer."] _00,
#[doc = "Selects 16 bytes per Message Buffer."] _01,
#[doc = "Selects 32 bytes per Message Buffer."] _10,
#[doc = "Selects 64 bytes per Message Buffer."] _11,
}
impl MBDSR0R {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
match *self {
MBDSR0R::_00 => 0,
MBDSR0R::_01 => 1,
MBDSR0R::_10 => 2,
MBDSR0R::_11 => 3,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: u8) -> MBDSR0R {
match value {
0 => MBDSR0R::_00,
1 => MBDSR0R::_01,
2 => MBDSR0R::_10,
3 => MBDSR0R::_11,
_ => unreachable!(),
}
}
#[doc = "Checks if the value of the field is `_00`"]
#[inline]
pub fn is_00(&self) -> bool {
*self == MBDSR0R::_00
}
#[doc = "Checks if the value of the field is `_01`"]
#[inline]
pub fn is_01(&self) -> bool {
*self == MBDSR0R::_01
}
#[doc = "Checks if the value of the field is `_10`"]
#[inline]
pub fn is_10(&self) -> bool {
*self == MBDSR0R::_10
}
#[doc = "Checks if the value of the field is `_11`"]
#[inline]
pub fn is_11(&self) -> bool {
*self == MBDSR0R::_11
}
}
#[doc = "Possible values of the field `FDRATE`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum FDRATER {
#[doc = "Transmit a frame in nominal rate. The BRS bit in the Tx MB has no effect."] _0,
#[doc = "Transmit a frame with bit rate switching if the BRS bit in the Tx MB is recessive."] _1,
}
impl FDRATER {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
FDRATER::_0 => false,
FDRATER::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> FDRATER {
match value {
false => FDRATER::_0,
true => FDRATER::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == FDRATER::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == FDRATER::_1
}
}
#[doc = r" Proxy"]
pub struct _TDCOFFW<'a> {
w: &'a mut W,
}
impl<'a> _TDCOFFW<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 31;
const OFFSET: u8 = 8;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `TDCFAIL`"]
pub enum TDCFAILW {
#[doc = "Measured loop delay is in range."] _0,
#[doc = "Measured loop delay is out of range."] _1,
}
impl TDCFAILW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
TDCFAILW::_0 => false,
TDCFAILW::_1 => true,
}
}
}
#[doc = r" Proxy"]
pub struct _TDCFAILW<'a> {
w: &'a mut W,
}
impl<'a> _TDCFAILW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: TDCFAILW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Measured loop delay is in range."]
#[inline]
pub fn _0(self) -> &'a mut W {
self.variant(TDCFAILW::_0)
}
#[doc = "Measured loop delay is out of range."]
#[inline]
pub fn _1(self) -> &'a mut W {
self.variant(TDCFAILW::_1)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 14;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `TDCEN`"]
pub enum TDCENW {
#[doc = "TDC is disabled"] _0,
#[doc = "TDC is enabled"] _1,
}
impl TDCENW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
TDCENW::_0 => false,
TDCENW::_1 => true,
}
}
}
#[doc = r" Proxy"]
pub struct _TDCENW<'a> {
w: &'a mut W,
}
impl<'a> _TDCENW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: TDCENW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "TDC is disabled"]
#[inline]
pub fn _0(self) -> &'a mut W {
self.variant(TDCENW::_0)
}
#[doc = "TDC is enabled"]
#[inline]
pub fn _1(self) -> &'a mut W {
self.variant(TDCENW::_1)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 15;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `MBDSR0`"]
pub enum MBDSR0W {
#[doc = "Selects 8 bytes per Message Buffer."] _00,
#[doc = "Selects 16 bytes per Message Buffer."] _01,
#[doc = "Selects 32 bytes per Message Buffer."] _10,
#[doc = "Selects 64 bytes per Message Buffer."] _11,
}
impl MBDSR0W {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> u8 {
match *self {
MBDSR0W::_00 => 0,
MBDSR0W::_01 => 1,
MBDSR0W::_10 => 2,
MBDSR0W::_11 => 3,
}
}
}
#[doc = r" Proxy"]
pub struct _MBDSR0W<'a> {
w: &'a mut W,
}
impl<'a> _MBDSR0W<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: MBDSR0W) -> &'a mut W {
{
self.bits(variant._bits())
}
}
#[doc = "Selects 8 bytes per Message Buffer."]
#[inline]
pub fn _00(self) -> &'a mut W {
self.variant(MBDSR0W::_00)
}
#[doc = "Selects 16 bytes per Message Buffer."]
#[inline]
pub fn _01(self) -> &'a mut W {
self.variant(MBDSR0W::_01)
}
#[doc = "Selects 32 bytes per Message Buffer."]
#[inline]
pub fn _10(self) -> &'a mut W {
self.variant(MBDSR0W::_10)
}
#[doc = "Selects 64 bytes per Message Buffer."]
#[inline]
pub fn _11(self) -> &'a mut W {
self.variant(MBDSR0W::_11)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 3;
const OFFSET: u8 = 16;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `FDRATE`"]
pub enum FDRATEW {
#[doc = "Transmit a frame in nominal rate. The BRS bit in the Tx MB has no effect."] _0,
#[doc = "Transmit a frame with bit rate switching if the BRS bit in the Tx MB is recessive."] _1,
}
impl FDRATEW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
FDRATEW::_0 => false,
FDRATEW::_1 => true,
}
}
}
#[doc = r" Proxy"]
pub struct _FDRATEW<'a> {
w: &'a mut W,
}
impl<'a> _FDRATEW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: FDRATEW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Transmit a frame in nominal rate. The BRS bit in the Tx MB has no effect."]
#[inline]
pub fn _0(self) -> &'a mut W {
self.variant(FDRATEW::_0)
}
#[doc = "Transmit a frame with bit rate switching if the BRS bit in the Tx MB is recessive."]
#[inline]
pub fn _1(self) -> &'a mut W {
self.variant(FDRATEW::_1)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 31;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 0:5 - Transceiver Delay Compensation Value"]
#[inline]
pub fn tdcval(&self) -> TDCVALR {
let bits = {
const MASK: u8 = 63;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) as u8
};
TDCVALR { bits }
}
#[doc = "Bits 8:12 - Transceiver Delay Compensation Offset"]
#[inline]
pub fn tdcoff(&self) -> TDCOFFR {
let bits = {
const MASK: u8 = 31;
const OFFSET: u8 = 8;
((self.bits >> OFFSET) & MASK as u32) as u8
};
TDCOFFR { bits }
}
#[doc = "Bit 14 - Transceiver Delay Compensation Fail"]
#[inline]
pub fn tdcfail(&self) -> TDCFAILR {
TDCFAILR::_from({
const MASK: bool = true;
const OFFSET: u8 = 14;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 15 - Transceiver Delay Compensation Enable"]
#[inline]
pub fn tdcen(&self) -> TDCENR {
TDCENR::_from({
const MASK: bool = true;
const OFFSET: u8 = 15;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bits 16:17 - Message Buffer Data Size for Region 0"]
#[inline]
pub fn mbdsr0(&self) -> MBDSR0R {
MBDSR0R::_from({
const MASK: u8 = 3;
const OFFSET: u8 = 16;
((self.bits >> OFFSET) & MASK as u32) as u8
})
}
#[doc = "Bit 31 - Bit Rate Switch Enable"]
#[inline]
pub fn fdrate(&self) -> FDRATER {
FDRATER::_from({
const MASK: bool = true;
const OFFSET: u8 = 31;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
}
impl W {
#[doc = r" Reset value of the register"]
#[inline]
pub fn reset_value() -> W {
W { bits: 2147483904 }
}
#[doc = r" Writes raw bits to the register"]
#[inline]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.bits = bits;
self
}
#[doc = "Bits 8:12 - Transceiver Delay Compensation Offset"]
#[inline]
pub fn tdcoff(&mut self) -> _TDCOFFW {
_TDCOFFW { w: self }
}
#[doc = "Bit 14 - Transceiver Delay Compensation Fail"]
#[inline]
pub fn tdcfail(&mut self) -> _TDCFAILW {
_TDCFAILW { w: self }
}
#[doc = "Bit 15 - Transceiver Delay Compensation Enable"]
#[inline]
pub fn tdcen(&mut self) -> _TDCENW {
_TDCENW { w: self }
}
#[doc = "Bits 16:17 - Message Buffer Data Size for Region 0"]
#[inline]
pub fn mbdsr0(&mut self) -> _MBDSR0W {
_MBDSR0W { w: self }
}
#[doc = "Bit 31 - Bit Rate Switch Enable"]
#[inline]
pub fn fdrate(&mut self) -> _FDRATEW {
_FDRATEW { w: self }
}
}

146
src/can2/flt_dlc/mod.rs
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@ -1,146 +0,0 @@
#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
#[doc = r" Value to write to the register"]
pub struct W {
bits: u32,
}
impl super::FLT_DLC {
#[doc = r" Modifies the contents of the register"]
#[inline]
pub fn modify<F>(&self, f: F)
where
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
{
let bits = self.register.get();
let r = R { bits: bits };
let mut w = W { bits: bits };
f(&r, &mut w);
self.register.set(w.bits);
}
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
#[doc = r" Writes to the register"]
#[inline]
pub fn write<F>(&self, f: F)
where
F: FnOnce(&mut W) -> &mut W,
{
let mut w = W::reset_value();
f(&mut w);
self.register.set(w.bits);
}
#[doc = r" Writes the reset value to the register"]
#[inline]
pub fn reset(&self) {
self.write(|w| w)
}
}
#[doc = r" Value of the field"]
pub struct FLT_DLC_HIR {
bits: u8,
}
impl FLT_DLC_HIR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct FLT_DLC_LOR {
bits: u8,
}
impl FLT_DLC_LOR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Proxy"]
pub struct _FLT_DLC_HIW<'a> {
w: &'a mut W,
}
impl<'a> _FLT_DLC_HIW<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 15;
const OFFSET: u8 = 0;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = r" Proxy"]
pub struct _FLT_DLC_LOW<'a> {
w: &'a mut W,
}
impl<'a> _FLT_DLC_LOW<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 15;
const OFFSET: u8 = 16;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 0:3 - Upper Limit for Length of Data Bytes Filter"]
#[inline]
pub fn flt_dlc_hi(&self) -> FLT_DLC_HIR {
let bits = {
const MASK: u8 = 15;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) as u8
};
FLT_DLC_HIR { bits }
}
#[doc = "Bits 16:19 - Lower Limit for Length of Data Bytes Filter"]
#[inline]
pub fn flt_dlc_lo(&self) -> FLT_DLC_LOR {
let bits = {
const MASK: u8 = 15;
const OFFSET: u8 = 16;
((self.bits >> OFFSET) & MASK as u32) as u8
};
FLT_DLC_LOR { bits }
}
}
impl W {
#[doc = r" Reset value of the register"]
#[inline]
pub fn reset_value() -> W {
W { bits: 8 }
}
#[doc = r" Writes raw bits to the register"]
#[inline]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.bits = bits;
self
}
#[doc = "Bits 0:3 - Upper Limit for Length of Data Bytes Filter"]
#[inline]
pub fn flt_dlc_hi(&mut self) -> _FLT_DLC_HIW {
_FLT_DLC_HIW { w: self }
}
#[doc = "Bits 16:19 - Lower Limit for Length of Data Bytes Filter"]
#[inline]
pub fn flt_dlc_lo(&mut self) -> _FLT_DLC_LOW {
_FLT_DLC_LOW { w: self }
}
}

335
src/can2/flt_id1/mod.rs
View File

@ -1,335 +0,0 @@
#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
#[doc = r" Value to write to the register"]
pub struct W {
bits: u32,
}
impl super::FLT_ID1 {
#[doc = r" Modifies the contents of the register"]
#[inline]
pub fn modify<F>(&self, f: F)
where
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
{
let bits = self.register.get();
let r = R { bits: bits };
let mut w = W { bits: bits };
f(&r, &mut w);
self.register.set(w.bits);
}
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
#[doc = r" Writes to the register"]
#[inline]
pub fn write<F>(&self, f: F)
where
F: FnOnce(&mut W) -> &mut W,
{
let mut w = W::reset_value();
f(&mut w);
self.register.set(w.bits);
}
#[doc = r" Writes the reset value to the register"]
#[inline]
pub fn reset(&self) {
self.write(|w| w)
}
}
#[doc = r" Value of the field"]
pub struct FLT_ID1R {
bits: u32,
}
impl FLT_ID1R {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
}
#[doc = "Possible values of the field `FLT_RTR`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum FLT_RTRR {
#[doc = "Reject remote frame (accept data frame)"] _0,
#[doc = "Accept remote frame"] _1,
}
impl FLT_RTRR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
FLT_RTRR::_0 => false,
FLT_RTRR::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> FLT_RTRR {
match value {
false => FLT_RTRR::_0,
true => FLT_RTRR::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == FLT_RTRR::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == FLT_RTRR::_1
}
}
#[doc = "Possible values of the field `FLT_IDE`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum FLT_IDER {
#[doc = "Accept standard frame format"] _0,
#[doc = "Accept extended frame format"] _1,
}
impl FLT_IDER {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
FLT_IDER::_0 => false,
FLT_IDER::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> FLT_IDER {
match value {
false => FLT_IDER::_0,
true => FLT_IDER::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == FLT_IDER::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == FLT_IDER::_1
}
}
#[doc = r" Proxy"]
pub struct _FLT_ID1W<'a> {
w: &'a mut W,
}
impl<'a> _FLT_ID1W<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u32) -> &'a mut W {
const MASK: u32 = 536870911;
const OFFSET: u8 = 0;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `FLT_RTR`"]
pub enum FLT_RTRW {
#[doc = "Reject remote frame (accept data frame)"] _0,
#[doc = "Accept remote frame"] _1,
}
impl FLT_RTRW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
FLT_RTRW::_0 => false,
FLT_RTRW::_1 => true,
}
}
}
#[doc = r" Proxy"]
pub struct _FLT_RTRW<'a> {
w: &'a mut W,
}
impl<'a> _FLT_RTRW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: FLT_RTRW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Reject remote frame (accept data frame)"]
#[inline]
pub fn _0(self) -> &'a mut W {
self.variant(FLT_RTRW::_0)
}
#[doc = "Accept remote frame"]
#[inline]
pub fn _1(self) -> &'a mut W {
self.variant(FLT_RTRW::_1)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 29;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `FLT_IDE`"]
pub enum FLT_IDEW {
#[doc = "Accept standard frame format"] _0,
#[doc = "Accept extended frame format"] _1,
}
impl FLT_IDEW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
FLT_IDEW::_0 => false,
FLT_IDEW::_1 => true,
}
}
}
#[doc = r" Proxy"]
pub struct _FLT_IDEW<'a> {
w: &'a mut W,
}
impl<'a> _FLT_IDEW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: FLT_IDEW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Accept standard frame format"]
#[inline]
pub fn _0(self) -> &'a mut W {
self.variant(FLT_IDEW::_0)
}
#[doc = "Accept extended frame format"]
#[inline]
pub fn _1(self) -> &'a mut W {
self.variant(FLT_IDEW::_1)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 30;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 0:28 - ID Filter 1 for Pretended Networking filtering"]
#[inline]
pub fn flt_id1(&self) -> FLT_ID1R {
let bits = {
const MASK: u32 = 536870911;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) as u32
};
FLT_ID1R { bits }
}
#[doc = "Bit 29 - Remote Transmission Request Filter"]
#[inline]
pub fn flt_rtr(&self) -> FLT_RTRR {
FLT_RTRR::_from({
const MASK: bool = true;
const OFFSET: u8 = 29;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 30 - ID Extended Filter"]
#[inline]
pub fn flt_ide(&self) -> FLT_IDER {
FLT_IDER::_from({
const MASK: bool = true;
const OFFSET: u8 = 30;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
}
impl W {
#[doc = r" Reset value of the register"]
#[inline]
pub fn reset_value() -> W {
W { bits: 0 }
}
#[doc = r" Writes raw bits to the register"]
#[inline]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.bits = bits;
self
}
#[doc = "Bits 0:28 - ID Filter 1 for Pretended Networking filtering"]
#[inline]
pub fn flt_id1(&mut self) -> _FLT_ID1W {
_FLT_ID1W { w: self }
}
#[doc = "Bit 29 - Remote Transmission Request Filter"]
#[inline]
pub fn flt_rtr(&mut self) -> _FLT_RTRW {
_FLT_RTRW { w: self }
}
#[doc = "Bit 30 - ID Extended Filter"]
#[inline]
pub fn flt_ide(&mut self) -> _FLT_IDEW {
_FLT_IDEW { w: self }
}
}

335
src/can2/flt_id2_idmask/mod.rs
View File

@ -1,335 +0,0 @@
#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
#[doc = r" Value to write to the register"]
pub struct W {
bits: u32,
}
impl super::FLT_ID2_IDMASK {
#[doc = r" Modifies the contents of the register"]
#[inline]
pub fn modify<F>(&self, f: F)
where
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
{
let bits = self.register.get();
let r = R { bits: bits };
let mut w = W { bits: bits };
f(&r, &mut w);
self.register.set(w.bits);
}
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
#[doc = r" Writes to the register"]
#[inline]
pub fn write<F>(&self, f: F)
where
F: FnOnce(&mut W) -> &mut W,
{
let mut w = W::reset_value();
f(&mut w);
self.register.set(w.bits);
}
#[doc = r" Writes the reset value to the register"]
#[inline]
pub fn reset(&self) {
self.write(|w| w)
}
}
#[doc = r" Value of the field"]
pub struct FLT_ID2_IDMASKR {
bits: u32,
}
impl FLT_ID2_IDMASKR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
}
#[doc = "Possible values of the field `RTR_MSK`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum RTR_MSKR {
#[doc = "The corresponding bit in the filter is \"don't care\""] _0,
#[doc = "The corresponding bit in the filter is checked"] _1,
}
impl RTR_MSKR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
RTR_MSKR::_0 => false,
RTR_MSKR::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> RTR_MSKR {
match value {
false => RTR_MSKR::_0,
true => RTR_MSKR::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == RTR_MSKR::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == RTR_MSKR::_1
}
}
#[doc = "Possible values of the field `IDE_MSK`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum IDE_MSKR {
#[doc = "The corresponding bit in the filter is \"don't care\""] _0,
#[doc = "The corresponding bit in the filter is checked"] _1,
}
impl IDE_MSKR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
IDE_MSKR::_0 => false,
IDE_MSKR::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> IDE_MSKR {
match value {
false => IDE_MSKR::_0,
true => IDE_MSKR::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == IDE_MSKR::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == IDE_MSKR::_1
}
}
#[doc = r" Proxy"]
pub struct _FLT_ID2_IDMASKW<'a> {
w: &'a mut W,
}
impl<'a> _FLT_ID2_IDMASKW<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u32) -> &'a mut W {
const MASK: u32 = 536870911;
const OFFSET: u8 = 0;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `RTR_MSK`"]
pub enum RTR_MSKW {
#[doc = "The corresponding bit in the filter is \"don't care\""] _0,
#[doc = "The corresponding bit in the filter is checked"] _1,
}
impl RTR_MSKW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
RTR_MSKW::_0 => false,
RTR_MSKW::_1 => true,
}
}
}
#[doc = r" Proxy"]
pub struct _RTR_MSKW<'a> {
w: &'a mut W,
}
impl<'a> _RTR_MSKW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: RTR_MSKW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "The corresponding bit in the filter is \"don't care\""]
#[inline]
pub fn _0(self) -> &'a mut W {
self.variant(RTR_MSKW::_0)
}
#[doc = "The corresponding bit in the filter is checked"]
#[inline]
pub fn _1(self) -> &'a mut W {
self.variant(RTR_MSKW::_1)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 29;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `IDE_MSK`"]
pub enum IDE_MSKW {
#[doc = "The corresponding bit in the filter is \"don't care\""] _0,
#[doc = "The corresponding bit in the filter is checked"] _1,
}
impl IDE_MSKW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
IDE_MSKW::_0 => false,
IDE_MSKW::_1 => true,
}
}
}
#[doc = r" Proxy"]
pub struct _IDE_MSKW<'a> {
w: &'a mut W,
}
impl<'a> _IDE_MSKW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: IDE_MSKW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "The corresponding bit in the filter is \"don't care\""]
#[inline]
pub fn _0(self) -> &'a mut W {
self.variant(IDE_MSKW::_0)
}
#[doc = "The corresponding bit in the filter is checked"]
#[inline]
pub fn _1(self) -> &'a mut W {
self.variant(IDE_MSKW::_1)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 30;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 0:28 - ID Filter 2 for Pretended Networking Filtering / ID Mask Bits for Pretended Networking ID Filtering"]
#[inline]
pub fn flt_id2_idmask(&self) -> FLT_ID2_IDMASKR {
let bits = {
const MASK: u32 = 536870911;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) as u32
};
FLT_ID2_IDMASKR { bits }
}
#[doc = "Bit 29 - Remote Transmission Request Mask Bit"]
#[inline]
pub fn rtr_msk(&self) -> RTR_MSKR {
RTR_MSKR::_from({
const MASK: bool = true;
const OFFSET: u8 = 29;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 30 - ID Extended Mask Bit"]
#[inline]
pub fn ide_msk(&self) -> IDE_MSKR {
IDE_MSKR::_from({
const MASK: bool = true;
const OFFSET: u8 = 30;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
}
impl W {
#[doc = r" Reset value of the register"]
#[inline]
pub fn reset_value() -> W {
W { bits: 0 }
}
#[doc = r" Writes raw bits to the register"]
#[inline]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.bits = bits;
self
}
#[doc = "Bits 0:28 - ID Filter 2 for Pretended Networking Filtering / ID Mask Bits for Pretended Networking ID Filtering"]
#[inline]
pub fn flt_id2_idmask(&mut self) -> _FLT_ID2_IDMASKW {
_FLT_ID2_IDMASKW { w: self }
}
#[doc = "Bit 29 - Remote Transmission Request Mask Bit"]
#[inline]
pub fn rtr_msk(&mut self) -> _RTR_MSKW {
_RTR_MSKW { w: self }
}
#[doc = "Bit 30 - ID Extended Mask Bit"]
#[inline]
pub fn ide_msk(&mut self) -> _IDE_MSKW {
_IDE_MSKW { w: self }
}
}

622
src/can2/iflag1/mod.rs
View File

@ -1,622 +0,0 @@
#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
#[doc = r" Value to write to the register"]
pub struct W {
bits: u32,
}
impl super::IFLAG1 {
#[doc = r" Modifies the contents of the register"]
#[inline]
pub fn modify<F>(&self, f: F)
where
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
{
let bits = self.register.get();
let r = R { bits: bits };
let mut w = W { bits: bits };
f(&r, &mut w);
self.register.set(w.bits);
}
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
#[doc = r" Writes to the register"]
#[inline]
pub fn write<F>(&self, f: F)
where
F: FnOnce(&mut W) -> &mut W,
{
let mut w = W::reset_value();
f(&mut w);
self.register.set(w.bits);
}
#[doc = r" Writes the reset value to the register"]
#[inline]
pub fn reset(&self) {
self.write(|w| w)
}
}
#[doc = "Possible values of the field `BUF0I`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum BUF0IR {
#[doc = "The corresponding buffer has no occurrence of successfully completed transmission or reception when MCR[RFEN]=0."]
_0,
#[doc = "The corresponding buffer has successfully completed transmission or reception when MCR[RFEN]=0."]
_1,
}
impl BUF0IR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
BUF0IR::_0 => false,
BUF0IR::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> BUF0IR {
match value {
false => BUF0IR::_0,
true => BUF0IR::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == BUF0IR::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == BUF0IR::_1
}
}
#[doc = r" Value of the field"]
pub struct BUF4TO1IR {
bits: u8,
}
impl BUF4TO1IR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = "Possible values of the field `BUF5I`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum BUF5IR {
#[doc = "No occurrence of MB5 completing transmission/reception when MCR[RFEN]=0, or of frame(s) available in the FIFO, when MCR[RFEN]=1"]
_0,
#[doc = "MB5 completed transmission/reception when MCR[RFEN]=0, or frame(s) available in the Rx FIFO when MCR[RFEN]=1. It generates a DMA request in case of MCR[RFEN] and MCR[DMA] are enabled."]
_1,
}
impl BUF5IR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
BUF5IR::_0 => false,
BUF5IR::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> BUF5IR {
match value {
false => BUF5IR::_0,
true => BUF5IR::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == BUF5IR::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == BUF5IR::_1
}
}
#[doc = "Possible values of the field `BUF6I`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum BUF6IR {
#[doc = "No occurrence of MB6 completing transmission/reception when MCR[RFEN]=0, or of Rx FIFO almost full when MCR[RFEN]=1"]
_0,
#[doc = "MB6 completed transmission/reception when MCR[RFEN]=0, or Rx FIFO almost full when MCR[RFEN]=1"]
_1,
}
impl BUF6IR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
BUF6IR::_0 => false,
BUF6IR::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> BUF6IR {
match value {
false => BUF6IR::_0,
true => BUF6IR::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == BUF6IR::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == BUF6IR::_1
}
}
#[doc = "Possible values of the field `BUF7I`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum BUF7IR {
#[doc = "No occurrence of MB7 completing transmission/reception when MCR[RFEN]=0, or of Rx FIFO overflow when MCR[RFEN]=1"]
_0,
#[doc = "MB7 completed transmission/reception when MCR[RFEN]=0, or Rx FIFO overflow when MCR[RFEN]=1"]
_1,
}
impl BUF7IR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
BUF7IR::_0 => false,
BUF7IR::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> BUF7IR {
match value {
false => BUF7IR::_0,
true => BUF7IR::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == BUF7IR::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == BUF7IR::_1
}
}
#[doc = r" Value of the field"]
pub struct BUF31TO8IR {
bits: u32,
}
impl BUF31TO8IR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
}
#[doc = "Values that can be written to the field `BUF0I`"]
pub enum BUF0IW {
#[doc = "The corresponding buffer has no occurrence of successfully completed transmission or reception when MCR[RFEN]=0."]
_0,
#[doc = "The corresponding buffer has successfully completed transmission or reception when MCR[RFEN]=0."]
_1,
}
impl BUF0IW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
BUF0IW::_0 => false,
BUF0IW::_1 => true,
}
}
}
#[doc = r" Proxy"]
pub struct _BUF0IW<'a> {
w: &'a mut W,
}
impl<'a> _BUF0IW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: BUF0IW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "The corresponding buffer has no occurrence of successfully completed transmission or reception when MCR[RFEN]=0."]
#[inline]
pub fn _0(self) -> &'a mut W {
self.variant(BUF0IW::_0)
}
#[doc = "The corresponding buffer has successfully completed transmission or reception when MCR[RFEN]=0."]
#[inline]
pub fn _1(self) -> &'a mut W {
self.variant(BUF0IW::_1)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 0;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = r" Proxy"]
pub struct _BUF4TO1IW<'a> {
w: &'a mut W,
}
impl<'a> _BUF4TO1IW<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 15;
const OFFSET: u8 = 1;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `BUF5I`"]
pub enum BUF5IW {
#[doc = "No occurrence of MB5 completing transmission/reception when MCR[RFEN]=0, or of frame(s) available in the FIFO, when MCR[RFEN]=1"]
_0,
#[doc = "MB5 completed transmission/reception when MCR[RFEN]=0, or frame(s) available in the Rx FIFO when MCR[RFEN]=1. It generates a DMA request in case of MCR[RFEN] and MCR[DMA] are enabled."]
_1,
}
impl BUF5IW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
BUF5IW::_0 => false,
BUF5IW::_1 => true,
}
}
}
#[doc = r" Proxy"]
pub struct _BUF5IW<'a> {
w: &'a mut W,
}
impl<'a> _BUF5IW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: BUF5IW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "No occurrence of MB5 completing transmission/reception when MCR[RFEN]=0, or of frame(s) available in the FIFO, when MCR[RFEN]=1"]
#[inline]
pub fn _0(self) -> &'a mut W {
self.variant(BUF5IW::_0)
}
#[doc = "MB5 completed transmission/reception when MCR[RFEN]=0, or frame(s) available in the Rx FIFO when MCR[RFEN]=1. It generates a DMA request in case of MCR[RFEN] and MCR[DMA] are enabled."]
#[inline]
pub fn _1(self) -> &'a mut W {
self.variant(BUF5IW::_1)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 5;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `BUF6I`"]
pub enum BUF6IW {
#[doc = "No occurrence of MB6 completing transmission/reception when MCR[RFEN]=0, or of Rx FIFO almost full when MCR[RFEN]=1"]
_0,
#[doc = "MB6 completed transmission/reception when MCR[RFEN]=0, or Rx FIFO almost full when MCR[RFEN]=1"]
_1,
}
impl BUF6IW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
BUF6IW::_0 => false,
BUF6IW::_1 => true,
}
}
}
#[doc = r" Proxy"]
pub struct _BUF6IW<'a> {
w: &'a mut W,
}
impl<'a> _BUF6IW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: BUF6IW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "No occurrence of MB6 completing transmission/reception when MCR[RFEN]=0, or of Rx FIFO almost full when MCR[RFEN]=1"]
#[inline]
pub fn _0(self) -> &'a mut W {
self.variant(BUF6IW::_0)
}
#[doc = "MB6 completed transmission/reception when MCR[RFEN]=0, or Rx FIFO almost full when MCR[RFEN]=1"]
#[inline]
pub fn _1(self) -> &'a mut W {
self.variant(BUF6IW::_1)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 6;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `BUF7I`"]
pub enum BUF7IW {
#[doc = "No occurrence of MB7 completing transmission/reception when MCR[RFEN]=0, or of Rx FIFO overflow when MCR[RFEN]=1"]
_0,
#[doc = "MB7 completed transmission/reception when MCR[RFEN]=0, or Rx FIFO overflow when MCR[RFEN]=1"]
_1,
}
impl BUF7IW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
BUF7IW::_0 => false,
BUF7IW::_1 => true,
}
}
}
#[doc = r" Proxy"]
pub struct _BUF7IW<'a> {
w: &'a mut W,
}
impl<'a> _BUF7IW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: BUF7IW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "No occurrence of MB7 completing transmission/reception when MCR[RFEN]=0, or of Rx FIFO overflow when MCR[RFEN]=1"]
#[inline]
pub fn _0(self) -> &'a mut W {
self.variant(BUF7IW::_0)
}
#[doc = "MB7 completed transmission/reception when MCR[RFEN]=0, or Rx FIFO overflow when MCR[RFEN]=1"]
#[inline]
pub fn _1(self) -> &'a mut W {
self.variant(BUF7IW::_1)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 7;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = r" Proxy"]
pub struct _BUF31TO8IW<'a> {
w: &'a mut W,
}
impl<'a> _BUF31TO8IW<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u32) -> &'a mut W {
const MASK: u32 = 16777215;
const OFFSET: u8 = 8;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bit 0 - Buffer MB0 Interrupt Or Clear FIFO bit"]
#[inline]
pub fn buf0i(&self) -> BUF0IR {
BUF0IR::_from({
const MASK: bool = true;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bits 1:4 - Buffer MB i Interrupt Or \"reserved\""]
#[inline]
pub fn buf4to1i(&self) -> BUF4TO1IR {
let bits = {
const MASK: u8 = 15;
const OFFSET: u8 = 1;
((self.bits >> OFFSET) & MASK as u32) as u8
};
BUF4TO1IR { bits }
}
#[doc = "Bit 5 - Buffer MB5 Interrupt Or \"Frames available in Rx FIFO\""]
#[inline]
pub fn buf5i(&self) -> BUF5IR {
BUF5IR::_from({
const MASK: bool = true;
const OFFSET: u8 = 5;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 6 - Buffer MB6 Interrupt Or \"Rx FIFO Warning\""]
#[inline]
pub fn buf6i(&self) -> BUF6IR {
BUF6IR::_from({
const MASK: bool = true;
const OFFSET: u8 = 6;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 7 - Buffer MB7 Interrupt Or \"Rx FIFO Overflow\""]
#[inline]
pub fn buf7i(&self) -> BUF7IR {
BUF7IR::_from({
const MASK: bool = true;
const OFFSET: u8 = 7;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bits 8:31 - Buffer MBi Interrupt"]
#[inline]
pub fn buf31to8i(&self) -> BUF31TO8IR {
let bits = {
const MASK: u32 = 16777215;
const OFFSET: u8 = 8;
((self.bits >> OFFSET) & MASK as u32) as u32
};
BUF31TO8IR { bits }
}
}
impl W {
#[doc = r" Reset value of the register"]
#[inline]
pub fn reset_value() -> W {
W { bits: 0 }
}
#[doc = r" Writes raw bits to the register"]
#[inline]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.bits = bits;
self
}
#[doc = "Bit 0 - Buffer MB0 Interrupt Or Clear FIFO bit"]
#[inline]
pub fn buf0i(&mut self) -> _BUF0IW {
_BUF0IW { w: self }
}
#[doc = "Bits 1:4 - Buffer MB i Interrupt Or \"reserved\""]
#[inline]
pub fn buf4to1i(&mut self) -> _BUF4TO1IW {
_BUF4TO1IW { w: self }
}
#[doc = "Bit 5 - Buffer MB5 Interrupt Or \"Frames available in Rx FIFO\""]
#[inline]
pub fn buf5i(&mut self) -> _BUF5IW {
_BUF5IW { w: self }
}
#[doc = "Bit 6 - Buffer MB6 Interrupt Or \"Rx FIFO Warning\""]
#[inline]
pub fn buf6i(&mut self) -> _BUF6IW {
_BUF6IW { w: self }
}
#[doc = "Bit 7 - Buffer MB7 Interrupt Or \"Rx FIFO Overflow\""]
#[inline]
pub fn buf7i(&mut self) -> _BUF7IW {
_BUF7IW { w: self }
}
#[doc = "Bits 8:31 - Buffer MBi Interrupt"]
#[inline]
pub fn buf31to8i(&mut self) -> _BUF31TO8IW {
_BUF31TO8IW { w: self }
}
}

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src/can2/imask1/mod.rs
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@ -1,105 +0,0 @@
#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
#[doc = r" Value to write to the register"]
pub struct W {
bits: u32,
}
impl super::IMASK1 {
#[doc = r" Modifies the contents of the register"]
#[inline]
pub fn modify<F>(&self, f: F)
where
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
{
let bits = self.register.get();
let r = R { bits: bits };
let mut w = W { bits: bits };
f(&r, &mut w);
self.register.set(w.bits);
}
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
#[doc = r" Writes to the register"]
#[inline]
pub fn write<F>(&self, f: F)
where
F: FnOnce(&mut W) -> &mut W,
{
let mut w = W::reset_value();
f(&mut w);
self.register.set(w.bits);
}
#[doc = r" Writes the reset value to the register"]
#[inline]
pub fn reset(&self) {
self.write(|w| w)
}
}
#[doc = r" Value of the field"]
pub struct BUF31TO0MR {
bits: u32,
}
impl BUF31TO0MR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
}
#[doc = r" Proxy"]
pub struct _BUF31TO0MW<'a> {
w: &'a mut W,
}
impl<'a> _BUF31TO0MW<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u32) -> &'a mut W {
const MASK: u32 = 4294967295;
const OFFSET: u8 = 0;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 0:31 - Buffer MB i Mask"]
#[inline]
pub fn buf31to0m(&self) -> BUF31TO0MR {
let bits = {
const MASK: u32 = 4294967295;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) as u32
};
BUF31TO0MR { bits }
}
}
impl W {
#[doc = r" Reset value of the register"]
#[inline]
pub fn reset_value() -> W {
W { bits: 0 }
}
#[doc = r" Writes raw bits to the register"]
#[inline]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.bits = bits;
self
}
#[doc = "Bits 0:31 - Buffer MB i Mask"]
#[inline]
pub fn buf31to0m(&mut self) -> _BUF31TO0MW {
_BUF31TO0MW { w: self }
}
}

1956
src/can2/mcr/mod.rs
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src/can2/mod.rs
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@ -1,451 +0,0 @@
use vcell::VolatileCell;
#[doc = r" Register block"]
#[repr(C)]
pub struct RegisterBlock {
#[doc = "0x00 - Module Configuration Register"] pub mcr: MCR,
#[doc = "0x04 - Control 1 register"] pub ctrl1: CTRL1,
#[doc = "0x08 - Free Running Timer"] pub timer: TIMER,
_reserved0: [u8; 4usize],
#[doc = "0x10 - Rx Mailboxes Global Mask Register"] pub rxmgmask: RXMGMASK,
#[doc = "0x14 - Rx 14 Mask register"] pub rx14mask: RX14MASK,
#[doc = "0x18 - Rx 15 Mask register"] pub rx15mask: RX15MASK,
#[doc = "0x1c - Error Counter"] pub ecr: ECR,
#[doc = "0x20 - Error and Status 1 register"] pub esr1: ESR1,
_reserved1: [u8; 4usize],
#[doc = "0x28 - Interrupt Masks 1 register"] pub imask1: IMASK1,
_reserved2: [u8; 4usize],
#[doc = "0x30 - Interrupt Flags 1 register"] pub iflag1: IFLAG1,
#[doc = "0x34 - Control 2 register"] pub ctrl2: CTRL2,
#[doc = "0x38 - Error and Status 2 register"] pub esr2: ESR2,
_reserved3: [u8; 8usize],
#[doc = "0x44 - CRC Register"] pub crcr: CRCR,
#[doc = "0x48 - Rx FIFO Global Mask register"] pub rxfgmask: RXFGMASK,
#[doc = "0x4c - Rx FIFO Information Register"] pub rxfir: RXFIR,
#[doc = "0x50 - CAN Bit Timing Register"] pub cbt: CBT,
_reserved4: [u8; 44usize],
#[doc = "0x80 - Embedded RAM"] pub embedded_ram: [EMBEDDEDRAM; 128],
_reserved5: [u8; 1536usize],
#[doc = "0x880 - Rx Individual Mask Registers"] pub rximr0: RXIMR0,
#[doc = "0x884 - Rx Individual Mask Registers"] pub rximr1: RXIMR1,
#[doc = "0x888 - Rx Individual Mask Registers"] pub rximr2: RXIMR2,
#[doc = "0x88c - Rx Individual Mask Registers"] pub rximr3: RXIMR3,
#[doc = "0x890 - Rx Individual Mask Registers"] pub rximr4: RXIMR4,
#[doc = "0x894 - Rx Individual Mask Registers"] pub rximr5: RXIMR5,
#[doc = "0x898 - Rx Individual Mask Registers"] pub rximr6: RXIMR6,
#[doc = "0x89c - Rx Individual Mask Registers"] pub rximr7: RXIMR7,
#[doc = "0x8a0 - Rx Individual Mask Registers"] pub rximr8: RXIMR8,
#[doc = "0x8a4 - Rx Individual Mask Registers"] pub rximr9: RXIMR9,
#[doc = "0x8a8 - Rx Individual Mask Registers"] pub rximr10: RXIMR10,
#[doc = "0x8ac - Rx Individual Mask Registers"] pub rximr11: RXIMR11,
#[doc = "0x8b0 - Rx Individual Mask Registers"] pub rximr12: RXIMR12,
#[doc = "0x8b4 - Rx Individual Mask Registers"] pub rximr13: RXIMR13,
#[doc = "0x8b8 - Rx Individual Mask Registers"] pub rximr14: RXIMR14,
#[doc = "0x8bc - Rx Individual Mask Registers"] pub rximr15: RXIMR15,
_reserved6: [u8; 576usize],
#[doc = "0xb00 - Pretended Networking Control 1 Register"] pub ctrl1_pn: CTRL1_PN,
#[doc = "0xb04 - Pretended Networking Control 2 Register"] pub ctrl2_pn: CTRL2_PN,
#[doc = "0xb08 - Pretended Networking Wake Up Match Register"] pub wu_mtc: WU_MTC,
#[doc = "0xb0c - Pretended Networking ID Filter 1 Register"] pub flt_id1: FLT_ID1,
#[doc = "0xb10 - Pretended Networking DLC Filter Register"] pub flt_dlc: FLT_DLC,
#[doc = "0xb14 - Pretended Networking Payload Low Filter 1 Register"] pub pl1_lo: PL1_LO,
#[doc = "0xb18 - Pretended Networking Payload High Filter 1 Register"] pub pl1_hi: PL1_HI,
#[doc = "0xb1c - Pretended Networking ID Filter 2 Register / ID Mask Register"]
pub flt_id2_idmask: FLT_ID2_IDMASK,
#[doc = "0xb20 - Pretended Networking Payload Low Filter 2 Register / Payload Low Mask Register"]
pub pl2_plmask_lo: PL2_PLMASK_LO,
#[doc = "0xb24 - Pretended Networking Payload High Filter 2 low order bits / Payload High Mask Register"]
pub pl2_plmask_hi: PL2_PLMASK_HI,
_reserved7: [u8; 24usize],
#[doc = "0xb40 - Wake Up Message Buffer Register for C/S"] pub wmb0_cs: WMB0_CS,
#[doc = "0xb44 - Wake Up Message Buffer Register for ID"] pub wmb0_id: WMB0_ID,
#[doc = "0xb48 - Wake Up Message Buffer Register for Data 0-3"] pub wmb0_d03: WMB0_D03,
#[doc = "0xb4c - Wake Up Message Buffer Register Data 4-7"] pub wmb0_d47: WMB0_D47,
#[doc = "0xb50 - Wake Up Message Buffer Register for C/S"] pub wmb1_cs: WMB1_CS,
#[doc = "0xb54 - Wake Up Message Buffer Register for ID"] pub wmb1_id: WMB1_ID,
#[doc = "0xb58 - Wake Up Message Buffer Register for Data 0-3"] pub wmb1_d03: WMB1_D03,
#[doc = "0xb5c - Wake Up Message Buffer Register Data 4-7"] pub wmb1_d47: WMB1_D47,
#[doc = "0xb60 - Wake Up Message Buffer Register for C/S"] pub wmb2_cs: WMB2_CS,
#[doc = "0xb64 - Wake Up Message Buffer Register for ID"] pub wmb2_id: WMB2_ID,
#[doc = "0xb68 - Wake Up Message Buffer Register for Data 0-3"] pub wmb2_d03: WMB2_D03,
#[doc = "0xb6c - Wake Up Message Buffer Register Data 4-7"] pub wmb2_d47: WMB2_D47,
#[doc = "0xb70 - Wake Up Message Buffer Register for C/S"] pub wmb3_cs: WMB3_CS,
#[doc = "0xb74 - Wake Up Message Buffer Register for ID"] pub wmb3_id: WMB3_ID,
#[doc = "0xb78 - Wake Up Message Buffer Register for Data 0-3"] pub wmb3_d03: WMB3_D03,
#[doc = "0xb7c - Wake Up Message Buffer Register Data 4-7"] pub wmb3_d47: WMB3_D47,
_reserved8: [u8; 128usize],
#[doc = "0xc00 - CAN FD Control Register"] pub fdctrl: FDCTRL,
#[doc = "0xc04 - CAN FD Bit Timing Register"] pub fdcbt: FDCBT,
#[doc = "0xc08 - CAN FD CRC Register"] pub fdcrc: FDCRC,
}
#[doc = "Module Configuration Register"]
pub struct MCR {
register: VolatileCell<u32>,
}
#[doc = "Module Configuration Register"]
pub mod mcr;
#[doc = "Control 1 register"]
pub struct CTRL1 {
register: VolatileCell<u32>,
}
#[doc = "Control 1 register"]
pub mod ctrl1;
#[doc = "Free Running Timer"]
pub struct TIMER {
register: VolatileCell<u32>,
}
#[doc = "Free Running Timer"]
pub mod timer;
#[doc = "Rx Mailboxes Global Mask Register"]
pub struct RXMGMASK {
register: VolatileCell<u32>,
}
#[doc = "Rx Mailboxes Global Mask Register"]
pub mod rxmgmask;
#[doc = "Rx 14 Mask register"]
pub struct RX14MASK {
register: VolatileCell<u32>,
}
#[doc = "Rx 14 Mask register"]
pub mod rx14mask;
#[doc = "Rx 15 Mask register"]
pub struct RX15MASK {
register: VolatileCell<u32>,
}
#[doc = "Rx 15 Mask register"]
pub mod rx15mask;
#[doc = "Error Counter"]
pub struct ECR {
register: VolatileCell<u32>,
}
#[doc = "Error Counter"]
pub mod ecr;
#[doc = "Error and Status 1 register"]
pub struct ESR1 {
register: VolatileCell<u32>,
}
#[doc = "Error and Status 1 register"]
pub mod esr1;
#[doc = "Interrupt Masks 1 register"]
pub struct IMASK1 {
register: VolatileCell<u32>,
}
#[doc = "Interrupt Masks 1 register"]
pub mod imask1;
#[doc = "Interrupt Flags 1 register"]
pub struct IFLAG1 {
register: VolatileCell<u32>,
}
#[doc = "Interrupt Flags 1 register"]
pub mod iflag1;
#[doc = "Control 2 register"]
pub struct CTRL2 {
register: VolatileCell<u32>,
}
#[doc = "Control 2 register"]
pub mod ctrl2;
#[doc = "Error and Status 2 register"]
pub struct ESR2 {
register: VolatileCell<u32>,
}
#[doc = "Error and Status 2 register"]
pub mod esr2;
#[doc = "CRC Register"]
pub struct CRCR {
register: VolatileCell<u32>,
}
#[doc = "CRC Register"]
pub mod crcr;
#[doc = "Rx FIFO Global Mask register"]
pub struct RXFGMASK {
register: VolatileCell<u32>,
}
#[doc = "Rx FIFO Global Mask register"]
pub mod rxfgmask;
#[doc = "Rx FIFO Information Register"]
pub struct RXFIR {
register: VolatileCell<u32>,
}
#[doc = "Rx FIFO Information Register"]
pub mod rxfir;
#[doc = "CAN Bit Timing Register"]
pub struct CBT {
register: VolatileCell<u32>,
}
#[doc = "CAN Bit Timing Register"]
pub mod cbt;
#[doc = "Embedded RAM"]
pub struct EMBEDDEDRAM {
register: VolatileCell<u32>,
}
#[doc = "Embedded RAM"]
pub mod embedded_ram;
#[doc = "Rx Individual Mask Registers"]
pub struct RXIMR0 {
register: VolatileCell<u32>,
}
#[doc = "Rx Individual Mask Registers"]
pub mod rximr0;
#[doc = "Rx Individual Mask Registers"]
pub struct RXIMR1 {
register: VolatileCell<u32>,
}
#[doc = "Rx Individual Mask Registers"]
pub mod rximr1;
#[doc = "Rx Individual Mask Registers"]
pub struct RXIMR2 {
register: VolatileCell<u32>,
}
#[doc = "Rx Individual Mask Registers"]
pub mod rximr2;
#[doc = "Rx Individual Mask Registers"]
pub struct RXIMR3 {
register: VolatileCell<u32>,
}
#[doc = "Rx Individual Mask Registers"]
pub mod rximr3;
#[doc = "Rx Individual Mask Registers"]
pub struct RXIMR4 {
register: VolatileCell<u32>,
}
#[doc = "Rx Individual Mask Registers"]
pub mod rximr4;
#[doc = "Rx Individual Mask Registers"]
pub struct RXIMR5 {
register: VolatileCell<u32>,
}
#[doc = "Rx Individual Mask Registers"]
pub mod rximr5;
#[doc = "Rx Individual Mask Registers"]
pub struct RXIMR6 {
register: VolatileCell<u32>,
}
#[doc = "Rx Individual Mask Registers"]
pub mod rximr6;
#[doc = "Rx Individual Mask Registers"]
pub struct RXIMR7 {
register: VolatileCell<u32>,
}
#[doc = "Rx Individual Mask Registers"]
pub mod rximr7;
#[doc = "Rx Individual Mask Registers"]
pub struct RXIMR8 {
register: VolatileCell<u32>,
}
#[doc = "Rx Individual Mask Registers"]
pub mod rximr8;
#[doc = "Rx Individual Mask Registers"]
pub struct RXIMR9 {
register: VolatileCell<u32>,
}
#[doc = "Rx Individual Mask Registers"]
pub mod rximr9;
#[doc = "Rx Individual Mask Registers"]
pub struct RXIMR10 {
register: VolatileCell<u32>,
}
#[doc = "Rx Individual Mask Registers"]
pub mod rximr10;
#[doc = "Rx Individual Mask Registers"]
pub struct RXIMR11 {
register: VolatileCell<u32>,
}
#[doc = "Rx Individual Mask Registers"]
pub mod rximr11;
#[doc = "Rx Individual Mask Registers"]
pub struct RXIMR12 {
register: VolatileCell<u32>,
}
#[doc = "Rx Individual Mask Registers"]
pub mod rximr12;
#[doc = "Rx Individual Mask Registers"]
pub struct RXIMR13 {
register: VolatileCell<u32>,
}
#[doc = "Rx Individual Mask Registers"]
pub mod rximr13;
#[doc = "Rx Individual Mask Registers"]
pub struct RXIMR14 {
register: VolatileCell<u32>,
}
#[doc = "Rx Individual Mask Registers"]
pub mod rximr14;
#[doc = "Rx Individual Mask Registers"]
pub struct RXIMR15 {
register: VolatileCell<u32>,
}
#[doc = "Rx Individual Mask Registers"]
pub mod rximr15;
#[doc = "Pretended Networking Control 1 Register"]
pub struct CTRL1_PN {
register: VolatileCell<u32>,
}
#[doc = "Pretended Networking Control 1 Register"]
pub mod ctrl1_pn;
#[doc = "Pretended Networking Control 2 Register"]
pub struct CTRL2_PN {
register: VolatileCell<u32>,
}
#[doc = "Pretended Networking Control 2 Register"]
pub mod ctrl2_pn;
#[doc = "Pretended Networking Wake Up Match Register"]
pub struct WU_MTC {
register: VolatileCell<u32>,
}
#[doc = "Pretended Networking Wake Up Match Register"]
pub mod wu_mtc;
#[doc = "Pretended Networking ID Filter 1 Register"]
pub struct FLT_ID1 {
register: VolatileCell<u32>,
}
#[doc = "Pretended Networking ID Filter 1 Register"]
pub mod flt_id1;
#[doc = "Pretended Networking DLC Filter Register"]
pub struct FLT_DLC {
register: VolatileCell<u32>,
}
#[doc = "Pretended Networking DLC Filter Register"]
pub mod flt_dlc;
#[doc = "Pretended Networking Payload Low Filter 1 Register"]
pub struct PL1_LO {
register: VolatileCell<u32>,
}
#[doc = "Pretended Networking Payload Low Filter 1 Register"]
pub mod pl1_lo;
#[doc = "Pretended Networking Payload High Filter 1 Register"]
pub struct PL1_HI {
register: VolatileCell<u32>,
}
#[doc = "Pretended Networking Payload High Filter 1 Register"]
pub mod pl1_hi;
#[doc = "Pretended Networking ID Filter 2 Register / ID Mask Register"]
pub struct FLT_ID2_IDMASK {
register: VolatileCell<u32>,
}
#[doc = "Pretended Networking ID Filter 2 Register / ID Mask Register"]
pub mod flt_id2_idmask;
#[doc = "Pretended Networking Payload Low Filter 2 Register / Payload Low Mask Register"]
pub struct PL2_PLMASK_LO {
register: VolatileCell<u32>,
}
#[doc = "Pretended Networking Payload Low Filter 2 Register / Payload Low Mask Register"]
pub mod pl2_plmask_lo;
#[doc = "Pretended Networking Payload High Filter 2 low order bits / Payload High Mask Register"]
pub struct PL2_PLMASK_HI {
register: VolatileCell<u32>,
}
#[doc = "Pretended Networking Payload High Filter 2 low order bits / Payload High Mask Register"]
pub mod pl2_plmask_hi;
#[doc = "Wake Up Message Buffer Register for C/S"]
pub struct WMB0_CS {
register: VolatileCell<u32>,
}
#[doc = "Wake Up Message Buffer Register for C/S"]
pub mod wmb0_cs;
#[doc = "Wake Up Message Buffer Register for ID"]
pub struct WMB0_ID {
register: VolatileCell<u32>,
}
#[doc = "Wake Up Message Buffer Register for ID"]
pub mod wmb0_id;
#[doc = "Wake Up Message Buffer Register for Data 0-3"]
pub struct WMB0_D03 {
register: VolatileCell<u32>,
}
#[doc = "Wake Up Message Buffer Register for Data 0-3"]
pub mod wmb0_d03;
#[doc = "Wake Up Message Buffer Register Data 4-7"]
pub struct WMB0_D47 {
register: VolatileCell<u32>,
}
#[doc = "Wake Up Message Buffer Register Data 4-7"]
pub mod wmb0_d47;
#[doc = "Wake Up Message Buffer Register for C/S"]
pub struct WMB1_CS {
register: VolatileCell<u32>,
}
#[doc = "Wake Up Message Buffer Register for C/S"]
pub mod wmb1_cs;
#[doc = "Wake Up Message Buffer Register for ID"]
pub struct WMB1_ID {
register: VolatileCell<u32>,
}
#[doc = "Wake Up Message Buffer Register for ID"]
pub mod wmb1_id;
#[doc = "Wake Up Message Buffer Register for Data 0-3"]
pub struct WMB1_D03 {
register: VolatileCell<u32>,
}
#[doc = "Wake Up Message Buffer Register for Data 0-3"]
pub mod wmb1_d03;
#[doc = "Wake Up Message Buffer Register Data 4-7"]
pub struct WMB1_D47 {
register: VolatileCell<u32>,
}
#[doc = "Wake Up Message Buffer Register Data 4-7"]
pub mod wmb1_d47;
#[doc = "Wake Up Message Buffer Register for C/S"]
pub struct WMB2_CS {
register: VolatileCell<u32>,
}
#[doc = "Wake Up Message Buffer Register for C/S"]
pub mod wmb2_cs;
#[doc = "Wake Up Message Buffer Register for ID"]
pub struct WMB2_ID {
register: VolatileCell<u32>,
}
#[doc = "Wake Up Message Buffer Register for ID"]
pub mod wmb2_id;
#[doc = "Wake Up Message Buffer Register for Data 0-3"]
pub struct WMB2_D03 {
register: VolatileCell<u32>,
}
#[doc = "Wake Up Message Buffer Register for Data 0-3"]
pub mod wmb2_d03;
#[doc = "Wake Up Message Buffer Register Data 4-7"]
pub struct WMB2_D47 {
register: VolatileCell<u32>,
}
#[doc = "Wake Up Message Buffer Register Data 4-7"]
pub mod wmb2_d47;
#[doc = "Wake Up Message Buffer Register for C/S"]
pub struct WMB3_CS {
register: VolatileCell<u32>,
}
#[doc = "Wake Up Message Buffer Register for C/S"]
pub mod wmb3_cs;
#[doc = "Wake Up Message Buffer Register for ID"]
pub struct WMB3_ID {
register: VolatileCell<u32>,
}
#[doc = "Wake Up Message Buffer Register for ID"]
pub mod wmb3_id;
#[doc = "Wake Up Message Buffer Register for Data 0-3"]
pub struct WMB3_D03 {
register: VolatileCell<u32>,
}
#[doc = "Wake Up Message Buffer Register for Data 0-3"]
pub mod wmb3_d03;
#[doc = "Wake Up Message Buffer Register Data 4-7"]
pub struct WMB3_D47 {
register: VolatileCell<u32>,
}
#[doc = "Wake Up Message Buffer Register Data 4-7"]
pub mod wmb3_d47;
#[doc = "CAN FD Control Register"]
pub struct FDCTRL {
register: VolatileCell<u32>,
}
#[doc = "CAN FD Control Register"]
pub mod fdctrl;
#[doc = "CAN FD Bit Timing Register"]
pub struct FDCBT {
register: VolatileCell<u32>,
}
#[doc = "CAN FD Bit Timing Register"]
pub mod fdcbt;
#[doc = "CAN FD CRC Register"]
pub struct FDCRC {
register: VolatileCell<u32>,
}
#[doc = "CAN FD CRC Register"]
pub mod fdcrc;

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src/can2/pl1_hi/mod.rs
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@ -1,228 +0,0 @@
#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
#[doc = r" Value to write to the register"]
pub struct W {
bits: u32,
}
impl super::PL1_HI {
#[doc = r" Modifies the contents of the register"]
#[inline]
pub fn modify<F>(&self, f: F)
where
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
{
let bits = self.register.get();
let r = R { bits: bits };
let mut w = W { bits: bits };
f(&r, &mut w);
self.register.set(w.bits);
}
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
#[doc = r" Writes to the register"]
#[inline]
pub fn write<F>(&self, f: F)
where
F: FnOnce(&mut W) -> &mut W,
{
let mut w = W::reset_value();
f(&mut w);
self.register.set(w.bits);
}
#[doc = r" Writes the reset value to the register"]
#[inline]
pub fn reset(&self) {
self.write(|w| w)
}
}
#[doc = r" Value of the field"]
pub struct DATA_BYTE_7R {
bits: u8,
}
impl DATA_BYTE_7R {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct DATA_BYTE_6R {
bits: u8,
}
impl DATA_BYTE_6R {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct DATA_BYTE_5R {
bits: u8,
}
impl DATA_BYTE_5R {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct DATA_BYTE_4R {
bits: u8,
}
impl DATA_BYTE_4R {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Proxy"]
pub struct _DATA_BYTE_7W<'a> {
w: &'a mut W,
}
impl<'a> _DATA_BYTE_7W<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 255;
const OFFSET: u8 = 0;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = r" Proxy"]
pub struct _DATA_BYTE_6W<'a> {
w: &'a mut W,
}
impl<'a> _DATA_BYTE_6W<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 255;
const OFFSET: u8 = 8;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = r" Proxy"]
pub struct _DATA_BYTE_5W<'a> {
w: &'a mut W,
}
impl<'a> _DATA_BYTE_5W<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 255;
const OFFSET: u8 = 16;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = r" Proxy"]
pub struct _DATA_BYTE_4W<'a> {
w: &'a mut W,
}
impl<'a> _DATA_BYTE_4W<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 255;
const OFFSET: u8 = 24;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 0:7 - Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 7."]
#[inline]
pub fn data_byte_7(&self) -> DATA_BYTE_7R {
let bits = {
const MASK: u8 = 255;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) as u8
};
DATA_BYTE_7R { bits }
}
#[doc = "Bits 8:15 - Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 6."]
#[inline]
pub fn data_byte_6(&self) -> DATA_BYTE_6R {
let bits = {
const MASK: u8 = 255;
const OFFSET: u8 = 8;
((self.bits >> OFFSET) & MASK as u32) as u8
};
DATA_BYTE_6R { bits }
}
#[doc = "Bits 16:23 - Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 5."]
#[inline]
pub fn data_byte_5(&self) -> DATA_BYTE_5R {
let bits = {
const MASK: u8 = 255;
const OFFSET: u8 = 16;
((self.bits >> OFFSET) & MASK as u32) as u8
};
DATA_BYTE_5R { bits }
}
#[doc = "Bits 24:31 - Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 4."]
#[inline]
pub fn data_byte_4(&self) -> DATA_BYTE_4R {
let bits = {
const MASK: u8 = 255;
const OFFSET: u8 = 24;
((self.bits >> OFFSET) & MASK as u32) as u8
};
DATA_BYTE_4R { bits }
}
}
impl W {
#[doc = r" Reset value of the register"]
#[inline]
pub fn reset_value() -> W {
W { bits: 0 }
}
#[doc = r" Writes raw bits to the register"]
#[inline]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.bits = bits;
self
}
#[doc = "Bits 0:7 - Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 7."]
#[inline]
pub fn data_byte_7(&mut self) -> _DATA_BYTE_7W {
_DATA_BYTE_7W { w: self }
}
#[doc = "Bits 8:15 - Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 6."]
#[inline]
pub fn data_byte_6(&mut self) -> _DATA_BYTE_6W {
_DATA_BYTE_6W { w: self }
}
#[doc = "Bits 16:23 - Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 5."]
#[inline]
pub fn data_byte_5(&mut self) -> _DATA_BYTE_5W {
_DATA_BYTE_5W { w: self }
}
#[doc = "Bits 24:31 - Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 4."]
#[inline]
pub fn data_byte_4(&mut self) -> _DATA_BYTE_4W {
_DATA_BYTE_4W { w: self }
}
}

228
src/can2/pl1_lo/mod.rs
View File

@ -1,228 +0,0 @@
#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
#[doc = r" Value to write to the register"]
pub struct W {
bits: u32,
}
impl super::PL1_LO {
#[doc = r" Modifies the contents of the register"]
#[inline]
pub fn modify<F>(&self, f: F)
where
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
{
let bits = self.register.get();
let r = R { bits: bits };
let mut w = W { bits: bits };
f(&r, &mut w);
self.register.set(w.bits);
}
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
#[doc = r" Writes to the register"]
#[inline]
pub fn write<F>(&self, f: F)
where
F: FnOnce(&mut W) -> &mut W,
{
let mut w = W::reset_value();
f(&mut w);
self.register.set(w.bits);
}
#[doc = r" Writes the reset value to the register"]
#[inline]
pub fn reset(&self) {
self.write(|w| w)
}
}
#[doc = r" Value of the field"]
pub struct DATA_BYTE_3R {
bits: u8,
}
impl DATA_BYTE_3R {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct DATA_BYTE_2R {
bits: u8,
}
impl DATA_BYTE_2R {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct DATA_BYTE_1R {
bits: u8,
}
impl DATA_BYTE_1R {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct DATA_BYTE_0R {
bits: u8,
}
impl DATA_BYTE_0R {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Proxy"]
pub struct _DATA_BYTE_3W<'a> {
w: &'a mut W,
}
impl<'a> _DATA_BYTE_3W<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 255;
const OFFSET: u8 = 0;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = r" Proxy"]
pub struct _DATA_BYTE_2W<'a> {
w: &'a mut W,
}
impl<'a> _DATA_BYTE_2W<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 255;
const OFFSET: u8 = 8;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = r" Proxy"]
pub struct _DATA_BYTE_1W<'a> {
w: &'a mut W,
}
impl<'a> _DATA_BYTE_1W<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 255;
const OFFSET: u8 = 16;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = r" Proxy"]
pub struct _DATA_BYTE_0W<'a> {
w: &'a mut W,
}
impl<'a> _DATA_BYTE_0W<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 255;
const OFFSET: u8 = 24;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 0:7 - Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 3."]
#[inline]
pub fn data_byte_3(&self) -> DATA_BYTE_3R {
let bits = {
const MASK: u8 = 255;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) as u8
};
DATA_BYTE_3R { bits }
}
#[doc = "Bits 8:15 - Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 2."]
#[inline]
pub fn data_byte_2(&self) -> DATA_BYTE_2R {
let bits = {
const MASK: u8 = 255;
const OFFSET: u8 = 8;
((self.bits >> OFFSET) & MASK as u32) as u8
};
DATA_BYTE_2R { bits }
}
#[doc = "Bits 16:23 - Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 1."]
#[inline]
pub fn data_byte_1(&self) -> DATA_BYTE_1R {
let bits = {
const MASK: u8 = 255;
const OFFSET: u8 = 16;
((self.bits >> OFFSET) & MASK as u32) as u8
};
DATA_BYTE_1R { bits }
}
#[doc = "Bits 24:31 - Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 0."]
#[inline]
pub fn data_byte_0(&self) -> DATA_BYTE_0R {
let bits = {
const MASK: u8 = 255;
const OFFSET: u8 = 24;
((self.bits >> OFFSET) & MASK as u32) as u8
};
DATA_BYTE_0R { bits }
}
}
impl W {
#[doc = r" Reset value of the register"]
#[inline]
pub fn reset_value() -> W {
W { bits: 0 }
}
#[doc = r" Writes raw bits to the register"]
#[inline]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.bits = bits;
self
}
#[doc = "Bits 0:7 - Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 3."]
#[inline]
pub fn data_byte_3(&mut self) -> _DATA_BYTE_3W {
_DATA_BYTE_3W { w: self }
}
#[doc = "Bits 8:15 - Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 2."]
#[inline]
pub fn data_byte_2(&mut self) -> _DATA_BYTE_2W {
_DATA_BYTE_2W { w: self }
}
#[doc = "Bits 16:23 - Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 1."]
#[inline]
pub fn data_byte_1(&mut self) -> _DATA_BYTE_1W {
_DATA_BYTE_1W { w: self }
}
#[doc = "Bits 24:31 - Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 0."]
#[inline]
pub fn data_byte_0(&mut self) -> _DATA_BYTE_0W {
_DATA_BYTE_0W { w: self }
}
}

228
src/can2/pl2_plmask_hi/mod.rs
View File

@ -1,228 +0,0 @@
#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
#[doc = r" Value to write to the register"]
pub struct W {
bits: u32,
}
impl super::PL2_PLMASK_HI {
#[doc = r" Modifies the contents of the register"]
#[inline]
pub fn modify<F>(&self, f: F)
where
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
{
let bits = self.register.get();
let r = R { bits: bits };
let mut w = W { bits: bits };
f(&r, &mut w);
self.register.set(w.bits);
}
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
#[doc = r" Writes to the register"]
#[inline]
pub fn write<F>(&self, f: F)
where
F: FnOnce(&mut W) -> &mut W,
{
let mut w = W::reset_value();
f(&mut w);
self.register.set(w.bits);
}
#[doc = r" Writes the reset value to the register"]
#[inline]
pub fn reset(&self) {
self.write(|w| w)
}
}
#[doc = r" Value of the field"]
pub struct DATA_BYTE_7R {
bits: u8,
}
impl DATA_BYTE_7R {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct DATA_BYTE_6R {
bits: u8,
}
impl DATA_BYTE_6R {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct DATA_BYTE_5R {
bits: u8,
}
impl DATA_BYTE_5R {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct DATA_BYTE_4R {
bits: u8,
}
impl DATA_BYTE_4R {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Proxy"]
pub struct _DATA_BYTE_7W<'a> {
w: &'a mut W,
}
impl<'a> _DATA_BYTE_7W<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 255;
const OFFSET: u8 = 0;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = r" Proxy"]
pub struct _DATA_BYTE_6W<'a> {
w: &'a mut W,
}
impl<'a> _DATA_BYTE_6W<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 255;
const OFFSET: u8 = 8;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = r" Proxy"]
pub struct _DATA_BYTE_5W<'a> {
w: &'a mut W,
}
impl<'a> _DATA_BYTE_5W<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 255;
const OFFSET: u8 = 16;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = r" Proxy"]
pub struct _DATA_BYTE_4W<'a> {
w: &'a mut W,
}
impl<'a> _DATA_BYTE_4W<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 255;
const OFFSET: u8 = 24;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 0:7 - Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 7."]
#[inline]
pub fn data_byte_7(&self) -> DATA_BYTE_7R {
let bits = {
const MASK: u8 = 255;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) as u8
};
DATA_BYTE_7R { bits }
}
#[doc = "Bits 8:15 - Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 6."]
#[inline]
pub fn data_byte_6(&self) -> DATA_BYTE_6R {
let bits = {
const MASK: u8 = 255;
const OFFSET: u8 = 8;
((self.bits >> OFFSET) & MASK as u32) as u8
};
DATA_BYTE_6R { bits }
}
#[doc = "Bits 16:23 - Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 5."]
#[inline]
pub fn data_byte_5(&self) -> DATA_BYTE_5R {
let bits = {
const MASK: u8 = 255;
const OFFSET: u8 = 16;
((self.bits >> OFFSET) & MASK as u32) as u8
};
DATA_BYTE_5R { bits }
}
#[doc = "Bits 24:31 - Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 4."]
#[inline]
pub fn data_byte_4(&self) -> DATA_BYTE_4R {
let bits = {
const MASK: u8 = 255;
const OFFSET: u8 = 24;
((self.bits >> OFFSET) & MASK as u32) as u8
};
DATA_BYTE_4R { bits }
}
}
impl W {
#[doc = r" Reset value of the register"]
#[inline]
pub fn reset_value() -> W {
W { bits: 0 }
}
#[doc = r" Writes raw bits to the register"]
#[inline]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.bits = bits;
self
}
#[doc = "Bits 0:7 - Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 7."]
#[inline]
pub fn data_byte_7(&mut self) -> _DATA_BYTE_7W {
_DATA_BYTE_7W { w: self }
}
#[doc = "Bits 8:15 - Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 6."]
#[inline]
pub fn data_byte_6(&mut self) -> _DATA_BYTE_6W {
_DATA_BYTE_6W { w: self }
}
#[doc = "Bits 16:23 - Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 5."]
#[inline]
pub fn data_byte_5(&mut self) -> _DATA_BYTE_5W {
_DATA_BYTE_5W { w: self }
}
#[doc = "Bits 24:31 - Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 4."]
#[inline]
pub fn data_byte_4(&mut self) -> _DATA_BYTE_4W {
_DATA_BYTE_4W { w: self }
}
}

228
src/can2/pl2_plmask_lo/mod.rs
View File

@ -1,228 +0,0 @@
#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
#[doc = r" Value to write to the register"]
pub struct W {
bits: u32,
}
impl super::PL2_PLMASK_LO {
#[doc = r" Modifies the contents of the register"]
#[inline]
pub fn modify<F>(&self, f: F)
where
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
{
let bits = self.register.get();
let r = R { bits: bits };
let mut w = W { bits: bits };
f(&r, &mut w);
self.register.set(w.bits);
}
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
#[doc = r" Writes to the register"]
#[inline]
pub fn write<F>(&self, f: F)
where
F: FnOnce(&mut W) -> &mut W,
{
let mut w = W::reset_value();
f(&mut w);
self.register.set(w.bits);
}
#[doc = r" Writes the reset value to the register"]
#[inline]
pub fn reset(&self) {
self.write(|w| w)
}
}
#[doc = r" Value of the field"]
pub struct DATA_BYTE_3R {
bits: u8,
}
impl DATA_BYTE_3R {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct DATA_BYTE_2R {
bits: u8,
}
impl DATA_BYTE_2R {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct DATA_BYTE_1R {
bits: u8,
}
impl DATA_BYTE_1R {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct DATA_BYTE_0R {
bits: u8,
}
impl DATA_BYTE_0R {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Proxy"]
pub struct _DATA_BYTE_3W<'a> {
w: &'a mut W,
}
impl<'a> _DATA_BYTE_3W<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 255;
const OFFSET: u8 = 0;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = r" Proxy"]
pub struct _DATA_BYTE_2W<'a> {
w: &'a mut W,
}
impl<'a> _DATA_BYTE_2W<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 255;
const OFFSET: u8 = 8;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = r" Proxy"]
pub struct _DATA_BYTE_1W<'a> {
w: &'a mut W,
}
impl<'a> _DATA_BYTE_1W<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 255;
const OFFSET: u8 = 16;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = r" Proxy"]
pub struct _DATA_BYTE_0W<'a> {
w: &'a mut W,
}
impl<'a> _DATA_BYTE_0W<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 255;
const OFFSET: u8 = 24;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 0:7 - Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 3."]
#[inline]
pub fn data_byte_3(&self) -> DATA_BYTE_3R {
let bits = {
const MASK: u8 = 255;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) as u8
};
DATA_BYTE_3R { bits }
}
#[doc = "Bits 8:15 - Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 2."]
#[inline]
pub fn data_byte_2(&self) -> DATA_BYTE_2R {
let bits = {
const MASK: u8 = 255;
const OFFSET: u8 = 8;
((self.bits >> OFFSET) & MASK as u32) as u8
};
DATA_BYTE_2R { bits }
}
#[doc = "Bits 16:23 - Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 1."]
#[inline]
pub fn data_byte_1(&self) -> DATA_BYTE_1R {
let bits = {
const MASK: u8 = 255;
const OFFSET: u8 = 16;
((self.bits >> OFFSET) & MASK as u32) as u8
};
DATA_BYTE_1R { bits }
}
#[doc = "Bits 24:31 - Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 0."]
#[inline]
pub fn data_byte_0(&self) -> DATA_BYTE_0R {
let bits = {
const MASK: u8 = 255;
const OFFSET: u8 = 24;
((self.bits >> OFFSET) & MASK as u32) as u8
};
DATA_BYTE_0R { bits }
}
}
impl W {
#[doc = r" Reset value of the register"]
#[inline]
pub fn reset_value() -> W {
W { bits: 0 }
}
#[doc = r" Writes raw bits to the register"]
#[inline]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.bits = bits;
self
}
#[doc = "Bits 0:7 - Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 3."]
#[inline]
pub fn data_byte_3(&mut self) -> _DATA_BYTE_3W {
_DATA_BYTE_3W { w: self }
}
#[doc = "Bits 8:15 - Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 2."]
#[inline]
pub fn data_byte_2(&mut self) -> _DATA_BYTE_2W {
_DATA_BYTE_2W { w: self }
}
#[doc = "Bits 16:23 - Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 1."]
#[inline]
pub fn data_byte_1(&mut self) -> _DATA_BYTE_1W {
_DATA_BYTE_1W { w: self }
}
#[doc = "Bits 24:31 - Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 0."]
#[inline]
pub fn data_byte_0(&mut self) -> _DATA_BYTE_0W {
_DATA_BYTE_0W { w: self }
}
}

105
src/can2/rx14mask/mod.rs
View File

@ -1,105 +0,0 @@
#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
#[doc = r" Value to write to the register"]
pub struct W {
bits: u32,
}
impl super::RX14MASK {
#[doc = r" Modifies the contents of the register"]
#[inline]
pub fn modify<F>(&self, f: F)
where
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
{
let bits = self.register.get();
let r = R { bits: bits };
let mut w = W { bits: bits };
f(&r, &mut w);
self.register.set(w.bits);
}
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
#[doc = r" Writes to the register"]
#[inline]
pub fn write<F>(&self, f: F)
where
F: FnOnce(&mut W) -> &mut W,
{
let mut w = W::reset_value();
f(&mut w);
self.register.set(w.bits);
}
#[doc = r" Writes the reset value to the register"]
#[inline]
pub fn reset(&self) {
self.write(|w| w)
}
}
#[doc = r" Value of the field"]
pub struct RX14MR {
bits: u32,
}
impl RX14MR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
}
#[doc = r" Proxy"]
pub struct _RX14MW<'a> {
w: &'a mut W,
}
impl<'a> _RX14MW<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u32) -> &'a mut W {
const MASK: u32 = 4294967295;
const OFFSET: u8 = 0;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 0:31 - Rx Buffer 14 Mask Bits"]
#[inline]
pub fn rx14m(&self) -> RX14MR {
let bits = {
const MASK: u32 = 4294967295;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) as u32
};
RX14MR { bits }
}
}
impl W {
#[doc = r" Reset value of the register"]
#[inline]
pub fn reset_value() -> W {
W { bits: 0 }
}
#[doc = r" Writes raw bits to the register"]
#[inline]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.bits = bits;
self
}
#[doc = "Bits 0:31 - Rx Buffer 14 Mask Bits"]
#[inline]
pub fn rx14m(&mut self) -> _RX14MW {
_RX14MW { w: self }
}
}

105
src/can2/rx15mask/mod.rs
View File

@ -1,105 +0,0 @@
#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
#[doc = r" Value to write to the register"]
pub struct W {
bits: u32,
}
impl super::RX15MASK {
#[doc = r" Modifies the contents of the register"]
#[inline]
pub fn modify<F>(&self, f: F)
where
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
{
let bits = self.register.get();
let r = R { bits: bits };
let mut w = W { bits: bits };
f(&r, &mut w);
self.register.set(w.bits);
}
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
#[doc = r" Writes to the register"]
#[inline]
pub fn write<F>(&self, f: F)
where
F: FnOnce(&mut W) -> &mut W,
{
let mut w = W::reset_value();
f(&mut w);
self.register.set(w.bits);
}
#[doc = r" Writes the reset value to the register"]
#[inline]
pub fn reset(&self) {
self.write(|w| w)
}
}
#[doc = r" Value of the field"]
pub struct RX15MR {
bits: u32,
}
impl RX15MR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
}
#[doc = r" Proxy"]
pub struct _RX15MW<'a> {
w: &'a mut W,
}
impl<'a> _RX15MW<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u32) -> &'a mut W {
const MASK: u32 = 4294967295;
const OFFSET: u8 = 0;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 0:31 - Rx Buffer 15 Mask Bits"]
#[inline]
pub fn rx15m(&self) -> RX15MR {
let bits = {
const MASK: u32 = 4294967295;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) as u32
};
RX15MR { bits }
}
}
impl W {
#[doc = r" Reset value of the register"]
#[inline]
pub fn reset_value() -> W {
W { bits: 0 }
}
#[doc = r" Writes raw bits to the register"]
#[inline]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.bits = bits;
self
}
#[doc = "Bits 0:31 - Rx Buffer 15 Mask Bits"]
#[inline]
pub fn rx15m(&mut self) -> _RX15MW {
_RX15MW { w: self }
}
}

105
src/can2/rxfgmask/mod.rs
View File

@ -1,105 +0,0 @@
#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
#[doc = r" Value to write to the register"]
pub struct W {
bits: u32,
}
impl super::RXFGMASK {
#[doc = r" Modifies the contents of the register"]
#[inline]
pub fn modify<F>(&self, f: F)
where
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
{
let bits = self.register.get();
let r = R { bits: bits };
let mut w = W { bits: bits };
f(&r, &mut w);
self.register.set(w.bits);
}
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
#[doc = r" Writes to the register"]
#[inline]
pub fn write<F>(&self, f: F)
where
F: FnOnce(&mut W) -> &mut W,
{
let mut w = W::reset_value();
f(&mut w);
self.register.set(w.bits);
}
#[doc = r" Writes the reset value to the register"]
#[inline]
pub fn reset(&self) {
self.write(|w| w)
}
}
#[doc = r" Value of the field"]
pub struct FGMR {
bits: u32,
}
impl FGMR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
}
#[doc = r" Proxy"]
pub struct _FGMW<'a> {
w: &'a mut W,
}
impl<'a> _FGMW<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u32) -> &'a mut W {
const MASK: u32 = 4294967295;
const OFFSET: u8 = 0;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 0:31 - Rx FIFO Global Mask Bits"]
#[inline]
pub fn fgm(&self) -> FGMR {
let bits = {
const MASK: u32 = 4294967295;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) as u32
};
FGMR { bits }
}
}
impl W {
#[doc = r" Reset value of the register"]
#[inline]
pub fn reset_value() -> W {
W { bits: 0 }
}
#[doc = r" Writes raw bits to the register"]
#[inline]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.bits = bits;
self
}
#[doc = "Bits 0:31 - Rx FIFO Global Mask Bits"]
#[inline]
pub fn fgm(&mut self) -> _FGMW {
_FGMW { w: self }
}
}

41
src/can2/rxfir/mod.rs
View File

@ -1,41 +0,0 @@
#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
impl super::RXFIR {
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
}
#[doc = r" Value of the field"]
pub struct IDHITR {
bits: u16,
}
impl IDHITR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u16 {
self.bits
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 0:8 - Identifier Acceptance Filter Hit Indicator"]
#[inline]
pub fn idhit(&self) -> IDHITR {
let bits = {
const MASK: u16 = 511;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) as u16
};
IDHITR { bits }
}
}

105
src/can2/rximr0/mod.rs
View File

@ -1,105 +0,0 @@
#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
#[doc = r" Value to write to the register"]
pub struct W {
bits: u32,
}
impl super::RXIMR0 {
#[doc = r" Modifies the contents of the register"]
#[inline]
pub fn modify<F>(&self, f: F)
where
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
{
let bits = self.register.get();
let r = R { bits: bits };
let mut w = W { bits: bits };
f(&r, &mut w);
self.register.set(w.bits);
}
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
#[doc = r" Writes to the register"]
#[inline]
pub fn write<F>(&self, f: F)
where
F: FnOnce(&mut W) -> &mut W,
{
let mut w = W::reset_value();
f(&mut w);
self.register.set(w.bits);
}
#[doc = r" Writes the reset value to the register"]
#[inline]
pub fn reset(&self) {
self.write(|w| w)
}
}
#[doc = r" Value of the field"]
pub struct MIR {
bits: u32,
}
impl MIR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
}
#[doc = r" Proxy"]
pub struct _MIW<'a> {
w: &'a mut W,
}
impl<'a> _MIW<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u32) -> &'a mut W {
const MASK: u32 = 4294967295;
const OFFSET: u8 = 0;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 0:31 - Individual Mask Bits"]
#[inline]
pub fn mi(&self) -> MIR {
let bits = {
const MASK: u32 = 4294967295;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) as u32
};
MIR { bits }
}
}
impl W {
#[doc = r" Reset value of the register"]
#[inline]
pub fn reset_value() -> W {
W { bits: 0 }
}
#[doc = r" Writes raw bits to the register"]
#[inline]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.bits = bits;
self
}
#[doc = "Bits 0:31 - Individual Mask Bits"]
#[inline]
pub fn mi(&mut self) -> _MIW {
_MIW { w: self }
}
}

105
src/can2/rximr1/mod.rs
View File

@ -1,105 +0,0 @@
#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
#[doc = r" Value to write to the register"]
pub struct W {
bits: u32,
}
impl super::RXIMR1 {
#[doc = r" Modifies the contents of the register"]
#[inline]
pub fn modify<F>(&self, f: F)
where
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
{
let bits = self.register.get();
let r = R { bits: bits };
let mut w = W { bits: bits };
f(&r, &mut w);
self.register.set(w.bits);
}
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
#[doc = r" Writes to the register"]
#[inline]
pub fn write<F>(&self, f: F)
where
F: FnOnce(&mut W) -> &mut W,
{
let mut w = W::reset_value();
f(&mut w);
self.register.set(w.bits);
}
#[doc = r" Writes the reset value to the register"]
#[inline]
pub fn reset(&self) {
self.write(|w| w)
}
}
#[doc = r" Value of the field"]
pub struct MIR {
bits: u32,
}
impl MIR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
}
#[doc = r" Proxy"]
pub struct _MIW<'a> {
w: &'a mut W,
}
impl<'a> _MIW<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u32) -> &'a mut W {
const MASK: u32 = 4294967295;
const OFFSET: u8 = 0;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 0:31 - Individual Mask Bits"]
#[inline]
pub fn mi(&self) -> MIR {
let bits = {
const MASK: u32 = 4294967295;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) as u32
};
MIR { bits }
}
}
impl W {
#[doc = r" Reset value of the register"]
#[inline]
pub fn reset_value() -> W {
W { bits: 0 }
}
#[doc = r" Writes raw bits to the register"]
#[inline]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.bits = bits;
self
}
#[doc = "Bits 0:31 - Individual Mask Bits"]
#[inline]
pub fn mi(&mut self) -> _MIW {
_MIW { w: self }
}
}

105
src/can2/rximr10/mod.rs
View File

@ -1,105 +0,0 @@
#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
#[doc = r" Value to write to the register"]
pub struct W {
bits: u32,
}
impl super::RXIMR10 {
#[doc = r" Modifies the contents of the register"]
#[inline]
pub fn modify<F>(&self, f: F)
where
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
{
let bits = self.register.get();
let r = R { bits: bits };
let mut w = W { bits: bits };
f(&r, &mut w);
self.register.set(w.bits);
}
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
#[doc = r" Writes to the register"]
#[inline]
pub fn write<F>(&self, f: F)
where
F: FnOnce(&mut W) -> &mut W,
{
let mut w = W::reset_value();
f(&mut w);
self.register.set(w.bits);
}
#[doc = r" Writes the reset value to the register"]
#[inline]
pub fn reset(&self) {
self.write(|w| w)
}
}
#[doc = r" Value of the field"]
pub struct MIR {
bits: u32,
}
impl MIR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
}
#[doc = r" Proxy"]
pub struct _MIW<'a> {
w: &'a mut W,
}
impl<'a> _MIW<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u32) -> &'a mut W {
const MASK: u32 = 4294967295;
const OFFSET: u8 = 0;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 0:31 - Individual Mask Bits"]
#[inline]
pub fn mi(&self) -> MIR {
let bits = {
const MASK: u32 = 4294967295;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) as u32
};
MIR { bits }
}
}
impl W {
#[doc = r" Reset value of the register"]
#[inline]
pub fn reset_value() -> W {
W { bits: 0 }
}
#[doc = r" Writes raw bits to the register"]
#[inline]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.bits = bits;
self
}
#[doc = "Bits 0:31 - Individual Mask Bits"]
#[inline]
pub fn mi(&mut self) -> _MIW {
_MIW { w: self }
}
}

105
src/can2/rximr11/mod.rs
View File

@ -1,105 +0,0 @@
#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
#[doc = r" Value to write to the register"]
pub struct W {
bits: u32,
}
impl super::RXIMR11 {
#[doc = r" Modifies the contents of the register"]
#[inline]
pub fn modify<F>(&self, f: F)
where
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
{
let bits = self.register.get();
let r = R { bits: bits };
let mut w = W { bits: bits };
f(&r, &mut w);
self.register.set(w.bits);
}
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
#[doc = r" Writes to the register"]
#[inline]
pub fn write<F>(&self, f: F)
where
F: FnOnce(&mut W) -> &mut W,
{
let mut w = W::reset_value();
f(&mut w);
self.register.set(w.bits);
}
#[doc = r" Writes the reset value to the register"]
#[inline]
pub fn reset(&self) {
self.write(|w| w)
}
}
#[doc = r" Value of the field"]
pub struct MIR {
bits: u32,
}
impl MIR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
}
#[doc = r" Proxy"]
pub struct _MIW<'a> {
w: &'a mut W,
}
impl<'a> _MIW<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u32) -> &'a mut W {
const MASK: u32 = 4294967295;
const OFFSET: u8 = 0;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 0:31 - Individual Mask Bits"]
#[inline]
pub fn mi(&self) -> MIR {
let bits = {
const MASK: u32 = 4294967295;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) as u32
};
MIR { bits }
}
}
impl W {
#[doc = r" Reset value of the register"]
#[inline]
pub fn reset_value() -> W {
W { bits: 0 }
}
#[doc = r" Writes raw bits to the register"]
#[inline]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.bits = bits;
self
}
#[doc = "Bits 0:31 - Individual Mask Bits"]
#[inline]
pub fn mi(&mut self) -> _MIW {
_MIW { w: self }
}
}

105
src/can2/rximr12/mod.rs
View File

@ -1,105 +0,0 @@
#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
#[doc = r" Value to write to the register"]
pub struct W {
bits: u32,
}
impl super::RXIMR12 {
#[doc = r" Modifies the contents of the register"]
#[inline]
pub fn modify<F>(&self, f: F)
where
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
{
let bits = self.register.get();
let r = R { bits: bits };
let mut w = W { bits: bits };
f(&r, &mut w);
self.register.set(w.bits);
}
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
#[doc = r" Writes to the register"]
#[inline]
pub fn write<F>(&self, f: F)
where
F: FnOnce(&mut W) -> &mut W,
{
let mut w = W::reset_value();
f(&mut w);
self.register.set(w.bits);
}
#[doc = r" Writes the reset value to the register"]
#[inline]
pub fn reset(&self) {
self.write(|w| w)
}
}
#[doc = r" Value of the field"]
pub struct MIR {
bits: u32,
}
impl MIR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
}
#[doc = r" Proxy"]
pub struct _MIW<'a> {
w: &'a mut W,
}
impl<'a> _MIW<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u32) -> &'a mut W {
const MASK: u32 = 4294967295;
const OFFSET: u8 = 0;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 0:31 - Individual Mask Bits"]
#[inline]
pub fn mi(&self) -> MIR {
let bits = {
const MASK: u32 = 4294967295;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) as u32
};
MIR { bits }
}
}
impl W {
#[doc = r" Reset value of the register"]
#[inline]
pub fn reset_value() -> W {
W { bits: 0 }
}
#[doc = r" Writes raw bits to the register"]
#[inline]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.bits = bits;
self
}
#[doc = "Bits 0:31 - Individual Mask Bits"]
#[inline]
pub fn mi(&mut self) -> _MIW {
_MIW { w: self }
}
}

105
src/can2/rximr13/mod.rs
View File

@ -1,105 +0,0 @@
#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
#[doc = r" Value to write to the register"]
pub struct W {
bits: u32,
}
impl super::RXIMR13 {
#[doc = r" Modifies the contents of the register"]
#[inline]
pub fn modify<F>(&self, f: F)
where
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
{
let bits = self.register.get();
let r = R { bits: bits };
let mut w = W { bits: bits };
f(&r, &mut w);
self.register.set(w.bits);
}
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
#[doc = r" Writes to the register"]
#[inline]
pub fn write<F>(&self, f: F)
where
F: FnOnce(&mut W) -> &mut W,
{
let mut w = W::reset_value();
f(&mut w);
self.register.set(w.bits);
}
#[doc = r" Writes the reset value to the register"]
#[inline]
pub fn reset(&self) {
self.write(|w| w)
}
}
#[doc = r" Value of the field"]
pub struct MIR {
bits: u32,
}
impl MIR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
}
#[doc = r" Proxy"]
pub struct _MIW<'a> {
w: &'a mut W,
}
impl<'a> _MIW<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u32) -> &'a mut W {
const MASK: u32 = 4294967295;
const OFFSET: u8 = 0;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 0:31 - Individual Mask Bits"]
#[inline]
pub fn mi(&self) -> MIR {
let bits = {
const MASK: u32 = 4294967295;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) as u32
};
MIR { bits }
}
}
impl W {
#[doc = r" Reset value of the register"]
#[inline]
pub fn reset_value() -> W {
W { bits: 0 }
}
#[doc = r" Writes raw bits to the register"]
#[inline]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.bits = bits;
self
}
#[doc = "Bits 0:31 - Individual Mask Bits"]
#[inline]
pub fn mi(&mut self) -> _MIW {
_MIW { w: self }
}
}

105
src/can2/rximr14/mod.rs
View File

@ -1,105 +0,0 @@
#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
#[doc = r" Value to write to the register"]
pub struct W {
bits: u32,
}
impl super::RXIMR14 {
#[doc = r" Modifies the contents of the register"]
#[inline]
pub fn modify<F>(&self, f: F)
where
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
{
let bits = self.register.get();
let r = R { bits: bits };
let mut w = W { bits: bits };
f(&r, &mut w);
self.register.set(w.bits);
}
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
#[doc = r" Writes to the register"]
#[inline]
pub fn write<F>(&self, f: F)
where
F: FnOnce(&mut W) -> &mut W,
{
let mut w = W::reset_value();
f(&mut w);
self.register.set(w.bits);
}
#[doc = r" Writes the reset value to the register"]
#[inline]
pub fn reset(&self) {
self.write(|w| w)
}
}
#[doc = r" Value of the field"]
pub struct MIR {
bits: u32,
}
impl MIR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
}
#[doc = r" Proxy"]
pub struct _MIW<'a> {
w: &'a mut W,
}
impl<'a> _MIW<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u32) -> &'a mut W {
const MASK: u32 = 4294967295;
const OFFSET: u8 = 0;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 0:31 - Individual Mask Bits"]
#[inline]
pub fn mi(&self) -> MIR {
let bits = {
const MASK: u32 = 4294967295;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) as u32
};
MIR { bits }
}
}
impl W {
#[doc = r" Reset value of the register"]
#[inline]
pub fn reset_value() -> W {
W { bits: 0 }
}
#[doc = r" Writes raw bits to the register"]
#[inline]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.bits = bits;
self
}
#[doc = "Bits 0:31 - Individual Mask Bits"]
#[inline]
pub fn mi(&mut self) -> _MIW {
_MIW { w: self }
}
}

105
src/can2/rximr15/mod.rs
View File

@ -1,105 +0,0 @@
#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
#[doc = r" Value to write to the register"]
pub struct W {
bits: u32,
}
impl super::RXIMR15 {
#[doc = r" Modifies the contents of the register"]
#[inline]
pub fn modify<F>(&self, f: F)
where
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
{
let bits = self.register.get();
let r = R { bits: bits };
let mut w = W { bits: bits };
f(&r, &mut w);
self.register.set(w.bits);
}
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
#[doc = r" Writes to the register"]
#[inline]
pub fn write<F>(&self, f: F)
where
F: FnOnce(&mut W) -> &mut W,
{
let mut w = W::reset_value();
f(&mut w);
self.register.set(w.bits);
}
#[doc = r" Writes the reset value to the register"]
#[inline]
pub fn reset(&self) {
self.write(|w| w)
}
}
#[doc = r" Value of the field"]
pub struct MIR {
bits: u32,
}
impl MIR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
}
#[doc = r" Proxy"]
pub struct _MIW<'a> {
w: &'a mut W,
}
impl<'a> _MIW<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u32) -> &'a mut W {
const MASK: u32 = 4294967295;
const OFFSET: u8 = 0;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 0:31 - Individual Mask Bits"]
#[inline]
pub fn mi(&self) -> MIR {
let bits = {
const MASK: u32 = 4294967295;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) as u32
};
MIR { bits }
}
}
impl W {
#[doc = r" Reset value of the register"]
#[inline]
pub fn reset_value() -> W {
W { bits: 0 }
}
#[doc = r" Writes raw bits to the register"]
#[inline]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.bits = bits;
self
}
#[doc = "Bits 0:31 - Individual Mask Bits"]
#[inline]
pub fn mi(&mut self) -> _MIW {
_MIW { w: self }
}
}

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