diff --git a/S32K144.svd b/S32K144.svd index f303983..0f5dbbe 100644 --- a/S32K144.svd +++ b/S32K144.svd @@ -30411,7 +30411,8 @@ - CAN0 + + CAN0 Flex Controller Area Network module CAN CAN0_ @@ -33764,6695 +33765,17 @@ - CAN1 + CAN1 Flex Controller Area Network module CAN CAN1_ 0x40025000 - - 0 - 0xC0C - registers - - - CAN1_ORed - 85 - - - CAN1_Error - 86 - - - CAN1_ORed_0_15_MB - 88 - - - MCR - Module Configuration Register - 0 - 32 - read-write - 0xD890000F - 0xFFFFFFFF - - - MAXMB - Number Of The Last Message Buffer - 0 - 7 - read-write - - - IDAM - ID Acceptance Mode - 8 - 2 - read-write - - - 00 - Format A: One full ID (standard and extended) per ID Filter Table element. - #00 - - - 01 - Format B: Two full standard IDs or two partial 14-bit (standard and extended) IDs per ID Filter Table element. - #01 - - - 10 - Format C: Four partial 8-bit Standard IDs per ID Filter Table element. - #10 - - - 11 - Format D: All frames rejected. - #11 - - - - - FDEN - CAN FD operation enable - 11 - 1 - read-write - - - 1 - CAN FD is enabled. FlexCAN is able to receive and transmit messages in both CAN FD and CAN 2.0 formats. - #1 - - - 0 - CAN FD is disabled. FlexCAN is able to receive and transmit messages in CAN 2.0 format. - #0 - - - - - AEN - Abort Enable - 12 - 1 - read-write - - - 0 - Abort disabled. - #0 - - - 1 - Abort enabled. - #1 - - - - - LPRIOEN - Local Priority Enable - 13 - 1 - read-write - - - 0 - Local Priority disabled. - #0 - - - 1 - Local Priority enabled. - #1 - - - - - PNET_EN - Pretended Networking Enable - 14 - 1 - read-write - - - 0 - Pretended Networking mode is disabled. - #0 - - - 1 - Pretended Networking mode is enabled. - #1 - - - - - DMA - DMA Enable - 15 - 1 - read-write - - - 0 - DMA feature for RX FIFO disabled. - #0 - - - 1 - DMA feature for RX FIFO enabled. - #1 - - - - - IRMQ - Individual Rx Masking And Queue Enable - 16 - 1 - read-write - - - 0 - Individual Rx masking and queue feature are disabled. For backward compatibility with legacy applications, the reading of C/S word locks the MB even if it is EMPTY. - #0 - - - 1 - Individual Rx masking and queue feature are enabled. - #1 - - - - - SRXDIS - Self Reception Disable - 17 - 1 - read-write - - - 0 - Self reception enabled. - #0 - - - 1 - Self reception disabled. - #1 - - - - - LPMACK - Low-Power Mode Acknowledge - 20 - 1 - read-only - - - 0 - FlexCAN is not in a low-power mode. - #0 - - - 1 - FlexCAN is in a low-power mode. - #1 - - - - - WRNEN - Warning Interrupt Enable - 21 - 1 - read-write - - - 0 - TWRNINT and RWRNINT bits are zero, independent of the values in the error counters. - #0 - - - 1 - TWRNINT and RWRNINT bits are set when the respective error counter transitions from less than 96 to greater than or equal to 96. - #1 - - - - - SUPV - Supervisor Mode - 23 - 1 - read-write - - - FRZACK - Freeze Mode Acknowledge - 24 - 1 - read-only - - - 0 - FlexCAN not in Freeze mode, prescaler running. - #0 - - - 1 - FlexCAN in Freeze mode, prescaler stopped. - #1 - - - - - SOFTRST - Soft Reset - 25 - 1 - read-write - - - 0 - No reset request. - #0 - - - 1 - Resets the registers affected by soft reset. - #1 - - - - - NOTRDY - FlexCAN Not Ready - 27 - 1 - read-only - - - 0 - FlexCAN module is either in Normal mode, Listen-Only mode or Loop-Back mode. - #0 - - - - - HALT - Halt FlexCAN - 28 - 1 - read-write - - - 0 - No Freeze mode request. - #0 - - - 1 - Enters Freeze mode if the FRZ bit is asserted. - #1 - - - - - RFEN - Rx FIFO Enable - 29 - 1 - read-write - - - 0 - Rx FIFO not enabled. - #0 - - - 1 - Rx FIFO enabled. - #1 - - - - - FRZ - Freeze Enable - 30 - 1 - read-write - - - 0 - Not enabled to enter Freeze mode. - #0 - - - 1 - Enabled to enter Freeze mode. - #1 - - - - - MDIS - Module Disable - 31 - 1 - read-write - - - 0 - Enable the FlexCAN module. - #0 - - - 1 - Disable the FlexCAN module. - #1 - - - - - - CTRL1 - Control 1 register - 0x4 - 32 - read-write - 0 - 0xFFFFFFFF - - - PROPSEG - Propagation Segment - 0 - 3 - read-write - - - LOM - Listen-Only Mode - 3 - 1 - read-write - - - 0 - Listen-Only mode is deactivated. - #0 - - - 1 - FlexCAN module operates in Listen-Only mode. - #1 - - - - - LBUF - Lowest Buffer Transmitted First - 4 - 1 - read-write - - - 0 - Buffer with highest priority is transmitted first. - #0 - - - 1 - Lowest number buffer is transmitted first. - #1 - - - - - TSYN - Timer Sync - 5 - 1 - read-write - - - 0 - Timer Sync feature disabled - #0 - - - 1 - Timer Sync feature enabled - #1 - - - - - BOFFREC - Bus Off Recovery - 6 - 1 - read-write - - - 0 - Automatic recovering from Bus Off state enabled. - #0 - - - 1 - Automatic recovering from Bus Off state disabled. - #1 - - - - - SMP - CAN Bit Sampling - 7 - 1 - read-write - - - 0 - Just one sample is used to determine the bit value. - #0 - - - 1 - Three samples are used to determine the value of the received bit: the regular one (sample point) and 2 preceding samples; a majority rule is used. - #1 - - - - - RWRNMSK - Rx Warning Interrupt Mask - 10 - 1 - read-write - - - 0 - Rx Warning Interrupt disabled. - #0 - - - 1 - Rx Warning Interrupt enabled. - #1 - - - - - TWRNMSK - Tx Warning Interrupt Mask - 11 - 1 - read-write - - - 0 - Tx Warning Interrupt disabled. - #0 - - - 1 - Tx Warning Interrupt enabled. - #1 - - - - - LPB - Loop Back Mode - 12 - 1 - read-write - - - 0 - Loop Back disabled. - #0 - - - 1 - Loop Back enabled. - #1 - - - - - CLKSRC - CAN Engine Clock Source - 13 - 1 - read-write - - - 0 - The CAN engine clock source is the oscillator clock. Under this condition, the oscillator clock frequency must be lower than the bus clock. - #0 - - - 1 - The CAN engine clock source is the peripheral clock. - #1 - - - - - ERRMSK - Error Interrupt Mask - 14 - 1 - read-write - - - 0 - Error interrupt disabled. - #0 - - - 1 - Error interrupt enabled. - #1 - - - - - BOFFMSK - Bus Off Interrupt Mask - 15 - 1 - read-write - - - 0 - Bus Off interrupt disabled. - #0 - - - 1 - Bus Off interrupt enabled. - #1 - - - - - PSEG2 - Phase Segment 2 - 16 - 3 - read-write - - - PSEG1 - Phase Segment 1 - 19 - 3 - read-write - - - RJW - Resync Jump Width - 22 - 2 - read-write - - - PRESDIV - Prescaler Division Factor - 24 - 8 - read-write - - - - TIMER - Free Running Timer - 0x8 - 32 - read-write - 0 - 0xFFFFFFFF - - - TIMER - Timer Value - 0 - 16 - read-write - - - - RXMGMASK - Rx Mailboxes Global Mask Register - 0x10 - 32 - read-write - 0 - 0 - - - MG - Rx Mailboxes Global Mask Bits - 0 - 32 - read-write - - - - RX14MASK - Rx 14 Mask register - 0x14 - 32 - read-write - 0 - 0 - - - RX14M - Rx Buffer 14 Mask Bits - 0 - 32 - read-write - - - - RX15MASK - Rx 15 Mask register - 0x18 - 32 - read-write - 0 - 0 - - - RX15M - Rx Buffer 15 Mask Bits - 0 - 32 - read-write - - - - ECR - Error Counter - 0x1C - 32 - read-write - 0 - 0xFFFFFFFF - - - TXERRCNT - Transmit Error Counter - 0 - 8 - read-write - - - RXERRCNT - Receive Error Counter - 8 - 8 - read-write - - - TXERRCNT_FAST - Transmit Error Counter for fast bits - 16 - 8 - read-write - - - RXERRCNT_FAST - Receive Error Counter for fast bits - 24 - 8 - read-write - - - - ESR1 - Error and Status 1 register - 0x20 - 32 - read-write - 0 - 0xFFFFFFFF - - - ERRINT - Error Interrupt - 1 - 1 - read-write - - - 0 - No such occurrence. - #0 - - - 1 - Indicates setting of any Error Bit in the Error and Status Register. - #1 - - - - - BOFFINT - Bus Off Interrupt - 2 - 1 - read-write - - - 0 - No such occurrence. - #0 - - - 1 - FlexCAN module entered Bus Off state. - #1 - - - - - RX - FlexCAN In Reception - 3 - 1 - read-only - - - 0 - FlexCAN is not receiving a message. - #0 - - - 1 - FlexCAN is receiving a message. - #1 - - - - - FLTCONF - Fault Confinement State - 4 - 2 - read-only - - - 00 - Error Active - #00 - - - 01 - Error Passive - #01 - - - 1x - Bus Off - #1x - - - - - TX - FlexCAN In Transmission - 6 - 1 - read-only - - - 0 - FlexCAN is not transmitting a message. - #0 - - - 1 - FlexCAN is transmitting a message. - #1 - - - - - IDLE - IDLE - 7 - 1 - read-only - - - 0 - No such occurrence. - #0 - - - 1 - CAN bus is now IDLE. - #1 - - - - - RXWRN - Rx Error Warning - 8 - 1 - read-only - - - 0 - No such occurrence. - #0 - - - 1 - RXERRCNT is greater than or equal to 96. - #1 - - - - - TXWRN - TX Error Warning - 9 - 1 - read-only - - - 0 - No such occurrence. - #0 - - - 1 - TXERRCNT is greater than or equal to 96. - #1 - - - - - STFERR - Stuffing Error - 10 - 1 - read-only - - - 0 - No such occurrence. - #0 - - - 1 - A Stuffing Error occurred since last read of this register. - #1 - - - - - FRMERR - Form Error - 11 - 1 - read-only - - - 0 - No such occurrence. - #0 - - - 1 - A Form Error occurred since last read of this register. - #1 - - - - - CRCERR - Cyclic Redundancy Check Error - 12 - 1 - read-only - - - 0 - No such occurrence. - #0 - - - 1 - A CRC error occurred since last read of this register. - #1 - - - - - ACKERR - Acknowledge Error - 13 - 1 - read-only - - - 0 - No such occurrence. - #0 - - - 1 - An ACK error occurred since last read of this register. - #1 - - - - - BIT0ERR - Bit0 Error - 14 - 1 - read-only - - - 0 - No such occurrence. - #0 - - - 1 - At least one bit sent as dominant is received as recessive. - #1 - - - - - BIT1ERR - Bit1 Error - 15 - 1 - read-only - - - 0 - No such occurrence. - #0 - - - 1 - At least one bit sent as recessive is received as dominant. - #1 - - - - - RWRNINT - Rx Warning Interrupt Flag - 16 - 1 - read-write - - - 0 - No such occurrence. - #0 - - - 1 - The Rx error counter transitioned from less than 96 to greater than or equal to 96. - #1 - - - - - TWRNINT - Tx Warning Interrupt Flag - 17 - 1 - read-write - - - 0 - No such occurrence. - #0 - - - 1 - The Tx error counter transitioned from less than 96 to greater than or equal to 96. - #1 - - - - - SYNCH - CAN Synchronization Status - 18 - 1 - read-only - - - 0 - FlexCAN is not synchronized to the CAN bus. - #0 - - - 1 - FlexCAN is synchronized to the CAN bus. - #1 - - - - - BOFFDONEINT - Bus Off Done Interrupt - 19 - 1 - read-write - - - 0 - No such occurrence. - #0 - - - 1 - FlexCAN module has completed Bus Off process. - #1 - - - - - ERRINT_FAST - Error Interrupt for errors detected in the Data Phase of CAN FD frames with the BRS bit set - 20 - 1 - read-write - - - 0 - No such occurrence. - #0 - - - 1 - Indicates setting of any Error Bit detected in the Data Phase of CAN FD frames with the BRS bit set. - #1 - - - - - ERROVR - Error Overrun bit - 21 - 1 - read-write - - - 0 - Overrun has not occurred. - #0 - - - 1 - Overrun has occurred. - #1 - - - - - STFERR_FAST - Stuffing Error in the Data Phase of CAN FD frames with the BRS bit set - 26 - 1 - read-only - - - 0 - No such occurrence. - #0 - - - 1 - A Stuffing Error occurred since last read of this register. - #1 - - - - - FRMERR_FAST - Form Error in the Data Phase of CAN FD frames with the BRS bit set - 27 - 1 - read-only - - - 0 - No such occurrence. - #0 - - - 1 - A Form Error occurred since last read of this register. - #1 - - - - - CRCERR_FAST - Cyclic Redundancy Check Error in the CRC field of CAN FD frames with the BRS bit set - 28 - 1 - read-only - - - 0 - No such occurrence. - #0 - - - 1 - A CRC error occurred since last read of this register. - #1 - - - - - BIT0ERR_FAST - Bit0 Error in the Data Phase of CAN FD frames with the BRS bit set - 30 - 1 - read-only - - - 0 - No such occurrence. - #0 - - - 1 - At least one bit sent as dominant is received as recessive. - #1 - - - - - BIT1ERR_FAST - Bit1 Error in the Data Phase of CAN FD frames with the BRS bit set - 31 - 1 - read-only - - - 0 - No such occurrence. - #0 - - - 1 - At least one bit sent as recessive is received as dominant. - #1 - - - - - - IMASK1 - Interrupt Masks 1 register - 0x28 - 32 - read-write - 0 - 0xFFFFFFFF - - - BUF31TO0M - Buffer MB i Mask - 0 - 32 - read-write - - - - IFLAG1 - Interrupt Flags 1 register - 0x30 - 32 - read-write - 0 - 0xFFFFFFFF - - - BUF0I - Buffer MB0 Interrupt Or Clear FIFO bit - 0 - 1 - read-write - - - 0 - The corresponding buffer has no occurrence of successfully completed transmission or reception when MCR[RFEN]=0. - #0 - - - 1 - The corresponding buffer has successfully completed transmission or reception when MCR[RFEN]=0. - #1 - - - - - BUF4TO1I - Buffer MB i Interrupt Or "reserved" - 1 - 4 - read-write - - - BUF5I - Buffer MB5 Interrupt Or "Frames available in Rx FIFO" - 5 - 1 - read-write - - - 0 - No occurrence of MB5 completing transmission/reception when MCR[RFEN]=0, or of frame(s) available in the FIFO, when MCR[RFEN]=1 - #0 - - - 1 - MB5 completed transmission/reception when MCR[RFEN]=0, or frame(s) available in the Rx FIFO when MCR[RFEN]=1. It generates a DMA request in case of MCR[RFEN] and MCR[DMA] are enabled. - #1 - - - - - BUF6I - Buffer MB6 Interrupt Or "Rx FIFO Warning" - 6 - 1 - read-write - - - 0 - No occurrence of MB6 completing transmission/reception when MCR[RFEN]=0, or of Rx FIFO almost full when MCR[RFEN]=1 - #0 - - - 1 - MB6 completed transmission/reception when MCR[RFEN]=0, or Rx FIFO almost full when MCR[RFEN]=1 - #1 - - - - - BUF7I - Buffer MB7 Interrupt Or "Rx FIFO Overflow" - 7 - 1 - read-write - - - 0 - No occurrence of MB7 completing transmission/reception when MCR[RFEN]=0, or of Rx FIFO overflow when MCR[RFEN]=1 - #0 - - - 1 - MB7 completed transmission/reception when MCR[RFEN]=0, or Rx FIFO overflow when MCR[RFEN]=1 - #1 - - - - - BUF31TO8I - Buffer MBi Interrupt - 8 - 24 - read-write - - - - CTRL2 - Control 2 register - 0x34 - 32 - read-write - 0xA00000 - 0xFFFFFFFF - - - EDFLTDIS - Edge Filter Disable - 11 - 1 - read-write - - - 0 - Edge Filter is enabled. - #0 - - - 1 - Edge Filter is disabled. - #1 - - - - - ISOCANFDEN - ISO CAN FD Enable - 12 - 1 - read-write - - - 0 - FlexCAN operates using the non-ISO CAN FD protocol. - #0 - - - 1 - FlexCAN operates using the ISO CAN FD protocol (ISO 11898-1). - #1 - - - - - PREXCEN - Protocol Exception Enable - 14 - 1 - read-write - - - 0 - Protocol Exception is disabled. - #0 - - - 1 - Protocol Exception is enabled. - #1 - - - - - TIMER_SRC - Timer Source - 15 - 1 - read-write - - - 0 - The Free Running Timer is clocked by the CAN bit clock, which defines the baud rate on the CAN bus. - #0 - - - 1 - The Free Running Timer is clocked by an external time tick. The period can be either adjusted to be equal to the baud rate on the CAN bus, or a different value as required. See the device specific section for details about the external time tick. - #1 - - - - - EACEN - Entire Frame Arbitration Field Comparison Enable For Rx Mailboxes - 16 - 1 - read-write - - - 0 - Rx Mailbox filter's IDE bit is always compared and RTR is never compared despite mask bits. - #0 - - - 1 - Enables the comparison of both Rx Mailbox filter's IDE and RTR bit with their corresponding bits within the incoming frame. Mask bits do apply. - #1 - - - - - RRS - Remote Request Storing - 17 - 1 - read-write - - - 0 - Remote Response Frame is generated. - #0 - - - 1 - Remote Request Frame is stored. - #1 - - - - - MRP - Mailboxes Reception Priority - 18 - 1 - read-write - - - 0 - Matching starts from Rx FIFO and continues on Mailboxes. - #0 - - - 1 - Matching starts from Mailboxes and continues on Rx FIFO. - #1 - - - - - TASD - Tx Arbitration Start Delay - 19 - 5 - read-write - - - RFFN - Number Of Rx FIFO Filters - 24 - 4 - read-write - - - BOFFDONEMSK - Bus Off Done Interrupt Mask - 30 - 1 - read-write - - - 0 - Bus Off Done interrupt disabled. - #0 - - - 1 - Bus Off Done interrupt enabled. - #1 - - - - - ERRMSK_FAST - Error Interrupt Mask for errors detected in the Data Phase of fast CAN FD frames - 31 - 1 - read-write - - - 0 - ERRINT_FAST Error interrupt disabled. - #0 - - - 1 - ERRINT_FAST Error interrupt enabled. - #1 - - - - - - ESR2 - Error and Status 2 register - 0x38 - 32 - read-only - 0 - 0xFFFFFFFF - - - IMB - Inactive Mailbox - 13 - 1 - read-only - - - 0 - If ESR2[VPS] is asserted, the ESR2[LPTM] is not an inactive Mailbox. - #0 - - - 1 - If ESR2[VPS] is asserted, there is at least one inactive Mailbox. LPTM content is the number of the first one. - #1 - - - - - VPS - Valid Priority Status - 14 - 1 - read-only - - - 0 - Contents of IMB and LPTM are invalid. - #0 - - - 1 - Contents of IMB and LPTM are valid. - #1 - - - - - LPTM - Lowest Priority Tx Mailbox - 16 - 7 - read-only - - - - CRCR - CRC Register - 0x44 - 32 - read-only - 0 - 0xFFFFFFFF - - - TXCRC - Transmitted CRC value - 0 - 15 - read-only - - - MBCRC - CRC Mailbox - 16 - 7 - read-only - - - - RXFGMASK - Rx FIFO Global Mask register - 0x48 - 32 - read-write - 0 - 0 - - - FGM - Rx FIFO Global Mask Bits - 0 - 32 - read-write - - - - RXFIR - Rx FIFO Information Register - 0x4C - 32 - read-only - 0 - 0 - - - IDHIT - Identifier Acceptance Filter Hit Indicator - 0 - 9 - read-only - - - - CBT - CAN Bit Timing Register - 0x50 - 32 - read-write - 0 - 0xFFFFFFFF - - - EPSEG2 - Extended Phase Segment 2 - 0 - 5 - read-write - - - EPSEG1 - Extended Phase Segment 1 - 5 - 5 - read-write - - - EPROPSEG - Extended Propagation Segment - 10 - 6 - read-write - - - ERJW - Extended Resync Jump Width - 16 - 5 - read-write - - - EPRESDIV - Extended Prescaler Division Factor - 21 - 10 - read-write - - - BTF - Bit Timing Format Enable - 31 - 1 - read-write - - - 0 - Extended bit time definitions disabled. - #0 - - - 1 - Extended bit time definitions enabled. - #1 - - - - - - EmbeddedRAM%s - Embedded RAM - 0x80 - 32 - read-write - 0 - 0xFFFFFFFF - 128 - 4 - 0-127 - - - DATA_BYTE_3 - Data byte 3 of Rx/Tx frame. - 0 - 8 - read-write - - - DATA_BYTE_2 - Data byte 2 of Rx/Tx frame. - 8 - 8 - read-write - - - DATA_BYTE_1 - Data byte 1 of Rx/Tx frame. - 16 - 8 - read-write - - - DATA_BYTE_0 - Data byte 0 of Rx/Tx frame. - 24 - 8 - read-write - - - - RXIMR0 - Rx Individual Mask Registers - 0x880 - 32 - read-write - 0 - 0 - - - MI - Individual Mask Bits - 0 - 32 - read-write - - - - RXIMR1 - Rx Individual Mask Registers - 0x884 - 32 - read-write - 0 - 0 - - - MI - Individual Mask Bits - 0 - 32 - read-write - - - - RXIMR2 - Rx Individual Mask Registers - 0x888 - 32 - read-write - 0 - 0 - - - MI - Individual Mask Bits - 0 - 32 - read-write - - - - RXIMR3 - Rx Individual Mask Registers - 0x88C - 32 - read-write - 0 - 0 - - - MI - Individual Mask Bits - 0 - 32 - read-write - - - - RXIMR4 - Rx Individual Mask Registers - 0x890 - 32 - read-write - 0 - 0 - - - MI - Individual Mask Bits - 0 - 32 - read-write - - - - RXIMR5 - Rx Individual Mask Registers - 0x894 - 32 - read-write - 0 - 0 - - - MI - Individual Mask Bits - 0 - 32 - read-write - - - - RXIMR6 - Rx Individual Mask Registers - 0x898 - 32 - read-write - 0 - 0 - - - MI - Individual Mask Bits - 0 - 32 - read-write - - - - RXIMR7 - Rx Individual Mask Registers - 0x89C - 32 - read-write - 0 - 0 - - - MI - Individual Mask Bits - 0 - 32 - read-write - - - - RXIMR8 - Rx Individual Mask Registers - 0x8A0 - 32 - read-write - 0 - 0 - - - MI - Individual Mask Bits - 0 - 32 - read-write - - - - RXIMR9 - Rx Individual Mask Registers - 0x8A4 - 32 - read-write - 0 - 0 - - - MI - Individual Mask Bits - 0 - 32 - read-write - - - - RXIMR10 - Rx Individual Mask Registers - 0x8A8 - 32 - read-write - 0 - 0 - - - MI - Individual Mask Bits - 0 - 32 - read-write - - - - RXIMR11 - Rx Individual Mask Registers - 0x8AC - 32 - read-write - 0 - 0 - - - MI - Individual Mask Bits - 0 - 32 - read-write - - - - RXIMR12 - Rx Individual Mask Registers - 0x8B0 - 32 - read-write - 0 - 0 - - - MI - Individual Mask Bits - 0 - 32 - read-write - - - - RXIMR13 - Rx Individual Mask Registers - 0x8B4 - 32 - read-write - 0 - 0 - - - MI - Individual Mask Bits - 0 - 32 - read-write - - - - RXIMR14 - Rx Individual Mask Registers - 0x8B8 - 32 - read-write - 0 - 0 - - - MI - Individual Mask Bits - 0 - 32 - read-write - - - - RXIMR15 - Rx Individual Mask Registers - 0x8BC - 32 - read-write - 0 - 0 - - - MI - Individual Mask Bits - 0 - 32 - read-write - - - - CTRL1_PN - Pretended Networking Control 1 Register - 0xB00 - 32 - read-write - 0x100 - 0xFFFFFFFF - - - FCS - Filtering Combination Selection - 0 - 2 - read-write - - - 00 - Message ID filtering only - #00 - - - 01 - Message ID filtering and payload filtering - #01 - - - 10 - Message ID filtering occurring a specified number of times. - #10 - - - 11 - Message ID filtering and payload filtering a specified number of times - #11 - - - - - IDFS - ID Filtering Selection - 2 - 2 - read-write - - - 00 - Match upon a ID contents against an exact target value - #00 - - - 01 - Match upon a ID value greater than or equal to a specified target value - #01 - - - 10 - Match upon a ID value smaller than or equal to a specified target value - #10 - - - 11 - Match upon a ID value inside a range, greater than or equal to a specified lower limit and smaller than or equal a specified upper limit - #11 - - - - - PLFS - Payload Filtering Selection - 4 - 2 - read-write - - - 00 - Match upon a payload contents against an exact target value - #00 - - - 01 - Match upon a payload value greater than or equal to a specified target value - #01 - - - 10 - Match upon a payload value smaller than or equal to a specified target value - #10 - - - 11 - Match upon a payload value inside a range, greater than or equal to a specified lower limit and smaller than or equal a specified upper limit - #11 - - - - - NMATCH - Number of Messages Matching the Same Filtering Criteria - 8 - 8 - read-write - - - 00000001 - Received message must match the predefined filtering criteria for ID and/or PL once before generating a wake up event. - #1 - - - 00000010 - Received message must match the predefined filtering criteria for ID and/or PL twice before generating a wake up event. - #10 - - - 11111111 - Received message must match the predefined filtering criteria for ID and/or PL 255 times before generating a wake up event. - #11111111 - - - - - WUMF_MSK - Wake Up by Match Flag Mask Bit - 16 - 1 - read-write - - - 0 - Wake up match event is disabled - #0 - - - 1 - Wake up match event is enabled - #1 - - - - - WTOF_MSK - Wake Up by Timeout Flag Mask Bit - 17 - 1 - read-write - - - 0 - Timeout wake up event is disabled - #0 - - - 1 - Timeout wake up event is enabled - #1 - - - - - - CTRL2_PN - Pretended Networking Control 2 Register - 0xB04 - 32 - read-write - 0 - 0xFFFFFFFF - - - MATCHTO - Timeout for No Message Matching the Filtering Criteria - 0 - 16 - read-write - - - - WU_MTC - Pretended Networking Wake Up Match Register - 0xB08 - 32 - read-write - 0 - 0xFFFFFFFF - - - MCOUNTER - Number of Matches while in Pretended Networking - 8 - 8 - read-only - - - WUMF - Wake Up by Match Flag Bit - 16 - 1 - read-write - - - 0 - No wake up by match event detected - #0 - - - 1 - Wake up by match event detected - #1 - - - - - WTOF - Wake Up by Timeout Flag Bit - 17 - 1 - read-write - - - 0 - No wake up by timeout event detected - #0 - - - 1 - Wake up by timeout event detected - #1 - - - - - - FLT_ID1 - Pretended Networking ID Filter 1 Register - 0xB0C - 32 - read-write - 0 - 0xFFFFFFFF - - - FLT_ID1 - ID Filter 1 for Pretended Networking filtering - 0 - 29 - read-write - - - FLT_RTR - Remote Transmission Request Filter - 29 - 1 - read-write - - - 0 - Reject remote frame (accept data frame) - #0 - - - 1 - Accept remote frame - #1 - - - - - FLT_IDE - ID Extended Filter - 30 - 1 - read-write - - - 0 - Accept standard frame format - #0 - - - 1 - Accept extended frame format - #1 - - - - - - FLT_DLC - Pretended Networking DLC Filter Register - 0xB10 - 32 - read-write - 0x8 - 0xFFFFFFFF - - - FLT_DLC_HI - Upper Limit for Length of Data Bytes Filter - 0 - 4 - read-write - - - FLT_DLC_LO - Lower Limit for Length of Data Bytes Filter - 16 - 4 - read-write - - - - PL1_LO - Pretended Networking Payload Low Filter 1 Register - 0xB14 - 32 - read-write - 0 - 0xFFFFFFFF - - - Data_byte_3 - Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 3. - 0 - 8 - read-write - - - Data_byte_2 - Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 2. - 8 - 8 - read-write - - - Data_byte_1 - Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 1. - 16 - 8 - read-write - - - Data_byte_0 - Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 0. - 24 - 8 - read-write - - - - PL1_HI - Pretended Networking Payload High Filter 1 Register - 0xB18 - 32 - read-write - 0 - 0xFFFFFFFF - - - Data_byte_7 - Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 7. - 0 - 8 - read-write - - - Data_byte_6 - Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 6. - 8 - 8 - read-write - - - Data_byte_5 - Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 5. - 16 - 8 - read-write - - - Data_byte_4 - Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 4. - 24 - 8 - read-write - - - - FLT_ID2_IDMASK - Pretended Networking ID Filter 2 Register / ID Mask Register - 0xB1C - 32 - read-write - 0 - 0xFFFFFFFF - - - FLT_ID2_IDMASK - ID Filter 2 for Pretended Networking Filtering / ID Mask Bits for Pretended Networking ID Filtering - 0 - 29 - read-write - - - RTR_MSK - Remote Transmission Request Mask Bit - 29 - 1 - read-write - - - 0 - The corresponding bit in the filter is "don't care" - #0 - - - 1 - The corresponding bit in the filter is checked - #1 - - - - - IDE_MSK - ID Extended Mask Bit - 30 - 1 - read-write - - - 0 - The corresponding bit in the filter is "don't care" - #0 - - - 1 - The corresponding bit in the filter is checked - #1 - - - - - - PL2_PLMASK_LO - Pretended Networking Payload Low Filter 2 Register / Payload Low Mask Register - 0xB20 - 32 - read-write - 0 - 0xFFFFFFFF - - - Data_byte_3 - Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 3. - 0 - 8 - read-write - - - Data_byte_2 - Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 2. - 8 - 8 - read-write - - - Data_byte_1 - Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 1. - 16 - 8 - read-write - - - Data_byte_0 - Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 0. - 24 - 8 - read-write - - - - PL2_PLMASK_HI - Pretended Networking Payload High Filter 2 low order bits / Payload High Mask Register - 0xB24 - 32 - read-write - 0 - 0xFFFFFFFF - - - Data_byte_7 - Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 7. - 0 - 8 - read-write - - - Data_byte_6 - Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 6. - 8 - 8 - read-write - - - Data_byte_5 - Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 5. - 16 - 8 - read-write - - - Data_byte_4 - Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 4. - 24 - 8 - read-write - - - - WMB0_CS - Wake Up Message Buffer Register for C/S - 0xB40 - 32 - read-only - 0 - 0xFFFFFFFF - - - DLC - Length of Data in Bytes - 16 - 4 - read-only - - - RTR - Remote Transmission Request Bit - 20 - 1 - read-only - - - 0 - Frame is data one (not remote) - #0 - - - 1 - Frame is a remote one - #1 - - - - - IDE - ID Extended Bit - 21 - 1 - read-only - - - 0 - Frame format is standard - #0 - - - 1 - Frame format is extended - #1 - - - - - SRR - Substitute Remote Request - 22 - 1 - read-only - - - - WMB0_ID - Wake Up Message Buffer Register for ID - 0xB44 - 32 - read-only - 0 - 0xFFFFFFFF - - - ID - Received ID under Pretended Networking mode - 0 - 29 - read-only - - - - WMB0_D03 - Wake Up Message Buffer Register for Data 0-3 - 0xB48 - 32 - read-only - 0 - 0xFFFFFFFF - - - Data_byte_3 - Received payload corresponding to the data byte 3 under Pretended Networking mode - 0 - 8 - read-only - - - Data_byte_2 - Received payload corresponding to the data byte 2 under Pretended Networking mode - 8 - 8 - read-only - - - Data_byte_1 - Received payload corresponding to the data byte 1 under Pretended Networking mode - 16 - 8 - read-only - - - Data_byte_0 - Received payload corresponding to the data byte 0 under Pretended Networking mode - 24 - 8 - read-only - - - - WMB0_D47 - Wake Up Message Buffer Register Data 4-7 - 0xB4C - 32 - read-only - 0 - 0xFFFFFFFF - - - Data_byte_7 - Received payload corresponding to the data byte 7 under Pretended Networking mode - 0 - 8 - read-only - - - Data_byte_6 - Received payload corresponding to the data byte 6 under Pretended Networking mode - 8 - 8 - read-only - - - Data_byte_5 - Received payload corresponding to the data byte 5 under Pretended Networking mode - 16 - 8 - read-only - - - Data_byte_4 - Received payload corresponding to the data byte 4 under Pretended Networking mode - 24 - 8 - read-only - - - - WMB1_CS - Wake Up Message Buffer Register for C/S - 0xB50 - 32 - read-only - 0 - 0xFFFFFFFF - - - DLC - Length of Data in Bytes - 16 - 4 - read-only - - - RTR - Remote Transmission Request Bit - 20 - 1 - read-only - - - 0 - Frame is data one (not remote) - #0 - - - 1 - Frame is a remote one - #1 - - - - - IDE - ID Extended Bit - 21 - 1 - read-only - - - 0 - Frame format is standard - #0 - - - 1 - Frame format is extended - #1 - - - - - SRR - Substitute Remote Request - 22 - 1 - read-only - - - - WMB1_ID - Wake Up Message Buffer Register for ID - 0xB54 - 32 - read-only - 0 - 0xFFFFFFFF - - - ID - Received ID under Pretended Networking mode - 0 - 29 - read-only - - - - WMB1_D03 - Wake Up Message Buffer Register for Data 0-3 - 0xB58 - 32 - read-only - 0 - 0xFFFFFFFF - - - Data_byte_3 - Received payload corresponding to the data byte 3 under Pretended Networking mode - 0 - 8 - read-only - - - Data_byte_2 - Received payload corresponding to the data byte 2 under Pretended Networking mode - 8 - 8 - read-only - - - Data_byte_1 - Received payload corresponding to the data byte 1 under Pretended Networking mode - 16 - 8 - read-only - - - Data_byte_0 - Received payload corresponding to the data byte 0 under Pretended Networking mode - 24 - 8 - read-only - - - - WMB1_D47 - Wake Up Message Buffer Register Data 4-7 - 0xB5C - 32 - read-only - 0 - 0xFFFFFFFF - - - Data_byte_7 - Received payload corresponding to the data byte 7 under Pretended Networking mode - 0 - 8 - read-only - - - Data_byte_6 - Received payload corresponding to the data byte 6 under Pretended Networking mode - 8 - 8 - read-only - - - Data_byte_5 - Received payload corresponding to the data byte 5 under Pretended Networking mode - 16 - 8 - read-only - - - Data_byte_4 - Received payload corresponding to the data byte 4 under Pretended Networking mode - 24 - 8 - read-only - - - - WMB2_CS - Wake Up Message Buffer Register for C/S - 0xB60 - 32 - read-only - 0 - 0xFFFFFFFF - - - DLC - Length of Data in Bytes - 16 - 4 - read-only - - - RTR - Remote Transmission Request Bit - 20 - 1 - read-only - - - 0 - Frame is data one (not remote) - #0 - - - 1 - Frame is a remote one - #1 - - - - - IDE - ID Extended Bit - 21 - 1 - read-only - - - 0 - Frame format is standard - #0 - - - 1 - Frame format is extended - #1 - - - - - SRR - Substitute Remote Request - 22 - 1 - read-only - - - - WMB2_ID - Wake Up Message Buffer Register for ID - 0xB64 - 32 - read-only - 0 - 0xFFFFFFFF - - - ID - Received ID under Pretended Networking mode - 0 - 29 - read-only - - - - WMB2_D03 - Wake Up Message Buffer Register for Data 0-3 - 0xB68 - 32 - read-only - 0 - 0xFFFFFFFF - - - Data_byte_3 - Received payload corresponding to the data byte 3 under Pretended Networking mode - 0 - 8 - read-only - - - Data_byte_2 - Received payload corresponding to the data byte 2 under Pretended Networking mode - 8 - 8 - read-only - - - Data_byte_1 - Received payload corresponding to the data byte 1 under Pretended Networking mode - 16 - 8 - read-only - - - Data_byte_0 - Received payload corresponding to the data byte 0 under Pretended Networking mode - 24 - 8 - read-only - - - - WMB2_D47 - Wake Up Message Buffer Register Data 4-7 - 0xB6C - 32 - read-only - 0 - 0xFFFFFFFF - - - Data_byte_7 - Received payload corresponding to the data byte 7 under Pretended Networking mode - 0 - 8 - read-only - - - Data_byte_6 - Received payload corresponding to the data byte 6 under Pretended Networking mode - 8 - 8 - read-only - - - Data_byte_5 - Received payload corresponding to the data byte 5 under Pretended Networking mode - 16 - 8 - read-only - - - Data_byte_4 - Received payload corresponding to the data byte 4 under Pretended Networking mode - 24 - 8 - read-only - - - - WMB3_CS - Wake Up Message Buffer Register for C/S - 0xB70 - 32 - read-only - 0 - 0xFFFFFFFF - - - DLC - Length of Data in Bytes - 16 - 4 - read-only - - - RTR - Remote Transmission Request Bit - 20 - 1 - read-only - - - 0 - Frame is data one (not remote) - #0 - - - 1 - Frame is a remote one - #1 - - - - - IDE - ID Extended Bit - 21 - 1 - read-only - - - 0 - Frame format is standard - #0 - - - 1 - Frame format is extended - #1 - - - - - SRR - Substitute Remote Request - 22 - 1 - read-only - - - - WMB3_ID - Wake Up Message Buffer Register for ID - 0xB74 - 32 - read-only - 0 - 0xFFFFFFFF - - - ID - Received ID under Pretended Networking mode - 0 - 29 - read-only - - - - WMB3_D03 - Wake Up Message Buffer Register for Data 0-3 - 0xB78 - 32 - read-only - 0 - 0xFFFFFFFF - - - Data_byte_3 - Received payload corresponding to the data byte 3 under Pretended Networking mode - 0 - 8 - read-only - - - Data_byte_2 - Received payload corresponding to the data byte 2 under Pretended Networking mode - 8 - 8 - read-only - - - Data_byte_1 - Received payload corresponding to the data byte 1 under Pretended Networking mode - 16 - 8 - read-only - - - Data_byte_0 - Received payload corresponding to the data byte 0 under Pretended Networking mode - 24 - 8 - read-only - - - - WMB3_D47 - Wake Up Message Buffer Register Data 4-7 - 0xB7C - 32 - read-only - 0 - 0xFFFFFFFF - - - Data_byte_7 - Received payload corresponding to the data byte 7 under Pretended Networking mode - 0 - 8 - read-only - - - Data_byte_6 - Received payload corresponding to the data byte 6 under Pretended Networking mode - 8 - 8 - read-only - - - Data_byte_5 - Received payload corresponding to the data byte 5 under Pretended Networking mode - 16 - 8 - read-only - - - Data_byte_4 - Received payload corresponding to the data byte 4 under Pretended Networking mode - 24 - 8 - read-only - - - - FDCTRL - CAN FD Control Register - 0xC00 - 32 - read-write - 0x80000100 - 0xFFFFFFFF - - - TDCVAL - Transceiver Delay Compensation Value - 0 - 6 - read-only - - - TDCOFF - Transceiver Delay Compensation Offset - 8 - 5 - read-write - - - TDCFAIL - Transceiver Delay Compensation Fail - 14 - 1 - read-write - - - 0 - Measured loop delay is in range. - #0 - - - 1 - Measured loop delay is out of range. - #1 - - - - - TDCEN - Transceiver Delay Compensation Enable - 15 - 1 - read-write - - - 0 - TDC is disabled - #0 - - - 1 - TDC is enabled - #1 - - - - - MBDSR0 - Message Buffer Data Size for Region 0 - 16 - 2 - read-write - - - 00 - Selects 8 bytes per Message Buffer. - #00 - - - 01 - Selects 16 bytes per Message Buffer. - #01 - - - 10 - Selects 32 bytes per Message Buffer. - #10 - - - 11 - Selects 64 bytes per Message Buffer. - #11 - - - - - FDRATE - Bit Rate Switch Enable - 31 - 1 - read-write - - - 0 - Transmit a frame in nominal rate. The BRS bit in the Tx MB has no effect. - #0 - - - 1 - Transmit a frame with bit rate switching if the BRS bit in the Tx MB is recessive. - #1 - - - - - - FDCBT - CAN FD Bit Timing Register - 0xC04 - 32 - read-write - 0 - 0xFFFFFFFF - - - FPSEG2 - Fast Phase Segment 2 - 0 - 3 - read-write - - - FPSEG1 - Fast Phase Segment 1 - 5 - 3 - read-write - - - FPROPSEG - Fast Propagation Segment - 10 - 5 - read-write - - - FRJW - Fast Resync Jump Width - 16 - 3 - read-write - - - FPRESDIV - Fast Prescaler Division Factor - 20 - 10 - read-write - - - - FDCRC - CAN FD CRC Register - 0xC08 - 32 - read-only - 0 - 0xFFFFFFFF - - - FD_TXCRC - Extended Transmitted CRC value - 0 - 21 - read-only - - - FD_MBCRC - CRC Mailbox Number for FD_TXCRC - 24 - 7 - read-only - - - - - CAN2 + CAN2 Flex Controller Area Network module CAN CAN2_ 0x4002B000 - - 0 - 0xC0C - registers - - - CAN2_ORed - 92 - - - CAN2_Error - 93 - - - CAN2_ORed_0_15_MB - 95 - - - MCR - Module Configuration Register - 0 - 32 - read-write - 0xD890000F - 0xFFFFFFFF - - - MAXMB - Number Of The Last Message Buffer - 0 - 7 - read-write - - - IDAM - ID Acceptance Mode - 8 - 2 - read-write - - - 00 - Format A: One full ID (standard and extended) per ID Filter Table element. - #00 - - - 01 - Format B: Two full standard IDs or two partial 14-bit (standard and extended) IDs per ID Filter Table element. - #01 - - - 10 - Format C: Four partial 8-bit Standard IDs per ID Filter Table element. - #10 - - - 11 - Format D: All frames rejected. - #11 - - - - - FDEN - CAN FD operation enable - 11 - 1 - read-write - - - 1 - CAN FD is enabled. FlexCAN is able to receive and transmit messages in both CAN FD and CAN 2.0 formats. - #1 - - - 0 - CAN FD is disabled. FlexCAN is able to receive and transmit messages in CAN 2.0 format. - #0 - - - - - AEN - Abort Enable - 12 - 1 - read-write - - - 0 - Abort disabled. - #0 - - - 1 - Abort enabled. - #1 - - - - - LPRIOEN - Local Priority Enable - 13 - 1 - read-write - - - 0 - Local Priority disabled. - #0 - - - 1 - Local Priority enabled. - #1 - - - - - PNET_EN - Pretended Networking Enable - 14 - 1 - read-write - - - 0 - Pretended Networking mode is disabled. - #0 - - - 1 - Pretended Networking mode is enabled. - #1 - - - - - DMA - DMA Enable - 15 - 1 - read-write - - - 0 - DMA feature for RX FIFO disabled. - #0 - - - 1 - DMA feature for RX FIFO enabled. - #1 - - - - - IRMQ - Individual Rx Masking And Queue Enable - 16 - 1 - read-write - - - 0 - Individual Rx masking and queue feature are disabled. For backward compatibility with legacy applications, the reading of C/S word locks the MB even if it is EMPTY. - #0 - - - 1 - Individual Rx masking and queue feature are enabled. - #1 - - - - - SRXDIS - Self Reception Disable - 17 - 1 - read-write - - - 0 - Self reception enabled. - #0 - - - 1 - Self reception disabled. - #1 - - - - - LPMACK - Low-Power Mode Acknowledge - 20 - 1 - read-only - - - 0 - FlexCAN is not in a low-power mode. - #0 - - - 1 - FlexCAN is in a low-power mode. - #1 - - - - - WRNEN - Warning Interrupt Enable - 21 - 1 - read-write - - - 0 - TWRNINT and RWRNINT bits are zero, independent of the values in the error counters. - #0 - - - 1 - TWRNINT and RWRNINT bits are set when the respective error counter transitions from less than 96 to greater than or equal to 96. - #1 - - - - - SUPV - Supervisor Mode - 23 - 1 - read-write - - - FRZACK - Freeze Mode Acknowledge - 24 - 1 - read-only - - - 0 - FlexCAN not in Freeze mode, prescaler running. - #0 - - - 1 - FlexCAN in Freeze mode, prescaler stopped. - #1 - - - - - SOFTRST - Soft Reset - 25 - 1 - read-write - - - 0 - No reset request. - #0 - - - 1 - Resets the registers affected by soft reset. - #1 - - - - - NOTRDY - FlexCAN Not Ready - 27 - 1 - read-only - - - 0 - FlexCAN module is either in Normal mode, Listen-Only mode or Loop-Back mode. - #0 - - - - - HALT - Halt FlexCAN - 28 - 1 - read-write - - - 0 - No Freeze mode request. - #0 - - - 1 - Enters Freeze mode if the FRZ bit is asserted. - #1 - - - - - RFEN - Rx FIFO Enable - 29 - 1 - read-write - - - 0 - Rx FIFO not enabled. - #0 - - - 1 - Rx FIFO enabled. - #1 - - - - - FRZ - Freeze Enable - 30 - 1 - read-write - - - 0 - Not enabled to enter Freeze mode. - #0 - - - 1 - Enabled to enter Freeze mode. - #1 - - - - - MDIS - Module Disable - 31 - 1 - read-write - - - 0 - Enable the FlexCAN module. - #0 - - - 1 - Disable the FlexCAN module. - #1 - - - - - - CTRL1 - Control 1 register - 0x4 - 32 - read-write - 0 - 0xFFFFFFFF - - - PROPSEG - Propagation Segment - 0 - 3 - read-write - - - LOM - Listen-Only Mode - 3 - 1 - read-write - - - 0 - Listen-Only mode is deactivated. - #0 - - - 1 - FlexCAN module operates in Listen-Only mode. - #1 - - - - - LBUF - Lowest Buffer Transmitted First - 4 - 1 - read-write - - - 0 - Buffer with highest priority is transmitted first. - #0 - - - 1 - Lowest number buffer is transmitted first. - #1 - - - - - TSYN - Timer Sync - 5 - 1 - read-write - - - 0 - Timer Sync feature disabled - #0 - - - 1 - Timer Sync feature enabled - #1 - - - - - BOFFREC - Bus Off Recovery - 6 - 1 - read-write - - - 0 - Automatic recovering from Bus Off state enabled. - #0 - - - 1 - Automatic recovering from Bus Off state disabled. - #1 - - - - - SMP - CAN Bit Sampling - 7 - 1 - read-write - - - 0 - Just one sample is used to determine the bit value. - #0 - - - 1 - Three samples are used to determine the value of the received bit: the regular one (sample point) and 2 preceding samples; a majority rule is used. - #1 - - - - - RWRNMSK - Rx Warning Interrupt Mask - 10 - 1 - read-write - - - 0 - Rx Warning Interrupt disabled. - #0 - - - 1 - Rx Warning Interrupt enabled. - #1 - - - - - TWRNMSK - Tx Warning Interrupt Mask - 11 - 1 - read-write - - - 0 - Tx Warning Interrupt disabled. - #0 - - - 1 - Tx Warning Interrupt enabled. - #1 - - - - - LPB - Loop Back Mode - 12 - 1 - read-write - - - 0 - Loop Back disabled. - #0 - - - 1 - Loop Back enabled. - #1 - - - - - CLKSRC - CAN Engine Clock Source - 13 - 1 - read-write - - - 0 - The CAN engine clock source is the oscillator clock. Under this condition, the oscillator clock frequency must be lower than the bus clock. - #0 - - - 1 - The CAN engine clock source is the peripheral clock. - #1 - - - - - ERRMSK - Error Interrupt Mask - 14 - 1 - read-write - - - 0 - Error interrupt disabled. - #0 - - - 1 - Error interrupt enabled. - #1 - - - - - BOFFMSK - Bus Off Interrupt Mask - 15 - 1 - read-write - - - 0 - Bus Off interrupt disabled. - #0 - - - 1 - Bus Off interrupt enabled. - #1 - - - - - PSEG2 - Phase Segment 2 - 16 - 3 - read-write - - - PSEG1 - Phase Segment 1 - 19 - 3 - read-write - - - RJW - Resync Jump Width - 22 - 2 - read-write - - - PRESDIV - Prescaler Division Factor - 24 - 8 - read-write - - - - TIMER - Free Running Timer - 0x8 - 32 - read-write - 0 - 0xFFFFFFFF - - - TIMER - Timer Value - 0 - 16 - read-write - - - - RXMGMASK - Rx Mailboxes Global Mask Register - 0x10 - 32 - read-write - 0 - 0 - - - MG - Rx Mailboxes Global Mask Bits - 0 - 32 - read-write - - - - RX14MASK - Rx 14 Mask register - 0x14 - 32 - read-write - 0 - 0 - - - RX14M - Rx Buffer 14 Mask Bits - 0 - 32 - read-write - - - - RX15MASK - Rx 15 Mask register - 0x18 - 32 - read-write - 0 - 0 - - - RX15M - Rx Buffer 15 Mask Bits - 0 - 32 - read-write - - - - ECR - Error Counter - 0x1C - 32 - read-write - 0 - 0xFFFFFFFF - - - TXERRCNT - Transmit Error Counter - 0 - 8 - read-write - - - RXERRCNT - Receive Error Counter - 8 - 8 - read-write - - - TXERRCNT_FAST - Transmit Error Counter for fast bits - 16 - 8 - read-write - - - RXERRCNT_FAST - Receive Error Counter for fast bits - 24 - 8 - read-write - - - - ESR1 - Error and Status 1 register - 0x20 - 32 - read-write - 0 - 0xFFFFFFFF - - - ERRINT - Error Interrupt - 1 - 1 - read-write - - - 0 - No such occurrence. - #0 - - - 1 - Indicates setting of any Error Bit in the Error and Status Register. - #1 - - - - - BOFFINT - Bus Off Interrupt - 2 - 1 - read-write - - - 0 - No such occurrence. - #0 - - - 1 - FlexCAN module entered Bus Off state. - #1 - - - - - RX - FlexCAN In Reception - 3 - 1 - read-only - - - 0 - FlexCAN is not receiving a message. - #0 - - - 1 - FlexCAN is receiving a message. - #1 - - - - - FLTCONF - Fault Confinement State - 4 - 2 - read-only - - - 00 - Error Active - #00 - - - 01 - Error Passive - #01 - - - 1x - Bus Off - #1x - - - - - TX - FlexCAN In Transmission - 6 - 1 - read-only - - - 0 - FlexCAN is not transmitting a message. - #0 - - - 1 - FlexCAN is transmitting a message. - #1 - - - - - IDLE - IDLE - 7 - 1 - read-only - - - 0 - No such occurrence. - #0 - - - 1 - CAN bus is now IDLE. - #1 - - - - - RXWRN - Rx Error Warning - 8 - 1 - read-only - - - 0 - No such occurrence. - #0 - - - 1 - RXERRCNT is greater than or equal to 96. - #1 - - - - - TXWRN - TX Error Warning - 9 - 1 - read-only - - - 0 - No such occurrence. - #0 - - - 1 - TXERRCNT is greater than or equal to 96. - #1 - - - - - STFERR - Stuffing Error - 10 - 1 - read-only - - - 0 - No such occurrence. - #0 - - - 1 - A Stuffing Error occurred since last read of this register. - #1 - - - - - FRMERR - Form Error - 11 - 1 - read-only - - - 0 - No such occurrence. - #0 - - - 1 - A Form Error occurred since last read of this register. - #1 - - - - - CRCERR - Cyclic Redundancy Check Error - 12 - 1 - read-only - - - 0 - No such occurrence. - #0 - - - 1 - A CRC error occurred since last read of this register. - #1 - - - - - ACKERR - Acknowledge Error - 13 - 1 - read-only - - - 0 - No such occurrence. - #0 - - - 1 - An ACK error occurred since last read of this register. - #1 - - - - - BIT0ERR - Bit0 Error - 14 - 1 - read-only - - - 0 - No such occurrence. - #0 - - - 1 - At least one bit sent as dominant is received as recessive. - #1 - - - - - BIT1ERR - Bit1 Error - 15 - 1 - read-only - - - 0 - No such occurrence. - #0 - - - 1 - At least one bit sent as recessive is received as dominant. - #1 - - - - - RWRNINT - Rx Warning Interrupt Flag - 16 - 1 - read-write - - - 0 - No such occurrence. - #0 - - - 1 - The Rx error counter transitioned from less than 96 to greater than or equal to 96. - #1 - - - - - TWRNINT - Tx Warning Interrupt Flag - 17 - 1 - read-write - - - 0 - No such occurrence. - #0 - - - 1 - The Tx error counter transitioned from less than 96 to greater than or equal to 96. - #1 - - - - - SYNCH - CAN Synchronization Status - 18 - 1 - read-only - - - 0 - FlexCAN is not synchronized to the CAN bus. - #0 - - - 1 - FlexCAN is synchronized to the CAN bus. - #1 - - - - - BOFFDONEINT - Bus Off Done Interrupt - 19 - 1 - read-write - - - 0 - No such occurrence. - #0 - - - 1 - FlexCAN module has completed Bus Off process. - #1 - - - - - ERRINT_FAST - Error Interrupt for errors detected in the Data Phase of CAN FD frames with the BRS bit set - 20 - 1 - read-write - - - 0 - No such occurrence. - #0 - - - 1 - Indicates setting of any Error Bit detected in the Data Phase of CAN FD frames with the BRS bit set. - #1 - - - - - ERROVR - Error Overrun bit - 21 - 1 - read-write - - - 0 - Overrun has not occurred. - #0 - - - 1 - Overrun has occurred. - #1 - - - - - STFERR_FAST - Stuffing Error in the Data Phase of CAN FD frames with the BRS bit set - 26 - 1 - read-only - - - 0 - No such occurrence. - #0 - - - 1 - A Stuffing Error occurred since last read of this register. - #1 - - - - - FRMERR_FAST - Form Error in the Data Phase of CAN FD frames with the BRS bit set - 27 - 1 - read-only - - - 0 - No such occurrence. - #0 - - - 1 - A Form Error occurred since last read of this register. - #1 - - - - - CRCERR_FAST - Cyclic Redundancy Check Error in the CRC field of CAN FD frames with the BRS bit set - 28 - 1 - read-only - - - 0 - No such occurrence. - #0 - - - 1 - A CRC error occurred since last read of this register. - #1 - - - - - BIT0ERR_FAST - Bit0 Error in the Data Phase of CAN FD frames with the BRS bit set - 30 - 1 - read-only - - - 0 - No such occurrence. - #0 - - - 1 - At least one bit sent as dominant is received as recessive. - #1 - - - - - BIT1ERR_FAST - Bit1 Error in the Data Phase of CAN FD frames with the BRS bit set - 31 - 1 - read-only - - - 0 - No such occurrence. - #0 - - - 1 - At least one bit sent as recessive is received as dominant. - #1 - - - - - - IMASK1 - Interrupt Masks 1 register - 0x28 - 32 - read-write - 0 - 0xFFFFFFFF - - - BUF31TO0M - Buffer MB i Mask - 0 - 32 - read-write - - - - IFLAG1 - Interrupt Flags 1 register - 0x30 - 32 - read-write - 0 - 0xFFFFFFFF - - - BUF0I - Buffer MB0 Interrupt Or Clear FIFO bit - 0 - 1 - read-write - - - 0 - The corresponding buffer has no occurrence of successfully completed transmission or reception when MCR[RFEN]=0. - #0 - - - 1 - The corresponding buffer has successfully completed transmission or reception when MCR[RFEN]=0. - #1 - - - - - BUF4TO1I - Buffer MB i Interrupt Or "reserved" - 1 - 4 - read-write - - - BUF5I - Buffer MB5 Interrupt Or "Frames available in Rx FIFO" - 5 - 1 - read-write - - - 0 - No occurrence of MB5 completing transmission/reception when MCR[RFEN]=0, or of frame(s) available in the FIFO, when MCR[RFEN]=1 - #0 - - - 1 - MB5 completed transmission/reception when MCR[RFEN]=0, or frame(s) available in the Rx FIFO when MCR[RFEN]=1. It generates a DMA request in case of MCR[RFEN] and MCR[DMA] are enabled. - #1 - - - - - BUF6I - Buffer MB6 Interrupt Or "Rx FIFO Warning" - 6 - 1 - read-write - - - 0 - No occurrence of MB6 completing transmission/reception when MCR[RFEN]=0, or of Rx FIFO almost full when MCR[RFEN]=1 - #0 - - - 1 - MB6 completed transmission/reception when MCR[RFEN]=0, or Rx FIFO almost full when MCR[RFEN]=1 - #1 - - - - - BUF7I - Buffer MB7 Interrupt Or "Rx FIFO Overflow" - 7 - 1 - read-write - - - 0 - No occurrence of MB7 completing transmission/reception when MCR[RFEN]=0, or of Rx FIFO overflow when MCR[RFEN]=1 - #0 - - - 1 - MB7 completed transmission/reception when MCR[RFEN]=0, or Rx FIFO overflow when MCR[RFEN]=1 - #1 - - - - - BUF31TO8I - Buffer MBi Interrupt - 8 - 24 - read-write - - - - CTRL2 - Control 2 register - 0x34 - 32 - read-write - 0xA00000 - 0xFFFFFFFF - - - EDFLTDIS - Edge Filter Disable - 11 - 1 - read-write - - - 0 - Edge Filter is enabled. - #0 - - - 1 - Edge Filter is disabled. - #1 - - - - - ISOCANFDEN - ISO CAN FD Enable - 12 - 1 - read-write - - - 0 - FlexCAN operates using the non-ISO CAN FD protocol. - #0 - - - 1 - FlexCAN operates using the ISO CAN FD protocol (ISO 11898-1). - #1 - - - - - PREXCEN - Protocol Exception Enable - 14 - 1 - read-write - - - 0 - Protocol Exception is disabled. - #0 - - - 1 - Protocol Exception is enabled. - #1 - - - - - TIMER_SRC - Timer Source - 15 - 1 - read-write - - - 0 - The Free Running Timer is clocked by the CAN bit clock, which defines the baud rate on the CAN bus. - #0 - - - 1 - The Free Running Timer is clocked by an external time tick. The period can be either adjusted to be equal to the baud rate on the CAN bus, or a different value as required. See the device specific section for details about the external time tick. - #1 - - - - - EACEN - Entire Frame Arbitration Field Comparison Enable For Rx Mailboxes - 16 - 1 - read-write - - - 0 - Rx Mailbox filter's IDE bit is always compared and RTR is never compared despite mask bits. - #0 - - - 1 - Enables the comparison of both Rx Mailbox filter's IDE and RTR bit with their corresponding bits within the incoming frame. Mask bits do apply. - #1 - - - - - RRS - Remote Request Storing - 17 - 1 - read-write - - - 0 - Remote Response Frame is generated. - #0 - - - 1 - Remote Request Frame is stored. - #1 - - - - - MRP - Mailboxes Reception Priority - 18 - 1 - read-write - - - 0 - Matching starts from Rx FIFO and continues on Mailboxes. - #0 - - - 1 - Matching starts from Mailboxes and continues on Rx FIFO. - #1 - - - - - TASD - Tx Arbitration Start Delay - 19 - 5 - read-write - - - RFFN - Number Of Rx FIFO Filters - 24 - 4 - read-write - - - BOFFDONEMSK - Bus Off Done Interrupt Mask - 30 - 1 - read-write - - - 0 - Bus Off Done interrupt disabled. - #0 - - - 1 - Bus Off Done interrupt enabled. - #1 - - - - - ERRMSK_FAST - Error Interrupt Mask for errors detected in the Data Phase of fast CAN FD frames - 31 - 1 - read-write - - - 0 - ERRINT_FAST Error interrupt disabled. - #0 - - - 1 - ERRINT_FAST Error interrupt enabled. - #1 - - - - - - ESR2 - Error and Status 2 register - 0x38 - 32 - read-only - 0 - 0xFFFFFFFF - - - IMB - Inactive Mailbox - 13 - 1 - read-only - - - 0 - If ESR2[VPS] is asserted, the ESR2[LPTM] is not an inactive Mailbox. - #0 - - - 1 - If ESR2[VPS] is asserted, there is at least one inactive Mailbox. LPTM content is the number of the first one. - #1 - - - - - VPS - Valid Priority Status - 14 - 1 - read-only - - - 0 - Contents of IMB and LPTM are invalid. - #0 - - - 1 - Contents of IMB and LPTM are valid. - #1 - - - - - LPTM - Lowest Priority Tx Mailbox - 16 - 7 - read-only - - - - CRCR - CRC Register - 0x44 - 32 - read-only - 0 - 0xFFFFFFFF - - - TXCRC - Transmitted CRC value - 0 - 15 - read-only - - - MBCRC - CRC Mailbox - 16 - 7 - read-only - - - - RXFGMASK - Rx FIFO Global Mask register - 0x48 - 32 - read-write - 0 - 0 - - - FGM - Rx FIFO Global Mask Bits - 0 - 32 - read-write - - - - RXFIR - Rx FIFO Information Register - 0x4C - 32 - read-only - 0 - 0 - - - IDHIT - Identifier Acceptance Filter Hit Indicator - 0 - 9 - read-only - - - - CBT - CAN Bit Timing Register - 0x50 - 32 - read-write - 0 - 0xFFFFFFFF - - - EPSEG2 - Extended Phase Segment 2 - 0 - 5 - read-write - - - EPSEG1 - Extended Phase Segment 1 - 5 - 5 - read-write - - - EPROPSEG - Extended Propagation Segment - 10 - 6 - read-write - - - ERJW - Extended Resync Jump Width - 16 - 5 - read-write - - - EPRESDIV - Extended Prescaler Division Factor - 21 - 10 - read-write - - - BTF - Bit Timing Format Enable - 31 - 1 - read-write - - - 0 - Extended bit time definitions disabled. - #0 - - - 1 - Extended bit time definitions enabled. - #1 - - - - - - EmbeddedRAM%s - Embedded RAM - 0x80 - 32 - read-write - 0 - 0xFFFFFFFF - 128 - 4 - 0-127 - - - DATA_BYTE_3 - Data byte 3 of Rx/Tx frame. - 0 - 8 - read-write - - - DATA_BYTE_2 - Data byte 2 of Rx/Tx frame. - 8 - 8 - read-write - - - DATA_BYTE_1 - Data byte 1 of Rx/Tx frame. - 16 - 8 - read-write - - - DATA_BYTE_0 - Data byte 0 of Rx/Tx frame. - 24 - 8 - read-write - - - - RXIMR0 - Rx Individual Mask Registers - 0x880 - 32 - read-write - 0 - 0 - - - MI - Individual Mask Bits - 0 - 32 - read-write - - - - RXIMR1 - Rx Individual Mask Registers - 0x884 - 32 - read-write - 0 - 0 - - - MI - Individual Mask Bits - 0 - 32 - read-write - - - - RXIMR2 - Rx Individual Mask Registers - 0x888 - 32 - read-write - 0 - 0 - - - MI - Individual Mask Bits - 0 - 32 - read-write - - - - RXIMR3 - Rx Individual Mask Registers - 0x88C - 32 - read-write - 0 - 0 - - - MI - Individual Mask Bits - 0 - 32 - read-write - - - - RXIMR4 - Rx Individual Mask Registers - 0x890 - 32 - read-write - 0 - 0 - - - MI - Individual Mask Bits - 0 - 32 - read-write - - - - RXIMR5 - Rx Individual Mask Registers - 0x894 - 32 - read-write - 0 - 0 - - - MI - Individual Mask Bits - 0 - 32 - read-write - - - - RXIMR6 - Rx Individual Mask Registers - 0x898 - 32 - read-write - 0 - 0 - - - MI - Individual Mask Bits - 0 - 32 - read-write - - - - RXIMR7 - Rx Individual Mask Registers - 0x89C - 32 - read-write - 0 - 0 - - - MI - Individual Mask Bits - 0 - 32 - read-write - - - - RXIMR8 - Rx Individual Mask Registers - 0x8A0 - 32 - read-write - 0 - 0 - - - MI - Individual Mask Bits - 0 - 32 - read-write - - - - RXIMR9 - Rx Individual Mask Registers - 0x8A4 - 32 - read-write - 0 - 0 - - - MI - Individual Mask Bits - 0 - 32 - read-write - - - - RXIMR10 - Rx Individual Mask Registers - 0x8A8 - 32 - read-write - 0 - 0 - - - MI - Individual Mask Bits - 0 - 32 - read-write - - - - RXIMR11 - Rx Individual Mask Registers - 0x8AC - 32 - read-write - 0 - 0 - - - MI - Individual Mask Bits - 0 - 32 - read-write - - - - RXIMR12 - Rx Individual Mask Registers - 0x8B0 - 32 - read-write - 0 - 0 - - - MI - Individual Mask Bits - 0 - 32 - read-write - - - - RXIMR13 - Rx Individual Mask Registers - 0x8B4 - 32 - read-write - 0 - 0 - - - MI - Individual Mask Bits - 0 - 32 - read-write - - - - RXIMR14 - Rx Individual Mask Registers - 0x8B8 - 32 - read-write - 0 - 0 - - - MI - Individual Mask Bits - 0 - 32 - read-write - - - - RXIMR15 - Rx Individual Mask Registers - 0x8BC - 32 - read-write - 0 - 0 - - - MI - Individual Mask Bits - 0 - 32 - read-write - - - - CTRL1_PN - Pretended Networking Control 1 Register - 0xB00 - 32 - read-write - 0x100 - 0xFFFFFFFF - - - FCS - Filtering Combination Selection - 0 - 2 - read-write - - - 00 - Message ID filtering only - #00 - - - 01 - Message ID filtering and payload filtering - #01 - - - 10 - Message ID filtering occurring a specified number of times. - #10 - - - 11 - Message ID filtering and payload filtering a specified number of times - #11 - - - - - IDFS - ID Filtering Selection - 2 - 2 - read-write - - - 00 - Match upon a ID contents against an exact target value - #00 - - - 01 - Match upon a ID value greater than or equal to a specified target value - #01 - - - 10 - Match upon a ID value smaller than or equal to a specified target value - #10 - - - 11 - Match upon a ID value inside a range, greater than or equal to a specified lower limit and smaller than or equal a specified upper limit - #11 - - - - - PLFS - Payload Filtering Selection - 4 - 2 - read-write - - - 00 - Match upon a payload contents against an exact target value - #00 - - - 01 - Match upon a payload value greater than or equal to a specified target value - #01 - - - 10 - Match upon a payload value smaller than or equal to a specified target value - #10 - - - 11 - Match upon a payload value inside a range, greater than or equal to a specified lower limit and smaller than or equal a specified upper limit - #11 - - - - - NMATCH - Number of Messages Matching the Same Filtering Criteria - 8 - 8 - read-write - - - 00000001 - Received message must match the predefined filtering criteria for ID and/or PL once before generating a wake up event. - #1 - - - 00000010 - Received message must match the predefined filtering criteria for ID and/or PL twice before generating a wake up event. - #10 - - - 11111111 - Received message must match the predefined filtering criteria for ID and/or PL 255 times before generating a wake up event. - #11111111 - - - - - WUMF_MSK - Wake Up by Match Flag Mask Bit - 16 - 1 - read-write - - - 0 - Wake up match event is disabled - #0 - - - 1 - Wake up match event is enabled - #1 - - - - - WTOF_MSK - Wake Up by Timeout Flag Mask Bit - 17 - 1 - read-write - - - 0 - Timeout wake up event is disabled - #0 - - - 1 - Timeout wake up event is enabled - #1 - - - - - - CTRL2_PN - Pretended Networking Control 2 Register - 0xB04 - 32 - read-write - 0 - 0xFFFFFFFF - - - MATCHTO - Timeout for No Message Matching the Filtering Criteria - 0 - 16 - read-write - - - - WU_MTC - Pretended Networking Wake Up Match Register - 0xB08 - 32 - read-write - 0 - 0xFFFFFFFF - - - MCOUNTER - Number of Matches while in Pretended Networking - 8 - 8 - read-only - - - WUMF - Wake Up by Match Flag Bit - 16 - 1 - read-write - - - 0 - No wake up by match event detected - #0 - - - 1 - Wake up by match event detected - #1 - - - - - WTOF - Wake Up by Timeout Flag Bit - 17 - 1 - read-write - - - 0 - No wake up by timeout event detected - #0 - - - 1 - Wake up by timeout event detected - #1 - - - - - - FLT_ID1 - Pretended Networking ID Filter 1 Register - 0xB0C - 32 - read-write - 0 - 0xFFFFFFFF - - - FLT_ID1 - ID Filter 1 for Pretended Networking filtering - 0 - 29 - read-write - - - FLT_RTR - Remote Transmission Request Filter - 29 - 1 - read-write - - - 0 - Reject remote frame (accept data frame) - #0 - - - 1 - Accept remote frame - #1 - - - - - FLT_IDE - ID Extended Filter - 30 - 1 - read-write - - - 0 - Accept standard frame format - #0 - - - 1 - Accept extended frame format - #1 - - - - - - FLT_DLC - Pretended Networking DLC Filter Register - 0xB10 - 32 - read-write - 0x8 - 0xFFFFFFFF - - - FLT_DLC_HI - Upper Limit for Length of Data Bytes Filter - 0 - 4 - read-write - - - FLT_DLC_LO - Lower Limit for Length of Data Bytes Filter - 16 - 4 - read-write - - - - PL1_LO - Pretended Networking Payload Low Filter 1 Register - 0xB14 - 32 - read-write - 0 - 0xFFFFFFFF - - - Data_byte_3 - Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 3. - 0 - 8 - read-write - - - Data_byte_2 - Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 2. - 8 - 8 - read-write - - - Data_byte_1 - Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 1. - 16 - 8 - read-write - - - Data_byte_0 - Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 0. - 24 - 8 - read-write - - - - PL1_HI - Pretended Networking Payload High Filter 1 Register - 0xB18 - 32 - read-write - 0 - 0xFFFFFFFF - - - Data_byte_7 - Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 7. - 0 - 8 - read-write - - - Data_byte_6 - Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 6. - 8 - 8 - read-write - - - Data_byte_5 - Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 5. - 16 - 8 - read-write - - - Data_byte_4 - Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 4. - 24 - 8 - read-write - - - - FLT_ID2_IDMASK - Pretended Networking ID Filter 2 Register / ID Mask Register - 0xB1C - 32 - read-write - 0 - 0xFFFFFFFF - - - FLT_ID2_IDMASK - ID Filter 2 for Pretended Networking Filtering / ID Mask Bits for Pretended Networking ID Filtering - 0 - 29 - read-write - - - RTR_MSK - Remote Transmission Request Mask Bit - 29 - 1 - read-write - - - 0 - The corresponding bit in the filter is "don't care" - #0 - - - 1 - The corresponding bit in the filter is checked - #1 - - - - - IDE_MSK - ID Extended Mask Bit - 30 - 1 - read-write - - - 0 - The corresponding bit in the filter is "don't care" - #0 - - - 1 - The corresponding bit in the filter is checked - #1 - - - - - - PL2_PLMASK_LO - Pretended Networking Payload Low Filter 2 Register / Payload Low Mask Register - 0xB20 - 32 - read-write - 0 - 0xFFFFFFFF - - - Data_byte_3 - Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 3. - 0 - 8 - read-write - - - Data_byte_2 - Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 2. - 8 - 8 - read-write - - - Data_byte_1 - Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 1. - 16 - 8 - read-write - - - Data_byte_0 - Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 0. - 24 - 8 - read-write - - - - PL2_PLMASK_HI - Pretended Networking Payload High Filter 2 low order bits / Payload High Mask Register - 0xB24 - 32 - read-write - 0 - 0xFFFFFFFF - - - Data_byte_7 - Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 7. - 0 - 8 - read-write - - - Data_byte_6 - Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 6. - 8 - 8 - read-write - - - Data_byte_5 - Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 5. - 16 - 8 - read-write - - - Data_byte_4 - Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 4. - 24 - 8 - read-write - - - - WMB0_CS - Wake Up Message Buffer Register for C/S - 0xB40 - 32 - read-only - 0 - 0xFFFFFFFF - - - DLC - Length of Data in Bytes - 16 - 4 - read-only - - - RTR - Remote Transmission Request Bit - 20 - 1 - read-only - - - 0 - Frame is data one (not remote) - #0 - - - 1 - Frame is a remote one - #1 - - - - - IDE - ID Extended Bit - 21 - 1 - read-only - - - 0 - Frame format is standard - #0 - - - 1 - Frame format is extended - #1 - - - - - SRR - Substitute Remote Request - 22 - 1 - read-only - - - - WMB0_ID - Wake Up Message Buffer Register for ID - 0xB44 - 32 - read-only - 0 - 0xFFFFFFFF - - - ID - Received ID under Pretended Networking mode - 0 - 29 - read-only - - - - WMB0_D03 - Wake Up Message Buffer Register for Data 0-3 - 0xB48 - 32 - read-only - 0 - 0xFFFFFFFF - - - Data_byte_3 - Received payload corresponding to the data byte 3 under Pretended Networking mode - 0 - 8 - read-only - - - Data_byte_2 - Received payload corresponding to the data byte 2 under Pretended Networking mode - 8 - 8 - read-only - - - Data_byte_1 - Received payload corresponding to the data byte 1 under Pretended Networking mode - 16 - 8 - read-only - - - Data_byte_0 - Received payload corresponding to the data byte 0 under Pretended Networking mode - 24 - 8 - read-only - - - - WMB0_D47 - Wake Up Message Buffer Register Data 4-7 - 0xB4C - 32 - read-only - 0 - 0xFFFFFFFF - - - Data_byte_7 - Received payload corresponding to the data byte 7 under Pretended Networking mode - 0 - 8 - read-only - - - Data_byte_6 - Received payload corresponding to the data byte 6 under Pretended Networking mode - 8 - 8 - read-only - - - Data_byte_5 - Received payload corresponding to the data byte 5 under Pretended Networking mode - 16 - 8 - read-only - - - Data_byte_4 - Received payload corresponding to the data byte 4 under Pretended Networking mode - 24 - 8 - read-only - - - - WMB1_CS - Wake Up Message Buffer Register for C/S - 0xB50 - 32 - read-only - 0 - 0xFFFFFFFF - - - DLC - Length of Data in Bytes - 16 - 4 - read-only - - - RTR - Remote Transmission Request Bit - 20 - 1 - read-only - - - 0 - Frame is data one (not remote) - #0 - - - 1 - Frame is a remote one - #1 - - - - - IDE - ID Extended Bit - 21 - 1 - read-only - - - 0 - Frame format is standard - #0 - - - 1 - Frame format is extended - #1 - - - - - SRR - Substitute Remote Request - 22 - 1 - read-only - - - - WMB1_ID - Wake Up Message Buffer Register for ID - 0xB54 - 32 - read-only - 0 - 0xFFFFFFFF - - - ID - Received ID under Pretended Networking mode - 0 - 29 - read-only - - - - WMB1_D03 - Wake Up Message Buffer Register for Data 0-3 - 0xB58 - 32 - read-only - 0 - 0xFFFFFFFF - - - Data_byte_3 - Received payload corresponding to the data byte 3 under Pretended Networking mode - 0 - 8 - read-only - - - Data_byte_2 - Received payload corresponding to the data byte 2 under Pretended Networking mode - 8 - 8 - read-only - - - Data_byte_1 - Received payload corresponding to the data byte 1 under Pretended Networking mode - 16 - 8 - read-only - - - Data_byte_0 - Received payload corresponding to the data byte 0 under Pretended Networking mode - 24 - 8 - read-only - - - - WMB1_D47 - Wake Up Message Buffer Register Data 4-7 - 0xB5C - 32 - read-only - 0 - 0xFFFFFFFF - - - Data_byte_7 - Received payload corresponding to the data byte 7 under Pretended Networking mode - 0 - 8 - read-only - - - Data_byte_6 - Received payload corresponding to the data byte 6 under Pretended Networking mode - 8 - 8 - read-only - - - Data_byte_5 - Received payload corresponding to the data byte 5 under Pretended Networking mode - 16 - 8 - read-only - - - Data_byte_4 - Received payload corresponding to the data byte 4 under Pretended Networking mode - 24 - 8 - read-only - - - - WMB2_CS - Wake Up Message Buffer Register for C/S - 0xB60 - 32 - read-only - 0 - 0xFFFFFFFF - - - DLC - Length of Data in Bytes - 16 - 4 - read-only - - - RTR - Remote Transmission Request Bit - 20 - 1 - read-only - - - 0 - Frame is data one (not remote) - #0 - - - 1 - Frame is a remote one - #1 - - - - - IDE - ID Extended Bit - 21 - 1 - read-only - - - 0 - Frame format is standard - #0 - - - 1 - Frame format is extended - #1 - - - - - SRR - Substitute Remote Request - 22 - 1 - read-only - - - - WMB2_ID - Wake Up Message Buffer Register for ID - 0xB64 - 32 - read-only - 0 - 0xFFFFFFFF - - - ID - Received ID under Pretended Networking mode - 0 - 29 - read-only - - - - WMB2_D03 - Wake Up Message Buffer Register for Data 0-3 - 0xB68 - 32 - read-only - 0 - 0xFFFFFFFF - - - Data_byte_3 - Received payload corresponding to the data byte 3 under Pretended Networking mode - 0 - 8 - read-only - - - Data_byte_2 - Received payload corresponding to the data byte 2 under Pretended Networking mode - 8 - 8 - read-only - - - Data_byte_1 - Received payload corresponding to the data byte 1 under Pretended Networking mode - 16 - 8 - read-only - - - Data_byte_0 - Received payload corresponding to the data byte 0 under Pretended Networking mode - 24 - 8 - read-only - - - - WMB2_D47 - Wake Up Message Buffer Register Data 4-7 - 0xB6C - 32 - read-only - 0 - 0xFFFFFFFF - - - Data_byte_7 - Received payload corresponding to the data byte 7 under Pretended Networking mode - 0 - 8 - read-only - - - Data_byte_6 - Received payload corresponding to the data byte 6 under Pretended Networking mode - 8 - 8 - read-only - - - Data_byte_5 - Received payload corresponding to the data byte 5 under Pretended Networking mode - 16 - 8 - read-only - - - Data_byte_4 - Received payload corresponding to the data byte 4 under Pretended Networking mode - 24 - 8 - read-only - - - - WMB3_CS - Wake Up Message Buffer Register for C/S - 0xB70 - 32 - read-only - 0 - 0xFFFFFFFF - - - DLC - Length of Data in Bytes - 16 - 4 - read-only - - - RTR - Remote Transmission Request Bit - 20 - 1 - read-only - - - 0 - Frame is data one (not remote) - #0 - - - 1 - Frame is a remote one - #1 - - - - - IDE - ID Extended Bit - 21 - 1 - read-only - - - 0 - Frame format is standard - #0 - - - 1 - Frame format is extended - #1 - - - - - SRR - Substitute Remote Request - 22 - 1 - read-only - - - - WMB3_ID - Wake Up Message Buffer Register for ID - 0xB74 - 32 - read-only - 0 - 0xFFFFFFFF - - - ID - Received ID under Pretended Networking mode - 0 - 29 - read-only - - - - WMB3_D03 - Wake Up Message Buffer Register for Data 0-3 - 0xB78 - 32 - read-only - 0 - 0xFFFFFFFF - - - Data_byte_3 - Received payload corresponding to the data byte 3 under Pretended Networking mode - 0 - 8 - read-only - - - Data_byte_2 - Received payload corresponding to the data byte 2 under Pretended Networking mode - 8 - 8 - read-only - - - Data_byte_1 - Received payload corresponding to the data byte 1 under Pretended Networking mode - 16 - 8 - read-only - - - Data_byte_0 - Received payload corresponding to the data byte 0 under Pretended Networking mode - 24 - 8 - read-only - - - - WMB3_D47 - Wake Up Message Buffer Register Data 4-7 - 0xB7C - 32 - read-only - 0 - 0xFFFFFFFF - - - Data_byte_7 - Received payload corresponding to the data byte 7 under Pretended Networking mode - 0 - 8 - read-only - - - Data_byte_6 - Received payload corresponding to the data byte 6 under Pretended Networking mode - 8 - 8 - read-only - - - Data_byte_5 - Received payload corresponding to the data byte 5 under Pretended Networking mode - 16 - 8 - read-only - - - Data_byte_4 - Received payload corresponding to the data byte 4 under Pretended Networking mode - 24 - 8 - read-only - - - - FDCTRL - CAN FD Control Register - 0xC00 - 32 - read-write - 0x80000100 - 0xFFFFFFFF - - - TDCVAL - Transceiver Delay Compensation Value - 0 - 6 - read-only - - - TDCOFF - Transceiver Delay Compensation Offset - 8 - 5 - read-write - - - TDCFAIL - Transceiver Delay Compensation Fail - 14 - 1 - read-write - - - 0 - Measured loop delay is in range. - #0 - - - 1 - Measured loop delay is out of range. - #1 - - - - - TDCEN - Transceiver Delay Compensation Enable - 15 - 1 - read-write - - - 0 - TDC is disabled - #0 - - - 1 - TDC is enabled - #1 - - - - - MBDSR0 - Message Buffer Data Size for Region 0 - 16 - 2 - read-write - - - 00 - Selects 8 bytes per Message Buffer. - #00 - - - 01 - Selects 16 bytes per Message Buffer. - #01 - - - 10 - Selects 32 bytes per Message Buffer. - #10 - - - 11 - Selects 64 bytes per Message Buffer. - #11 - - - - - FDRATE - Bit Rate Switch Enable - 31 - 1 - read-write - - - 0 - Transmit a frame in nominal rate. The BRS bit in the Tx MB has no effect. - #0 - - - 1 - Transmit a frame with bit rate switching if the BRS bit in the Tx MB is recessive. - #1 - - - - - - FDCBT - CAN FD Bit Timing Register - 0xC04 - 32 - read-write - 0 - 0xFFFFFFFF - - - FPSEG2 - Fast Phase Segment 2 - 0 - 3 - read-write - - - FPSEG1 - Fast Phase Segment 1 - 5 - 3 - read-write - - - FPROPSEG - Fast Propagation Segment - 10 - 5 - read-write - - - FRJW - Fast Resync Jump Width - 16 - 3 - read-write - - - FPRESDIV - Fast Prescaler Division Factor - 20 - 10 - read-write - - - - FDCRC - CAN FD CRC Register - 0xC08 - 32 - read-only - 0 - 0xFFFFFFFF - - - FD_TXCRC - Extended Transmitted CRC value - 0 - 21 - read-only - - - FD_MBCRC - CRC Mailbox Number for FD_TXCRC - 24 - 7 - read-only - - - - FTM0 FlexTimer Module diff --git a/src/can1/cbt/mod.rs b/src/can1/cbt/mod.rs deleted file mode 100644 index cb70aeb..0000000 --- a/src/can1/cbt/mod.rs +++ /dev/null @@ -1,384 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::CBT { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = r" Value of the field"] -pub struct EPSEG2R { - bits: u8, -} -impl EPSEG2R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct EPSEG1R { - bits: u8, -} -impl EPSEG1R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct EPROPSEGR { - bits: u8, -} -impl EPROPSEGR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct ERJWR { - bits: u8, -} -impl ERJWR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct EPRESDIVR { - bits: u16, -} -impl EPRESDIVR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u16 { - self.bits - } -} -#[doc = "Possible values of the field `BTF`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum BTFR { - #[doc = "Extended bit time definitions disabled."] _0, - #[doc = "Extended bit time definitions enabled."] _1, -} -impl BTFR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - BTFR::_0 => false, - BTFR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> BTFR { - match value { - false => BTFR::_0, - true => BTFR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == BTFR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == BTFR::_1 - } -} -#[doc = r" Proxy"] -pub struct _EPSEG2W<'a> { - w: &'a mut W, -} -impl<'a> _EPSEG2W<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 31; - const OFFSET: u8 = 0; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = r" Proxy"] -pub struct _EPSEG1W<'a> { - w: &'a mut W, -} -impl<'a> _EPSEG1W<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 31; - const OFFSET: u8 = 5; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = r" Proxy"] -pub struct _EPROPSEGW<'a> { - w: &'a mut W, -} -impl<'a> _EPROPSEGW<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 63; - const OFFSET: u8 = 10; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = r" Proxy"] -pub struct _ERJWW<'a> { - w: &'a mut W, -} -impl<'a> _ERJWW<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 31; - const OFFSET: u8 = 16; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = r" Proxy"] -pub struct _EPRESDIVW<'a> { - w: &'a mut W, -} -impl<'a> _EPRESDIVW<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u16) -> &'a mut W { - const MASK: u16 = 1023; - const OFFSET: u8 = 21; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `BTF`"] -pub enum BTFW { - #[doc = "Extended bit time definitions disabled."] _0, - #[doc = "Extended bit time definitions enabled."] _1, -} -impl BTFW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - BTFW::_0 => false, - BTFW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _BTFW<'a> { - w: &'a mut W, -} -impl<'a> _BTFW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: BTFW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Extended bit time definitions disabled."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(BTFW::_0) - } - #[doc = "Extended bit time definitions enabled."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(BTFW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 31; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:4 - Extended Phase Segment 2"] - #[inline] - pub fn epseg2(&self) -> EPSEG2R { - let bits = { - const MASK: u8 = 31; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - EPSEG2R { bits } - } - #[doc = "Bits 5:9 - Extended Phase Segment 1"] - #[inline] - pub fn epseg1(&self) -> EPSEG1R { - let bits = { - const MASK: u8 = 31; - const OFFSET: u8 = 5; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - EPSEG1R { bits } - } - #[doc = "Bits 10:15 - Extended Propagation Segment"] - #[inline] - pub fn epropseg(&self) -> EPROPSEGR { - let bits = { - const MASK: u8 = 63; - const OFFSET: u8 = 10; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - EPROPSEGR { bits } - } - #[doc = "Bits 16:20 - Extended Resync Jump Width"] - #[inline] - pub fn erjw(&self) -> ERJWR { - let bits = { - const MASK: u8 = 31; - const OFFSET: u8 = 16; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - ERJWR { bits } - } - #[doc = "Bits 21:30 - Extended Prescaler Division Factor"] - #[inline] - pub fn epresdiv(&self) -> EPRESDIVR { - let bits = { - const MASK: u16 = 1023; - const OFFSET: u8 = 21; - ((self.bits >> OFFSET) & MASK as u32) as u16 - }; - EPRESDIVR { bits } - } - #[doc = "Bit 31 - Bit Timing Format Enable"] - #[inline] - pub fn btf(&self) -> BTFR { - BTFR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 31; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 0 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bits 0:4 - Extended Phase Segment 2"] - #[inline] - pub fn epseg2(&mut self) -> _EPSEG2W { - _EPSEG2W { w: self } - } - #[doc = "Bits 5:9 - Extended Phase Segment 1"] - #[inline] - pub fn epseg1(&mut self) -> _EPSEG1W { - _EPSEG1W { w: self } - } - #[doc = "Bits 10:15 - Extended Propagation Segment"] - #[inline] - pub fn epropseg(&mut self) -> _EPROPSEGW { - _EPROPSEGW { w: self } - } - #[doc = "Bits 16:20 - Extended Resync Jump Width"] - #[inline] - pub fn erjw(&mut self) -> _ERJWW { - _ERJWW { w: self } - } - #[doc = "Bits 21:30 - Extended Prescaler Division Factor"] - #[inline] - pub fn epresdiv(&mut self) -> _EPRESDIVW { - _EPRESDIVW { w: self } - } - #[doc = "Bit 31 - Bit Timing Format Enable"] - #[inline] - pub fn btf(&mut self) -> _BTFW { - _BTFW { w: self } - } -} diff --git a/src/can1/crcr/mod.rs b/src/can1/crcr/mod.rs deleted file mode 100644 index 07b066c..0000000 --- a/src/can1/crcr/mod.rs +++ /dev/null @@ -1,62 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -impl super::CRCR { - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } -} -#[doc = r" Value of the field"] -pub struct TXCRCR { - bits: u16, -} -impl TXCRCR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u16 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct MBCRCR { - bits: u8, -} -impl MBCRCR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:14 - Transmitted CRC value"] - #[inline] - pub fn txcrc(&self) -> TXCRCR { - let bits = { - const MASK: u16 = 32767; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u16 - }; - TXCRCR { bits } - } - #[doc = "Bits 16:22 - CRC Mailbox"] - #[inline] - pub fn mbcrc(&self) -> MBCRCR { - let bits = { - const MASK: u8 = 127; - const OFFSET: u8 = 16; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - MBCRCR { bits } - } -} diff --git a/src/can1/ctrl1/mod.rs b/src/can1/ctrl1/mod.rs deleted file mode 100644 index ad0efed..0000000 --- a/src/can1/ctrl1/mod.rs +++ /dev/null @@ -1,1538 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::CTRL1 { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = r" Value of the field"] -pub struct PROPSEGR { - bits: u8, -} -impl PROPSEGR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = "Possible values of the field `LOM`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum LOMR { - #[doc = "Listen-Only mode is deactivated."] _0, - #[doc = "FlexCAN module operates in Listen-Only mode."] _1, -} -impl LOMR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - LOMR::_0 => false, - LOMR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> LOMR { - match value { - false => LOMR::_0, - true => LOMR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == LOMR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == LOMR::_1 - } -} -#[doc = "Possible values of the field `LBUF`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum LBUFR { - #[doc = "Buffer with highest priority is transmitted first."] _0, - #[doc = "Lowest number buffer is transmitted first."] _1, -} -impl LBUFR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - LBUFR::_0 => false, - LBUFR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> LBUFR { - match value { - false => LBUFR::_0, - true => LBUFR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == LBUFR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == LBUFR::_1 - } -} -#[doc = "Possible values of the field `TSYN`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum TSYNR { - #[doc = "Timer Sync feature disabled"] _0, - #[doc = "Timer Sync feature enabled"] _1, -} -impl TSYNR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - TSYNR::_0 => false, - TSYNR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> TSYNR { - match value { - false => TSYNR::_0, - true => TSYNR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == TSYNR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == TSYNR::_1 - } -} -#[doc = "Possible values of the field `BOFFREC`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum BOFFRECR { - #[doc = "Automatic recovering from Bus Off state enabled."] _0, - #[doc = "Automatic recovering from Bus Off state disabled."] _1, -} -impl BOFFRECR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - BOFFRECR::_0 => false, - BOFFRECR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> BOFFRECR { - match value { - false => BOFFRECR::_0, - true => BOFFRECR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == BOFFRECR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == BOFFRECR::_1 - } -} -#[doc = "Possible values of the field `SMP`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum SMPR { - #[doc = "Just one sample is used to determine the bit value."] _0, - #[doc = "Three samples are used to determine the value of the received bit: the regular one (sample point) and 2 preceding samples; a majority rule is used."] - _1, -} -impl SMPR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - SMPR::_0 => false, - SMPR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> SMPR { - match value { - false => SMPR::_0, - true => SMPR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == SMPR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == SMPR::_1 - } -} -#[doc = "Possible values of the field `RWRNMSK`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum RWRNMSKR { - #[doc = "Rx Warning Interrupt disabled."] _0, - #[doc = "Rx Warning Interrupt enabled."] _1, -} -impl RWRNMSKR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - RWRNMSKR::_0 => false, - RWRNMSKR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> RWRNMSKR { - match value { - false => RWRNMSKR::_0, - true => RWRNMSKR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == RWRNMSKR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == RWRNMSKR::_1 - } -} -#[doc = "Possible values of the field `TWRNMSK`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum TWRNMSKR { - #[doc = "Tx Warning Interrupt disabled."] _0, - #[doc = "Tx Warning Interrupt enabled."] _1, -} -impl TWRNMSKR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - TWRNMSKR::_0 => false, - TWRNMSKR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> TWRNMSKR { - match value { - false => TWRNMSKR::_0, - true => TWRNMSKR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == TWRNMSKR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == TWRNMSKR::_1 - } -} -#[doc = "Possible values of the field `LPB`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum LPBR { - #[doc = "Loop Back disabled."] _0, - #[doc = "Loop Back enabled."] _1, -} -impl LPBR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - LPBR::_0 => false, - LPBR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> LPBR { - match value { - false => LPBR::_0, - true => LPBR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == LPBR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == LPBR::_1 - } -} -#[doc = "Possible values of the field `CLKSRC`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum CLKSRCR { - #[doc = "The CAN engine clock source is the oscillator clock. Under this condition, the oscillator clock frequency must be lower than the bus clock."] - _0, - #[doc = "The CAN engine clock source is the peripheral clock."] _1, -} -impl CLKSRCR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - CLKSRCR::_0 => false, - CLKSRCR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> CLKSRCR { - match value { - false => CLKSRCR::_0, - true => CLKSRCR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == CLKSRCR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == CLKSRCR::_1 - } -} -#[doc = "Possible values of the field `ERRMSK`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum ERRMSKR { - #[doc = "Error interrupt disabled."] _0, - #[doc = "Error interrupt enabled."] _1, -} -impl ERRMSKR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - ERRMSKR::_0 => false, - ERRMSKR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> ERRMSKR { - match value { - false => ERRMSKR::_0, - true => ERRMSKR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == ERRMSKR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == ERRMSKR::_1 - } -} -#[doc = "Possible values of the field `BOFFMSK`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum BOFFMSKR { - #[doc = "Bus Off interrupt disabled."] _0, - #[doc = "Bus Off interrupt enabled."] _1, -} -impl BOFFMSKR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - BOFFMSKR::_0 => false, - BOFFMSKR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> BOFFMSKR { - match value { - false => BOFFMSKR::_0, - true => BOFFMSKR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == BOFFMSKR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == BOFFMSKR::_1 - } -} -#[doc = r" Value of the field"] -pub struct PSEG2R { - bits: u8, -} -impl PSEG2R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct PSEG1R { - bits: u8, -} -impl PSEG1R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct RJWR { - bits: u8, -} -impl RJWR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct PRESDIVR { - bits: u8, -} -impl PRESDIVR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Proxy"] -pub struct _PROPSEGW<'a> { - w: &'a mut W, -} -impl<'a> _PROPSEGW<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 7; - const OFFSET: u8 = 0; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `LOM`"] -pub enum LOMW { - #[doc = "Listen-Only mode is deactivated."] _0, - #[doc = "FlexCAN module operates in Listen-Only mode."] _1, -} -impl LOMW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - LOMW::_0 => false, - LOMW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _LOMW<'a> { - w: &'a mut W, -} -impl<'a> _LOMW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: LOMW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Listen-Only mode is deactivated."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(LOMW::_0) - } - #[doc = "FlexCAN module operates in Listen-Only mode."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(LOMW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 3; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `LBUF`"] -pub enum LBUFW { - #[doc = "Buffer with highest priority is transmitted first."] _0, - #[doc = "Lowest number buffer is transmitted first."] _1, -} -impl LBUFW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - LBUFW::_0 => false, - LBUFW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _LBUFW<'a> { - w: &'a mut W, -} -impl<'a> _LBUFW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: LBUFW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Buffer with highest priority is transmitted first."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(LBUFW::_0) - } - #[doc = "Lowest number buffer is transmitted first."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(LBUFW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 4; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `TSYN`"] -pub enum TSYNW { - #[doc = "Timer Sync feature disabled"] _0, - #[doc = "Timer Sync feature enabled"] _1, -} -impl TSYNW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - TSYNW::_0 => false, - TSYNW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _TSYNW<'a> { - w: &'a mut W, -} -impl<'a> _TSYNW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: TSYNW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Timer Sync feature disabled"] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(TSYNW::_0) - } - #[doc = "Timer Sync feature enabled"] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(TSYNW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 5; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `BOFFREC`"] -pub enum BOFFRECW { - #[doc = "Automatic recovering from Bus Off state enabled."] _0, - #[doc = "Automatic recovering from Bus Off state disabled."] _1, -} -impl BOFFRECW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - BOFFRECW::_0 => false, - BOFFRECW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _BOFFRECW<'a> { - w: &'a mut W, -} -impl<'a> _BOFFRECW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: BOFFRECW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Automatic recovering from Bus Off state enabled."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(BOFFRECW::_0) - } - #[doc = "Automatic recovering from Bus Off state disabled."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(BOFFRECW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 6; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `SMP`"] -pub enum SMPW { - #[doc = "Just one sample is used to determine the bit value."] _0, - #[doc = "Three samples are used to determine the value of the received bit: the regular one (sample point) and 2 preceding samples; a majority rule is used."] - _1, -} -impl SMPW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - SMPW::_0 => false, - SMPW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _SMPW<'a> { - w: &'a mut W, -} -impl<'a> _SMPW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: SMPW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Just one sample is used to determine the bit value."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(SMPW::_0) - } - #[doc = "Three samples are used to determine the value of the received bit: the regular one (sample point) and 2 preceding samples; a majority rule is used."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(SMPW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 7; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `RWRNMSK`"] -pub enum RWRNMSKW { - #[doc = "Rx Warning Interrupt disabled."] _0, - #[doc = "Rx Warning Interrupt enabled."] _1, -} -impl RWRNMSKW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - RWRNMSKW::_0 => false, - RWRNMSKW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _RWRNMSKW<'a> { - w: &'a mut W, -} -impl<'a> _RWRNMSKW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: RWRNMSKW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Rx Warning Interrupt disabled."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(RWRNMSKW::_0) - } - #[doc = "Rx Warning Interrupt enabled."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(RWRNMSKW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 10; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `TWRNMSK`"] -pub enum TWRNMSKW { - #[doc = "Tx Warning Interrupt disabled."] _0, - #[doc = "Tx Warning Interrupt enabled."] _1, -} -impl TWRNMSKW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - TWRNMSKW::_0 => false, - TWRNMSKW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _TWRNMSKW<'a> { - w: &'a mut W, -} -impl<'a> _TWRNMSKW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: TWRNMSKW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Tx Warning Interrupt disabled."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(TWRNMSKW::_0) - } - #[doc = "Tx Warning Interrupt enabled."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(TWRNMSKW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 11; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `LPB`"] -pub enum LPBW { - #[doc = "Loop Back disabled."] _0, - #[doc = "Loop Back enabled."] _1, -} -impl LPBW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - LPBW::_0 => false, - LPBW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _LPBW<'a> { - w: &'a mut W, -} -impl<'a> _LPBW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: LPBW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Loop Back disabled."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(LPBW::_0) - } - #[doc = "Loop Back enabled."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(LPBW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 12; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `CLKSRC`"] -pub enum CLKSRCW { - #[doc = "The CAN engine clock source is the oscillator clock. Under this condition, the oscillator clock frequency must be lower than the bus clock."] - _0, - #[doc = "The CAN engine clock source is the peripheral clock."] _1, -} -impl CLKSRCW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - CLKSRCW::_0 => false, - CLKSRCW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _CLKSRCW<'a> { - w: &'a mut W, -} -impl<'a> _CLKSRCW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: CLKSRCW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "The CAN engine clock source is the oscillator clock. Under this condition, the oscillator clock frequency must be lower than the bus clock."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(CLKSRCW::_0) - } - #[doc = "The CAN engine clock source is the peripheral clock."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(CLKSRCW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 13; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `ERRMSK`"] -pub enum ERRMSKW { - #[doc = "Error interrupt disabled."] _0, - #[doc = "Error interrupt enabled."] _1, -} -impl ERRMSKW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - ERRMSKW::_0 => false, - ERRMSKW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _ERRMSKW<'a> { - w: &'a mut W, -} -impl<'a> _ERRMSKW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: ERRMSKW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Error interrupt disabled."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(ERRMSKW::_0) - } - #[doc = "Error interrupt enabled."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(ERRMSKW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 14; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `BOFFMSK`"] -pub enum BOFFMSKW { - #[doc = "Bus Off interrupt disabled."] _0, - #[doc = "Bus Off interrupt enabled."] _1, -} -impl BOFFMSKW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - BOFFMSKW::_0 => false, - BOFFMSKW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _BOFFMSKW<'a> { - w: &'a mut W, -} -impl<'a> _BOFFMSKW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: BOFFMSKW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Bus Off interrupt disabled."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(BOFFMSKW::_0) - } - #[doc = "Bus Off interrupt enabled."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(BOFFMSKW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 15; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = r" Proxy"] -pub struct _PSEG2W<'a> { - w: &'a mut W, -} -impl<'a> _PSEG2W<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 7; - const OFFSET: u8 = 16; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = r" Proxy"] -pub struct _PSEG1W<'a> { - w: &'a mut W, -} -impl<'a> _PSEG1W<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 7; - const OFFSET: u8 = 19; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = r" Proxy"] -pub struct _RJWW<'a> { - w: &'a mut W, -} -impl<'a> _RJWW<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 3; - const OFFSET: u8 = 22; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = r" Proxy"] -pub struct _PRESDIVW<'a> { - w: &'a mut W, -} -impl<'a> _PRESDIVW<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 255; - const OFFSET: u8 = 24; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:2 - Propagation Segment"] - #[inline] - pub fn propseg(&self) -> PROPSEGR { - let bits = { - const MASK: u8 = 7; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - PROPSEGR { bits } - } - #[doc = "Bit 3 - Listen-Only Mode"] - #[inline] - pub fn lom(&self) -> LOMR { - LOMR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 3; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 4 - Lowest Buffer Transmitted First"] - #[inline] - pub fn lbuf(&self) -> LBUFR { - LBUFR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 4; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 5 - Timer Sync"] - #[inline] - pub fn tsyn(&self) -> TSYNR { - TSYNR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 5; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 6 - Bus Off Recovery"] - #[inline] - pub fn boffrec(&self) -> BOFFRECR { - BOFFRECR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 6; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 7 - CAN Bit Sampling"] - #[inline] - pub fn smp(&self) -> SMPR { - SMPR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 7; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 10 - Rx Warning Interrupt Mask"] - #[inline] - pub fn rwrnmsk(&self) -> RWRNMSKR { - RWRNMSKR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 10; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 11 - Tx Warning Interrupt Mask"] - #[inline] - pub fn twrnmsk(&self) -> TWRNMSKR { - TWRNMSKR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 11; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 12 - Loop Back Mode"] - #[inline] - pub fn lpb(&self) -> LPBR { - LPBR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 12; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 13 - CAN Engine Clock Source"] - #[inline] - pub fn clksrc(&self) -> CLKSRCR { - CLKSRCR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 13; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 14 - Error Interrupt Mask"] - #[inline] - pub fn errmsk(&self) -> ERRMSKR { - ERRMSKR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 14; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 15 - Bus Off Interrupt Mask"] - #[inline] - pub fn boffmsk(&self) -> BOFFMSKR { - BOFFMSKR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 15; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bits 16:18 - Phase Segment 2"] - #[inline] - pub fn pseg2(&self) -> PSEG2R { - let bits = { - const MASK: u8 = 7; - const OFFSET: u8 = 16; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - PSEG2R { bits } - } - #[doc = "Bits 19:21 - Phase Segment 1"] - #[inline] - pub fn pseg1(&self) -> PSEG1R { - let bits = { - const MASK: u8 = 7; - const OFFSET: u8 = 19; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - PSEG1R { bits } - } - #[doc = "Bits 22:23 - Resync Jump Width"] - #[inline] - pub fn rjw(&self) -> RJWR { - let bits = { - const MASK: u8 = 3; - const OFFSET: u8 = 22; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - RJWR { bits } - } - #[doc = "Bits 24:31 - Prescaler Division Factor"] - #[inline] - pub fn presdiv(&self) -> PRESDIVR { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 24; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - PRESDIVR { bits } - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 0 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bits 0:2 - Propagation Segment"] - #[inline] - pub fn propseg(&mut self) -> _PROPSEGW { - _PROPSEGW { w: self } - } - #[doc = "Bit 3 - Listen-Only Mode"] - #[inline] - pub fn lom(&mut self) -> _LOMW { - _LOMW { w: self } - } - #[doc = "Bit 4 - Lowest Buffer Transmitted First"] - #[inline] - pub fn lbuf(&mut self) -> _LBUFW { - _LBUFW { w: self } - } - #[doc = "Bit 5 - Timer Sync"] - #[inline] - pub fn tsyn(&mut self) -> _TSYNW { - _TSYNW { w: self } - } - #[doc = "Bit 6 - Bus Off Recovery"] - #[inline] - pub fn boffrec(&mut self) -> _BOFFRECW { - _BOFFRECW { w: self } - } - #[doc = "Bit 7 - CAN Bit Sampling"] - #[inline] - pub fn smp(&mut self) -> _SMPW { - _SMPW { w: self } - } - #[doc = "Bit 10 - Rx Warning Interrupt Mask"] - #[inline] - pub fn rwrnmsk(&mut self) -> _RWRNMSKW { - _RWRNMSKW { w: self } - } - #[doc = "Bit 11 - Tx Warning Interrupt Mask"] - #[inline] - pub fn twrnmsk(&mut self) -> _TWRNMSKW { - _TWRNMSKW { w: self } - } - #[doc = "Bit 12 - Loop Back Mode"] - #[inline] - pub fn lpb(&mut self) -> _LPBW { - _LPBW { w: self } - } - #[doc = "Bit 13 - CAN Engine Clock Source"] - #[inline] - pub fn clksrc(&mut self) -> _CLKSRCW { - _CLKSRCW { w: self } - } - #[doc = "Bit 14 - Error Interrupt Mask"] - #[inline] - pub fn errmsk(&mut self) -> _ERRMSKW { - _ERRMSKW { w: self } - } - #[doc = "Bit 15 - Bus Off Interrupt Mask"] - #[inline] - pub fn boffmsk(&mut self) -> _BOFFMSKW { - _BOFFMSKW { w: self } - } - #[doc = "Bits 16:18 - Phase Segment 2"] - #[inline] - pub fn pseg2(&mut self) -> _PSEG2W { - _PSEG2W { w: self } - } - #[doc = "Bits 19:21 - Phase Segment 1"] - #[inline] - pub fn pseg1(&mut self) -> _PSEG1W { - _PSEG1W { w: self } - } - #[doc = "Bits 22:23 - Resync Jump Width"] - #[inline] - pub fn rjw(&mut self) -> _RJWW { - _RJWW { w: self } - } - #[doc = "Bits 24:31 - Prescaler Division Factor"] - #[inline] - pub fn presdiv(&mut self) -> _PRESDIVW { - _PRESDIVW { w: self } - } -} diff --git a/src/can1/ctrl1_pn/mod.rs b/src/can1/ctrl1_pn/mod.rs deleted file mode 100644 index dc76bb4..0000000 --- a/src/can1/ctrl1_pn/mod.rs +++ /dev/null @@ -1,801 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::CTRL1_PN { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = "Possible values of the field `FCS`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum FCSR { - #[doc = "Message ID filtering only"] _00, - #[doc = "Message ID filtering and payload filtering"] _01, - #[doc = "Message ID filtering occurring a specified number of times."] _10, - #[doc = "Message ID filtering and payload filtering a specified number of times"] _11, -} -impl FCSR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - match *self { - FCSR::_00 => 0, - FCSR::_01 => 1, - FCSR::_10 => 2, - FCSR::_11 => 3, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: u8) -> FCSR { - match value { - 0 => FCSR::_00, - 1 => FCSR::_01, - 2 => FCSR::_10, - 3 => FCSR::_11, - _ => unreachable!(), - } - } - #[doc = "Checks if the value of the field is `_00`"] - #[inline] - pub fn is_00(&self) -> bool { - *self == FCSR::_00 - } - #[doc = "Checks if the value of the field is `_01`"] - #[inline] - pub fn is_01(&self) -> bool { - *self == FCSR::_01 - } - #[doc = "Checks if the value of the field is `_10`"] - #[inline] - pub fn is_10(&self) -> bool { - *self == FCSR::_10 - } - #[doc = "Checks if the value of the field is `_11`"] - #[inline] - pub fn is_11(&self) -> bool { - *self == FCSR::_11 - } -} -#[doc = "Possible values of the field `IDFS`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum IDFSR { - #[doc = "Match upon a ID contents against an exact target value"] _00, - #[doc = "Match upon a ID value greater than or equal to a specified target value"] _01, - #[doc = "Match upon a ID value smaller than or equal to a specified target value"] _10, - #[doc = "Match upon a ID value inside a range, greater than or equal to a specified lower limit and smaller than or equal a specified upper limit"] - _11, -} -impl IDFSR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - match *self { - IDFSR::_00 => 0, - IDFSR::_01 => 1, - IDFSR::_10 => 2, - IDFSR::_11 => 3, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: u8) -> IDFSR { - match value { - 0 => IDFSR::_00, - 1 => IDFSR::_01, - 2 => IDFSR::_10, - 3 => IDFSR::_11, - _ => unreachable!(), - } - } - #[doc = "Checks if the value of the field is `_00`"] - #[inline] - pub fn is_00(&self) -> bool { - *self == IDFSR::_00 - } - #[doc = "Checks if the value of the field is `_01`"] - #[inline] - pub fn is_01(&self) -> bool { - *self == IDFSR::_01 - } - #[doc = "Checks if the value of the field is `_10`"] - #[inline] - pub fn is_10(&self) -> bool { - *self == IDFSR::_10 - } - #[doc = "Checks if the value of the field is `_11`"] - #[inline] - pub fn is_11(&self) -> bool { - *self == IDFSR::_11 - } -} -#[doc = "Possible values of the field `PLFS`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum PLFSR { - #[doc = "Match upon a payload contents against an exact target value"] _00, - #[doc = "Match upon a payload value greater than or equal to a specified target value"] _01, - #[doc = "Match upon a payload value smaller than or equal to a specified target value"] _10, - #[doc = "Match upon a payload value inside a range, greater than or equal to a specified lower limit and smaller than or equal a specified upper limit"] - _11, -} -impl PLFSR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - match *self { - PLFSR::_00 => 0, - PLFSR::_01 => 1, - PLFSR::_10 => 2, - PLFSR::_11 => 3, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: u8) -> PLFSR { - match value { - 0 => PLFSR::_00, - 1 => PLFSR::_01, - 2 => PLFSR::_10, - 3 => PLFSR::_11, - _ => unreachable!(), - } - } - #[doc = "Checks if the value of the field is `_00`"] - #[inline] - pub fn is_00(&self) -> bool { - *self == PLFSR::_00 - } - #[doc = "Checks if the value of the field is `_01`"] - #[inline] - pub fn is_01(&self) -> bool { - *self == PLFSR::_01 - } - #[doc = "Checks if the value of the field is `_10`"] - #[inline] - pub fn is_10(&self) -> bool { - *self == PLFSR::_10 - } - #[doc = "Checks if the value of the field is `_11`"] - #[inline] - pub fn is_11(&self) -> bool { - *self == PLFSR::_11 - } -} -#[doc = "Possible values of the field `NMATCH`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum NMATCHR { - #[doc = "Received message must match the predefined filtering criteria for ID and/or PL once before generating a wake up event."] - _00000001, - #[doc = "Received message must match the predefined filtering criteria for ID and/or PL twice before generating a wake up event."] - _00000010, - #[doc = "Received message must match the predefined filtering criteria for ID and/or PL 255 times before generating a wake up event."] - _11111111, - #[doc = r" Reserved"] _Reserved(u8), -} -impl NMATCHR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - match *self { - NMATCHR::_00000001 => 1, - NMATCHR::_00000010 => 2, - NMATCHR::_11111111 => 255, - NMATCHR::_Reserved(bits) => bits, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: u8) -> NMATCHR { - match value { - 1 => NMATCHR::_00000001, - 2 => NMATCHR::_00000010, - 255 => NMATCHR::_11111111, - i => NMATCHR::_Reserved(i), - } - } - #[doc = "Checks if the value of the field is `_00000001`"] - #[inline] - pub fn is_00000001(&self) -> bool { - *self == NMATCHR::_00000001 - } - #[doc = "Checks if the value of the field is `_00000010`"] - #[inline] - pub fn is_00000010(&self) -> bool { - *self == NMATCHR::_00000010 - } - #[doc = "Checks if the value of the field is `_11111111`"] - #[inline] - pub fn is_11111111(&self) -> bool { - *self == NMATCHR::_11111111 - } -} -#[doc = "Possible values of the field `WUMF_MSK`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum WUMF_MSKR { - #[doc = "Wake up match event is disabled"] _0, - #[doc = "Wake up match event is enabled"] _1, -} -impl WUMF_MSKR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - WUMF_MSKR::_0 => false, - WUMF_MSKR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> WUMF_MSKR { - match value { - false => WUMF_MSKR::_0, - true => WUMF_MSKR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == WUMF_MSKR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == WUMF_MSKR::_1 - } -} -#[doc = "Possible values of the field `WTOF_MSK`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum WTOF_MSKR { - #[doc = "Timeout wake up event is disabled"] _0, - #[doc = "Timeout wake up event is enabled"] _1, -} -impl WTOF_MSKR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - WTOF_MSKR::_0 => false, - WTOF_MSKR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> WTOF_MSKR { - match value { - false => WTOF_MSKR::_0, - true => WTOF_MSKR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == WTOF_MSKR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == WTOF_MSKR::_1 - } -} -#[doc = "Values that can be written to the field `FCS`"] -pub enum FCSW { - #[doc = "Message ID filtering only"] _00, - #[doc = "Message ID filtering and payload filtering"] _01, - #[doc = "Message ID filtering occurring a specified number of times."] _10, - #[doc = "Message ID filtering and payload filtering a specified number of times"] _11, -} -impl FCSW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> u8 { - match *self { - FCSW::_00 => 0, - FCSW::_01 => 1, - FCSW::_10 => 2, - FCSW::_11 => 3, - } - } -} -#[doc = r" Proxy"] -pub struct _FCSW<'a> { - w: &'a mut W, -} -impl<'a> _FCSW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: FCSW) -> &'a mut W { - { - self.bits(variant._bits()) - } - } - #[doc = "Message ID filtering only"] - #[inline] - pub fn _00(self) -> &'a mut W { - self.variant(FCSW::_00) - } - #[doc = "Message ID filtering and payload filtering"] - #[inline] - pub fn _01(self) -> &'a mut W { - self.variant(FCSW::_01) - } - #[doc = "Message ID filtering occurring a specified number of times."] - #[inline] - pub fn _10(self) -> &'a mut W { - self.variant(FCSW::_10) - } - #[doc = "Message ID filtering and payload filtering a specified number of times"] - #[inline] - pub fn _11(self) -> &'a mut W { - self.variant(FCSW::_11) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 3; - const OFFSET: u8 = 0; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `IDFS`"] -pub enum IDFSW { - #[doc = "Match upon a ID contents against an exact target value"] _00, - #[doc = "Match upon a ID value greater than or equal to a specified target value"] _01, - #[doc = "Match upon a ID value smaller than or equal to a specified target value"] _10, - #[doc = "Match upon a ID value inside a range, greater than or equal to a specified lower limit and smaller than or equal a specified upper limit"] - _11, -} -impl IDFSW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> u8 { - match *self { - IDFSW::_00 => 0, - IDFSW::_01 => 1, - IDFSW::_10 => 2, - IDFSW::_11 => 3, - } - } -} -#[doc = r" Proxy"] -pub struct _IDFSW<'a> { - w: &'a mut W, -} -impl<'a> _IDFSW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: IDFSW) -> &'a mut W { - { - self.bits(variant._bits()) - } - } - #[doc = "Match upon a ID contents against an exact target value"] - #[inline] - pub fn _00(self) -> &'a mut W { - self.variant(IDFSW::_00) - } - #[doc = "Match upon a ID value greater than or equal to a specified target value"] - #[inline] - pub fn _01(self) -> &'a mut W { - self.variant(IDFSW::_01) - } - #[doc = "Match upon a ID value smaller than or equal to a specified target value"] - #[inline] - pub fn _10(self) -> &'a mut W { - self.variant(IDFSW::_10) - } - #[doc = "Match upon a ID value inside a range, greater than or equal to a specified lower limit and smaller than or equal a specified upper limit"] - #[inline] - pub fn _11(self) -> &'a mut W { - self.variant(IDFSW::_11) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 3; - const OFFSET: u8 = 2; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `PLFS`"] -pub enum PLFSW { - #[doc = "Match upon a payload contents against an exact target value"] _00, - #[doc = "Match upon a payload value greater than or equal to a specified target value"] _01, - #[doc = "Match upon a payload value smaller than or equal to a specified target value"] _10, - #[doc = "Match upon a payload value inside a range, greater than or equal to a specified lower limit and smaller than or equal a specified upper limit"] - _11, -} -impl PLFSW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> u8 { - match *self { - PLFSW::_00 => 0, - PLFSW::_01 => 1, - PLFSW::_10 => 2, - PLFSW::_11 => 3, - } - } -} -#[doc = r" Proxy"] -pub struct _PLFSW<'a> { - w: &'a mut W, -} -impl<'a> _PLFSW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: PLFSW) -> &'a mut W { - { - self.bits(variant._bits()) - } - } - #[doc = "Match upon a payload contents against an exact target value"] - #[inline] - pub fn _00(self) -> &'a mut W { - self.variant(PLFSW::_00) - } - #[doc = "Match upon a payload value greater than or equal to a specified target value"] - #[inline] - pub fn _01(self) -> &'a mut W { - self.variant(PLFSW::_01) - } - #[doc = "Match upon a payload value smaller than or equal to a specified target value"] - #[inline] - pub fn _10(self) -> &'a mut W { - self.variant(PLFSW::_10) - } - #[doc = "Match upon a payload value inside a range, greater than or equal to a specified lower limit and smaller than or equal a specified upper limit"] - #[inline] - pub fn _11(self) -> &'a mut W { - self.variant(PLFSW::_11) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 3; - const OFFSET: u8 = 4; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `NMATCH`"] -pub enum NMATCHW { - #[doc = "Received message must match the predefined filtering criteria for ID and/or PL once before generating a wake up event."] - _00000001, - #[doc = "Received message must match the predefined filtering criteria for ID and/or PL twice before generating a wake up event."] - _00000010, - #[doc = "Received message must match the predefined filtering criteria for ID and/or PL 255 times before generating a wake up event."] - _11111111, -} -impl NMATCHW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> u8 { - match *self { - NMATCHW::_00000001 => 1, - NMATCHW::_00000010 => 2, - NMATCHW::_11111111 => 255, - } - } -} -#[doc = r" Proxy"] -pub struct _NMATCHW<'a> { - w: &'a mut W, -} -impl<'a> _NMATCHW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: NMATCHW) -> &'a mut W { - unsafe { self.bits(variant._bits()) } - } - #[doc = "Received message must match the predefined filtering criteria for ID and/or PL once before generating a wake up event."] - #[inline] - pub fn _00000001(self) -> &'a mut W { - self.variant(NMATCHW::_00000001) - } - #[doc = "Received message must match the predefined filtering criteria for ID and/or PL twice before generating a wake up event."] - #[inline] - pub fn _00000010(self) -> &'a mut W { - self.variant(NMATCHW::_00000010) - } - #[doc = "Received message must match the predefined filtering criteria for ID and/or PL 255 times before generating a wake up event."] - #[inline] - pub fn _11111111(self) -> &'a mut W { - self.variant(NMATCHW::_11111111) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 255; - const OFFSET: u8 = 8; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `WUMF_MSK`"] -pub enum WUMF_MSKW { - #[doc = "Wake up match event is disabled"] _0, - #[doc = "Wake up match event is enabled"] _1, -} -impl WUMF_MSKW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - WUMF_MSKW::_0 => false, - WUMF_MSKW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _WUMF_MSKW<'a> { - w: &'a mut W, -} -impl<'a> _WUMF_MSKW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: WUMF_MSKW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Wake up match event is disabled"] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(WUMF_MSKW::_0) - } - #[doc = "Wake up match event is enabled"] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(WUMF_MSKW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 16; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `WTOF_MSK`"] -pub enum WTOF_MSKW { - #[doc = "Timeout wake up event is disabled"] _0, - #[doc = "Timeout wake up event is enabled"] _1, -} -impl WTOF_MSKW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - WTOF_MSKW::_0 => false, - WTOF_MSKW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _WTOF_MSKW<'a> { - w: &'a mut W, -} -impl<'a> _WTOF_MSKW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: WTOF_MSKW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Timeout wake up event is disabled"] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(WTOF_MSKW::_0) - } - #[doc = "Timeout wake up event is enabled"] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(WTOF_MSKW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 17; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:1 - Filtering Combination Selection"] - #[inline] - pub fn fcs(&self) -> FCSR { - FCSR::_from({ - const MASK: u8 = 3; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }) - } - #[doc = "Bits 2:3 - ID Filtering Selection"] - #[inline] - pub fn idfs(&self) -> IDFSR { - IDFSR::_from({ - const MASK: u8 = 3; - const OFFSET: u8 = 2; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }) - } - #[doc = "Bits 4:5 - Payload Filtering Selection"] - #[inline] - pub fn plfs(&self) -> PLFSR { - PLFSR::_from({ - const MASK: u8 = 3; - const OFFSET: u8 = 4; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }) - } - #[doc = "Bits 8:15 - Number of Messages Matching the Same Filtering Criteria"] - #[inline] - pub fn nmatch(&self) -> NMATCHR { - NMATCHR::_from({ - const MASK: u8 = 255; - const OFFSET: u8 = 8; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }) - } - #[doc = "Bit 16 - Wake Up by Match Flag Mask Bit"] - #[inline] - pub fn wumf_msk(&self) -> WUMF_MSKR { - WUMF_MSKR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 16; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 17 - Wake Up by Timeout Flag Mask Bit"] - #[inline] - pub fn wtof_msk(&self) -> WTOF_MSKR { - WTOF_MSKR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 17; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 256 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bits 0:1 - Filtering Combination Selection"] - #[inline] - pub fn fcs(&mut self) -> _FCSW { - _FCSW { w: self } - } - #[doc = "Bits 2:3 - ID Filtering Selection"] - #[inline] - pub fn idfs(&mut self) -> _IDFSW { - _IDFSW { w: self } - } - #[doc = "Bits 4:5 - Payload Filtering Selection"] - #[inline] - pub fn plfs(&mut self) -> _PLFSW { - _PLFSW { w: self } - } - #[doc = "Bits 8:15 - Number of Messages Matching the Same Filtering Criteria"] - #[inline] - pub fn nmatch(&mut self) -> _NMATCHW { - _NMATCHW { w: self } - } - #[doc = "Bit 16 - Wake Up by Match Flag Mask Bit"] - #[inline] - pub fn wumf_msk(&mut self) -> _WUMF_MSKW { - _WUMF_MSKW { w: self } - } - #[doc = "Bit 17 - Wake Up by Timeout Flag Mask Bit"] - #[inline] - pub fn wtof_msk(&mut self) -> _WTOF_MSKW { - _WTOF_MSKW { w: self } - } -} diff --git a/src/can1/ctrl2/mod.rs b/src/can1/ctrl2/mod.rs deleted file mode 100644 index dfec61f..0000000 --- a/src/can1/ctrl2/mod.rs +++ /dev/null @@ -1,1189 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::CTRL2 { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = "Possible values of the field `EDFLTDIS`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum EDFLTDISR { - #[doc = "Edge Filter is enabled."] _0, - #[doc = "Edge Filter is disabled."] _1, -} -impl EDFLTDISR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - EDFLTDISR::_0 => false, - EDFLTDISR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> EDFLTDISR { - match value { - false => EDFLTDISR::_0, - true => EDFLTDISR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == EDFLTDISR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == EDFLTDISR::_1 - } -} -#[doc = "Possible values of the field `ISOCANFDEN`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum ISOCANFDENR { - #[doc = "FlexCAN operates using the non-ISO CAN FD protocol."] _0, - #[doc = "FlexCAN operates using the ISO CAN FD protocol (ISO 11898-1)."] _1, -} -impl ISOCANFDENR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - ISOCANFDENR::_0 => false, - ISOCANFDENR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> ISOCANFDENR { - match value { - false => ISOCANFDENR::_0, - true => ISOCANFDENR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == ISOCANFDENR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == ISOCANFDENR::_1 - } -} -#[doc = "Possible values of the field `PREXCEN`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum PREXCENR { - #[doc = "Protocol Exception is disabled."] _0, - #[doc = "Protocol Exception is enabled."] _1, -} -impl PREXCENR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - PREXCENR::_0 => false, - PREXCENR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> PREXCENR { - match value { - false => PREXCENR::_0, - true => PREXCENR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == PREXCENR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == PREXCENR::_1 - } -} -#[doc = "Possible values of the field `TIMER_SRC`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum TIMER_SRCR { - #[doc = "The Free Running Timer is clocked by the CAN bit clock, which defines the baud rate on the CAN bus."] - _0, - #[doc = "The Free Running Timer is clocked by an external time tick. The period can be either adjusted to be equal to the baud rate on the CAN bus, or a different value as required. See the device specific section for details about the external time tick."] - _1, -} -impl TIMER_SRCR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - TIMER_SRCR::_0 => false, - TIMER_SRCR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> TIMER_SRCR { - match value { - false => TIMER_SRCR::_0, - true => TIMER_SRCR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == TIMER_SRCR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == TIMER_SRCR::_1 - } -} -#[doc = "Possible values of the field `EACEN`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum EACENR { - #[doc = "Rx Mailbox filter's IDE bit is always compared and RTR is never compared despite mask bits."] - _0, - #[doc = "Enables the comparison of both Rx Mailbox filter's IDE and RTR bit with their corresponding bits within the incoming frame. Mask bits do apply."] - _1, -} -impl EACENR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - EACENR::_0 => false, - EACENR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> EACENR { - match value { - false => EACENR::_0, - true => EACENR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == EACENR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == EACENR::_1 - } -} -#[doc = "Possible values of the field `RRS`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum RRSR { - #[doc = "Remote Response Frame is generated."] _0, - #[doc = "Remote Request Frame is stored."] _1, -} -impl RRSR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - RRSR::_0 => false, - RRSR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> RRSR { - match value { - false => RRSR::_0, - true => RRSR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == RRSR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == RRSR::_1 - } -} -#[doc = "Possible values of the field `MRP`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum MRPR { - #[doc = "Matching starts from Rx FIFO and continues on Mailboxes."] _0, - #[doc = "Matching starts from Mailboxes and continues on Rx FIFO."] _1, -} -impl MRPR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - MRPR::_0 => false, - MRPR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> MRPR { - match value { - false => MRPR::_0, - true => MRPR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == MRPR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == MRPR::_1 - } -} -#[doc = r" Value of the field"] -pub struct TASDR { - bits: u8, -} -impl TASDR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct RFFNR { - bits: u8, -} -impl RFFNR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = "Possible values of the field `BOFFDONEMSK`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum BOFFDONEMSKR { - #[doc = "Bus Off Done interrupt disabled."] _0, - #[doc = "Bus Off Done interrupt enabled."] _1, -} -impl BOFFDONEMSKR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - BOFFDONEMSKR::_0 => false, - BOFFDONEMSKR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> BOFFDONEMSKR { - match value { - false => BOFFDONEMSKR::_0, - true => BOFFDONEMSKR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == BOFFDONEMSKR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == BOFFDONEMSKR::_1 - } -} -#[doc = "Possible values of the field `ERRMSK_FAST`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum ERRMSK_FASTR { - #[doc = "ERRINT_FAST Error interrupt disabled."] _0, - #[doc = "ERRINT_FAST Error interrupt enabled."] _1, -} -impl ERRMSK_FASTR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - ERRMSK_FASTR::_0 => false, - ERRMSK_FASTR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> ERRMSK_FASTR { - match value { - false => ERRMSK_FASTR::_0, - true => ERRMSK_FASTR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == ERRMSK_FASTR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == ERRMSK_FASTR::_1 - } -} -#[doc = "Values that can be written to the field `EDFLTDIS`"] -pub enum EDFLTDISW { - #[doc = "Edge Filter is enabled."] _0, - #[doc = "Edge Filter is disabled."] _1, -} -impl EDFLTDISW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - EDFLTDISW::_0 => false, - EDFLTDISW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _EDFLTDISW<'a> { - w: &'a mut W, -} -impl<'a> _EDFLTDISW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: EDFLTDISW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Edge Filter is enabled."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(EDFLTDISW::_0) - } - #[doc = "Edge Filter is disabled."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(EDFLTDISW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 11; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `ISOCANFDEN`"] -pub enum ISOCANFDENW { - #[doc = "FlexCAN operates using the non-ISO CAN FD protocol."] _0, - #[doc = "FlexCAN operates using the ISO CAN FD protocol (ISO 11898-1)."] _1, -} -impl ISOCANFDENW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - ISOCANFDENW::_0 => false, - ISOCANFDENW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _ISOCANFDENW<'a> { - w: &'a mut W, -} -impl<'a> _ISOCANFDENW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: ISOCANFDENW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "FlexCAN operates using the non-ISO CAN FD protocol."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(ISOCANFDENW::_0) - } - #[doc = "FlexCAN operates using the ISO CAN FD protocol (ISO 11898-1)."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(ISOCANFDENW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 12; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `PREXCEN`"] -pub enum PREXCENW { - #[doc = "Protocol Exception is disabled."] _0, - #[doc = "Protocol Exception is enabled."] _1, -} -impl PREXCENW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - PREXCENW::_0 => false, - PREXCENW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _PREXCENW<'a> { - w: &'a mut W, -} -impl<'a> _PREXCENW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: PREXCENW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Protocol Exception is disabled."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(PREXCENW::_0) - } - #[doc = "Protocol Exception is enabled."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(PREXCENW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 14; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `TIMER_SRC`"] -pub enum TIMER_SRCW { - #[doc = "The Free Running Timer is clocked by the CAN bit clock, which defines the baud rate on the CAN bus."] - _0, - #[doc = "The Free Running Timer is clocked by an external time tick. The period can be either adjusted to be equal to the baud rate on the CAN bus, or a different value as required. See the device specific section for details about the external time tick."] - _1, -} -impl TIMER_SRCW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - TIMER_SRCW::_0 => false, - TIMER_SRCW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _TIMER_SRCW<'a> { - w: &'a mut W, -} -impl<'a> _TIMER_SRCW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: TIMER_SRCW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "The Free Running Timer is clocked by the CAN bit clock, which defines the baud rate on the CAN bus."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(TIMER_SRCW::_0) - } - #[doc = "The Free Running Timer is clocked by an external time tick. The period can be either adjusted to be equal to the baud rate on the CAN bus, or a different value as required. See the device specific section for details about the external time tick."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(TIMER_SRCW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 15; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `EACEN`"] -pub enum EACENW { - #[doc = "Rx Mailbox filter's IDE bit is always compared and RTR is never compared despite mask bits."] - _0, - #[doc = "Enables the comparison of both Rx Mailbox filter's IDE and RTR bit with their corresponding bits within the incoming frame. Mask bits do apply."] - _1, -} -impl EACENW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - EACENW::_0 => false, - EACENW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _EACENW<'a> { - w: &'a mut W, -} -impl<'a> _EACENW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: EACENW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Rx Mailbox filter's IDE bit is always compared and RTR is never compared despite mask bits."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(EACENW::_0) - } - #[doc = "Enables the comparison of both Rx Mailbox filter's IDE and RTR bit with their corresponding bits within the incoming frame. Mask bits do apply."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(EACENW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 16; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `RRS`"] -pub enum RRSW { - #[doc = "Remote Response Frame is generated."] _0, - #[doc = "Remote Request Frame is stored."] _1, -} -impl RRSW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - RRSW::_0 => false, - RRSW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _RRSW<'a> { - w: &'a mut W, -} -impl<'a> _RRSW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: RRSW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Remote Response Frame is generated."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(RRSW::_0) - } - #[doc = "Remote Request Frame is stored."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(RRSW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 17; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `MRP`"] -pub enum MRPW { - #[doc = "Matching starts from Rx FIFO and continues on Mailboxes."] _0, - #[doc = "Matching starts from Mailboxes and continues on Rx FIFO."] _1, -} -impl MRPW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - MRPW::_0 => false, - MRPW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _MRPW<'a> { - w: &'a mut W, -} -impl<'a> _MRPW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: MRPW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Matching starts from Rx FIFO and continues on Mailboxes."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(MRPW::_0) - } - #[doc = "Matching starts from Mailboxes and continues on Rx FIFO."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(MRPW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 18; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = r" Proxy"] -pub struct _TASDW<'a> { - w: &'a mut W, -} -impl<'a> _TASDW<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 31; - const OFFSET: u8 = 19; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = r" Proxy"] -pub struct _RFFNW<'a> { - w: &'a mut W, -} -impl<'a> _RFFNW<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 15; - const OFFSET: u8 = 24; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `BOFFDONEMSK`"] -pub enum BOFFDONEMSKW { - #[doc = "Bus Off Done interrupt disabled."] _0, - #[doc = "Bus Off Done interrupt enabled."] _1, -} -impl BOFFDONEMSKW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - BOFFDONEMSKW::_0 => false, - BOFFDONEMSKW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _BOFFDONEMSKW<'a> { - w: &'a mut W, -} -impl<'a> _BOFFDONEMSKW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: BOFFDONEMSKW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Bus Off Done interrupt disabled."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(BOFFDONEMSKW::_0) - } - #[doc = "Bus Off Done interrupt enabled."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(BOFFDONEMSKW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 30; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `ERRMSK_FAST`"] -pub enum ERRMSK_FASTW { - #[doc = "ERRINT_FAST Error interrupt disabled."] _0, - #[doc = "ERRINT_FAST Error interrupt enabled."] _1, -} -impl ERRMSK_FASTW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - ERRMSK_FASTW::_0 => false, - ERRMSK_FASTW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _ERRMSK_FASTW<'a> { - w: &'a mut W, -} -impl<'a> _ERRMSK_FASTW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: ERRMSK_FASTW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "ERRINT_FAST Error interrupt disabled."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(ERRMSK_FASTW::_0) - } - #[doc = "ERRINT_FAST Error interrupt enabled."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(ERRMSK_FASTW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 31; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bit 11 - Edge Filter Disable"] - #[inline] - pub fn edfltdis(&self) -> EDFLTDISR { - EDFLTDISR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 11; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 12 - ISO CAN FD Enable"] - #[inline] - pub fn isocanfden(&self) -> ISOCANFDENR { - ISOCANFDENR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 12; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 14 - Protocol Exception Enable"] - #[inline] - pub fn prexcen(&self) -> PREXCENR { - PREXCENR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 14; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 15 - Timer Source"] - #[inline] - pub fn timer_src(&self) -> TIMER_SRCR { - TIMER_SRCR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 15; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 16 - Entire Frame Arbitration Field Comparison Enable For Rx Mailboxes"] - #[inline] - pub fn eacen(&self) -> EACENR { - EACENR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 16; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 17 - Remote Request Storing"] - #[inline] - pub fn rrs(&self) -> RRSR { - RRSR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 17; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 18 - Mailboxes Reception Priority"] - #[inline] - pub fn mrp(&self) -> MRPR { - MRPR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 18; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bits 19:23 - Tx Arbitration Start Delay"] - #[inline] - pub fn tasd(&self) -> TASDR { - let bits = { - const MASK: u8 = 31; - const OFFSET: u8 = 19; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - TASDR { bits } - } - #[doc = "Bits 24:27 - Number Of Rx FIFO Filters"] - #[inline] - pub fn rffn(&self) -> RFFNR { - let bits = { - const MASK: u8 = 15; - const OFFSET: u8 = 24; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - RFFNR { bits } - } - #[doc = "Bit 30 - Bus Off Done Interrupt Mask"] - #[inline] - pub fn boffdonemsk(&self) -> BOFFDONEMSKR { - BOFFDONEMSKR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 30; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 31 - Error Interrupt Mask for errors detected in the Data Phase of fast CAN FD frames"] - #[inline] - pub fn errmsk_fast(&self) -> ERRMSK_FASTR { - ERRMSK_FASTR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 31; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 10485760 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bit 11 - Edge Filter Disable"] - #[inline] - pub fn edfltdis(&mut self) -> _EDFLTDISW { - _EDFLTDISW { w: self } - } - #[doc = "Bit 12 - ISO CAN FD Enable"] - #[inline] - pub fn isocanfden(&mut self) -> _ISOCANFDENW { - _ISOCANFDENW { w: self } - } - #[doc = "Bit 14 - Protocol Exception Enable"] - #[inline] - pub fn prexcen(&mut self) -> _PREXCENW { - _PREXCENW { w: self } - } - #[doc = "Bit 15 - Timer Source"] - #[inline] - pub fn timer_src(&mut self) -> _TIMER_SRCW { - _TIMER_SRCW { w: self } - } - #[doc = "Bit 16 - Entire Frame Arbitration Field Comparison Enable For Rx Mailboxes"] - #[inline] - pub fn eacen(&mut self) -> _EACENW { - _EACENW { w: self } - } - #[doc = "Bit 17 - Remote Request Storing"] - #[inline] - pub fn rrs(&mut self) -> _RRSW { - _RRSW { w: self } - } - #[doc = "Bit 18 - Mailboxes Reception Priority"] - #[inline] - pub fn mrp(&mut self) -> _MRPW { - _MRPW { w: self } - } - #[doc = "Bits 19:23 - Tx Arbitration Start Delay"] - #[inline] - pub fn tasd(&mut self) -> _TASDW { - _TASDW { w: self } - } - #[doc = "Bits 24:27 - Number Of Rx FIFO Filters"] - #[inline] - pub fn rffn(&mut self) -> _RFFNW { - _RFFNW { w: self } - } - #[doc = "Bit 30 - Bus Off Done Interrupt Mask"] - #[inline] - pub fn boffdonemsk(&mut self) -> _BOFFDONEMSKW { - _BOFFDONEMSKW { w: self } - } - #[doc = "Bit 31 - Error Interrupt Mask for errors detected in the Data Phase of fast CAN FD frames"] - #[inline] - pub fn errmsk_fast(&mut self) -> _ERRMSK_FASTW { - _ERRMSK_FASTW { w: self } - } -} diff --git a/src/can1/ctrl2_pn/mod.rs b/src/can1/ctrl2_pn/mod.rs deleted file mode 100644 index 7831ff2..0000000 --- a/src/can1/ctrl2_pn/mod.rs +++ /dev/null @@ -1,105 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::CTRL2_PN { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = r" Value of the field"] -pub struct MATCHTOR { - bits: u16, -} -impl MATCHTOR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u16 { - self.bits - } -} -#[doc = r" Proxy"] -pub struct _MATCHTOW<'a> { - w: &'a mut W, -} -impl<'a> _MATCHTOW<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u16) -> &'a mut W { - const MASK: u16 = 65535; - const OFFSET: u8 = 0; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:15 - Timeout for No Message Matching the Filtering Criteria"] - #[inline] - pub fn matchto(&self) -> MATCHTOR { - let bits = { - const MASK: u16 = 65535; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u16 - }; - MATCHTOR { bits } - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 0 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bits 0:15 - Timeout for No Message Matching the Filtering Criteria"] - #[inline] - pub fn matchto(&mut self) -> _MATCHTOW { - _MATCHTOW { w: self } - } -} diff --git a/src/can1/ecr/mod.rs b/src/can1/ecr/mod.rs deleted file mode 100644 index 22c7322..0000000 --- a/src/can1/ecr/mod.rs +++ /dev/null @@ -1,228 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::ECR { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = r" Value of the field"] -pub struct TXERRCNTR { - bits: u8, -} -impl TXERRCNTR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct RXERRCNTR { - bits: u8, -} -impl RXERRCNTR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct TXERRCNT_FASTR { - bits: u8, -} -impl TXERRCNT_FASTR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct RXERRCNT_FASTR { - bits: u8, -} -impl RXERRCNT_FASTR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Proxy"] -pub struct _TXERRCNTW<'a> { - w: &'a mut W, -} -impl<'a> _TXERRCNTW<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 255; - const OFFSET: u8 = 0; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = r" Proxy"] -pub struct _RXERRCNTW<'a> { - w: &'a mut W, -} -impl<'a> _RXERRCNTW<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 255; - const OFFSET: u8 = 8; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = r" Proxy"] -pub struct _TXERRCNT_FASTW<'a> { - w: &'a mut W, -} -impl<'a> _TXERRCNT_FASTW<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 255; - const OFFSET: u8 = 16; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = r" Proxy"] -pub struct _RXERRCNT_FASTW<'a> { - w: &'a mut W, -} -impl<'a> _RXERRCNT_FASTW<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 255; - const OFFSET: u8 = 24; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:7 - Transmit Error Counter"] - #[inline] - pub fn txerrcnt(&self) -> TXERRCNTR { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - TXERRCNTR { bits } - } - #[doc = "Bits 8:15 - Receive Error Counter"] - #[inline] - pub fn rxerrcnt(&self) -> RXERRCNTR { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 8; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - RXERRCNTR { bits } - } - #[doc = "Bits 16:23 - Transmit Error Counter for fast bits"] - #[inline] - pub fn txerrcnt_fast(&self) -> TXERRCNT_FASTR { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 16; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - TXERRCNT_FASTR { bits } - } - #[doc = "Bits 24:31 - Receive Error Counter for fast bits"] - #[inline] - pub fn rxerrcnt_fast(&self) -> RXERRCNT_FASTR { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 24; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - RXERRCNT_FASTR { bits } - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 0 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bits 0:7 - Transmit Error Counter"] - #[inline] - pub fn txerrcnt(&mut self) -> _TXERRCNTW { - _TXERRCNTW { w: self } - } - #[doc = "Bits 8:15 - Receive Error Counter"] - #[inline] - pub fn rxerrcnt(&mut self) -> _RXERRCNTW { - _RXERRCNTW { w: self } - } - #[doc = "Bits 16:23 - Transmit Error Counter for fast bits"] - #[inline] - pub fn txerrcnt_fast(&mut self) -> _TXERRCNT_FASTW { - _TXERRCNT_FASTW { w: self } - } - #[doc = "Bits 24:31 - Receive Error Counter for fast bits"] - #[inline] - pub fn rxerrcnt_fast(&mut self) -> _RXERRCNT_FASTW { - _RXERRCNT_FASTW { w: self } - } -} diff --git a/src/can1/embedded_ram/mod.rs b/src/can1/embedded_ram/mod.rs deleted file mode 100644 index 5fe0f4f..0000000 --- a/src/can1/embedded_ram/mod.rs +++ /dev/null @@ -1,228 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::EMBEDDEDRAM { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_3R { - bits: u8, -} -impl DATA_BYTE_3R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_2R { - bits: u8, -} -impl DATA_BYTE_2R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_1R { - bits: u8, -} -impl DATA_BYTE_1R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_0R { - bits: u8, -} -impl DATA_BYTE_0R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Proxy"] -pub struct _DATA_BYTE_3W<'a> { - w: &'a mut W, -} -impl<'a> _DATA_BYTE_3W<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 255; - const OFFSET: u8 = 0; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = r" Proxy"] -pub struct _DATA_BYTE_2W<'a> { - w: &'a mut W, -} -impl<'a> _DATA_BYTE_2W<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 255; - const OFFSET: u8 = 8; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = r" Proxy"] -pub struct _DATA_BYTE_1W<'a> { - w: &'a mut W, -} -impl<'a> _DATA_BYTE_1W<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 255; - const OFFSET: u8 = 16; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = r" Proxy"] -pub struct _DATA_BYTE_0W<'a> { - w: &'a mut W, -} -impl<'a> _DATA_BYTE_0W<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 255; - const OFFSET: u8 = 24; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:7 - Data byte 3 of Rx/Tx frame."] - #[inline] - pub fn data_byte_3(&self) -> DATA_BYTE_3R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_3R { bits } - } - #[doc = "Bits 8:15 - Data byte 2 of Rx/Tx frame."] - #[inline] - pub fn data_byte_2(&self) -> DATA_BYTE_2R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 8; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_2R { bits } - } - #[doc = "Bits 16:23 - Data byte 1 of Rx/Tx frame."] - #[inline] - pub fn data_byte_1(&self) -> DATA_BYTE_1R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 16; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_1R { bits } - } - #[doc = "Bits 24:31 - Data byte 0 of Rx/Tx frame."] - #[inline] - pub fn data_byte_0(&self) -> DATA_BYTE_0R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 24; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_0R { bits } - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 0 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bits 0:7 - Data byte 3 of Rx/Tx frame."] - #[inline] - pub fn data_byte_3(&mut self) -> _DATA_BYTE_3W { - _DATA_BYTE_3W { w: self } - } - #[doc = "Bits 8:15 - Data byte 2 of Rx/Tx frame."] - #[inline] - pub fn data_byte_2(&mut self) -> _DATA_BYTE_2W { - _DATA_BYTE_2W { w: self } - } - #[doc = "Bits 16:23 - Data byte 1 of Rx/Tx frame."] - #[inline] - pub fn data_byte_1(&mut self) -> _DATA_BYTE_1W { - _DATA_BYTE_1W { w: self } - } - #[doc = "Bits 24:31 - Data byte 0 of Rx/Tx frame."] - #[inline] - pub fn data_byte_0(&mut self) -> _DATA_BYTE_0W { - _DATA_BYTE_0W { w: self } - } -} diff --git a/src/can1/esr1/mod.rs b/src/can1/esr1/mod.rs deleted file mode 100644 index 4798194..0000000 --- a/src/can1/esr1/mod.rs +++ /dev/null @@ -1,1848 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::ESR1 { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = "Possible values of the field `ERRINT`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum ERRINTR { - #[doc = "No such occurrence."] _0, - #[doc = "Indicates setting of any Error Bit in the Error and Status Register."] _1, -} -impl ERRINTR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - ERRINTR::_0 => false, - ERRINTR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> ERRINTR { - match value { - false => ERRINTR::_0, - true => ERRINTR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == ERRINTR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == ERRINTR::_1 - } -} -#[doc = "Possible values of the field `BOFFINT`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum BOFFINTR { - #[doc = "No such occurrence."] _0, - #[doc = "FlexCAN module entered Bus Off state."] _1, -} -impl BOFFINTR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - BOFFINTR::_0 => false, - BOFFINTR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> BOFFINTR { - match value { - false => BOFFINTR::_0, - true => BOFFINTR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == BOFFINTR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == BOFFINTR::_1 - } -} -#[doc = "Possible values of the field `RX`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum RXR { - #[doc = "FlexCAN is not receiving a message."] _0, - #[doc = "FlexCAN is receiving a message."] _1, -} -impl RXR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - RXR::_0 => false, - RXR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> RXR { - match value { - false => RXR::_0, - true => RXR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == RXR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == RXR::_1 - } -} -#[doc = "Possible values of the field `FLTCONF`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum FLTCONFR { - #[doc = "Error Active"] _00, - #[doc = "Error Passive"] _01, - #[doc = "Bus Off"] _1X, - #[doc = r" Reserved"] _Reserved(u8), -} -impl FLTCONFR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - match *self { - FLTCONFR::_00 => 0, - FLTCONFR::_01 => 1, - FLTCONFR::_1X => 2, - FLTCONFR::_Reserved(bits) => bits, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: u8) -> FLTCONFR { - match value { - 0 => FLTCONFR::_00, - 1 => FLTCONFR::_01, - 2 => FLTCONFR::_1X, - i => FLTCONFR::_Reserved(i), - } - } - #[doc = "Checks if the value of the field is `_00`"] - #[inline] - pub fn is_00(&self) -> bool { - *self == FLTCONFR::_00 - } - #[doc = "Checks if the value of the field is `_01`"] - #[inline] - pub fn is_01(&self) -> bool { - *self == FLTCONFR::_01 - } - #[doc = "Checks if the value of the field is `_1X`"] - #[inline] - pub fn is_1x(&self) -> bool { - *self == FLTCONFR::_1X - } -} -#[doc = "Possible values of the field `TX`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum TXR { - #[doc = "FlexCAN is not transmitting a message."] _0, - #[doc = "FlexCAN is transmitting a message."] _1, -} -impl TXR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - TXR::_0 => false, - TXR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> TXR { - match value { - false => TXR::_0, - true => TXR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == TXR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == TXR::_1 - } -} -#[doc = "Possible values of the field `IDLE`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum IDLER { - #[doc = "No such occurrence."] _0, - #[doc = "CAN bus is now IDLE."] _1, -} -impl IDLER { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - IDLER::_0 => false, - IDLER::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> IDLER { - match value { - false => IDLER::_0, - true => IDLER::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == IDLER::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == IDLER::_1 - } -} -#[doc = "Possible values of the field `RXWRN`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum RXWRNR { - #[doc = "No such occurrence."] _0, - #[doc = "RXERRCNT is greater than or equal to 96."] _1, -} -impl RXWRNR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - RXWRNR::_0 => false, - RXWRNR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> RXWRNR { - match value { - false => RXWRNR::_0, - true => RXWRNR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == RXWRNR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == RXWRNR::_1 - } -} -#[doc = "Possible values of the field `TXWRN`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum TXWRNR { - #[doc = "No such occurrence."] _0, - #[doc = "TXERRCNT is greater than or equal to 96."] _1, -} -impl TXWRNR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - TXWRNR::_0 => false, - TXWRNR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> TXWRNR { - match value { - false => TXWRNR::_0, - true => TXWRNR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == TXWRNR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == TXWRNR::_1 - } -} -#[doc = "Possible values of the field `STFERR`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum STFERRR { - #[doc = "No such occurrence."] _0, - #[doc = "A Stuffing Error occurred since last read of this register."] _1, -} -impl STFERRR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - STFERRR::_0 => false, - STFERRR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> STFERRR { - match value { - false => STFERRR::_0, - true => STFERRR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == STFERRR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == STFERRR::_1 - } -} -#[doc = "Possible values of the field `FRMERR`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum FRMERRR { - #[doc = "No such occurrence."] _0, - #[doc = "A Form Error occurred since last read of this register."] _1, -} -impl FRMERRR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - FRMERRR::_0 => false, - FRMERRR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> FRMERRR { - match value { - false => FRMERRR::_0, - true => FRMERRR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == FRMERRR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == FRMERRR::_1 - } -} -#[doc = "Possible values of the field `CRCERR`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum CRCERRR { - #[doc = "No such occurrence."] _0, - #[doc = "A CRC error occurred since last read of this register."] _1, -} -impl CRCERRR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - CRCERRR::_0 => false, - CRCERRR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> CRCERRR { - match value { - false => CRCERRR::_0, - true => CRCERRR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == CRCERRR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == CRCERRR::_1 - } -} -#[doc = "Possible values of the field `ACKERR`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum ACKERRR { - #[doc = "No such occurrence."] _0, - #[doc = "An ACK error occurred since last read of this register."] _1, -} -impl ACKERRR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - ACKERRR::_0 => false, - ACKERRR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> ACKERRR { - match value { - false => ACKERRR::_0, - true => ACKERRR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == ACKERRR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == ACKERRR::_1 - } -} -#[doc = "Possible values of the field `BIT0ERR`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum BIT0ERRR { - #[doc = "No such occurrence."] _0, - #[doc = "At least one bit sent as dominant is received as recessive."] _1, -} -impl BIT0ERRR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - BIT0ERRR::_0 => false, - BIT0ERRR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> BIT0ERRR { - match value { - false => BIT0ERRR::_0, - true => BIT0ERRR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == BIT0ERRR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == BIT0ERRR::_1 - } -} -#[doc = "Possible values of the field `BIT1ERR`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum BIT1ERRR { - #[doc = "No such occurrence."] _0, - #[doc = "At least one bit sent as recessive is received as dominant."] _1, -} -impl BIT1ERRR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - BIT1ERRR::_0 => false, - BIT1ERRR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> BIT1ERRR { - match value { - false => BIT1ERRR::_0, - true => BIT1ERRR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == BIT1ERRR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == BIT1ERRR::_1 - } -} -#[doc = "Possible values of the field `RWRNINT`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum RWRNINTR { - #[doc = "No such occurrence."] _0, - #[doc = "The Rx error counter transitioned from less than 96 to greater than or equal to 96."] - _1, -} -impl RWRNINTR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - RWRNINTR::_0 => false, - RWRNINTR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> RWRNINTR { - match value { - false => RWRNINTR::_0, - true => RWRNINTR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == RWRNINTR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == RWRNINTR::_1 - } -} -#[doc = "Possible values of the field `TWRNINT`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum TWRNINTR { - #[doc = "No such occurrence."] _0, - #[doc = "The Tx error counter transitioned from less than 96 to greater than or equal to 96."] - _1, -} -impl TWRNINTR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - TWRNINTR::_0 => false, - TWRNINTR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> TWRNINTR { - match value { - false => TWRNINTR::_0, - true => TWRNINTR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == TWRNINTR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == TWRNINTR::_1 - } -} -#[doc = "Possible values of the field `SYNCH`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum SYNCHR { - #[doc = "FlexCAN is not synchronized to the CAN bus."] _0, - #[doc = "FlexCAN is synchronized to the CAN bus."] _1, -} -impl SYNCHR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - SYNCHR::_0 => false, - SYNCHR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> SYNCHR { - match value { - false => SYNCHR::_0, - true => SYNCHR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == SYNCHR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == SYNCHR::_1 - } -} -#[doc = "Possible values of the field `BOFFDONEINT`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum BOFFDONEINTR { - #[doc = "No such occurrence."] _0, - #[doc = "FlexCAN module has completed Bus Off process."] _1, -} -impl BOFFDONEINTR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - BOFFDONEINTR::_0 => false, - BOFFDONEINTR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> BOFFDONEINTR { - match value { - false => BOFFDONEINTR::_0, - true => BOFFDONEINTR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == BOFFDONEINTR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == BOFFDONEINTR::_1 - } -} -#[doc = "Possible values of the field `ERRINT_FAST`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum ERRINT_FASTR { - #[doc = "No such occurrence."] _0, - #[doc = "Indicates setting of any Error Bit detected in the Data Phase of CAN FD frames with the BRS bit set."] - _1, -} -impl ERRINT_FASTR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - ERRINT_FASTR::_0 => false, - ERRINT_FASTR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> ERRINT_FASTR { - match value { - false => ERRINT_FASTR::_0, - true => ERRINT_FASTR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == ERRINT_FASTR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == ERRINT_FASTR::_1 - } -} -#[doc = "Possible values of the field `ERROVR`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum ERROVRR { - #[doc = "Overrun has not occurred."] _0, - #[doc = "Overrun has occurred."] _1, -} -impl ERROVRR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - ERROVRR::_0 => false, - ERROVRR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> ERROVRR { - match value { - false => ERROVRR::_0, - true => ERROVRR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == ERROVRR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == ERROVRR::_1 - } -} -#[doc = "Possible values of the field `STFERR_FAST`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum STFERR_FASTR { - #[doc = "No such occurrence."] _0, - #[doc = "A Stuffing Error occurred since last read of this register."] _1, -} -impl STFERR_FASTR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - STFERR_FASTR::_0 => false, - STFERR_FASTR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> STFERR_FASTR { - match value { - false => STFERR_FASTR::_0, - true => STFERR_FASTR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == STFERR_FASTR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == STFERR_FASTR::_1 - } -} -#[doc = "Possible values of the field `FRMERR_FAST`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum FRMERR_FASTR { - #[doc = "No such occurrence."] _0, - #[doc = "A Form Error occurred since last read of this register."] _1, -} -impl FRMERR_FASTR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - FRMERR_FASTR::_0 => false, - FRMERR_FASTR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> FRMERR_FASTR { - match value { - false => FRMERR_FASTR::_0, - true => FRMERR_FASTR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == FRMERR_FASTR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == FRMERR_FASTR::_1 - } -} -#[doc = "Possible values of the field `CRCERR_FAST`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum CRCERR_FASTR { - #[doc = "No such occurrence."] _0, - #[doc = "A CRC error occurred since last read of this register."] _1, -} -impl CRCERR_FASTR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - CRCERR_FASTR::_0 => false, - CRCERR_FASTR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> CRCERR_FASTR { - match value { - false => CRCERR_FASTR::_0, - true => CRCERR_FASTR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == CRCERR_FASTR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == CRCERR_FASTR::_1 - } -} -#[doc = "Possible values of the field `BIT0ERR_FAST`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum BIT0ERR_FASTR { - #[doc = "No such occurrence."] _0, - #[doc = "At least one bit sent as dominant is received as recessive."] _1, -} -impl BIT0ERR_FASTR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - BIT0ERR_FASTR::_0 => false, - BIT0ERR_FASTR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> BIT0ERR_FASTR { - match value { - false => BIT0ERR_FASTR::_0, - true => BIT0ERR_FASTR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == BIT0ERR_FASTR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == BIT0ERR_FASTR::_1 - } -} -#[doc = "Possible values of the field `BIT1ERR_FAST`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum BIT1ERR_FASTR { - #[doc = "No such occurrence."] _0, - #[doc = "At least one bit sent as recessive is received as dominant."] _1, -} -impl BIT1ERR_FASTR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - BIT1ERR_FASTR::_0 => false, - BIT1ERR_FASTR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> BIT1ERR_FASTR { - match value { - false => BIT1ERR_FASTR::_0, - true => BIT1ERR_FASTR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == BIT1ERR_FASTR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == BIT1ERR_FASTR::_1 - } -} -#[doc = "Values that can be written to the field `ERRINT`"] -pub enum ERRINTW { - #[doc = "No such occurrence."] _0, - #[doc = "Indicates setting of any Error Bit in the Error and Status Register."] _1, -} -impl ERRINTW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - ERRINTW::_0 => false, - ERRINTW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _ERRINTW<'a> { - w: &'a mut W, -} -impl<'a> _ERRINTW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: ERRINTW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "No such occurrence."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(ERRINTW::_0) - } - #[doc = "Indicates setting of any Error Bit in the Error and Status Register."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(ERRINTW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 1; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `BOFFINT`"] -pub enum BOFFINTW { - #[doc = "No such occurrence."] _0, - #[doc = "FlexCAN module entered Bus Off state."] _1, -} -impl BOFFINTW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - BOFFINTW::_0 => false, - BOFFINTW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _BOFFINTW<'a> { - w: &'a mut W, -} -impl<'a> _BOFFINTW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: BOFFINTW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "No such occurrence."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(BOFFINTW::_0) - } - #[doc = "FlexCAN module entered Bus Off state."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(BOFFINTW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 2; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `RWRNINT`"] -pub enum RWRNINTW { - #[doc = "No such occurrence."] _0, - #[doc = "The Rx error counter transitioned from less than 96 to greater than or equal to 96."] - _1, -} -impl RWRNINTW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - RWRNINTW::_0 => false, - RWRNINTW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _RWRNINTW<'a> { - w: &'a mut W, -} -impl<'a> _RWRNINTW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: RWRNINTW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "No such occurrence."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(RWRNINTW::_0) - } - #[doc = "The Rx error counter transitioned from less than 96 to greater than or equal to 96."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(RWRNINTW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 16; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `TWRNINT`"] -pub enum TWRNINTW { - #[doc = "No such occurrence."] _0, - #[doc = "The Tx error counter transitioned from less than 96 to greater than or equal to 96."] - _1, -} -impl TWRNINTW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - TWRNINTW::_0 => false, - TWRNINTW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _TWRNINTW<'a> { - w: &'a mut W, -} -impl<'a> _TWRNINTW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: TWRNINTW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "No such occurrence."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(TWRNINTW::_0) - } - #[doc = "The Tx error counter transitioned from less than 96 to greater than or equal to 96."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(TWRNINTW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 17; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `BOFFDONEINT`"] -pub enum BOFFDONEINTW { - #[doc = "No such occurrence."] _0, - #[doc = "FlexCAN module has completed Bus Off process."] _1, -} -impl BOFFDONEINTW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - BOFFDONEINTW::_0 => false, - BOFFDONEINTW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _BOFFDONEINTW<'a> { - w: &'a mut W, -} -impl<'a> _BOFFDONEINTW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: BOFFDONEINTW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "No such occurrence."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(BOFFDONEINTW::_0) - } - #[doc = "FlexCAN module has completed Bus Off process."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(BOFFDONEINTW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 19; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `ERRINT_FAST`"] -pub enum ERRINT_FASTW { - #[doc = "No such occurrence."] _0, - #[doc = "Indicates setting of any Error Bit detected in the Data Phase of CAN FD frames with the BRS bit set."] - _1, -} -impl ERRINT_FASTW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - ERRINT_FASTW::_0 => false, - ERRINT_FASTW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _ERRINT_FASTW<'a> { - w: &'a mut W, -} -impl<'a> _ERRINT_FASTW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: ERRINT_FASTW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "No such occurrence."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(ERRINT_FASTW::_0) - } - #[doc = "Indicates setting of any Error Bit detected in the Data Phase of CAN FD frames with the BRS bit set."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(ERRINT_FASTW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 20; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `ERROVR`"] -pub enum ERROVRW { - #[doc = "Overrun has not occurred."] _0, - #[doc = "Overrun has occurred."] _1, -} -impl ERROVRW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - ERROVRW::_0 => false, - ERROVRW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _ERROVRW<'a> { - w: &'a mut W, -} -impl<'a> _ERROVRW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: ERROVRW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Overrun has not occurred."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(ERROVRW::_0) - } - #[doc = "Overrun has occurred."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(ERROVRW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 21; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bit 1 - Error Interrupt"] - #[inline] - pub fn errint(&self) -> ERRINTR { - ERRINTR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 1; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 2 - Bus Off Interrupt"] - #[inline] - pub fn boffint(&self) -> BOFFINTR { - BOFFINTR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 2; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 3 - FlexCAN In Reception"] - #[inline] - pub fn rx(&self) -> RXR { - RXR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 3; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bits 4:5 - Fault Confinement State"] - #[inline] - pub fn fltconf(&self) -> FLTCONFR { - FLTCONFR::_from({ - const MASK: u8 = 3; - const OFFSET: u8 = 4; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }) - } - #[doc = "Bit 6 - FlexCAN In Transmission"] - #[inline] - pub fn tx(&self) -> TXR { - TXR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 6; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 7 - IDLE"] - #[inline] - pub fn idle(&self) -> IDLER { - IDLER::_from({ - const MASK: bool = true; - const OFFSET: u8 = 7; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 8 - Rx Error Warning"] - #[inline] - pub fn rxwrn(&self) -> RXWRNR { - RXWRNR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 8; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 9 - TX Error Warning"] - #[inline] - pub fn txwrn(&self) -> TXWRNR { - TXWRNR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 9; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 10 - Stuffing Error"] - #[inline] - pub fn stferr(&self) -> STFERRR { - STFERRR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 10; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 11 - Form Error"] - #[inline] - pub fn frmerr(&self) -> FRMERRR { - FRMERRR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 11; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 12 - Cyclic Redundancy Check Error"] - #[inline] - pub fn crcerr(&self) -> CRCERRR { - CRCERRR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 12; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 13 - Acknowledge Error"] - #[inline] - pub fn ackerr(&self) -> ACKERRR { - ACKERRR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 13; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 14 - Bit0 Error"] - #[inline] - pub fn bit0err(&self) -> BIT0ERRR { - BIT0ERRR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 14; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 15 - Bit1 Error"] - #[inline] - pub fn bit1err(&self) -> BIT1ERRR { - BIT1ERRR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 15; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 16 - Rx Warning Interrupt Flag"] - #[inline] - pub fn rwrnint(&self) -> RWRNINTR { - RWRNINTR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 16; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 17 - Tx Warning Interrupt Flag"] - #[inline] - pub fn twrnint(&self) -> TWRNINTR { - TWRNINTR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 17; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 18 - CAN Synchronization Status"] - #[inline] - pub fn synch(&self) -> SYNCHR { - SYNCHR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 18; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 19 - Bus Off Done Interrupt"] - #[inline] - pub fn boffdoneint(&self) -> BOFFDONEINTR { - BOFFDONEINTR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 19; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 20 - Error Interrupt for errors detected in the Data Phase of CAN FD frames with the BRS bit set"] - #[inline] - pub fn errint_fast(&self) -> ERRINT_FASTR { - ERRINT_FASTR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 20; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 21 - Error Overrun bit"] - #[inline] - pub fn errovr(&self) -> ERROVRR { - ERROVRR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 21; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 26 - Stuffing Error in the Data Phase of CAN FD frames with the BRS bit set"] - #[inline] - pub fn stferr_fast(&self) -> STFERR_FASTR { - STFERR_FASTR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 26; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 27 - Form Error in the Data Phase of CAN FD frames with the BRS bit set"] - #[inline] - pub fn frmerr_fast(&self) -> FRMERR_FASTR { - FRMERR_FASTR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 27; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 28 - Cyclic Redundancy Check Error in the CRC field of CAN FD frames with the BRS bit set"] - #[inline] - pub fn crcerr_fast(&self) -> CRCERR_FASTR { - CRCERR_FASTR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 28; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 30 - Bit0 Error in the Data Phase of CAN FD frames with the BRS bit set"] - #[inline] - pub fn bit0err_fast(&self) -> BIT0ERR_FASTR { - BIT0ERR_FASTR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 30; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 31 - Bit1 Error in the Data Phase of CAN FD frames with the BRS bit set"] - #[inline] - pub fn bit1err_fast(&self) -> BIT1ERR_FASTR { - BIT1ERR_FASTR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 31; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 0 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bit 1 - Error Interrupt"] - #[inline] - pub fn errint(&mut self) -> _ERRINTW { - _ERRINTW { w: self } - } - #[doc = "Bit 2 - Bus Off Interrupt"] - #[inline] - pub fn boffint(&mut self) -> _BOFFINTW { - _BOFFINTW { w: self } - } - #[doc = "Bit 16 - Rx Warning Interrupt Flag"] - #[inline] - pub fn rwrnint(&mut self) -> _RWRNINTW { - _RWRNINTW { w: self } - } - #[doc = "Bit 17 - Tx Warning Interrupt Flag"] - #[inline] - pub fn twrnint(&mut self) -> _TWRNINTW { - _TWRNINTW { w: self } - } - #[doc = "Bit 19 - Bus Off Done Interrupt"] - #[inline] - pub fn boffdoneint(&mut self) -> _BOFFDONEINTW { - _BOFFDONEINTW { w: self } - } - #[doc = "Bit 20 - Error Interrupt for errors detected in the Data Phase of CAN FD frames with the BRS bit set"] - #[inline] - pub fn errint_fast(&mut self) -> _ERRINT_FASTW { - _ERRINT_FASTW { w: self } - } - #[doc = "Bit 21 - Error Overrun bit"] - #[inline] - pub fn errovr(&mut self) -> _ERROVRW { - _ERROVRW { w: self } - } -} diff --git a/src/can1/esr2/mod.rs b/src/can1/esr2/mod.rs deleted file mode 100644 index 8f2635b..0000000 --- a/src/can1/esr2/mod.rs +++ /dev/null @@ -1,150 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -impl super::ESR2 { - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } -} -#[doc = "Possible values of the field `IMB`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum IMBR { - #[doc = "If ESR2[VPS] is asserted, the ESR2[LPTM] is not an inactive Mailbox."] _0, - #[doc = "If ESR2[VPS] is asserted, there is at least one inactive Mailbox. LPTM content is the number of the first one."] - _1, -} -impl IMBR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - IMBR::_0 => false, - IMBR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> IMBR { - match value { - false => IMBR::_0, - true => IMBR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == IMBR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == IMBR::_1 - } -} -#[doc = "Possible values of the field `VPS`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum VPSR { - #[doc = "Contents of IMB and LPTM are invalid."] _0, - #[doc = "Contents of IMB and LPTM are valid."] _1, -} -impl VPSR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - VPSR::_0 => false, - VPSR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> VPSR { - match value { - false => VPSR::_0, - true => VPSR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == VPSR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == VPSR::_1 - } -} -#[doc = r" Value of the field"] -pub struct LPTMR { - bits: u8, -} -impl LPTMR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bit 13 - Inactive Mailbox"] - #[inline] - pub fn imb(&self) -> IMBR { - IMBR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 13; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 14 - Valid Priority Status"] - #[inline] - pub fn vps(&self) -> VPSR { - VPSR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 14; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bits 16:22 - Lowest Priority Tx Mailbox"] - #[inline] - pub fn lptm(&self) -> LPTMR { - let bits = { - const MASK: u8 = 127; - const OFFSET: u8 = 16; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - LPTMR { bits } - } -} diff --git a/src/can1/fdcbt/mod.rs b/src/can1/fdcbt/mod.rs deleted file mode 100644 index 0ddab6e..0000000 --- a/src/can1/fdcbt/mod.rs +++ /dev/null @@ -1,269 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::FDCBT { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = r" Value of the field"] -pub struct FPSEG2R { - bits: u8, -} -impl FPSEG2R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct FPSEG1R { - bits: u8, -} -impl FPSEG1R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct FPROPSEGR { - bits: u8, -} -impl FPROPSEGR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct FRJWR { - bits: u8, -} -impl FRJWR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct FPRESDIVR { - bits: u16, -} -impl FPRESDIVR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u16 { - self.bits - } -} -#[doc = r" Proxy"] -pub struct _FPSEG2W<'a> { - w: &'a mut W, -} -impl<'a> _FPSEG2W<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 7; - const OFFSET: u8 = 0; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = r" Proxy"] -pub struct _FPSEG1W<'a> { - w: &'a mut W, -} -impl<'a> _FPSEG1W<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 7; - const OFFSET: u8 = 5; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = r" Proxy"] -pub struct _FPROPSEGW<'a> { - w: &'a mut W, -} -impl<'a> _FPROPSEGW<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 31; - const OFFSET: u8 = 10; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = r" Proxy"] -pub struct _FRJWW<'a> { - w: &'a mut W, -} -impl<'a> _FRJWW<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 7; - const OFFSET: u8 = 16; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = r" Proxy"] -pub struct _FPRESDIVW<'a> { - w: &'a mut W, -} -impl<'a> _FPRESDIVW<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u16) -> &'a mut W { - const MASK: u16 = 1023; - const OFFSET: u8 = 20; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:2 - Fast Phase Segment 2"] - #[inline] - pub fn fpseg2(&self) -> FPSEG2R { - let bits = { - const MASK: u8 = 7; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - FPSEG2R { bits } - } - #[doc = "Bits 5:7 - Fast Phase Segment 1"] - #[inline] - pub fn fpseg1(&self) -> FPSEG1R { - let bits = { - const MASK: u8 = 7; - const OFFSET: u8 = 5; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - FPSEG1R { bits } - } - #[doc = "Bits 10:14 - Fast Propagation Segment"] - #[inline] - pub fn fpropseg(&self) -> FPROPSEGR { - let bits = { - const MASK: u8 = 31; - const OFFSET: u8 = 10; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - FPROPSEGR { bits } - } - #[doc = "Bits 16:18 - Fast Resync Jump Width"] - #[inline] - pub fn frjw(&self) -> FRJWR { - let bits = { - const MASK: u8 = 7; - const OFFSET: u8 = 16; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - FRJWR { bits } - } - #[doc = "Bits 20:29 - Fast Prescaler Division Factor"] - #[inline] - pub fn fpresdiv(&self) -> FPRESDIVR { - let bits = { - const MASK: u16 = 1023; - const OFFSET: u8 = 20; - ((self.bits >> OFFSET) & MASK as u32) as u16 - }; - FPRESDIVR { bits } - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 0 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bits 0:2 - Fast Phase Segment 2"] - #[inline] - pub fn fpseg2(&mut self) -> _FPSEG2W { - _FPSEG2W { w: self } - } - #[doc = "Bits 5:7 - Fast Phase Segment 1"] - #[inline] - pub fn fpseg1(&mut self) -> _FPSEG1W { - _FPSEG1W { w: self } - } - #[doc = "Bits 10:14 - Fast Propagation Segment"] - #[inline] - pub fn fpropseg(&mut self) -> _FPROPSEGW { - _FPROPSEGW { w: self } - } - #[doc = "Bits 16:18 - Fast Resync Jump Width"] - #[inline] - pub fn frjw(&mut self) -> _FRJWW { - _FRJWW { w: self } - } - #[doc = "Bits 20:29 - Fast Prescaler Division Factor"] - #[inline] - pub fn fpresdiv(&mut self) -> _FPRESDIVW { - _FPRESDIVW { w: self } - } -} diff --git a/src/can1/fdcrc/mod.rs b/src/can1/fdcrc/mod.rs deleted file mode 100644 index d0da073..0000000 --- a/src/can1/fdcrc/mod.rs +++ /dev/null @@ -1,62 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -impl super::FDCRC { - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } -} -#[doc = r" Value of the field"] -pub struct FD_TXCRCR { - bits: u32, -} -impl FD_TXCRCR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct FD_MBCRCR { - bits: u8, -} -impl FD_MBCRCR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:20 - Extended Transmitted CRC value"] - #[inline] - pub fn fd_txcrc(&self) -> FD_TXCRCR { - let bits = { - const MASK: u32 = 2097151; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u32 - }; - FD_TXCRCR { bits } - } - #[doc = "Bits 24:30 - CRC Mailbox Number for FD_TXCRC"] - #[inline] - pub fn fd_mbcrc(&self) -> FD_MBCRCR { - let bits = { - const MASK: u8 = 127; - const OFFSET: u8 = 24; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - FD_MBCRCR { bits } - } -} diff --git a/src/can1/fdctrl/mod.rs b/src/can1/fdctrl/mod.rs deleted file mode 100644 index cf39ab2..0000000 --- a/src/can1/fdctrl/mod.rs +++ /dev/null @@ -1,599 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::FDCTRL { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = r" Value of the field"] -pub struct TDCVALR { - bits: u8, -} -impl TDCVALR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct TDCOFFR { - bits: u8, -} -impl TDCOFFR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = "Possible values of the field `TDCFAIL`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum TDCFAILR { - #[doc = "Measured loop delay is in range."] _0, - #[doc = "Measured loop delay is out of range."] _1, -} -impl TDCFAILR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - TDCFAILR::_0 => false, - TDCFAILR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> TDCFAILR { - match value { - false => TDCFAILR::_0, - true => TDCFAILR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == TDCFAILR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == TDCFAILR::_1 - } -} -#[doc = "Possible values of the field `TDCEN`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum TDCENR { - #[doc = "TDC is disabled"] _0, - #[doc = "TDC is enabled"] _1, -} -impl TDCENR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - TDCENR::_0 => false, - TDCENR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> TDCENR { - match value { - false => TDCENR::_0, - true => TDCENR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == TDCENR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == TDCENR::_1 - } -} -#[doc = "Possible values of the field `MBDSR0`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum MBDSR0R { - #[doc = "Selects 8 bytes per Message Buffer."] _00, - #[doc = "Selects 16 bytes per Message Buffer."] _01, - #[doc = "Selects 32 bytes per Message Buffer."] _10, - #[doc = "Selects 64 bytes per Message Buffer."] _11, -} -impl MBDSR0R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - match *self { - MBDSR0R::_00 => 0, - MBDSR0R::_01 => 1, - MBDSR0R::_10 => 2, - MBDSR0R::_11 => 3, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: u8) -> MBDSR0R { - match value { - 0 => MBDSR0R::_00, - 1 => MBDSR0R::_01, - 2 => MBDSR0R::_10, - 3 => MBDSR0R::_11, - _ => unreachable!(), - } - } - #[doc = "Checks if the value of the field is `_00`"] - #[inline] - pub fn is_00(&self) -> bool { - *self == MBDSR0R::_00 - } - #[doc = "Checks if the value of the field is `_01`"] - #[inline] - pub fn is_01(&self) -> bool { - *self == MBDSR0R::_01 - } - #[doc = "Checks if the value of the field is `_10`"] - #[inline] - pub fn is_10(&self) -> bool { - *self == MBDSR0R::_10 - } - #[doc = "Checks if the value of the field is `_11`"] - #[inline] - pub fn is_11(&self) -> bool { - *self == MBDSR0R::_11 - } -} -#[doc = "Possible values of the field `FDRATE`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum FDRATER { - #[doc = "Transmit a frame in nominal rate. The BRS bit in the Tx MB has no effect."] _0, - #[doc = "Transmit a frame with bit rate switching if the BRS bit in the Tx MB is recessive."] _1, -} -impl FDRATER { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - FDRATER::_0 => false, - FDRATER::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> FDRATER { - match value { - false => FDRATER::_0, - true => FDRATER::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == FDRATER::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == FDRATER::_1 - } -} -#[doc = r" Proxy"] -pub struct _TDCOFFW<'a> { - w: &'a mut W, -} -impl<'a> _TDCOFFW<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 31; - const OFFSET: u8 = 8; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `TDCFAIL`"] -pub enum TDCFAILW { - #[doc = "Measured loop delay is in range."] _0, - #[doc = "Measured loop delay is out of range."] _1, -} -impl TDCFAILW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - TDCFAILW::_0 => false, - TDCFAILW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _TDCFAILW<'a> { - w: &'a mut W, -} -impl<'a> _TDCFAILW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: TDCFAILW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Measured loop delay is in range."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(TDCFAILW::_0) - } - #[doc = "Measured loop delay is out of range."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(TDCFAILW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 14; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `TDCEN`"] -pub enum TDCENW { - #[doc = "TDC is disabled"] _0, - #[doc = "TDC is enabled"] _1, -} -impl TDCENW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - TDCENW::_0 => false, - TDCENW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _TDCENW<'a> { - w: &'a mut W, -} -impl<'a> _TDCENW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: TDCENW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "TDC is disabled"] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(TDCENW::_0) - } - #[doc = "TDC is enabled"] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(TDCENW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 15; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `MBDSR0`"] -pub enum MBDSR0W { - #[doc = "Selects 8 bytes per Message Buffer."] _00, - #[doc = "Selects 16 bytes per Message Buffer."] _01, - #[doc = "Selects 32 bytes per Message Buffer."] _10, - #[doc = "Selects 64 bytes per Message Buffer."] _11, -} -impl MBDSR0W { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> u8 { - match *self { - MBDSR0W::_00 => 0, - MBDSR0W::_01 => 1, - MBDSR0W::_10 => 2, - MBDSR0W::_11 => 3, - } - } -} -#[doc = r" Proxy"] -pub struct _MBDSR0W<'a> { - w: &'a mut W, -} -impl<'a> _MBDSR0W<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: MBDSR0W) -> &'a mut W { - { - self.bits(variant._bits()) - } - } - #[doc = "Selects 8 bytes per Message Buffer."] - #[inline] - pub fn _00(self) -> &'a mut W { - self.variant(MBDSR0W::_00) - } - #[doc = "Selects 16 bytes per Message Buffer."] - #[inline] - pub fn _01(self) -> &'a mut W { - self.variant(MBDSR0W::_01) - } - #[doc = "Selects 32 bytes per Message Buffer."] - #[inline] - pub fn _10(self) -> &'a mut W { - self.variant(MBDSR0W::_10) - } - #[doc = "Selects 64 bytes per Message Buffer."] - #[inline] - pub fn _11(self) -> &'a mut W { - self.variant(MBDSR0W::_11) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 3; - const OFFSET: u8 = 16; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `FDRATE`"] -pub enum FDRATEW { - #[doc = "Transmit a frame in nominal rate. The BRS bit in the Tx MB has no effect."] _0, - #[doc = "Transmit a frame with bit rate switching if the BRS bit in the Tx MB is recessive."] _1, -} -impl FDRATEW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - FDRATEW::_0 => false, - FDRATEW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _FDRATEW<'a> { - w: &'a mut W, -} -impl<'a> _FDRATEW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: FDRATEW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Transmit a frame in nominal rate. The BRS bit in the Tx MB has no effect."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(FDRATEW::_0) - } - #[doc = "Transmit a frame with bit rate switching if the BRS bit in the Tx MB is recessive."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(FDRATEW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 31; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:5 - Transceiver Delay Compensation Value"] - #[inline] - pub fn tdcval(&self) -> TDCVALR { - let bits = { - const MASK: u8 = 63; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - TDCVALR { bits } - } - #[doc = "Bits 8:12 - Transceiver Delay Compensation Offset"] - #[inline] - pub fn tdcoff(&self) -> TDCOFFR { - let bits = { - const MASK: u8 = 31; - const OFFSET: u8 = 8; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - TDCOFFR { bits } - } - #[doc = "Bit 14 - Transceiver Delay Compensation Fail"] - #[inline] - pub fn tdcfail(&self) -> TDCFAILR { - TDCFAILR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 14; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 15 - Transceiver Delay Compensation Enable"] - #[inline] - pub fn tdcen(&self) -> TDCENR { - TDCENR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 15; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bits 16:17 - Message Buffer Data Size for Region 0"] - #[inline] - pub fn mbdsr0(&self) -> MBDSR0R { - MBDSR0R::_from({ - const MASK: u8 = 3; - const OFFSET: u8 = 16; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }) - } - #[doc = "Bit 31 - Bit Rate Switch Enable"] - #[inline] - pub fn fdrate(&self) -> FDRATER { - FDRATER::_from({ - const MASK: bool = true; - const OFFSET: u8 = 31; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 2147483904 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bits 8:12 - Transceiver Delay Compensation Offset"] - #[inline] - pub fn tdcoff(&mut self) -> _TDCOFFW { - _TDCOFFW { w: self } - } - #[doc = "Bit 14 - Transceiver Delay Compensation Fail"] - #[inline] - pub fn tdcfail(&mut self) -> _TDCFAILW { - _TDCFAILW { w: self } - } - #[doc = "Bit 15 - Transceiver Delay Compensation Enable"] - #[inline] - pub fn tdcen(&mut self) -> _TDCENW { - _TDCENW { w: self } - } - #[doc = "Bits 16:17 - Message Buffer Data Size for Region 0"] - #[inline] - pub fn mbdsr0(&mut self) -> _MBDSR0W { - _MBDSR0W { w: self } - } - #[doc = "Bit 31 - Bit Rate Switch Enable"] - #[inline] - pub fn fdrate(&mut self) -> _FDRATEW { - _FDRATEW { w: self } - } -} diff --git a/src/can1/flt_dlc/mod.rs b/src/can1/flt_dlc/mod.rs deleted file mode 100644 index db8cb41..0000000 --- a/src/can1/flt_dlc/mod.rs +++ /dev/null @@ -1,146 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::FLT_DLC { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = r" Value of the field"] -pub struct FLT_DLC_HIR { - bits: u8, -} -impl FLT_DLC_HIR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct FLT_DLC_LOR { - bits: u8, -} -impl FLT_DLC_LOR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Proxy"] -pub struct _FLT_DLC_HIW<'a> { - w: &'a mut W, -} -impl<'a> _FLT_DLC_HIW<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 15; - const OFFSET: u8 = 0; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = r" Proxy"] -pub struct _FLT_DLC_LOW<'a> { - w: &'a mut W, -} -impl<'a> _FLT_DLC_LOW<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 15; - const OFFSET: u8 = 16; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:3 - Upper Limit for Length of Data Bytes Filter"] - #[inline] - pub fn flt_dlc_hi(&self) -> FLT_DLC_HIR { - let bits = { - const MASK: u8 = 15; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - FLT_DLC_HIR { bits } - } - #[doc = "Bits 16:19 - Lower Limit for Length of Data Bytes Filter"] - #[inline] - pub fn flt_dlc_lo(&self) -> FLT_DLC_LOR { - let bits = { - const MASK: u8 = 15; - const OFFSET: u8 = 16; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - FLT_DLC_LOR { bits } - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 8 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bits 0:3 - Upper Limit for Length of Data Bytes Filter"] - #[inline] - pub fn flt_dlc_hi(&mut self) -> _FLT_DLC_HIW { - _FLT_DLC_HIW { w: self } - } - #[doc = "Bits 16:19 - Lower Limit for Length of Data Bytes Filter"] - #[inline] - pub fn flt_dlc_lo(&mut self) -> _FLT_DLC_LOW { - _FLT_DLC_LOW { w: self } - } -} diff --git a/src/can1/flt_id1/mod.rs b/src/can1/flt_id1/mod.rs deleted file mode 100644 index 528a567..0000000 --- a/src/can1/flt_id1/mod.rs +++ /dev/null @@ -1,335 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::FLT_ID1 { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = r" Value of the field"] -pub struct FLT_ID1R { - bits: u32, -} -impl FLT_ID1R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } -} -#[doc = "Possible values of the field `FLT_RTR`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum FLT_RTRR { - #[doc = "Reject remote frame (accept data frame)"] _0, - #[doc = "Accept remote frame"] _1, -} -impl FLT_RTRR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - FLT_RTRR::_0 => false, - FLT_RTRR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> FLT_RTRR { - match value { - false => FLT_RTRR::_0, - true => FLT_RTRR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == FLT_RTRR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == FLT_RTRR::_1 - } -} -#[doc = "Possible values of the field `FLT_IDE`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum FLT_IDER { - #[doc = "Accept standard frame format"] _0, - #[doc = "Accept extended frame format"] _1, -} -impl FLT_IDER { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - FLT_IDER::_0 => false, - FLT_IDER::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> FLT_IDER { - match value { - false => FLT_IDER::_0, - true => FLT_IDER::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == FLT_IDER::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == FLT_IDER::_1 - } -} -#[doc = r" Proxy"] -pub struct _FLT_ID1W<'a> { - w: &'a mut W, -} -impl<'a> _FLT_ID1W<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u32) -> &'a mut W { - const MASK: u32 = 536870911; - const OFFSET: u8 = 0; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `FLT_RTR`"] -pub enum FLT_RTRW { - #[doc = "Reject remote frame (accept data frame)"] _0, - #[doc = "Accept remote frame"] _1, -} -impl FLT_RTRW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - FLT_RTRW::_0 => false, - FLT_RTRW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _FLT_RTRW<'a> { - w: &'a mut W, -} -impl<'a> _FLT_RTRW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: FLT_RTRW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Reject remote frame (accept data frame)"] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(FLT_RTRW::_0) - } - #[doc = "Accept remote frame"] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(FLT_RTRW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 29; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `FLT_IDE`"] -pub enum FLT_IDEW { - #[doc = "Accept standard frame format"] _0, - #[doc = "Accept extended frame format"] _1, -} -impl FLT_IDEW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - FLT_IDEW::_0 => false, - FLT_IDEW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _FLT_IDEW<'a> { - w: &'a mut W, -} -impl<'a> _FLT_IDEW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: FLT_IDEW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Accept standard frame format"] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(FLT_IDEW::_0) - } - #[doc = "Accept extended frame format"] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(FLT_IDEW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 30; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:28 - ID Filter 1 for Pretended Networking filtering"] - #[inline] - pub fn flt_id1(&self) -> FLT_ID1R { - let bits = { - const MASK: u32 = 536870911; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u32 - }; - FLT_ID1R { bits } - } - #[doc = "Bit 29 - Remote Transmission Request Filter"] - #[inline] - pub fn flt_rtr(&self) -> FLT_RTRR { - FLT_RTRR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 29; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 30 - ID Extended Filter"] - #[inline] - pub fn flt_ide(&self) -> FLT_IDER { - FLT_IDER::_from({ - const MASK: bool = true; - const OFFSET: u8 = 30; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 0 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bits 0:28 - ID Filter 1 for Pretended Networking filtering"] - #[inline] - pub fn flt_id1(&mut self) -> _FLT_ID1W { - _FLT_ID1W { w: self } - } - #[doc = "Bit 29 - Remote Transmission Request Filter"] - #[inline] - pub fn flt_rtr(&mut self) -> _FLT_RTRW { - _FLT_RTRW { w: self } - } - #[doc = "Bit 30 - ID Extended Filter"] - #[inline] - pub fn flt_ide(&mut self) -> _FLT_IDEW { - _FLT_IDEW { w: self } - } -} diff --git a/src/can1/flt_id2_idmask/mod.rs b/src/can1/flt_id2_idmask/mod.rs deleted file mode 100644 index 66cd275..0000000 --- a/src/can1/flt_id2_idmask/mod.rs +++ /dev/null @@ -1,335 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::FLT_ID2_IDMASK { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = r" Value of the field"] -pub struct FLT_ID2_IDMASKR { - bits: u32, -} -impl FLT_ID2_IDMASKR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } -} -#[doc = "Possible values of the field `RTR_MSK`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum RTR_MSKR { - #[doc = "The corresponding bit in the filter is \"don't care\""] _0, - #[doc = "The corresponding bit in the filter is checked"] _1, -} -impl RTR_MSKR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - RTR_MSKR::_0 => false, - RTR_MSKR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> RTR_MSKR { - match value { - false => RTR_MSKR::_0, - true => RTR_MSKR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == RTR_MSKR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == RTR_MSKR::_1 - } -} -#[doc = "Possible values of the field `IDE_MSK`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum IDE_MSKR { - #[doc = "The corresponding bit in the filter is \"don't care\""] _0, - #[doc = "The corresponding bit in the filter is checked"] _1, -} -impl IDE_MSKR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - IDE_MSKR::_0 => false, - IDE_MSKR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> IDE_MSKR { - match value { - false => IDE_MSKR::_0, - true => IDE_MSKR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == IDE_MSKR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == IDE_MSKR::_1 - } -} -#[doc = r" Proxy"] -pub struct _FLT_ID2_IDMASKW<'a> { - w: &'a mut W, -} -impl<'a> _FLT_ID2_IDMASKW<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u32) -> &'a mut W { - const MASK: u32 = 536870911; - const OFFSET: u8 = 0; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `RTR_MSK`"] -pub enum RTR_MSKW { - #[doc = "The corresponding bit in the filter is \"don't care\""] _0, - #[doc = "The corresponding bit in the filter is checked"] _1, -} -impl RTR_MSKW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - RTR_MSKW::_0 => false, - RTR_MSKW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _RTR_MSKW<'a> { - w: &'a mut W, -} -impl<'a> _RTR_MSKW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: RTR_MSKW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "The corresponding bit in the filter is \"don't care\""] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(RTR_MSKW::_0) - } - #[doc = "The corresponding bit in the filter is checked"] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(RTR_MSKW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 29; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `IDE_MSK`"] -pub enum IDE_MSKW { - #[doc = "The corresponding bit in the filter is \"don't care\""] _0, - #[doc = "The corresponding bit in the filter is checked"] _1, -} -impl IDE_MSKW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - IDE_MSKW::_0 => false, - IDE_MSKW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _IDE_MSKW<'a> { - w: &'a mut W, -} -impl<'a> _IDE_MSKW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: IDE_MSKW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "The corresponding bit in the filter is \"don't care\""] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(IDE_MSKW::_0) - } - #[doc = "The corresponding bit in the filter is checked"] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(IDE_MSKW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 30; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:28 - ID Filter 2 for Pretended Networking Filtering / ID Mask Bits for Pretended Networking ID Filtering"] - #[inline] - pub fn flt_id2_idmask(&self) -> FLT_ID2_IDMASKR { - let bits = { - const MASK: u32 = 536870911; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u32 - }; - FLT_ID2_IDMASKR { bits } - } - #[doc = "Bit 29 - Remote Transmission Request Mask Bit"] - #[inline] - pub fn rtr_msk(&self) -> RTR_MSKR { - RTR_MSKR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 29; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 30 - ID Extended Mask Bit"] - #[inline] - pub fn ide_msk(&self) -> IDE_MSKR { - IDE_MSKR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 30; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 0 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bits 0:28 - ID Filter 2 for Pretended Networking Filtering / ID Mask Bits for Pretended Networking ID Filtering"] - #[inline] - pub fn flt_id2_idmask(&mut self) -> _FLT_ID2_IDMASKW { - _FLT_ID2_IDMASKW { w: self } - } - #[doc = "Bit 29 - Remote Transmission Request Mask Bit"] - #[inline] - pub fn rtr_msk(&mut self) -> _RTR_MSKW { - _RTR_MSKW { w: self } - } - #[doc = "Bit 30 - ID Extended Mask Bit"] - #[inline] - pub fn ide_msk(&mut self) -> _IDE_MSKW { - _IDE_MSKW { w: self } - } -} diff --git a/src/can1/iflag1/mod.rs b/src/can1/iflag1/mod.rs deleted file mode 100644 index 20a7322..0000000 --- a/src/can1/iflag1/mod.rs +++ /dev/null @@ -1,622 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::IFLAG1 { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = "Possible values of the field `BUF0I`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum BUF0IR { - #[doc = "The corresponding buffer has no occurrence of successfully completed transmission or reception when MCR[RFEN]=0."] - _0, - #[doc = "The corresponding buffer has successfully completed transmission or reception when MCR[RFEN]=0."] - _1, -} -impl BUF0IR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - BUF0IR::_0 => false, - BUF0IR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> BUF0IR { - match value { - false => BUF0IR::_0, - true => BUF0IR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == BUF0IR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == BUF0IR::_1 - } -} -#[doc = r" Value of the field"] -pub struct BUF4TO1IR { - bits: u8, -} -impl BUF4TO1IR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = "Possible values of the field `BUF5I`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum BUF5IR { - #[doc = "No occurrence of MB5 completing transmission/reception when MCR[RFEN]=0, or of frame(s) available in the FIFO, when MCR[RFEN]=1"] - _0, - #[doc = "MB5 completed transmission/reception when MCR[RFEN]=0, or frame(s) available in the Rx FIFO when MCR[RFEN]=1. It generates a DMA request in case of MCR[RFEN] and MCR[DMA] are enabled."] - _1, -} -impl BUF5IR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - BUF5IR::_0 => false, - BUF5IR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> BUF5IR { - match value { - false => BUF5IR::_0, - true => BUF5IR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == BUF5IR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == BUF5IR::_1 - } -} -#[doc = "Possible values of the field `BUF6I`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum BUF6IR { - #[doc = "No occurrence of MB6 completing transmission/reception when MCR[RFEN]=0, or of Rx FIFO almost full when MCR[RFEN]=1"] - _0, - #[doc = "MB6 completed transmission/reception when MCR[RFEN]=0, or Rx FIFO almost full when MCR[RFEN]=1"] - _1, -} -impl BUF6IR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - BUF6IR::_0 => false, - BUF6IR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> BUF6IR { - match value { - false => BUF6IR::_0, - true => BUF6IR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == BUF6IR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == BUF6IR::_1 - } -} -#[doc = "Possible values of the field `BUF7I`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum BUF7IR { - #[doc = "No occurrence of MB7 completing transmission/reception when MCR[RFEN]=0, or of Rx FIFO overflow when MCR[RFEN]=1"] - _0, - #[doc = "MB7 completed transmission/reception when MCR[RFEN]=0, or Rx FIFO overflow when MCR[RFEN]=1"] - _1, -} -impl BUF7IR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - BUF7IR::_0 => false, - BUF7IR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> BUF7IR { - match value { - false => BUF7IR::_0, - true => BUF7IR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == BUF7IR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == BUF7IR::_1 - } -} -#[doc = r" Value of the field"] -pub struct BUF31TO8IR { - bits: u32, -} -impl BUF31TO8IR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } -} -#[doc = "Values that can be written to the field `BUF0I`"] -pub enum BUF0IW { - #[doc = "The corresponding buffer has no occurrence of successfully completed transmission or reception when MCR[RFEN]=0."] - _0, - #[doc = "The corresponding buffer has successfully completed transmission or reception when MCR[RFEN]=0."] - _1, -} -impl BUF0IW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - BUF0IW::_0 => false, - BUF0IW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _BUF0IW<'a> { - w: &'a mut W, -} -impl<'a> _BUF0IW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: BUF0IW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "The corresponding buffer has no occurrence of successfully completed transmission or reception when MCR[RFEN]=0."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(BUF0IW::_0) - } - #[doc = "The corresponding buffer has successfully completed transmission or reception when MCR[RFEN]=0."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(BUF0IW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 0; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = r" Proxy"] -pub struct _BUF4TO1IW<'a> { - w: &'a mut W, -} -impl<'a> _BUF4TO1IW<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 15; - const OFFSET: u8 = 1; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `BUF5I`"] -pub enum BUF5IW { - #[doc = "No occurrence of MB5 completing transmission/reception when MCR[RFEN]=0, or of frame(s) available in the FIFO, when MCR[RFEN]=1"] - _0, - #[doc = "MB5 completed transmission/reception when MCR[RFEN]=0, or frame(s) available in the Rx FIFO when MCR[RFEN]=1. It generates a DMA request in case of MCR[RFEN] and MCR[DMA] are enabled."] - _1, -} -impl BUF5IW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - BUF5IW::_0 => false, - BUF5IW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _BUF5IW<'a> { - w: &'a mut W, -} -impl<'a> _BUF5IW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: BUF5IW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "No occurrence of MB5 completing transmission/reception when MCR[RFEN]=0, or of frame(s) available in the FIFO, when MCR[RFEN]=1"] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(BUF5IW::_0) - } - #[doc = "MB5 completed transmission/reception when MCR[RFEN]=0, or frame(s) available in the Rx FIFO when MCR[RFEN]=1. It generates a DMA request in case of MCR[RFEN] and MCR[DMA] are enabled."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(BUF5IW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 5; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `BUF6I`"] -pub enum BUF6IW { - #[doc = "No occurrence of MB6 completing transmission/reception when MCR[RFEN]=0, or of Rx FIFO almost full when MCR[RFEN]=1"] - _0, - #[doc = "MB6 completed transmission/reception when MCR[RFEN]=0, or Rx FIFO almost full when MCR[RFEN]=1"] - _1, -} -impl BUF6IW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - BUF6IW::_0 => false, - BUF6IW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _BUF6IW<'a> { - w: &'a mut W, -} -impl<'a> _BUF6IW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: BUF6IW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "No occurrence of MB6 completing transmission/reception when MCR[RFEN]=0, or of Rx FIFO almost full when MCR[RFEN]=1"] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(BUF6IW::_0) - } - #[doc = "MB6 completed transmission/reception when MCR[RFEN]=0, or Rx FIFO almost full when MCR[RFEN]=1"] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(BUF6IW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 6; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `BUF7I`"] -pub enum BUF7IW { - #[doc = "No occurrence of MB7 completing transmission/reception when MCR[RFEN]=0, or of Rx FIFO overflow when MCR[RFEN]=1"] - _0, - #[doc = "MB7 completed transmission/reception when MCR[RFEN]=0, or Rx FIFO overflow when MCR[RFEN]=1"] - _1, -} -impl BUF7IW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - BUF7IW::_0 => false, - BUF7IW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _BUF7IW<'a> { - w: &'a mut W, -} -impl<'a> _BUF7IW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: BUF7IW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "No occurrence of MB7 completing transmission/reception when MCR[RFEN]=0, or of Rx FIFO overflow when MCR[RFEN]=1"] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(BUF7IW::_0) - } - #[doc = "MB7 completed transmission/reception when MCR[RFEN]=0, or Rx FIFO overflow when MCR[RFEN]=1"] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(BUF7IW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 7; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = r" Proxy"] -pub struct _BUF31TO8IW<'a> { - w: &'a mut W, -} -impl<'a> _BUF31TO8IW<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u32) -> &'a mut W { - const MASK: u32 = 16777215; - const OFFSET: u8 = 8; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bit 0 - Buffer MB0 Interrupt Or Clear FIFO bit"] - #[inline] - pub fn buf0i(&self) -> BUF0IR { - BUF0IR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bits 1:4 - Buffer MB i Interrupt Or \"reserved\""] - #[inline] - pub fn buf4to1i(&self) -> BUF4TO1IR { - let bits = { - const MASK: u8 = 15; - const OFFSET: u8 = 1; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - BUF4TO1IR { bits } - } - #[doc = "Bit 5 - Buffer MB5 Interrupt Or \"Frames available in Rx FIFO\""] - #[inline] - pub fn buf5i(&self) -> BUF5IR { - BUF5IR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 5; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 6 - Buffer MB6 Interrupt Or \"Rx FIFO Warning\""] - #[inline] - pub fn buf6i(&self) -> BUF6IR { - BUF6IR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 6; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 7 - Buffer MB7 Interrupt Or \"Rx FIFO Overflow\""] - #[inline] - pub fn buf7i(&self) -> BUF7IR { - BUF7IR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 7; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bits 8:31 - Buffer MBi Interrupt"] - #[inline] - pub fn buf31to8i(&self) -> BUF31TO8IR { - let bits = { - const MASK: u32 = 16777215; - const OFFSET: u8 = 8; - ((self.bits >> OFFSET) & MASK as u32) as u32 - }; - BUF31TO8IR { bits } - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 0 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bit 0 - Buffer MB0 Interrupt Or Clear FIFO bit"] - #[inline] - pub fn buf0i(&mut self) -> _BUF0IW { - _BUF0IW { w: self } - } - #[doc = "Bits 1:4 - Buffer MB i Interrupt Or \"reserved\""] - #[inline] - pub fn buf4to1i(&mut self) -> _BUF4TO1IW { - _BUF4TO1IW { w: self } - } - #[doc = "Bit 5 - Buffer MB5 Interrupt Or \"Frames available in Rx FIFO\""] - #[inline] - pub fn buf5i(&mut self) -> _BUF5IW { - _BUF5IW { w: self } - } - #[doc = "Bit 6 - Buffer MB6 Interrupt Or \"Rx FIFO Warning\""] - #[inline] - pub fn buf6i(&mut self) -> _BUF6IW { - _BUF6IW { w: self } - } - #[doc = "Bit 7 - Buffer MB7 Interrupt Or \"Rx FIFO Overflow\""] - #[inline] - pub fn buf7i(&mut self) -> _BUF7IW { - _BUF7IW { w: self } - } - #[doc = "Bits 8:31 - Buffer MBi Interrupt"] - #[inline] - pub fn buf31to8i(&mut self) -> _BUF31TO8IW { - _BUF31TO8IW { w: self } - } -} diff --git a/src/can1/imask1/mod.rs b/src/can1/imask1/mod.rs deleted file mode 100644 index 1f67ed9..0000000 --- a/src/can1/imask1/mod.rs +++ /dev/null @@ -1,105 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::IMASK1 { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = r" Value of the field"] -pub struct BUF31TO0MR { - bits: u32, -} -impl BUF31TO0MR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } -} -#[doc = r" Proxy"] -pub struct _BUF31TO0MW<'a> { - w: &'a mut W, -} -impl<'a> _BUF31TO0MW<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u32) -> &'a mut W { - const MASK: u32 = 4294967295; - const OFFSET: u8 = 0; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:31 - Buffer MB i Mask"] - #[inline] - pub fn buf31to0m(&self) -> BUF31TO0MR { - let bits = { - const MASK: u32 = 4294967295; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u32 - }; - BUF31TO0MR { bits } - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 0 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bits 0:31 - Buffer MB i Mask"] - #[inline] - pub fn buf31to0m(&mut self) -> _BUF31TO0MW { - _BUF31TO0MW { w: self } - } -} diff --git a/src/can1/mcr/mod.rs b/src/can1/mcr/mod.rs deleted file mode 100644 index 3c5653b..0000000 --- a/src/can1/mcr/mod.rs +++ /dev/null @@ -1,1956 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::MCR { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = r" Value of the field"] -pub struct MAXMBR { - bits: u8, -} -impl MAXMBR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = "Possible values of the field `IDAM`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum IDAMR { - #[doc = "Format A: One full ID (standard and extended) per ID Filter Table element."] _00, - #[doc = "Format B: Two full standard IDs or two partial 14-bit (standard and extended) IDs per ID Filter Table element."] - _01, - #[doc = "Format C: Four partial 8-bit Standard IDs per ID Filter Table element."] _10, - #[doc = "Format D: All frames rejected."] _11, -} -impl IDAMR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - match *self { - IDAMR::_00 => 0, - IDAMR::_01 => 1, - IDAMR::_10 => 2, - IDAMR::_11 => 3, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: u8) -> IDAMR { - match value { - 0 => IDAMR::_00, - 1 => IDAMR::_01, - 2 => IDAMR::_10, - 3 => IDAMR::_11, - _ => unreachable!(), - } - } - #[doc = "Checks if the value of the field is `_00`"] - #[inline] - pub fn is_00(&self) -> bool { - *self == IDAMR::_00 - } - #[doc = "Checks if the value of the field is `_01`"] - #[inline] - pub fn is_01(&self) -> bool { - *self == IDAMR::_01 - } - #[doc = "Checks if the value of the field is `_10`"] - #[inline] - pub fn is_10(&self) -> bool { - *self == IDAMR::_10 - } - #[doc = "Checks if the value of the field is `_11`"] - #[inline] - pub fn is_11(&self) -> bool { - *self == IDAMR::_11 - } -} -#[doc = "Possible values of the field `FDEN`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum FDENR { - #[doc = "CAN FD is enabled. FlexCAN is able to receive and transmit messages in both CAN FD and CAN 2.0 formats."] - _1, - #[doc = "CAN FD is disabled. FlexCAN is able to receive and transmit messages in CAN 2.0 format."] - _0, -} -impl FDENR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - FDENR::_1 => true, - FDENR::_0 => false, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> FDENR { - match value { - true => FDENR::_1, - false => FDENR::_0, - } - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == FDENR::_1 - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == FDENR::_0 - } -} -#[doc = "Possible values of the field `AEN`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum AENR { - #[doc = "Abort disabled."] _0, - #[doc = "Abort enabled."] _1, -} -impl AENR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - AENR::_0 => false, - AENR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> AENR { - match value { - false => AENR::_0, - true => AENR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == AENR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == AENR::_1 - } -} -#[doc = "Possible values of the field `LPRIOEN`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum LPRIOENR { - #[doc = "Local Priority disabled."] _0, - #[doc = "Local Priority enabled."] _1, -} -impl LPRIOENR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - LPRIOENR::_0 => false, - LPRIOENR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> LPRIOENR { - match value { - false => LPRIOENR::_0, - true => LPRIOENR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == LPRIOENR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == LPRIOENR::_1 - } -} -#[doc = "Possible values of the field `PNET_EN`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum PNET_ENR { - #[doc = "Pretended Networking mode is disabled."] _0, - #[doc = "Pretended Networking mode is enabled."] _1, -} -impl PNET_ENR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - PNET_ENR::_0 => false, - PNET_ENR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> PNET_ENR { - match value { - false => PNET_ENR::_0, - true => PNET_ENR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == PNET_ENR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == PNET_ENR::_1 - } -} -#[doc = "Possible values of the field `DMA`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum DMAR { - #[doc = "DMA feature for RX FIFO disabled."] _0, - #[doc = "DMA feature for RX FIFO enabled."] _1, -} -impl DMAR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - DMAR::_0 => false, - DMAR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> DMAR { - match value { - false => DMAR::_0, - true => DMAR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == DMAR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == DMAR::_1 - } -} -#[doc = "Possible values of the field `IRMQ`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum IRMQR { - #[doc = "Individual Rx masking and queue feature are disabled. For backward compatibility with legacy applications, the reading of C/S word locks the MB even if it is EMPTY."] - _0, - #[doc = "Individual Rx masking and queue feature are enabled."] _1, -} -impl IRMQR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - IRMQR::_0 => false, - IRMQR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> IRMQR { - match value { - false => IRMQR::_0, - true => IRMQR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == IRMQR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == IRMQR::_1 - } -} -#[doc = "Possible values of the field `SRXDIS`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum SRXDISR { - #[doc = "Self reception enabled."] _0, - #[doc = "Self reception disabled."] _1, -} -impl SRXDISR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - SRXDISR::_0 => false, - SRXDISR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> SRXDISR { - match value { - false => SRXDISR::_0, - true => SRXDISR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == SRXDISR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == SRXDISR::_1 - } -} -#[doc = "Possible values of the field `LPMACK`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum LPMACKR { - #[doc = "FlexCAN is not in a low-power mode."] _0, - #[doc = "FlexCAN is in a low-power mode."] _1, -} -impl LPMACKR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - LPMACKR::_0 => false, - LPMACKR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> LPMACKR { - match value { - false => LPMACKR::_0, - true => LPMACKR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == LPMACKR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == LPMACKR::_1 - } -} -#[doc = "Possible values of the field `WRNEN`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum WRNENR { - #[doc = "TWRNINT and RWRNINT bits are zero, independent of the values in the error counters."] - _0, - #[doc = "TWRNINT and RWRNINT bits are set when the respective error counter transitions from less than 96 to greater than or equal to 96."] - _1, -} -impl WRNENR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - WRNENR::_0 => false, - WRNENR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> WRNENR { - match value { - false => WRNENR::_0, - true => WRNENR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == WRNENR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == WRNENR::_1 - } -} -#[doc = r" Value of the field"] -pub struct SUPVR { - bits: bool, -} -impl SUPVR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - self.bits - } - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } -} -#[doc = "Possible values of the field `FRZACK`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum FRZACKR { - #[doc = "FlexCAN not in Freeze mode, prescaler running."] _0, - #[doc = "FlexCAN in Freeze mode, prescaler stopped."] _1, -} -impl FRZACKR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - FRZACKR::_0 => false, - FRZACKR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> FRZACKR { - match value { - false => FRZACKR::_0, - true => FRZACKR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == FRZACKR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == FRZACKR::_1 - } -} -#[doc = "Possible values of the field `SOFTRST`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum SOFTRSTR { - #[doc = "No reset request."] _0, - #[doc = "Resets the registers affected by soft reset."] _1, -} -impl SOFTRSTR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - SOFTRSTR::_0 => false, - SOFTRSTR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> SOFTRSTR { - match value { - false => SOFTRSTR::_0, - true => SOFTRSTR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == SOFTRSTR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == SOFTRSTR::_1 - } -} -#[doc = "Possible values of the field `NOTRDY`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum NOTRDYR { - #[doc = "FlexCAN module is either in Normal mode, Listen-Only mode or Loop-Back mode."] _0, - #[doc = r" Reserved"] _Reserved(bool), -} -impl NOTRDYR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - NOTRDYR::_0 => false, - NOTRDYR::_Reserved(bits) => bits, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> NOTRDYR { - match value { - false => NOTRDYR::_0, - i => NOTRDYR::_Reserved(i), - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == NOTRDYR::_0 - } -} -#[doc = "Possible values of the field `HALT`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum HALTR { - #[doc = "No Freeze mode request."] _0, - #[doc = "Enters Freeze mode if the FRZ bit is asserted."] _1, -} -impl HALTR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - HALTR::_0 => false, - HALTR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> HALTR { - match value { - false => HALTR::_0, - true => HALTR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == HALTR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == HALTR::_1 - } -} -#[doc = "Possible values of the field `RFEN`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum RFENR { - #[doc = "Rx FIFO not enabled."] _0, - #[doc = "Rx FIFO enabled."] _1, -} -impl RFENR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - RFENR::_0 => false, - RFENR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> RFENR { - match value { - false => RFENR::_0, - true => RFENR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == RFENR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == RFENR::_1 - } -} -#[doc = "Possible values of the field `FRZ`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum FRZR { - #[doc = "Not enabled to enter Freeze mode."] _0, - #[doc = "Enabled to enter Freeze mode."] _1, -} -impl FRZR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - FRZR::_0 => false, - FRZR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> FRZR { - match value { - false => FRZR::_0, - true => FRZR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == FRZR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == FRZR::_1 - } -} -#[doc = "Possible values of the field `MDIS`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum MDISR { - #[doc = "Enable the FlexCAN module."] _0, - #[doc = "Disable the FlexCAN module."] _1, -} -impl MDISR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - MDISR::_0 => false, - MDISR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> MDISR { - match value { - false => MDISR::_0, - true => MDISR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == MDISR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == MDISR::_1 - } -} -#[doc = r" Proxy"] -pub struct _MAXMBW<'a> { - w: &'a mut W, -} -impl<'a> _MAXMBW<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 127; - const OFFSET: u8 = 0; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `IDAM`"] -pub enum IDAMW { - #[doc = "Format A: One full ID (standard and extended) per ID Filter Table element."] _00, - #[doc = "Format B: Two full standard IDs or two partial 14-bit (standard and extended) IDs per ID Filter Table element."] - _01, - #[doc = "Format C: Four partial 8-bit Standard IDs per ID Filter Table element."] _10, - #[doc = "Format D: All frames rejected."] _11, -} -impl IDAMW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> u8 { - match *self { - IDAMW::_00 => 0, - IDAMW::_01 => 1, - IDAMW::_10 => 2, - IDAMW::_11 => 3, - } - } -} -#[doc = r" Proxy"] -pub struct _IDAMW<'a> { - w: &'a mut W, -} -impl<'a> _IDAMW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: IDAMW) -> &'a mut W { - { - self.bits(variant._bits()) - } - } - #[doc = "Format A: One full ID (standard and extended) per ID Filter Table element."] - #[inline] - pub fn _00(self) -> &'a mut W { - self.variant(IDAMW::_00) - } - #[doc = "Format B: Two full standard IDs or two partial 14-bit (standard and extended) IDs per ID Filter Table element."] - #[inline] - pub fn _01(self) -> &'a mut W { - self.variant(IDAMW::_01) - } - #[doc = "Format C: Four partial 8-bit Standard IDs per ID Filter Table element."] - #[inline] - pub fn _10(self) -> &'a mut W { - self.variant(IDAMW::_10) - } - #[doc = "Format D: All frames rejected."] - #[inline] - pub fn _11(self) -> &'a mut W { - self.variant(IDAMW::_11) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 3; - const OFFSET: u8 = 8; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `FDEN`"] -pub enum FDENW { - #[doc = "CAN FD is enabled. FlexCAN is able to receive and transmit messages in both CAN FD and CAN 2.0 formats."] - _1, - #[doc = "CAN FD is disabled. FlexCAN is able to receive and transmit messages in CAN 2.0 format."] - _0, -} -impl FDENW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - FDENW::_1 => true, - FDENW::_0 => false, - } - } -} -#[doc = r" Proxy"] -pub struct _FDENW<'a> { - w: &'a mut W, -} -impl<'a> _FDENW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: FDENW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "CAN FD is enabled. FlexCAN is able to receive and transmit messages in both CAN FD and CAN 2.0 formats."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(FDENW::_1) - } - #[doc = "CAN FD is disabled. FlexCAN is able to receive and transmit messages in CAN 2.0 format."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(FDENW::_0) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 11; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `AEN`"] -pub enum AENW { - #[doc = "Abort disabled."] _0, - #[doc = "Abort enabled."] _1, -} -impl AENW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - AENW::_0 => false, - AENW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _AENW<'a> { - w: &'a mut W, -} -impl<'a> _AENW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: AENW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Abort disabled."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(AENW::_0) - } - #[doc = "Abort enabled."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(AENW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 12; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `LPRIOEN`"] -pub enum LPRIOENW { - #[doc = "Local Priority disabled."] _0, - #[doc = "Local Priority enabled."] _1, -} -impl LPRIOENW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - LPRIOENW::_0 => false, - LPRIOENW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _LPRIOENW<'a> { - w: &'a mut W, -} -impl<'a> _LPRIOENW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: LPRIOENW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Local Priority disabled."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(LPRIOENW::_0) - } - #[doc = "Local Priority enabled."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(LPRIOENW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 13; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `PNET_EN`"] -pub enum PNET_ENW { - #[doc = "Pretended Networking mode is disabled."] _0, - #[doc = "Pretended Networking mode is enabled."] _1, -} -impl PNET_ENW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - PNET_ENW::_0 => false, - PNET_ENW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _PNET_ENW<'a> { - w: &'a mut W, -} -impl<'a> _PNET_ENW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: PNET_ENW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Pretended Networking mode is disabled."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(PNET_ENW::_0) - } - #[doc = "Pretended Networking mode is enabled."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(PNET_ENW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 14; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `DMA`"] -pub enum DMAW { - #[doc = "DMA feature for RX FIFO disabled."] _0, - #[doc = "DMA feature for RX FIFO enabled."] _1, -} -impl DMAW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - DMAW::_0 => false, - DMAW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _DMAW<'a> { - w: &'a mut W, -} -impl<'a> _DMAW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: DMAW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "DMA feature for RX FIFO disabled."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(DMAW::_0) - } - #[doc = "DMA feature for RX FIFO enabled."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(DMAW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 15; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `IRMQ`"] -pub enum IRMQW { - #[doc = "Individual Rx masking and queue feature are disabled. For backward compatibility with legacy applications, the reading of C/S word locks the MB even if it is EMPTY."] - _0, - #[doc = "Individual Rx masking and queue feature are enabled."] _1, -} -impl IRMQW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - IRMQW::_0 => false, - IRMQW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _IRMQW<'a> { - w: &'a mut W, -} -impl<'a> _IRMQW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: IRMQW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Individual Rx masking and queue feature are disabled. For backward compatibility with legacy applications, the reading of C/S word locks the MB even if it is EMPTY."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(IRMQW::_0) - } - #[doc = "Individual Rx masking and queue feature are enabled."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(IRMQW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 16; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `SRXDIS`"] -pub enum SRXDISW { - #[doc = "Self reception enabled."] _0, - #[doc = "Self reception disabled."] _1, -} -impl SRXDISW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - SRXDISW::_0 => false, - SRXDISW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _SRXDISW<'a> { - w: &'a mut W, -} -impl<'a> _SRXDISW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: SRXDISW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Self reception enabled."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(SRXDISW::_0) - } - #[doc = "Self reception disabled."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(SRXDISW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 17; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `WRNEN`"] -pub enum WRNENW { - #[doc = "TWRNINT and RWRNINT bits are zero, independent of the values in the error counters."] - _0, - #[doc = "TWRNINT and RWRNINT bits are set when the respective error counter transitions from less than 96 to greater than or equal to 96."] - _1, -} -impl WRNENW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - WRNENW::_0 => false, - WRNENW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _WRNENW<'a> { - w: &'a mut W, -} -impl<'a> _WRNENW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: WRNENW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "TWRNINT and RWRNINT bits are zero, independent of the values in the error counters."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(WRNENW::_0) - } - #[doc = "TWRNINT and RWRNINT bits are set when the respective error counter transitions from less than 96 to greater than or equal to 96."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(WRNENW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 21; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = r" Proxy"] -pub struct _SUPVW<'a> { - w: &'a mut W, -} -impl<'a> _SUPVW<'a> { - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 23; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `SOFTRST`"] -pub enum SOFTRSTW { - #[doc = "No reset request."] _0, - #[doc = "Resets the registers affected by soft reset."] _1, -} -impl SOFTRSTW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - SOFTRSTW::_0 => false, - SOFTRSTW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _SOFTRSTW<'a> { - w: &'a mut W, -} -impl<'a> _SOFTRSTW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: SOFTRSTW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "No reset request."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(SOFTRSTW::_0) - } - #[doc = "Resets the registers affected by soft reset."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(SOFTRSTW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 25; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `HALT`"] -pub enum HALTW { - #[doc = "No Freeze mode request."] _0, - #[doc = "Enters Freeze mode if the FRZ bit is asserted."] _1, -} -impl HALTW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - HALTW::_0 => false, - HALTW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _HALTW<'a> { - w: &'a mut W, -} -impl<'a> _HALTW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: HALTW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "No Freeze mode request."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(HALTW::_0) - } - #[doc = "Enters Freeze mode if the FRZ bit is asserted."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(HALTW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 28; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `RFEN`"] -pub enum RFENW { - #[doc = "Rx FIFO not enabled."] _0, - #[doc = "Rx FIFO enabled."] _1, -} -impl RFENW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - RFENW::_0 => false, - RFENW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _RFENW<'a> { - w: &'a mut W, -} -impl<'a> _RFENW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: RFENW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Rx FIFO not enabled."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(RFENW::_0) - } - #[doc = "Rx FIFO enabled."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(RFENW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 29; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `FRZ`"] -pub enum FRZW { - #[doc = "Not enabled to enter Freeze mode."] _0, - #[doc = "Enabled to enter Freeze mode."] _1, -} -impl FRZW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - FRZW::_0 => false, - FRZW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _FRZW<'a> { - w: &'a mut W, -} -impl<'a> _FRZW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: FRZW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Not enabled to enter Freeze mode."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(FRZW::_0) - } - #[doc = "Enabled to enter Freeze mode."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(FRZW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 30; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `MDIS`"] -pub enum MDISW { - #[doc = "Enable the FlexCAN module."] _0, - #[doc = "Disable the FlexCAN module."] _1, -} -impl MDISW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - MDISW::_0 => false, - MDISW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _MDISW<'a> { - w: &'a mut W, -} -impl<'a> _MDISW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: MDISW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Enable the FlexCAN module."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(MDISW::_0) - } - #[doc = "Disable the FlexCAN module."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(MDISW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 31; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:6 - Number Of The Last Message Buffer"] - #[inline] - pub fn maxmb(&self) -> MAXMBR { - let bits = { - const MASK: u8 = 127; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - MAXMBR { bits } - } - #[doc = "Bits 8:9 - ID Acceptance Mode"] - #[inline] - pub fn idam(&self) -> IDAMR { - IDAMR::_from({ - const MASK: u8 = 3; - const OFFSET: u8 = 8; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }) - } - #[doc = "Bit 11 - CAN FD operation enable"] - #[inline] - pub fn fden(&self) -> FDENR { - FDENR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 11; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 12 - Abort Enable"] - #[inline] - pub fn aen(&self) -> AENR { - AENR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 12; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 13 - Local Priority Enable"] - #[inline] - pub fn lprioen(&self) -> LPRIOENR { - LPRIOENR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 13; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 14 - Pretended Networking Enable"] - #[inline] - pub fn pnet_en(&self) -> PNET_ENR { - PNET_ENR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 14; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 15 - DMA Enable"] - #[inline] - pub fn dma(&self) -> DMAR { - DMAR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 15; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 16 - Individual Rx Masking And Queue Enable"] - #[inline] - pub fn irmq(&self) -> IRMQR { - IRMQR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 16; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 17 - Self Reception Disable"] - #[inline] - pub fn srxdis(&self) -> SRXDISR { - SRXDISR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 17; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 20 - Low-Power Mode Acknowledge"] - #[inline] - pub fn lpmack(&self) -> LPMACKR { - LPMACKR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 20; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 21 - Warning Interrupt Enable"] - #[inline] - pub fn wrnen(&self) -> WRNENR { - WRNENR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 21; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 23 - Supervisor Mode"] - #[inline] - pub fn supv(&self) -> SUPVR { - let bits = { - const MASK: bool = true; - const OFFSET: u8 = 23; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }; - SUPVR { bits } - } - #[doc = "Bit 24 - Freeze Mode Acknowledge"] - #[inline] - pub fn frzack(&self) -> FRZACKR { - FRZACKR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 24; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 25 - Soft Reset"] - #[inline] - pub fn softrst(&self) -> SOFTRSTR { - SOFTRSTR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 25; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 27 - FlexCAN Not Ready"] - #[inline] - pub fn notrdy(&self) -> NOTRDYR { - NOTRDYR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 27; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 28 - Halt FlexCAN"] - #[inline] - pub fn halt(&self) -> HALTR { - HALTR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 28; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 29 - Rx FIFO Enable"] - #[inline] - pub fn rfen(&self) -> RFENR { - RFENR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 29; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 30 - Freeze Enable"] - #[inline] - pub fn frz(&self) -> FRZR { - FRZR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 30; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 31 - Module Disable"] - #[inline] - pub fn mdis(&self) -> MDISR { - MDISR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 31; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 3633315855 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bits 0:6 - Number Of The Last Message Buffer"] - #[inline] - pub fn maxmb(&mut self) -> _MAXMBW { - _MAXMBW { w: self } - } - #[doc = "Bits 8:9 - ID Acceptance Mode"] - #[inline] - pub fn idam(&mut self) -> _IDAMW { - _IDAMW { w: self } - } - #[doc = "Bit 11 - CAN FD operation enable"] - #[inline] - pub fn fden(&mut self) -> _FDENW { - _FDENW { w: self } - } - #[doc = "Bit 12 - Abort Enable"] - #[inline] - pub fn aen(&mut self) -> _AENW { - _AENW { w: self } - } - #[doc = "Bit 13 - Local Priority Enable"] - #[inline] - pub fn lprioen(&mut self) -> _LPRIOENW { - _LPRIOENW { w: self } - } - #[doc = "Bit 14 - Pretended Networking Enable"] - #[inline] - pub fn pnet_en(&mut self) -> _PNET_ENW { - _PNET_ENW { w: self } - } - #[doc = "Bit 15 - DMA Enable"] - #[inline] - pub fn dma(&mut self) -> _DMAW { - _DMAW { w: self } - } - #[doc = "Bit 16 - Individual Rx Masking And Queue Enable"] - #[inline] - pub fn irmq(&mut self) -> _IRMQW { - _IRMQW { w: self } - } - #[doc = "Bit 17 - Self Reception Disable"] - #[inline] - pub fn srxdis(&mut self) -> _SRXDISW { - _SRXDISW { w: self } - } - #[doc = "Bit 21 - Warning Interrupt Enable"] - #[inline] - pub fn wrnen(&mut self) -> _WRNENW { - _WRNENW { w: self } - } - #[doc = "Bit 23 - Supervisor Mode"] - #[inline] - pub fn supv(&mut self) -> _SUPVW { - _SUPVW { w: self } - } - #[doc = "Bit 25 - Soft Reset"] - #[inline] - pub fn softrst(&mut self) -> _SOFTRSTW { - _SOFTRSTW { w: self } - } - #[doc = "Bit 28 - Halt FlexCAN"] - #[inline] - pub fn halt(&mut self) -> _HALTW { - _HALTW { w: self } - } - #[doc = "Bit 29 - Rx FIFO Enable"] - #[inline] - pub fn rfen(&mut self) -> _RFENW { - _RFENW { w: self } - } - #[doc = "Bit 30 - Freeze Enable"] - #[inline] - pub fn frz(&mut self) -> _FRZW { - _FRZW { w: self } - } - #[doc = "Bit 31 - Module Disable"] - #[inline] - pub fn mdis(&mut self) -> _MDISW { - _MDISW { w: self } - } -} diff --git a/src/can1/mod.rs b/src/can1/mod.rs deleted file mode 100644 index 054059d..0000000 --- a/src/can1/mod.rs +++ /dev/null @@ -1,451 +0,0 @@ -use vcell::VolatileCell; -#[doc = r" Register block"] -#[repr(C)] -pub struct RegisterBlock { - #[doc = "0x00 - Module Configuration Register"] pub mcr: MCR, - #[doc = "0x04 - Control 1 register"] pub ctrl1: CTRL1, - #[doc = "0x08 - Free Running Timer"] pub timer: TIMER, - _reserved0: [u8; 4usize], - #[doc = "0x10 - Rx Mailboxes Global Mask Register"] pub rxmgmask: RXMGMASK, - #[doc = "0x14 - Rx 14 Mask register"] pub rx14mask: RX14MASK, - #[doc = "0x18 - Rx 15 Mask register"] pub rx15mask: RX15MASK, - #[doc = "0x1c - Error Counter"] pub ecr: ECR, - #[doc = "0x20 - Error and Status 1 register"] pub esr1: ESR1, - _reserved1: [u8; 4usize], - #[doc = "0x28 - Interrupt Masks 1 register"] pub imask1: IMASK1, - _reserved2: [u8; 4usize], - #[doc = "0x30 - Interrupt Flags 1 register"] pub iflag1: IFLAG1, - #[doc = "0x34 - Control 2 register"] pub ctrl2: CTRL2, - #[doc = "0x38 - Error and Status 2 register"] pub esr2: ESR2, - _reserved3: [u8; 8usize], - #[doc = "0x44 - CRC Register"] pub crcr: CRCR, - #[doc = "0x48 - Rx FIFO Global Mask register"] pub rxfgmask: RXFGMASK, - #[doc = "0x4c - Rx FIFO Information Register"] pub rxfir: RXFIR, - #[doc = "0x50 - CAN Bit Timing Register"] pub cbt: CBT, - _reserved4: [u8; 44usize], - #[doc = "0x80 - Embedded RAM"] pub embedded_ram: [EMBEDDEDRAM; 128], - _reserved5: [u8; 1536usize], - #[doc = "0x880 - Rx Individual Mask Registers"] pub rximr0: RXIMR0, - #[doc = "0x884 - Rx Individual Mask Registers"] pub rximr1: RXIMR1, - #[doc = "0x888 - Rx Individual Mask Registers"] pub rximr2: RXIMR2, - #[doc = "0x88c - Rx Individual Mask Registers"] pub rximr3: RXIMR3, - #[doc = "0x890 - Rx Individual Mask Registers"] pub rximr4: RXIMR4, - #[doc = "0x894 - Rx Individual Mask Registers"] pub rximr5: RXIMR5, - #[doc = "0x898 - Rx Individual Mask Registers"] pub rximr6: RXIMR6, - #[doc = "0x89c - Rx Individual Mask Registers"] pub rximr7: RXIMR7, - #[doc = "0x8a0 - Rx Individual Mask Registers"] pub rximr8: RXIMR8, - #[doc = "0x8a4 - Rx Individual Mask Registers"] pub rximr9: RXIMR9, - #[doc = "0x8a8 - Rx Individual Mask Registers"] pub rximr10: RXIMR10, - #[doc = "0x8ac - Rx Individual Mask Registers"] pub rximr11: RXIMR11, - #[doc = "0x8b0 - Rx Individual Mask Registers"] pub rximr12: RXIMR12, - #[doc = "0x8b4 - Rx Individual Mask Registers"] pub rximr13: RXIMR13, - #[doc = "0x8b8 - Rx Individual Mask Registers"] pub rximr14: RXIMR14, - #[doc = "0x8bc - Rx Individual Mask Registers"] pub rximr15: RXIMR15, - _reserved6: [u8; 576usize], - #[doc = "0xb00 - Pretended Networking Control 1 Register"] pub ctrl1_pn: CTRL1_PN, - #[doc = "0xb04 - Pretended Networking Control 2 Register"] pub ctrl2_pn: CTRL2_PN, - #[doc = "0xb08 - Pretended Networking Wake Up Match Register"] pub wu_mtc: WU_MTC, - #[doc = "0xb0c - Pretended Networking ID Filter 1 Register"] pub flt_id1: FLT_ID1, - #[doc = "0xb10 - Pretended Networking DLC Filter Register"] pub flt_dlc: FLT_DLC, - #[doc = "0xb14 - Pretended Networking Payload Low Filter 1 Register"] pub pl1_lo: PL1_LO, - #[doc = "0xb18 - Pretended Networking Payload High Filter 1 Register"] pub pl1_hi: PL1_HI, - #[doc = "0xb1c - Pretended Networking ID Filter 2 Register / ID Mask Register"] - pub flt_id2_idmask: FLT_ID2_IDMASK, - #[doc = "0xb20 - Pretended Networking Payload Low Filter 2 Register / Payload Low Mask Register"] - pub pl2_plmask_lo: PL2_PLMASK_LO, - #[doc = "0xb24 - Pretended Networking Payload High Filter 2 low order bits / Payload High Mask Register"] - pub pl2_plmask_hi: PL2_PLMASK_HI, - _reserved7: [u8; 24usize], - #[doc = "0xb40 - Wake Up Message Buffer Register for C/S"] pub wmb0_cs: WMB0_CS, - #[doc = "0xb44 - Wake Up Message Buffer Register for ID"] pub wmb0_id: WMB0_ID, - #[doc = "0xb48 - Wake Up Message Buffer Register for Data 0-3"] pub wmb0_d03: WMB0_D03, - #[doc = "0xb4c - Wake Up Message Buffer Register Data 4-7"] pub wmb0_d47: WMB0_D47, - #[doc = "0xb50 - Wake Up Message Buffer Register for C/S"] pub wmb1_cs: WMB1_CS, - #[doc = "0xb54 - Wake Up Message Buffer Register for ID"] pub wmb1_id: WMB1_ID, - #[doc = "0xb58 - Wake Up Message Buffer Register for Data 0-3"] pub wmb1_d03: WMB1_D03, - #[doc = "0xb5c - Wake Up Message Buffer Register Data 4-7"] pub wmb1_d47: WMB1_D47, - #[doc = "0xb60 - Wake Up Message Buffer Register for C/S"] pub wmb2_cs: WMB2_CS, - #[doc = "0xb64 - Wake Up Message Buffer Register for ID"] pub wmb2_id: WMB2_ID, - #[doc = "0xb68 - Wake Up Message Buffer Register for Data 0-3"] pub wmb2_d03: WMB2_D03, - #[doc = "0xb6c - Wake Up Message Buffer Register Data 4-7"] pub wmb2_d47: WMB2_D47, - #[doc = "0xb70 - Wake Up Message Buffer Register for C/S"] pub wmb3_cs: WMB3_CS, - #[doc = "0xb74 - Wake Up Message Buffer Register for ID"] pub wmb3_id: WMB3_ID, - #[doc = "0xb78 - Wake Up Message Buffer Register for Data 0-3"] pub wmb3_d03: WMB3_D03, - #[doc = "0xb7c - Wake Up Message Buffer Register Data 4-7"] pub wmb3_d47: WMB3_D47, - _reserved8: [u8; 128usize], - #[doc = "0xc00 - CAN FD Control Register"] pub fdctrl: FDCTRL, - #[doc = "0xc04 - CAN FD Bit Timing Register"] pub fdcbt: FDCBT, - #[doc = "0xc08 - CAN FD CRC Register"] pub fdcrc: FDCRC, -} -#[doc = "Module Configuration Register"] -pub struct MCR { - register: VolatileCell, -} -#[doc = "Module Configuration Register"] -pub mod mcr; -#[doc = "Control 1 register"] -pub struct CTRL1 { - register: VolatileCell, -} -#[doc = "Control 1 register"] -pub mod ctrl1; -#[doc = "Free Running Timer"] -pub struct TIMER { - register: VolatileCell, -} -#[doc = "Free Running Timer"] -pub mod timer; -#[doc = "Rx Mailboxes Global Mask Register"] -pub struct RXMGMASK { - register: VolatileCell, -} -#[doc = "Rx Mailboxes Global Mask Register"] -pub mod rxmgmask; -#[doc = "Rx 14 Mask register"] -pub struct RX14MASK { - register: VolatileCell, -} -#[doc = "Rx 14 Mask register"] -pub mod rx14mask; -#[doc = "Rx 15 Mask register"] -pub struct RX15MASK { - register: VolatileCell, -} -#[doc = "Rx 15 Mask register"] -pub mod rx15mask; -#[doc = "Error Counter"] -pub struct ECR { - register: VolatileCell, -} -#[doc = "Error Counter"] -pub mod ecr; -#[doc = "Error and Status 1 register"] -pub struct ESR1 { - register: VolatileCell, -} -#[doc = "Error and Status 1 register"] -pub mod esr1; -#[doc = "Interrupt Masks 1 register"] -pub struct IMASK1 { - register: VolatileCell, -} -#[doc = "Interrupt Masks 1 register"] -pub mod imask1; -#[doc = "Interrupt Flags 1 register"] -pub struct IFLAG1 { - register: VolatileCell, -} -#[doc = "Interrupt Flags 1 register"] -pub mod iflag1; -#[doc = "Control 2 register"] -pub struct CTRL2 { - register: VolatileCell, -} -#[doc = "Control 2 register"] -pub mod ctrl2; -#[doc = "Error and Status 2 register"] -pub struct ESR2 { - register: VolatileCell, -} -#[doc = "Error and Status 2 register"] -pub mod esr2; -#[doc = "CRC Register"] -pub struct CRCR { - register: VolatileCell, -} -#[doc = "CRC Register"] -pub mod crcr; -#[doc = "Rx FIFO Global Mask register"] -pub struct RXFGMASK { - register: VolatileCell, -} -#[doc = "Rx FIFO Global Mask register"] -pub mod rxfgmask; -#[doc = "Rx FIFO Information Register"] -pub struct RXFIR { - register: VolatileCell, -} -#[doc = "Rx FIFO Information Register"] -pub mod rxfir; -#[doc = "CAN Bit Timing Register"] -pub struct CBT { - register: VolatileCell, -} -#[doc = "CAN Bit Timing Register"] -pub mod cbt; -#[doc = "Embedded RAM"] -pub struct EMBEDDEDRAM { - register: VolatileCell, -} -#[doc = "Embedded RAM"] -pub mod embedded_ram; -#[doc = "Rx Individual Mask Registers"] -pub struct RXIMR0 { - register: VolatileCell, -} -#[doc = "Rx Individual Mask Registers"] -pub mod rximr0; -#[doc = "Rx Individual Mask Registers"] -pub struct RXIMR1 { - register: VolatileCell, -} -#[doc = "Rx Individual Mask Registers"] -pub mod rximr1; -#[doc = "Rx Individual Mask Registers"] -pub struct RXIMR2 { - register: VolatileCell, -} -#[doc = "Rx Individual Mask Registers"] -pub mod rximr2; -#[doc = "Rx Individual Mask Registers"] -pub struct RXIMR3 { - register: VolatileCell, -} -#[doc = "Rx Individual Mask Registers"] -pub mod rximr3; -#[doc = "Rx Individual Mask Registers"] -pub struct RXIMR4 { - register: VolatileCell, -} -#[doc = "Rx Individual Mask Registers"] -pub mod rximr4; -#[doc = "Rx Individual Mask Registers"] -pub struct RXIMR5 { - register: VolatileCell, -} -#[doc = "Rx Individual Mask Registers"] -pub mod rximr5; -#[doc = "Rx Individual Mask Registers"] -pub struct RXIMR6 { - register: VolatileCell, -} -#[doc = "Rx Individual Mask Registers"] -pub mod rximr6; -#[doc = "Rx Individual Mask Registers"] -pub struct RXIMR7 { - register: VolatileCell, -} -#[doc = "Rx Individual Mask Registers"] -pub mod rximr7; -#[doc = "Rx Individual Mask Registers"] -pub struct RXIMR8 { - register: VolatileCell, -} -#[doc = "Rx Individual Mask Registers"] -pub mod rximr8; -#[doc = "Rx Individual Mask Registers"] -pub struct RXIMR9 { - register: VolatileCell, -} -#[doc = "Rx Individual Mask Registers"] -pub mod rximr9; -#[doc = "Rx Individual Mask Registers"] -pub struct RXIMR10 { - register: VolatileCell, -} -#[doc = "Rx Individual Mask Registers"] -pub mod rximr10; -#[doc = "Rx Individual Mask Registers"] -pub struct RXIMR11 { - register: VolatileCell, -} -#[doc = "Rx Individual Mask Registers"] -pub mod rximr11; -#[doc = "Rx Individual Mask Registers"] -pub struct RXIMR12 { - register: VolatileCell, -} -#[doc = "Rx Individual Mask Registers"] -pub mod rximr12; -#[doc = "Rx Individual Mask Registers"] -pub struct RXIMR13 { - register: VolatileCell, -} -#[doc = "Rx Individual Mask Registers"] -pub mod rximr13; -#[doc = "Rx Individual Mask Registers"] -pub struct RXIMR14 { - register: VolatileCell, -} -#[doc = "Rx Individual Mask Registers"] -pub mod rximr14; -#[doc = "Rx Individual Mask Registers"] -pub struct RXIMR15 { - register: VolatileCell, -} -#[doc = "Rx Individual Mask Registers"] -pub mod rximr15; -#[doc = "Pretended Networking Control 1 Register"] -pub struct CTRL1_PN { - register: VolatileCell, -} -#[doc = "Pretended Networking Control 1 Register"] -pub mod ctrl1_pn; -#[doc = "Pretended Networking Control 2 Register"] -pub struct CTRL2_PN { - register: VolatileCell, -} -#[doc = "Pretended Networking Control 2 Register"] -pub mod ctrl2_pn; -#[doc = "Pretended Networking Wake Up Match Register"] -pub struct WU_MTC { - register: VolatileCell, -} -#[doc = "Pretended Networking Wake Up Match Register"] -pub mod wu_mtc; -#[doc = "Pretended Networking ID Filter 1 Register"] -pub struct FLT_ID1 { - register: VolatileCell, -} -#[doc = "Pretended Networking ID Filter 1 Register"] -pub mod flt_id1; -#[doc = "Pretended Networking DLC Filter Register"] -pub struct FLT_DLC { - register: VolatileCell, -} -#[doc = "Pretended Networking DLC Filter Register"] -pub mod flt_dlc; -#[doc = "Pretended Networking Payload Low Filter 1 Register"] -pub struct PL1_LO { - register: VolatileCell, -} -#[doc = "Pretended Networking Payload Low Filter 1 Register"] -pub mod pl1_lo; -#[doc = "Pretended Networking Payload High Filter 1 Register"] -pub struct PL1_HI { - register: VolatileCell, -} -#[doc = "Pretended Networking Payload High Filter 1 Register"] -pub mod pl1_hi; -#[doc = "Pretended Networking ID Filter 2 Register / ID Mask Register"] -pub struct FLT_ID2_IDMASK { - register: VolatileCell, -} -#[doc = "Pretended Networking ID Filter 2 Register / ID Mask Register"] -pub mod flt_id2_idmask; -#[doc = "Pretended Networking Payload Low Filter 2 Register / Payload Low Mask Register"] -pub struct PL2_PLMASK_LO { - register: VolatileCell, -} -#[doc = "Pretended Networking Payload Low Filter 2 Register / Payload Low Mask Register"] -pub mod pl2_plmask_lo; -#[doc = "Pretended Networking Payload High Filter 2 low order bits / Payload High Mask Register"] -pub struct PL2_PLMASK_HI { - register: VolatileCell, -} -#[doc = "Pretended Networking Payload High Filter 2 low order bits / Payload High Mask Register"] -pub mod pl2_plmask_hi; -#[doc = "Wake Up Message Buffer Register for C/S"] -pub struct WMB0_CS { - register: VolatileCell, -} -#[doc = "Wake Up Message Buffer Register for C/S"] -pub mod wmb0_cs; -#[doc = "Wake Up Message Buffer Register for ID"] -pub struct WMB0_ID { - register: VolatileCell, -} -#[doc = "Wake Up Message Buffer Register for ID"] -pub mod wmb0_id; -#[doc = "Wake Up Message Buffer Register for Data 0-3"] -pub struct WMB0_D03 { - register: VolatileCell, -} -#[doc = "Wake Up Message Buffer Register for Data 0-3"] -pub mod wmb0_d03; -#[doc = "Wake Up Message Buffer Register Data 4-7"] -pub struct WMB0_D47 { - register: VolatileCell, -} -#[doc = "Wake Up Message Buffer Register Data 4-7"] -pub mod wmb0_d47; -#[doc = "Wake Up Message Buffer Register for C/S"] -pub struct WMB1_CS { - register: VolatileCell, -} -#[doc = "Wake Up Message Buffer Register for C/S"] -pub mod wmb1_cs; -#[doc = "Wake Up Message Buffer Register for ID"] -pub struct WMB1_ID { - register: VolatileCell, -} -#[doc = "Wake Up Message Buffer Register for ID"] -pub mod wmb1_id; -#[doc = "Wake Up Message Buffer Register for Data 0-3"] -pub struct WMB1_D03 { - register: VolatileCell, -} -#[doc = "Wake Up Message Buffer Register for Data 0-3"] -pub mod wmb1_d03; -#[doc = "Wake Up Message Buffer Register Data 4-7"] -pub struct WMB1_D47 { - register: VolatileCell, -} -#[doc = "Wake Up Message Buffer Register Data 4-7"] -pub mod wmb1_d47; -#[doc = "Wake Up Message Buffer Register for C/S"] -pub struct WMB2_CS { - register: VolatileCell, -} -#[doc = "Wake Up Message Buffer Register for C/S"] -pub mod wmb2_cs; -#[doc = "Wake Up Message Buffer Register for ID"] -pub struct WMB2_ID { - register: VolatileCell, -} -#[doc = "Wake Up Message Buffer Register for ID"] -pub mod wmb2_id; -#[doc = "Wake Up Message Buffer Register for Data 0-3"] -pub struct WMB2_D03 { - register: VolatileCell, -} -#[doc = "Wake Up Message Buffer Register for Data 0-3"] -pub mod wmb2_d03; -#[doc = "Wake Up Message Buffer Register Data 4-7"] -pub struct WMB2_D47 { - register: VolatileCell, -} -#[doc = "Wake Up Message Buffer Register Data 4-7"] -pub mod wmb2_d47; -#[doc = "Wake Up Message Buffer Register for C/S"] -pub struct WMB3_CS { - register: VolatileCell, -} -#[doc = "Wake Up Message Buffer Register for C/S"] -pub mod wmb3_cs; -#[doc = "Wake Up Message Buffer Register for ID"] -pub struct WMB3_ID { - register: VolatileCell, -} -#[doc = "Wake Up Message Buffer Register for ID"] -pub mod wmb3_id; -#[doc = "Wake Up Message Buffer Register for Data 0-3"] -pub struct WMB3_D03 { - register: VolatileCell, -} -#[doc = "Wake Up Message Buffer Register for Data 0-3"] -pub mod wmb3_d03; -#[doc = "Wake Up Message Buffer Register Data 4-7"] -pub struct WMB3_D47 { - register: VolatileCell, -} -#[doc = "Wake Up Message Buffer Register Data 4-7"] -pub mod wmb3_d47; -#[doc = "CAN FD Control Register"] -pub struct FDCTRL { - register: VolatileCell, -} -#[doc = "CAN FD Control Register"] -pub mod fdctrl; -#[doc = "CAN FD Bit Timing Register"] -pub struct FDCBT { - register: VolatileCell, -} -#[doc = "CAN FD Bit Timing Register"] -pub mod fdcbt; -#[doc = "CAN FD CRC Register"] -pub struct FDCRC { - register: VolatileCell, -} -#[doc = "CAN FD CRC Register"] -pub mod fdcrc; diff --git a/src/can1/pl1_hi/mod.rs b/src/can1/pl1_hi/mod.rs deleted file mode 100644 index ab431b7..0000000 --- a/src/can1/pl1_hi/mod.rs +++ /dev/null @@ -1,228 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::PL1_HI { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_7R { - bits: u8, -} -impl DATA_BYTE_7R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_6R { - bits: u8, -} -impl DATA_BYTE_6R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_5R { - bits: u8, -} -impl DATA_BYTE_5R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_4R { - bits: u8, -} -impl DATA_BYTE_4R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Proxy"] -pub struct _DATA_BYTE_7W<'a> { - w: &'a mut W, -} -impl<'a> _DATA_BYTE_7W<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 255; - const OFFSET: u8 = 0; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = r" Proxy"] -pub struct _DATA_BYTE_6W<'a> { - w: &'a mut W, -} -impl<'a> _DATA_BYTE_6W<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 255; - const OFFSET: u8 = 8; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = r" Proxy"] -pub struct _DATA_BYTE_5W<'a> { - w: &'a mut W, -} -impl<'a> _DATA_BYTE_5W<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 255; - const OFFSET: u8 = 16; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = r" Proxy"] -pub struct _DATA_BYTE_4W<'a> { - w: &'a mut W, -} -impl<'a> _DATA_BYTE_4W<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 255; - const OFFSET: u8 = 24; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:7 - Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 7."] - #[inline] - pub fn data_byte_7(&self) -> DATA_BYTE_7R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_7R { bits } - } - #[doc = "Bits 8:15 - Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 6."] - #[inline] - pub fn data_byte_6(&self) -> DATA_BYTE_6R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 8; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_6R { bits } - } - #[doc = "Bits 16:23 - Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 5."] - #[inline] - pub fn data_byte_5(&self) -> DATA_BYTE_5R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 16; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_5R { bits } - } - #[doc = "Bits 24:31 - Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 4."] - #[inline] - pub fn data_byte_4(&self) -> DATA_BYTE_4R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 24; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_4R { bits } - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 0 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bits 0:7 - Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 7."] - #[inline] - pub fn data_byte_7(&mut self) -> _DATA_BYTE_7W { - _DATA_BYTE_7W { w: self } - } - #[doc = "Bits 8:15 - Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 6."] - #[inline] - pub fn data_byte_6(&mut self) -> _DATA_BYTE_6W { - _DATA_BYTE_6W { w: self } - } - #[doc = "Bits 16:23 - Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 5."] - #[inline] - pub fn data_byte_5(&mut self) -> _DATA_BYTE_5W { - _DATA_BYTE_5W { w: self } - } - #[doc = "Bits 24:31 - Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 4."] - #[inline] - pub fn data_byte_4(&mut self) -> _DATA_BYTE_4W { - _DATA_BYTE_4W { w: self } - } -} diff --git a/src/can1/pl1_lo/mod.rs b/src/can1/pl1_lo/mod.rs deleted file mode 100644 index 6e07f19..0000000 --- a/src/can1/pl1_lo/mod.rs +++ /dev/null @@ -1,228 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::PL1_LO { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_3R { - bits: u8, -} -impl DATA_BYTE_3R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_2R { - bits: u8, -} -impl DATA_BYTE_2R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_1R { - bits: u8, -} -impl DATA_BYTE_1R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_0R { - bits: u8, -} -impl DATA_BYTE_0R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Proxy"] -pub struct _DATA_BYTE_3W<'a> { - w: &'a mut W, -} -impl<'a> _DATA_BYTE_3W<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 255; - const OFFSET: u8 = 0; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = r" Proxy"] -pub struct _DATA_BYTE_2W<'a> { - w: &'a mut W, -} -impl<'a> _DATA_BYTE_2W<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 255; - const OFFSET: u8 = 8; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = r" Proxy"] -pub struct _DATA_BYTE_1W<'a> { - w: &'a mut W, -} -impl<'a> _DATA_BYTE_1W<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 255; - const OFFSET: u8 = 16; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = r" Proxy"] -pub struct _DATA_BYTE_0W<'a> { - w: &'a mut W, -} -impl<'a> _DATA_BYTE_0W<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 255; - const OFFSET: u8 = 24; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:7 - Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 3."] - #[inline] - pub fn data_byte_3(&self) -> DATA_BYTE_3R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_3R { bits } - } - #[doc = "Bits 8:15 - Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 2."] - #[inline] - pub fn data_byte_2(&self) -> DATA_BYTE_2R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 8; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_2R { bits } - } - #[doc = "Bits 16:23 - Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 1."] - #[inline] - pub fn data_byte_1(&self) -> DATA_BYTE_1R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 16; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_1R { bits } - } - #[doc = "Bits 24:31 - Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 0."] - #[inline] - pub fn data_byte_0(&self) -> DATA_BYTE_0R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 24; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_0R { bits } - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 0 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bits 0:7 - Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 3."] - #[inline] - pub fn data_byte_3(&mut self) -> _DATA_BYTE_3W { - _DATA_BYTE_3W { w: self } - } - #[doc = "Bits 8:15 - Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 2."] - #[inline] - pub fn data_byte_2(&mut self) -> _DATA_BYTE_2W { - _DATA_BYTE_2W { w: self } - } - #[doc = "Bits 16:23 - Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 1."] - #[inline] - pub fn data_byte_1(&mut self) -> _DATA_BYTE_1W { - _DATA_BYTE_1W { w: self } - } - #[doc = "Bits 24:31 - Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 0."] - #[inline] - pub fn data_byte_0(&mut self) -> _DATA_BYTE_0W { - _DATA_BYTE_0W { w: self } - } -} diff --git a/src/can1/pl2_plmask_hi/mod.rs b/src/can1/pl2_plmask_hi/mod.rs deleted file mode 100644 index 32cc6bd..0000000 --- a/src/can1/pl2_plmask_hi/mod.rs +++ /dev/null @@ -1,228 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::PL2_PLMASK_HI { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_7R { - bits: u8, -} -impl DATA_BYTE_7R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_6R { - bits: u8, -} -impl DATA_BYTE_6R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_5R { - bits: u8, -} -impl DATA_BYTE_5R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_4R { - bits: u8, -} -impl DATA_BYTE_4R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Proxy"] -pub struct _DATA_BYTE_7W<'a> { - w: &'a mut W, -} -impl<'a> _DATA_BYTE_7W<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 255; - const OFFSET: u8 = 0; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = r" Proxy"] -pub struct _DATA_BYTE_6W<'a> { - w: &'a mut W, -} -impl<'a> _DATA_BYTE_6W<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 255; - const OFFSET: u8 = 8; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = r" Proxy"] -pub struct _DATA_BYTE_5W<'a> { - w: &'a mut W, -} -impl<'a> _DATA_BYTE_5W<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 255; - const OFFSET: u8 = 16; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = r" Proxy"] -pub struct _DATA_BYTE_4W<'a> { - w: &'a mut W, -} -impl<'a> _DATA_BYTE_4W<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 255; - const OFFSET: u8 = 24; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:7 - Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 7."] - #[inline] - pub fn data_byte_7(&self) -> DATA_BYTE_7R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_7R { bits } - } - #[doc = "Bits 8:15 - Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 6."] - #[inline] - pub fn data_byte_6(&self) -> DATA_BYTE_6R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 8; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_6R { bits } - } - #[doc = "Bits 16:23 - Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 5."] - #[inline] - pub fn data_byte_5(&self) -> DATA_BYTE_5R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 16; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_5R { bits } - } - #[doc = "Bits 24:31 - Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 4."] - #[inline] - pub fn data_byte_4(&self) -> DATA_BYTE_4R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 24; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_4R { bits } - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 0 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bits 0:7 - Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 7."] - #[inline] - pub fn data_byte_7(&mut self) -> _DATA_BYTE_7W { - _DATA_BYTE_7W { w: self } - } - #[doc = "Bits 8:15 - Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 6."] - #[inline] - pub fn data_byte_6(&mut self) -> _DATA_BYTE_6W { - _DATA_BYTE_6W { w: self } - } - #[doc = "Bits 16:23 - Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 5."] - #[inline] - pub fn data_byte_5(&mut self) -> _DATA_BYTE_5W { - _DATA_BYTE_5W { w: self } - } - #[doc = "Bits 24:31 - Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 4."] - #[inline] - pub fn data_byte_4(&mut self) -> _DATA_BYTE_4W { - _DATA_BYTE_4W { w: self } - } -} diff --git a/src/can1/pl2_plmask_lo/mod.rs b/src/can1/pl2_plmask_lo/mod.rs deleted file mode 100644 index 358d16f..0000000 --- a/src/can1/pl2_plmask_lo/mod.rs +++ /dev/null @@ -1,228 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::PL2_PLMASK_LO { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_3R { - bits: u8, -} -impl DATA_BYTE_3R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_2R { - bits: u8, -} -impl DATA_BYTE_2R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_1R { - bits: u8, -} -impl DATA_BYTE_1R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_0R { - bits: u8, -} -impl DATA_BYTE_0R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Proxy"] -pub struct _DATA_BYTE_3W<'a> { - w: &'a mut W, -} -impl<'a> _DATA_BYTE_3W<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 255; - const OFFSET: u8 = 0; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = r" Proxy"] -pub struct _DATA_BYTE_2W<'a> { - w: &'a mut W, -} -impl<'a> _DATA_BYTE_2W<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 255; - const OFFSET: u8 = 8; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = r" Proxy"] -pub struct _DATA_BYTE_1W<'a> { - w: &'a mut W, -} -impl<'a> _DATA_BYTE_1W<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 255; - const OFFSET: u8 = 16; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = r" Proxy"] -pub struct _DATA_BYTE_0W<'a> { - w: &'a mut W, -} -impl<'a> _DATA_BYTE_0W<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 255; - const OFFSET: u8 = 24; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:7 - Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 3."] - #[inline] - pub fn data_byte_3(&self) -> DATA_BYTE_3R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_3R { bits } - } - #[doc = "Bits 8:15 - Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 2."] - #[inline] - pub fn data_byte_2(&self) -> DATA_BYTE_2R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 8; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_2R { bits } - } - #[doc = "Bits 16:23 - Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 1."] - #[inline] - pub fn data_byte_1(&self) -> DATA_BYTE_1R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 16; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_1R { bits } - } - #[doc = "Bits 24:31 - Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 0."] - #[inline] - pub fn data_byte_0(&self) -> DATA_BYTE_0R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 24; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_0R { bits } - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 0 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bits 0:7 - Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 3."] - #[inline] - pub fn data_byte_3(&mut self) -> _DATA_BYTE_3W { - _DATA_BYTE_3W { w: self } - } - #[doc = "Bits 8:15 - Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 2."] - #[inline] - pub fn data_byte_2(&mut self) -> _DATA_BYTE_2W { - _DATA_BYTE_2W { w: self } - } - #[doc = "Bits 16:23 - Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 1."] - #[inline] - pub fn data_byte_1(&mut self) -> _DATA_BYTE_1W { - _DATA_BYTE_1W { w: self } - } - #[doc = "Bits 24:31 - Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 0."] - #[inline] - pub fn data_byte_0(&mut self) -> _DATA_BYTE_0W { - _DATA_BYTE_0W { w: self } - } -} diff --git a/src/can1/rx14mask/mod.rs b/src/can1/rx14mask/mod.rs deleted file mode 100644 index 5670ed6..0000000 --- a/src/can1/rx14mask/mod.rs +++ /dev/null @@ -1,105 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::RX14MASK { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = r" Value of the field"] -pub struct RX14MR { - bits: u32, -} -impl RX14MR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } -} -#[doc = r" Proxy"] -pub struct _RX14MW<'a> { - w: &'a mut W, -} -impl<'a> _RX14MW<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u32) -> &'a mut W { - const MASK: u32 = 4294967295; - const OFFSET: u8 = 0; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:31 - Rx Buffer 14 Mask Bits"] - #[inline] - pub fn rx14m(&self) -> RX14MR { - let bits = { - const MASK: u32 = 4294967295; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u32 - }; - RX14MR { bits } - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 0 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bits 0:31 - Rx Buffer 14 Mask Bits"] - #[inline] - pub fn rx14m(&mut self) -> _RX14MW { - _RX14MW { w: self } - } -} diff --git a/src/can1/rx15mask/mod.rs b/src/can1/rx15mask/mod.rs deleted file mode 100644 index e97bce8..0000000 --- a/src/can1/rx15mask/mod.rs +++ /dev/null @@ -1,105 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::RX15MASK { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = r" Value of the field"] -pub struct RX15MR { - bits: u32, -} -impl RX15MR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } -} -#[doc = r" Proxy"] -pub struct _RX15MW<'a> { - w: &'a mut W, -} -impl<'a> _RX15MW<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u32) -> &'a mut W { - const MASK: u32 = 4294967295; - const OFFSET: u8 = 0; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:31 - Rx Buffer 15 Mask Bits"] - #[inline] - pub fn rx15m(&self) -> RX15MR { - let bits = { - const MASK: u32 = 4294967295; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u32 - }; - RX15MR { bits } - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 0 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bits 0:31 - Rx Buffer 15 Mask Bits"] - #[inline] - pub fn rx15m(&mut self) -> _RX15MW { - _RX15MW { w: self } - } -} diff --git a/src/can1/rxfgmask/mod.rs b/src/can1/rxfgmask/mod.rs deleted file mode 100644 index db4555e..0000000 --- a/src/can1/rxfgmask/mod.rs +++ /dev/null @@ -1,105 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::RXFGMASK { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = r" Value of the field"] -pub struct FGMR { - bits: u32, -} -impl FGMR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } -} -#[doc = r" Proxy"] -pub struct _FGMW<'a> { - w: &'a mut W, -} -impl<'a> _FGMW<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u32) -> &'a mut W { - const MASK: u32 = 4294967295; - const OFFSET: u8 = 0; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:31 - Rx FIFO Global Mask Bits"] - #[inline] - pub fn fgm(&self) -> FGMR { - let bits = { - const MASK: u32 = 4294967295; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u32 - }; - FGMR { bits } - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 0 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bits 0:31 - Rx FIFO Global Mask Bits"] - #[inline] - pub fn fgm(&mut self) -> _FGMW { - _FGMW { w: self } - } -} diff --git a/src/can1/rxfir/mod.rs b/src/can1/rxfir/mod.rs deleted file mode 100644 index 2221db3..0000000 --- a/src/can1/rxfir/mod.rs +++ /dev/null @@ -1,41 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -impl super::RXFIR { - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } -} -#[doc = r" Value of the field"] -pub struct IDHITR { - bits: u16, -} -impl IDHITR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u16 { - self.bits - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:8 - Identifier Acceptance Filter Hit Indicator"] - #[inline] - pub fn idhit(&self) -> IDHITR { - let bits = { - const MASK: u16 = 511; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u16 - }; - IDHITR { bits } - } -} diff --git a/src/can1/rximr0/mod.rs b/src/can1/rximr0/mod.rs deleted file mode 100644 index 301c690..0000000 --- a/src/can1/rximr0/mod.rs +++ /dev/null @@ -1,105 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::RXIMR0 { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = r" Value of the field"] -pub struct MIR { - bits: u32, -} -impl MIR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } -} -#[doc = r" Proxy"] -pub struct _MIW<'a> { - w: &'a mut W, -} -impl<'a> _MIW<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u32) -> &'a mut W { - const MASK: u32 = 4294967295; - const OFFSET: u8 = 0; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:31 - Individual Mask Bits"] - #[inline] - pub fn mi(&self) -> MIR { - let bits = { - const MASK: u32 = 4294967295; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u32 - }; - MIR { bits } - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 0 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bits 0:31 - Individual Mask Bits"] - #[inline] - pub fn mi(&mut self) -> _MIW { - _MIW { w: self } - } -} diff --git a/src/can1/rximr1/mod.rs b/src/can1/rximr1/mod.rs deleted file mode 100644 index fb71a89..0000000 --- a/src/can1/rximr1/mod.rs +++ /dev/null @@ -1,105 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::RXIMR1 { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = r" Value of the field"] -pub struct MIR { - bits: u32, -} -impl MIR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } -} -#[doc = r" Proxy"] -pub struct _MIW<'a> { - w: &'a mut W, -} -impl<'a> _MIW<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u32) -> &'a mut W { - const MASK: u32 = 4294967295; - const OFFSET: u8 = 0; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:31 - Individual Mask Bits"] - #[inline] - pub fn mi(&self) -> MIR { - let bits = { - const MASK: u32 = 4294967295; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u32 - }; - MIR { bits } - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 0 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bits 0:31 - Individual Mask Bits"] - #[inline] - pub fn mi(&mut self) -> _MIW { - _MIW { w: self } - } -} diff --git a/src/can1/rximr10/mod.rs b/src/can1/rximr10/mod.rs deleted file mode 100644 index b43cc60..0000000 --- a/src/can1/rximr10/mod.rs +++ /dev/null @@ -1,105 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::RXIMR10 { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = r" Value of the field"] -pub struct MIR { - bits: u32, -} -impl MIR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } -} -#[doc = r" Proxy"] -pub struct _MIW<'a> { - w: &'a mut W, -} -impl<'a> _MIW<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u32) -> &'a mut W { - const MASK: u32 = 4294967295; - const OFFSET: u8 = 0; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:31 - Individual Mask Bits"] - #[inline] - pub fn mi(&self) -> MIR { - let bits = { - const MASK: u32 = 4294967295; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u32 - }; - MIR { bits } - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 0 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bits 0:31 - Individual Mask Bits"] - #[inline] - pub fn mi(&mut self) -> _MIW { - _MIW { w: self } - } -} diff --git a/src/can1/rximr11/mod.rs b/src/can1/rximr11/mod.rs deleted file mode 100644 index 644a727..0000000 --- a/src/can1/rximr11/mod.rs +++ /dev/null @@ -1,105 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::RXIMR11 { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = r" Value of the field"] -pub struct MIR { - bits: u32, -} -impl MIR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } -} -#[doc = r" Proxy"] -pub struct _MIW<'a> { - w: &'a mut W, -} -impl<'a> _MIW<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u32) -> &'a mut W { - const MASK: u32 = 4294967295; - const OFFSET: u8 = 0; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:31 - Individual Mask Bits"] - #[inline] - pub fn mi(&self) -> MIR { - let bits = { - const MASK: u32 = 4294967295; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u32 - }; - MIR { bits } - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 0 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bits 0:31 - Individual Mask Bits"] - #[inline] - pub fn mi(&mut self) -> _MIW { - _MIW { w: self } - } -} diff --git a/src/can1/rximr12/mod.rs b/src/can1/rximr12/mod.rs deleted file mode 100644 index 779cda3..0000000 --- a/src/can1/rximr12/mod.rs +++ /dev/null @@ -1,105 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::RXIMR12 { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = r" Value of the field"] -pub struct MIR { - bits: u32, -} -impl MIR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } -} -#[doc = r" Proxy"] -pub struct _MIW<'a> { - w: &'a mut W, -} -impl<'a> _MIW<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u32) -> &'a mut W { - const MASK: u32 = 4294967295; - const OFFSET: u8 = 0; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:31 - Individual Mask Bits"] - #[inline] - pub fn mi(&self) -> MIR { - let bits = { - const MASK: u32 = 4294967295; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u32 - }; - MIR { bits } - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 0 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bits 0:31 - Individual Mask Bits"] - #[inline] - pub fn mi(&mut self) -> _MIW { - _MIW { w: self } - } -} diff --git a/src/can1/rximr13/mod.rs b/src/can1/rximr13/mod.rs deleted file mode 100644 index b457c29..0000000 --- a/src/can1/rximr13/mod.rs +++ /dev/null @@ -1,105 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::RXIMR13 { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = r" Value of the field"] -pub struct MIR { - bits: u32, -} -impl MIR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } -} -#[doc = r" Proxy"] -pub struct _MIW<'a> { - w: &'a mut W, -} -impl<'a> _MIW<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u32) -> &'a mut W { - const MASK: u32 = 4294967295; - const OFFSET: u8 = 0; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:31 - Individual Mask Bits"] - #[inline] - pub fn mi(&self) -> MIR { - let bits = { - const MASK: u32 = 4294967295; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u32 - }; - MIR { bits } - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 0 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bits 0:31 - Individual Mask Bits"] - #[inline] - pub fn mi(&mut self) -> _MIW { - _MIW { w: self } - } -} diff --git a/src/can1/rximr14/mod.rs b/src/can1/rximr14/mod.rs deleted file mode 100644 index d637965..0000000 --- a/src/can1/rximr14/mod.rs +++ /dev/null @@ -1,105 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::RXIMR14 { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = r" Value of the field"] -pub struct MIR { - bits: u32, -} -impl MIR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } -} -#[doc = r" Proxy"] -pub struct _MIW<'a> { - w: &'a mut W, -} -impl<'a> _MIW<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u32) -> &'a mut W { - const MASK: u32 = 4294967295; - const OFFSET: u8 = 0; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:31 - Individual Mask Bits"] - #[inline] - pub fn mi(&self) -> MIR { - let bits = { - const MASK: u32 = 4294967295; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u32 - }; - MIR { bits } - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 0 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bits 0:31 - Individual Mask Bits"] - #[inline] - pub fn mi(&mut self) -> _MIW { - _MIW { w: self } - } -} diff --git a/src/can1/rximr15/mod.rs b/src/can1/rximr15/mod.rs deleted file mode 100644 index 8b60538..0000000 --- a/src/can1/rximr15/mod.rs +++ /dev/null @@ -1,105 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::RXIMR15 { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = r" Value of the field"] -pub struct MIR { - bits: u32, -} -impl MIR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } -} -#[doc = r" Proxy"] -pub struct _MIW<'a> { - w: &'a mut W, -} -impl<'a> _MIW<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u32) -> &'a mut W { - const MASK: u32 = 4294967295; - const OFFSET: u8 = 0; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:31 - Individual Mask Bits"] - #[inline] - pub fn mi(&self) -> MIR { - let bits = { - const MASK: u32 = 4294967295; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u32 - }; - MIR { bits } - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 0 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bits 0:31 - Individual Mask Bits"] - #[inline] - pub fn mi(&mut self) -> _MIW { - _MIW { w: self } - } -} diff --git a/src/can1/rximr2/mod.rs b/src/can1/rximr2/mod.rs deleted file mode 100644 index b79c370..0000000 --- a/src/can1/rximr2/mod.rs +++ /dev/null @@ -1,105 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::RXIMR2 { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = r" Value of the field"] -pub struct MIR { - bits: u32, -} -impl MIR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } -} -#[doc = r" Proxy"] -pub struct _MIW<'a> { - w: &'a mut W, -} -impl<'a> _MIW<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u32) -> &'a mut W { - const MASK: u32 = 4294967295; - const OFFSET: u8 = 0; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:31 - Individual Mask Bits"] - #[inline] - pub fn mi(&self) -> MIR { - let bits = { - const MASK: u32 = 4294967295; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u32 - }; - MIR { bits } - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 0 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bits 0:31 - Individual Mask Bits"] - #[inline] - pub fn mi(&mut self) -> _MIW { - _MIW { w: self } - } -} diff --git a/src/can1/rximr3/mod.rs b/src/can1/rximr3/mod.rs deleted file mode 100644 index dc21ee1..0000000 --- a/src/can1/rximr3/mod.rs +++ /dev/null @@ -1,105 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::RXIMR3 { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = r" Value of the field"] -pub struct MIR { - bits: u32, -} -impl MIR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } -} -#[doc = r" Proxy"] -pub struct _MIW<'a> { - w: &'a mut W, -} -impl<'a> _MIW<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u32) -> &'a mut W { - const MASK: u32 = 4294967295; - const OFFSET: u8 = 0; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:31 - Individual Mask Bits"] - #[inline] - pub fn mi(&self) -> MIR { - let bits = { - const MASK: u32 = 4294967295; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u32 - }; - MIR { bits } - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 0 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bits 0:31 - Individual Mask Bits"] - #[inline] - pub fn mi(&mut self) -> _MIW { - _MIW { w: self } - } -} diff --git a/src/can1/rximr4/mod.rs b/src/can1/rximr4/mod.rs deleted file mode 100644 index 2a5d5a7..0000000 --- a/src/can1/rximr4/mod.rs +++ /dev/null @@ -1,105 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::RXIMR4 { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = r" Value of the field"] -pub struct MIR { - bits: u32, -} -impl MIR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } -} -#[doc = r" Proxy"] -pub struct _MIW<'a> { - w: &'a mut W, -} -impl<'a> _MIW<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u32) -> &'a mut W { - const MASK: u32 = 4294967295; - const OFFSET: u8 = 0; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:31 - Individual Mask Bits"] - #[inline] - pub fn mi(&self) -> MIR { - let bits = { - const MASK: u32 = 4294967295; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u32 - }; - MIR { bits } - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 0 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bits 0:31 - Individual Mask Bits"] - #[inline] - pub fn mi(&mut self) -> _MIW { - _MIW { w: self } - } -} diff --git a/src/can1/rximr5/mod.rs b/src/can1/rximr5/mod.rs deleted file mode 100644 index 7500c7a..0000000 --- a/src/can1/rximr5/mod.rs +++ /dev/null @@ -1,105 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::RXIMR5 { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = r" Value of the field"] -pub struct MIR { - bits: u32, -} -impl MIR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } -} -#[doc = r" Proxy"] -pub struct _MIW<'a> { - w: &'a mut W, -} -impl<'a> _MIW<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u32) -> &'a mut W { - const MASK: u32 = 4294967295; - const OFFSET: u8 = 0; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:31 - Individual Mask Bits"] - #[inline] - pub fn mi(&self) -> MIR { - let bits = { - const MASK: u32 = 4294967295; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u32 - }; - MIR { bits } - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 0 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bits 0:31 - Individual Mask Bits"] - #[inline] - pub fn mi(&mut self) -> _MIW { - _MIW { w: self } - } -} diff --git a/src/can1/rximr6/mod.rs b/src/can1/rximr6/mod.rs deleted file mode 100644 index c7582e2..0000000 --- a/src/can1/rximr6/mod.rs +++ /dev/null @@ -1,105 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::RXIMR6 { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = r" Value of the field"] -pub struct MIR { - bits: u32, -} -impl MIR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } -} -#[doc = r" Proxy"] -pub struct _MIW<'a> { - w: &'a mut W, -} -impl<'a> _MIW<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u32) -> &'a mut W { - const MASK: u32 = 4294967295; - const OFFSET: u8 = 0; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:31 - Individual Mask Bits"] - #[inline] - pub fn mi(&self) -> MIR { - let bits = { - const MASK: u32 = 4294967295; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u32 - }; - MIR { bits } - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 0 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bits 0:31 - Individual Mask Bits"] - #[inline] - pub fn mi(&mut self) -> _MIW { - _MIW { w: self } - } -} diff --git a/src/can1/rximr7/mod.rs b/src/can1/rximr7/mod.rs deleted file mode 100644 index a5de575..0000000 --- a/src/can1/rximr7/mod.rs +++ /dev/null @@ -1,105 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::RXIMR7 { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = r" Value of the field"] -pub struct MIR { - bits: u32, -} -impl MIR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } -} -#[doc = r" Proxy"] -pub struct _MIW<'a> { - w: &'a mut W, -} -impl<'a> _MIW<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u32) -> &'a mut W { - const MASK: u32 = 4294967295; - const OFFSET: u8 = 0; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:31 - Individual Mask Bits"] - #[inline] - pub fn mi(&self) -> MIR { - let bits = { - const MASK: u32 = 4294967295; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u32 - }; - MIR { bits } - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 0 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bits 0:31 - Individual Mask Bits"] - #[inline] - pub fn mi(&mut self) -> _MIW { - _MIW { w: self } - } -} diff --git a/src/can1/rximr8/mod.rs b/src/can1/rximr8/mod.rs deleted file mode 100644 index 626ec56..0000000 --- a/src/can1/rximr8/mod.rs +++ /dev/null @@ -1,105 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::RXIMR8 { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = r" Value of the field"] -pub struct MIR { - bits: u32, -} -impl MIR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } -} -#[doc = r" Proxy"] -pub struct _MIW<'a> { - w: &'a mut W, -} -impl<'a> _MIW<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u32) -> &'a mut W { - const MASK: u32 = 4294967295; - const OFFSET: u8 = 0; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:31 - Individual Mask Bits"] - #[inline] - pub fn mi(&self) -> MIR { - let bits = { - const MASK: u32 = 4294967295; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u32 - }; - MIR { bits } - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 0 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bits 0:31 - Individual Mask Bits"] - #[inline] - pub fn mi(&mut self) -> _MIW { - _MIW { w: self } - } -} diff --git a/src/can1/rximr9/mod.rs b/src/can1/rximr9/mod.rs deleted file mode 100644 index 4acd2f7..0000000 --- a/src/can1/rximr9/mod.rs +++ /dev/null @@ -1,105 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::RXIMR9 { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = r" Value of the field"] -pub struct MIR { - bits: u32, -} -impl MIR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } -} -#[doc = r" Proxy"] -pub struct _MIW<'a> { - w: &'a mut W, -} -impl<'a> _MIW<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u32) -> &'a mut W { - const MASK: u32 = 4294967295; - const OFFSET: u8 = 0; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:31 - Individual Mask Bits"] - #[inline] - pub fn mi(&self) -> MIR { - let bits = { - const MASK: u32 = 4294967295; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u32 - }; - MIR { bits } - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 0 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bits 0:31 - Individual Mask Bits"] - #[inline] - pub fn mi(&mut self) -> _MIW { - _MIW { w: self } - } -} diff --git a/src/can1/rxmgmask/mod.rs b/src/can1/rxmgmask/mod.rs deleted file mode 100644 index dc87f29..0000000 --- a/src/can1/rxmgmask/mod.rs +++ /dev/null @@ -1,105 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::RXMGMASK { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = r" Value of the field"] -pub struct MGR { - bits: u32, -} -impl MGR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } -} -#[doc = r" Proxy"] -pub struct _MGW<'a> { - w: &'a mut W, -} -impl<'a> _MGW<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u32) -> &'a mut W { - const MASK: u32 = 4294967295; - const OFFSET: u8 = 0; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:31 - Rx Mailboxes Global Mask Bits"] - #[inline] - pub fn mg(&self) -> MGR { - let bits = { - const MASK: u32 = 4294967295; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u32 - }; - MGR { bits } - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 0 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bits 0:31 - Rx Mailboxes Global Mask Bits"] - #[inline] - pub fn mg(&mut self) -> _MGW { - _MGW { w: self } - } -} diff --git a/src/can1/timer/mod.rs b/src/can1/timer/mod.rs deleted file mode 100644 index 7a46bca..0000000 --- a/src/can1/timer/mod.rs +++ /dev/null @@ -1,105 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::TIMER { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = r" Value of the field"] -pub struct TIMERR { - bits: u16, -} -impl TIMERR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u16 { - self.bits - } -} -#[doc = r" Proxy"] -pub struct _TIMERW<'a> { - w: &'a mut W, -} -impl<'a> _TIMERW<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u16) -> &'a mut W { - const MASK: u16 = 65535; - const OFFSET: u8 = 0; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:15 - Timer Value"] - #[inline] - pub fn timer(&self) -> TIMERR { - let bits = { - const MASK: u16 = 65535; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u16 - }; - TIMERR { bits } - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 0 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bits 0:15 - Timer Value"] - #[inline] - pub fn timer(&mut self) -> _TIMERW { - _TIMERW { w: self } - } -} diff --git a/src/can1/wmb0_cs/mod.rs b/src/can1/wmb0_cs/mod.rs deleted file mode 100644 index fa731f4..0000000 --- a/src/can1/wmb0_cs/mod.rs +++ /dev/null @@ -1,180 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -impl super::WMB0_CS { - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } -} -#[doc = r" Value of the field"] -pub struct DLCR { - bits: u8, -} -impl DLCR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = "Possible values of the field `RTR`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum RTRR { - #[doc = "Frame is data one (not remote)"] _0, - #[doc = "Frame is a remote one"] _1, -} -impl RTRR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - RTRR::_0 => false, - RTRR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> RTRR { - match value { - false => RTRR::_0, - true => RTRR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == RTRR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == RTRR::_1 - } -} -#[doc = "Possible values of the field `IDE`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum IDER { - #[doc = "Frame format is standard"] _0, - #[doc = "Frame format is extended"] _1, -} -impl IDER { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - IDER::_0 => false, - IDER::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> IDER { - match value { - false => IDER::_0, - true => IDER::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == IDER::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == IDER::_1 - } -} -#[doc = r" Value of the field"] -pub struct SRRR { - bits: bool, -} -impl SRRR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - self.bits - } - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 16:19 - Length of Data in Bytes"] - #[inline] - pub fn dlc(&self) -> DLCR { - let bits = { - const MASK: u8 = 15; - const OFFSET: u8 = 16; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DLCR { bits } - } - #[doc = "Bit 20 - Remote Transmission Request Bit"] - #[inline] - pub fn rtr(&self) -> RTRR { - RTRR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 20; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 21 - ID Extended Bit"] - #[inline] - pub fn ide(&self) -> IDER { - IDER::_from({ - const MASK: bool = true; - const OFFSET: u8 = 21; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 22 - Substitute Remote Request"] - #[inline] - pub fn srr(&self) -> SRRR { - let bits = { - const MASK: bool = true; - const OFFSET: u8 = 22; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }; - SRRR { bits } - } -} diff --git a/src/can1/wmb0_d03/mod.rs b/src/can1/wmb0_d03/mod.rs deleted file mode 100644 index 90e28be..0000000 --- a/src/can1/wmb0_d03/mod.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -impl super::WMB0_D03 { - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_3R { - bits: u8, -} -impl DATA_BYTE_3R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_2R { - bits: u8, -} -impl DATA_BYTE_2R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_1R { - bits: u8, -} -impl DATA_BYTE_1R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_0R { - bits: u8, -} -impl DATA_BYTE_0R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:7 - Received payload corresponding to the data byte 3 under Pretended Networking mode"] - #[inline] - pub fn data_byte_3(&self) -> DATA_BYTE_3R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_3R { bits } - } - #[doc = "Bits 8:15 - Received payload corresponding to the data byte 2 under Pretended Networking mode"] - #[inline] - pub fn data_byte_2(&self) -> DATA_BYTE_2R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 8; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_2R { bits } - } - #[doc = "Bits 16:23 - Received payload corresponding to the data byte 1 under Pretended Networking mode"] - #[inline] - pub fn data_byte_1(&self) -> DATA_BYTE_1R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 16; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_1R { bits } - } - #[doc = "Bits 24:31 - Received payload corresponding to the data byte 0 under Pretended Networking mode"] - #[inline] - pub fn data_byte_0(&self) -> DATA_BYTE_0R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 24; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_0R { bits } - } -} diff --git a/src/can1/wmb0_d47/mod.rs b/src/can1/wmb0_d47/mod.rs deleted file mode 100644 index f567362..0000000 --- a/src/can1/wmb0_d47/mod.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -impl super::WMB0_D47 { - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_7R { - bits: u8, -} -impl DATA_BYTE_7R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_6R { - bits: u8, -} -impl DATA_BYTE_6R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_5R { - bits: u8, -} -impl DATA_BYTE_5R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_4R { - bits: u8, -} -impl DATA_BYTE_4R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:7 - Received payload corresponding to the data byte 7 under Pretended Networking mode"] - #[inline] - pub fn data_byte_7(&self) -> DATA_BYTE_7R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_7R { bits } - } - #[doc = "Bits 8:15 - Received payload corresponding to the data byte 6 under Pretended Networking mode"] - #[inline] - pub fn data_byte_6(&self) -> DATA_BYTE_6R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 8; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_6R { bits } - } - #[doc = "Bits 16:23 - Received payload corresponding to the data byte 5 under Pretended Networking mode"] - #[inline] - pub fn data_byte_5(&self) -> DATA_BYTE_5R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 16; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_5R { bits } - } - #[doc = "Bits 24:31 - Received payload corresponding to the data byte 4 under Pretended Networking mode"] - #[inline] - pub fn data_byte_4(&self) -> DATA_BYTE_4R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 24; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_4R { bits } - } -} diff --git a/src/can1/wmb0_id/mod.rs b/src/can1/wmb0_id/mod.rs deleted file mode 100644 index e76a1a5..0000000 --- a/src/can1/wmb0_id/mod.rs +++ /dev/null @@ -1,41 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -impl super::WMB0_ID { - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } -} -#[doc = r" Value of the field"] -pub struct IDR { - bits: u32, -} -impl IDR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:28 - Received ID under Pretended Networking mode"] - #[inline] - pub fn id(&self) -> IDR { - let bits = { - const MASK: u32 = 536870911; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u32 - }; - IDR { bits } - } -} diff --git a/src/can1/wmb1_cs/mod.rs b/src/can1/wmb1_cs/mod.rs deleted file mode 100644 index f54e732..0000000 --- a/src/can1/wmb1_cs/mod.rs +++ /dev/null @@ -1,180 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -impl super::WMB1_CS { - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } -} -#[doc = r" Value of the field"] -pub struct DLCR { - bits: u8, -} -impl DLCR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = "Possible values of the field `RTR`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum RTRR { - #[doc = "Frame is data one (not remote)"] _0, - #[doc = "Frame is a remote one"] _1, -} -impl RTRR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - RTRR::_0 => false, - RTRR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> RTRR { - match value { - false => RTRR::_0, - true => RTRR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == RTRR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == RTRR::_1 - } -} -#[doc = "Possible values of the field `IDE`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum IDER { - #[doc = "Frame format is standard"] _0, - #[doc = "Frame format is extended"] _1, -} -impl IDER { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - IDER::_0 => false, - IDER::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> IDER { - match value { - false => IDER::_0, - true => IDER::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == IDER::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == IDER::_1 - } -} -#[doc = r" Value of the field"] -pub struct SRRR { - bits: bool, -} -impl SRRR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - self.bits - } - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 16:19 - Length of Data in Bytes"] - #[inline] - pub fn dlc(&self) -> DLCR { - let bits = { - const MASK: u8 = 15; - const OFFSET: u8 = 16; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DLCR { bits } - } - #[doc = "Bit 20 - Remote Transmission Request Bit"] - #[inline] - pub fn rtr(&self) -> RTRR { - RTRR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 20; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 21 - ID Extended Bit"] - #[inline] - pub fn ide(&self) -> IDER { - IDER::_from({ - const MASK: bool = true; - const OFFSET: u8 = 21; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 22 - Substitute Remote Request"] - #[inline] - pub fn srr(&self) -> SRRR { - let bits = { - const MASK: bool = true; - const OFFSET: u8 = 22; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }; - SRRR { bits } - } -} diff --git a/src/can1/wmb1_d03/mod.rs b/src/can1/wmb1_d03/mod.rs deleted file mode 100644 index 7eb5aeb..0000000 --- a/src/can1/wmb1_d03/mod.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -impl super::WMB1_D03 { - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_3R { - bits: u8, -} -impl DATA_BYTE_3R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_2R { - bits: u8, -} -impl DATA_BYTE_2R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_1R { - bits: u8, -} -impl DATA_BYTE_1R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_0R { - bits: u8, -} -impl DATA_BYTE_0R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:7 - Received payload corresponding to the data byte 3 under Pretended Networking mode"] - #[inline] - pub fn data_byte_3(&self) -> DATA_BYTE_3R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_3R { bits } - } - #[doc = "Bits 8:15 - Received payload corresponding to the data byte 2 under Pretended Networking mode"] - #[inline] - pub fn data_byte_2(&self) -> DATA_BYTE_2R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 8; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_2R { bits } - } - #[doc = "Bits 16:23 - Received payload corresponding to the data byte 1 under Pretended Networking mode"] - #[inline] - pub fn data_byte_1(&self) -> DATA_BYTE_1R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 16; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_1R { bits } - } - #[doc = "Bits 24:31 - Received payload corresponding to the data byte 0 under Pretended Networking mode"] - #[inline] - pub fn data_byte_0(&self) -> DATA_BYTE_0R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 24; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_0R { bits } - } -} diff --git a/src/can1/wmb1_d47/mod.rs b/src/can1/wmb1_d47/mod.rs deleted file mode 100644 index b4df930..0000000 --- a/src/can1/wmb1_d47/mod.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -impl super::WMB1_D47 { - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_7R { - bits: u8, -} -impl DATA_BYTE_7R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_6R { - bits: u8, -} -impl DATA_BYTE_6R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_5R { - bits: u8, -} -impl DATA_BYTE_5R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_4R { - bits: u8, -} -impl DATA_BYTE_4R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:7 - Received payload corresponding to the data byte 7 under Pretended Networking mode"] - #[inline] - pub fn data_byte_7(&self) -> DATA_BYTE_7R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_7R { bits } - } - #[doc = "Bits 8:15 - Received payload corresponding to the data byte 6 under Pretended Networking mode"] - #[inline] - pub fn data_byte_6(&self) -> DATA_BYTE_6R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 8; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_6R { bits } - } - #[doc = "Bits 16:23 - Received payload corresponding to the data byte 5 under Pretended Networking mode"] - #[inline] - pub fn data_byte_5(&self) -> DATA_BYTE_5R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 16; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_5R { bits } - } - #[doc = "Bits 24:31 - Received payload corresponding to the data byte 4 under Pretended Networking mode"] - #[inline] - pub fn data_byte_4(&self) -> DATA_BYTE_4R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 24; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_4R { bits } - } -} diff --git a/src/can1/wmb1_id/mod.rs b/src/can1/wmb1_id/mod.rs deleted file mode 100644 index 5466ab1..0000000 --- a/src/can1/wmb1_id/mod.rs +++ /dev/null @@ -1,41 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -impl super::WMB1_ID { - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } -} -#[doc = r" Value of the field"] -pub struct IDR { - bits: u32, -} -impl IDR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:28 - Received ID under Pretended Networking mode"] - #[inline] - pub fn id(&self) -> IDR { - let bits = { - const MASK: u32 = 536870911; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u32 - }; - IDR { bits } - } -} diff --git a/src/can1/wmb2_cs/mod.rs b/src/can1/wmb2_cs/mod.rs deleted file mode 100644 index f37b0a2..0000000 --- a/src/can1/wmb2_cs/mod.rs +++ /dev/null @@ -1,180 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -impl super::WMB2_CS { - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } -} -#[doc = r" Value of the field"] -pub struct DLCR { - bits: u8, -} -impl DLCR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = "Possible values of the field `RTR`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum RTRR { - #[doc = "Frame is data one (not remote)"] _0, - #[doc = "Frame is a remote one"] _1, -} -impl RTRR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - RTRR::_0 => false, - RTRR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> RTRR { - match value { - false => RTRR::_0, - true => RTRR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == RTRR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == RTRR::_1 - } -} -#[doc = "Possible values of the field `IDE`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum IDER { - #[doc = "Frame format is standard"] _0, - #[doc = "Frame format is extended"] _1, -} -impl IDER { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - IDER::_0 => false, - IDER::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> IDER { - match value { - false => IDER::_0, - true => IDER::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == IDER::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == IDER::_1 - } -} -#[doc = r" Value of the field"] -pub struct SRRR { - bits: bool, -} -impl SRRR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - self.bits - } - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 16:19 - Length of Data in Bytes"] - #[inline] - pub fn dlc(&self) -> DLCR { - let bits = { - const MASK: u8 = 15; - const OFFSET: u8 = 16; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DLCR { bits } - } - #[doc = "Bit 20 - Remote Transmission Request Bit"] - #[inline] - pub fn rtr(&self) -> RTRR { - RTRR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 20; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 21 - ID Extended Bit"] - #[inline] - pub fn ide(&self) -> IDER { - IDER::_from({ - const MASK: bool = true; - const OFFSET: u8 = 21; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 22 - Substitute Remote Request"] - #[inline] - pub fn srr(&self) -> SRRR { - let bits = { - const MASK: bool = true; - const OFFSET: u8 = 22; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }; - SRRR { bits } - } -} diff --git a/src/can1/wmb2_d03/mod.rs b/src/can1/wmb2_d03/mod.rs deleted file mode 100644 index 15406c4..0000000 --- a/src/can1/wmb2_d03/mod.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -impl super::WMB2_D03 { - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_3R { - bits: u8, -} -impl DATA_BYTE_3R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_2R { - bits: u8, -} -impl DATA_BYTE_2R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_1R { - bits: u8, -} -impl DATA_BYTE_1R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_0R { - bits: u8, -} -impl DATA_BYTE_0R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:7 - Received payload corresponding to the data byte 3 under Pretended Networking mode"] - #[inline] - pub fn data_byte_3(&self) -> DATA_BYTE_3R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_3R { bits } - } - #[doc = "Bits 8:15 - Received payload corresponding to the data byte 2 under Pretended Networking mode"] - #[inline] - pub fn data_byte_2(&self) -> DATA_BYTE_2R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 8; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_2R { bits } - } - #[doc = "Bits 16:23 - Received payload corresponding to the data byte 1 under Pretended Networking mode"] - #[inline] - pub fn data_byte_1(&self) -> DATA_BYTE_1R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 16; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_1R { bits } - } - #[doc = "Bits 24:31 - Received payload corresponding to the data byte 0 under Pretended Networking mode"] - #[inline] - pub fn data_byte_0(&self) -> DATA_BYTE_0R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 24; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_0R { bits } - } -} diff --git a/src/can1/wmb2_d47/mod.rs b/src/can1/wmb2_d47/mod.rs deleted file mode 100644 index 30b3c6b..0000000 --- a/src/can1/wmb2_d47/mod.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -impl super::WMB2_D47 { - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_7R { - bits: u8, -} -impl DATA_BYTE_7R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_6R { - bits: u8, -} -impl DATA_BYTE_6R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_5R { - bits: u8, -} -impl DATA_BYTE_5R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_4R { - bits: u8, -} -impl DATA_BYTE_4R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:7 - Received payload corresponding to the data byte 7 under Pretended Networking mode"] - #[inline] - pub fn data_byte_7(&self) -> DATA_BYTE_7R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_7R { bits } - } - #[doc = "Bits 8:15 - Received payload corresponding to the data byte 6 under Pretended Networking mode"] - #[inline] - pub fn data_byte_6(&self) -> DATA_BYTE_6R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 8; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_6R { bits } - } - #[doc = "Bits 16:23 - Received payload corresponding to the data byte 5 under Pretended Networking mode"] - #[inline] - pub fn data_byte_5(&self) -> DATA_BYTE_5R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 16; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_5R { bits } - } - #[doc = "Bits 24:31 - Received payload corresponding to the data byte 4 under Pretended Networking mode"] - #[inline] - pub fn data_byte_4(&self) -> DATA_BYTE_4R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 24; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_4R { bits } - } -} diff --git a/src/can1/wmb2_id/mod.rs b/src/can1/wmb2_id/mod.rs deleted file mode 100644 index c421aa6..0000000 --- a/src/can1/wmb2_id/mod.rs +++ /dev/null @@ -1,41 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -impl super::WMB2_ID { - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } -} -#[doc = r" Value of the field"] -pub struct IDR { - bits: u32, -} -impl IDR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:28 - Received ID under Pretended Networking mode"] - #[inline] - pub fn id(&self) -> IDR { - let bits = { - const MASK: u32 = 536870911; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u32 - }; - IDR { bits } - } -} diff --git a/src/can1/wmb3_cs/mod.rs b/src/can1/wmb3_cs/mod.rs deleted file mode 100644 index 05b7b1f..0000000 --- a/src/can1/wmb3_cs/mod.rs +++ /dev/null @@ -1,180 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -impl super::WMB3_CS { - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } -} -#[doc = r" Value of the field"] -pub struct DLCR { - bits: u8, -} -impl DLCR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = "Possible values of the field `RTR`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum RTRR { - #[doc = "Frame is data one (not remote)"] _0, - #[doc = "Frame is a remote one"] _1, -} -impl RTRR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - RTRR::_0 => false, - RTRR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> RTRR { - match value { - false => RTRR::_0, - true => RTRR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == RTRR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == RTRR::_1 - } -} -#[doc = "Possible values of the field `IDE`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum IDER { - #[doc = "Frame format is standard"] _0, - #[doc = "Frame format is extended"] _1, -} -impl IDER { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - IDER::_0 => false, - IDER::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> IDER { - match value { - false => IDER::_0, - true => IDER::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == IDER::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == IDER::_1 - } -} -#[doc = r" Value of the field"] -pub struct SRRR { - bits: bool, -} -impl SRRR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - self.bits - } - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 16:19 - Length of Data in Bytes"] - #[inline] - pub fn dlc(&self) -> DLCR { - let bits = { - const MASK: u8 = 15; - const OFFSET: u8 = 16; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DLCR { bits } - } - #[doc = "Bit 20 - Remote Transmission Request Bit"] - #[inline] - pub fn rtr(&self) -> RTRR { - RTRR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 20; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 21 - ID Extended Bit"] - #[inline] - pub fn ide(&self) -> IDER { - IDER::_from({ - const MASK: bool = true; - const OFFSET: u8 = 21; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 22 - Substitute Remote Request"] - #[inline] - pub fn srr(&self) -> SRRR { - let bits = { - const MASK: bool = true; - const OFFSET: u8 = 22; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }; - SRRR { bits } - } -} diff --git a/src/can1/wmb3_d03/mod.rs b/src/can1/wmb3_d03/mod.rs deleted file mode 100644 index 64f4c8f..0000000 --- a/src/can1/wmb3_d03/mod.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -impl super::WMB3_D03 { - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_3R { - bits: u8, -} -impl DATA_BYTE_3R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_2R { - bits: u8, -} -impl DATA_BYTE_2R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_1R { - bits: u8, -} -impl DATA_BYTE_1R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_0R { - bits: u8, -} -impl DATA_BYTE_0R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:7 - Received payload corresponding to the data byte 3 under Pretended Networking mode"] - #[inline] - pub fn data_byte_3(&self) -> DATA_BYTE_3R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_3R { bits } - } - #[doc = "Bits 8:15 - Received payload corresponding to the data byte 2 under Pretended Networking mode"] - #[inline] - pub fn data_byte_2(&self) -> DATA_BYTE_2R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 8; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_2R { bits } - } - #[doc = "Bits 16:23 - Received payload corresponding to the data byte 1 under Pretended Networking mode"] - #[inline] - pub fn data_byte_1(&self) -> DATA_BYTE_1R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 16; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_1R { bits } - } - #[doc = "Bits 24:31 - Received payload corresponding to the data byte 0 under Pretended Networking mode"] - #[inline] - pub fn data_byte_0(&self) -> DATA_BYTE_0R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 24; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_0R { bits } - } -} diff --git a/src/can1/wmb3_d47/mod.rs b/src/can1/wmb3_d47/mod.rs deleted file mode 100644 index a60b2ae..0000000 --- a/src/can1/wmb3_d47/mod.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -impl super::WMB3_D47 { - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_7R { - bits: u8, -} -impl DATA_BYTE_7R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_6R { - bits: u8, -} -impl DATA_BYTE_6R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_5R { - bits: u8, -} -impl DATA_BYTE_5R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_4R { - bits: u8, -} -impl DATA_BYTE_4R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:7 - Received payload corresponding to the data byte 7 under Pretended Networking mode"] - #[inline] - pub fn data_byte_7(&self) -> DATA_BYTE_7R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_7R { bits } - } - #[doc = "Bits 8:15 - Received payload corresponding to the data byte 6 under Pretended Networking mode"] - #[inline] - pub fn data_byte_6(&self) -> DATA_BYTE_6R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 8; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_6R { bits } - } - #[doc = "Bits 16:23 - Received payload corresponding to the data byte 5 under Pretended Networking mode"] - #[inline] - pub fn data_byte_5(&self) -> DATA_BYTE_5R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 16; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_5R { bits } - } - #[doc = "Bits 24:31 - Received payload corresponding to the data byte 4 under Pretended Networking mode"] - #[inline] - pub fn data_byte_4(&self) -> DATA_BYTE_4R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 24; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_4R { bits } - } -} diff --git a/src/can1/wmb3_id/mod.rs b/src/can1/wmb3_id/mod.rs deleted file mode 100644 index 6b7ac79..0000000 --- a/src/can1/wmb3_id/mod.rs +++ /dev/null @@ -1,41 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -impl super::WMB3_ID { - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } -} -#[doc = r" Value of the field"] -pub struct IDR { - bits: u32, -} -impl IDR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:28 - Received ID under Pretended Networking mode"] - #[inline] - pub fn id(&self) -> IDR { - let bits = { - const MASK: u32 = 536870911; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u32 - }; - IDR { bits } - } -} diff --git a/src/can1/wu_mtc/mod.rs b/src/can1/wu_mtc/mod.rs deleted file mode 100644 index 04c03ba..0000000 --- a/src/can1/wu_mtc/mod.rs +++ /dev/null @@ -1,315 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::WU_MTC { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = r" Value of the field"] -pub struct MCOUNTERR { - bits: u8, -} -impl MCOUNTERR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = "Possible values of the field `WUMF`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum WUMFR { - #[doc = "No wake up by match event detected"] _0, - #[doc = "Wake up by match event detected"] _1, -} -impl WUMFR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - WUMFR::_0 => false, - WUMFR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> WUMFR { - match value { - false => WUMFR::_0, - true => WUMFR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == WUMFR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == WUMFR::_1 - } -} -#[doc = "Possible values of the field `WTOF`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum WTOFR { - #[doc = "No wake up by timeout event detected"] _0, - #[doc = "Wake up by timeout event detected"] _1, -} -impl WTOFR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - WTOFR::_0 => false, - WTOFR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> WTOFR { - match value { - false => WTOFR::_0, - true => WTOFR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == WTOFR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == WTOFR::_1 - } -} -#[doc = "Values that can be written to the field `WUMF`"] -pub enum WUMFW { - #[doc = "No wake up by match event detected"] _0, - #[doc = "Wake up by match event detected"] _1, -} -impl WUMFW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - WUMFW::_0 => false, - WUMFW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _WUMFW<'a> { - w: &'a mut W, -} -impl<'a> _WUMFW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: WUMFW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "No wake up by match event detected"] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(WUMFW::_0) - } - #[doc = "Wake up by match event detected"] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(WUMFW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 16; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `WTOF`"] -pub enum WTOFW { - #[doc = "No wake up by timeout event detected"] _0, - #[doc = "Wake up by timeout event detected"] _1, -} -impl WTOFW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - WTOFW::_0 => false, - WTOFW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _WTOFW<'a> { - w: &'a mut W, -} -impl<'a> _WTOFW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: WTOFW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "No wake up by timeout event detected"] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(WTOFW::_0) - } - #[doc = "Wake up by timeout event detected"] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(WTOFW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 17; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 8:15 - Number of Matches while in Pretended Networking"] - #[inline] - pub fn mcounter(&self) -> MCOUNTERR { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 8; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - MCOUNTERR { bits } - } - #[doc = "Bit 16 - Wake Up by Match Flag Bit"] - #[inline] - pub fn wumf(&self) -> WUMFR { - WUMFR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 16; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 17 - Wake Up by Timeout Flag Bit"] - #[inline] - pub fn wtof(&self) -> WTOFR { - WTOFR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 17; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 0 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bit 16 - Wake Up by Match Flag Bit"] - #[inline] - pub fn wumf(&mut self) -> _WUMFW { - _WUMFW { w: self } - } - #[doc = "Bit 17 - Wake Up by Timeout Flag Bit"] - #[inline] - pub fn wtof(&mut self) -> _WTOFW { - _WTOFW { w: self } - } -} diff --git a/src/can2/cbt/mod.rs b/src/can2/cbt/mod.rs deleted file mode 100644 index cb70aeb..0000000 --- a/src/can2/cbt/mod.rs +++ /dev/null @@ -1,384 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::CBT { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = r" Value of the field"] -pub struct EPSEG2R { - bits: u8, -} -impl EPSEG2R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct EPSEG1R { - bits: u8, -} -impl EPSEG1R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct EPROPSEGR { - bits: u8, -} -impl EPROPSEGR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct ERJWR { - bits: u8, -} -impl ERJWR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct EPRESDIVR { - bits: u16, -} -impl EPRESDIVR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u16 { - self.bits - } -} -#[doc = "Possible values of the field `BTF`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum BTFR { - #[doc = "Extended bit time definitions disabled."] _0, - #[doc = "Extended bit time definitions enabled."] _1, -} -impl BTFR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - BTFR::_0 => false, - BTFR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> BTFR { - match value { - false => BTFR::_0, - true => BTFR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == BTFR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == BTFR::_1 - } -} -#[doc = r" Proxy"] -pub struct _EPSEG2W<'a> { - w: &'a mut W, -} -impl<'a> _EPSEG2W<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 31; - const OFFSET: u8 = 0; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = r" Proxy"] -pub struct _EPSEG1W<'a> { - w: &'a mut W, -} -impl<'a> _EPSEG1W<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 31; - const OFFSET: u8 = 5; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = r" Proxy"] -pub struct _EPROPSEGW<'a> { - w: &'a mut W, -} -impl<'a> _EPROPSEGW<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 63; - const OFFSET: u8 = 10; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = r" Proxy"] -pub struct _ERJWW<'a> { - w: &'a mut W, -} -impl<'a> _ERJWW<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 31; - const OFFSET: u8 = 16; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = r" Proxy"] -pub struct _EPRESDIVW<'a> { - w: &'a mut W, -} -impl<'a> _EPRESDIVW<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u16) -> &'a mut W { - const MASK: u16 = 1023; - const OFFSET: u8 = 21; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `BTF`"] -pub enum BTFW { - #[doc = "Extended bit time definitions disabled."] _0, - #[doc = "Extended bit time definitions enabled."] _1, -} -impl BTFW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - BTFW::_0 => false, - BTFW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _BTFW<'a> { - w: &'a mut W, -} -impl<'a> _BTFW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: BTFW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Extended bit time definitions disabled."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(BTFW::_0) - } - #[doc = "Extended bit time definitions enabled."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(BTFW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 31; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:4 - Extended Phase Segment 2"] - #[inline] - pub fn epseg2(&self) -> EPSEG2R { - let bits = { - const MASK: u8 = 31; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - EPSEG2R { bits } - } - #[doc = "Bits 5:9 - Extended Phase Segment 1"] - #[inline] - pub fn epseg1(&self) -> EPSEG1R { - let bits = { - const MASK: u8 = 31; - const OFFSET: u8 = 5; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - EPSEG1R { bits } - } - #[doc = "Bits 10:15 - Extended Propagation Segment"] - #[inline] - pub fn epropseg(&self) -> EPROPSEGR { - let bits = { - const MASK: u8 = 63; - const OFFSET: u8 = 10; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - EPROPSEGR { bits } - } - #[doc = "Bits 16:20 - Extended Resync Jump Width"] - #[inline] - pub fn erjw(&self) -> ERJWR { - let bits = { - const MASK: u8 = 31; - const OFFSET: u8 = 16; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - ERJWR { bits } - } - #[doc = "Bits 21:30 - Extended Prescaler Division Factor"] - #[inline] - pub fn epresdiv(&self) -> EPRESDIVR { - let bits = { - const MASK: u16 = 1023; - const OFFSET: u8 = 21; - ((self.bits >> OFFSET) & MASK as u32) as u16 - }; - EPRESDIVR { bits } - } - #[doc = "Bit 31 - Bit Timing Format Enable"] - #[inline] - pub fn btf(&self) -> BTFR { - BTFR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 31; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 0 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bits 0:4 - Extended Phase Segment 2"] - #[inline] - pub fn epseg2(&mut self) -> _EPSEG2W { - _EPSEG2W { w: self } - } - #[doc = "Bits 5:9 - Extended Phase Segment 1"] - #[inline] - pub fn epseg1(&mut self) -> _EPSEG1W { - _EPSEG1W { w: self } - } - #[doc = "Bits 10:15 - Extended Propagation Segment"] - #[inline] - pub fn epropseg(&mut self) -> _EPROPSEGW { - _EPROPSEGW { w: self } - } - #[doc = "Bits 16:20 - Extended Resync Jump Width"] - #[inline] - pub fn erjw(&mut self) -> _ERJWW { - _ERJWW { w: self } - } - #[doc = "Bits 21:30 - Extended Prescaler Division Factor"] - #[inline] - pub fn epresdiv(&mut self) -> _EPRESDIVW { - _EPRESDIVW { w: self } - } - #[doc = "Bit 31 - Bit Timing Format Enable"] - #[inline] - pub fn btf(&mut self) -> _BTFW { - _BTFW { w: self } - } -} diff --git a/src/can2/crcr/mod.rs b/src/can2/crcr/mod.rs deleted file mode 100644 index 07b066c..0000000 --- a/src/can2/crcr/mod.rs +++ /dev/null @@ -1,62 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -impl super::CRCR { - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } -} -#[doc = r" Value of the field"] -pub struct TXCRCR { - bits: u16, -} -impl TXCRCR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u16 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct MBCRCR { - bits: u8, -} -impl MBCRCR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:14 - Transmitted CRC value"] - #[inline] - pub fn txcrc(&self) -> TXCRCR { - let bits = { - const MASK: u16 = 32767; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u16 - }; - TXCRCR { bits } - } - #[doc = "Bits 16:22 - CRC Mailbox"] - #[inline] - pub fn mbcrc(&self) -> MBCRCR { - let bits = { - const MASK: u8 = 127; - const OFFSET: u8 = 16; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - MBCRCR { bits } - } -} diff --git a/src/can2/ctrl1/mod.rs b/src/can2/ctrl1/mod.rs deleted file mode 100644 index ad0efed..0000000 --- a/src/can2/ctrl1/mod.rs +++ /dev/null @@ -1,1538 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::CTRL1 { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = r" Value of the field"] -pub struct PROPSEGR { - bits: u8, -} -impl PROPSEGR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = "Possible values of the field `LOM`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum LOMR { - #[doc = "Listen-Only mode is deactivated."] _0, - #[doc = "FlexCAN module operates in Listen-Only mode."] _1, -} -impl LOMR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - LOMR::_0 => false, - LOMR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> LOMR { - match value { - false => LOMR::_0, - true => LOMR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == LOMR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == LOMR::_1 - } -} -#[doc = "Possible values of the field `LBUF`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum LBUFR { - #[doc = "Buffer with highest priority is transmitted first."] _0, - #[doc = "Lowest number buffer is transmitted first."] _1, -} -impl LBUFR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - LBUFR::_0 => false, - LBUFR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> LBUFR { - match value { - false => LBUFR::_0, - true => LBUFR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == LBUFR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == LBUFR::_1 - } -} -#[doc = "Possible values of the field `TSYN`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum TSYNR { - #[doc = "Timer Sync feature disabled"] _0, - #[doc = "Timer Sync feature enabled"] _1, -} -impl TSYNR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - TSYNR::_0 => false, - TSYNR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> TSYNR { - match value { - false => TSYNR::_0, - true => TSYNR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == TSYNR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == TSYNR::_1 - } -} -#[doc = "Possible values of the field `BOFFREC`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum BOFFRECR { - #[doc = "Automatic recovering from Bus Off state enabled."] _0, - #[doc = "Automatic recovering from Bus Off state disabled."] _1, -} -impl BOFFRECR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - BOFFRECR::_0 => false, - BOFFRECR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> BOFFRECR { - match value { - false => BOFFRECR::_0, - true => BOFFRECR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == BOFFRECR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == BOFFRECR::_1 - } -} -#[doc = "Possible values of the field `SMP`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum SMPR { - #[doc = "Just one sample is used to determine the bit value."] _0, - #[doc = "Three samples are used to determine the value of the received bit: the regular one (sample point) and 2 preceding samples; a majority rule is used."] - _1, -} -impl SMPR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - SMPR::_0 => false, - SMPR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> SMPR { - match value { - false => SMPR::_0, - true => SMPR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == SMPR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == SMPR::_1 - } -} -#[doc = "Possible values of the field `RWRNMSK`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum RWRNMSKR { - #[doc = "Rx Warning Interrupt disabled."] _0, - #[doc = "Rx Warning Interrupt enabled."] _1, -} -impl RWRNMSKR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - RWRNMSKR::_0 => false, - RWRNMSKR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> RWRNMSKR { - match value { - false => RWRNMSKR::_0, - true => RWRNMSKR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == RWRNMSKR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == RWRNMSKR::_1 - } -} -#[doc = "Possible values of the field `TWRNMSK`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum TWRNMSKR { - #[doc = "Tx Warning Interrupt disabled."] _0, - #[doc = "Tx Warning Interrupt enabled."] _1, -} -impl TWRNMSKR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - TWRNMSKR::_0 => false, - TWRNMSKR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> TWRNMSKR { - match value { - false => TWRNMSKR::_0, - true => TWRNMSKR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == TWRNMSKR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == TWRNMSKR::_1 - } -} -#[doc = "Possible values of the field `LPB`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum LPBR { - #[doc = "Loop Back disabled."] _0, - #[doc = "Loop Back enabled."] _1, -} -impl LPBR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - LPBR::_0 => false, - LPBR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> LPBR { - match value { - false => LPBR::_0, - true => LPBR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == LPBR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == LPBR::_1 - } -} -#[doc = "Possible values of the field `CLKSRC`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum CLKSRCR { - #[doc = "The CAN engine clock source is the oscillator clock. Under this condition, the oscillator clock frequency must be lower than the bus clock."] - _0, - #[doc = "The CAN engine clock source is the peripheral clock."] _1, -} -impl CLKSRCR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - CLKSRCR::_0 => false, - CLKSRCR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> CLKSRCR { - match value { - false => CLKSRCR::_0, - true => CLKSRCR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == CLKSRCR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == CLKSRCR::_1 - } -} -#[doc = "Possible values of the field `ERRMSK`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum ERRMSKR { - #[doc = "Error interrupt disabled."] _0, - #[doc = "Error interrupt enabled."] _1, -} -impl ERRMSKR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - ERRMSKR::_0 => false, - ERRMSKR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> ERRMSKR { - match value { - false => ERRMSKR::_0, - true => ERRMSKR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == ERRMSKR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == ERRMSKR::_1 - } -} -#[doc = "Possible values of the field `BOFFMSK`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum BOFFMSKR { - #[doc = "Bus Off interrupt disabled."] _0, - #[doc = "Bus Off interrupt enabled."] _1, -} -impl BOFFMSKR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - BOFFMSKR::_0 => false, - BOFFMSKR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> BOFFMSKR { - match value { - false => BOFFMSKR::_0, - true => BOFFMSKR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == BOFFMSKR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == BOFFMSKR::_1 - } -} -#[doc = r" Value of the field"] -pub struct PSEG2R { - bits: u8, -} -impl PSEG2R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct PSEG1R { - bits: u8, -} -impl PSEG1R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct RJWR { - bits: u8, -} -impl RJWR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct PRESDIVR { - bits: u8, -} -impl PRESDIVR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Proxy"] -pub struct _PROPSEGW<'a> { - w: &'a mut W, -} -impl<'a> _PROPSEGW<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 7; - const OFFSET: u8 = 0; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `LOM`"] -pub enum LOMW { - #[doc = "Listen-Only mode is deactivated."] _0, - #[doc = "FlexCAN module operates in Listen-Only mode."] _1, -} -impl LOMW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - LOMW::_0 => false, - LOMW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _LOMW<'a> { - w: &'a mut W, -} -impl<'a> _LOMW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: LOMW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Listen-Only mode is deactivated."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(LOMW::_0) - } - #[doc = "FlexCAN module operates in Listen-Only mode."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(LOMW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 3; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `LBUF`"] -pub enum LBUFW { - #[doc = "Buffer with highest priority is transmitted first."] _0, - #[doc = "Lowest number buffer is transmitted first."] _1, -} -impl LBUFW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - LBUFW::_0 => false, - LBUFW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _LBUFW<'a> { - w: &'a mut W, -} -impl<'a> _LBUFW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: LBUFW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Buffer with highest priority is transmitted first."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(LBUFW::_0) - } - #[doc = "Lowest number buffer is transmitted first."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(LBUFW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 4; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `TSYN`"] -pub enum TSYNW { - #[doc = "Timer Sync feature disabled"] _0, - #[doc = "Timer Sync feature enabled"] _1, -} -impl TSYNW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - TSYNW::_0 => false, - TSYNW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _TSYNW<'a> { - w: &'a mut W, -} -impl<'a> _TSYNW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: TSYNW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Timer Sync feature disabled"] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(TSYNW::_0) - } - #[doc = "Timer Sync feature enabled"] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(TSYNW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 5; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `BOFFREC`"] -pub enum BOFFRECW { - #[doc = "Automatic recovering from Bus Off state enabled."] _0, - #[doc = "Automatic recovering from Bus Off state disabled."] _1, -} -impl BOFFRECW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - BOFFRECW::_0 => false, - BOFFRECW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _BOFFRECW<'a> { - w: &'a mut W, -} -impl<'a> _BOFFRECW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: BOFFRECW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Automatic recovering from Bus Off state enabled."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(BOFFRECW::_0) - } - #[doc = "Automatic recovering from Bus Off state disabled."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(BOFFRECW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 6; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `SMP`"] -pub enum SMPW { - #[doc = "Just one sample is used to determine the bit value."] _0, - #[doc = "Three samples are used to determine the value of the received bit: the regular one (sample point) and 2 preceding samples; a majority rule is used."] - _1, -} -impl SMPW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - SMPW::_0 => false, - SMPW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _SMPW<'a> { - w: &'a mut W, -} -impl<'a> _SMPW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: SMPW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Just one sample is used to determine the bit value."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(SMPW::_0) - } - #[doc = "Three samples are used to determine the value of the received bit: the regular one (sample point) and 2 preceding samples; a majority rule is used."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(SMPW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 7; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `RWRNMSK`"] -pub enum RWRNMSKW { - #[doc = "Rx Warning Interrupt disabled."] _0, - #[doc = "Rx Warning Interrupt enabled."] _1, -} -impl RWRNMSKW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - RWRNMSKW::_0 => false, - RWRNMSKW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _RWRNMSKW<'a> { - w: &'a mut W, -} -impl<'a> _RWRNMSKW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: RWRNMSKW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Rx Warning Interrupt disabled."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(RWRNMSKW::_0) - } - #[doc = "Rx Warning Interrupt enabled."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(RWRNMSKW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 10; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `TWRNMSK`"] -pub enum TWRNMSKW { - #[doc = "Tx Warning Interrupt disabled."] _0, - #[doc = "Tx Warning Interrupt enabled."] _1, -} -impl TWRNMSKW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - TWRNMSKW::_0 => false, - TWRNMSKW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _TWRNMSKW<'a> { - w: &'a mut W, -} -impl<'a> _TWRNMSKW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: TWRNMSKW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Tx Warning Interrupt disabled."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(TWRNMSKW::_0) - } - #[doc = "Tx Warning Interrupt enabled."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(TWRNMSKW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 11; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `LPB`"] -pub enum LPBW { - #[doc = "Loop Back disabled."] _0, - #[doc = "Loop Back enabled."] _1, -} -impl LPBW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - LPBW::_0 => false, - LPBW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _LPBW<'a> { - w: &'a mut W, -} -impl<'a> _LPBW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: LPBW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Loop Back disabled."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(LPBW::_0) - } - #[doc = "Loop Back enabled."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(LPBW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 12; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `CLKSRC`"] -pub enum CLKSRCW { - #[doc = "The CAN engine clock source is the oscillator clock. Under this condition, the oscillator clock frequency must be lower than the bus clock."] - _0, - #[doc = "The CAN engine clock source is the peripheral clock."] _1, -} -impl CLKSRCW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - CLKSRCW::_0 => false, - CLKSRCW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _CLKSRCW<'a> { - w: &'a mut W, -} -impl<'a> _CLKSRCW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: CLKSRCW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "The CAN engine clock source is the oscillator clock. Under this condition, the oscillator clock frequency must be lower than the bus clock."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(CLKSRCW::_0) - } - #[doc = "The CAN engine clock source is the peripheral clock."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(CLKSRCW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 13; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `ERRMSK`"] -pub enum ERRMSKW { - #[doc = "Error interrupt disabled."] _0, - #[doc = "Error interrupt enabled."] _1, -} -impl ERRMSKW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - ERRMSKW::_0 => false, - ERRMSKW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _ERRMSKW<'a> { - w: &'a mut W, -} -impl<'a> _ERRMSKW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: ERRMSKW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Error interrupt disabled."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(ERRMSKW::_0) - } - #[doc = "Error interrupt enabled."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(ERRMSKW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 14; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `BOFFMSK`"] -pub enum BOFFMSKW { - #[doc = "Bus Off interrupt disabled."] _0, - #[doc = "Bus Off interrupt enabled."] _1, -} -impl BOFFMSKW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - BOFFMSKW::_0 => false, - BOFFMSKW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _BOFFMSKW<'a> { - w: &'a mut W, -} -impl<'a> _BOFFMSKW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: BOFFMSKW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Bus Off interrupt disabled."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(BOFFMSKW::_0) - } - #[doc = "Bus Off interrupt enabled."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(BOFFMSKW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 15; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = r" Proxy"] -pub struct _PSEG2W<'a> { - w: &'a mut W, -} -impl<'a> _PSEG2W<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 7; - const OFFSET: u8 = 16; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = r" Proxy"] -pub struct _PSEG1W<'a> { - w: &'a mut W, -} -impl<'a> _PSEG1W<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 7; - const OFFSET: u8 = 19; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = r" Proxy"] -pub struct _RJWW<'a> { - w: &'a mut W, -} -impl<'a> _RJWW<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 3; - const OFFSET: u8 = 22; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = r" Proxy"] -pub struct _PRESDIVW<'a> { - w: &'a mut W, -} -impl<'a> _PRESDIVW<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 255; - const OFFSET: u8 = 24; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:2 - Propagation Segment"] - #[inline] - pub fn propseg(&self) -> PROPSEGR { - let bits = { - const MASK: u8 = 7; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - PROPSEGR { bits } - } - #[doc = "Bit 3 - Listen-Only Mode"] - #[inline] - pub fn lom(&self) -> LOMR { - LOMR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 3; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 4 - Lowest Buffer Transmitted First"] - #[inline] - pub fn lbuf(&self) -> LBUFR { - LBUFR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 4; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 5 - Timer Sync"] - #[inline] - pub fn tsyn(&self) -> TSYNR { - TSYNR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 5; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 6 - Bus Off Recovery"] - #[inline] - pub fn boffrec(&self) -> BOFFRECR { - BOFFRECR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 6; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 7 - CAN Bit Sampling"] - #[inline] - pub fn smp(&self) -> SMPR { - SMPR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 7; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 10 - Rx Warning Interrupt Mask"] - #[inline] - pub fn rwrnmsk(&self) -> RWRNMSKR { - RWRNMSKR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 10; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 11 - Tx Warning Interrupt Mask"] - #[inline] - pub fn twrnmsk(&self) -> TWRNMSKR { - TWRNMSKR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 11; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 12 - Loop Back Mode"] - #[inline] - pub fn lpb(&self) -> LPBR { - LPBR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 12; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 13 - CAN Engine Clock Source"] - #[inline] - pub fn clksrc(&self) -> CLKSRCR { - CLKSRCR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 13; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 14 - Error Interrupt Mask"] - #[inline] - pub fn errmsk(&self) -> ERRMSKR { - ERRMSKR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 14; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 15 - Bus Off Interrupt Mask"] - #[inline] - pub fn boffmsk(&self) -> BOFFMSKR { - BOFFMSKR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 15; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bits 16:18 - Phase Segment 2"] - #[inline] - pub fn pseg2(&self) -> PSEG2R { - let bits = { - const MASK: u8 = 7; - const OFFSET: u8 = 16; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - PSEG2R { bits } - } - #[doc = "Bits 19:21 - Phase Segment 1"] - #[inline] - pub fn pseg1(&self) -> PSEG1R { - let bits = { - const MASK: u8 = 7; - const OFFSET: u8 = 19; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - PSEG1R { bits } - } - #[doc = "Bits 22:23 - Resync Jump Width"] - #[inline] - pub fn rjw(&self) -> RJWR { - let bits = { - const MASK: u8 = 3; - const OFFSET: u8 = 22; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - RJWR { bits } - } - #[doc = "Bits 24:31 - Prescaler Division Factor"] - #[inline] - pub fn presdiv(&self) -> PRESDIVR { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 24; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - PRESDIVR { bits } - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 0 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bits 0:2 - Propagation Segment"] - #[inline] - pub fn propseg(&mut self) -> _PROPSEGW { - _PROPSEGW { w: self } - } - #[doc = "Bit 3 - Listen-Only Mode"] - #[inline] - pub fn lom(&mut self) -> _LOMW { - _LOMW { w: self } - } - #[doc = "Bit 4 - Lowest Buffer Transmitted First"] - #[inline] - pub fn lbuf(&mut self) -> _LBUFW { - _LBUFW { w: self } - } - #[doc = "Bit 5 - Timer Sync"] - #[inline] - pub fn tsyn(&mut self) -> _TSYNW { - _TSYNW { w: self } - } - #[doc = "Bit 6 - Bus Off Recovery"] - #[inline] - pub fn boffrec(&mut self) -> _BOFFRECW { - _BOFFRECW { w: self } - } - #[doc = "Bit 7 - CAN Bit Sampling"] - #[inline] - pub fn smp(&mut self) -> _SMPW { - _SMPW { w: self } - } - #[doc = "Bit 10 - Rx Warning Interrupt Mask"] - #[inline] - pub fn rwrnmsk(&mut self) -> _RWRNMSKW { - _RWRNMSKW { w: self } - } - #[doc = "Bit 11 - Tx Warning Interrupt Mask"] - #[inline] - pub fn twrnmsk(&mut self) -> _TWRNMSKW { - _TWRNMSKW { w: self } - } - #[doc = "Bit 12 - Loop Back Mode"] - #[inline] - pub fn lpb(&mut self) -> _LPBW { - _LPBW { w: self } - } - #[doc = "Bit 13 - CAN Engine Clock Source"] - #[inline] - pub fn clksrc(&mut self) -> _CLKSRCW { - _CLKSRCW { w: self } - } - #[doc = "Bit 14 - Error Interrupt Mask"] - #[inline] - pub fn errmsk(&mut self) -> _ERRMSKW { - _ERRMSKW { w: self } - } - #[doc = "Bit 15 - Bus Off Interrupt Mask"] - #[inline] - pub fn boffmsk(&mut self) -> _BOFFMSKW { - _BOFFMSKW { w: self } - } - #[doc = "Bits 16:18 - Phase Segment 2"] - #[inline] - pub fn pseg2(&mut self) -> _PSEG2W { - _PSEG2W { w: self } - } - #[doc = "Bits 19:21 - Phase Segment 1"] - #[inline] - pub fn pseg1(&mut self) -> _PSEG1W { - _PSEG1W { w: self } - } - #[doc = "Bits 22:23 - Resync Jump Width"] - #[inline] - pub fn rjw(&mut self) -> _RJWW { - _RJWW { w: self } - } - #[doc = "Bits 24:31 - Prescaler Division Factor"] - #[inline] - pub fn presdiv(&mut self) -> _PRESDIVW { - _PRESDIVW { w: self } - } -} diff --git a/src/can2/ctrl1_pn/mod.rs b/src/can2/ctrl1_pn/mod.rs deleted file mode 100644 index dc76bb4..0000000 --- a/src/can2/ctrl1_pn/mod.rs +++ /dev/null @@ -1,801 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::CTRL1_PN { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = "Possible values of the field `FCS`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum FCSR { - #[doc = "Message ID filtering only"] _00, - #[doc = "Message ID filtering and payload filtering"] _01, - #[doc = "Message ID filtering occurring a specified number of times."] _10, - #[doc = "Message ID filtering and payload filtering a specified number of times"] _11, -} -impl FCSR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - match *self { - FCSR::_00 => 0, - FCSR::_01 => 1, - FCSR::_10 => 2, - FCSR::_11 => 3, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: u8) -> FCSR { - match value { - 0 => FCSR::_00, - 1 => FCSR::_01, - 2 => FCSR::_10, - 3 => FCSR::_11, - _ => unreachable!(), - } - } - #[doc = "Checks if the value of the field is `_00`"] - #[inline] - pub fn is_00(&self) -> bool { - *self == FCSR::_00 - } - #[doc = "Checks if the value of the field is `_01`"] - #[inline] - pub fn is_01(&self) -> bool { - *self == FCSR::_01 - } - #[doc = "Checks if the value of the field is `_10`"] - #[inline] - pub fn is_10(&self) -> bool { - *self == FCSR::_10 - } - #[doc = "Checks if the value of the field is `_11`"] - #[inline] - pub fn is_11(&self) -> bool { - *self == FCSR::_11 - } -} -#[doc = "Possible values of the field `IDFS`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum IDFSR { - #[doc = "Match upon a ID contents against an exact target value"] _00, - #[doc = "Match upon a ID value greater than or equal to a specified target value"] _01, - #[doc = "Match upon a ID value smaller than or equal to a specified target value"] _10, - #[doc = "Match upon a ID value inside a range, greater than or equal to a specified lower limit and smaller than or equal a specified upper limit"] - _11, -} -impl IDFSR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - match *self { - IDFSR::_00 => 0, - IDFSR::_01 => 1, - IDFSR::_10 => 2, - IDFSR::_11 => 3, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: u8) -> IDFSR { - match value { - 0 => IDFSR::_00, - 1 => IDFSR::_01, - 2 => IDFSR::_10, - 3 => IDFSR::_11, - _ => unreachable!(), - } - } - #[doc = "Checks if the value of the field is `_00`"] - #[inline] - pub fn is_00(&self) -> bool { - *self == IDFSR::_00 - } - #[doc = "Checks if the value of the field is `_01`"] - #[inline] - pub fn is_01(&self) -> bool { - *self == IDFSR::_01 - } - #[doc = "Checks if the value of the field is `_10`"] - #[inline] - pub fn is_10(&self) -> bool { - *self == IDFSR::_10 - } - #[doc = "Checks if the value of the field is `_11`"] - #[inline] - pub fn is_11(&self) -> bool { - *self == IDFSR::_11 - } -} -#[doc = "Possible values of the field `PLFS`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum PLFSR { - #[doc = "Match upon a payload contents against an exact target value"] _00, - #[doc = "Match upon a payload value greater than or equal to a specified target value"] _01, - #[doc = "Match upon a payload value smaller than or equal to a specified target value"] _10, - #[doc = "Match upon a payload value inside a range, greater than or equal to a specified lower limit and smaller than or equal a specified upper limit"] - _11, -} -impl PLFSR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - match *self { - PLFSR::_00 => 0, - PLFSR::_01 => 1, - PLFSR::_10 => 2, - PLFSR::_11 => 3, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: u8) -> PLFSR { - match value { - 0 => PLFSR::_00, - 1 => PLFSR::_01, - 2 => PLFSR::_10, - 3 => PLFSR::_11, - _ => unreachable!(), - } - } - #[doc = "Checks if the value of the field is `_00`"] - #[inline] - pub fn is_00(&self) -> bool { - *self == PLFSR::_00 - } - #[doc = "Checks if the value of the field is `_01`"] - #[inline] - pub fn is_01(&self) -> bool { - *self == PLFSR::_01 - } - #[doc = "Checks if the value of the field is `_10`"] - #[inline] - pub fn is_10(&self) -> bool { - *self == PLFSR::_10 - } - #[doc = "Checks if the value of the field is `_11`"] - #[inline] - pub fn is_11(&self) -> bool { - *self == PLFSR::_11 - } -} -#[doc = "Possible values of the field `NMATCH`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum NMATCHR { - #[doc = "Received message must match the predefined filtering criteria for ID and/or PL once before generating a wake up event."] - _00000001, - #[doc = "Received message must match the predefined filtering criteria for ID and/or PL twice before generating a wake up event."] - _00000010, - #[doc = "Received message must match the predefined filtering criteria for ID and/or PL 255 times before generating a wake up event."] - _11111111, - #[doc = r" Reserved"] _Reserved(u8), -} -impl NMATCHR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - match *self { - NMATCHR::_00000001 => 1, - NMATCHR::_00000010 => 2, - NMATCHR::_11111111 => 255, - NMATCHR::_Reserved(bits) => bits, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: u8) -> NMATCHR { - match value { - 1 => NMATCHR::_00000001, - 2 => NMATCHR::_00000010, - 255 => NMATCHR::_11111111, - i => NMATCHR::_Reserved(i), - } - } - #[doc = "Checks if the value of the field is `_00000001`"] - #[inline] - pub fn is_00000001(&self) -> bool { - *self == NMATCHR::_00000001 - } - #[doc = "Checks if the value of the field is `_00000010`"] - #[inline] - pub fn is_00000010(&self) -> bool { - *self == NMATCHR::_00000010 - } - #[doc = "Checks if the value of the field is `_11111111`"] - #[inline] - pub fn is_11111111(&self) -> bool { - *self == NMATCHR::_11111111 - } -} -#[doc = "Possible values of the field `WUMF_MSK`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum WUMF_MSKR { - #[doc = "Wake up match event is disabled"] _0, - #[doc = "Wake up match event is enabled"] _1, -} -impl WUMF_MSKR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - WUMF_MSKR::_0 => false, - WUMF_MSKR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> WUMF_MSKR { - match value { - false => WUMF_MSKR::_0, - true => WUMF_MSKR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == WUMF_MSKR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == WUMF_MSKR::_1 - } -} -#[doc = "Possible values of the field `WTOF_MSK`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum WTOF_MSKR { - #[doc = "Timeout wake up event is disabled"] _0, - #[doc = "Timeout wake up event is enabled"] _1, -} -impl WTOF_MSKR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - WTOF_MSKR::_0 => false, - WTOF_MSKR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> WTOF_MSKR { - match value { - false => WTOF_MSKR::_0, - true => WTOF_MSKR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == WTOF_MSKR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == WTOF_MSKR::_1 - } -} -#[doc = "Values that can be written to the field `FCS`"] -pub enum FCSW { - #[doc = "Message ID filtering only"] _00, - #[doc = "Message ID filtering and payload filtering"] _01, - #[doc = "Message ID filtering occurring a specified number of times."] _10, - #[doc = "Message ID filtering and payload filtering a specified number of times"] _11, -} -impl FCSW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> u8 { - match *self { - FCSW::_00 => 0, - FCSW::_01 => 1, - FCSW::_10 => 2, - FCSW::_11 => 3, - } - } -} -#[doc = r" Proxy"] -pub struct _FCSW<'a> { - w: &'a mut W, -} -impl<'a> _FCSW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: FCSW) -> &'a mut W { - { - self.bits(variant._bits()) - } - } - #[doc = "Message ID filtering only"] - #[inline] - pub fn _00(self) -> &'a mut W { - self.variant(FCSW::_00) - } - #[doc = "Message ID filtering and payload filtering"] - #[inline] - pub fn _01(self) -> &'a mut W { - self.variant(FCSW::_01) - } - #[doc = "Message ID filtering occurring a specified number of times."] - #[inline] - pub fn _10(self) -> &'a mut W { - self.variant(FCSW::_10) - } - #[doc = "Message ID filtering and payload filtering a specified number of times"] - #[inline] - pub fn _11(self) -> &'a mut W { - self.variant(FCSW::_11) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 3; - const OFFSET: u8 = 0; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `IDFS`"] -pub enum IDFSW { - #[doc = "Match upon a ID contents against an exact target value"] _00, - #[doc = "Match upon a ID value greater than or equal to a specified target value"] _01, - #[doc = "Match upon a ID value smaller than or equal to a specified target value"] _10, - #[doc = "Match upon a ID value inside a range, greater than or equal to a specified lower limit and smaller than or equal a specified upper limit"] - _11, -} -impl IDFSW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> u8 { - match *self { - IDFSW::_00 => 0, - IDFSW::_01 => 1, - IDFSW::_10 => 2, - IDFSW::_11 => 3, - } - } -} -#[doc = r" Proxy"] -pub struct _IDFSW<'a> { - w: &'a mut W, -} -impl<'a> _IDFSW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: IDFSW) -> &'a mut W { - { - self.bits(variant._bits()) - } - } - #[doc = "Match upon a ID contents against an exact target value"] - #[inline] - pub fn _00(self) -> &'a mut W { - self.variant(IDFSW::_00) - } - #[doc = "Match upon a ID value greater than or equal to a specified target value"] - #[inline] - pub fn _01(self) -> &'a mut W { - self.variant(IDFSW::_01) - } - #[doc = "Match upon a ID value smaller than or equal to a specified target value"] - #[inline] - pub fn _10(self) -> &'a mut W { - self.variant(IDFSW::_10) - } - #[doc = "Match upon a ID value inside a range, greater than or equal to a specified lower limit and smaller than or equal a specified upper limit"] - #[inline] - pub fn _11(self) -> &'a mut W { - self.variant(IDFSW::_11) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 3; - const OFFSET: u8 = 2; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `PLFS`"] -pub enum PLFSW { - #[doc = "Match upon a payload contents against an exact target value"] _00, - #[doc = "Match upon a payload value greater than or equal to a specified target value"] _01, - #[doc = "Match upon a payload value smaller than or equal to a specified target value"] _10, - #[doc = "Match upon a payload value inside a range, greater than or equal to a specified lower limit and smaller than or equal a specified upper limit"] - _11, -} -impl PLFSW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> u8 { - match *self { - PLFSW::_00 => 0, - PLFSW::_01 => 1, - PLFSW::_10 => 2, - PLFSW::_11 => 3, - } - } -} -#[doc = r" Proxy"] -pub struct _PLFSW<'a> { - w: &'a mut W, -} -impl<'a> _PLFSW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: PLFSW) -> &'a mut W { - { - self.bits(variant._bits()) - } - } - #[doc = "Match upon a payload contents against an exact target value"] - #[inline] - pub fn _00(self) -> &'a mut W { - self.variant(PLFSW::_00) - } - #[doc = "Match upon a payload value greater than or equal to a specified target value"] - #[inline] - pub fn _01(self) -> &'a mut W { - self.variant(PLFSW::_01) - } - #[doc = "Match upon a payload value smaller than or equal to a specified target value"] - #[inline] - pub fn _10(self) -> &'a mut W { - self.variant(PLFSW::_10) - } - #[doc = "Match upon a payload value inside a range, greater than or equal to a specified lower limit and smaller than or equal a specified upper limit"] - #[inline] - pub fn _11(self) -> &'a mut W { - self.variant(PLFSW::_11) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 3; - const OFFSET: u8 = 4; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `NMATCH`"] -pub enum NMATCHW { - #[doc = "Received message must match the predefined filtering criteria for ID and/or PL once before generating a wake up event."] - _00000001, - #[doc = "Received message must match the predefined filtering criteria for ID and/or PL twice before generating a wake up event."] - _00000010, - #[doc = "Received message must match the predefined filtering criteria for ID and/or PL 255 times before generating a wake up event."] - _11111111, -} -impl NMATCHW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> u8 { - match *self { - NMATCHW::_00000001 => 1, - NMATCHW::_00000010 => 2, - NMATCHW::_11111111 => 255, - } - } -} -#[doc = r" Proxy"] -pub struct _NMATCHW<'a> { - w: &'a mut W, -} -impl<'a> _NMATCHW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: NMATCHW) -> &'a mut W { - unsafe { self.bits(variant._bits()) } - } - #[doc = "Received message must match the predefined filtering criteria for ID and/or PL once before generating a wake up event."] - #[inline] - pub fn _00000001(self) -> &'a mut W { - self.variant(NMATCHW::_00000001) - } - #[doc = "Received message must match the predefined filtering criteria for ID and/or PL twice before generating a wake up event."] - #[inline] - pub fn _00000010(self) -> &'a mut W { - self.variant(NMATCHW::_00000010) - } - #[doc = "Received message must match the predefined filtering criteria for ID and/or PL 255 times before generating a wake up event."] - #[inline] - pub fn _11111111(self) -> &'a mut W { - self.variant(NMATCHW::_11111111) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 255; - const OFFSET: u8 = 8; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `WUMF_MSK`"] -pub enum WUMF_MSKW { - #[doc = "Wake up match event is disabled"] _0, - #[doc = "Wake up match event is enabled"] _1, -} -impl WUMF_MSKW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - WUMF_MSKW::_0 => false, - WUMF_MSKW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _WUMF_MSKW<'a> { - w: &'a mut W, -} -impl<'a> _WUMF_MSKW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: WUMF_MSKW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Wake up match event is disabled"] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(WUMF_MSKW::_0) - } - #[doc = "Wake up match event is enabled"] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(WUMF_MSKW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 16; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `WTOF_MSK`"] -pub enum WTOF_MSKW { - #[doc = "Timeout wake up event is disabled"] _0, - #[doc = "Timeout wake up event is enabled"] _1, -} -impl WTOF_MSKW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - WTOF_MSKW::_0 => false, - WTOF_MSKW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _WTOF_MSKW<'a> { - w: &'a mut W, -} -impl<'a> _WTOF_MSKW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: WTOF_MSKW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Timeout wake up event is disabled"] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(WTOF_MSKW::_0) - } - #[doc = "Timeout wake up event is enabled"] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(WTOF_MSKW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 17; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:1 - Filtering Combination Selection"] - #[inline] - pub fn fcs(&self) -> FCSR { - FCSR::_from({ - const MASK: u8 = 3; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }) - } - #[doc = "Bits 2:3 - ID Filtering Selection"] - #[inline] - pub fn idfs(&self) -> IDFSR { - IDFSR::_from({ - const MASK: u8 = 3; - const OFFSET: u8 = 2; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }) - } - #[doc = "Bits 4:5 - Payload Filtering Selection"] - #[inline] - pub fn plfs(&self) -> PLFSR { - PLFSR::_from({ - const MASK: u8 = 3; - const OFFSET: u8 = 4; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }) - } - #[doc = "Bits 8:15 - Number of Messages Matching the Same Filtering Criteria"] - #[inline] - pub fn nmatch(&self) -> NMATCHR { - NMATCHR::_from({ - const MASK: u8 = 255; - const OFFSET: u8 = 8; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }) - } - #[doc = "Bit 16 - Wake Up by Match Flag Mask Bit"] - #[inline] - pub fn wumf_msk(&self) -> WUMF_MSKR { - WUMF_MSKR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 16; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 17 - Wake Up by Timeout Flag Mask Bit"] - #[inline] - pub fn wtof_msk(&self) -> WTOF_MSKR { - WTOF_MSKR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 17; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 256 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bits 0:1 - Filtering Combination Selection"] - #[inline] - pub fn fcs(&mut self) -> _FCSW { - _FCSW { w: self } - } - #[doc = "Bits 2:3 - ID Filtering Selection"] - #[inline] - pub fn idfs(&mut self) -> _IDFSW { - _IDFSW { w: self } - } - #[doc = "Bits 4:5 - Payload Filtering Selection"] - #[inline] - pub fn plfs(&mut self) -> _PLFSW { - _PLFSW { w: self } - } - #[doc = "Bits 8:15 - Number of Messages Matching the Same Filtering Criteria"] - #[inline] - pub fn nmatch(&mut self) -> _NMATCHW { - _NMATCHW { w: self } - } - #[doc = "Bit 16 - Wake Up by Match Flag Mask Bit"] - #[inline] - pub fn wumf_msk(&mut self) -> _WUMF_MSKW { - _WUMF_MSKW { w: self } - } - #[doc = "Bit 17 - Wake Up by Timeout Flag Mask Bit"] - #[inline] - pub fn wtof_msk(&mut self) -> _WTOF_MSKW { - _WTOF_MSKW { w: self } - } -} diff --git a/src/can2/ctrl2/mod.rs b/src/can2/ctrl2/mod.rs deleted file mode 100644 index dfec61f..0000000 --- a/src/can2/ctrl2/mod.rs +++ /dev/null @@ -1,1189 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::CTRL2 { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = "Possible values of the field `EDFLTDIS`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum EDFLTDISR { - #[doc = "Edge Filter is enabled."] _0, - #[doc = "Edge Filter is disabled."] _1, -} -impl EDFLTDISR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - EDFLTDISR::_0 => false, - EDFLTDISR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> EDFLTDISR { - match value { - false => EDFLTDISR::_0, - true => EDFLTDISR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == EDFLTDISR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == EDFLTDISR::_1 - } -} -#[doc = "Possible values of the field `ISOCANFDEN`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum ISOCANFDENR { - #[doc = "FlexCAN operates using the non-ISO CAN FD protocol."] _0, - #[doc = "FlexCAN operates using the ISO CAN FD protocol (ISO 11898-1)."] _1, -} -impl ISOCANFDENR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - ISOCANFDENR::_0 => false, - ISOCANFDENR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> ISOCANFDENR { - match value { - false => ISOCANFDENR::_0, - true => ISOCANFDENR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == ISOCANFDENR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == ISOCANFDENR::_1 - } -} -#[doc = "Possible values of the field `PREXCEN`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum PREXCENR { - #[doc = "Protocol Exception is disabled."] _0, - #[doc = "Protocol Exception is enabled."] _1, -} -impl PREXCENR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - PREXCENR::_0 => false, - PREXCENR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> PREXCENR { - match value { - false => PREXCENR::_0, - true => PREXCENR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == PREXCENR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == PREXCENR::_1 - } -} -#[doc = "Possible values of the field `TIMER_SRC`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum TIMER_SRCR { - #[doc = "The Free Running Timer is clocked by the CAN bit clock, which defines the baud rate on the CAN bus."] - _0, - #[doc = "The Free Running Timer is clocked by an external time tick. The period can be either adjusted to be equal to the baud rate on the CAN bus, or a different value as required. See the device specific section for details about the external time tick."] - _1, -} -impl TIMER_SRCR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - TIMER_SRCR::_0 => false, - TIMER_SRCR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> TIMER_SRCR { - match value { - false => TIMER_SRCR::_0, - true => TIMER_SRCR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == TIMER_SRCR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == TIMER_SRCR::_1 - } -} -#[doc = "Possible values of the field `EACEN`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum EACENR { - #[doc = "Rx Mailbox filter's IDE bit is always compared and RTR is never compared despite mask bits."] - _0, - #[doc = "Enables the comparison of both Rx Mailbox filter's IDE and RTR bit with their corresponding bits within the incoming frame. Mask bits do apply."] - _1, -} -impl EACENR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - EACENR::_0 => false, - EACENR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> EACENR { - match value { - false => EACENR::_0, - true => EACENR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == EACENR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == EACENR::_1 - } -} -#[doc = "Possible values of the field `RRS`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum RRSR { - #[doc = "Remote Response Frame is generated."] _0, - #[doc = "Remote Request Frame is stored."] _1, -} -impl RRSR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - RRSR::_0 => false, - RRSR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> RRSR { - match value { - false => RRSR::_0, - true => RRSR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == RRSR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == RRSR::_1 - } -} -#[doc = "Possible values of the field `MRP`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum MRPR { - #[doc = "Matching starts from Rx FIFO and continues on Mailboxes."] _0, - #[doc = "Matching starts from Mailboxes and continues on Rx FIFO."] _1, -} -impl MRPR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - MRPR::_0 => false, - MRPR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> MRPR { - match value { - false => MRPR::_0, - true => MRPR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == MRPR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == MRPR::_1 - } -} -#[doc = r" Value of the field"] -pub struct TASDR { - bits: u8, -} -impl TASDR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct RFFNR { - bits: u8, -} -impl RFFNR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = "Possible values of the field `BOFFDONEMSK`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum BOFFDONEMSKR { - #[doc = "Bus Off Done interrupt disabled."] _0, - #[doc = "Bus Off Done interrupt enabled."] _1, -} -impl BOFFDONEMSKR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - BOFFDONEMSKR::_0 => false, - BOFFDONEMSKR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> BOFFDONEMSKR { - match value { - false => BOFFDONEMSKR::_0, - true => BOFFDONEMSKR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == BOFFDONEMSKR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == BOFFDONEMSKR::_1 - } -} -#[doc = "Possible values of the field `ERRMSK_FAST`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum ERRMSK_FASTR { - #[doc = "ERRINT_FAST Error interrupt disabled."] _0, - #[doc = "ERRINT_FAST Error interrupt enabled."] _1, -} -impl ERRMSK_FASTR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - ERRMSK_FASTR::_0 => false, - ERRMSK_FASTR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> ERRMSK_FASTR { - match value { - false => ERRMSK_FASTR::_0, - true => ERRMSK_FASTR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == ERRMSK_FASTR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == ERRMSK_FASTR::_1 - } -} -#[doc = "Values that can be written to the field `EDFLTDIS`"] -pub enum EDFLTDISW { - #[doc = "Edge Filter is enabled."] _0, - #[doc = "Edge Filter is disabled."] _1, -} -impl EDFLTDISW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - EDFLTDISW::_0 => false, - EDFLTDISW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _EDFLTDISW<'a> { - w: &'a mut W, -} -impl<'a> _EDFLTDISW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: EDFLTDISW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Edge Filter is enabled."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(EDFLTDISW::_0) - } - #[doc = "Edge Filter is disabled."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(EDFLTDISW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 11; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `ISOCANFDEN`"] -pub enum ISOCANFDENW { - #[doc = "FlexCAN operates using the non-ISO CAN FD protocol."] _0, - #[doc = "FlexCAN operates using the ISO CAN FD protocol (ISO 11898-1)."] _1, -} -impl ISOCANFDENW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - ISOCANFDENW::_0 => false, - ISOCANFDENW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _ISOCANFDENW<'a> { - w: &'a mut W, -} -impl<'a> _ISOCANFDENW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: ISOCANFDENW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "FlexCAN operates using the non-ISO CAN FD protocol."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(ISOCANFDENW::_0) - } - #[doc = "FlexCAN operates using the ISO CAN FD protocol (ISO 11898-1)."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(ISOCANFDENW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 12; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `PREXCEN`"] -pub enum PREXCENW { - #[doc = "Protocol Exception is disabled."] _0, - #[doc = "Protocol Exception is enabled."] _1, -} -impl PREXCENW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - PREXCENW::_0 => false, - PREXCENW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _PREXCENW<'a> { - w: &'a mut W, -} -impl<'a> _PREXCENW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: PREXCENW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Protocol Exception is disabled."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(PREXCENW::_0) - } - #[doc = "Protocol Exception is enabled."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(PREXCENW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 14; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `TIMER_SRC`"] -pub enum TIMER_SRCW { - #[doc = "The Free Running Timer is clocked by the CAN bit clock, which defines the baud rate on the CAN bus."] - _0, - #[doc = "The Free Running Timer is clocked by an external time tick. The period can be either adjusted to be equal to the baud rate on the CAN bus, or a different value as required. See the device specific section for details about the external time tick."] - _1, -} -impl TIMER_SRCW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - TIMER_SRCW::_0 => false, - TIMER_SRCW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _TIMER_SRCW<'a> { - w: &'a mut W, -} -impl<'a> _TIMER_SRCW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: TIMER_SRCW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "The Free Running Timer is clocked by the CAN bit clock, which defines the baud rate on the CAN bus."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(TIMER_SRCW::_0) - } - #[doc = "The Free Running Timer is clocked by an external time tick. The period can be either adjusted to be equal to the baud rate on the CAN bus, or a different value as required. See the device specific section for details about the external time tick."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(TIMER_SRCW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 15; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `EACEN`"] -pub enum EACENW { - #[doc = "Rx Mailbox filter's IDE bit is always compared and RTR is never compared despite mask bits."] - _0, - #[doc = "Enables the comparison of both Rx Mailbox filter's IDE and RTR bit with their corresponding bits within the incoming frame. Mask bits do apply."] - _1, -} -impl EACENW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - EACENW::_0 => false, - EACENW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _EACENW<'a> { - w: &'a mut W, -} -impl<'a> _EACENW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: EACENW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Rx Mailbox filter's IDE bit is always compared and RTR is never compared despite mask bits."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(EACENW::_0) - } - #[doc = "Enables the comparison of both Rx Mailbox filter's IDE and RTR bit with their corresponding bits within the incoming frame. Mask bits do apply."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(EACENW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 16; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `RRS`"] -pub enum RRSW { - #[doc = "Remote Response Frame is generated."] _0, - #[doc = "Remote Request Frame is stored."] _1, -} -impl RRSW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - RRSW::_0 => false, - RRSW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _RRSW<'a> { - w: &'a mut W, -} -impl<'a> _RRSW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: RRSW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Remote Response Frame is generated."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(RRSW::_0) - } - #[doc = "Remote Request Frame is stored."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(RRSW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 17; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `MRP`"] -pub enum MRPW { - #[doc = "Matching starts from Rx FIFO and continues on Mailboxes."] _0, - #[doc = "Matching starts from Mailboxes and continues on Rx FIFO."] _1, -} -impl MRPW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - MRPW::_0 => false, - MRPW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _MRPW<'a> { - w: &'a mut W, -} -impl<'a> _MRPW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: MRPW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Matching starts from Rx FIFO and continues on Mailboxes."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(MRPW::_0) - } - #[doc = "Matching starts from Mailboxes and continues on Rx FIFO."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(MRPW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 18; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = r" Proxy"] -pub struct _TASDW<'a> { - w: &'a mut W, -} -impl<'a> _TASDW<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 31; - const OFFSET: u8 = 19; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = r" Proxy"] -pub struct _RFFNW<'a> { - w: &'a mut W, -} -impl<'a> _RFFNW<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 15; - const OFFSET: u8 = 24; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `BOFFDONEMSK`"] -pub enum BOFFDONEMSKW { - #[doc = "Bus Off Done interrupt disabled."] _0, - #[doc = "Bus Off Done interrupt enabled."] _1, -} -impl BOFFDONEMSKW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - BOFFDONEMSKW::_0 => false, - BOFFDONEMSKW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _BOFFDONEMSKW<'a> { - w: &'a mut W, -} -impl<'a> _BOFFDONEMSKW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: BOFFDONEMSKW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Bus Off Done interrupt disabled."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(BOFFDONEMSKW::_0) - } - #[doc = "Bus Off Done interrupt enabled."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(BOFFDONEMSKW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 30; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `ERRMSK_FAST`"] -pub enum ERRMSK_FASTW { - #[doc = "ERRINT_FAST Error interrupt disabled."] _0, - #[doc = "ERRINT_FAST Error interrupt enabled."] _1, -} -impl ERRMSK_FASTW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - ERRMSK_FASTW::_0 => false, - ERRMSK_FASTW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _ERRMSK_FASTW<'a> { - w: &'a mut W, -} -impl<'a> _ERRMSK_FASTW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: ERRMSK_FASTW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "ERRINT_FAST Error interrupt disabled."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(ERRMSK_FASTW::_0) - } - #[doc = "ERRINT_FAST Error interrupt enabled."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(ERRMSK_FASTW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 31; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bit 11 - Edge Filter Disable"] - #[inline] - pub fn edfltdis(&self) -> EDFLTDISR { - EDFLTDISR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 11; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 12 - ISO CAN FD Enable"] - #[inline] - pub fn isocanfden(&self) -> ISOCANFDENR { - ISOCANFDENR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 12; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 14 - Protocol Exception Enable"] - #[inline] - pub fn prexcen(&self) -> PREXCENR { - PREXCENR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 14; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 15 - Timer Source"] - #[inline] - pub fn timer_src(&self) -> TIMER_SRCR { - TIMER_SRCR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 15; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 16 - Entire Frame Arbitration Field Comparison Enable For Rx Mailboxes"] - #[inline] - pub fn eacen(&self) -> EACENR { - EACENR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 16; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 17 - Remote Request Storing"] - #[inline] - pub fn rrs(&self) -> RRSR { - RRSR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 17; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 18 - Mailboxes Reception Priority"] - #[inline] - pub fn mrp(&self) -> MRPR { - MRPR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 18; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bits 19:23 - Tx Arbitration Start Delay"] - #[inline] - pub fn tasd(&self) -> TASDR { - let bits = { - const MASK: u8 = 31; - const OFFSET: u8 = 19; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - TASDR { bits } - } - #[doc = "Bits 24:27 - Number Of Rx FIFO Filters"] - #[inline] - pub fn rffn(&self) -> RFFNR { - let bits = { - const MASK: u8 = 15; - const OFFSET: u8 = 24; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - RFFNR { bits } - } - #[doc = "Bit 30 - Bus Off Done Interrupt Mask"] - #[inline] - pub fn boffdonemsk(&self) -> BOFFDONEMSKR { - BOFFDONEMSKR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 30; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 31 - Error Interrupt Mask for errors detected in the Data Phase of fast CAN FD frames"] - #[inline] - pub fn errmsk_fast(&self) -> ERRMSK_FASTR { - ERRMSK_FASTR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 31; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 10485760 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bit 11 - Edge Filter Disable"] - #[inline] - pub fn edfltdis(&mut self) -> _EDFLTDISW { - _EDFLTDISW { w: self } - } - #[doc = "Bit 12 - ISO CAN FD Enable"] - #[inline] - pub fn isocanfden(&mut self) -> _ISOCANFDENW { - _ISOCANFDENW { w: self } - } - #[doc = "Bit 14 - Protocol Exception Enable"] - #[inline] - pub fn prexcen(&mut self) -> _PREXCENW { - _PREXCENW { w: self } - } - #[doc = "Bit 15 - Timer Source"] - #[inline] - pub fn timer_src(&mut self) -> _TIMER_SRCW { - _TIMER_SRCW { w: self } - } - #[doc = "Bit 16 - Entire Frame Arbitration Field Comparison Enable For Rx Mailboxes"] - #[inline] - pub fn eacen(&mut self) -> _EACENW { - _EACENW { w: self } - } - #[doc = "Bit 17 - Remote Request Storing"] - #[inline] - pub fn rrs(&mut self) -> _RRSW { - _RRSW { w: self } - } - #[doc = "Bit 18 - Mailboxes Reception Priority"] - #[inline] - pub fn mrp(&mut self) -> _MRPW { - _MRPW { w: self } - } - #[doc = "Bits 19:23 - Tx Arbitration Start Delay"] - #[inline] - pub fn tasd(&mut self) -> _TASDW { - _TASDW { w: self } - } - #[doc = "Bits 24:27 - Number Of Rx FIFO Filters"] - #[inline] - pub fn rffn(&mut self) -> _RFFNW { - _RFFNW { w: self } - } - #[doc = "Bit 30 - Bus Off Done Interrupt Mask"] - #[inline] - pub fn boffdonemsk(&mut self) -> _BOFFDONEMSKW { - _BOFFDONEMSKW { w: self } - } - #[doc = "Bit 31 - Error Interrupt Mask for errors detected in the Data Phase of fast CAN FD frames"] - #[inline] - pub fn errmsk_fast(&mut self) -> _ERRMSK_FASTW { - _ERRMSK_FASTW { w: self } - } -} diff --git a/src/can2/ctrl2_pn/mod.rs b/src/can2/ctrl2_pn/mod.rs deleted file mode 100644 index 7831ff2..0000000 --- a/src/can2/ctrl2_pn/mod.rs +++ /dev/null @@ -1,105 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::CTRL2_PN { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = r" Value of the field"] -pub struct MATCHTOR { - bits: u16, -} -impl MATCHTOR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u16 { - self.bits - } -} -#[doc = r" Proxy"] -pub struct _MATCHTOW<'a> { - w: &'a mut W, -} -impl<'a> _MATCHTOW<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u16) -> &'a mut W { - const MASK: u16 = 65535; - const OFFSET: u8 = 0; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:15 - Timeout for No Message Matching the Filtering Criteria"] - #[inline] - pub fn matchto(&self) -> MATCHTOR { - let bits = { - const MASK: u16 = 65535; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u16 - }; - MATCHTOR { bits } - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 0 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bits 0:15 - Timeout for No Message Matching the Filtering Criteria"] - #[inline] - pub fn matchto(&mut self) -> _MATCHTOW { - _MATCHTOW { w: self } - } -} diff --git a/src/can2/ecr/mod.rs b/src/can2/ecr/mod.rs deleted file mode 100644 index 22c7322..0000000 --- a/src/can2/ecr/mod.rs +++ /dev/null @@ -1,228 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::ECR { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = r" Value of the field"] -pub struct TXERRCNTR { - bits: u8, -} -impl TXERRCNTR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct RXERRCNTR { - bits: u8, -} -impl RXERRCNTR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct TXERRCNT_FASTR { - bits: u8, -} -impl TXERRCNT_FASTR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct RXERRCNT_FASTR { - bits: u8, -} -impl RXERRCNT_FASTR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Proxy"] -pub struct _TXERRCNTW<'a> { - w: &'a mut W, -} -impl<'a> _TXERRCNTW<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 255; - const OFFSET: u8 = 0; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = r" Proxy"] -pub struct _RXERRCNTW<'a> { - w: &'a mut W, -} -impl<'a> _RXERRCNTW<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 255; - const OFFSET: u8 = 8; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = r" Proxy"] -pub struct _TXERRCNT_FASTW<'a> { - w: &'a mut W, -} -impl<'a> _TXERRCNT_FASTW<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 255; - const OFFSET: u8 = 16; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = r" Proxy"] -pub struct _RXERRCNT_FASTW<'a> { - w: &'a mut W, -} -impl<'a> _RXERRCNT_FASTW<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 255; - const OFFSET: u8 = 24; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:7 - Transmit Error Counter"] - #[inline] - pub fn txerrcnt(&self) -> TXERRCNTR { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - TXERRCNTR { bits } - } - #[doc = "Bits 8:15 - Receive Error Counter"] - #[inline] - pub fn rxerrcnt(&self) -> RXERRCNTR { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 8; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - RXERRCNTR { bits } - } - #[doc = "Bits 16:23 - Transmit Error Counter for fast bits"] - #[inline] - pub fn txerrcnt_fast(&self) -> TXERRCNT_FASTR { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 16; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - TXERRCNT_FASTR { bits } - } - #[doc = "Bits 24:31 - Receive Error Counter for fast bits"] - #[inline] - pub fn rxerrcnt_fast(&self) -> RXERRCNT_FASTR { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 24; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - RXERRCNT_FASTR { bits } - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 0 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bits 0:7 - Transmit Error Counter"] - #[inline] - pub fn txerrcnt(&mut self) -> _TXERRCNTW { - _TXERRCNTW { w: self } - } - #[doc = "Bits 8:15 - Receive Error Counter"] - #[inline] - pub fn rxerrcnt(&mut self) -> _RXERRCNTW { - _RXERRCNTW { w: self } - } - #[doc = "Bits 16:23 - Transmit Error Counter for fast bits"] - #[inline] - pub fn txerrcnt_fast(&mut self) -> _TXERRCNT_FASTW { - _TXERRCNT_FASTW { w: self } - } - #[doc = "Bits 24:31 - Receive Error Counter for fast bits"] - #[inline] - pub fn rxerrcnt_fast(&mut self) -> _RXERRCNT_FASTW { - _RXERRCNT_FASTW { w: self } - } -} diff --git a/src/can2/embedded_ram/mod.rs b/src/can2/embedded_ram/mod.rs deleted file mode 100644 index 5fe0f4f..0000000 --- a/src/can2/embedded_ram/mod.rs +++ /dev/null @@ -1,228 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::EMBEDDEDRAM { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_3R { - bits: u8, -} -impl DATA_BYTE_3R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_2R { - bits: u8, -} -impl DATA_BYTE_2R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_1R { - bits: u8, -} -impl DATA_BYTE_1R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_0R { - bits: u8, -} -impl DATA_BYTE_0R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Proxy"] -pub struct _DATA_BYTE_3W<'a> { - w: &'a mut W, -} -impl<'a> _DATA_BYTE_3W<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 255; - const OFFSET: u8 = 0; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = r" Proxy"] -pub struct _DATA_BYTE_2W<'a> { - w: &'a mut W, -} -impl<'a> _DATA_BYTE_2W<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 255; - const OFFSET: u8 = 8; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = r" Proxy"] -pub struct _DATA_BYTE_1W<'a> { - w: &'a mut W, -} -impl<'a> _DATA_BYTE_1W<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 255; - const OFFSET: u8 = 16; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = r" Proxy"] -pub struct _DATA_BYTE_0W<'a> { - w: &'a mut W, -} -impl<'a> _DATA_BYTE_0W<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 255; - const OFFSET: u8 = 24; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:7 - Data byte 3 of Rx/Tx frame."] - #[inline] - pub fn data_byte_3(&self) -> DATA_BYTE_3R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_3R { bits } - } - #[doc = "Bits 8:15 - Data byte 2 of Rx/Tx frame."] - #[inline] - pub fn data_byte_2(&self) -> DATA_BYTE_2R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 8; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_2R { bits } - } - #[doc = "Bits 16:23 - Data byte 1 of Rx/Tx frame."] - #[inline] - pub fn data_byte_1(&self) -> DATA_BYTE_1R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 16; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_1R { bits } - } - #[doc = "Bits 24:31 - Data byte 0 of Rx/Tx frame."] - #[inline] - pub fn data_byte_0(&self) -> DATA_BYTE_0R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 24; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_0R { bits } - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 0 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bits 0:7 - Data byte 3 of Rx/Tx frame."] - #[inline] - pub fn data_byte_3(&mut self) -> _DATA_BYTE_3W { - _DATA_BYTE_3W { w: self } - } - #[doc = "Bits 8:15 - Data byte 2 of Rx/Tx frame."] - #[inline] - pub fn data_byte_2(&mut self) -> _DATA_BYTE_2W { - _DATA_BYTE_2W { w: self } - } - #[doc = "Bits 16:23 - Data byte 1 of Rx/Tx frame."] - #[inline] - pub fn data_byte_1(&mut self) -> _DATA_BYTE_1W { - _DATA_BYTE_1W { w: self } - } - #[doc = "Bits 24:31 - Data byte 0 of Rx/Tx frame."] - #[inline] - pub fn data_byte_0(&mut self) -> _DATA_BYTE_0W { - _DATA_BYTE_0W { w: self } - } -} diff --git a/src/can2/esr1/mod.rs b/src/can2/esr1/mod.rs deleted file mode 100644 index 4798194..0000000 --- a/src/can2/esr1/mod.rs +++ /dev/null @@ -1,1848 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::ESR1 { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = "Possible values of the field `ERRINT`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum ERRINTR { - #[doc = "No such occurrence."] _0, - #[doc = "Indicates setting of any Error Bit in the Error and Status Register."] _1, -} -impl ERRINTR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - ERRINTR::_0 => false, - ERRINTR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> ERRINTR { - match value { - false => ERRINTR::_0, - true => ERRINTR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == ERRINTR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == ERRINTR::_1 - } -} -#[doc = "Possible values of the field `BOFFINT`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum BOFFINTR { - #[doc = "No such occurrence."] _0, - #[doc = "FlexCAN module entered Bus Off state."] _1, -} -impl BOFFINTR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - BOFFINTR::_0 => false, - BOFFINTR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> BOFFINTR { - match value { - false => BOFFINTR::_0, - true => BOFFINTR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == BOFFINTR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == BOFFINTR::_1 - } -} -#[doc = "Possible values of the field `RX`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum RXR { - #[doc = "FlexCAN is not receiving a message."] _0, - #[doc = "FlexCAN is receiving a message."] _1, -} -impl RXR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - RXR::_0 => false, - RXR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> RXR { - match value { - false => RXR::_0, - true => RXR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == RXR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == RXR::_1 - } -} -#[doc = "Possible values of the field `FLTCONF`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum FLTCONFR { - #[doc = "Error Active"] _00, - #[doc = "Error Passive"] _01, - #[doc = "Bus Off"] _1X, - #[doc = r" Reserved"] _Reserved(u8), -} -impl FLTCONFR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - match *self { - FLTCONFR::_00 => 0, - FLTCONFR::_01 => 1, - FLTCONFR::_1X => 2, - FLTCONFR::_Reserved(bits) => bits, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: u8) -> FLTCONFR { - match value { - 0 => FLTCONFR::_00, - 1 => FLTCONFR::_01, - 2 => FLTCONFR::_1X, - i => FLTCONFR::_Reserved(i), - } - } - #[doc = "Checks if the value of the field is `_00`"] - #[inline] - pub fn is_00(&self) -> bool { - *self == FLTCONFR::_00 - } - #[doc = "Checks if the value of the field is `_01`"] - #[inline] - pub fn is_01(&self) -> bool { - *self == FLTCONFR::_01 - } - #[doc = "Checks if the value of the field is `_1X`"] - #[inline] - pub fn is_1x(&self) -> bool { - *self == FLTCONFR::_1X - } -} -#[doc = "Possible values of the field `TX`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum TXR { - #[doc = "FlexCAN is not transmitting a message."] _0, - #[doc = "FlexCAN is transmitting a message."] _1, -} -impl TXR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - TXR::_0 => false, - TXR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> TXR { - match value { - false => TXR::_0, - true => TXR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == TXR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == TXR::_1 - } -} -#[doc = "Possible values of the field `IDLE`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum IDLER { - #[doc = "No such occurrence."] _0, - #[doc = "CAN bus is now IDLE."] _1, -} -impl IDLER { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - IDLER::_0 => false, - IDLER::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> IDLER { - match value { - false => IDLER::_0, - true => IDLER::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == IDLER::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == IDLER::_1 - } -} -#[doc = "Possible values of the field `RXWRN`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum RXWRNR { - #[doc = "No such occurrence."] _0, - #[doc = "RXERRCNT is greater than or equal to 96."] _1, -} -impl RXWRNR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - RXWRNR::_0 => false, - RXWRNR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> RXWRNR { - match value { - false => RXWRNR::_0, - true => RXWRNR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == RXWRNR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == RXWRNR::_1 - } -} -#[doc = "Possible values of the field `TXWRN`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum TXWRNR { - #[doc = "No such occurrence."] _0, - #[doc = "TXERRCNT is greater than or equal to 96."] _1, -} -impl TXWRNR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - TXWRNR::_0 => false, - TXWRNR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> TXWRNR { - match value { - false => TXWRNR::_0, - true => TXWRNR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == TXWRNR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == TXWRNR::_1 - } -} -#[doc = "Possible values of the field `STFERR`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum STFERRR { - #[doc = "No such occurrence."] _0, - #[doc = "A Stuffing Error occurred since last read of this register."] _1, -} -impl STFERRR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - STFERRR::_0 => false, - STFERRR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> STFERRR { - match value { - false => STFERRR::_0, - true => STFERRR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == STFERRR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == STFERRR::_1 - } -} -#[doc = "Possible values of the field `FRMERR`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum FRMERRR { - #[doc = "No such occurrence."] _0, - #[doc = "A Form Error occurred since last read of this register."] _1, -} -impl FRMERRR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - FRMERRR::_0 => false, - FRMERRR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> FRMERRR { - match value { - false => FRMERRR::_0, - true => FRMERRR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == FRMERRR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == FRMERRR::_1 - } -} -#[doc = "Possible values of the field `CRCERR`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum CRCERRR { - #[doc = "No such occurrence."] _0, - #[doc = "A CRC error occurred since last read of this register."] _1, -} -impl CRCERRR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - CRCERRR::_0 => false, - CRCERRR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> CRCERRR { - match value { - false => CRCERRR::_0, - true => CRCERRR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == CRCERRR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == CRCERRR::_1 - } -} -#[doc = "Possible values of the field `ACKERR`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum ACKERRR { - #[doc = "No such occurrence."] _0, - #[doc = "An ACK error occurred since last read of this register."] _1, -} -impl ACKERRR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - ACKERRR::_0 => false, - ACKERRR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> ACKERRR { - match value { - false => ACKERRR::_0, - true => ACKERRR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == ACKERRR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == ACKERRR::_1 - } -} -#[doc = "Possible values of the field `BIT0ERR`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum BIT0ERRR { - #[doc = "No such occurrence."] _0, - #[doc = "At least one bit sent as dominant is received as recessive."] _1, -} -impl BIT0ERRR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - BIT0ERRR::_0 => false, - BIT0ERRR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> BIT0ERRR { - match value { - false => BIT0ERRR::_0, - true => BIT0ERRR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == BIT0ERRR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == BIT0ERRR::_1 - } -} -#[doc = "Possible values of the field `BIT1ERR`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum BIT1ERRR { - #[doc = "No such occurrence."] _0, - #[doc = "At least one bit sent as recessive is received as dominant."] _1, -} -impl BIT1ERRR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - BIT1ERRR::_0 => false, - BIT1ERRR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> BIT1ERRR { - match value { - false => BIT1ERRR::_0, - true => BIT1ERRR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == BIT1ERRR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == BIT1ERRR::_1 - } -} -#[doc = "Possible values of the field `RWRNINT`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum RWRNINTR { - #[doc = "No such occurrence."] _0, - #[doc = "The Rx error counter transitioned from less than 96 to greater than or equal to 96."] - _1, -} -impl RWRNINTR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - RWRNINTR::_0 => false, - RWRNINTR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> RWRNINTR { - match value { - false => RWRNINTR::_0, - true => RWRNINTR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == RWRNINTR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == RWRNINTR::_1 - } -} -#[doc = "Possible values of the field `TWRNINT`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum TWRNINTR { - #[doc = "No such occurrence."] _0, - #[doc = "The Tx error counter transitioned from less than 96 to greater than or equal to 96."] - _1, -} -impl TWRNINTR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - TWRNINTR::_0 => false, - TWRNINTR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> TWRNINTR { - match value { - false => TWRNINTR::_0, - true => TWRNINTR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == TWRNINTR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == TWRNINTR::_1 - } -} -#[doc = "Possible values of the field `SYNCH`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum SYNCHR { - #[doc = "FlexCAN is not synchronized to the CAN bus."] _0, - #[doc = "FlexCAN is synchronized to the CAN bus."] _1, -} -impl SYNCHR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - SYNCHR::_0 => false, - SYNCHR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> SYNCHR { - match value { - false => SYNCHR::_0, - true => SYNCHR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == SYNCHR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == SYNCHR::_1 - } -} -#[doc = "Possible values of the field `BOFFDONEINT`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum BOFFDONEINTR { - #[doc = "No such occurrence."] _0, - #[doc = "FlexCAN module has completed Bus Off process."] _1, -} -impl BOFFDONEINTR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - BOFFDONEINTR::_0 => false, - BOFFDONEINTR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> BOFFDONEINTR { - match value { - false => BOFFDONEINTR::_0, - true => BOFFDONEINTR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == BOFFDONEINTR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == BOFFDONEINTR::_1 - } -} -#[doc = "Possible values of the field `ERRINT_FAST`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum ERRINT_FASTR { - #[doc = "No such occurrence."] _0, - #[doc = "Indicates setting of any Error Bit detected in the Data Phase of CAN FD frames with the BRS bit set."] - _1, -} -impl ERRINT_FASTR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - ERRINT_FASTR::_0 => false, - ERRINT_FASTR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> ERRINT_FASTR { - match value { - false => ERRINT_FASTR::_0, - true => ERRINT_FASTR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == ERRINT_FASTR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == ERRINT_FASTR::_1 - } -} -#[doc = "Possible values of the field `ERROVR`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum ERROVRR { - #[doc = "Overrun has not occurred."] _0, - #[doc = "Overrun has occurred."] _1, -} -impl ERROVRR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - ERROVRR::_0 => false, - ERROVRR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> ERROVRR { - match value { - false => ERROVRR::_0, - true => ERROVRR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == ERROVRR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == ERROVRR::_1 - } -} -#[doc = "Possible values of the field `STFERR_FAST`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum STFERR_FASTR { - #[doc = "No such occurrence."] _0, - #[doc = "A Stuffing Error occurred since last read of this register."] _1, -} -impl STFERR_FASTR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - STFERR_FASTR::_0 => false, - STFERR_FASTR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> STFERR_FASTR { - match value { - false => STFERR_FASTR::_0, - true => STFERR_FASTR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == STFERR_FASTR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == STFERR_FASTR::_1 - } -} -#[doc = "Possible values of the field `FRMERR_FAST`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum FRMERR_FASTR { - #[doc = "No such occurrence."] _0, - #[doc = "A Form Error occurred since last read of this register."] _1, -} -impl FRMERR_FASTR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - FRMERR_FASTR::_0 => false, - FRMERR_FASTR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> FRMERR_FASTR { - match value { - false => FRMERR_FASTR::_0, - true => FRMERR_FASTR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == FRMERR_FASTR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == FRMERR_FASTR::_1 - } -} -#[doc = "Possible values of the field `CRCERR_FAST`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum CRCERR_FASTR { - #[doc = "No such occurrence."] _0, - #[doc = "A CRC error occurred since last read of this register."] _1, -} -impl CRCERR_FASTR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - CRCERR_FASTR::_0 => false, - CRCERR_FASTR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> CRCERR_FASTR { - match value { - false => CRCERR_FASTR::_0, - true => CRCERR_FASTR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == CRCERR_FASTR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == CRCERR_FASTR::_1 - } -} -#[doc = "Possible values of the field `BIT0ERR_FAST`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum BIT0ERR_FASTR { - #[doc = "No such occurrence."] _0, - #[doc = "At least one bit sent as dominant is received as recessive."] _1, -} -impl BIT0ERR_FASTR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - BIT0ERR_FASTR::_0 => false, - BIT0ERR_FASTR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> BIT0ERR_FASTR { - match value { - false => BIT0ERR_FASTR::_0, - true => BIT0ERR_FASTR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == BIT0ERR_FASTR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == BIT0ERR_FASTR::_1 - } -} -#[doc = "Possible values of the field `BIT1ERR_FAST`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum BIT1ERR_FASTR { - #[doc = "No such occurrence."] _0, - #[doc = "At least one bit sent as recessive is received as dominant."] _1, -} -impl BIT1ERR_FASTR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - BIT1ERR_FASTR::_0 => false, - BIT1ERR_FASTR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> BIT1ERR_FASTR { - match value { - false => BIT1ERR_FASTR::_0, - true => BIT1ERR_FASTR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == BIT1ERR_FASTR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == BIT1ERR_FASTR::_1 - } -} -#[doc = "Values that can be written to the field `ERRINT`"] -pub enum ERRINTW { - #[doc = "No such occurrence."] _0, - #[doc = "Indicates setting of any Error Bit in the Error and Status Register."] _1, -} -impl ERRINTW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - ERRINTW::_0 => false, - ERRINTW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _ERRINTW<'a> { - w: &'a mut W, -} -impl<'a> _ERRINTW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: ERRINTW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "No such occurrence."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(ERRINTW::_0) - } - #[doc = "Indicates setting of any Error Bit in the Error and Status Register."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(ERRINTW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 1; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `BOFFINT`"] -pub enum BOFFINTW { - #[doc = "No such occurrence."] _0, - #[doc = "FlexCAN module entered Bus Off state."] _1, -} -impl BOFFINTW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - BOFFINTW::_0 => false, - BOFFINTW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _BOFFINTW<'a> { - w: &'a mut W, -} -impl<'a> _BOFFINTW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: BOFFINTW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "No such occurrence."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(BOFFINTW::_0) - } - #[doc = "FlexCAN module entered Bus Off state."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(BOFFINTW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 2; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `RWRNINT`"] -pub enum RWRNINTW { - #[doc = "No such occurrence."] _0, - #[doc = "The Rx error counter transitioned from less than 96 to greater than or equal to 96."] - _1, -} -impl RWRNINTW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - RWRNINTW::_0 => false, - RWRNINTW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _RWRNINTW<'a> { - w: &'a mut W, -} -impl<'a> _RWRNINTW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: RWRNINTW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "No such occurrence."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(RWRNINTW::_0) - } - #[doc = "The Rx error counter transitioned from less than 96 to greater than or equal to 96."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(RWRNINTW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 16; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `TWRNINT`"] -pub enum TWRNINTW { - #[doc = "No such occurrence."] _0, - #[doc = "The Tx error counter transitioned from less than 96 to greater than or equal to 96."] - _1, -} -impl TWRNINTW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - TWRNINTW::_0 => false, - TWRNINTW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _TWRNINTW<'a> { - w: &'a mut W, -} -impl<'a> _TWRNINTW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: TWRNINTW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "No such occurrence."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(TWRNINTW::_0) - } - #[doc = "The Tx error counter transitioned from less than 96 to greater than or equal to 96."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(TWRNINTW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 17; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `BOFFDONEINT`"] -pub enum BOFFDONEINTW { - #[doc = "No such occurrence."] _0, - #[doc = "FlexCAN module has completed Bus Off process."] _1, -} -impl BOFFDONEINTW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - BOFFDONEINTW::_0 => false, - BOFFDONEINTW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _BOFFDONEINTW<'a> { - w: &'a mut W, -} -impl<'a> _BOFFDONEINTW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: BOFFDONEINTW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "No such occurrence."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(BOFFDONEINTW::_0) - } - #[doc = "FlexCAN module has completed Bus Off process."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(BOFFDONEINTW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 19; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `ERRINT_FAST`"] -pub enum ERRINT_FASTW { - #[doc = "No such occurrence."] _0, - #[doc = "Indicates setting of any Error Bit detected in the Data Phase of CAN FD frames with the BRS bit set."] - _1, -} -impl ERRINT_FASTW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - ERRINT_FASTW::_0 => false, - ERRINT_FASTW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _ERRINT_FASTW<'a> { - w: &'a mut W, -} -impl<'a> _ERRINT_FASTW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: ERRINT_FASTW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "No such occurrence."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(ERRINT_FASTW::_0) - } - #[doc = "Indicates setting of any Error Bit detected in the Data Phase of CAN FD frames with the BRS bit set."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(ERRINT_FASTW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 20; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `ERROVR`"] -pub enum ERROVRW { - #[doc = "Overrun has not occurred."] _0, - #[doc = "Overrun has occurred."] _1, -} -impl ERROVRW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - ERROVRW::_0 => false, - ERROVRW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _ERROVRW<'a> { - w: &'a mut W, -} -impl<'a> _ERROVRW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: ERROVRW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Overrun has not occurred."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(ERROVRW::_0) - } - #[doc = "Overrun has occurred."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(ERROVRW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 21; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bit 1 - Error Interrupt"] - #[inline] - pub fn errint(&self) -> ERRINTR { - ERRINTR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 1; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 2 - Bus Off Interrupt"] - #[inline] - pub fn boffint(&self) -> BOFFINTR { - BOFFINTR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 2; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 3 - FlexCAN In Reception"] - #[inline] - pub fn rx(&self) -> RXR { - RXR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 3; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bits 4:5 - Fault Confinement State"] - #[inline] - pub fn fltconf(&self) -> FLTCONFR { - FLTCONFR::_from({ - const MASK: u8 = 3; - const OFFSET: u8 = 4; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }) - } - #[doc = "Bit 6 - FlexCAN In Transmission"] - #[inline] - pub fn tx(&self) -> TXR { - TXR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 6; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 7 - IDLE"] - #[inline] - pub fn idle(&self) -> IDLER { - IDLER::_from({ - const MASK: bool = true; - const OFFSET: u8 = 7; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 8 - Rx Error Warning"] - #[inline] - pub fn rxwrn(&self) -> RXWRNR { - RXWRNR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 8; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 9 - TX Error Warning"] - #[inline] - pub fn txwrn(&self) -> TXWRNR { - TXWRNR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 9; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 10 - Stuffing Error"] - #[inline] - pub fn stferr(&self) -> STFERRR { - STFERRR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 10; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 11 - Form Error"] - #[inline] - pub fn frmerr(&self) -> FRMERRR { - FRMERRR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 11; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 12 - Cyclic Redundancy Check Error"] - #[inline] - pub fn crcerr(&self) -> CRCERRR { - CRCERRR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 12; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 13 - Acknowledge Error"] - #[inline] - pub fn ackerr(&self) -> ACKERRR { - ACKERRR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 13; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 14 - Bit0 Error"] - #[inline] - pub fn bit0err(&self) -> BIT0ERRR { - BIT0ERRR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 14; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 15 - Bit1 Error"] - #[inline] - pub fn bit1err(&self) -> BIT1ERRR { - BIT1ERRR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 15; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 16 - Rx Warning Interrupt Flag"] - #[inline] - pub fn rwrnint(&self) -> RWRNINTR { - RWRNINTR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 16; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 17 - Tx Warning Interrupt Flag"] - #[inline] - pub fn twrnint(&self) -> TWRNINTR { - TWRNINTR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 17; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 18 - CAN Synchronization Status"] - #[inline] - pub fn synch(&self) -> SYNCHR { - SYNCHR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 18; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 19 - Bus Off Done Interrupt"] - #[inline] - pub fn boffdoneint(&self) -> BOFFDONEINTR { - BOFFDONEINTR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 19; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 20 - Error Interrupt for errors detected in the Data Phase of CAN FD frames with the BRS bit set"] - #[inline] - pub fn errint_fast(&self) -> ERRINT_FASTR { - ERRINT_FASTR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 20; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 21 - Error Overrun bit"] - #[inline] - pub fn errovr(&self) -> ERROVRR { - ERROVRR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 21; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 26 - Stuffing Error in the Data Phase of CAN FD frames with the BRS bit set"] - #[inline] - pub fn stferr_fast(&self) -> STFERR_FASTR { - STFERR_FASTR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 26; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 27 - Form Error in the Data Phase of CAN FD frames with the BRS bit set"] - #[inline] - pub fn frmerr_fast(&self) -> FRMERR_FASTR { - FRMERR_FASTR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 27; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 28 - Cyclic Redundancy Check Error in the CRC field of CAN FD frames with the BRS bit set"] - #[inline] - pub fn crcerr_fast(&self) -> CRCERR_FASTR { - CRCERR_FASTR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 28; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 30 - Bit0 Error in the Data Phase of CAN FD frames with the BRS bit set"] - #[inline] - pub fn bit0err_fast(&self) -> BIT0ERR_FASTR { - BIT0ERR_FASTR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 30; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 31 - Bit1 Error in the Data Phase of CAN FD frames with the BRS bit set"] - #[inline] - pub fn bit1err_fast(&self) -> BIT1ERR_FASTR { - BIT1ERR_FASTR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 31; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 0 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bit 1 - Error Interrupt"] - #[inline] - pub fn errint(&mut self) -> _ERRINTW { - _ERRINTW { w: self } - } - #[doc = "Bit 2 - Bus Off Interrupt"] - #[inline] - pub fn boffint(&mut self) -> _BOFFINTW { - _BOFFINTW { w: self } - } - #[doc = "Bit 16 - Rx Warning Interrupt Flag"] - #[inline] - pub fn rwrnint(&mut self) -> _RWRNINTW { - _RWRNINTW { w: self } - } - #[doc = "Bit 17 - Tx Warning Interrupt Flag"] - #[inline] - pub fn twrnint(&mut self) -> _TWRNINTW { - _TWRNINTW { w: self } - } - #[doc = "Bit 19 - Bus Off Done Interrupt"] - #[inline] - pub fn boffdoneint(&mut self) -> _BOFFDONEINTW { - _BOFFDONEINTW { w: self } - } - #[doc = "Bit 20 - Error Interrupt for errors detected in the Data Phase of CAN FD frames with the BRS bit set"] - #[inline] - pub fn errint_fast(&mut self) -> _ERRINT_FASTW { - _ERRINT_FASTW { w: self } - } - #[doc = "Bit 21 - Error Overrun bit"] - #[inline] - pub fn errovr(&mut self) -> _ERROVRW { - _ERROVRW { w: self } - } -} diff --git a/src/can2/esr2/mod.rs b/src/can2/esr2/mod.rs deleted file mode 100644 index 8f2635b..0000000 --- a/src/can2/esr2/mod.rs +++ /dev/null @@ -1,150 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -impl super::ESR2 { - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } -} -#[doc = "Possible values of the field `IMB`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum IMBR { - #[doc = "If ESR2[VPS] is asserted, the ESR2[LPTM] is not an inactive Mailbox."] _0, - #[doc = "If ESR2[VPS] is asserted, there is at least one inactive Mailbox. LPTM content is the number of the first one."] - _1, -} -impl IMBR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - IMBR::_0 => false, - IMBR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> IMBR { - match value { - false => IMBR::_0, - true => IMBR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == IMBR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == IMBR::_1 - } -} -#[doc = "Possible values of the field `VPS`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum VPSR { - #[doc = "Contents of IMB and LPTM are invalid."] _0, - #[doc = "Contents of IMB and LPTM are valid."] _1, -} -impl VPSR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - VPSR::_0 => false, - VPSR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> VPSR { - match value { - false => VPSR::_0, - true => VPSR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == VPSR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == VPSR::_1 - } -} -#[doc = r" Value of the field"] -pub struct LPTMR { - bits: u8, -} -impl LPTMR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bit 13 - Inactive Mailbox"] - #[inline] - pub fn imb(&self) -> IMBR { - IMBR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 13; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 14 - Valid Priority Status"] - #[inline] - pub fn vps(&self) -> VPSR { - VPSR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 14; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bits 16:22 - Lowest Priority Tx Mailbox"] - #[inline] - pub fn lptm(&self) -> LPTMR { - let bits = { - const MASK: u8 = 127; - const OFFSET: u8 = 16; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - LPTMR { bits } - } -} diff --git a/src/can2/fdcbt/mod.rs b/src/can2/fdcbt/mod.rs deleted file mode 100644 index 0ddab6e..0000000 --- a/src/can2/fdcbt/mod.rs +++ /dev/null @@ -1,269 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::FDCBT { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = r" Value of the field"] -pub struct FPSEG2R { - bits: u8, -} -impl FPSEG2R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct FPSEG1R { - bits: u8, -} -impl FPSEG1R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct FPROPSEGR { - bits: u8, -} -impl FPROPSEGR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct FRJWR { - bits: u8, -} -impl FRJWR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct FPRESDIVR { - bits: u16, -} -impl FPRESDIVR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u16 { - self.bits - } -} -#[doc = r" Proxy"] -pub struct _FPSEG2W<'a> { - w: &'a mut W, -} -impl<'a> _FPSEG2W<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 7; - const OFFSET: u8 = 0; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = r" Proxy"] -pub struct _FPSEG1W<'a> { - w: &'a mut W, -} -impl<'a> _FPSEG1W<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 7; - const OFFSET: u8 = 5; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = r" Proxy"] -pub struct _FPROPSEGW<'a> { - w: &'a mut W, -} -impl<'a> _FPROPSEGW<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 31; - const OFFSET: u8 = 10; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = r" Proxy"] -pub struct _FRJWW<'a> { - w: &'a mut W, -} -impl<'a> _FRJWW<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 7; - const OFFSET: u8 = 16; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = r" Proxy"] -pub struct _FPRESDIVW<'a> { - w: &'a mut W, -} -impl<'a> _FPRESDIVW<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u16) -> &'a mut W { - const MASK: u16 = 1023; - const OFFSET: u8 = 20; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:2 - Fast Phase Segment 2"] - #[inline] - pub fn fpseg2(&self) -> FPSEG2R { - let bits = { - const MASK: u8 = 7; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - FPSEG2R { bits } - } - #[doc = "Bits 5:7 - Fast Phase Segment 1"] - #[inline] - pub fn fpseg1(&self) -> FPSEG1R { - let bits = { - const MASK: u8 = 7; - const OFFSET: u8 = 5; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - FPSEG1R { bits } - } - #[doc = "Bits 10:14 - Fast Propagation Segment"] - #[inline] - pub fn fpropseg(&self) -> FPROPSEGR { - let bits = { - const MASK: u8 = 31; - const OFFSET: u8 = 10; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - FPROPSEGR { bits } - } - #[doc = "Bits 16:18 - Fast Resync Jump Width"] - #[inline] - pub fn frjw(&self) -> FRJWR { - let bits = { - const MASK: u8 = 7; - const OFFSET: u8 = 16; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - FRJWR { bits } - } - #[doc = "Bits 20:29 - Fast Prescaler Division Factor"] - #[inline] - pub fn fpresdiv(&self) -> FPRESDIVR { - let bits = { - const MASK: u16 = 1023; - const OFFSET: u8 = 20; - ((self.bits >> OFFSET) & MASK as u32) as u16 - }; - FPRESDIVR { bits } - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 0 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bits 0:2 - Fast Phase Segment 2"] - #[inline] - pub fn fpseg2(&mut self) -> _FPSEG2W { - _FPSEG2W { w: self } - } - #[doc = "Bits 5:7 - Fast Phase Segment 1"] - #[inline] - pub fn fpseg1(&mut self) -> _FPSEG1W { - _FPSEG1W { w: self } - } - #[doc = "Bits 10:14 - Fast Propagation Segment"] - #[inline] - pub fn fpropseg(&mut self) -> _FPROPSEGW { - _FPROPSEGW { w: self } - } - #[doc = "Bits 16:18 - Fast Resync Jump Width"] - #[inline] - pub fn frjw(&mut self) -> _FRJWW { - _FRJWW { w: self } - } - #[doc = "Bits 20:29 - Fast Prescaler Division Factor"] - #[inline] - pub fn fpresdiv(&mut self) -> _FPRESDIVW { - _FPRESDIVW { w: self } - } -} diff --git a/src/can2/fdcrc/mod.rs b/src/can2/fdcrc/mod.rs deleted file mode 100644 index d0da073..0000000 --- a/src/can2/fdcrc/mod.rs +++ /dev/null @@ -1,62 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -impl super::FDCRC { - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } -} -#[doc = r" Value of the field"] -pub struct FD_TXCRCR { - bits: u32, -} -impl FD_TXCRCR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct FD_MBCRCR { - bits: u8, -} -impl FD_MBCRCR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:20 - Extended Transmitted CRC value"] - #[inline] - pub fn fd_txcrc(&self) -> FD_TXCRCR { - let bits = { - const MASK: u32 = 2097151; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u32 - }; - FD_TXCRCR { bits } - } - #[doc = "Bits 24:30 - CRC Mailbox Number for FD_TXCRC"] - #[inline] - pub fn fd_mbcrc(&self) -> FD_MBCRCR { - let bits = { - const MASK: u8 = 127; - const OFFSET: u8 = 24; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - FD_MBCRCR { bits } - } -} diff --git a/src/can2/fdctrl/mod.rs b/src/can2/fdctrl/mod.rs deleted file mode 100644 index cf39ab2..0000000 --- a/src/can2/fdctrl/mod.rs +++ /dev/null @@ -1,599 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::FDCTRL { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = r" Value of the field"] -pub struct TDCVALR { - bits: u8, -} -impl TDCVALR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct TDCOFFR { - bits: u8, -} -impl TDCOFFR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = "Possible values of the field `TDCFAIL`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum TDCFAILR { - #[doc = "Measured loop delay is in range."] _0, - #[doc = "Measured loop delay is out of range."] _1, -} -impl TDCFAILR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - TDCFAILR::_0 => false, - TDCFAILR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> TDCFAILR { - match value { - false => TDCFAILR::_0, - true => TDCFAILR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == TDCFAILR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == TDCFAILR::_1 - } -} -#[doc = "Possible values of the field `TDCEN`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum TDCENR { - #[doc = "TDC is disabled"] _0, - #[doc = "TDC is enabled"] _1, -} -impl TDCENR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - TDCENR::_0 => false, - TDCENR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> TDCENR { - match value { - false => TDCENR::_0, - true => TDCENR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == TDCENR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == TDCENR::_1 - } -} -#[doc = "Possible values of the field `MBDSR0`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum MBDSR0R { - #[doc = "Selects 8 bytes per Message Buffer."] _00, - #[doc = "Selects 16 bytes per Message Buffer."] _01, - #[doc = "Selects 32 bytes per Message Buffer."] _10, - #[doc = "Selects 64 bytes per Message Buffer."] _11, -} -impl MBDSR0R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - match *self { - MBDSR0R::_00 => 0, - MBDSR0R::_01 => 1, - MBDSR0R::_10 => 2, - MBDSR0R::_11 => 3, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: u8) -> MBDSR0R { - match value { - 0 => MBDSR0R::_00, - 1 => MBDSR0R::_01, - 2 => MBDSR0R::_10, - 3 => MBDSR0R::_11, - _ => unreachable!(), - } - } - #[doc = "Checks if the value of the field is `_00`"] - #[inline] - pub fn is_00(&self) -> bool { - *self == MBDSR0R::_00 - } - #[doc = "Checks if the value of the field is `_01`"] - #[inline] - pub fn is_01(&self) -> bool { - *self == MBDSR0R::_01 - } - #[doc = "Checks if the value of the field is `_10`"] - #[inline] - pub fn is_10(&self) -> bool { - *self == MBDSR0R::_10 - } - #[doc = "Checks if the value of the field is `_11`"] - #[inline] - pub fn is_11(&self) -> bool { - *self == MBDSR0R::_11 - } -} -#[doc = "Possible values of the field `FDRATE`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum FDRATER { - #[doc = "Transmit a frame in nominal rate. The BRS bit in the Tx MB has no effect."] _0, - #[doc = "Transmit a frame with bit rate switching if the BRS bit in the Tx MB is recessive."] _1, -} -impl FDRATER { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - FDRATER::_0 => false, - FDRATER::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> FDRATER { - match value { - false => FDRATER::_0, - true => FDRATER::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == FDRATER::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == FDRATER::_1 - } -} -#[doc = r" Proxy"] -pub struct _TDCOFFW<'a> { - w: &'a mut W, -} -impl<'a> _TDCOFFW<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 31; - const OFFSET: u8 = 8; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `TDCFAIL`"] -pub enum TDCFAILW { - #[doc = "Measured loop delay is in range."] _0, - #[doc = "Measured loop delay is out of range."] _1, -} -impl TDCFAILW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - TDCFAILW::_0 => false, - TDCFAILW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _TDCFAILW<'a> { - w: &'a mut W, -} -impl<'a> _TDCFAILW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: TDCFAILW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Measured loop delay is in range."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(TDCFAILW::_0) - } - #[doc = "Measured loop delay is out of range."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(TDCFAILW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 14; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `TDCEN`"] -pub enum TDCENW { - #[doc = "TDC is disabled"] _0, - #[doc = "TDC is enabled"] _1, -} -impl TDCENW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - TDCENW::_0 => false, - TDCENW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _TDCENW<'a> { - w: &'a mut W, -} -impl<'a> _TDCENW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: TDCENW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "TDC is disabled"] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(TDCENW::_0) - } - #[doc = "TDC is enabled"] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(TDCENW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 15; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `MBDSR0`"] -pub enum MBDSR0W { - #[doc = "Selects 8 bytes per Message Buffer."] _00, - #[doc = "Selects 16 bytes per Message Buffer."] _01, - #[doc = "Selects 32 bytes per Message Buffer."] _10, - #[doc = "Selects 64 bytes per Message Buffer."] _11, -} -impl MBDSR0W { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> u8 { - match *self { - MBDSR0W::_00 => 0, - MBDSR0W::_01 => 1, - MBDSR0W::_10 => 2, - MBDSR0W::_11 => 3, - } - } -} -#[doc = r" Proxy"] -pub struct _MBDSR0W<'a> { - w: &'a mut W, -} -impl<'a> _MBDSR0W<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: MBDSR0W) -> &'a mut W { - { - self.bits(variant._bits()) - } - } - #[doc = "Selects 8 bytes per Message Buffer."] - #[inline] - pub fn _00(self) -> &'a mut W { - self.variant(MBDSR0W::_00) - } - #[doc = "Selects 16 bytes per Message Buffer."] - #[inline] - pub fn _01(self) -> &'a mut W { - self.variant(MBDSR0W::_01) - } - #[doc = "Selects 32 bytes per Message Buffer."] - #[inline] - pub fn _10(self) -> &'a mut W { - self.variant(MBDSR0W::_10) - } - #[doc = "Selects 64 bytes per Message Buffer."] - #[inline] - pub fn _11(self) -> &'a mut W { - self.variant(MBDSR0W::_11) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 3; - const OFFSET: u8 = 16; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `FDRATE`"] -pub enum FDRATEW { - #[doc = "Transmit a frame in nominal rate. The BRS bit in the Tx MB has no effect."] _0, - #[doc = "Transmit a frame with bit rate switching if the BRS bit in the Tx MB is recessive."] _1, -} -impl FDRATEW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - FDRATEW::_0 => false, - FDRATEW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _FDRATEW<'a> { - w: &'a mut W, -} -impl<'a> _FDRATEW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: FDRATEW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Transmit a frame in nominal rate. The BRS bit in the Tx MB has no effect."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(FDRATEW::_0) - } - #[doc = "Transmit a frame with bit rate switching if the BRS bit in the Tx MB is recessive."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(FDRATEW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 31; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:5 - Transceiver Delay Compensation Value"] - #[inline] - pub fn tdcval(&self) -> TDCVALR { - let bits = { - const MASK: u8 = 63; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - TDCVALR { bits } - } - #[doc = "Bits 8:12 - Transceiver Delay Compensation Offset"] - #[inline] - pub fn tdcoff(&self) -> TDCOFFR { - let bits = { - const MASK: u8 = 31; - const OFFSET: u8 = 8; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - TDCOFFR { bits } - } - #[doc = "Bit 14 - Transceiver Delay Compensation Fail"] - #[inline] - pub fn tdcfail(&self) -> TDCFAILR { - TDCFAILR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 14; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 15 - Transceiver Delay Compensation Enable"] - #[inline] - pub fn tdcen(&self) -> TDCENR { - TDCENR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 15; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bits 16:17 - Message Buffer Data Size for Region 0"] - #[inline] - pub fn mbdsr0(&self) -> MBDSR0R { - MBDSR0R::_from({ - const MASK: u8 = 3; - const OFFSET: u8 = 16; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }) - } - #[doc = "Bit 31 - Bit Rate Switch Enable"] - #[inline] - pub fn fdrate(&self) -> FDRATER { - FDRATER::_from({ - const MASK: bool = true; - const OFFSET: u8 = 31; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 2147483904 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bits 8:12 - Transceiver Delay Compensation Offset"] - #[inline] - pub fn tdcoff(&mut self) -> _TDCOFFW { - _TDCOFFW { w: self } - } - #[doc = "Bit 14 - Transceiver Delay Compensation Fail"] - #[inline] - pub fn tdcfail(&mut self) -> _TDCFAILW { - _TDCFAILW { w: self } - } - #[doc = "Bit 15 - Transceiver Delay Compensation Enable"] - #[inline] - pub fn tdcen(&mut self) -> _TDCENW { - _TDCENW { w: self } - } - #[doc = "Bits 16:17 - Message Buffer Data Size for Region 0"] - #[inline] - pub fn mbdsr0(&mut self) -> _MBDSR0W { - _MBDSR0W { w: self } - } - #[doc = "Bit 31 - Bit Rate Switch Enable"] - #[inline] - pub fn fdrate(&mut self) -> _FDRATEW { - _FDRATEW { w: self } - } -} diff --git a/src/can2/flt_dlc/mod.rs b/src/can2/flt_dlc/mod.rs deleted file mode 100644 index db8cb41..0000000 --- a/src/can2/flt_dlc/mod.rs +++ /dev/null @@ -1,146 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::FLT_DLC { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = r" Value of the field"] -pub struct FLT_DLC_HIR { - bits: u8, -} -impl FLT_DLC_HIR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct FLT_DLC_LOR { - bits: u8, -} -impl FLT_DLC_LOR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Proxy"] -pub struct _FLT_DLC_HIW<'a> { - w: &'a mut W, -} -impl<'a> _FLT_DLC_HIW<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 15; - const OFFSET: u8 = 0; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = r" Proxy"] -pub struct _FLT_DLC_LOW<'a> { - w: &'a mut W, -} -impl<'a> _FLT_DLC_LOW<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 15; - const OFFSET: u8 = 16; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:3 - Upper Limit for Length of Data Bytes Filter"] - #[inline] - pub fn flt_dlc_hi(&self) -> FLT_DLC_HIR { - let bits = { - const MASK: u8 = 15; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - FLT_DLC_HIR { bits } - } - #[doc = "Bits 16:19 - Lower Limit for Length of Data Bytes Filter"] - #[inline] - pub fn flt_dlc_lo(&self) -> FLT_DLC_LOR { - let bits = { - const MASK: u8 = 15; - const OFFSET: u8 = 16; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - FLT_DLC_LOR { bits } - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 8 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bits 0:3 - Upper Limit for Length of Data Bytes Filter"] - #[inline] - pub fn flt_dlc_hi(&mut self) -> _FLT_DLC_HIW { - _FLT_DLC_HIW { w: self } - } - #[doc = "Bits 16:19 - Lower Limit for Length of Data Bytes Filter"] - #[inline] - pub fn flt_dlc_lo(&mut self) -> _FLT_DLC_LOW { - _FLT_DLC_LOW { w: self } - } -} diff --git a/src/can2/flt_id1/mod.rs b/src/can2/flt_id1/mod.rs deleted file mode 100644 index 528a567..0000000 --- a/src/can2/flt_id1/mod.rs +++ /dev/null @@ -1,335 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::FLT_ID1 { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = r" Value of the field"] -pub struct FLT_ID1R { - bits: u32, -} -impl FLT_ID1R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } -} -#[doc = "Possible values of the field `FLT_RTR`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum FLT_RTRR { - #[doc = "Reject remote frame (accept data frame)"] _0, - #[doc = "Accept remote frame"] _1, -} -impl FLT_RTRR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - FLT_RTRR::_0 => false, - FLT_RTRR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> FLT_RTRR { - match value { - false => FLT_RTRR::_0, - true => FLT_RTRR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == FLT_RTRR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == FLT_RTRR::_1 - } -} -#[doc = "Possible values of the field `FLT_IDE`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum FLT_IDER { - #[doc = "Accept standard frame format"] _0, - #[doc = "Accept extended frame format"] _1, -} -impl FLT_IDER { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - FLT_IDER::_0 => false, - FLT_IDER::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> FLT_IDER { - match value { - false => FLT_IDER::_0, - true => FLT_IDER::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == FLT_IDER::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == FLT_IDER::_1 - } -} -#[doc = r" Proxy"] -pub struct _FLT_ID1W<'a> { - w: &'a mut W, -} -impl<'a> _FLT_ID1W<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u32) -> &'a mut W { - const MASK: u32 = 536870911; - const OFFSET: u8 = 0; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `FLT_RTR`"] -pub enum FLT_RTRW { - #[doc = "Reject remote frame (accept data frame)"] _0, - #[doc = "Accept remote frame"] _1, -} -impl FLT_RTRW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - FLT_RTRW::_0 => false, - FLT_RTRW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _FLT_RTRW<'a> { - w: &'a mut W, -} -impl<'a> _FLT_RTRW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: FLT_RTRW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Reject remote frame (accept data frame)"] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(FLT_RTRW::_0) - } - #[doc = "Accept remote frame"] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(FLT_RTRW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 29; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `FLT_IDE`"] -pub enum FLT_IDEW { - #[doc = "Accept standard frame format"] _0, - #[doc = "Accept extended frame format"] _1, -} -impl FLT_IDEW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - FLT_IDEW::_0 => false, - FLT_IDEW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _FLT_IDEW<'a> { - w: &'a mut W, -} -impl<'a> _FLT_IDEW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: FLT_IDEW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Accept standard frame format"] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(FLT_IDEW::_0) - } - #[doc = "Accept extended frame format"] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(FLT_IDEW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 30; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:28 - ID Filter 1 for Pretended Networking filtering"] - #[inline] - pub fn flt_id1(&self) -> FLT_ID1R { - let bits = { - const MASK: u32 = 536870911; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u32 - }; - FLT_ID1R { bits } - } - #[doc = "Bit 29 - Remote Transmission Request Filter"] - #[inline] - pub fn flt_rtr(&self) -> FLT_RTRR { - FLT_RTRR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 29; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 30 - ID Extended Filter"] - #[inline] - pub fn flt_ide(&self) -> FLT_IDER { - FLT_IDER::_from({ - const MASK: bool = true; - const OFFSET: u8 = 30; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 0 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bits 0:28 - ID Filter 1 for Pretended Networking filtering"] - #[inline] - pub fn flt_id1(&mut self) -> _FLT_ID1W { - _FLT_ID1W { w: self } - } - #[doc = "Bit 29 - Remote Transmission Request Filter"] - #[inline] - pub fn flt_rtr(&mut self) -> _FLT_RTRW { - _FLT_RTRW { w: self } - } - #[doc = "Bit 30 - ID Extended Filter"] - #[inline] - pub fn flt_ide(&mut self) -> _FLT_IDEW { - _FLT_IDEW { w: self } - } -} diff --git a/src/can2/flt_id2_idmask/mod.rs b/src/can2/flt_id2_idmask/mod.rs deleted file mode 100644 index 66cd275..0000000 --- a/src/can2/flt_id2_idmask/mod.rs +++ /dev/null @@ -1,335 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::FLT_ID2_IDMASK { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = r" Value of the field"] -pub struct FLT_ID2_IDMASKR { - bits: u32, -} -impl FLT_ID2_IDMASKR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } -} -#[doc = "Possible values of the field `RTR_MSK`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum RTR_MSKR { - #[doc = "The corresponding bit in the filter is \"don't care\""] _0, - #[doc = "The corresponding bit in the filter is checked"] _1, -} -impl RTR_MSKR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - RTR_MSKR::_0 => false, - RTR_MSKR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> RTR_MSKR { - match value { - false => RTR_MSKR::_0, - true => RTR_MSKR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == RTR_MSKR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == RTR_MSKR::_1 - } -} -#[doc = "Possible values of the field `IDE_MSK`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum IDE_MSKR { - #[doc = "The corresponding bit in the filter is \"don't care\""] _0, - #[doc = "The corresponding bit in the filter is checked"] _1, -} -impl IDE_MSKR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - IDE_MSKR::_0 => false, - IDE_MSKR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> IDE_MSKR { - match value { - false => IDE_MSKR::_0, - true => IDE_MSKR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == IDE_MSKR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == IDE_MSKR::_1 - } -} -#[doc = r" Proxy"] -pub struct _FLT_ID2_IDMASKW<'a> { - w: &'a mut W, -} -impl<'a> _FLT_ID2_IDMASKW<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u32) -> &'a mut W { - const MASK: u32 = 536870911; - const OFFSET: u8 = 0; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `RTR_MSK`"] -pub enum RTR_MSKW { - #[doc = "The corresponding bit in the filter is \"don't care\""] _0, - #[doc = "The corresponding bit in the filter is checked"] _1, -} -impl RTR_MSKW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - RTR_MSKW::_0 => false, - RTR_MSKW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _RTR_MSKW<'a> { - w: &'a mut W, -} -impl<'a> _RTR_MSKW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: RTR_MSKW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "The corresponding bit in the filter is \"don't care\""] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(RTR_MSKW::_0) - } - #[doc = "The corresponding bit in the filter is checked"] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(RTR_MSKW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 29; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `IDE_MSK`"] -pub enum IDE_MSKW { - #[doc = "The corresponding bit in the filter is \"don't care\""] _0, - #[doc = "The corresponding bit in the filter is checked"] _1, -} -impl IDE_MSKW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - IDE_MSKW::_0 => false, - IDE_MSKW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _IDE_MSKW<'a> { - w: &'a mut W, -} -impl<'a> _IDE_MSKW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: IDE_MSKW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "The corresponding bit in the filter is \"don't care\""] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(IDE_MSKW::_0) - } - #[doc = "The corresponding bit in the filter is checked"] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(IDE_MSKW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 30; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:28 - ID Filter 2 for Pretended Networking Filtering / ID Mask Bits for Pretended Networking ID Filtering"] - #[inline] - pub fn flt_id2_idmask(&self) -> FLT_ID2_IDMASKR { - let bits = { - const MASK: u32 = 536870911; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u32 - }; - FLT_ID2_IDMASKR { bits } - } - #[doc = "Bit 29 - Remote Transmission Request Mask Bit"] - #[inline] - pub fn rtr_msk(&self) -> RTR_MSKR { - RTR_MSKR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 29; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 30 - ID Extended Mask Bit"] - #[inline] - pub fn ide_msk(&self) -> IDE_MSKR { - IDE_MSKR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 30; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 0 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bits 0:28 - ID Filter 2 for Pretended Networking Filtering / ID Mask Bits for Pretended Networking ID Filtering"] - #[inline] - pub fn flt_id2_idmask(&mut self) -> _FLT_ID2_IDMASKW { - _FLT_ID2_IDMASKW { w: self } - } - #[doc = "Bit 29 - Remote Transmission Request Mask Bit"] - #[inline] - pub fn rtr_msk(&mut self) -> _RTR_MSKW { - _RTR_MSKW { w: self } - } - #[doc = "Bit 30 - ID Extended Mask Bit"] - #[inline] - pub fn ide_msk(&mut self) -> _IDE_MSKW { - _IDE_MSKW { w: self } - } -} diff --git a/src/can2/iflag1/mod.rs b/src/can2/iflag1/mod.rs deleted file mode 100644 index 20a7322..0000000 --- a/src/can2/iflag1/mod.rs +++ /dev/null @@ -1,622 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::IFLAG1 { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = "Possible values of the field `BUF0I`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum BUF0IR { - #[doc = "The corresponding buffer has no occurrence of successfully completed transmission or reception when MCR[RFEN]=0."] - _0, - #[doc = "The corresponding buffer has successfully completed transmission or reception when MCR[RFEN]=0."] - _1, -} -impl BUF0IR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - BUF0IR::_0 => false, - BUF0IR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> BUF0IR { - match value { - false => BUF0IR::_0, - true => BUF0IR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == BUF0IR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == BUF0IR::_1 - } -} -#[doc = r" Value of the field"] -pub struct BUF4TO1IR { - bits: u8, -} -impl BUF4TO1IR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = "Possible values of the field `BUF5I`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum BUF5IR { - #[doc = "No occurrence of MB5 completing transmission/reception when MCR[RFEN]=0, or of frame(s) available in the FIFO, when MCR[RFEN]=1"] - _0, - #[doc = "MB5 completed transmission/reception when MCR[RFEN]=0, or frame(s) available in the Rx FIFO when MCR[RFEN]=1. It generates a DMA request in case of MCR[RFEN] and MCR[DMA] are enabled."] - _1, -} -impl BUF5IR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - BUF5IR::_0 => false, - BUF5IR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> BUF5IR { - match value { - false => BUF5IR::_0, - true => BUF5IR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == BUF5IR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == BUF5IR::_1 - } -} -#[doc = "Possible values of the field `BUF6I`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum BUF6IR { - #[doc = "No occurrence of MB6 completing transmission/reception when MCR[RFEN]=0, or of Rx FIFO almost full when MCR[RFEN]=1"] - _0, - #[doc = "MB6 completed transmission/reception when MCR[RFEN]=0, or Rx FIFO almost full when MCR[RFEN]=1"] - _1, -} -impl BUF6IR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - BUF6IR::_0 => false, - BUF6IR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> BUF6IR { - match value { - false => BUF6IR::_0, - true => BUF6IR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == BUF6IR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == BUF6IR::_1 - } -} -#[doc = "Possible values of the field `BUF7I`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum BUF7IR { - #[doc = "No occurrence of MB7 completing transmission/reception when MCR[RFEN]=0, or of Rx FIFO overflow when MCR[RFEN]=1"] - _0, - #[doc = "MB7 completed transmission/reception when MCR[RFEN]=0, or Rx FIFO overflow when MCR[RFEN]=1"] - _1, -} -impl BUF7IR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - BUF7IR::_0 => false, - BUF7IR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> BUF7IR { - match value { - false => BUF7IR::_0, - true => BUF7IR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == BUF7IR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == BUF7IR::_1 - } -} -#[doc = r" Value of the field"] -pub struct BUF31TO8IR { - bits: u32, -} -impl BUF31TO8IR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } -} -#[doc = "Values that can be written to the field `BUF0I`"] -pub enum BUF0IW { - #[doc = "The corresponding buffer has no occurrence of successfully completed transmission or reception when MCR[RFEN]=0."] - _0, - #[doc = "The corresponding buffer has successfully completed transmission or reception when MCR[RFEN]=0."] - _1, -} -impl BUF0IW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - BUF0IW::_0 => false, - BUF0IW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _BUF0IW<'a> { - w: &'a mut W, -} -impl<'a> _BUF0IW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: BUF0IW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "The corresponding buffer has no occurrence of successfully completed transmission or reception when MCR[RFEN]=0."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(BUF0IW::_0) - } - #[doc = "The corresponding buffer has successfully completed transmission or reception when MCR[RFEN]=0."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(BUF0IW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 0; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = r" Proxy"] -pub struct _BUF4TO1IW<'a> { - w: &'a mut W, -} -impl<'a> _BUF4TO1IW<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 15; - const OFFSET: u8 = 1; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `BUF5I`"] -pub enum BUF5IW { - #[doc = "No occurrence of MB5 completing transmission/reception when MCR[RFEN]=0, or of frame(s) available in the FIFO, when MCR[RFEN]=1"] - _0, - #[doc = "MB5 completed transmission/reception when MCR[RFEN]=0, or frame(s) available in the Rx FIFO when MCR[RFEN]=1. It generates a DMA request in case of MCR[RFEN] and MCR[DMA] are enabled."] - _1, -} -impl BUF5IW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - BUF5IW::_0 => false, - BUF5IW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _BUF5IW<'a> { - w: &'a mut W, -} -impl<'a> _BUF5IW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: BUF5IW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "No occurrence of MB5 completing transmission/reception when MCR[RFEN]=0, or of frame(s) available in the FIFO, when MCR[RFEN]=1"] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(BUF5IW::_0) - } - #[doc = "MB5 completed transmission/reception when MCR[RFEN]=0, or frame(s) available in the Rx FIFO when MCR[RFEN]=1. It generates a DMA request in case of MCR[RFEN] and MCR[DMA] are enabled."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(BUF5IW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 5; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `BUF6I`"] -pub enum BUF6IW { - #[doc = "No occurrence of MB6 completing transmission/reception when MCR[RFEN]=0, or of Rx FIFO almost full when MCR[RFEN]=1"] - _0, - #[doc = "MB6 completed transmission/reception when MCR[RFEN]=0, or Rx FIFO almost full when MCR[RFEN]=1"] - _1, -} -impl BUF6IW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - BUF6IW::_0 => false, - BUF6IW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _BUF6IW<'a> { - w: &'a mut W, -} -impl<'a> _BUF6IW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: BUF6IW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "No occurrence of MB6 completing transmission/reception when MCR[RFEN]=0, or of Rx FIFO almost full when MCR[RFEN]=1"] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(BUF6IW::_0) - } - #[doc = "MB6 completed transmission/reception when MCR[RFEN]=0, or Rx FIFO almost full when MCR[RFEN]=1"] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(BUF6IW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 6; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `BUF7I`"] -pub enum BUF7IW { - #[doc = "No occurrence of MB7 completing transmission/reception when MCR[RFEN]=0, or of Rx FIFO overflow when MCR[RFEN]=1"] - _0, - #[doc = "MB7 completed transmission/reception when MCR[RFEN]=0, or Rx FIFO overflow when MCR[RFEN]=1"] - _1, -} -impl BUF7IW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - BUF7IW::_0 => false, - BUF7IW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _BUF7IW<'a> { - w: &'a mut W, -} -impl<'a> _BUF7IW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: BUF7IW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "No occurrence of MB7 completing transmission/reception when MCR[RFEN]=0, or of Rx FIFO overflow when MCR[RFEN]=1"] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(BUF7IW::_0) - } - #[doc = "MB7 completed transmission/reception when MCR[RFEN]=0, or Rx FIFO overflow when MCR[RFEN]=1"] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(BUF7IW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 7; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = r" Proxy"] -pub struct _BUF31TO8IW<'a> { - w: &'a mut W, -} -impl<'a> _BUF31TO8IW<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u32) -> &'a mut W { - const MASK: u32 = 16777215; - const OFFSET: u8 = 8; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bit 0 - Buffer MB0 Interrupt Or Clear FIFO bit"] - #[inline] - pub fn buf0i(&self) -> BUF0IR { - BUF0IR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bits 1:4 - Buffer MB i Interrupt Or \"reserved\""] - #[inline] - pub fn buf4to1i(&self) -> BUF4TO1IR { - let bits = { - const MASK: u8 = 15; - const OFFSET: u8 = 1; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - BUF4TO1IR { bits } - } - #[doc = "Bit 5 - Buffer MB5 Interrupt Or \"Frames available in Rx FIFO\""] - #[inline] - pub fn buf5i(&self) -> BUF5IR { - BUF5IR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 5; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 6 - Buffer MB6 Interrupt Or \"Rx FIFO Warning\""] - #[inline] - pub fn buf6i(&self) -> BUF6IR { - BUF6IR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 6; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 7 - Buffer MB7 Interrupt Or \"Rx FIFO Overflow\""] - #[inline] - pub fn buf7i(&self) -> BUF7IR { - BUF7IR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 7; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bits 8:31 - Buffer MBi Interrupt"] - #[inline] - pub fn buf31to8i(&self) -> BUF31TO8IR { - let bits = { - const MASK: u32 = 16777215; - const OFFSET: u8 = 8; - ((self.bits >> OFFSET) & MASK as u32) as u32 - }; - BUF31TO8IR { bits } - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 0 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bit 0 - Buffer MB0 Interrupt Or Clear FIFO bit"] - #[inline] - pub fn buf0i(&mut self) -> _BUF0IW { - _BUF0IW { w: self } - } - #[doc = "Bits 1:4 - Buffer MB i Interrupt Or \"reserved\""] - #[inline] - pub fn buf4to1i(&mut self) -> _BUF4TO1IW { - _BUF4TO1IW { w: self } - } - #[doc = "Bit 5 - Buffer MB5 Interrupt Or \"Frames available in Rx FIFO\""] - #[inline] - pub fn buf5i(&mut self) -> _BUF5IW { - _BUF5IW { w: self } - } - #[doc = "Bit 6 - Buffer MB6 Interrupt Or \"Rx FIFO Warning\""] - #[inline] - pub fn buf6i(&mut self) -> _BUF6IW { - _BUF6IW { w: self } - } - #[doc = "Bit 7 - Buffer MB7 Interrupt Or \"Rx FIFO Overflow\""] - #[inline] - pub fn buf7i(&mut self) -> _BUF7IW { - _BUF7IW { w: self } - } - #[doc = "Bits 8:31 - Buffer MBi Interrupt"] - #[inline] - pub fn buf31to8i(&mut self) -> _BUF31TO8IW { - _BUF31TO8IW { w: self } - } -} diff --git a/src/can2/imask1/mod.rs b/src/can2/imask1/mod.rs deleted file mode 100644 index 1f67ed9..0000000 --- a/src/can2/imask1/mod.rs +++ /dev/null @@ -1,105 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::IMASK1 { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = r" Value of the field"] -pub struct BUF31TO0MR { - bits: u32, -} -impl BUF31TO0MR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } -} -#[doc = r" Proxy"] -pub struct _BUF31TO0MW<'a> { - w: &'a mut W, -} -impl<'a> _BUF31TO0MW<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u32) -> &'a mut W { - const MASK: u32 = 4294967295; - const OFFSET: u8 = 0; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:31 - Buffer MB i Mask"] - #[inline] - pub fn buf31to0m(&self) -> BUF31TO0MR { - let bits = { - const MASK: u32 = 4294967295; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u32 - }; - BUF31TO0MR { bits } - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 0 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bits 0:31 - Buffer MB i Mask"] - #[inline] - pub fn buf31to0m(&mut self) -> _BUF31TO0MW { - _BUF31TO0MW { w: self } - } -} diff --git a/src/can2/mcr/mod.rs b/src/can2/mcr/mod.rs deleted file mode 100644 index 3c5653b..0000000 --- a/src/can2/mcr/mod.rs +++ /dev/null @@ -1,1956 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::MCR { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = r" Value of the field"] -pub struct MAXMBR { - bits: u8, -} -impl MAXMBR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = "Possible values of the field `IDAM`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum IDAMR { - #[doc = "Format A: One full ID (standard and extended) per ID Filter Table element."] _00, - #[doc = "Format B: Two full standard IDs or two partial 14-bit (standard and extended) IDs per ID Filter Table element."] - _01, - #[doc = "Format C: Four partial 8-bit Standard IDs per ID Filter Table element."] _10, - #[doc = "Format D: All frames rejected."] _11, -} -impl IDAMR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - match *self { - IDAMR::_00 => 0, - IDAMR::_01 => 1, - IDAMR::_10 => 2, - IDAMR::_11 => 3, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: u8) -> IDAMR { - match value { - 0 => IDAMR::_00, - 1 => IDAMR::_01, - 2 => IDAMR::_10, - 3 => IDAMR::_11, - _ => unreachable!(), - } - } - #[doc = "Checks if the value of the field is `_00`"] - #[inline] - pub fn is_00(&self) -> bool { - *self == IDAMR::_00 - } - #[doc = "Checks if the value of the field is `_01`"] - #[inline] - pub fn is_01(&self) -> bool { - *self == IDAMR::_01 - } - #[doc = "Checks if the value of the field is `_10`"] - #[inline] - pub fn is_10(&self) -> bool { - *self == IDAMR::_10 - } - #[doc = "Checks if the value of the field is `_11`"] - #[inline] - pub fn is_11(&self) -> bool { - *self == IDAMR::_11 - } -} -#[doc = "Possible values of the field `FDEN`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum FDENR { - #[doc = "CAN FD is enabled. FlexCAN is able to receive and transmit messages in both CAN FD and CAN 2.0 formats."] - _1, - #[doc = "CAN FD is disabled. FlexCAN is able to receive and transmit messages in CAN 2.0 format."] - _0, -} -impl FDENR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - FDENR::_1 => true, - FDENR::_0 => false, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> FDENR { - match value { - true => FDENR::_1, - false => FDENR::_0, - } - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == FDENR::_1 - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == FDENR::_0 - } -} -#[doc = "Possible values of the field `AEN`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum AENR { - #[doc = "Abort disabled."] _0, - #[doc = "Abort enabled."] _1, -} -impl AENR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - AENR::_0 => false, - AENR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> AENR { - match value { - false => AENR::_0, - true => AENR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == AENR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == AENR::_1 - } -} -#[doc = "Possible values of the field `LPRIOEN`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum LPRIOENR { - #[doc = "Local Priority disabled."] _0, - #[doc = "Local Priority enabled."] _1, -} -impl LPRIOENR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - LPRIOENR::_0 => false, - LPRIOENR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> LPRIOENR { - match value { - false => LPRIOENR::_0, - true => LPRIOENR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == LPRIOENR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == LPRIOENR::_1 - } -} -#[doc = "Possible values of the field `PNET_EN`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum PNET_ENR { - #[doc = "Pretended Networking mode is disabled."] _0, - #[doc = "Pretended Networking mode is enabled."] _1, -} -impl PNET_ENR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - PNET_ENR::_0 => false, - PNET_ENR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> PNET_ENR { - match value { - false => PNET_ENR::_0, - true => PNET_ENR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == PNET_ENR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == PNET_ENR::_1 - } -} -#[doc = "Possible values of the field `DMA`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum DMAR { - #[doc = "DMA feature for RX FIFO disabled."] _0, - #[doc = "DMA feature for RX FIFO enabled."] _1, -} -impl DMAR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - DMAR::_0 => false, - DMAR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> DMAR { - match value { - false => DMAR::_0, - true => DMAR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == DMAR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == DMAR::_1 - } -} -#[doc = "Possible values of the field `IRMQ`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum IRMQR { - #[doc = "Individual Rx masking and queue feature are disabled. For backward compatibility with legacy applications, the reading of C/S word locks the MB even if it is EMPTY."] - _0, - #[doc = "Individual Rx masking and queue feature are enabled."] _1, -} -impl IRMQR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - IRMQR::_0 => false, - IRMQR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> IRMQR { - match value { - false => IRMQR::_0, - true => IRMQR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == IRMQR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == IRMQR::_1 - } -} -#[doc = "Possible values of the field `SRXDIS`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum SRXDISR { - #[doc = "Self reception enabled."] _0, - #[doc = "Self reception disabled."] _1, -} -impl SRXDISR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - SRXDISR::_0 => false, - SRXDISR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> SRXDISR { - match value { - false => SRXDISR::_0, - true => SRXDISR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == SRXDISR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == SRXDISR::_1 - } -} -#[doc = "Possible values of the field `LPMACK`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum LPMACKR { - #[doc = "FlexCAN is not in a low-power mode."] _0, - #[doc = "FlexCAN is in a low-power mode."] _1, -} -impl LPMACKR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - LPMACKR::_0 => false, - LPMACKR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> LPMACKR { - match value { - false => LPMACKR::_0, - true => LPMACKR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == LPMACKR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == LPMACKR::_1 - } -} -#[doc = "Possible values of the field `WRNEN`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum WRNENR { - #[doc = "TWRNINT and RWRNINT bits are zero, independent of the values in the error counters."] - _0, - #[doc = "TWRNINT and RWRNINT bits are set when the respective error counter transitions from less than 96 to greater than or equal to 96."] - _1, -} -impl WRNENR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - WRNENR::_0 => false, - WRNENR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> WRNENR { - match value { - false => WRNENR::_0, - true => WRNENR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == WRNENR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == WRNENR::_1 - } -} -#[doc = r" Value of the field"] -pub struct SUPVR { - bits: bool, -} -impl SUPVR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - self.bits - } - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } -} -#[doc = "Possible values of the field `FRZACK`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum FRZACKR { - #[doc = "FlexCAN not in Freeze mode, prescaler running."] _0, - #[doc = "FlexCAN in Freeze mode, prescaler stopped."] _1, -} -impl FRZACKR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - FRZACKR::_0 => false, - FRZACKR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> FRZACKR { - match value { - false => FRZACKR::_0, - true => FRZACKR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == FRZACKR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == FRZACKR::_1 - } -} -#[doc = "Possible values of the field `SOFTRST`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum SOFTRSTR { - #[doc = "No reset request."] _0, - #[doc = "Resets the registers affected by soft reset."] _1, -} -impl SOFTRSTR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - SOFTRSTR::_0 => false, - SOFTRSTR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> SOFTRSTR { - match value { - false => SOFTRSTR::_0, - true => SOFTRSTR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == SOFTRSTR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == SOFTRSTR::_1 - } -} -#[doc = "Possible values of the field `NOTRDY`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum NOTRDYR { - #[doc = "FlexCAN module is either in Normal mode, Listen-Only mode or Loop-Back mode."] _0, - #[doc = r" Reserved"] _Reserved(bool), -} -impl NOTRDYR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - NOTRDYR::_0 => false, - NOTRDYR::_Reserved(bits) => bits, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> NOTRDYR { - match value { - false => NOTRDYR::_0, - i => NOTRDYR::_Reserved(i), - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == NOTRDYR::_0 - } -} -#[doc = "Possible values of the field `HALT`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum HALTR { - #[doc = "No Freeze mode request."] _0, - #[doc = "Enters Freeze mode if the FRZ bit is asserted."] _1, -} -impl HALTR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - HALTR::_0 => false, - HALTR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> HALTR { - match value { - false => HALTR::_0, - true => HALTR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == HALTR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == HALTR::_1 - } -} -#[doc = "Possible values of the field `RFEN`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum RFENR { - #[doc = "Rx FIFO not enabled."] _0, - #[doc = "Rx FIFO enabled."] _1, -} -impl RFENR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - RFENR::_0 => false, - RFENR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> RFENR { - match value { - false => RFENR::_0, - true => RFENR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == RFENR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == RFENR::_1 - } -} -#[doc = "Possible values of the field `FRZ`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum FRZR { - #[doc = "Not enabled to enter Freeze mode."] _0, - #[doc = "Enabled to enter Freeze mode."] _1, -} -impl FRZR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - FRZR::_0 => false, - FRZR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> FRZR { - match value { - false => FRZR::_0, - true => FRZR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == FRZR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == FRZR::_1 - } -} -#[doc = "Possible values of the field `MDIS`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum MDISR { - #[doc = "Enable the FlexCAN module."] _0, - #[doc = "Disable the FlexCAN module."] _1, -} -impl MDISR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - MDISR::_0 => false, - MDISR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> MDISR { - match value { - false => MDISR::_0, - true => MDISR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == MDISR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == MDISR::_1 - } -} -#[doc = r" Proxy"] -pub struct _MAXMBW<'a> { - w: &'a mut W, -} -impl<'a> _MAXMBW<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 127; - const OFFSET: u8 = 0; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `IDAM`"] -pub enum IDAMW { - #[doc = "Format A: One full ID (standard and extended) per ID Filter Table element."] _00, - #[doc = "Format B: Two full standard IDs or two partial 14-bit (standard and extended) IDs per ID Filter Table element."] - _01, - #[doc = "Format C: Four partial 8-bit Standard IDs per ID Filter Table element."] _10, - #[doc = "Format D: All frames rejected."] _11, -} -impl IDAMW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> u8 { - match *self { - IDAMW::_00 => 0, - IDAMW::_01 => 1, - IDAMW::_10 => 2, - IDAMW::_11 => 3, - } - } -} -#[doc = r" Proxy"] -pub struct _IDAMW<'a> { - w: &'a mut W, -} -impl<'a> _IDAMW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: IDAMW) -> &'a mut W { - { - self.bits(variant._bits()) - } - } - #[doc = "Format A: One full ID (standard and extended) per ID Filter Table element."] - #[inline] - pub fn _00(self) -> &'a mut W { - self.variant(IDAMW::_00) - } - #[doc = "Format B: Two full standard IDs or two partial 14-bit (standard and extended) IDs per ID Filter Table element."] - #[inline] - pub fn _01(self) -> &'a mut W { - self.variant(IDAMW::_01) - } - #[doc = "Format C: Four partial 8-bit Standard IDs per ID Filter Table element."] - #[inline] - pub fn _10(self) -> &'a mut W { - self.variant(IDAMW::_10) - } - #[doc = "Format D: All frames rejected."] - #[inline] - pub fn _11(self) -> &'a mut W { - self.variant(IDAMW::_11) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 3; - const OFFSET: u8 = 8; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `FDEN`"] -pub enum FDENW { - #[doc = "CAN FD is enabled. FlexCAN is able to receive and transmit messages in both CAN FD and CAN 2.0 formats."] - _1, - #[doc = "CAN FD is disabled. FlexCAN is able to receive and transmit messages in CAN 2.0 format."] - _0, -} -impl FDENW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - FDENW::_1 => true, - FDENW::_0 => false, - } - } -} -#[doc = r" Proxy"] -pub struct _FDENW<'a> { - w: &'a mut W, -} -impl<'a> _FDENW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: FDENW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "CAN FD is enabled. FlexCAN is able to receive and transmit messages in both CAN FD and CAN 2.0 formats."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(FDENW::_1) - } - #[doc = "CAN FD is disabled. FlexCAN is able to receive and transmit messages in CAN 2.0 format."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(FDENW::_0) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 11; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `AEN`"] -pub enum AENW { - #[doc = "Abort disabled."] _0, - #[doc = "Abort enabled."] _1, -} -impl AENW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - AENW::_0 => false, - AENW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _AENW<'a> { - w: &'a mut W, -} -impl<'a> _AENW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: AENW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Abort disabled."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(AENW::_0) - } - #[doc = "Abort enabled."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(AENW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 12; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `LPRIOEN`"] -pub enum LPRIOENW { - #[doc = "Local Priority disabled."] _0, - #[doc = "Local Priority enabled."] _1, -} -impl LPRIOENW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - LPRIOENW::_0 => false, - LPRIOENW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _LPRIOENW<'a> { - w: &'a mut W, -} -impl<'a> _LPRIOENW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: LPRIOENW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Local Priority disabled."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(LPRIOENW::_0) - } - #[doc = "Local Priority enabled."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(LPRIOENW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 13; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `PNET_EN`"] -pub enum PNET_ENW { - #[doc = "Pretended Networking mode is disabled."] _0, - #[doc = "Pretended Networking mode is enabled."] _1, -} -impl PNET_ENW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - PNET_ENW::_0 => false, - PNET_ENW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _PNET_ENW<'a> { - w: &'a mut W, -} -impl<'a> _PNET_ENW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: PNET_ENW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Pretended Networking mode is disabled."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(PNET_ENW::_0) - } - #[doc = "Pretended Networking mode is enabled."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(PNET_ENW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 14; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `DMA`"] -pub enum DMAW { - #[doc = "DMA feature for RX FIFO disabled."] _0, - #[doc = "DMA feature for RX FIFO enabled."] _1, -} -impl DMAW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - DMAW::_0 => false, - DMAW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _DMAW<'a> { - w: &'a mut W, -} -impl<'a> _DMAW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: DMAW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "DMA feature for RX FIFO disabled."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(DMAW::_0) - } - #[doc = "DMA feature for RX FIFO enabled."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(DMAW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 15; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `IRMQ`"] -pub enum IRMQW { - #[doc = "Individual Rx masking and queue feature are disabled. For backward compatibility with legacy applications, the reading of C/S word locks the MB even if it is EMPTY."] - _0, - #[doc = "Individual Rx masking and queue feature are enabled."] _1, -} -impl IRMQW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - IRMQW::_0 => false, - IRMQW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _IRMQW<'a> { - w: &'a mut W, -} -impl<'a> _IRMQW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: IRMQW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Individual Rx masking and queue feature are disabled. For backward compatibility with legacy applications, the reading of C/S word locks the MB even if it is EMPTY."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(IRMQW::_0) - } - #[doc = "Individual Rx masking and queue feature are enabled."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(IRMQW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 16; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `SRXDIS`"] -pub enum SRXDISW { - #[doc = "Self reception enabled."] _0, - #[doc = "Self reception disabled."] _1, -} -impl SRXDISW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - SRXDISW::_0 => false, - SRXDISW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _SRXDISW<'a> { - w: &'a mut W, -} -impl<'a> _SRXDISW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: SRXDISW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Self reception enabled."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(SRXDISW::_0) - } - #[doc = "Self reception disabled."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(SRXDISW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 17; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `WRNEN`"] -pub enum WRNENW { - #[doc = "TWRNINT and RWRNINT bits are zero, independent of the values in the error counters."] - _0, - #[doc = "TWRNINT and RWRNINT bits are set when the respective error counter transitions from less than 96 to greater than or equal to 96."] - _1, -} -impl WRNENW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - WRNENW::_0 => false, - WRNENW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _WRNENW<'a> { - w: &'a mut W, -} -impl<'a> _WRNENW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: WRNENW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "TWRNINT and RWRNINT bits are zero, independent of the values in the error counters."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(WRNENW::_0) - } - #[doc = "TWRNINT and RWRNINT bits are set when the respective error counter transitions from less than 96 to greater than or equal to 96."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(WRNENW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 21; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = r" Proxy"] -pub struct _SUPVW<'a> { - w: &'a mut W, -} -impl<'a> _SUPVW<'a> { - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 23; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `SOFTRST`"] -pub enum SOFTRSTW { - #[doc = "No reset request."] _0, - #[doc = "Resets the registers affected by soft reset."] _1, -} -impl SOFTRSTW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - SOFTRSTW::_0 => false, - SOFTRSTW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _SOFTRSTW<'a> { - w: &'a mut W, -} -impl<'a> _SOFTRSTW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: SOFTRSTW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "No reset request."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(SOFTRSTW::_0) - } - #[doc = "Resets the registers affected by soft reset."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(SOFTRSTW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 25; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `HALT`"] -pub enum HALTW { - #[doc = "No Freeze mode request."] _0, - #[doc = "Enters Freeze mode if the FRZ bit is asserted."] _1, -} -impl HALTW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - HALTW::_0 => false, - HALTW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _HALTW<'a> { - w: &'a mut W, -} -impl<'a> _HALTW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: HALTW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "No Freeze mode request."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(HALTW::_0) - } - #[doc = "Enters Freeze mode if the FRZ bit is asserted."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(HALTW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 28; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `RFEN`"] -pub enum RFENW { - #[doc = "Rx FIFO not enabled."] _0, - #[doc = "Rx FIFO enabled."] _1, -} -impl RFENW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - RFENW::_0 => false, - RFENW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _RFENW<'a> { - w: &'a mut W, -} -impl<'a> _RFENW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: RFENW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Rx FIFO not enabled."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(RFENW::_0) - } - #[doc = "Rx FIFO enabled."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(RFENW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 29; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `FRZ`"] -pub enum FRZW { - #[doc = "Not enabled to enter Freeze mode."] _0, - #[doc = "Enabled to enter Freeze mode."] _1, -} -impl FRZW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - FRZW::_0 => false, - FRZW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _FRZW<'a> { - w: &'a mut W, -} -impl<'a> _FRZW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: FRZW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Not enabled to enter Freeze mode."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(FRZW::_0) - } - #[doc = "Enabled to enter Freeze mode."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(FRZW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 30; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `MDIS`"] -pub enum MDISW { - #[doc = "Enable the FlexCAN module."] _0, - #[doc = "Disable the FlexCAN module."] _1, -} -impl MDISW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - MDISW::_0 => false, - MDISW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _MDISW<'a> { - w: &'a mut W, -} -impl<'a> _MDISW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: MDISW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Enable the FlexCAN module."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(MDISW::_0) - } - #[doc = "Disable the FlexCAN module."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(MDISW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 31; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:6 - Number Of The Last Message Buffer"] - #[inline] - pub fn maxmb(&self) -> MAXMBR { - let bits = { - const MASK: u8 = 127; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - MAXMBR { bits } - } - #[doc = "Bits 8:9 - ID Acceptance Mode"] - #[inline] - pub fn idam(&self) -> IDAMR { - IDAMR::_from({ - const MASK: u8 = 3; - const OFFSET: u8 = 8; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }) - } - #[doc = "Bit 11 - CAN FD operation enable"] - #[inline] - pub fn fden(&self) -> FDENR { - FDENR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 11; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 12 - Abort Enable"] - #[inline] - pub fn aen(&self) -> AENR { - AENR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 12; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 13 - Local Priority Enable"] - #[inline] - pub fn lprioen(&self) -> LPRIOENR { - LPRIOENR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 13; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 14 - Pretended Networking Enable"] - #[inline] - pub fn pnet_en(&self) -> PNET_ENR { - PNET_ENR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 14; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 15 - DMA Enable"] - #[inline] - pub fn dma(&self) -> DMAR { - DMAR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 15; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 16 - Individual Rx Masking And Queue Enable"] - #[inline] - pub fn irmq(&self) -> IRMQR { - IRMQR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 16; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 17 - Self Reception Disable"] - #[inline] - pub fn srxdis(&self) -> SRXDISR { - SRXDISR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 17; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 20 - Low-Power Mode Acknowledge"] - #[inline] - pub fn lpmack(&self) -> LPMACKR { - LPMACKR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 20; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 21 - Warning Interrupt Enable"] - #[inline] - pub fn wrnen(&self) -> WRNENR { - WRNENR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 21; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 23 - Supervisor Mode"] - #[inline] - pub fn supv(&self) -> SUPVR { - let bits = { - const MASK: bool = true; - const OFFSET: u8 = 23; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }; - SUPVR { bits } - } - #[doc = "Bit 24 - Freeze Mode Acknowledge"] - #[inline] - pub fn frzack(&self) -> FRZACKR { - FRZACKR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 24; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 25 - Soft Reset"] - #[inline] - pub fn softrst(&self) -> SOFTRSTR { - SOFTRSTR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 25; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 27 - FlexCAN Not Ready"] - #[inline] - pub fn notrdy(&self) -> NOTRDYR { - NOTRDYR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 27; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 28 - Halt FlexCAN"] - #[inline] - pub fn halt(&self) -> HALTR { - HALTR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 28; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 29 - Rx FIFO Enable"] - #[inline] - pub fn rfen(&self) -> RFENR { - RFENR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 29; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 30 - Freeze Enable"] - #[inline] - pub fn frz(&self) -> FRZR { - FRZR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 30; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 31 - Module Disable"] - #[inline] - pub fn mdis(&self) -> MDISR { - MDISR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 31; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 3633315855 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bits 0:6 - Number Of The Last Message Buffer"] - #[inline] - pub fn maxmb(&mut self) -> _MAXMBW { - _MAXMBW { w: self } - } - #[doc = "Bits 8:9 - ID Acceptance Mode"] - #[inline] - pub fn idam(&mut self) -> _IDAMW { - _IDAMW { w: self } - } - #[doc = "Bit 11 - CAN FD operation enable"] - #[inline] - pub fn fden(&mut self) -> _FDENW { - _FDENW { w: self } - } - #[doc = "Bit 12 - Abort Enable"] - #[inline] - pub fn aen(&mut self) -> _AENW { - _AENW { w: self } - } - #[doc = "Bit 13 - Local Priority Enable"] - #[inline] - pub fn lprioen(&mut self) -> _LPRIOENW { - _LPRIOENW { w: self } - } - #[doc = "Bit 14 - Pretended Networking Enable"] - #[inline] - pub fn pnet_en(&mut self) -> _PNET_ENW { - _PNET_ENW { w: self } - } - #[doc = "Bit 15 - DMA Enable"] - #[inline] - pub fn dma(&mut self) -> _DMAW { - _DMAW { w: self } - } - #[doc = "Bit 16 - Individual Rx Masking And Queue Enable"] - #[inline] - pub fn irmq(&mut self) -> _IRMQW { - _IRMQW { w: self } - } - #[doc = "Bit 17 - Self Reception Disable"] - #[inline] - pub fn srxdis(&mut self) -> _SRXDISW { - _SRXDISW { w: self } - } - #[doc = "Bit 21 - Warning Interrupt Enable"] - #[inline] - pub fn wrnen(&mut self) -> _WRNENW { - _WRNENW { w: self } - } - #[doc = "Bit 23 - Supervisor Mode"] - #[inline] - pub fn supv(&mut self) -> _SUPVW { - _SUPVW { w: self } - } - #[doc = "Bit 25 - Soft Reset"] - #[inline] - pub fn softrst(&mut self) -> _SOFTRSTW { - _SOFTRSTW { w: self } - } - #[doc = "Bit 28 - Halt FlexCAN"] - #[inline] - pub fn halt(&mut self) -> _HALTW { - _HALTW { w: self } - } - #[doc = "Bit 29 - Rx FIFO Enable"] - #[inline] - pub fn rfen(&mut self) -> _RFENW { - _RFENW { w: self } - } - #[doc = "Bit 30 - Freeze Enable"] - #[inline] - pub fn frz(&mut self) -> _FRZW { - _FRZW { w: self } - } - #[doc = "Bit 31 - Module Disable"] - #[inline] - pub fn mdis(&mut self) -> _MDISW { - _MDISW { w: self } - } -} diff --git a/src/can2/mod.rs b/src/can2/mod.rs deleted file mode 100644 index 054059d..0000000 --- a/src/can2/mod.rs +++ /dev/null @@ -1,451 +0,0 @@ -use vcell::VolatileCell; -#[doc = r" Register block"] -#[repr(C)] -pub struct RegisterBlock { - #[doc = "0x00 - Module Configuration Register"] pub mcr: MCR, - #[doc = "0x04 - Control 1 register"] pub ctrl1: CTRL1, - #[doc = "0x08 - Free Running Timer"] pub timer: TIMER, - _reserved0: [u8; 4usize], - #[doc = "0x10 - Rx Mailboxes Global Mask Register"] pub rxmgmask: RXMGMASK, - #[doc = "0x14 - Rx 14 Mask register"] pub rx14mask: RX14MASK, - #[doc = "0x18 - Rx 15 Mask register"] pub rx15mask: RX15MASK, - #[doc = "0x1c - Error Counter"] pub ecr: ECR, - #[doc = "0x20 - Error and Status 1 register"] pub esr1: ESR1, - _reserved1: [u8; 4usize], - #[doc = "0x28 - Interrupt Masks 1 register"] pub imask1: IMASK1, - _reserved2: [u8; 4usize], - #[doc = "0x30 - Interrupt Flags 1 register"] pub iflag1: IFLAG1, - #[doc = "0x34 - Control 2 register"] pub ctrl2: CTRL2, - #[doc = "0x38 - Error and Status 2 register"] pub esr2: ESR2, - _reserved3: [u8; 8usize], - #[doc = "0x44 - CRC Register"] pub crcr: CRCR, - #[doc = "0x48 - Rx FIFO Global Mask register"] pub rxfgmask: RXFGMASK, - #[doc = "0x4c - Rx FIFO Information Register"] pub rxfir: RXFIR, - #[doc = "0x50 - CAN Bit Timing Register"] pub cbt: CBT, - _reserved4: [u8; 44usize], - #[doc = "0x80 - Embedded RAM"] pub embedded_ram: [EMBEDDEDRAM; 128], - _reserved5: [u8; 1536usize], - #[doc = "0x880 - Rx Individual Mask Registers"] pub rximr0: RXIMR0, - #[doc = "0x884 - Rx Individual Mask Registers"] pub rximr1: RXIMR1, - #[doc = "0x888 - Rx Individual Mask Registers"] pub rximr2: RXIMR2, - #[doc = "0x88c - Rx Individual Mask Registers"] pub rximr3: RXIMR3, - #[doc = "0x890 - Rx Individual Mask Registers"] pub rximr4: RXIMR4, - #[doc = "0x894 - Rx Individual Mask Registers"] pub rximr5: RXIMR5, - #[doc = "0x898 - Rx Individual Mask Registers"] pub rximr6: RXIMR6, - #[doc = "0x89c - Rx Individual Mask Registers"] pub rximr7: RXIMR7, - #[doc = "0x8a0 - Rx Individual Mask Registers"] pub rximr8: RXIMR8, - #[doc = "0x8a4 - Rx Individual Mask Registers"] pub rximr9: RXIMR9, - #[doc = "0x8a8 - Rx Individual Mask Registers"] pub rximr10: RXIMR10, - #[doc = "0x8ac - Rx Individual Mask Registers"] pub rximr11: RXIMR11, - #[doc = "0x8b0 - Rx Individual Mask Registers"] pub rximr12: RXIMR12, - #[doc = "0x8b4 - Rx Individual Mask Registers"] pub rximr13: RXIMR13, - #[doc = "0x8b8 - Rx Individual Mask Registers"] pub rximr14: RXIMR14, - #[doc = "0x8bc - Rx Individual Mask Registers"] pub rximr15: RXIMR15, - _reserved6: [u8; 576usize], - #[doc = "0xb00 - Pretended Networking Control 1 Register"] pub ctrl1_pn: CTRL1_PN, - #[doc = "0xb04 - Pretended Networking Control 2 Register"] pub ctrl2_pn: CTRL2_PN, - #[doc = "0xb08 - Pretended Networking Wake Up Match Register"] pub wu_mtc: WU_MTC, - #[doc = "0xb0c - Pretended Networking ID Filter 1 Register"] pub flt_id1: FLT_ID1, - #[doc = "0xb10 - Pretended Networking DLC Filter Register"] pub flt_dlc: FLT_DLC, - #[doc = "0xb14 - Pretended Networking Payload Low Filter 1 Register"] pub pl1_lo: PL1_LO, - #[doc = "0xb18 - Pretended Networking Payload High Filter 1 Register"] pub pl1_hi: PL1_HI, - #[doc = "0xb1c - Pretended Networking ID Filter 2 Register / ID Mask Register"] - pub flt_id2_idmask: FLT_ID2_IDMASK, - #[doc = "0xb20 - Pretended Networking Payload Low Filter 2 Register / Payload Low Mask Register"] - pub pl2_plmask_lo: PL2_PLMASK_LO, - #[doc = "0xb24 - Pretended Networking Payload High Filter 2 low order bits / Payload High Mask Register"] - pub pl2_plmask_hi: PL2_PLMASK_HI, - _reserved7: [u8; 24usize], - #[doc = "0xb40 - Wake Up Message Buffer Register for C/S"] pub wmb0_cs: WMB0_CS, - #[doc = "0xb44 - Wake Up Message Buffer Register for ID"] pub wmb0_id: WMB0_ID, - #[doc = "0xb48 - Wake Up Message Buffer Register for Data 0-3"] pub wmb0_d03: WMB0_D03, - #[doc = "0xb4c - Wake Up Message Buffer Register Data 4-7"] pub wmb0_d47: WMB0_D47, - #[doc = "0xb50 - Wake Up Message Buffer Register for C/S"] pub wmb1_cs: WMB1_CS, - #[doc = "0xb54 - Wake Up Message Buffer Register for ID"] pub wmb1_id: WMB1_ID, - #[doc = "0xb58 - Wake Up Message Buffer Register for Data 0-3"] pub wmb1_d03: WMB1_D03, - #[doc = "0xb5c - Wake Up Message Buffer Register Data 4-7"] pub wmb1_d47: WMB1_D47, - #[doc = "0xb60 - Wake Up Message Buffer Register for C/S"] pub wmb2_cs: WMB2_CS, - #[doc = "0xb64 - Wake Up Message Buffer Register for ID"] pub wmb2_id: WMB2_ID, - #[doc = "0xb68 - Wake Up Message Buffer Register for Data 0-3"] pub wmb2_d03: WMB2_D03, - #[doc = "0xb6c - Wake Up Message Buffer Register Data 4-7"] pub wmb2_d47: WMB2_D47, - #[doc = "0xb70 - Wake Up Message Buffer Register for C/S"] pub wmb3_cs: WMB3_CS, - #[doc = "0xb74 - Wake Up Message Buffer Register for ID"] pub wmb3_id: WMB3_ID, - #[doc = "0xb78 - Wake Up Message Buffer Register for Data 0-3"] pub wmb3_d03: WMB3_D03, - #[doc = "0xb7c - Wake Up Message Buffer Register Data 4-7"] pub wmb3_d47: WMB3_D47, - _reserved8: [u8; 128usize], - #[doc = "0xc00 - CAN FD Control Register"] pub fdctrl: FDCTRL, - #[doc = "0xc04 - CAN FD Bit Timing Register"] pub fdcbt: FDCBT, - #[doc = "0xc08 - CAN FD CRC Register"] pub fdcrc: FDCRC, -} -#[doc = "Module Configuration Register"] -pub struct MCR { - register: VolatileCell, -} -#[doc = "Module Configuration Register"] -pub mod mcr; -#[doc = "Control 1 register"] -pub struct CTRL1 { - register: VolatileCell, -} -#[doc = "Control 1 register"] -pub mod ctrl1; -#[doc = "Free Running Timer"] -pub struct TIMER { - register: VolatileCell, -} -#[doc = "Free Running Timer"] -pub mod timer; -#[doc = "Rx Mailboxes Global Mask Register"] -pub struct RXMGMASK { - register: VolatileCell, -} -#[doc = "Rx Mailboxes Global Mask Register"] -pub mod rxmgmask; -#[doc = "Rx 14 Mask register"] -pub struct RX14MASK { - register: VolatileCell, -} -#[doc = "Rx 14 Mask register"] -pub mod rx14mask; -#[doc = "Rx 15 Mask register"] -pub struct RX15MASK { - register: VolatileCell, -} -#[doc = "Rx 15 Mask register"] -pub mod rx15mask; -#[doc = "Error Counter"] -pub struct ECR { - register: VolatileCell, -} -#[doc = "Error Counter"] -pub mod ecr; -#[doc = "Error and Status 1 register"] -pub struct ESR1 { - register: VolatileCell, -} -#[doc = "Error and Status 1 register"] -pub mod esr1; -#[doc = "Interrupt Masks 1 register"] -pub struct IMASK1 { - register: VolatileCell, -} -#[doc = "Interrupt Masks 1 register"] -pub mod imask1; -#[doc = "Interrupt Flags 1 register"] -pub struct IFLAG1 { - register: VolatileCell, -} -#[doc = "Interrupt Flags 1 register"] -pub mod iflag1; -#[doc = "Control 2 register"] -pub struct CTRL2 { - register: VolatileCell, -} -#[doc = "Control 2 register"] -pub mod ctrl2; -#[doc = "Error and Status 2 register"] -pub struct ESR2 { - register: VolatileCell, -} -#[doc = "Error and Status 2 register"] -pub mod esr2; -#[doc = "CRC Register"] -pub struct CRCR { - register: VolatileCell, -} -#[doc = "CRC Register"] -pub mod crcr; -#[doc = "Rx FIFO Global Mask register"] -pub struct RXFGMASK { - register: VolatileCell, -} -#[doc = "Rx FIFO Global Mask register"] -pub mod rxfgmask; -#[doc = "Rx FIFO Information Register"] -pub struct RXFIR { - register: VolatileCell, -} -#[doc = "Rx FIFO Information Register"] -pub mod rxfir; -#[doc = "CAN Bit Timing Register"] -pub struct CBT { - register: VolatileCell, -} -#[doc = "CAN Bit Timing Register"] -pub mod cbt; -#[doc = "Embedded RAM"] -pub struct EMBEDDEDRAM { - register: VolatileCell, -} -#[doc = "Embedded RAM"] -pub mod embedded_ram; -#[doc = "Rx Individual Mask Registers"] -pub struct RXIMR0 { - register: VolatileCell, -} -#[doc = "Rx Individual Mask Registers"] -pub mod rximr0; -#[doc = "Rx Individual Mask Registers"] -pub struct RXIMR1 { - register: VolatileCell, -} -#[doc = "Rx Individual Mask Registers"] -pub mod rximr1; -#[doc = "Rx Individual Mask Registers"] -pub struct RXIMR2 { - register: VolatileCell, -} -#[doc = "Rx Individual Mask Registers"] -pub mod rximr2; -#[doc = "Rx Individual Mask Registers"] -pub struct RXIMR3 { - register: VolatileCell, -} -#[doc = "Rx Individual Mask Registers"] -pub mod rximr3; -#[doc = "Rx Individual Mask Registers"] -pub struct RXIMR4 { - register: VolatileCell, -} -#[doc = "Rx Individual Mask Registers"] -pub mod rximr4; -#[doc = "Rx Individual Mask Registers"] -pub struct RXIMR5 { - register: VolatileCell, -} -#[doc = "Rx Individual Mask Registers"] -pub mod rximr5; -#[doc = "Rx Individual Mask Registers"] -pub struct RXIMR6 { - register: VolatileCell, -} -#[doc = "Rx Individual Mask Registers"] -pub mod rximr6; -#[doc = "Rx Individual Mask Registers"] -pub struct RXIMR7 { - register: VolatileCell, -} -#[doc = "Rx Individual Mask Registers"] -pub mod rximr7; -#[doc = "Rx Individual Mask Registers"] -pub struct RXIMR8 { - register: VolatileCell, -} -#[doc = "Rx Individual Mask Registers"] -pub mod rximr8; -#[doc = "Rx Individual Mask Registers"] -pub struct RXIMR9 { - register: VolatileCell, -} -#[doc = "Rx Individual Mask Registers"] -pub mod rximr9; -#[doc = "Rx Individual Mask Registers"] -pub struct RXIMR10 { - register: VolatileCell, -} -#[doc = "Rx Individual Mask Registers"] -pub mod rximr10; -#[doc = "Rx Individual Mask Registers"] -pub struct RXIMR11 { - register: VolatileCell, -} -#[doc = "Rx Individual Mask Registers"] -pub mod rximr11; -#[doc = "Rx Individual Mask Registers"] -pub struct RXIMR12 { - register: VolatileCell, -} -#[doc = "Rx Individual Mask Registers"] -pub mod rximr12; -#[doc = "Rx Individual Mask Registers"] -pub struct RXIMR13 { - register: VolatileCell, -} -#[doc = "Rx Individual Mask Registers"] -pub mod rximr13; -#[doc = "Rx Individual Mask Registers"] -pub struct RXIMR14 { - register: VolatileCell, -} -#[doc = "Rx Individual Mask Registers"] -pub mod rximr14; -#[doc = "Rx Individual Mask Registers"] -pub struct RXIMR15 { - register: VolatileCell, -} -#[doc = "Rx Individual Mask Registers"] -pub mod rximr15; -#[doc = "Pretended Networking Control 1 Register"] -pub struct CTRL1_PN { - register: VolatileCell, -} -#[doc = "Pretended Networking Control 1 Register"] -pub mod ctrl1_pn; -#[doc = "Pretended Networking Control 2 Register"] -pub struct CTRL2_PN { - register: VolatileCell, -} -#[doc = "Pretended Networking Control 2 Register"] -pub mod ctrl2_pn; -#[doc = "Pretended Networking Wake Up Match Register"] -pub struct WU_MTC { - register: VolatileCell, -} -#[doc = "Pretended Networking Wake Up Match Register"] -pub mod wu_mtc; -#[doc = "Pretended Networking ID Filter 1 Register"] -pub struct FLT_ID1 { - register: VolatileCell, -} -#[doc = "Pretended Networking ID Filter 1 Register"] -pub mod flt_id1; -#[doc = "Pretended Networking DLC Filter Register"] -pub struct FLT_DLC { - register: VolatileCell, -} -#[doc = "Pretended Networking DLC Filter Register"] -pub mod flt_dlc; -#[doc = "Pretended Networking Payload Low Filter 1 Register"] -pub struct PL1_LO { - register: VolatileCell, -} -#[doc = "Pretended Networking Payload Low Filter 1 Register"] -pub mod pl1_lo; -#[doc = "Pretended Networking Payload High Filter 1 Register"] -pub struct PL1_HI { - register: VolatileCell, -} -#[doc = "Pretended Networking Payload High Filter 1 Register"] -pub mod pl1_hi; -#[doc = "Pretended Networking ID Filter 2 Register / ID Mask Register"] -pub struct FLT_ID2_IDMASK { - register: VolatileCell, -} -#[doc = "Pretended Networking ID Filter 2 Register / ID Mask Register"] -pub mod flt_id2_idmask; -#[doc = "Pretended Networking Payload Low Filter 2 Register / Payload Low Mask Register"] -pub struct PL2_PLMASK_LO { - register: VolatileCell, -} -#[doc = "Pretended Networking Payload Low Filter 2 Register / Payload Low Mask Register"] -pub mod pl2_plmask_lo; -#[doc = "Pretended Networking Payload High Filter 2 low order bits / Payload High Mask Register"] -pub struct PL2_PLMASK_HI { - register: VolatileCell, -} -#[doc = "Pretended Networking Payload High Filter 2 low order bits / Payload High Mask Register"] -pub mod pl2_plmask_hi; -#[doc = "Wake Up Message Buffer Register for C/S"] -pub struct WMB0_CS { - register: VolatileCell, -} -#[doc = "Wake Up Message Buffer Register for C/S"] -pub mod wmb0_cs; -#[doc = "Wake Up Message Buffer Register for ID"] -pub struct WMB0_ID { - register: VolatileCell, -} -#[doc = "Wake Up Message Buffer Register for ID"] -pub mod wmb0_id; -#[doc = "Wake Up Message Buffer Register for Data 0-3"] -pub struct WMB0_D03 { - register: VolatileCell, -} -#[doc = "Wake Up Message Buffer Register for Data 0-3"] -pub mod wmb0_d03; -#[doc = "Wake Up Message Buffer Register Data 4-7"] -pub struct WMB0_D47 { - register: VolatileCell, -} -#[doc = "Wake Up Message Buffer Register Data 4-7"] -pub mod wmb0_d47; -#[doc = "Wake Up Message Buffer Register for C/S"] -pub struct WMB1_CS { - register: VolatileCell, -} -#[doc = "Wake Up Message Buffer Register for C/S"] -pub mod wmb1_cs; -#[doc = "Wake Up Message Buffer Register for ID"] -pub struct WMB1_ID { - register: VolatileCell, -} -#[doc = "Wake Up Message Buffer Register for ID"] -pub mod wmb1_id; -#[doc = "Wake Up Message Buffer Register for Data 0-3"] -pub struct WMB1_D03 { - register: VolatileCell, -} -#[doc = "Wake Up Message Buffer Register for Data 0-3"] -pub mod wmb1_d03; -#[doc = "Wake Up Message Buffer Register Data 4-7"] -pub struct WMB1_D47 { - register: VolatileCell, -} -#[doc = "Wake Up Message Buffer Register Data 4-7"] -pub mod wmb1_d47; -#[doc = "Wake Up Message Buffer Register for C/S"] -pub struct WMB2_CS { - register: VolatileCell, -} -#[doc = "Wake Up Message Buffer Register for C/S"] -pub mod wmb2_cs; -#[doc = "Wake Up Message Buffer Register for ID"] -pub struct WMB2_ID { - register: VolatileCell, -} -#[doc = "Wake Up Message Buffer Register for ID"] -pub mod wmb2_id; -#[doc = "Wake Up Message Buffer Register for Data 0-3"] -pub struct WMB2_D03 { - register: VolatileCell, -} -#[doc = "Wake Up Message Buffer Register for Data 0-3"] -pub mod wmb2_d03; -#[doc = "Wake Up Message Buffer Register Data 4-7"] -pub struct WMB2_D47 { - register: VolatileCell, -} -#[doc = "Wake Up Message Buffer Register Data 4-7"] -pub mod wmb2_d47; -#[doc = "Wake Up Message Buffer Register for C/S"] -pub struct WMB3_CS { - register: VolatileCell, -} -#[doc = "Wake Up Message Buffer Register for C/S"] -pub mod wmb3_cs; -#[doc = "Wake Up Message Buffer Register for ID"] -pub struct WMB3_ID { - register: VolatileCell, -} -#[doc = "Wake Up Message Buffer Register for ID"] -pub mod wmb3_id; -#[doc = "Wake Up Message Buffer Register for Data 0-3"] -pub struct WMB3_D03 { - register: VolatileCell, -} -#[doc = "Wake Up Message Buffer Register for Data 0-3"] -pub mod wmb3_d03; -#[doc = "Wake Up Message Buffer Register Data 4-7"] -pub struct WMB3_D47 { - register: VolatileCell, -} -#[doc = "Wake Up Message Buffer Register Data 4-7"] -pub mod wmb3_d47; -#[doc = "CAN FD Control Register"] -pub struct FDCTRL { - register: VolatileCell, -} -#[doc = "CAN FD Control Register"] -pub mod fdctrl; -#[doc = "CAN FD Bit Timing Register"] -pub struct FDCBT { - register: VolatileCell, -} -#[doc = "CAN FD Bit Timing Register"] -pub mod fdcbt; -#[doc = "CAN FD CRC Register"] -pub struct FDCRC { - register: VolatileCell, -} -#[doc = "CAN FD CRC Register"] -pub mod fdcrc; diff --git a/src/can2/pl1_hi/mod.rs b/src/can2/pl1_hi/mod.rs deleted file mode 100644 index ab431b7..0000000 --- a/src/can2/pl1_hi/mod.rs +++ /dev/null @@ -1,228 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::PL1_HI { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_7R { - bits: u8, -} -impl DATA_BYTE_7R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_6R { - bits: u8, -} -impl DATA_BYTE_6R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_5R { - bits: u8, -} -impl DATA_BYTE_5R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_4R { - bits: u8, -} -impl DATA_BYTE_4R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Proxy"] -pub struct _DATA_BYTE_7W<'a> { - w: &'a mut W, -} -impl<'a> _DATA_BYTE_7W<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 255; - const OFFSET: u8 = 0; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = r" Proxy"] -pub struct _DATA_BYTE_6W<'a> { - w: &'a mut W, -} -impl<'a> _DATA_BYTE_6W<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 255; - const OFFSET: u8 = 8; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = r" Proxy"] -pub struct _DATA_BYTE_5W<'a> { - w: &'a mut W, -} -impl<'a> _DATA_BYTE_5W<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 255; - const OFFSET: u8 = 16; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = r" Proxy"] -pub struct _DATA_BYTE_4W<'a> { - w: &'a mut W, -} -impl<'a> _DATA_BYTE_4W<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 255; - const OFFSET: u8 = 24; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:7 - Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 7."] - #[inline] - pub fn data_byte_7(&self) -> DATA_BYTE_7R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_7R { bits } - } - #[doc = "Bits 8:15 - Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 6."] - #[inline] - pub fn data_byte_6(&self) -> DATA_BYTE_6R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 8; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_6R { bits } - } - #[doc = "Bits 16:23 - Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 5."] - #[inline] - pub fn data_byte_5(&self) -> DATA_BYTE_5R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 16; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_5R { bits } - } - #[doc = "Bits 24:31 - Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 4."] - #[inline] - pub fn data_byte_4(&self) -> DATA_BYTE_4R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 24; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_4R { bits } - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 0 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bits 0:7 - Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 7."] - #[inline] - pub fn data_byte_7(&mut self) -> _DATA_BYTE_7W { - _DATA_BYTE_7W { w: self } - } - #[doc = "Bits 8:15 - Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 6."] - #[inline] - pub fn data_byte_6(&mut self) -> _DATA_BYTE_6W { - _DATA_BYTE_6W { w: self } - } - #[doc = "Bits 16:23 - Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 5."] - #[inline] - pub fn data_byte_5(&mut self) -> _DATA_BYTE_5W { - _DATA_BYTE_5W { w: self } - } - #[doc = "Bits 24:31 - Payload Filter 1 high order bits for Pretended Networking payload filtering corresponding to the data byte 4."] - #[inline] - pub fn data_byte_4(&mut self) -> _DATA_BYTE_4W { - _DATA_BYTE_4W { w: self } - } -} diff --git a/src/can2/pl1_lo/mod.rs b/src/can2/pl1_lo/mod.rs deleted file mode 100644 index 6e07f19..0000000 --- a/src/can2/pl1_lo/mod.rs +++ /dev/null @@ -1,228 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::PL1_LO { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_3R { - bits: u8, -} -impl DATA_BYTE_3R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_2R { - bits: u8, -} -impl DATA_BYTE_2R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_1R { - bits: u8, -} -impl DATA_BYTE_1R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_0R { - bits: u8, -} -impl DATA_BYTE_0R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Proxy"] -pub struct _DATA_BYTE_3W<'a> { - w: &'a mut W, -} -impl<'a> _DATA_BYTE_3W<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 255; - const OFFSET: u8 = 0; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = r" Proxy"] -pub struct _DATA_BYTE_2W<'a> { - w: &'a mut W, -} -impl<'a> _DATA_BYTE_2W<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 255; - const OFFSET: u8 = 8; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = r" Proxy"] -pub struct _DATA_BYTE_1W<'a> { - w: &'a mut W, -} -impl<'a> _DATA_BYTE_1W<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 255; - const OFFSET: u8 = 16; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = r" Proxy"] -pub struct _DATA_BYTE_0W<'a> { - w: &'a mut W, -} -impl<'a> _DATA_BYTE_0W<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 255; - const OFFSET: u8 = 24; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:7 - Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 3."] - #[inline] - pub fn data_byte_3(&self) -> DATA_BYTE_3R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_3R { bits } - } - #[doc = "Bits 8:15 - Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 2."] - #[inline] - pub fn data_byte_2(&self) -> DATA_BYTE_2R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 8; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_2R { bits } - } - #[doc = "Bits 16:23 - Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 1."] - #[inline] - pub fn data_byte_1(&self) -> DATA_BYTE_1R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 16; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_1R { bits } - } - #[doc = "Bits 24:31 - Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 0."] - #[inline] - pub fn data_byte_0(&self) -> DATA_BYTE_0R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 24; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_0R { bits } - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 0 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bits 0:7 - Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 3."] - #[inline] - pub fn data_byte_3(&mut self) -> _DATA_BYTE_3W { - _DATA_BYTE_3W { w: self } - } - #[doc = "Bits 8:15 - Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 2."] - #[inline] - pub fn data_byte_2(&mut self) -> _DATA_BYTE_2W { - _DATA_BYTE_2W { w: self } - } - #[doc = "Bits 16:23 - Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 1."] - #[inline] - pub fn data_byte_1(&mut self) -> _DATA_BYTE_1W { - _DATA_BYTE_1W { w: self } - } - #[doc = "Bits 24:31 - Payload Filter 1 low order bits for Pretended Networking payload filtering corresponding to the data byte 0."] - #[inline] - pub fn data_byte_0(&mut self) -> _DATA_BYTE_0W { - _DATA_BYTE_0W { w: self } - } -} diff --git a/src/can2/pl2_plmask_hi/mod.rs b/src/can2/pl2_plmask_hi/mod.rs deleted file mode 100644 index 32cc6bd..0000000 --- a/src/can2/pl2_plmask_hi/mod.rs +++ /dev/null @@ -1,228 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::PL2_PLMASK_HI { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_7R { - bits: u8, -} -impl DATA_BYTE_7R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_6R { - bits: u8, -} -impl DATA_BYTE_6R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_5R { - bits: u8, -} -impl DATA_BYTE_5R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_4R { - bits: u8, -} -impl DATA_BYTE_4R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Proxy"] -pub struct _DATA_BYTE_7W<'a> { - w: &'a mut W, -} -impl<'a> _DATA_BYTE_7W<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 255; - const OFFSET: u8 = 0; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = r" Proxy"] -pub struct _DATA_BYTE_6W<'a> { - w: &'a mut W, -} -impl<'a> _DATA_BYTE_6W<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 255; - const OFFSET: u8 = 8; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = r" Proxy"] -pub struct _DATA_BYTE_5W<'a> { - w: &'a mut W, -} -impl<'a> _DATA_BYTE_5W<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 255; - const OFFSET: u8 = 16; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = r" Proxy"] -pub struct _DATA_BYTE_4W<'a> { - w: &'a mut W, -} -impl<'a> _DATA_BYTE_4W<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 255; - const OFFSET: u8 = 24; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:7 - Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 7."] - #[inline] - pub fn data_byte_7(&self) -> DATA_BYTE_7R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_7R { bits } - } - #[doc = "Bits 8:15 - Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 6."] - #[inline] - pub fn data_byte_6(&self) -> DATA_BYTE_6R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 8; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_6R { bits } - } - #[doc = "Bits 16:23 - Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 5."] - #[inline] - pub fn data_byte_5(&self) -> DATA_BYTE_5R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 16; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_5R { bits } - } - #[doc = "Bits 24:31 - Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 4."] - #[inline] - pub fn data_byte_4(&self) -> DATA_BYTE_4R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 24; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_4R { bits } - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 0 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bits 0:7 - Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 7."] - #[inline] - pub fn data_byte_7(&mut self) -> _DATA_BYTE_7W { - _DATA_BYTE_7W { w: self } - } - #[doc = "Bits 8:15 - Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 6."] - #[inline] - pub fn data_byte_6(&mut self) -> _DATA_BYTE_6W { - _DATA_BYTE_6W { w: self } - } - #[doc = "Bits 16:23 - Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 5."] - #[inline] - pub fn data_byte_5(&mut self) -> _DATA_BYTE_5W { - _DATA_BYTE_5W { w: self } - } - #[doc = "Bits 24:31 - Payload Filter 2 high order bits / Payload Mask high order bits for Pretended Networking payload filtering corresponding to the data byte 4."] - #[inline] - pub fn data_byte_4(&mut self) -> _DATA_BYTE_4W { - _DATA_BYTE_4W { w: self } - } -} diff --git a/src/can2/pl2_plmask_lo/mod.rs b/src/can2/pl2_plmask_lo/mod.rs deleted file mode 100644 index 358d16f..0000000 --- a/src/can2/pl2_plmask_lo/mod.rs +++ /dev/null @@ -1,228 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::PL2_PLMASK_LO { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_3R { - bits: u8, -} -impl DATA_BYTE_3R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_2R { - bits: u8, -} -impl DATA_BYTE_2R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_1R { - bits: u8, -} -impl DATA_BYTE_1R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_0R { - bits: u8, -} -impl DATA_BYTE_0R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Proxy"] -pub struct _DATA_BYTE_3W<'a> { - w: &'a mut W, -} -impl<'a> _DATA_BYTE_3W<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 255; - const OFFSET: u8 = 0; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = r" Proxy"] -pub struct _DATA_BYTE_2W<'a> { - w: &'a mut W, -} -impl<'a> _DATA_BYTE_2W<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 255; - const OFFSET: u8 = 8; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = r" Proxy"] -pub struct _DATA_BYTE_1W<'a> { - w: &'a mut W, -} -impl<'a> _DATA_BYTE_1W<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 255; - const OFFSET: u8 = 16; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = r" Proxy"] -pub struct _DATA_BYTE_0W<'a> { - w: &'a mut W, -} -impl<'a> _DATA_BYTE_0W<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 255; - const OFFSET: u8 = 24; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:7 - Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 3."] - #[inline] - pub fn data_byte_3(&self) -> DATA_BYTE_3R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_3R { bits } - } - #[doc = "Bits 8:15 - Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 2."] - #[inline] - pub fn data_byte_2(&self) -> DATA_BYTE_2R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 8; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_2R { bits } - } - #[doc = "Bits 16:23 - Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 1."] - #[inline] - pub fn data_byte_1(&self) -> DATA_BYTE_1R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 16; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_1R { bits } - } - #[doc = "Bits 24:31 - Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 0."] - #[inline] - pub fn data_byte_0(&self) -> DATA_BYTE_0R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 24; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_0R { bits } - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 0 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bits 0:7 - Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 3."] - #[inline] - pub fn data_byte_3(&mut self) -> _DATA_BYTE_3W { - _DATA_BYTE_3W { w: self } - } - #[doc = "Bits 8:15 - Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 2."] - #[inline] - pub fn data_byte_2(&mut self) -> _DATA_BYTE_2W { - _DATA_BYTE_2W { w: self } - } - #[doc = "Bits 16:23 - Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 1."] - #[inline] - pub fn data_byte_1(&mut self) -> _DATA_BYTE_1W { - _DATA_BYTE_1W { w: self } - } - #[doc = "Bits 24:31 - Payload Filter 2 low order bits / Payload Mask low order bits for Pretended Networking payload filtering corresponding to the data byte 0."] - #[inline] - pub fn data_byte_0(&mut self) -> _DATA_BYTE_0W { - _DATA_BYTE_0W { w: self } - } -} diff --git a/src/can2/rx14mask/mod.rs b/src/can2/rx14mask/mod.rs deleted file mode 100644 index 5670ed6..0000000 --- a/src/can2/rx14mask/mod.rs +++ /dev/null @@ -1,105 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::RX14MASK { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = r" Value of the field"] -pub struct RX14MR { - bits: u32, -} -impl RX14MR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } -} -#[doc = r" Proxy"] -pub struct _RX14MW<'a> { - w: &'a mut W, -} -impl<'a> _RX14MW<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u32) -> &'a mut W { - const MASK: u32 = 4294967295; - const OFFSET: u8 = 0; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:31 - Rx Buffer 14 Mask Bits"] - #[inline] - pub fn rx14m(&self) -> RX14MR { - let bits = { - const MASK: u32 = 4294967295; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u32 - }; - RX14MR { bits } - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 0 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bits 0:31 - Rx Buffer 14 Mask Bits"] - #[inline] - pub fn rx14m(&mut self) -> _RX14MW { - _RX14MW { w: self } - } -} diff --git a/src/can2/rx15mask/mod.rs b/src/can2/rx15mask/mod.rs deleted file mode 100644 index e97bce8..0000000 --- a/src/can2/rx15mask/mod.rs +++ /dev/null @@ -1,105 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::RX15MASK { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = r" Value of the field"] -pub struct RX15MR { - bits: u32, -} -impl RX15MR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } -} -#[doc = r" Proxy"] -pub struct _RX15MW<'a> { - w: &'a mut W, -} -impl<'a> _RX15MW<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u32) -> &'a mut W { - const MASK: u32 = 4294967295; - const OFFSET: u8 = 0; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:31 - Rx Buffer 15 Mask Bits"] - #[inline] - pub fn rx15m(&self) -> RX15MR { - let bits = { - const MASK: u32 = 4294967295; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u32 - }; - RX15MR { bits } - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 0 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bits 0:31 - Rx Buffer 15 Mask Bits"] - #[inline] - pub fn rx15m(&mut self) -> _RX15MW { - _RX15MW { w: self } - } -} diff --git a/src/can2/rxfgmask/mod.rs b/src/can2/rxfgmask/mod.rs deleted file mode 100644 index db4555e..0000000 --- a/src/can2/rxfgmask/mod.rs +++ /dev/null @@ -1,105 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::RXFGMASK { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = r" Value of the field"] -pub struct FGMR { - bits: u32, -} -impl FGMR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } -} -#[doc = r" Proxy"] -pub struct _FGMW<'a> { - w: &'a mut W, -} -impl<'a> _FGMW<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u32) -> &'a mut W { - const MASK: u32 = 4294967295; - const OFFSET: u8 = 0; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:31 - Rx FIFO Global Mask Bits"] - #[inline] - pub fn fgm(&self) -> FGMR { - let bits = { - const MASK: u32 = 4294967295; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u32 - }; - FGMR { bits } - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 0 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bits 0:31 - Rx FIFO Global Mask Bits"] - #[inline] - pub fn fgm(&mut self) -> _FGMW { - _FGMW { w: self } - } -} diff --git a/src/can2/rxfir/mod.rs b/src/can2/rxfir/mod.rs deleted file mode 100644 index 2221db3..0000000 --- a/src/can2/rxfir/mod.rs +++ /dev/null @@ -1,41 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -impl super::RXFIR { - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } -} -#[doc = r" Value of the field"] -pub struct IDHITR { - bits: u16, -} -impl IDHITR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u16 { - self.bits - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:8 - Identifier Acceptance Filter Hit Indicator"] - #[inline] - pub fn idhit(&self) -> IDHITR { - let bits = { - const MASK: u16 = 511; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u16 - }; - IDHITR { bits } - } -} diff --git a/src/can2/rximr0/mod.rs b/src/can2/rximr0/mod.rs deleted file mode 100644 index 301c690..0000000 --- a/src/can2/rximr0/mod.rs +++ /dev/null @@ -1,105 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::RXIMR0 { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = r" Value of the field"] -pub struct MIR { - bits: u32, -} -impl MIR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } -} -#[doc = r" Proxy"] -pub struct _MIW<'a> { - w: &'a mut W, -} -impl<'a> _MIW<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u32) -> &'a mut W { - const MASK: u32 = 4294967295; - const OFFSET: u8 = 0; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:31 - Individual Mask Bits"] - #[inline] - pub fn mi(&self) -> MIR { - let bits = { - const MASK: u32 = 4294967295; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u32 - }; - MIR { bits } - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 0 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bits 0:31 - Individual Mask Bits"] - #[inline] - pub fn mi(&mut self) -> _MIW { - _MIW { w: self } - } -} diff --git a/src/can2/rximr1/mod.rs b/src/can2/rximr1/mod.rs deleted file mode 100644 index fb71a89..0000000 --- a/src/can2/rximr1/mod.rs +++ /dev/null @@ -1,105 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::RXIMR1 { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = r" Value of the field"] -pub struct MIR { - bits: u32, -} -impl MIR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } -} -#[doc = r" Proxy"] -pub struct _MIW<'a> { - w: &'a mut W, -} -impl<'a> _MIW<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u32) -> &'a mut W { - const MASK: u32 = 4294967295; - const OFFSET: u8 = 0; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:31 - Individual Mask Bits"] - #[inline] - pub fn mi(&self) -> MIR { - let bits = { - const MASK: u32 = 4294967295; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u32 - }; - MIR { bits } - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 0 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bits 0:31 - Individual Mask Bits"] - #[inline] - pub fn mi(&mut self) -> _MIW { - _MIW { w: self } - } -} diff --git a/src/can2/rximr10/mod.rs b/src/can2/rximr10/mod.rs deleted file mode 100644 index b43cc60..0000000 --- a/src/can2/rximr10/mod.rs +++ /dev/null @@ -1,105 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::RXIMR10 { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = r" Value of the field"] -pub struct MIR { - bits: u32, -} -impl MIR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } -} -#[doc = r" Proxy"] -pub struct _MIW<'a> { - w: &'a mut W, -} -impl<'a> _MIW<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u32) -> &'a mut W { - const MASK: u32 = 4294967295; - const OFFSET: u8 = 0; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:31 - Individual Mask Bits"] - #[inline] - pub fn mi(&self) -> MIR { - let bits = { - const MASK: u32 = 4294967295; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u32 - }; - MIR { bits } - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 0 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bits 0:31 - Individual Mask Bits"] - #[inline] - pub fn mi(&mut self) -> _MIW { - _MIW { w: self } - } -} diff --git a/src/can2/rximr11/mod.rs b/src/can2/rximr11/mod.rs deleted file mode 100644 index 644a727..0000000 --- a/src/can2/rximr11/mod.rs +++ /dev/null @@ -1,105 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::RXIMR11 { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = r" Value of the field"] -pub struct MIR { - bits: u32, -} -impl MIR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } -} -#[doc = r" Proxy"] -pub struct _MIW<'a> { - w: &'a mut W, -} -impl<'a> _MIW<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u32) -> &'a mut W { - const MASK: u32 = 4294967295; - const OFFSET: u8 = 0; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:31 - Individual Mask Bits"] - #[inline] - pub fn mi(&self) -> MIR { - let bits = { - const MASK: u32 = 4294967295; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u32 - }; - MIR { bits } - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 0 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bits 0:31 - Individual Mask Bits"] - #[inline] - pub fn mi(&mut self) -> _MIW { - _MIW { w: self } - } -} diff --git a/src/can2/rximr12/mod.rs b/src/can2/rximr12/mod.rs deleted file mode 100644 index 779cda3..0000000 --- a/src/can2/rximr12/mod.rs +++ /dev/null @@ -1,105 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::RXIMR12 { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = r" Value of the field"] -pub struct MIR { - bits: u32, -} -impl MIR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } -} -#[doc = r" Proxy"] -pub struct _MIW<'a> { - w: &'a mut W, -} -impl<'a> _MIW<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u32) -> &'a mut W { - const MASK: u32 = 4294967295; - const OFFSET: u8 = 0; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:31 - Individual Mask Bits"] - #[inline] - pub fn mi(&self) -> MIR { - let bits = { - const MASK: u32 = 4294967295; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u32 - }; - MIR { bits } - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 0 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bits 0:31 - Individual Mask Bits"] - #[inline] - pub fn mi(&mut self) -> _MIW { - _MIW { w: self } - } -} diff --git a/src/can2/rximr13/mod.rs b/src/can2/rximr13/mod.rs deleted file mode 100644 index b457c29..0000000 --- a/src/can2/rximr13/mod.rs +++ /dev/null @@ -1,105 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::RXIMR13 { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = r" Value of the field"] -pub struct MIR { - bits: u32, -} -impl MIR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } -} -#[doc = r" Proxy"] -pub struct _MIW<'a> { - w: &'a mut W, -} -impl<'a> _MIW<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u32) -> &'a mut W { - const MASK: u32 = 4294967295; - const OFFSET: u8 = 0; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:31 - Individual Mask Bits"] - #[inline] - pub fn mi(&self) -> MIR { - let bits = { - const MASK: u32 = 4294967295; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u32 - }; - MIR { bits } - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 0 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bits 0:31 - Individual Mask Bits"] - #[inline] - pub fn mi(&mut self) -> _MIW { - _MIW { w: self } - } -} diff --git a/src/can2/rximr14/mod.rs b/src/can2/rximr14/mod.rs deleted file mode 100644 index d637965..0000000 --- a/src/can2/rximr14/mod.rs +++ /dev/null @@ -1,105 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::RXIMR14 { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = r" Value of the field"] -pub struct MIR { - bits: u32, -} -impl MIR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } -} -#[doc = r" Proxy"] -pub struct _MIW<'a> { - w: &'a mut W, -} -impl<'a> _MIW<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u32) -> &'a mut W { - const MASK: u32 = 4294967295; - const OFFSET: u8 = 0; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:31 - Individual Mask Bits"] - #[inline] - pub fn mi(&self) -> MIR { - let bits = { - const MASK: u32 = 4294967295; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u32 - }; - MIR { bits } - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 0 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bits 0:31 - Individual Mask Bits"] - #[inline] - pub fn mi(&mut self) -> _MIW { - _MIW { w: self } - } -} diff --git a/src/can2/rximr15/mod.rs b/src/can2/rximr15/mod.rs deleted file mode 100644 index 8b60538..0000000 --- a/src/can2/rximr15/mod.rs +++ /dev/null @@ -1,105 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::RXIMR15 { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = r" Value of the field"] -pub struct MIR { - bits: u32, -} -impl MIR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } -} -#[doc = r" Proxy"] -pub struct _MIW<'a> { - w: &'a mut W, -} -impl<'a> _MIW<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u32) -> &'a mut W { - const MASK: u32 = 4294967295; - const OFFSET: u8 = 0; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:31 - Individual Mask Bits"] - #[inline] - pub fn mi(&self) -> MIR { - let bits = { - const MASK: u32 = 4294967295; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u32 - }; - MIR { bits } - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 0 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bits 0:31 - Individual Mask Bits"] - #[inline] - pub fn mi(&mut self) -> _MIW { - _MIW { w: self } - } -} diff --git a/src/can2/rximr2/mod.rs b/src/can2/rximr2/mod.rs deleted file mode 100644 index b79c370..0000000 --- a/src/can2/rximr2/mod.rs +++ /dev/null @@ -1,105 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::RXIMR2 { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = r" Value of the field"] -pub struct MIR { - bits: u32, -} -impl MIR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } -} -#[doc = r" Proxy"] -pub struct _MIW<'a> { - w: &'a mut W, -} -impl<'a> _MIW<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u32) -> &'a mut W { - const MASK: u32 = 4294967295; - const OFFSET: u8 = 0; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:31 - Individual Mask Bits"] - #[inline] - pub fn mi(&self) -> MIR { - let bits = { - const MASK: u32 = 4294967295; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u32 - }; - MIR { bits } - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 0 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bits 0:31 - Individual Mask Bits"] - #[inline] - pub fn mi(&mut self) -> _MIW { - _MIW { w: self } - } -} diff --git a/src/can2/rximr3/mod.rs b/src/can2/rximr3/mod.rs deleted file mode 100644 index dc21ee1..0000000 --- a/src/can2/rximr3/mod.rs +++ /dev/null @@ -1,105 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::RXIMR3 { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = r" Value of the field"] -pub struct MIR { - bits: u32, -} -impl MIR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } -} -#[doc = r" Proxy"] -pub struct _MIW<'a> { - w: &'a mut W, -} -impl<'a> _MIW<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u32) -> &'a mut W { - const MASK: u32 = 4294967295; - const OFFSET: u8 = 0; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:31 - Individual Mask Bits"] - #[inline] - pub fn mi(&self) -> MIR { - let bits = { - const MASK: u32 = 4294967295; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u32 - }; - MIR { bits } - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 0 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bits 0:31 - Individual Mask Bits"] - #[inline] - pub fn mi(&mut self) -> _MIW { - _MIW { w: self } - } -} diff --git a/src/can2/rximr4/mod.rs b/src/can2/rximr4/mod.rs deleted file mode 100644 index 2a5d5a7..0000000 --- a/src/can2/rximr4/mod.rs +++ /dev/null @@ -1,105 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::RXIMR4 { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = r" Value of the field"] -pub struct MIR { - bits: u32, -} -impl MIR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } -} -#[doc = r" Proxy"] -pub struct _MIW<'a> { - w: &'a mut W, -} -impl<'a> _MIW<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u32) -> &'a mut W { - const MASK: u32 = 4294967295; - const OFFSET: u8 = 0; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:31 - Individual Mask Bits"] - #[inline] - pub fn mi(&self) -> MIR { - let bits = { - const MASK: u32 = 4294967295; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u32 - }; - MIR { bits } - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 0 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bits 0:31 - Individual Mask Bits"] - #[inline] - pub fn mi(&mut self) -> _MIW { - _MIW { w: self } - } -} diff --git a/src/can2/rximr5/mod.rs b/src/can2/rximr5/mod.rs deleted file mode 100644 index 7500c7a..0000000 --- a/src/can2/rximr5/mod.rs +++ /dev/null @@ -1,105 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::RXIMR5 { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = r" Value of the field"] -pub struct MIR { - bits: u32, -} -impl MIR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } -} -#[doc = r" Proxy"] -pub struct _MIW<'a> { - w: &'a mut W, -} -impl<'a> _MIW<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u32) -> &'a mut W { - const MASK: u32 = 4294967295; - const OFFSET: u8 = 0; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:31 - Individual Mask Bits"] - #[inline] - pub fn mi(&self) -> MIR { - let bits = { - const MASK: u32 = 4294967295; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u32 - }; - MIR { bits } - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 0 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bits 0:31 - Individual Mask Bits"] - #[inline] - pub fn mi(&mut self) -> _MIW { - _MIW { w: self } - } -} diff --git a/src/can2/rximr6/mod.rs b/src/can2/rximr6/mod.rs deleted file mode 100644 index c7582e2..0000000 --- a/src/can2/rximr6/mod.rs +++ /dev/null @@ -1,105 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::RXIMR6 { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = r" Value of the field"] -pub struct MIR { - bits: u32, -} -impl MIR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } -} -#[doc = r" Proxy"] -pub struct _MIW<'a> { - w: &'a mut W, -} -impl<'a> _MIW<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u32) -> &'a mut W { - const MASK: u32 = 4294967295; - const OFFSET: u8 = 0; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:31 - Individual Mask Bits"] - #[inline] - pub fn mi(&self) -> MIR { - let bits = { - const MASK: u32 = 4294967295; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u32 - }; - MIR { bits } - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 0 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bits 0:31 - Individual Mask Bits"] - #[inline] - pub fn mi(&mut self) -> _MIW { - _MIW { w: self } - } -} diff --git a/src/can2/rximr7/mod.rs b/src/can2/rximr7/mod.rs deleted file mode 100644 index a5de575..0000000 --- a/src/can2/rximr7/mod.rs +++ /dev/null @@ -1,105 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::RXIMR7 { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = r" Value of the field"] -pub struct MIR { - bits: u32, -} -impl MIR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } -} -#[doc = r" Proxy"] -pub struct _MIW<'a> { - w: &'a mut W, -} -impl<'a> _MIW<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u32) -> &'a mut W { - const MASK: u32 = 4294967295; - const OFFSET: u8 = 0; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:31 - Individual Mask Bits"] - #[inline] - pub fn mi(&self) -> MIR { - let bits = { - const MASK: u32 = 4294967295; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u32 - }; - MIR { bits } - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 0 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bits 0:31 - Individual Mask Bits"] - #[inline] - pub fn mi(&mut self) -> _MIW { - _MIW { w: self } - } -} diff --git a/src/can2/rximr8/mod.rs b/src/can2/rximr8/mod.rs deleted file mode 100644 index 626ec56..0000000 --- a/src/can2/rximr8/mod.rs +++ /dev/null @@ -1,105 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::RXIMR8 { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = r" Value of the field"] -pub struct MIR { - bits: u32, -} -impl MIR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } -} -#[doc = r" Proxy"] -pub struct _MIW<'a> { - w: &'a mut W, -} -impl<'a> _MIW<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u32) -> &'a mut W { - const MASK: u32 = 4294967295; - const OFFSET: u8 = 0; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:31 - Individual Mask Bits"] - #[inline] - pub fn mi(&self) -> MIR { - let bits = { - const MASK: u32 = 4294967295; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u32 - }; - MIR { bits } - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 0 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bits 0:31 - Individual Mask Bits"] - #[inline] - pub fn mi(&mut self) -> _MIW { - _MIW { w: self } - } -} diff --git a/src/can2/rximr9/mod.rs b/src/can2/rximr9/mod.rs deleted file mode 100644 index 4acd2f7..0000000 --- a/src/can2/rximr9/mod.rs +++ /dev/null @@ -1,105 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::RXIMR9 { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = r" Value of the field"] -pub struct MIR { - bits: u32, -} -impl MIR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } -} -#[doc = r" Proxy"] -pub struct _MIW<'a> { - w: &'a mut W, -} -impl<'a> _MIW<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u32) -> &'a mut W { - const MASK: u32 = 4294967295; - const OFFSET: u8 = 0; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:31 - Individual Mask Bits"] - #[inline] - pub fn mi(&self) -> MIR { - let bits = { - const MASK: u32 = 4294967295; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u32 - }; - MIR { bits } - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 0 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bits 0:31 - Individual Mask Bits"] - #[inline] - pub fn mi(&mut self) -> _MIW { - _MIW { w: self } - } -} diff --git a/src/can2/rxmgmask/mod.rs b/src/can2/rxmgmask/mod.rs deleted file mode 100644 index dc87f29..0000000 --- a/src/can2/rxmgmask/mod.rs +++ /dev/null @@ -1,105 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::RXMGMASK { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = r" Value of the field"] -pub struct MGR { - bits: u32, -} -impl MGR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } -} -#[doc = r" Proxy"] -pub struct _MGW<'a> { - w: &'a mut W, -} -impl<'a> _MGW<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u32) -> &'a mut W { - const MASK: u32 = 4294967295; - const OFFSET: u8 = 0; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:31 - Rx Mailboxes Global Mask Bits"] - #[inline] - pub fn mg(&self) -> MGR { - let bits = { - const MASK: u32 = 4294967295; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u32 - }; - MGR { bits } - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 0 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bits 0:31 - Rx Mailboxes Global Mask Bits"] - #[inline] - pub fn mg(&mut self) -> _MGW { - _MGW { w: self } - } -} diff --git a/src/can2/timer/mod.rs b/src/can2/timer/mod.rs deleted file mode 100644 index 7a46bca..0000000 --- a/src/can2/timer/mod.rs +++ /dev/null @@ -1,105 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::TIMER { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = r" Value of the field"] -pub struct TIMERR { - bits: u16, -} -impl TIMERR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u16 { - self.bits - } -} -#[doc = r" Proxy"] -pub struct _TIMERW<'a> { - w: &'a mut W, -} -impl<'a> _TIMERW<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u16) -> &'a mut W { - const MASK: u16 = 65535; - const OFFSET: u8 = 0; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:15 - Timer Value"] - #[inline] - pub fn timer(&self) -> TIMERR { - let bits = { - const MASK: u16 = 65535; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u16 - }; - TIMERR { bits } - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 0 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bits 0:15 - Timer Value"] - #[inline] - pub fn timer(&mut self) -> _TIMERW { - _TIMERW { w: self } - } -} diff --git a/src/can2/wmb0_cs/mod.rs b/src/can2/wmb0_cs/mod.rs deleted file mode 100644 index fa731f4..0000000 --- a/src/can2/wmb0_cs/mod.rs +++ /dev/null @@ -1,180 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -impl super::WMB0_CS { - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } -} -#[doc = r" Value of the field"] -pub struct DLCR { - bits: u8, -} -impl DLCR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = "Possible values of the field `RTR`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum RTRR { - #[doc = "Frame is data one (not remote)"] _0, - #[doc = "Frame is a remote one"] _1, -} -impl RTRR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - RTRR::_0 => false, - RTRR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> RTRR { - match value { - false => RTRR::_0, - true => RTRR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == RTRR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == RTRR::_1 - } -} -#[doc = "Possible values of the field `IDE`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum IDER { - #[doc = "Frame format is standard"] _0, - #[doc = "Frame format is extended"] _1, -} -impl IDER { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - IDER::_0 => false, - IDER::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> IDER { - match value { - false => IDER::_0, - true => IDER::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == IDER::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == IDER::_1 - } -} -#[doc = r" Value of the field"] -pub struct SRRR { - bits: bool, -} -impl SRRR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - self.bits - } - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 16:19 - Length of Data in Bytes"] - #[inline] - pub fn dlc(&self) -> DLCR { - let bits = { - const MASK: u8 = 15; - const OFFSET: u8 = 16; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DLCR { bits } - } - #[doc = "Bit 20 - Remote Transmission Request Bit"] - #[inline] - pub fn rtr(&self) -> RTRR { - RTRR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 20; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 21 - ID Extended Bit"] - #[inline] - pub fn ide(&self) -> IDER { - IDER::_from({ - const MASK: bool = true; - const OFFSET: u8 = 21; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 22 - Substitute Remote Request"] - #[inline] - pub fn srr(&self) -> SRRR { - let bits = { - const MASK: bool = true; - const OFFSET: u8 = 22; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }; - SRRR { bits } - } -} diff --git a/src/can2/wmb0_d03/mod.rs b/src/can2/wmb0_d03/mod.rs deleted file mode 100644 index 90e28be..0000000 --- a/src/can2/wmb0_d03/mod.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -impl super::WMB0_D03 { - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_3R { - bits: u8, -} -impl DATA_BYTE_3R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_2R { - bits: u8, -} -impl DATA_BYTE_2R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_1R { - bits: u8, -} -impl DATA_BYTE_1R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_0R { - bits: u8, -} -impl DATA_BYTE_0R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:7 - Received payload corresponding to the data byte 3 under Pretended Networking mode"] - #[inline] - pub fn data_byte_3(&self) -> DATA_BYTE_3R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_3R { bits } - } - #[doc = "Bits 8:15 - Received payload corresponding to the data byte 2 under Pretended Networking mode"] - #[inline] - pub fn data_byte_2(&self) -> DATA_BYTE_2R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 8; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_2R { bits } - } - #[doc = "Bits 16:23 - Received payload corresponding to the data byte 1 under Pretended Networking mode"] - #[inline] - pub fn data_byte_1(&self) -> DATA_BYTE_1R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 16; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_1R { bits } - } - #[doc = "Bits 24:31 - Received payload corresponding to the data byte 0 under Pretended Networking mode"] - #[inline] - pub fn data_byte_0(&self) -> DATA_BYTE_0R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 24; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_0R { bits } - } -} diff --git a/src/can2/wmb0_d47/mod.rs b/src/can2/wmb0_d47/mod.rs deleted file mode 100644 index f567362..0000000 --- a/src/can2/wmb0_d47/mod.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -impl super::WMB0_D47 { - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_7R { - bits: u8, -} -impl DATA_BYTE_7R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_6R { - bits: u8, -} -impl DATA_BYTE_6R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_5R { - bits: u8, -} -impl DATA_BYTE_5R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_4R { - bits: u8, -} -impl DATA_BYTE_4R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:7 - Received payload corresponding to the data byte 7 under Pretended Networking mode"] - #[inline] - pub fn data_byte_7(&self) -> DATA_BYTE_7R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_7R { bits } - } - #[doc = "Bits 8:15 - Received payload corresponding to the data byte 6 under Pretended Networking mode"] - #[inline] - pub fn data_byte_6(&self) -> DATA_BYTE_6R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 8; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_6R { bits } - } - #[doc = "Bits 16:23 - Received payload corresponding to the data byte 5 under Pretended Networking mode"] - #[inline] - pub fn data_byte_5(&self) -> DATA_BYTE_5R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 16; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_5R { bits } - } - #[doc = "Bits 24:31 - Received payload corresponding to the data byte 4 under Pretended Networking mode"] - #[inline] - pub fn data_byte_4(&self) -> DATA_BYTE_4R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 24; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_4R { bits } - } -} diff --git a/src/can2/wmb0_id/mod.rs b/src/can2/wmb0_id/mod.rs deleted file mode 100644 index e76a1a5..0000000 --- a/src/can2/wmb0_id/mod.rs +++ /dev/null @@ -1,41 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -impl super::WMB0_ID { - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } -} -#[doc = r" Value of the field"] -pub struct IDR { - bits: u32, -} -impl IDR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:28 - Received ID under Pretended Networking mode"] - #[inline] - pub fn id(&self) -> IDR { - let bits = { - const MASK: u32 = 536870911; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u32 - }; - IDR { bits } - } -} diff --git a/src/can2/wmb1_cs/mod.rs b/src/can2/wmb1_cs/mod.rs deleted file mode 100644 index f54e732..0000000 --- a/src/can2/wmb1_cs/mod.rs +++ /dev/null @@ -1,180 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -impl super::WMB1_CS { - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } -} -#[doc = r" Value of the field"] -pub struct DLCR { - bits: u8, -} -impl DLCR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = "Possible values of the field `RTR`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum RTRR { - #[doc = "Frame is data one (not remote)"] _0, - #[doc = "Frame is a remote one"] _1, -} -impl RTRR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - RTRR::_0 => false, - RTRR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> RTRR { - match value { - false => RTRR::_0, - true => RTRR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == RTRR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == RTRR::_1 - } -} -#[doc = "Possible values of the field `IDE`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum IDER { - #[doc = "Frame format is standard"] _0, - #[doc = "Frame format is extended"] _1, -} -impl IDER { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - IDER::_0 => false, - IDER::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> IDER { - match value { - false => IDER::_0, - true => IDER::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == IDER::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == IDER::_1 - } -} -#[doc = r" Value of the field"] -pub struct SRRR { - bits: bool, -} -impl SRRR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - self.bits - } - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 16:19 - Length of Data in Bytes"] - #[inline] - pub fn dlc(&self) -> DLCR { - let bits = { - const MASK: u8 = 15; - const OFFSET: u8 = 16; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DLCR { bits } - } - #[doc = "Bit 20 - Remote Transmission Request Bit"] - #[inline] - pub fn rtr(&self) -> RTRR { - RTRR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 20; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 21 - ID Extended Bit"] - #[inline] - pub fn ide(&self) -> IDER { - IDER::_from({ - const MASK: bool = true; - const OFFSET: u8 = 21; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 22 - Substitute Remote Request"] - #[inline] - pub fn srr(&self) -> SRRR { - let bits = { - const MASK: bool = true; - const OFFSET: u8 = 22; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }; - SRRR { bits } - } -} diff --git a/src/can2/wmb1_d03/mod.rs b/src/can2/wmb1_d03/mod.rs deleted file mode 100644 index 7eb5aeb..0000000 --- a/src/can2/wmb1_d03/mod.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -impl super::WMB1_D03 { - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_3R { - bits: u8, -} -impl DATA_BYTE_3R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_2R { - bits: u8, -} -impl DATA_BYTE_2R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_1R { - bits: u8, -} -impl DATA_BYTE_1R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_0R { - bits: u8, -} -impl DATA_BYTE_0R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:7 - Received payload corresponding to the data byte 3 under Pretended Networking mode"] - #[inline] - pub fn data_byte_3(&self) -> DATA_BYTE_3R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_3R { bits } - } - #[doc = "Bits 8:15 - Received payload corresponding to the data byte 2 under Pretended Networking mode"] - #[inline] - pub fn data_byte_2(&self) -> DATA_BYTE_2R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 8; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_2R { bits } - } - #[doc = "Bits 16:23 - Received payload corresponding to the data byte 1 under Pretended Networking mode"] - #[inline] - pub fn data_byte_1(&self) -> DATA_BYTE_1R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 16; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_1R { bits } - } - #[doc = "Bits 24:31 - Received payload corresponding to the data byte 0 under Pretended Networking mode"] - #[inline] - pub fn data_byte_0(&self) -> DATA_BYTE_0R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 24; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_0R { bits } - } -} diff --git a/src/can2/wmb1_d47/mod.rs b/src/can2/wmb1_d47/mod.rs deleted file mode 100644 index b4df930..0000000 --- a/src/can2/wmb1_d47/mod.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -impl super::WMB1_D47 { - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_7R { - bits: u8, -} -impl DATA_BYTE_7R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_6R { - bits: u8, -} -impl DATA_BYTE_6R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_5R { - bits: u8, -} -impl DATA_BYTE_5R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_4R { - bits: u8, -} -impl DATA_BYTE_4R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:7 - Received payload corresponding to the data byte 7 under Pretended Networking mode"] - #[inline] - pub fn data_byte_7(&self) -> DATA_BYTE_7R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_7R { bits } - } - #[doc = "Bits 8:15 - Received payload corresponding to the data byte 6 under Pretended Networking mode"] - #[inline] - pub fn data_byte_6(&self) -> DATA_BYTE_6R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 8; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_6R { bits } - } - #[doc = "Bits 16:23 - Received payload corresponding to the data byte 5 under Pretended Networking mode"] - #[inline] - pub fn data_byte_5(&self) -> DATA_BYTE_5R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 16; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_5R { bits } - } - #[doc = "Bits 24:31 - Received payload corresponding to the data byte 4 under Pretended Networking mode"] - #[inline] - pub fn data_byte_4(&self) -> DATA_BYTE_4R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 24; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_4R { bits } - } -} diff --git a/src/can2/wmb1_id/mod.rs b/src/can2/wmb1_id/mod.rs deleted file mode 100644 index 5466ab1..0000000 --- a/src/can2/wmb1_id/mod.rs +++ /dev/null @@ -1,41 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -impl super::WMB1_ID { - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } -} -#[doc = r" Value of the field"] -pub struct IDR { - bits: u32, -} -impl IDR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:28 - Received ID under Pretended Networking mode"] - #[inline] - pub fn id(&self) -> IDR { - let bits = { - const MASK: u32 = 536870911; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u32 - }; - IDR { bits } - } -} diff --git a/src/can2/wmb2_cs/mod.rs b/src/can2/wmb2_cs/mod.rs deleted file mode 100644 index f37b0a2..0000000 --- a/src/can2/wmb2_cs/mod.rs +++ /dev/null @@ -1,180 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -impl super::WMB2_CS { - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } -} -#[doc = r" Value of the field"] -pub struct DLCR { - bits: u8, -} -impl DLCR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = "Possible values of the field `RTR`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum RTRR { - #[doc = "Frame is data one (not remote)"] _0, - #[doc = "Frame is a remote one"] _1, -} -impl RTRR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - RTRR::_0 => false, - RTRR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> RTRR { - match value { - false => RTRR::_0, - true => RTRR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == RTRR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == RTRR::_1 - } -} -#[doc = "Possible values of the field `IDE`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum IDER { - #[doc = "Frame format is standard"] _0, - #[doc = "Frame format is extended"] _1, -} -impl IDER { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - IDER::_0 => false, - IDER::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> IDER { - match value { - false => IDER::_0, - true => IDER::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == IDER::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == IDER::_1 - } -} -#[doc = r" Value of the field"] -pub struct SRRR { - bits: bool, -} -impl SRRR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - self.bits - } - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 16:19 - Length of Data in Bytes"] - #[inline] - pub fn dlc(&self) -> DLCR { - let bits = { - const MASK: u8 = 15; - const OFFSET: u8 = 16; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DLCR { bits } - } - #[doc = "Bit 20 - Remote Transmission Request Bit"] - #[inline] - pub fn rtr(&self) -> RTRR { - RTRR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 20; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 21 - ID Extended Bit"] - #[inline] - pub fn ide(&self) -> IDER { - IDER::_from({ - const MASK: bool = true; - const OFFSET: u8 = 21; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 22 - Substitute Remote Request"] - #[inline] - pub fn srr(&self) -> SRRR { - let bits = { - const MASK: bool = true; - const OFFSET: u8 = 22; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }; - SRRR { bits } - } -} diff --git a/src/can2/wmb2_d03/mod.rs b/src/can2/wmb2_d03/mod.rs deleted file mode 100644 index 15406c4..0000000 --- a/src/can2/wmb2_d03/mod.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -impl super::WMB2_D03 { - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_3R { - bits: u8, -} -impl DATA_BYTE_3R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_2R { - bits: u8, -} -impl DATA_BYTE_2R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_1R { - bits: u8, -} -impl DATA_BYTE_1R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_0R { - bits: u8, -} -impl DATA_BYTE_0R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:7 - Received payload corresponding to the data byte 3 under Pretended Networking mode"] - #[inline] - pub fn data_byte_3(&self) -> DATA_BYTE_3R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_3R { bits } - } - #[doc = "Bits 8:15 - Received payload corresponding to the data byte 2 under Pretended Networking mode"] - #[inline] - pub fn data_byte_2(&self) -> DATA_BYTE_2R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 8; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_2R { bits } - } - #[doc = "Bits 16:23 - Received payload corresponding to the data byte 1 under Pretended Networking mode"] - #[inline] - pub fn data_byte_1(&self) -> DATA_BYTE_1R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 16; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_1R { bits } - } - #[doc = "Bits 24:31 - Received payload corresponding to the data byte 0 under Pretended Networking mode"] - #[inline] - pub fn data_byte_0(&self) -> DATA_BYTE_0R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 24; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_0R { bits } - } -} diff --git a/src/can2/wmb2_d47/mod.rs b/src/can2/wmb2_d47/mod.rs deleted file mode 100644 index 30b3c6b..0000000 --- a/src/can2/wmb2_d47/mod.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -impl super::WMB2_D47 { - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_7R { - bits: u8, -} -impl DATA_BYTE_7R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_6R { - bits: u8, -} -impl DATA_BYTE_6R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_5R { - bits: u8, -} -impl DATA_BYTE_5R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_4R { - bits: u8, -} -impl DATA_BYTE_4R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:7 - Received payload corresponding to the data byte 7 under Pretended Networking mode"] - #[inline] - pub fn data_byte_7(&self) -> DATA_BYTE_7R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_7R { bits } - } - #[doc = "Bits 8:15 - Received payload corresponding to the data byte 6 under Pretended Networking mode"] - #[inline] - pub fn data_byte_6(&self) -> DATA_BYTE_6R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 8; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_6R { bits } - } - #[doc = "Bits 16:23 - Received payload corresponding to the data byte 5 under Pretended Networking mode"] - #[inline] - pub fn data_byte_5(&self) -> DATA_BYTE_5R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 16; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_5R { bits } - } - #[doc = "Bits 24:31 - Received payload corresponding to the data byte 4 under Pretended Networking mode"] - #[inline] - pub fn data_byte_4(&self) -> DATA_BYTE_4R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 24; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_4R { bits } - } -} diff --git a/src/can2/wmb2_id/mod.rs b/src/can2/wmb2_id/mod.rs deleted file mode 100644 index c421aa6..0000000 --- a/src/can2/wmb2_id/mod.rs +++ /dev/null @@ -1,41 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -impl super::WMB2_ID { - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } -} -#[doc = r" Value of the field"] -pub struct IDR { - bits: u32, -} -impl IDR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:28 - Received ID under Pretended Networking mode"] - #[inline] - pub fn id(&self) -> IDR { - let bits = { - const MASK: u32 = 536870911; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u32 - }; - IDR { bits } - } -} diff --git a/src/can2/wmb3_cs/mod.rs b/src/can2/wmb3_cs/mod.rs deleted file mode 100644 index 05b7b1f..0000000 --- a/src/can2/wmb3_cs/mod.rs +++ /dev/null @@ -1,180 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -impl super::WMB3_CS { - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } -} -#[doc = r" Value of the field"] -pub struct DLCR { - bits: u8, -} -impl DLCR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = "Possible values of the field `RTR`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum RTRR { - #[doc = "Frame is data one (not remote)"] _0, - #[doc = "Frame is a remote one"] _1, -} -impl RTRR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - RTRR::_0 => false, - RTRR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> RTRR { - match value { - false => RTRR::_0, - true => RTRR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == RTRR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == RTRR::_1 - } -} -#[doc = "Possible values of the field `IDE`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum IDER { - #[doc = "Frame format is standard"] _0, - #[doc = "Frame format is extended"] _1, -} -impl IDER { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - IDER::_0 => false, - IDER::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> IDER { - match value { - false => IDER::_0, - true => IDER::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == IDER::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == IDER::_1 - } -} -#[doc = r" Value of the field"] -pub struct SRRR { - bits: bool, -} -impl SRRR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - self.bits - } - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 16:19 - Length of Data in Bytes"] - #[inline] - pub fn dlc(&self) -> DLCR { - let bits = { - const MASK: u8 = 15; - const OFFSET: u8 = 16; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DLCR { bits } - } - #[doc = "Bit 20 - Remote Transmission Request Bit"] - #[inline] - pub fn rtr(&self) -> RTRR { - RTRR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 20; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 21 - ID Extended Bit"] - #[inline] - pub fn ide(&self) -> IDER { - IDER::_from({ - const MASK: bool = true; - const OFFSET: u8 = 21; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 22 - Substitute Remote Request"] - #[inline] - pub fn srr(&self) -> SRRR { - let bits = { - const MASK: bool = true; - const OFFSET: u8 = 22; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }; - SRRR { bits } - } -} diff --git a/src/can2/wmb3_d03/mod.rs b/src/can2/wmb3_d03/mod.rs deleted file mode 100644 index 64f4c8f..0000000 --- a/src/can2/wmb3_d03/mod.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -impl super::WMB3_D03 { - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_3R { - bits: u8, -} -impl DATA_BYTE_3R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_2R { - bits: u8, -} -impl DATA_BYTE_2R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_1R { - bits: u8, -} -impl DATA_BYTE_1R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_0R { - bits: u8, -} -impl DATA_BYTE_0R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:7 - Received payload corresponding to the data byte 3 under Pretended Networking mode"] - #[inline] - pub fn data_byte_3(&self) -> DATA_BYTE_3R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_3R { bits } - } - #[doc = "Bits 8:15 - Received payload corresponding to the data byte 2 under Pretended Networking mode"] - #[inline] - pub fn data_byte_2(&self) -> DATA_BYTE_2R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 8; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_2R { bits } - } - #[doc = "Bits 16:23 - Received payload corresponding to the data byte 1 under Pretended Networking mode"] - #[inline] - pub fn data_byte_1(&self) -> DATA_BYTE_1R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 16; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_1R { bits } - } - #[doc = "Bits 24:31 - Received payload corresponding to the data byte 0 under Pretended Networking mode"] - #[inline] - pub fn data_byte_0(&self) -> DATA_BYTE_0R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 24; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_0R { bits } - } -} diff --git a/src/can2/wmb3_d47/mod.rs b/src/can2/wmb3_d47/mod.rs deleted file mode 100644 index a60b2ae..0000000 --- a/src/can2/wmb3_d47/mod.rs +++ /dev/null @@ -1,104 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -impl super::WMB3_D47 { - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_7R { - bits: u8, -} -impl DATA_BYTE_7R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_6R { - bits: u8, -} -impl DATA_BYTE_6R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_5R { - bits: u8, -} -impl DATA_BYTE_5R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct DATA_BYTE_4R { - bits: u8, -} -impl DATA_BYTE_4R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:7 - Received payload corresponding to the data byte 7 under Pretended Networking mode"] - #[inline] - pub fn data_byte_7(&self) -> DATA_BYTE_7R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_7R { bits } - } - #[doc = "Bits 8:15 - Received payload corresponding to the data byte 6 under Pretended Networking mode"] - #[inline] - pub fn data_byte_6(&self) -> DATA_BYTE_6R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 8; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_6R { bits } - } - #[doc = "Bits 16:23 - Received payload corresponding to the data byte 5 under Pretended Networking mode"] - #[inline] - pub fn data_byte_5(&self) -> DATA_BYTE_5R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 16; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_5R { bits } - } - #[doc = "Bits 24:31 - Received payload corresponding to the data byte 4 under Pretended Networking mode"] - #[inline] - pub fn data_byte_4(&self) -> DATA_BYTE_4R { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 24; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - DATA_BYTE_4R { bits } - } -} diff --git a/src/can2/wmb3_id/mod.rs b/src/can2/wmb3_id/mod.rs deleted file mode 100644 index 6b7ac79..0000000 --- a/src/can2/wmb3_id/mod.rs +++ /dev/null @@ -1,41 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -impl super::WMB3_ID { - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } -} -#[doc = r" Value of the field"] -pub struct IDR { - bits: u32, -} -impl IDR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:28 - Received ID under Pretended Networking mode"] - #[inline] - pub fn id(&self) -> IDR { - let bits = { - const MASK: u32 = 536870911; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u32 - }; - IDR { bits } - } -} diff --git a/src/can2/wu_mtc/mod.rs b/src/can2/wu_mtc/mod.rs deleted file mode 100644 index 04c03ba..0000000 --- a/src/can2/wu_mtc/mod.rs +++ /dev/null @@ -1,315 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::WU_MTC { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = r" Value of the field"] -pub struct MCOUNTERR { - bits: u8, -} -impl MCOUNTERR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = "Possible values of the field `WUMF`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum WUMFR { - #[doc = "No wake up by match event detected"] _0, - #[doc = "Wake up by match event detected"] _1, -} -impl WUMFR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - WUMFR::_0 => false, - WUMFR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> WUMFR { - match value { - false => WUMFR::_0, - true => WUMFR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == WUMFR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == WUMFR::_1 - } -} -#[doc = "Possible values of the field `WTOF`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum WTOFR { - #[doc = "No wake up by timeout event detected"] _0, - #[doc = "Wake up by timeout event detected"] _1, -} -impl WTOFR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - WTOFR::_0 => false, - WTOFR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> WTOFR { - match value { - false => WTOFR::_0, - true => WTOFR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == WTOFR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == WTOFR::_1 - } -} -#[doc = "Values that can be written to the field `WUMF`"] -pub enum WUMFW { - #[doc = "No wake up by match event detected"] _0, - #[doc = "Wake up by match event detected"] _1, -} -impl WUMFW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - WUMFW::_0 => false, - WUMFW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _WUMFW<'a> { - w: &'a mut W, -} -impl<'a> _WUMFW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: WUMFW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "No wake up by match event detected"] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(WUMFW::_0) - } - #[doc = "Wake up by match event detected"] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(WUMFW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 16; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `WTOF`"] -pub enum WTOFW { - #[doc = "No wake up by timeout event detected"] _0, - #[doc = "Wake up by timeout event detected"] _1, -} -impl WTOFW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - WTOFW::_0 => false, - WTOFW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _WTOFW<'a> { - w: &'a mut W, -} -impl<'a> _WTOFW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: WTOFW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "No wake up by timeout event detected"] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(WTOFW::_0) - } - #[doc = "Wake up by timeout event detected"] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(WTOFW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 17; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 8:15 - Number of Matches while in Pretended Networking"] - #[inline] - pub fn mcounter(&self) -> MCOUNTERR { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 8; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - MCOUNTERR { bits } - } - #[doc = "Bit 16 - Wake Up by Match Flag Bit"] - #[inline] - pub fn wumf(&self) -> WUMFR { - WUMFR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 16; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 17 - Wake Up by Timeout Flag Bit"] - #[inline] - pub fn wtof(&self) -> WTOFR { - WTOFR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 17; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 0 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bit 16 - Wake Up by Match Flag Bit"] - #[inline] - pub fn wumf(&mut self) -> _WUMFW { - _WUMFW { w: self } - } - #[doc = "Bit 17 - Wake Up by Timeout Flag Bit"] - #[inline] - pub fn wtof(&mut self) -> _WTOFW { - _WTOFW { w: self } - } -} diff --git a/src/interrupt/mod.rs b/src/interrupt/mod.rs index faf0f9c..a577907 100644 --- a/src/interrupt/mod.rs +++ b/src/interrupt/mod.rs @@ -10,7 +10,7 @@ global_asm!( ); #[cfg(feature = "rt")] global_asm!( - "\n.weak DMA0\nDMA0 = DH_TRAMPOLINE\n.weak DMA1\nDMA1 = DH_TRAMPOLINE\n.weak DMA2\nDMA2 = DH_TRAMPOLINE\n.weak DMA3\nDMA3 = DH_TRAMPOLINE\n.weak DMA4\nDMA4 = DH_TRAMPOLINE\n.weak DMA5\nDMA5 = DH_TRAMPOLINE\n.weak DMA6\nDMA6 = DH_TRAMPOLINE\n.weak DMA7\nDMA7 = DH_TRAMPOLINE\n.weak DMA8\nDMA8 = DH_TRAMPOLINE\n.weak DMA9\nDMA9 = DH_TRAMPOLINE\n.weak DMA10\nDMA10 = DH_TRAMPOLINE\n.weak DMA11\nDMA11 = DH_TRAMPOLINE\n.weak DMA12\nDMA12 = DH_TRAMPOLINE\n.weak DMA13\nDMA13 = DH_TRAMPOLINE\n.weak DMA14\nDMA14 = DH_TRAMPOLINE\n.weak DMA15\nDMA15 = DH_TRAMPOLINE\n.weak DMA_ERROR\nDMA_ERROR = DH_TRAMPOLINE\n.weak MCM\nMCM = DH_TRAMPOLINE\n.weak FTFC\nFTFC = DH_TRAMPOLINE\n.weak READ_COLLISION\nREAD_COLLISION = DH_TRAMPOLINE\n.weak LVD_LVW\nLVD_LVW = DH_TRAMPOLINE\n.weak FTFC_FAULT\nFTFC_FAULT = DH_TRAMPOLINE\n.weak WDOG_EWM\nWDOG_EWM = DH_TRAMPOLINE\n.weak RCM\nRCM = DH_TRAMPOLINE\n.weak LPI2C0_MASTER\nLPI2C0_MASTER = DH_TRAMPOLINE\n.weak LPI2C0_SLAVE\nLPI2C0_SLAVE = DH_TRAMPOLINE\n.weak LPSPI0\nLPSPI0 = DH_TRAMPOLINE\n.weak LPSPI1\nLPSPI1 = DH_TRAMPOLINE\n.weak LPSPI2\nLPSPI2 = DH_TRAMPOLINE\n.weak LPUART0_RXTX\nLPUART0_RXTX = DH_TRAMPOLINE\n.weak LPUART1_RXTX\nLPUART1_RXTX = DH_TRAMPOLINE\n.weak LPUART2_RXTX\nLPUART2_RXTX = DH_TRAMPOLINE\n.weak ADC0\nADC0 = DH_TRAMPOLINE\n.weak ADC1\nADC1 = DH_TRAMPOLINE\n.weak CMP0\nCMP0 = DH_TRAMPOLINE\n.weak ERM_SINGLE_FAULT\nERM_SINGLE_FAULT = DH_TRAMPOLINE\n.weak ERM_DOUBLE_FAULT\nERM_DOUBLE_FAULT = DH_TRAMPOLINE\n.weak RTC\nRTC = DH_TRAMPOLINE\n.weak RTC_SECONDS\nRTC_SECONDS = DH_TRAMPOLINE\n.weak LPIT0_CH0\nLPIT0_CH0 = DH_TRAMPOLINE\n.weak LPIT0_CH1\nLPIT0_CH1 = DH_TRAMPOLINE\n.weak LPIT0_CH2\nLPIT0_CH2 = DH_TRAMPOLINE\n.weak LPIT0_CH3\nLPIT0_CH3 = DH_TRAMPOLINE\n.weak PDB0\nPDB0 = DH_TRAMPOLINE\n.weak SCG\nSCG = DH_TRAMPOLINE\n.weak LPTMR0\nLPTMR0 = DH_TRAMPOLINE\n.weak PORTA\nPORTA = DH_TRAMPOLINE\n.weak PORTB\nPORTB = DH_TRAMPOLINE\n.weak PORTC\nPORTC = DH_TRAMPOLINE\n.weak PORTD\nPORTD = DH_TRAMPOLINE\n.weak PORTE\nPORTE = DH_TRAMPOLINE\n.weak PDB1\nPDB1 = DH_TRAMPOLINE\n.weak FLEXIO\nFLEXIO = DH_TRAMPOLINE\n.weak CAN0_ORED\nCAN0_ORED = DH_TRAMPOLINE\n.weak CAN0_ERROR\nCAN0_ERROR = DH_TRAMPOLINE\n.weak CAN0_WAKE_UP\nCAN0_WAKE_UP = DH_TRAMPOLINE\n.weak CAN0_ORED_0_15_MB\nCAN0_ORED_0_15_MB = DH_TRAMPOLINE\n.weak CAN0_ORED_16_31_MB\nCAN0_ORED_16_31_MB = DH_TRAMPOLINE\n.weak CAN1_ORED\nCAN1_ORED = DH_TRAMPOLINE\n.weak CAN1_ERROR\nCAN1_ERROR = DH_TRAMPOLINE\n.weak CAN1_ORED_0_15_MB\nCAN1_ORED_0_15_MB = DH_TRAMPOLINE\n.weak CAN2_ORED\nCAN2_ORED = DH_TRAMPOLINE\n.weak CAN2_ERROR\nCAN2_ERROR = DH_TRAMPOLINE\n.weak CAN2_ORED_0_15_MB\nCAN2_ORED_0_15_MB = DH_TRAMPOLINE\n.weak FTM0_CH0_CH1\nFTM0_CH0_CH1 = DH_TRAMPOLINE\n.weak FTM0_CH2_CH3\nFTM0_CH2_CH3 = DH_TRAMPOLINE\n.weak FTM0_CH4_CH5\nFTM0_CH4_CH5 = DH_TRAMPOLINE\n.weak FTM0_CH6_CH7\nFTM0_CH6_CH7 = DH_TRAMPOLINE\n.weak FTM0_FAULT\nFTM0_FAULT = DH_TRAMPOLINE\n.weak FTM0_OVF_RELOAD\nFTM0_OVF_RELOAD = DH_TRAMPOLINE\n.weak FTM1_CH0_CH1\nFTM1_CH0_CH1 = DH_TRAMPOLINE\n.weak FTM1_CH2_CH3\nFTM1_CH2_CH3 = DH_TRAMPOLINE\n.weak FTM1_CH4_CH5\nFTM1_CH4_CH5 = DH_TRAMPOLINE\n.weak FTM1_CH6_CH7\nFTM1_CH6_CH7 = DH_TRAMPOLINE\n.weak FTM1_FAULT\nFTM1_FAULT = DH_TRAMPOLINE\n.weak FTM1_OVF_RELOAD\nFTM1_OVF_RELOAD = DH_TRAMPOLINE\n.weak FTM2_CH0_CH1\nFTM2_CH0_CH1 = DH_TRAMPOLINE\n.weak FTM2_CH2_CH3\nFTM2_CH2_CH3 = DH_TRAMPOLINE\n.weak FTM2_CH4_CH5\nFTM2_CH4_CH5 = DH_TRAMPOLINE\n.weak FTM2_CH6_CH7\nFTM2_CH6_CH7 = DH_TRAMPOLINE\n.weak FTM2_FAULT\nFTM2_FAULT = DH_TRAMPOLINE\n.weak FTM2_OVF_RELOAD\nFTM2_OVF_RELOAD = DH_TRAMPOLINE\n.weak FTM3_CH0_CH1\nFTM3_CH0_CH1 = DH_TRAMPOLINE\n.weak FTM3_CH2_CH3\nFTM3_CH2_CH3 = DH_TRAMPOLINE\n.weak FTM3_CH4_CH5\nFTM3_CH4_CH5 = DH_TRAMPOLINE\n.weak FTM3_CH6_CH7\nFTM3_CH6_CH7 = DH_TRAMPOLINE\n.weak FTM3_FAULT\nFTM3_FAULT = DH_TRAMPOLINE\n.weak FTM3_OVF_RELOAD\nFTM3_OVF_RELOAD = DH_TRAMPOLINE" + "\n.weak DMA0\nDMA0 = DH_TRAMPOLINE\n.weak DMA1\nDMA1 = DH_TRAMPOLINE\n.weak DMA2\nDMA2 = DH_TRAMPOLINE\n.weak DMA3\nDMA3 = DH_TRAMPOLINE\n.weak DMA4\nDMA4 = DH_TRAMPOLINE\n.weak DMA5\nDMA5 = DH_TRAMPOLINE\n.weak DMA6\nDMA6 = DH_TRAMPOLINE\n.weak DMA7\nDMA7 = DH_TRAMPOLINE\n.weak DMA8\nDMA8 = DH_TRAMPOLINE\n.weak DMA9\nDMA9 = DH_TRAMPOLINE\n.weak DMA10\nDMA10 = DH_TRAMPOLINE\n.weak DMA11\nDMA11 = DH_TRAMPOLINE\n.weak DMA12\nDMA12 = DH_TRAMPOLINE\n.weak DMA13\nDMA13 = DH_TRAMPOLINE\n.weak DMA14\nDMA14 = DH_TRAMPOLINE\n.weak DMA15\nDMA15 = DH_TRAMPOLINE\n.weak DMA_ERROR\nDMA_ERROR = DH_TRAMPOLINE\n.weak MCM\nMCM = DH_TRAMPOLINE\n.weak FTFC\nFTFC = DH_TRAMPOLINE\n.weak READ_COLLISION\nREAD_COLLISION = DH_TRAMPOLINE\n.weak LVD_LVW\nLVD_LVW = DH_TRAMPOLINE\n.weak FTFC_FAULT\nFTFC_FAULT = DH_TRAMPOLINE\n.weak WDOG_EWM\nWDOG_EWM = DH_TRAMPOLINE\n.weak RCM\nRCM = DH_TRAMPOLINE\n.weak LPI2C0_MASTER\nLPI2C0_MASTER = DH_TRAMPOLINE\n.weak LPI2C0_SLAVE\nLPI2C0_SLAVE = DH_TRAMPOLINE\n.weak LPSPI0\nLPSPI0 = DH_TRAMPOLINE\n.weak LPSPI1\nLPSPI1 = DH_TRAMPOLINE\n.weak LPSPI2\nLPSPI2 = DH_TRAMPOLINE\n.weak LPUART0_RXTX\nLPUART0_RXTX = DH_TRAMPOLINE\n.weak LPUART1_RXTX\nLPUART1_RXTX = DH_TRAMPOLINE\n.weak LPUART2_RXTX\nLPUART2_RXTX = DH_TRAMPOLINE\n.weak ADC0\nADC0 = DH_TRAMPOLINE\n.weak ADC1\nADC1 = DH_TRAMPOLINE\n.weak CMP0\nCMP0 = DH_TRAMPOLINE\n.weak ERM_SINGLE_FAULT\nERM_SINGLE_FAULT = DH_TRAMPOLINE\n.weak ERM_DOUBLE_FAULT\nERM_DOUBLE_FAULT = DH_TRAMPOLINE\n.weak RTC\nRTC = DH_TRAMPOLINE\n.weak RTC_SECONDS\nRTC_SECONDS = DH_TRAMPOLINE\n.weak LPIT0_CH0\nLPIT0_CH0 = DH_TRAMPOLINE\n.weak LPIT0_CH1\nLPIT0_CH1 = DH_TRAMPOLINE\n.weak LPIT0_CH2\nLPIT0_CH2 = DH_TRAMPOLINE\n.weak LPIT0_CH3\nLPIT0_CH3 = DH_TRAMPOLINE\n.weak PDB0\nPDB0 = DH_TRAMPOLINE\n.weak SCG\nSCG = DH_TRAMPOLINE\n.weak LPTMR0\nLPTMR0 = DH_TRAMPOLINE\n.weak PORTA\nPORTA = DH_TRAMPOLINE\n.weak PORTB\nPORTB = DH_TRAMPOLINE\n.weak PORTC\nPORTC = DH_TRAMPOLINE\n.weak PORTD\nPORTD = DH_TRAMPOLINE\n.weak PORTE\nPORTE = DH_TRAMPOLINE\n.weak PDB1\nPDB1 = DH_TRAMPOLINE\n.weak FLEXIO\nFLEXIO = DH_TRAMPOLINE\n.weak CAN0_ORED\nCAN0_ORED = DH_TRAMPOLINE\n.weak CAN0_ERROR\nCAN0_ERROR = DH_TRAMPOLINE\n.weak CAN0_WAKE_UP\nCAN0_WAKE_UP = DH_TRAMPOLINE\n.weak CAN0_ORED_0_15_MB\nCAN0_ORED_0_15_MB = DH_TRAMPOLINE\n.weak CAN0_ORED_16_31_MB\nCAN0_ORED_16_31_MB = DH_TRAMPOLINE\n.weak FTM0_CH0_CH1\nFTM0_CH0_CH1 = DH_TRAMPOLINE\n.weak FTM0_CH2_CH3\nFTM0_CH2_CH3 = DH_TRAMPOLINE\n.weak FTM0_CH4_CH5\nFTM0_CH4_CH5 = DH_TRAMPOLINE\n.weak FTM0_CH6_CH7\nFTM0_CH6_CH7 = DH_TRAMPOLINE\n.weak FTM0_FAULT\nFTM0_FAULT = DH_TRAMPOLINE\n.weak FTM0_OVF_RELOAD\nFTM0_OVF_RELOAD = DH_TRAMPOLINE\n.weak FTM1_CH0_CH1\nFTM1_CH0_CH1 = DH_TRAMPOLINE\n.weak FTM1_CH2_CH3\nFTM1_CH2_CH3 = DH_TRAMPOLINE\n.weak FTM1_CH4_CH5\nFTM1_CH4_CH5 = DH_TRAMPOLINE\n.weak FTM1_CH6_CH7\nFTM1_CH6_CH7 = DH_TRAMPOLINE\n.weak FTM1_FAULT\nFTM1_FAULT = DH_TRAMPOLINE\n.weak FTM1_OVF_RELOAD\nFTM1_OVF_RELOAD = DH_TRAMPOLINE\n.weak FTM2_CH0_CH1\nFTM2_CH0_CH1 = DH_TRAMPOLINE\n.weak FTM2_CH2_CH3\nFTM2_CH2_CH3 = DH_TRAMPOLINE\n.weak FTM2_CH4_CH5\nFTM2_CH4_CH5 = DH_TRAMPOLINE\n.weak FTM2_CH6_CH7\nFTM2_CH6_CH7 = DH_TRAMPOLINE\n.weak FTM2_FAULT\nFTM2_FAULT = DH_TRAMPOLINE\n.weak FTM2_OVF_RELOAD\nFTM2_OVF_RELOAD = DH_TRAMPOLINE\n.weak FTM3_CH0_CH1\nFTM3_CH0_CH1 = DH_TRAMPOLINE\n.weak FTM3_CH2_CH3\nFTM3_CH2_CH3 = DH_TRAMPOLINE\n.weak FTM3_CH4_CH5\nFTM3_CH4_CH5 = DH_TRAMPOLINE\n.weak FTM3_CH6_CH7\nFTM3_CH6_CH7 = DH_TRAMPOLINE\n.weak FTM3_FAULT\nFTM3_FAULT = DH_TRAMPOLINE\n.weak FTM3_OVF_RELOAD\nFTM3_OVF_RELOAD = DH_TRAMPOLINE" ); #[cfg(feature = "rt")] extern "C" { @@ -72,12 +72,6 @@ extern "C" { fn CAN0_WAKE_UP(); fn CAN0_ORED_0_15_MB(); fn CAN0_ORED_16_31_MB(); - fn CAN1_ORED(); - fn CAN1_ERROR(); - fn CAN1_ORED_0_15_MB(); - fn CAN2_ORED(); - fn CAN2_ERROR(); - fn CAN2_ORED_0_15_MB(); fn FTM0_CH0_CH1(); fn FTM0_CH2_CH3(); fn FTM0_CH4_CH5(); @@ -195,17 +189,17 @@ pub static INTERRUPTS: [Option; 123] = [ Some(CAN0_ORED_16_31_MB), None, None, - Some(CAN1_ORED), - Some(CAN1_ERROR), - None, - Some(CAN1_ORED_0_15_MB), None, None, None, - Some(CAN2_ORED), - Some(CAN2_ERROR), None, - Some(CAN2_ORED_0_15_MB), + None, + None, + None, + None, + None, + None, + None, None, None, None, @@ -294,12 +288,6 @@ pub enum Interrupt { #[doc = "80 - CAN0_Wake_Up"] CAN0_WAKE_UP, #[doc = "81 - CAN0_ORed_0_15_MB"] CAN0_ORED_0_15_MB, #[doc = "82 - CAN0_ORed_16_31_MB"] CAN0_ORED_16_31_MB, - #[doc = "85 - CAN1_ORed"] CAN1_ORED, - #[doc = "86 - CAN1_Error"] CAN1_ERROR, - #[doc = "88 - CAN1_ORed_0_15_MB"] CAN1_ORED_0_15_MB, - #[doc = "92 - CAN2_ORed"] CAN2_ORED, - #[doc = "93 - CAN2_Error"] CAN2_ERROR, - #[doc = "95 - CAN2_ORed_0_15_MB"] CAN2_ORED_0_15_MB, #[doc = "99 - FTM0_Ch0_Ch1"] FTM0_CH0_CH1, #[doc = "100 - FTM0_Ch2_Ch3"] FTM0_CH2_CH3, #[doc = "101 - FTM0_Ch4_Ch5"] FTM0_CH4_CH5, @@ -387,12 +375,6 @@ unsafe impl Nr for Interrupt { Interrupt::CAN0_WAKE_UP => 80, Interrupt::CAN0_ORED_0_15_MB => 81, Interrupt::CAN0_ORED_16_31_MB => 82, - Interrupt::CAN1_ORED => 85, - Interrupt::CAN1_ERROR => 86, - Interrupt::CAN1_ORED_0_15_MB => 88, - Interrupt::CAN2_ORED => 92, - Interrupt::CAN2_ERROR => 93, - Interrupt::CAN2_ORED_0_15_MB => 95, Interrupt::FTM0_CH0_CH1 => 99, Interrupt::FTM0_CH2_CH3 => 100, Interrupt::FTM0_CH4_CH5 => 101, diff --git a/src/lib.rs b/src/lib.rs index 62f2a0c..1810a17 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -158,29 +158,25 @@ impl Deref for CAN0 { } #[doc = "Flex Controller Area Network module"] pub const CAN1: Peripheral = unsafe { Peripheral::new(1073893376) }; -#[doc = "Flex Controller Area Network module"] -pub mod can1; -#[doc = "Flex Controller Area Network module"] +#[doc = r" Register block"] pub struct CAN1 { - register_block: can1::RegisterBlock, + register_block: can0::RegisterBlock, } impl Deref for CAN1 { - type Target = can1::RegisterBlock; - fn deref(&self) -> &can1::RegisterBlock { + type Target = can0::RegisterBlock; + fn deref(&self) -> &can0::RegisterBlock { &self.register_block } } #[doc = "Flex Controller Area Network module"] pub const CAN2: Peripheral = unsafe { Peripheral::new(1073917952) }; -#[doc = "Flex Controller Area Network module"] -pub mod can2; -#[doc = "Flex Controller Area Network module"] +#[doc = r" Register block"] pub struct CAN2 { - register_block: can2::RegisterBlock, + register_block: can0::RegisterBlock, } impl Deref for CAN2 { - type Target = can2::RegisterBlock; - fn deref(&self) -> &can2::RegisterBlock { + type Target = can0::RegisterBlock; + fn deref(&self) -> &can0::RegisterBlock { &self.register_block } }