Ran with svd2rust 0.12.0
This commit is contained in:
@ -31,8 +31,10 @@ impl<'a> _CDNEW<'a> {
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}
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#[doc = "Values that can be written to the field `CADN`"]
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pub enum CADNW {
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#[doc = "Clears only the TCDn_CSR[DONE] bit specified in the CDNE field"] _0,
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#[doc = "Clears all bits in TCDn_CSR[DONE]"] _1,
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#[doc = "Clears only the TCDn_CSR[DONE] bit specified in the CDNE field"]
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_0,
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#[doc = "Clears all bits in TCDn_CSR[DONE]"]
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_1,
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}
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impl CADNW {
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#[allow(missing_docs)]
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@ -87,8 +89,10 @@ impl<'a> _CADNW<'a> {
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}
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#[doc = "Values that can be written to the field `NOP`"]
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pub enum NOPW {
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#[doc = "Normal operation"] _0,
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#[doc = "No operation, ignore the other bits in this register"] _1,
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#[doc = "Normal operation"]
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_0,
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#[doc = "No operation, ignore the other bits in this register"]
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_1,
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}
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impl NOPW {
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#[allow(missing_docs)]
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@ -54,8 +54,10 @@ impl<'a> _CAEEW<'a> {
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}
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#[doc = "Values that can be written to the field `NOP`"]
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pub enum NOPW {
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#[doc = "Normal operation"] _0,
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#[doc = "No operation, ignore the other bits in this register"] _1,
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#[doc = "Normal operation"]
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_0,
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#[doc = "No operation, ignore the other bits in this register"]
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_1,
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}
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impl NOPW {
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#[allow(missing_docs)]
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@ -54,8 +54,10 @@ impl<'a> _CAERW<'a> {
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}
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#[doc = "Values that can be written to the field `NOP`"]
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pub enum NOPW {
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#[doc = "Normal operation"] _0,
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#[doc = "No operation, ignore the other bits in this register"] _1,
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#[doc = "Normal operation"]
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_0,
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#[doc = "No operation, ignore the other bits in this register"]
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_1,
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}
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impl NOPW {
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#[allow(missing_docs)]
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@ -54,8 +54,10 @@ impl<'a> _CAEIW<'a> {
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}
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#[doc = "Values that can be written to the field `NOP`"]
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pub enum NOPW {
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#[doc = "Normal operation"] _0,
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#[doc = "No operation, ignore the other bits in this register"] _1,
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#[doc = "Normal operation"]
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_0,
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#[doc = "No operation, ignore the other bits in this register"]
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_1,
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}
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impl NOPW {
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#[allow(missing_docs)]
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@ -54,8 +54,10 @@ impl<'a> _CAIRW<'a> {
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}
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#[doc = "Values that can be written to the field `NOP`"]
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pub enum NOPW {
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#[doc = "Normal operation"] _0,
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#[doc = "No operation, ignore the other bits in this register"] _1,
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#[doc = "Normal operation"]
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_0,
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#[doc = "No operation, ignore the other bits in this register"]
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_1,
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}
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impl NOPW {
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#[allow(missing_docs)]
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@ -87,7 +87,8 @@ impl ERCAR {
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#[doc = "Possible values of the field `HOE`"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum HOER {
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#[doc = "Normal operation"] _0,
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#[doc = "Normal operation"]
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_0,
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#[doc = "Any error causes the HALT bit to set. Subsequently, all service requests are ignored until the HALT bit is cleared."]
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_1,
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}
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@ -133,7 +134,8 @@ impl HOER {
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#[doc = "Possible values of the field `HALT`"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum HALTR {
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#[doc = "Normal operation"] _0,
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#[doc = "Normal operation"]
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_0,
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#[doc = "Stall the start of any new channels. Executing channels are allowed to complete. Channel execution resumes when this bit is cleared."]
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_1,
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}
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@ -226,7 +228,8 @@ impl CLMR {
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#[doc = "Possible values of the field `EMLM`"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum EMLMR {
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#[doc = "Disabled. TCDn.word2 is defined as a 32-bit NBYTES field."] _0,
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#[doc = "Disabled. TCDn.word2 is defined as a 32-bit NBYTES field."]
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_0,
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#[doc = "Enabled. TCDn.word2 is redefined to include individual enable fields, an offset field, and the NBYTES field. The individual enable fields allow the minor loop offset to be applied to the source address, the destination address, or both. The NBYTES field is reduced when either offset is enabled."]
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_1,
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}
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@ -272,7 +275,8 @@ impl EMLMR {
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#[doc = "Possible values of the field `ECX`"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum ECXR {
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#[doc = "Normal operation"] _0,
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#[doc = "Normal operation"]
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_0,
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#[doc = "Cancel the remaining data transfer in the same fashion as the CX bit. Stop the executing channel and force the minor loop to finish. The cancel takes effect after the last write of the current read/write sequence. The ECX bit clears itself after the cancel is honored. In addition to cancelling the transfer, ECX treats the cancel as an error condition, thus updating the Error Status register (DMAx_ES) and generating an optional error interrupt."]
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_1,
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}
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@ -318,7 +322,8 @@ impl ECXR {
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#[doc = "Possible values of the field `CX`"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum CXR {
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#[doc = "Normal operation"] _0,
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#[doc = "Normal operation"]
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_0,
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#[doc = "Cancel the remaining data transfer. Stop the executing channel and force the minor loop to finish. The cancel takes effect after the last write of the current read/write sequence. The CX bit clears itself after the cancel has been honored. This cancel retires the channel normally as if the minor loop was completed."]
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_1,
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}
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@ -409,7 +414,8 @@ impl<'a> _ERCAW<'a> {
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}
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#[doc = "Values that can be written to the field `HOE`"]
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pub enum HOEW {
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#[doc = "Normal operation"] _0,
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#[doc = "Normal operation"]
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_0,
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#[doc = "Any error causes the HALT bit to set. Subsequently, all service requests are ignored until the HALT bit is cleared."]
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_1,
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}
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@ -466,7 +472,8 @@ impl<'a> _HOEW<'a> {
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}
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#[doc = "Values that can be written to the field `HALT`"]
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pub enum HALTW {
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#[doc = "Normal operation"] _0,
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#[doc = "Normal operation"]
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_0,
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#[doc = "Stall the start of any new channels. Executing channels are allowed to complete. Channel execution resumes when this bit is cleared."]
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_1,
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}
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@ -581,7 +588,8 @@ impl<'a> _CLMW<'a> {
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}
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#[doc = "Values that can be written to the field `EMLM`"]
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pub enum EMLMW {
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#[doc = "Disabled. TCDn.word2 is defined as a 32-bit NBYTES field."] _0,
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#[doc = "Disabled. TCDn.word2 is defined as a 32-bit NBYTES field."]
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_0,
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#[doc = "Enabled. TCDn.word2 is redefined to include individual enable fields, an offset field, and the NBYTES field. The individual enable fields allow the minor loop offset to be applied to the source address, the destination address, or both. The NBYTES field is reduced when either offset is enabled."]
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_1,
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}
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@ -638,7 +646,8 @@ impl<'a> _EMLMW<'a> {
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}
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#[doc = "Values that can be written to the field `ECX`"]
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pub enum ECXW {
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#[doc = "Normal operation"] _0,
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#[doc = "Normal operation"]
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_0,
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#[doc = "Cancel the remaining data transfer in the same fashion as the CX bit. Stop the executing channel and force the minor loop to finish. The cancel takes effect after the last write of the current read/write sequence. The ECX bit clears itself after the cancel is honored. In addition to cancelling the transfer, ECX treats the cancel as an error condition, thus updating the Error Status register (DMAx_ES) and generating an optional error interrupt."]
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_1,
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}
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@ -695,7 +704,8 @@ impl<'a> _ECXW<'a> {
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}
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#[doc = "Values that can be written to the field `CX`"]
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pub enum CXW {
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#[doc = "Normal operation"] _0,
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#[doc = "Normal operation"]
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_0,
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#[doc = "Cancel the remaining data transfer. Stop the executing channel and force the minor loop to finish. The cancel takes effect after the last write of the current read/write sequence. The CX bit clears itself after the cancel has been honored. This cancel retires the channel normally as if the minor loop was completed."]
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_1,
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}
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@ -56,8 +56,10 @@ impl CHPRIR {
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#[doc = "Possible values of the field `DPA`"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum DPAR {
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#[doc = "Channel n can suspend a lower priority channel."] _0,
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#[doc = "Channel n cannot suspend any channel, regardless of channel priority."] _1,
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#[doc = "Channel n can suspend a lower priority channel."]
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_0,
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#[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
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_1,
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}
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impl DPAR {
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#[doc = r" Returns `true` if the bit is clear (0)"]
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@ -101,7 +103,8 @@ impl DPAR {
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#[doc = "Possible values of the field `ECP`"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum ECPR {
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#[doc = "Channel n cannot be suspended by a higher priority channel's service request."] _0,
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#[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
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_0,
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#[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
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_1,
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}
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@ -161,8 +164,10 @@ impl<'a> _CHPRIW<'a> {
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}
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#[doc = "Values that can be written to the field `DPA`"]
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pub enum DPAW {
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#[doc = "Channel n can suspend a lower priority channel."] _0,
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#[doc = "Channel n cannot suspend any channel, regardless of channel priority."] _1,
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#[doc = "Channel n can suspend a lower priority channel."]
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_0,
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#[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
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_1,
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}
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impl DPAW {
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#[allow(missing_docs)]
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@ -217,7 +222,8 @@ impl<'a> _DPAW<'a> {
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}
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#[doc = "Values that can be written to the field `ECP`"]
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pub enum ECPW {
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#[doc = "Channel n cannot be suspended by a higher priority channel's service request."] _0,
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#[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
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_0,
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#[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
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_1,
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}
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@ -56,8 +56,10 @@ impl CHPRIR {
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#[doc = "Possible values of the field `DPA`"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum DPAR {
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#[doc = "Channel n can suspend a lower priority channel."] _0,
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#[doc = "Channel n cannot suspend any channel, regardless of channel priority."] _1,
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#[doc = "Channel n can suspend a lower priority channel."]
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_0,
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#[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
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_1,
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}
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impl DPAR {
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#[doc = r" Returns `true` if the bit is clear (0)"]
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@ -101,7 +103,8 @@ impl DPAR {
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#[doc = "Possible values of the field `ECP`"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum ECPR {
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#[doc = "Channel n cannot be suspended by a higher priority channel's service request."] _0,
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#[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
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_0,
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#[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
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_1,
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}
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@ -161,8 +164,10 @@ impl<'a> _CHPRIW<'a> {
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}
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#[doc = "Values that can be written to the field `DPA`"]
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pub enum DPAW {
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#[doc = "Channel n can suspend a lower priority channel."] _0,
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#[doc = "Channel n cannot suspend any channel, regardless of channel priority."] _1,
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#[doc = "Channel n can suspend a lower priority channel."]
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_0,
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#[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
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_1,
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}
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impl DPAW {
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#[allow(missing_docs)]
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@ -217,7 +222,8 @@ impl<'a> _DPAW<'a> {
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}
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#[doc = "Values that can be written to the field `ECP`"]
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pub enum ECPW {
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#[doc = "Channel n cannot be suspended by a higher priority channel's service request."] _0,
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#[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
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_0,
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#[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
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_1,
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}
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|
@ -56,8 +56,10 @@ impl CHPRIR {
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#[doc = "Possible values of the field `DPA`"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum DPAR {
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#[doc = "Channel n can suspend a lower priority channel."] _0,
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#[doc = "Channel n cannot suspend any channel, regardless of channel priority."] _1,
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#[doc = "Channel n can suspend a lower priority channel."]
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_0,
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#[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
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_1,
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}
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impl DPAR {
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#[doc = r" Returns `true` if the bit is clear (0)"]
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@ -101,7 +103,8 @@ impl DPAR {
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#[doc = "Possible values of the field `ECP`"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum ECPR {
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#[doc = "Channel n cannot be suspended by a higher priority channel's service request."] _0,
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#[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
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_0,
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#[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
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_1,
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}
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@ -161,8 +164,10 @@ impl<'a> _CHPRIW<'a> {
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}
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#[doc = "Values that can be written to the field `DPA`"]
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pub enum DPAW {
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#[doc = "Channel n can suspend a lower priority channel."] _0,
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#[doc = "Channel n cannot suspend any channel, regardless of channel priority."] _1,
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#[doc = "Channel n can suspend a lower priority channel."]
|
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_0,
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#[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
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_1,
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}
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impl DPAW {
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#[allow(missing_docs)]
|
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@ -217,7 +222,8 @@ impl<'a> _DPAW<'a> {
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}
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#[doc = "Values that can be written to the field `ECP`"]
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pub enum ECPW {
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#[doc = "Channel n cannot be suspended by a higher priority channel's service request."] _0,
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#[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
|
||||
_0,
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#[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
|
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_1,
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}
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|
@ -56,8 +56,10 @@ impl CHPRIR {
|
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#[doc = "Possible values of the field `DPA`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum DPAR {
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||||
#[doc = "Channel n can suspend a lower priority channel."] _0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."] _1,
|
||||
#[doc = "Channel n can suspend a lower priority channel."]
|
||||
_0,
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#[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
|
||||
_1,
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||||
}
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||||
impl DPAR {
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#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -101,7 +103,8 @@ impl DPAR {
|
||||
#[doc = "Possible values of the field `ECP`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ECPR {
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."] _0,
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
|
||||
_0,
|
||||
#[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
|
||||
_1,
|
||||
}
|
||||
@ -161,8 +164,10 @@ impl<'a> _CHPRIW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `DPA`"]
|
||||
pub enum DPAW {
|
||||
#[doc = "Channel n can suspend a lower priority channel."] _0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."] _1,
|
||||
#[doc = "Channel n can suspend a lower priority channel."]
|
||||
_0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
|
||||
_1,
|
||||
}
|
||||
impl DPAW {
|
||||
#[allow(missing_docs)]
|
||||
@ -217,7 +222,8 @@ impl<'a> _DPAW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `ECP`"]
|
||||
pub enum ECPW {
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."] _0,
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
|
||||
_0,
|
||||
#[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
|
||||
_1,
|
||||
}
|
||||
|
@ -56,8 +56,10 @@ impl CHPRIR {
|
||||
#[doc = "Possible values of the field `DPA`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum DPAR {
|
||||
#[doc = "Channel n can suspend a lower priority channel."] _0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."] _1,
|
||||
#[doc = "Channel n can suspend a lower priority channel."]
|
||||
_0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
|
||||
_1,
|
||||
}
|
||||
impl DPAR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -101,7 +103,8 @@ impl DPAR {
|
||||
#[doc = "Possible values of the field `ECP`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ECPR {
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."] _0,
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
|
||||
_0,
|
||||
#[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
|
||||
_1,
|
||||
}
|
||||
@ -161,8 +164,10 @@ impl<'a> _CHPRIW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `DPA`"]
|
||||
pub enum DPAW {
|
||||
#[doc = "Channel n can suspend a lower priority channel."] _0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."] _1,
|
||||
#[doc = "Channel n can suspend a lower priority channel."]
|
||||
_0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
|
||||
_1,
|
||||
}
|
||||
impl DPAW {
|
||||
#[allow(missing_docs)]
|
||||
@ -217,7 +222,8 @@ impl<'a> _DPAW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `ECP`"]
|
||||
pub enum ECPW {
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."] _0,
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
|
||||
_0,
|
||||
#[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
|
||||
_1,
|
||||
}
|
||||
|
@ -56,8 +56,10 @@ impl CHPRIR {
|
||||
#[doc = "Possible values of the field `DPA`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum DPAR {
|
||||
#[doc = "Channel n can suspend a lower priority channel."] _0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."] _1,
|
||||
#[doc = "Channel n can suspend a lower priority channel."]
|
||||
_0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
|
||||
_1,
|
||||
}
|
||||
impl DPAR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -101,7 +103,8 @@ impl DPAR {
|
||||
#[doc = "Possible values of the field `ECP`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ECPR {
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."] _0,
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
|
||||
_0,
|
||||
#[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
|
||||
_1,
|
||||
}
|
||||
@ -161,8 +164,10 @@ impl<'a> _CHPRIW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `DPA`"]
|
||||
pub enum DPAW {
|
||||
#[doc = "Channel n can suspend a lower priority channel."] _0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."] _1,
|
||||
#[doc = "Channel n can suspend a lower priority channel."]
|
||||
_0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
|
||||
_1,
|
||||
}
|
||||
impl DPAW {
|
||||
#[allow(missing_docs)]
|
||||
@ -217,7 +222,8 @@ impl<'a> _DPAW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `ECP`"]
|
||||
pub enum ECPW {
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."] _0,
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
|
||||
_0,
|
||||
#[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
|
||||
_1,
|
||||
}
|
||||
|
@ -56,8 +56,10 @@ impl CHPRIR {
|
||||
#[doc = "Possible values of the field `DPA`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum DPAR {
|
||||
#[doc = "Channel n can suspend a lower priority channel."] _0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."] _1,
|
||||
#[doc = "Channel n can suspend a lower priority channel."]
|
||||
_0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
|
||||
_1,
|
||||
}
|
||||
impl DPAR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -101,7 +103,8 @@ impl DPAR {
|
||||
#[doc = "Possible values of the field `ECP`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ECPR {
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."] _0,
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
|
||||
_0,
|
||||
#[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
|
||||
_1,
|
||||
}
|
||||
@ -161,8 +164,10 @@ impl<'a> _CHPRIW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `DPA`"]
|
||||
pub enum DPAW {
|
||||
#[doc = "Channel n can suspend a lower priority channel."] _0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."] _1,
|
||||
#[doc = "Channel n can suspend a lower priority channel."]
|
||||
_0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
|
||||
_1,
|
||||
}
|
||||
impl DPAW {
|
||||
#[allow(missing_docs)]
|
||||
@ -217,7 +222,8 @@ impl<'a> _DPAW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `ECP`"]
|
||||
pub enum ECPW {
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."] _0,
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
|
||||
_0,
|
||||
#[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
|
||||
_1,
|
||||
}
|
||||
|
@ -56,8 +56,10 @@ impl CHPRIR {
|
||||
#[doc = "Possible values of the field `DPA`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum DPAR {
|
||||
#[doc = "Channel n can suspend a lower priority channel."] _0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."] _1,
|
||||
#[doc = "Channel n can suspend a lower priority channel."]
|
||||
_0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
|
||||
_1,
|
||||
}
|
||||
impl DPAR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -101,7 +103,8 @@ impl DPAR {
|
||||
#[doc = "Possible values of the field `ECP`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ECPR {
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."] _0,
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
|
||||
_0,
|
||||
#[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
|
||||
_1,
|
||||
}
|
||||
@ -161,8 +164,10 @@ impl<'a> _CHPRIW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `DPA`"]
|
||||
pub enum DPAW {
|
||||
#[doc = "Channel n can suspend a lower priority channel."] _0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."] _1,
|
||||
#[doc = "Channel n can suspend a lower priority channel."]
|
||||
_0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
|
||||
_1,
|
||||
}
|
||||
impl DPAW {
|
||||
#[allow(missing_docs)]
|
||||
@ -217,7 +222,8 @@ impl<'a> _DPAW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `ECP`"]
|
||||
pub enum ECPW {
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."] _0,
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
|
||||
_0,
|
||||
#[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
|
||||
_1,
|
||||
}
|
||||
|
@ -56,8 +56,10 @@ impl CHPRIR {
|
||||
#[doc = "Possible values of the field `DPA`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum DPAR {
|
||||
#[doc = "Channel n can suspend a lower priority channel."] _0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."] _1,
|
||||
#[doc = "Channel n can suspend a lower priority channel."]
|
||||
_0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
|
||||
_1,
|
||||
}
|
||||
impl DPAR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -101,7 +103,8 @@ impl DPAR {
|
||||
#[doc = "Possible values of the field `ECP`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ECPR {
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."] _0,
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
|
||||
_0,
|
||||
#[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
|
||||
_1,
|
||||
}
|
||||
@ -161,8 +164,10 @@ impl<'a> _CHPRIW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `DPA`"]
|
||||
pub enum DPAW {
|
||||
#[doc = "Channel n can suspend a lower priority channel."] _0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."] _1,
|
||||
#[doc = "Channel n can suspend a lower priority channel."]
|
||||
_0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
|
||||
_1,
|
||||
}
|
||||
impl DPAW {
|
||||
#[allow(missing_docs)]
|
||||
@ -217,7 +222,8 @@ impl<'a> _DPAW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `ECP`"]
|
||||
pub enum ECPW {
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."] _0,
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
|
||||
_0,
|
||||
#[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
|
||||
_1,
|
||||
}
|
||||
|
@ -56,8 +56,10 @@ impl CHPRIR {
|
||||
#[doc = "Possible values of the field `DPA`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum DPAR {
|
||||
#[doc = "Channel n can suspend a lower priority channel."] _0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."] _1,
|
||||
#[doc = "Channel n can suspend a lower priority channel."]
|
||||
_0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
|
||||
_1,
|
||||
}
|
||||
impl DPAR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -101,7 +103,8 @@ impl DPAR {
|
||||
#[doc = "Possible values of the field `ECP`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ECPR {
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."] _0,
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
|
||||
_0,
|
||||
#[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
|
||||
_1,
|
||||
}
|
||||
@ -161,8 +164,10 @@ impl<'a> _CHPRIW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `DPA`"]
|
||||
pub enum DPAW {
|
||||
#[doc = "Channel n can suspend a lower priority channel."] _0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."] _1,
|
||||
#[doc = "Channel n can suspend a lower priority channel."]
|
||||
_0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
|
||||
_1,
|
||||
}
|
||||
impl DPAW {
|
||||
#[allow(missing_docs)]
|
||||
@ -217,7 +222,8 @@ impl<'a> _DPAW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `ECP`"]
|
||||
pub enum ECPW {
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."] _0,
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
|
||||
_0,
|
||||
#[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
|
||||
_1,
|
||||
}
|
||||
|
@ -56,8 +56,10 @@ impl CHPRIR {
|
||||
#[doc = "Possible values of the field `DPA`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum DPAR {
|
||||
#[doc = "Channel n can suspend a lower priority channel."] _0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."] _1,
|
||||
#[doc = "Channel n can suspend a lower priority channel."]
|
||||
_0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
|
||||
_1,
|
||||
}
|
||||
impl DPAR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -101,7 +103,8 @@ impl DPAR {
|
||||
#[doc = "Possible values of the field `ECP`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ECPR {
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."] _0,
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
|
||||
_0,
|
||||
#[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
|
||||
_1,
|
||||
}
|
||||
@ -161,8 +164,10 @@ impl<'a> _CHPRIW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `DPA`"]
|
||||
pub enum DPAW {
|
||||
#[doc = "Channel n can suspend a lower priority channel."] _0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."] _1,
|
||||
#[doc = "Channel n can suspend a lower priority channel."]
|
||||
_0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
|
||||
_1,
|
||||
}
|
||||
impl DPAW {
|
||||
#[allow(missing_docs)]
|
||||
@ -217,7 +222,8 @@ impl<'a> _DPAW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `ECP`"]
|
||||
pub enum ECPW {
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."] _0,
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
|
||||
_0,
|
||||
#[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
|
||||
_1,
|
||||
}
|
||||
|
@ -56,8 +56,10 @@ impl CHPRIR {
|
||||
#[doc = "Possible values of the field `DPA`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum DPAR {
|
||||
#[doc = "Channel n can suspend a lower priority channel."] _0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."] _1,
|
||||
#[doc = "Channel n can suspend a lower priority channel."]
|
||||
_0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
|
||||
_1,
|
||||
}
|
||||
impl DPAR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -101,7 +103,8 @@ impl DPAR {
|
||||
#[doc = "Possible values of the field `ECP`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ECPR {
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."] _0,
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
|
||||
_0,
|
||||
#[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
|
||||
_1,
|
||||
}
|
||||
@ -161,8 +164,10 @@ impl<'a> _CHPRIW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `DPA`"]
|
||||
pub enum DPAW {
|
||||
#[doc = "Channel n can suspend a lower priority channel."] _0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."] _1,
|
||||
#[doc = "Channel n can suspend a lower priority channel."]
|
||||
_0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
|
||||
_1,
|
||||
}
|
||||
impl DPAW {
|
||||
#[allow(missing_docs)]
|
||||
@ -217,7 +222,8 @@ impl<'a> _DPAW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `ECP`"]
|
||||
pub enum ECPW {
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."] _0,
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
|
||||
_0,
|
||||
#[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
|
||||
_1,
|
||||
}
|
||||
|
@ -56,8 +56,10 @@ impl CHPRIR {
|
||||
#[doc = "Possible values of the field `DPA`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum DPAR {
|
||||
#[doc = "Channel n can suspend a lower priority channel."] _0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."] _1,
|
||||
#[doc = "Channel n can suspend a lower priority channel."]
|
||||
_0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
|
||||
_1,
|
||||
}
|
||||
impl DPAR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -101,7 +103,8 @@ impl DPAR {
|
||||
#[doc = "Possible values of the field `ECP`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ECPR {
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."] _0,
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
|
||||
_0,
|
||||
#[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
|
||||
_1,
|
||||
}
|
||||
@ -161,8 +164,10 @@ impl<'a> _CHPRIW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `DPA`"]
|
||||
pub enum DPAW {
|
||||
#[doc = "Channel n can suspend a lower priority channel."] _0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."] _1,
|
||||
#[doc = "Channel n can suspend a lower priority channel."]
|
||||
_0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
|
||||
_1,
|
||||
}
|
||||
impl DPAW {
|
||||
#[allow(missing_docs)]
|
||||
@ -217,7 +222,8 @@ impl<'a> _DPAW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `ECP`"]
|
||||
pub enum ECPW {
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."] _0,
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
|
||||
_0,
|
||||
#[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
|
||||
_1,
|
||||
}
|
||||
|
@ -56,8 +56,10 @@ impl CHPRIR {
|
||||
#[doc = "Possible values of the field `DPA`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum DPAR {
|
||||
#[doc = "Channel n can suspend a lower priority channel."] _0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."] _1,
|
||||
#[doc = "Channel n can suspend a lower priority channel."]
|
||||
_0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
|
||||
_1,
|
||||
}
|
||||
impl DPAR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -101,7 +103,8 @@ impl DPAR {
|
||||
#[doc = "Possible values of the field `ECP`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ECPR {
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."] _0,
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
|
||||
_0,
|
||||
#[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
|
||||
_1,
|
||||
}
|
||||
@ -161,8 +164,10 @@ impl<'a> _CHPRIW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `DPA`"]
|
||||
pub enum DPAW {
|
||||
#[doc = "Channel n can suspend a lower priority channel."] _0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."] _1,
|
||||
#[doc = "Channel n can suspend a lower priority channel."]
|
||||
_0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
|
||||
_1,
|
||||
}
|
||||
impl DPAW {
|
||||
#[allow(missing_docs)]
|
||||
@ -217,7 +222,8 @@ impl<'a> _DPAW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `ECP`"]
|
||||
pub enum ECPW {
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."] _0,
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
|
||||
_0,
|
||||
#[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
|
||||
_1,
|
||||
}
|
||||
|
@ -56,8 +56,10 @@ impl CHPRIR {
|
||||
#[doc = "Possible values of the field `DPA`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum DPAR {
|
||||
#[doc = "Channel n can suspend a lower priority channel."] _0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."] _1,
|
||||
#[doc = "Channel n can suspend a lower priority channel."]
|
||||
_0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
|
||||
_1,
|
||||
}
|
||||
impl DPAR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -101,7 +103,8 @@ impl DPAR {
|
||||
#[doc = "Possible values of the field `ECP`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ECPR {
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."] _0,
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
|
||||
_0,
|
||||
#[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
|
||||
_1,
|
||||
}
|
||||
@ -161,8 +164,10 @@ impl<'a> _CHPRIW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `DPA`"]
|
||||
pub enum DPAW {
|
||||
#[doc = "Channel n can suspend a lower priority channel."] _0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."] _1,
|
||||
#[doc = "Channel n can suspend a lower priority channel."]
|
||||
_0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
|
||||
_1,
|
||||
}
|
||||
impl DPAW {
|
||||
#[allow(missing_docs)]
|
||||
@ -217,7 +222,8 @@ impl<'a> _DPAW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `ECP`"]
|
||||
pub enum ECPW {
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."] _0,
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
|
||||
_0,
|
||||
#[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
|
||||
_1,
|
||||
}
|
||||
|
@ -56,8 +56,10 @@ impl CHPRIR {
|
||||
#[doc = "Possible values of the field `DPA`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum DPAR {
|
||||
#[doc = "Channel n can suspend a lower priority channel."] _0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."] _1,
|
||||
#[doc = "Channel n can suspend a lower priority channel."]
|
||||
_0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
|
||||
_1,
|
||||
}
|
||||
impl DPAR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -101,7 +103,8 @@ impl DPAR {
|
||||
#[doc = "Possible values of the field `ECP`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ECPR {
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."] _0,
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
|
||||
_0,
|
||||
#[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
|
||||
_1,
|
||||
}
|
||||
@ -161,8 +164,10 @@ impl<'a> _CHPRIW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `DPA`"]
|
||||
pub enum DPAW {
|
||||
#[doc = "Channel n can suspend a lower priority channel."] _0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."] _1,
|
||||
#[doc = "Channel n can suspend a lower priority channel."]
|
||||
_0,
|
||||
#[doc = "Channel n cannot suspend any channel, regardless of channel priority."]
|
||||
_1,
|
||||
}
|
||||
impl DPAW {
|
||||
#[allow(missing_docs)]
|
||||
@ -217,7 +222,8 @@ impl<'a> _DPAW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `ECP`"]
|
||||
pub enum ECPW {
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."] _0,
|
||||
#[doc = "Channel n cannot be suspended by a higher priority channel's service request."]
|
||||
_0,
|
||||
#[doc = "Channel n can be temporarily suspended by the service request of a higher priority channel."]
|
||||
_1,
|
||||
}
|
||||
|
@ -45,8 +45,10 @@ impl super::EARS {
|
||||
#[doc = "Possible values of the field `EDREQ_0`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum EDREQ_0R {
|
||||
#[doc = "Disable asynchronous DMA request for channel 0."] _0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 0."] _1,
|
||||
#[doc = "Disable asynchronous DMA request for channel 0."]
|
||||
_0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 0."]
|
||||
_1,
|
||||
}
|
||||
impl EDREQ_0R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -90,8 +92,10 @@ impl EDREQ_0R {
|
||||
#[doc = "Possible values of the field `EDREQ_1`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum EDREQ_1R {
|
||||
#[doc = "Disable asynchronous DMA request for channel 1"] _0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 1."] _1,
|
||||
#[doc = "Disable asynchronous DMA request for channel 1"]
|
||||
_0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 1."]
|
||||
_1,
|
||||
}
|
||||
impl EDREQ_1R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -135,8 +139,10 @@ impl EDREQ_1R {
|
||||
#[doc = "Possible values of the field `EDREQ_2`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum EDREQ_2R {
|
||||
#[doc = "Disable asynchronous DMA request for channel 2."] _0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 2."] _1,
|
||||
#[doc = "Disable asynchronous DMA request for channel 2."]
|
||||
_0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 2."]
|
||||
_1,
|
||||
}
|
||||
impl EDREQ_2R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -180,8 +186,10 @@ impl EDREQ_2R {
|
||||
#[doc = "Possible values of the field `EDREQ_3`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum EDREQ_3R {
|
||||
#[doc = "Disable asynchronous DMA request for channel 3."] _0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 3."] _1,
|
||||
#[doc = "Disable asynchronous DMA request for channel 3."]
|
||||
_0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 3."]
|
||||
_1,
|
||||
}
|
||||
impl EDREQ_3R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -225,8 +233,10 @@ impl EDREQ_3R {
|
||||
#[doc = "Possible values of the field `EDREQ_4`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum EDREQ_4R {
|
||||
#[doc = "Disable asynchronous DMA request for channel 4."] _0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 4."] _1,
|
||||
#[doc = "Disable asynchronous DMA request for channel 4."]
|
||||
_0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 4."]
|
||||
_1,
|
||||
}
|
||||
impl EDREQ_4R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -270,8 +280,10 @@ impl EDREQ_4R {
|
||||
#[doc = "Possible values of the field `EDREQ_5`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum EDREQ_5R {
|
||||
#[doc = "Disable asynchronous DMA request for channel 5."] _0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 5."] _1,
|
||||
#[doc = "Disable asynchronous DMA request for channel 5."]
|
||||
_0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 5."]
|
||||
_1,
|
||||
}
|
||||
impl EDREQ_5R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -315,8 +327,10 @@ impl EDREQ_5R {
|
||||
#[doc = "Possible values of the field `EDREQ_6`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum EDREQ_6R {
|
||||
#[doc = "Disable asynchronous DMA request for channel 6."] _0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 6."] _1,
|
||||
#[doc = "Disable asynchronous DMA request for channel 6."]
|
||||
_0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 6."]
|
||||
_1,
|
||||
}
|
||||
impl EDREQ_6R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -360,8 +374,10 @@ impl EDREQ_6R {
|
||||
#[doc = "Possible values of the field `EDREQ_7`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum EDREQ_7R {
|
||||
#[doc = "Disable asynchronous DMA request for channel 7."] _0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 7."] _1,
|
||||
#[doc = "Disable asynchronous DMA request for channel 7."]
|
||||
_0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 7."]
|
||||
_1,
|
||||
}
|
||||
impl EDREQ_7R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -405,8 +421,10 @@ impl EDREQ_7R {
|
||||
#[doc = "Possible values of the field `EDREQ_8`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum EDREQ_8R {
|
||||
#[doc = "Disable asynchronous DMA request for channel 8."] _0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 8."] _1,
|
||||
#[doc = "Disable asynchronous DMA request for channel 8."]
|
||||
_0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 8."]
|
||||
_1,
|
||||
}
|
||||
impl EDREQ_8R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -450,8 +468,10 @@ impl EDREQ_8R {
|
||||
#[doc = "Possible values of the field `EDREQ_9`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum EDREQ_9R {
|
||||
#[doc = "Disable asynchronous DMA request for channel 9."] _0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 9."] _1,
|
||||
#[doc = "Disable asynchronous DMA request for channel 9."]
|
||||
_0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 9."]
|
||||
_1,
|
||||
}
|
||||
impl EDREQ_9R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -495,8 +515,10 @@ impl EDREQ_9R {
|
||||
#[doc = "Possible values of the field `EDREQ_10`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum EDREQ_10R {
|
||||
#[doc = "Disable asynchronous DMA request for channel 10."] _0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 10."] _1,
|
||||
#[doc = "Disable asynchronous DMA request for channel 10."]
|
||||
_0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 10."]
|
||||
_1,
|
||||
}
|
||||
impl EDREQ_10R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -540,8 +562,10 @@ impl EDREQ_10R {
|
||||
#[doc = "Possible values of the field `EDREQ_11`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum EDREQ_11R {
|
||||
#[doc = "Disable asynchronous DMA request for channel 11."] _0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 11."] _1,
|
||||
#[doc = "Disable asynchronous DMA request for channel 11."]
|
||||
_0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 11."]
|
||||
_1,
|
||||
}
|
||||
impl EDREQ_11R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -585,8 +609,10 @@ impl EDREQ_11R {
|
||||
#[doc = "Possible values of the field `EDREQ_12`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum EDREQ_12R {
|
||||
#[doc = "Disable asynchronous DMA request for channel 12."] _0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 12."] _1,
|
||||
#[doc = "Disable asynchronous DMA request for channel 12."]
|
||||
_0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 12."]
|
||||
_1,
|
||||
}
|
||||
impl EDREQ_12R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -630,8 +656,10 @@ impl EDREQ_12R {
|
||||
#[doc = "Possible values of the field `EDREQ_13`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum EDREQ_13R {
|
||||
#[doc = "Disable asynchronous DMA request for channel 13."] _0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 13."] _1,
|
||||
#[doc = "Disable asynchronous DMA request for channel 13."]
|
||||
_0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 13."]
|
||||
_1,
|
||||
}
|
||||
impl EDREQ_13R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -675,8 +703,10 @@ impl EDREQ_13R {
|
||||
#[doc = "Possible values of the field `EDREQ_14`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum EDREQ_14R {
|
||||
#[doc = "Disable asynchronous DMA request for channel 14."] _0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 14."] _1,
|
||||
#[doc = "Disable asynchronous DMA request for channel 14."]
|
||||
_0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 14."]
|
||||
_1,
|
||||
}
|
||||
impl EDREQ_14R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -720,8 +750,10 @@ impl EDREQ_14R {
|
||||
#[doc = "Possible values of the field `EDREQ_15`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum EDREQ_15R {
|
||||
#[doc = "Disable asynchronous DMA request for channel 15."] _0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 15."] _1,
|
||||
#[doc = "Disable asynchronous DMA request for channel 15."]
|
||||
_0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 15."]
|
||||
_1,
|
||||
}
|
||||
impl EDREQ_15R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -764,8 +796,10 @@ impl EDREQ_15R {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `EDREQ_0`"]
|
||||
pub enum EDREQ_0W {
|
||||
#[doc = "Disable asynchronous DMA request for channel 0."] _0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 0."] _1,
|
||||
#[doc = "Disable asynchronous DMA request for channel 0."]
|
||||
_0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 0."]
|
||||
_1,
|
||||
}
|
||||
impl EDREQ_0W {
|
||||
#[allow(missing_docs)]
|
||||
@ -820,8 +854,10 @@ impl<'a> _EDREQ_0W<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `EDREQ_1`"]
|
||||
pub enum EDREQ_1W {
|
||||
#[doc = "Disable asynchronous DMA request for channel 1"] _0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 1."] _1,
|
||||
#[doc = "Disable asynchronous DMA request for channel 1"]
|
||||
_0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 1."]
|
||||
_1,
|
||||
}
|
||||
impl EDREQ_1W {
|
||||
#[allow(missing_docs)]
|
||||
@ -876,8 +912,10 @@ impl<'a> _EDREQ_1W<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `EDREQ_2`"]
|
||||
pub enum EDREQ_2W {
|
||||
#[doc = "Disable asynchronous DMA request for channel 2."] _0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 2."] _1,
|
||||
#[doc = "Disable asynchronous DMA request for channel 2."]
|
||||
_0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 2."]
|
||||
_1,
|
||||
}
|
||||
impl EDREQ_2W {
|
||||
#[allow(missing_docs)]
|
||||
@ -932,8 +970,10 @@ impl<'a> _EDREQ_2W<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `EDREQ_3`"]
|
||||
pub enum EDREQ_3W {
|
||||
#[doc = "Disable asynchronous DMA request for channel 3."] _0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 3."] _1,
|
||||
#[doc = "Disable asynchronous DMA request for channel 3."]
|
||||
_0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 3."]
|
||||
_1,
|
||||
}
|
||||
impl EDREQ_3W {
|
||||
#[allow(missing_docs)]
|
||||
@ -988,8 +1028,10 @@ impl<'a> _EDREQ_3W<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `EDREQ_4`"]
|
||||
pub enum EDREQ_4W {
|
||||
#[doc = "Disable asynchronous DMA request for channel 4."] _0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 4."] _1,
|
||||
#[doc = "Disable asynchronous DMA request for channel 4."]
|
||||
_0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 4."]
|
||||
_1,
|
||||
}
|
||||
impl EDREQ_4W {
|
||||
#[allow(missing_docs)]
|
||||
@ -1044,8 +1086,10 @@ impl<'a> _EDREQ_4W<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `EDREQ_5`"]
|
||||
pub enum EDREQ_5W {
|
||||
#[doc = "Disable asynchronous DMA request for channel 5."] _0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 5."] _1,
|
||||
#[doc = "Disable asynchronous DMA request for channel 5."]
|
||||
_0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 5."]
|
||||
_1,
|
||||
}
|
||||
impl EDREQ_5W {
|
||||
#[allow(missing_docs)]
|
||||
@ -1100,8 +1144,10 @@ impl<'a> _EDREQ_5W<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `EDREQ_6`"]
|
||||
pub enum EDREQ_6W {
|
||||
#[doc = "Disable asynchronous DMA request for channel 6."] _0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 6."] _1,
|
||||
#[doc = "Disable asynchronous DMA request for channel 6."]
|
||||
_0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 6."]
|
||||
_1,
|
||||
}
|
||||
impl EDREQ_6W {
|
||||
#[allow(missing_docs)]
|
||||
@ -1156,8 +1202,10 @@ impl<'a> _EDREQ_6W<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `EDREQ_7`"]
|
||||
pub enum EDREQ_7W {
|
||||
#[doc = "Disable asynchronous DMA request for channel 7."] _0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 7."] _1,
|
||||
#[doc = "Disable asynchronous DMA request for channel 7."]
|
||||
_0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 7."]
|
||||
_1,
|
||||
}
|
||||
impl EDREQ_7W {
|
||||
#[allow(missing_docs)]
|
||||
@ -1212,8 +1260,10 @@ impl<'a> _EDREQ_7W<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `EDREQ_8`"]
|
||||
pub enum EDREQ_8W {
|
||||
#[doc = "Disable asynchronous DMA request for channel 8."] _0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 8."] _1,
|
||||
#[doc = "Disable asynchronous DMA request for channel 8."]
|
||||
_0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 8."]
|
||||
_1,
|
||||
}
|
||||
impl EDREQ_8W {
|
||||
#[allow(missing_docs)]
|
||||
@ -1268,8 +1318,10 @@ impl<'a> _EDREQ_8W<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `EDREQ_9`"]
|
||||
pub enum EDREQ_9W {
|
||||
#[doc = "Disable asynchronous DMA request for channel 9."] _0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 9."] _1,
|
||||
#[doc = "Disable asynchronous DMA request for channel 9."]
|
||||
_0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 9."]
|
||||
_1,
|
||||
}
|
||||
impl EDREQ_9W {
|
||||
#[allow(missing_docs)]
|
||||
@ -1324,8 +1376,10 @@ impl<'a> _EDREQ_9W<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `EDREQ_10`"]
|
||||
pub enum EDREQ_10W {
|
||||
#[doc = "Disable asynchronous DMA request for channel 10."] _0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 10."] _1,
|
||||
#[doc = "Disable asynchronous DMA request for channel 10."]
|
||||
_0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 10."]
|
||||
_1,
|
||||
}
|
||||
impl EDREQ_10W {
|
||||
#[allow(missing_docs)]
|
||||
@ -1380,8 +1434,10 @@ impl<'a> _EDREQ_10W<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `EDREQ_11`"]
|
||||
pub enum EDREQ_11W {
|
||||
#[doc = "Disable asynchronous DMA request for channel 11."] _0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 11."] _1,
|
||||
#[doc = "Disable asynchronous DMA request for channel 11."]
|
||||
_0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 11."]
|
||||
_1,
|
||||
}
|
||||
impl EDREQ_11W {
|
||||
#[allow(missing_docs)]
|
||||
@ -1436,8 +1492,10 @@ impl<'a> _EDREQ_11W<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `EDREQ_12`"]
|
||||
pub enum EDREQ_12W {
|
||||
#[doc = "Disable asynchronous DMA request for channel 12."] _0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 12."] _1,
|
||||
#[doc = "Disable asynchronous DMA request for channel 12."]
|
||||
_0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 12."]
|
||||
_1,
|
||||
}
|
||||
impl EDREQ_12W {
|
||||
#[allow(missing_docs)]
|
||||
@ -1492,8 +1550,10 @@ impl<'a> _EDREQ_12W<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `EDREQ_13`"]
|
||||
pub enum EDREQ_13W {
|
||||
#[doc = "Disable asynchronous DMA request for channel 13."] _0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 13."] _1,
|
||||
#[doc = "Disable asynchronous DMA request for channel 13."]
|
||||
_0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 13."]
|
||||
_1,
|
||||
}
|
||||
impl EDREQ_13W {
|
||||
#[allow(missing_docs)]
|
||||
@ -1548,8 +1608,10 @@ impl<'a> _EDREQ_13W<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `EDREQ_14`"]
|
||||
pub enum EDREQ_14W {
|
||||
#[doc = "Disable asynchronous DMA request for channel 14."] _0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 14."] _1,
|
||||
#[doc = "Disable asynchronous DMA request for channel 14."]
|
||||
_0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 14."]
|
||||
_1,
|
||||
}
|
||||
impl EDREQ_14W {
|
||||
#[allow(missing_docs)]
|
||||
@ -1604,8 +1666,10 @@ impl<'a> _EDREQ_14W<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `EDREQ_15`"]
|
||||
pub enum EDREQ_15W {
|
||||
#[doc = "Disable asynchronous DMA request for channel 15."] _0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 15."] _1,
|
||||
#[doc = "Disable asynchronous DMA request for channel 15."]
|
||||
_0,
|
||||
#[doc = "Enable asynchronous DMA request for channel 15."]
|
||||
_1,
|
||||
}
|
||||
impl EDREQ_15W {
|
||||
#[allow(missing_docs)]
|
||||
|
@ -45,7 +45,8 @@ impl super::EEI {
|
||||
#[doc = "Possible values of the field `EEI0`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum EEI0R {
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"] _0,
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"]
|
||||
_0,
|
||||
#[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
|
||||
_1,
|
||||
}
|
||||
@ -91,7 +92,8 @@ impl EEI0R {
|
||||
#[doc = "Possible values of the field `EEI1`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum EEI1R {
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"] _0,
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"]
|
||||
_0,
|
||||
#[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
|
||||
_1,
|
||||
}
|
||||
@ -137,7 +139,8 @@ impl EEI1R {
|
||||
#[doc = "Possible values of the field `EEI2`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum EEI2R {
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"] _0,
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"]
|
||||
_0,
|
||||
#[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
|
||||
_1,
|
||||
}
|
||||
@ -183,7 +186,8 @@ impl EEI2R {
|
||||
#[doc = "Possible values of the field `EEI3`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum EEI3R {
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"] _0,
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"]
|
||||
_0,
|
||||
#[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
|
||||
_1,
|
||||
}
|
||||
@ -229,7 +233,8 @@ impl EEI3R {
|
||||
#[doc = "Possible values of the field `EEI4`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum EEI4R {
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"] _0,
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"]
|
||||
_0,
|
||||
#[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
|
||||
_1,
|
||||
}
|
||||
@ -275,7 +280,8 @@ impl EEI4R {
|
||||
#[doc = "Possible values of the field `EEI5`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum EEI5R {
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"] _0,
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"]
|
||||
_0,
|
||||
#[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
|
||||
_1,
|
||||
}
|
||||
@ -321,7 +327,8 @@ impl EEI5R {
|
||||
#[doc = "Possible values of the field `EEI6`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum EEI6R {
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"] _0,
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"]
|
||||
_0,
|
||||
#[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
|
||||
_1,
|
||||
}
|
||||
@ -367,7 +374,8 @@ impl EEI6R {
|
||||
#[doc = "Possible values of the field `EEI7`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum EEI7R {
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"] _0,
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"]
|
||||
_0,
|
||||
#[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
|
||||
_1,
|
||||
}
|
||||
@ -413,7 +421,8 @@ impl EEI7R {
|
||||
#[doc = "Possible values of the field `EEI8`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum EEI8R {
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"] _0,
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"]
|
||||
_0,
|
||||
#[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
|
||||
_1,
|
||||
}
|
||||
@ -459,7 +468,8 @@ impl EEI8R {
|
||||
#[doc = "Possible values of the field `EEI9`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum EEI9R {
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"] _0,
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"]
|
||||
_0,
|
||||
#[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
|
||||
_1,
|
||||
}
|
||||
@ -505,7 +515,8 @@ impl EEI9R {
|
||||
#[doc = "Possible values of the field `EEI10`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum EEI10R {
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"] _0,
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"]
|
||||
_0,
|
||||
#[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
|
||||
_1,
|
||||
}
|
||||
@ -551,7 +562,8 @@ impl EEI10R {
|
||||
#[doc = "Possible values of the field `EEI11`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum EEI11R {
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"] _0,
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"]
|
||||
_0,
|
||||
#[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
|
||||
_1,
|
||||
}
|
||||
@ -597,7 +609,8 @@ impl EEI11R {
|
||||
#[doc = "Possible values of the field `EEI12`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum EEI12R {
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"] _0,
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"]
|
||||
_0,
|
||||
#[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
|
||||
_1,
|
||||
}
|
||||
@ -643,7 +656,8 @@ impl EEI12R {
|
||||
#[doc = "Possible values of the field `EEI13`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum EEI13R {
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"] _0,
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"]
|
||||
_0,
|
||||
#[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
|
||||
_1,
|
||||
}
|
||||
@ -689,7 +703,8 @@ impl EEI13R {
|
||||
#[doc = "Possible values of the field `EEI14`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum EEI14R {
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"] _0,
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"]
|
||||
_0,
|
||||
#[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
|
||||
_1,
|
||||
}
|
||||
@ -735,7 +750,8 @@ impl EEI14R {
|
||||
#[doc = "Possible values of the field `EEI15`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum EEI15R {
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"] _0,
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"]
|
||||
_0,
|
||||
#[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
|
||||
_1,
|
||||
}
|
||||
@ -780,7 +796,8 @@ impl EEI15R {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `EEI0`"]
|
||||
pub enum EEI0W {
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"] _0,
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"]
|
||||
_0,
|
||||
#[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
|
||||
_1,
|
||||
}
|
||||
@ -837,7 +854,8 @@ impl<'a> _EEI0W<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `EEI1`"]
|
||||
pub enum EEI1W {
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"] _0,
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"]
|
||||
_0,
|
||||
#[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
|
||||
_1,
|
||||
}
|
||||
@ -894,7 +912,8 @@ impl<'a> _EEI1W<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `EEI2`"]
|
||||
pub enum EEI2W {
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"] _0,
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"]
|
||||
_0,
|
||||
#[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
|
||||
_1,
|
||||
}
|
||||
@ -951,7 +970,8 @@ impl<'a> _EEI2W<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `EEI3`"]
|
||||
pub enum EEI3W {
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"] _0,
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"]
|
||||
_0,
|
||||
#[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
|
||||
_1,
|
||||
}
|
||||
@ -1008,7 +1028,8 @@ impl<'a> _EEI3W<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `EEI4`"]
|
||||
pub enum EEI4W {
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"] _0,
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"]
|
||||
_0,
|
||||
#[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
|
||||
_1,
|
||||
}
|
||||
@ -1065,7 +1086,8 @@ impl<'a> _EEI4W<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `EEI5`"]
|
||||
pub enum EEI5W {
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"] _0,
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"]
|
||||
_0,
|
||||
#[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
|
||||
_1,
|
||||
}
|
||||
@ -1122,7 +1144,8 @@ impl<'a> _EEI5W<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `EEI6`"]
|
||||
pub enum EEI6W {
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"] _0,
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"]
|
||||
_0,
|
||||
#[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
|
||||
_1,
|
||||
}
|
||||
@ -1179,7 +1202,8 @@ impl<'a> _EEI6W<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `EEI7`"]
|
||||
pub enum EEI7W {
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"] _0,
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"]
|
||||
_0,
|
||||
#[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
|
||||
_1,
|
||||
}
|
||||
@ -1236,7 +1260,8 @@ impl<'a> _EEI7W<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `EEI8`"]
|
||||
pub enum EEI8W {
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"] _0,
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"]
|
||||
_0,
|
||||
#[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
|
||||
_1,
|
||||
}
|
||||
@ -1293,7 +1318,8 @@ impl<'a> _EEI8W<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `EEI9`"]
|
||||
pub enum EEI9W {
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"] _0,
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"]
|
||||
_0,
|
||||
#[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
|
||||
_1,
|
||||
}
|
||||
@ -1350,7 +1376,8 @@ impl<'a> _EEI9W<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `EEI10`"]
|
||||
pub enum EEI10W {
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"] _0,
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"]
|
||||
_0,
|
||||
#[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
|
||||
_1,
|
||||
}
|
||||
@ -1407,7 +1434,8 @@ impl<'a> _EEI10W<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `EEI11`"]
|
||||
pub enum EEI11W {
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"] _0,
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"]
|
||||
_0,
|
||||
#[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
|
||||
_1,
|
||||
}
|
||||
@ -1464,7 +1492,8 @@ impl<'a> _EEI11W<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `EEI12`"]
|
||||
pub enum EEI12W {
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"] _0,
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"]
|
||||
_0,
|
||||
#[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
|
||||
_1,
|
||||
}
|
||||
@ -1521,7 +1550,8 @@ impl<'a> _EEI12W<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `EEI13`"]
|
||||
pub enum EEI13W {
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"] _0,
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"]
|
||||
_0,
|
||||
#[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
|
||||
_1,
|
||||
}
|
||||
@ -1578,7 +1608,8 @@ impl<'a> _EEI13W<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `EEI14`"]
|
||||
pub enum EEI14W {
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"] _0,
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"]
|
||||
_0,
|
||||
#[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
|
||||
_1,
|
||||
}
|
||||
@ -1635,7 +1666,8 @@ impl<'a> _EEI14W<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `EEI15`"]
|
||||
pub enum EEI15W {
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"] _0,
|
||||
#[doc = "The error signal for corresponding channel does not generate an error interrupt"]
|
||||
_0,
|
||||
#[doc = "The assertion of the error signal for corresponding channel generates an error interrupt request"]
|
||||
_1,
|
||||
}
|
||||
|
@ -45,8 +45,10 @@ impl super::ERQ {
|
||||
#[doc = "Possible values of the field `ERQ0`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ERQ0R {
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"] _0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"] _1,
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"]
|
||||
_0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ERQ0R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -90,8 +92,10 @@ impl ERQ0R {
|
||||
#[doc = "Possible values of the field `ERQ1`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ERQ1R {
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"] _0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"] _1,
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"]
|
||||
_0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ERQ1R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -135,8 +139,10 @@ impl ERQ1R {
|
||||
#[doc = "Possible values of the field `ERQ2`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ERQ2R {
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"] _0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"] _1,
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"]
|
||||
_0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ERQ2R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -180,8 +186,10 @@ impl ERQ2R {
|
||||
#[doc = "Possible values of the field `ERQ3`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ERQ3R {
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"] _0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"] _1,
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"]
|
||||
_0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ERQ3R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -225,8 +233,10 @@ impl ERQ3R {
|
||||
#[doc = "Possible values of the field `ERQ4`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ERQ4R {
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"] _0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"] _1,
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"]
|
||||
_0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ERQ4R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -270,8 +280,10 @@ impl ERQ4R {
|
||||
#[doc = "Possible values of the field `ERQ5`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ERQ5R {
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"] _0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"] _1,
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"]
|
||||
_0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ERQ5R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -315,8 +327,10 @@ impl ERQ5R {
|
||||
#[doc = "Possible values of the field `ERQ6`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ERQ6R {
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"] _0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"] _1,
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"]
|
||||
_0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ERQ6R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -360,8 +374,10 @@ impl ERQ6R {
|
||||
#[doc = "Possible values of the field `ERQ7`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ERQ7R {
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"] _0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"] _1,
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"]
|
||||
_0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ERQ7R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -405,8 +421,10 @@ impl ERQ7R {
|
||||
#[doc = "Possible values of the field `ERQ8`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ERQ8R {
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"] _0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"] _1,
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"]
|
||||
_0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ERQ8R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -450,8 +468,10 @@ impl ERQ8R {
|
||||
#[doc = "Possible values of the field `ERQ9`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ERQ9R {
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"] _0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"] _1,
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"]
|
||||
_0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ERQ9R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -495,8 +515,10 @@ impl ERQ9R {
|
||||
#[doc = "Possible values of the field `ERQ10`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ERQ10R {
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"] _0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"] _1,
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"]
|
||||
_0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ERQ10R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -540,8 +562,10 @@ impl ERQ10R {
|
||||
#[doc = "Possible values of the field `ERQ11`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ERQ11R {
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"] _0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"] _1,
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"]
|
||||
_0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ERQ11R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -585,8 +609,10 @@ impl ERQ11R {
|
||||
#[doc = "Possible values of the field `ERQ12`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ERQ12R {
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"] _0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"] _1,
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"]
|
||||
_0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ERQ12R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -630,8 +656,10 @@ impl ERQ12R {
|
||||
#[doc = "Possible values of the field `ERQ13`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ERQ13R {
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"] _0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"] _1,
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"]
|
||||
_0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ERQ13R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -675,8 +703,10 @@ impl ERQ13R {
|
||||
#[doc = "Possible values of the field `ERQ14`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ERQ14R {
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"] _0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"] _1,
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"]
|
||||
_0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ERQ14R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -720,8 +750,10 @@ impl ERQ14R {
|
||||
#[doc = "Possible values of the field `ERQ15`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ERQ15R {
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"] _0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"] _1,
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"]
|
||||
_0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ERQ15R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -764,8 +796,10 @@ impl ERQ15R {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `ERQ0`"]
|
||||
pub enum ERQ0W {
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"] _0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"] _1,
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"]
|
||||
_0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ERQ0W {
|
||||
#[allow(missing_docs)]
|
||||
@ -820,8 +854,10 @@ impl<'a> _ERQ0W<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `ERQ1`"]
|
||||
pub enum ERQ1W {
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"] _0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"] _1,
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"]
|
||||
_0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ERQ1W {
|
||||
#[allow(missing_docs)]
|
||||
@ -876,8 +912,10 @@ impl<'a> _ERQ1W<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `ERQ2`"]
|
||||
pub enum ERQ2W {
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"] _0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"] _1,
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"]
|
||||
_0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ERQ2W {
|
||||
#[allow(missing_docs)]
|
||||
@ -932,8 +970,10 @@ impl<'a> _ERQ2W<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `ERQ3`"]
|
||||
pub enum ERQ3W {
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"] _0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"] _1,
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"]
|
||||
_0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ERQ3W {
|
||||
#[allow(missing_docs)]
|
||||
@ -988,8 +1028,10 @@ impl<'a> _ERQ3W<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `ERQ4`"]
|
||||
pub enum ERQ4W {
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"] _0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"] _1,
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"]
|
||||
_0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ERQ4W {
|
||||
#[allow(missing_docs)]
|
||||
@ -1044,8 +1086,10 @@ impl<'a> _ERQ4W<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `ERQ5`"]
|
||||
pub enum ERQ5W {
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"] _0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"] _1,
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"]
|
||||
_0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ERQ5W {
|
||||
#[allow(missing_docs)]
|
||||
@ -1100,8 +1144,10 @@ impl<'a> _ERQ5W<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `ERQ6`"]
|
||||
pub enum ERQ6W {
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"] _0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"] _1,
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"]
|
||||
_0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ERQ6W {
|
||||
#[allow(missing_docs)]
|
||||
@ -1156,8 +1202,10 @@ impl<'a> _ERQ6W<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `ERQ7`"]
|
||||
pub enum ERQ7W {
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"] _0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"] _1,
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"]
|
||||
_0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ERQ7W {
|
||||
#[allow(missing_docs)]
|
||||
@ -1212,8 +1260,10 @@ impl<'a> _ERQ7W<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `ERQ8`"]
|
||||
pub enum ERQ8W {
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"] _0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"] _1,
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"]
|
||||
_0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ERQ8W {
|
||||
#[allow(missing_docs)]
|
||||
@ -1268,8 +1318,10 @@ impl<'a> _ERQ8W<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `ERQ9`"]
|
||||
pub enum ERQ9W {
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"] _0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"] _1,
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"]
|
||||
_0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ERQ9W {
|
||||
#[allow(missing_docs)]
|
||||
@ -1324,8 +1376,10 @@ impl<'a> _ERQ9W<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `ERQ10`"]
|
||||
pub enum ERQ10W {
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"] _0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"] _1,
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"]
|
||||
_0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ERQ10W {
|
||||
#[allow(missing_docs)]
|
||||
@ -1380,8 +1434,10 @@ impl<'a> _ERQ10W<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `ERQ11`"]
|
||||
pub enum ERQ11W {
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"] _0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"] _1,
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"]
|
||||
_0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ERQ11W {
|
||||
#[allow(missing_docs)]
|
||||
@ -1436,8 +1492,10 @@ impl<'a> _ERQ11W<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `ERQ12`"]
|
||||
pub enum ERQ12W {
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"] _0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"] _1,
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"]
|
||||
_0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ERQ12W {
|
||||
#[allow(missing_docs)]
|
||||
@ -1492,8 +1550,10 @@ impl<'a> _ERQ12W<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `ERQ13`"]
|
||||
pub enum ERQ13W {
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"] _0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"] _1,
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"]
|
||||
_0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ERQ13W {
|
||||
#[allow(missing_docs)]
|
||||
@ -1548,8 +1608,10 @@ impl<'a> _ERQ13W<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `ERQ14`"]
|
||||
pub enum ERQ14W {
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"] _0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"] _1,
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"]
|
||||
_0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ERQ14W {
|
||||
#[allow(missing_docs)]
|
||||
@ -1604,8 +1666,10 @@ impl<'a> _ERQ14W<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `ERQ15`"]
|
||||
pub enum ERQ15W {
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"] _0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"] _1,
|
||||
#[doc = "The DMA request signal for the corresponding channel is disabled"]
|
||||
_0,
|
||||
#[doc = "The DMA request signal for the corresponding channel is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ERQ15W {
|
||||
#[allow(missing_docs)]
|
||||
|
@ -45,8 +45,10 @@ impl super::ERR {
|
||||
#[doc = "Possible values of the field `ERR0`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ERR0R {
|
||||
#[doc = "An error in this channel has not occurred"] _0,
|
||||
#[doc = "An error in this channel has occurred"] _1,
|
||||
#[doc = "An error in this channel has not occurred"]
|
||||
_0,
|
||||
#[doc = "An error in this channel has occurred"]
|
||||
_1,
|
||||
}
|
||||
impl ERR0R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -90,8 +92,10 @@ impl ERR0R {
|
||||
#[doc = "Possible values of the field `ERR1`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ERR1R {
|
||||
#[doc = "An error in this channel has not occurred"] _0,
|
||||
#[doc = "An error in this channel has occurred"] _1,
|
||||
#[doc = "An error in this channel has not occurred"]
|
||||
_0,
|
||||
#[doc = "An error in this channel has occurred"]
|
||||
_1,
|
||||
}
|
||||
impl ERR1R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -135,8 +139,10 @@ impl ERR1R {
|
||||
#[doc = "Possible values of the field `ERR2`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ERR2R {
|
||||
#[doc = "An error in this channel has not occurred"] _0,
|
||||
#[doc = "An error in this channel has occurred"] _1,
|
||||
#[doc = "An error in this channel has not occurred"]
|
||||
_0,
|
||||
#[doc = "An error in this channel has occurred"]
|
||||
_1,
|
||||
}
|
||||
impl ERR2R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -180,8 +186,10 @@ impl ERR2R {
|
||||
#[doc = "Possible values of the field `ERR3`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ERR3R {
|
||||
#[doc = "An error in this channel has not occurred"] _0,
|
||||
#[doc = "An error in this channel has occurred"] _1,
|
||||
#[doc = "An error in this channel has not occurred"]
|
||||
_0,
|
||||
#[doc = "An error in this channel has occurred"]
|
||||
_1,
|
||||
}
|
||||
impl ERR3R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -225,8 +233,10 @@ impl ERR3R {
|
||||
#[doc = "Possible values of the field `ERR4`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ERR4R {
|
||||
#[doc = "An error in this channel has not occurred"] _0,
|
||||
#[doc = "An error in this channel has occurred"] _1,
|
||||
#[doc = "An error in this channel has not occurred"]
|
||||
_0,
|
||||
#[doc = "An error in this channel has occurred"]
|
||||
_1,
|
||||
}
|
||||
impl ERR4R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -270,8 +280,10 @@ impl ERR4R {
|
||||
#[doc = "Possible values of the field `ERR5`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ERR5R {
|
||||
#[doc = "An error in this channel has not occurred"] _0,
|
||||
#[doc = "An error in this channel has occurred"] _1,
|
||||
#[doc = "An error in this channel has not occurred"]
|
||||
_0,
|
||||
#[doc = "An error in this channel has occurred"]
|
||||
_1,
|
||||
}
|
||||
impl ERR5R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -315,8 +327,10 @@ impl ERR5R {
|
||||
#[doc = "Possible values of the field `ERR6`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ERR6R {
|
||||
#[doc = "An error in this channel has not occurred"] _0,
|
||||
#[doc = "An error in this channel has occurred"] _1,
|
||||
#[doc = "An error in this channel has not occurred"]
|
||||
_0,
|
||||
#[doc = "An error in this channel has occurred"]
|
||||
_1,
|
||||
}
|
||||
impl ERR6R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -360,8 +374,10 @@ impl ERR6R {
|
||||
#[doc = "Possible values of the field `ERR7`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ERR7R {
|
||||
#[doc = "An error in this channel has not occurred"] _0,
|
||||
#[doc = "An error in this channel has occurred"] _1,
|
||||
#[doc = "An error in this channel has not occurred"]
|
||||
_0,
|
||||
#[doc = "An error in this channel has occurred"]
|
||||
_1,
|
||||
}
|
||||
impl ERR7R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -405,8 +421,10 @@ impl ERR7R {
|
||||
#[doc = "Possible values of the field `ERR8`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ERR8R {
|
||||
#[doc = "An error in this channel has not occurred"] _0,
|
||||
#[doc = "An error in this channel has occurred"] _1,
|
||||
#[doc = "An error in this channel has not occurred"]
|
||||
_0,
|
||||
#[doc = "An error in this channel has occurred"]
|
||||
_1,
|
||||
}
|
||||
impl ERR8R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -450,8 +468,10 @@ impl ERR8R {
|
||||
#[doc = "Possible values of the field `ERR9`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ERR9R {
|
||||
#[doc = "An error in this channel has not occurred"] _0,
|
||||
#[doc = "An error in this channel has occurred"] _1,
|
||||
#[doc = "An error in this channel has not occurred"]
|
||||
_0,
|
||||
#[doc = "An error in this channel has occurred"]
|
||||
_1,
|
||||
}
|
||||
impl ERR9R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -495,8 +515,10 @@ impl ERR9R {
|
||||
#[doc = "Possible values of the field `ERR10`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ERR10R {
|
||||
#[doc = "An error in this channel has not occurred"] _0,
|
||||
#[doc = "An error in this channel has occurred"] _1,
|
||||
#[doc = "An error in this channel has not occurred"]
|
||||
_0,
|
||||
#[doc = "An error in this channel has occurred"]
|
||||
_1,
|
||||
}
|
||||
impl ERR10R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -540,8 +562,10 @@ impl ERR10R {
|
||||
#[doc = "Possible values of the field `ERR11`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ERR11R {
|
||||
#[doc = "An error in this channel has not occurred"] _0,
|
||||
#[doc = "An error in this channel has occurred"] _1,
|
||||
#[doc = "An error in this channel has not occurred"]
|
||||
_0,
|
||||
#[doc = "An error in this channel has occurred"]
|
||||
_1,
|
||||
}
|
||||
impl ERR11R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -585,8 +609,10 @@ impl ERR11R {
|
||||
#[doc = "Possible values of the field `ERR12`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ERR12R {
|
||||
#[doc = "An error in this channel has not occurred"] _0,
|
||||
#[doc = "An error in this channel has occurred"] _1,
|
||||
#[doc = "An error in this channel has not occurred"]
|
||||
_0,
|
||||
#[doc = "An error in this channel has occurred"]
|
||||
_1,
|
||||
}
|
||||
impl ERR12R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -630,8 +656,10 @@ impl ERR12R {
|
||||
#[doc = "Possible values of the field `ERR13`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ERR13R {
|
||||
#[doc = "An error in this channel has not occurred"] _0,
|
||||
#[doc = "An error in this channel has occurred"] _1,
|
||||
#[doc = "An error in this channel has not occurred"]
|
||||
_0,
|
||||
#[doc = "An error in this channel has occurred"]
|
||||
_1,
|
||||
}
|
||||
impl ERR13R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -675,8 +703,10 @@ impl ERR13R {
|
||||
#[doc = "Possible values of the field `ERR14`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ERR14R {
|
||||
#[doc = "An error in this channel has not occurred"] _0,
|
||||
#[doc = "An error in this channel has occurred"] _1,
|
||||
#[doc = "An error in this channel has not occurred"]
|
||||
_0,
|
||||
#[doc = "An error in this channel has occurred"]
|
||||
_1,
|
||||
}
|
||||
impl ERR14R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -720,8 +750,10 @@ impl ERR14R {
|
||||
#[doc = "Possible values of the field `ERR15`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ERR15R {
|
||||
#[doc = "An error in this channel has not occurred"] _0,
|
||||
#[doc = "An error in this channel has occurred"] _1,
|
||||
#[doc = "An error in this channel has not occurred"]
|
||||
_0,
|
||||
#[doc = "An error in this channel has occurred"]
|
||||
_1,
|
||||
}
|
||||
impl ERR15R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -764,8 +796,10 @@ impl ERR15R {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `ERR0`"]
|
||||
pub enum ERR0W {
|
||||
#[doc = "An error in this channel has not occurred"] _0,
|
||||
#[doc = "An error in this channel has occurred"] _1,
|
||||
#[doc = "An error in this channel has not occurred"]
|
||||
_0,
|
||||
#[doc = "An error in this channel has occurred"]
|
||||
_1,
|
||||
}
|
||||
impl ERR0W {
|
||||
#[allow(missing_docs)]
|
||||
@ -820,8 +854,10 @@ impl<'a> _ERR0W<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `ERR1`"]
|
||||
pub enum ERR1W {
|
||||
#[doc = "An error in this channel has not occurred"] _0,
|
||||
#[doc = "An error in this channel has occurred"] _1,
|
||||
#[doc = "An error in this channel has not occurred"]
|
||||
_0,
|
||||
#[doc = "An error in this channel has occurred"]
|
||||
_1,
|
||||
}
|
||||
impl ERR1W {
|
||||
#[allow(missing_docs)]
|
||||
@ -876,8 +912,10 @@ impl<'a> _ERR1W<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `ERR2`"]
|
||||
pub enum ERR2W {
|
||||
#[doc = "An error in this channel has not occurred"] _0,
|
||||
#[doc = "An error in this channel has occurred"] _1,
|
||||
#[doc = "An error in this channel has not occurred"]
|
||||
_0,
|
||||
#[doc = "An error in this channel has occurred"]
|
||||
_1,
|
||||
}
|
||||
impl ERR2W {
|
||||
#[allow(missing_docs)]
|
||||
@ -932,8 +970,10 @@ impl<'a> _ERR2W<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `ERR3`"]
|
||||
pub enum ERR3W {
|
||||
#[doc = "An error in this channel has not occurred"] _0,
|
||||
#[doc = "An error in this channel has occurred"] _1,
|
||||
#[doc = "An error in this channel has not occurred"]
|
||||
_0,
|
||||
#[doc = "An error in this channel has occurred"]
|
||||
_1,
|
||||
}
|
||||
impl ERR3W {
|
||||
#[allow(missing_docs)]
|
||||
@ -988,8 +1028,10 @@ impl<'a> _ERR3W<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `ERR4`"]
|
||||
pub enum ERR4W {
|
||||
#[doc = "An error in this channel has not occurred"] _0,
|
||||
#[doc = "An error in this channel has occurred"] _1,
|
||||
#[doc = "An error in this channel has not occurred"]
|
||||
_0,
|
||||
#[doc = "An error in this channel has occurred"]
|
||||
_1,
|
||||
}
|
||||
impl ERR4W {
|
||||
#[allow(missing_docs)]
|
||||
@ -1044,8 +1086,10 @@ impl<'a> _ERR4W<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `ERR5`"]
|
||||
pub enum ERR5W {
|
||||
#[doc = "An error in this channel has not occurred"] _0,
|
||||
#[doc = "An error in this channel has occurred"] _1,
|
||||
#[doc = "An error in this channel has not occurred"]
|
||||
_0,
|
||||
#[doc = "An error in this channel has occurred"]
|
||||
_1,
|
||||
}
|
||||
impl ERR5W {
|
||||
#[allow(missing_docs)]
|
||||
@ -1100,8 +1144,10 @@ impl<'a> _ERR5W<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `ERR6`"]
|
||||
pub enum ERR6W {
|
||||
#[doc = "An error in this channel has not occurred"] _0,
|
||||
#[doc = "An error in this channel has occurred"] _1,
|
||||
#[doc = "An error in this channel has not occurred"]
|
||||
_0,
|
||||
#[doc = "An error in this channel has occurred"]
|
||||
_1,
|
||||
}
|
||||
impl ERR6W {
|
||||
#[allow(missing_docs)]
|
||||
@ -1156,8 +1202,10 @@ impl<'a> _ERR6W<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `ERR7`"]
|
||||
pub enum ERR7W {
|
||||
#[doc = "An error in this channel has not occurred"] _0,
|
||||
#[doc = "An error in this channel has occurred"] _1,
|
||||
#[doc = "An error in this channel has not occurred"]
|
||||
_0,
|
||||
#[doc = "An error in this channel has occurred"]
|
||||
_1,
|
||||
}
|
||||
impl ERR7W {
|
||||
#[allow(missing_docs)]
|
||||
@ -1212,8 +1260,10 @@ impl<'a> _ERR7W<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `ERR8`"]
|
||||
pub enum ERR8W {
|
||||
#[doc = "An error in this channel has not occurred"] _0,
|
||||
#[doc = "An error in this channel has occurred"] _1,
|
||||
#[doc = "An error in this channel has not occurred"]
|
||||
_0,
|
||||
#[doc = "An error in this channel has occurred"]
|
||||
_1,
|
||||
}
|
||||
impl ERR8W {
|
||||
#[allow(missing_docs)]
|
||||
@ -1268,8 +1318,10 @@ impl<'a> _ERR8W<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `ERR9`"]
|
||||
pub enum ERR9W {
|
||||
#[doc = "An error in this channel has not occurred"] _0,
|
||||
#[doc = "An error in this channel has occurred"] _1,
|
||||
#[doc = "An error in this channel has not occurred"]
|
||||
_0,
|
||||
#[doc = "An error in this channel has occurred"]
|
||||
_1,
|
||||
}
|
||||
impl ERR9W {
|
||||
#[allow(missing_docs)]
|
||||
@ -1324,8 +1376,10 @@ impl<'a> _ERR9W<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `ERR10`"]
|
||||
pub enum ERR10W {
|
||||
#[doc = "An error in this channel has not occurred"] _0,
|
||||
#[doc = "An error in this channel has occurred"] _1,
|
||||
#[doc = "An error in this channel has not occurred"]
|
||||
_0,
|
||||
#[doc = "An error in this channel has occurred"]
|
||||
_1,
|
||||
}
|
||||
impl ERR10W {
|
||||
#[allow(missing_docs)]
|
||||
@ -1380,8 +1434,10 @@ impl<'a> _ERR10W<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `ERR11`"]
|
||||
pub enum ERR11W {
|
||||
#[doc = "An error in this channel has not occurred"] _0,
|
||||
#[doc = "An error in this channel has occurred"] _1,
|
||||
#[doc = "An error in this channel has not occurred"]
|
||||
_0,
|
||||
#[doc = "An error in this channel has occurred"]
|
||||
_1,
|
||||
}
|
||||
impl ERR11W {
|
||||
#[allow(missing_docs)]
|
||||
@ -1436,8 +1492,10 @@ impl<'a> _ERR11W<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `ERR12`"]
|
||||
pub enum ERR12W {
|
||||
#[doc = "An error in this channel has not occurred"] _0,
|
||||
#[doc = "An error in this channel has occurred"] _1,
|
||||
#[doc = "An error in this channel has not occurred"]
|
||||
_0,
|
||||
#[doc = "An error in this channel has occurred"]
|
||||
_1,
|
||||
}
|
||||
impl ERR12W {
|
||||
#[allow(missing_docs)]
|
||||
@ -1492,8 +1550,10 @@ impl<'a> _ERR12W<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `ERR13`"]
|
||||
pub enum ERR13W {
|
||||
#[doc = "An error in this channel has not occurred"] _0,
|
||||
#[doc = "An error in this channel has occurred"] _1,
|
||||
#[doc = "An error in this channel has not occurred"]
|
||||
_0,
|
||||
#[doc = "An error in this channel has occurred"]
|
||||
_1,
|
||||
}
|
||||
impl ERR13W {
|
||||
#[allow(missing_docs)]
|
||||
@ -1548,8 +1608,10 @@ impl<'a> _ERR13W<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `ERR14`"]
|
||||
pub enum ERR14W {
|
||||
#[doc = "An error in this channel has not occurred"] _0,
|
||||
#[doc = "An error in this channel has occurred"] _1,
|
||||
#[doc = "An error in this channel has not occurred"]
|
||||
_0,
|
||||
#[doc = "An error in this channel has occurred"]
|
||||
_1,
|
||||
}
|
||||
impl ERR14W {
|
||||
#[allow(missing_docs)]
|
||||
@ -1604,8 +1666,10 @@ impl<'a> _ERR14W<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `ERR15`"]
|
||||
pub enum ERR15W {
|
||||
#[doc = "An error in this channel has not occurred"] _0,
|
||||
#[doc = "An error in this channel has occurred"] _1,
|
||||
#[doc = "An error in this channel has not occurred"]
|
||||
_0,
|
||||
#[doc = "An error in this channel has occurred"]
|
||||
_1,
|
||||
}
|
||||
impl ERR15W {
|
||||
#[allow(missing_docs)]
|
||||
|
@ -14,8 +14,10 @@ impl super::ES {
|
||||
#[doc = "Possible values of the field `DBE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum DBER {
|
||||
#[doc = "No destination bus error"] _0,
|
||||
#[doc = "The last recorded error was a bus error on a destination write"] _1,
|
||||
#[doc = "No destination bus error"]
|
||||
_0,
|
||||
#[doc = "The last recorded error was a bus error on a destination write"]
|
||||
_1,
|
||||
}
|
||||
impl DBER {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -59,8 +61,10 @@ impl DBER {
|
||||
#[doc = "Possible values of the field `SBE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SBER {
|
||||
#[doc = "No source bus error"] _0,
|
||||
#[doc = "The last recorded error was a bus error on a source read"] _1,
|
||||
#[doc = "No source bus error"]
|
||||
_0,
|
||||
#[doc = "The last recorded error was a bus error on a source read"]
|
||||
_1,
|
||||
}
|
||||
impl SBER {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -104,7 +108,8 @@ impl SBER {
|
||||
#[doc = "Possible values of the field `SGE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SGER {
|
||||
#[doc = "No scatter/gather configuration error"] _0,
|
||||
#[doc = "No scatter/gather configuration error"]
|
||||
_0,
|
||||
#[doc = "The last recorded error was a configuration error detected in the TCDn_DLASTSGA field. This field is checked at the beginning of a scatter/gather operation after major loop completion if TCDn_CSR[ESG] is enabled. TCDn_DLASTSGA is not on a 32 byte boundary."]
|
||||
_1,
|
||||
}
|
||||
@ -150,8 +155,10 @@ impl SGER {
|
||||
#[doc = "Possible values of the field `NCE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum NCER {
|
||||
#[doc = "No NBYTES/CITER configuration error"] _0,
|
||||
#[doc = r" Reserved"] _Reserved(bool),
|
||||
#[doc = "No NBYTES/CITER configuration error"]
|
||||
_0,
|
||||
#[doc = r" Reserved"]
|
||||
_Reserved(bool),
|
||||
}
|
||||
impl NCER {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -190,7 +197,8 @@ impl NCER {
|
||||
#[doc = "Possible values of the field `DOE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum DOER {
|
||||
#[doc = "No destination offset configuration error"] _0,
|
||||
#[doc = "No destination offset configuration error"]
|
||||
_0,
|
||||
#[doc = "The last recorded error was a configuration error detected in the TCDn_DOFF field. TCDn_DOFF is inconsistent with TCDn_ATTR[DSIZE]."]
|
||||
_1,
|
||||
}
|
||||
@ -236,7 +244,8 @@ impl DOER {
|
||||
#[doc = "Possible values of the field `DAE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum DAER {
|
||||
#[doc = "No destination address configuration error"] _0,
|
||||
#[doc = "No destination address configuration error"]
|
||||
_0,
|
||||
#[doc = "The last recorded error was a configuration error detected in the TCDn_DADDR field. TCDn_DADDR is inconsistent with TCDn_ATTR[DSIZE]."]
|
||||
_1,
|
||||
}
|
||||
@ -282,7 +291,8 @@ impl DAER {
|
||||
#[doc = "Possible values of the field `SOE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SOER {
|
||||
#[doc = "No source offset configuration error"] _0,
|
||||
#[doc = "No source offset configuration error"]
|
||||
_0,
|
||||
#[doc = "The last recorded error was a configuration error detected in the TCDn_SOFF field. TCDn_SOFF is inconsistent with TCDn_ATTR[SSIZE]."]
|
||||
_1,
|
||||
}
|
||||
@ -328,7 +338,8 @@ impl SOER {
|
||||
#[doc = "Possible values of the field `SAE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SAER {
|
||||
#[doc = "No source address configuration error."] _0,
|
||||
#[doc = "No source address configuration error."]
|
||||
_0,
|
||||
#[doc = "The last recorded error was a configuration error detected in the TCDn_SADDR field. TCDn_SADDR is inconsistent with TCDn_ATTR[SSIZE]."]
|
||||
_1,
|
||||
}
|
||||
@ -385,8 +396,10 @@ impl ERRCHNR {
|
||||
#[doc = "Possible values of the field `CPE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum CPER {
|
||||
#[doc = "No channel priority error"] _0,
|
||||
#[doc = r" Reserved"] _Reserved(bool),
|
||||
#[doc = "No channel priority error"]
|
||||
_0,
|
||||
#[doc = r" Reserved"]
|
||||
_Reserved(bool),
|
||||
}
|
||||
impl CPER {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -425,8 +438,10 @@ impl CPER {
|
||||
#[doc = "Possible values of the field `ECX`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ECXR {
|
||||
#[doc = "No canceled transfers"] _0,
|
||||
#[doc = "The last recorded entry was a canceled transfer by the error cancel transfer input"] _1,
|
||||
#[doc = "No canceled transfers"]
|
||||
_0,
|
||||
#[doc = "The last recorded entry was a canceled transfer by the error cancel transfer input"]
|
||||
_1,
|
||||
}
|
||||
impl ECXR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -470,7 +485,8 @@ impl ECXR {
|
||||
#[doc = "Possible values of the field `VLD`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum VLDR {
|
||||
#[doc = "No ERR bits are set."] _0,
|
||||
#[doc = "No ERR bits are set."]
|
||||
_0,
|
||||
#[doc = "At least one ERR bit is set indicating a valid error exists that has not been cleared."]
|
||||
_1,
|
||||
}
|
||||
|
@ -14,8 +14,10 @@ impl super::HRS {
|
||||
#[doc = "Possible values of the field `HRS0`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum HRS0R {
|
||||
#[doc = "A hardware service request for channel 0 is not present"] _0,
|
||||
#[doc = "A hardware service request for channel 0 is present"] _1,
|
||||
#[doc = "A hardware service request for channel 0 is not present"]
|
||||
_0,
|
||||
#[doc = "A hardware service request for channel 0 is present"]
|
||||
_1,
|
||||
}
|
||||
impl HRS0R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -59,8 +61,10 @@ impl HRS0R {
|
||||
#[doc = "Possible values of the field `HRS1`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum HRS1R {
|
||||
#[doc = "A hardware service request for channel 1 is not present"] _0,
|
||||
#[doc = "A hardware service request for channel 1 is present"] _1,
|
||||
#[doc = "A hardware service request for channel 1 is not present"]
|
||||
_0,
|
||||
#[doc = "A hardware service request for channel 1 is present"]
|
||||
_1,
|
||||
}
|
||||
impl HRS1R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -104,8 +108,10 @@ impl HRS1R {
|
||||
#[doc = "Possible values of the field `HRS2`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum HRS2R {
|
||||
#[doc = "A hardware service request for channel 2 is not present"] _0,
|
||||
#[doc = "A hardware service request for channel 2 is present"] _1,
|
||||
#[doc = "A hardware service request for channel 2 is not present"]
|
||||
_0,
|
||||
#[doc = "A hardware service request for channel 2 is present"]
|
||||
_1,
|
||||
}
|
||||
impl HRS2R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -149,8 +155,10 @@ impl HRS2R {
|
||||
#[doc = "Possible values of the field `HRS3`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum HRS3R {
|
||||
#[doc = "A hardware service request for channel 3 is not present"] _0,
|
||||
#[doc = "A hardware service request for channel 3 is present"] _1,
|
||||
#[doc = "A hardware service request for channel 3 is not present"]
|
||||
_0,
|
||||
#[doc = "A hardware service request for channel 3 is present"]
|
||||
_1,
|
||||
}
|
||||
impl HRS3R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -194,8 +202,10 @@ impl HRS3R {
|
||||
#[doc = "Possible values of the field `HRS4`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum HRS4R {
|
||||
#[doc = "A hardware service request for channel 4 is not present"] _0,
|
||||
#[doc = "A hardware service request for channel 4 is present"] _1,
|
||||
#[doc = "A hardware service request for channel 4 is not present"]
|
||||
_0,
|
||||
#[doc = "A hardware service request for channel 4 is present"]
|
||||
_1,
|
||||
}
|
||||
impl HRS4R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -239,8 +249,10 @@ impl HRS4R {
|
||||
#[doc = "Possible values of the field `HRS5`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum HRS5R {
|
||||
#[doc = "A hardware service request for channel 5 is not present"] _0,
|
||||
#[doc = "A hardware service request for channel 5 is present"] _1,
|
||||
#[doc = "A hardware service request for channel 5 is not present"]
|
||||
_0,
|
||||
#[doc = "A hardware service request for channel 5 is present"]
|
||||
_1,
|
||||
}
|
||||
impl HRS5R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -284,8 +296,10 @@ impl HRS5R {
|
||||
#[doc = "Possible values of the field `HRS6`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum HRS6R {
|
||||
#[doc = "A hardware service request for channel 6 is not present"] _0,
|
||||
#[doc = "A hardware service request for channel 6 is present"] _1,
|
||||
#[doc = "A hardware service request for channel 6 is not present"]
|
||||
_0,
|
||||
#[doc = "A hardware service request for channel 6 is present"]
|
||||
_1,
|
||||
}
|
||||
impl HRS6R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -329,8 +343,10 @@ impl HRS6R {
|
||||
#[doc = "Possible values of the field `HRS7`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum HRS7R {
|
||||
#[doc = "A hardware service request for channel 7 is not present"] _0,
|
||||
#[doc = "A hardware service request for channel 7 is present"] _1,
|
||||
#[doc = "A hardware service request for channel 7 is not present"]
|
||||
_0,
|
||||
#[doc = "A hardware service request for channel 7 is present"]
|
||||
_1,
|
||||
}
|
||||
impl HRS7R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -374,8 +390,10 @@ impl HRS7R {
|
||||
#[doc = "Possible values of the field `HRS8`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum HRS8R {
|
||||
#[doc = "A hardware service request for channel 8 is not present"] _0,
|
||||
#[doc = "A hardware service request for channel 8 is present"] _1,
|
||||
#[doc = "A hardware service request for channel 8 is not present"]
|
||||
_0,
|
||||
#[doc = "A hardware service request for channel 8 is present"]
|
||||
_1,
|
||||
}
|
||||
impl HRS8R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -419,8 +437,10 @@ impl HRS8R {
|
||||
#[doc = "Possible values of the field `HRS9`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum HRS9R {
|
||||
#[doc = "A hardware service request for channel 9 is not present"] _0,
|
||||
#[doc = "A hardware service request for channel 9 is present"] _1,
|
||||
#[doc = "A hardware service request for channel 9 is not present"]
|
||||
_0,
|
||||
#[doc = "A hardware service request for channel 9 is present"]
|
||||
_1,
|
||||
}
|
||||
impl HRS9R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -464,8 +484,10 @@ impl HRS9R {
|
||||
#[doc = "Possible values of the field `HRS10`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum HRS10R {
|
||||
#[doc = "A hardware service request for channel 10 is not present"] _0,
|
||||
#[doc = "A hardware service request for channel 10 is present"] _1,
|
||||
#[doc = "A hardware service request for channel 10 is not present"]
|
||||
_0,
|
||||
#[doc = "A hardware service request for channel 10 is present"]
|
||||
_1,
|
||||
}
|
||||
impl HRS10R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -509,8 +531,10 @@ impl HRS10R {
|
||||
#[doc = "Possible values of the field `HRS11`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum HRS11R {
|
||||
#[doc = "A hardware service request for channel 11 is not present"] _0,
|
||||
#[doc = "A hardware service request for channel 11 is present"] _1,
|
||||
#[doc = "A hardware service request for channel 11 is not present"]
|
||||
_0,
|
||||
#[doc = "A hardware service request for channel 11 is present"]
|
||||
_1,
|
||||
}
|
||||
impl HRS11R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -554,8 +578,10 @@ impl HRS11R {
|
||||
#[doc = "Possible values of the field `HRS12`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum HRS12R {
|
||||
#[doc = "A hardware service request for channel 12 is not present"] _0,
|
||||
#[doc = "A hardware service request for channel 12 is present"] _1,
|
||||
#[doc = "A hardware service request for channel 12 is not present"]
|
||||
_0,
|
||||
#[doc = "A hardware service request for channel 12 is present"]
|
||||
_1,
|
||||
}
|
||||
impl HRS12R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -599,8 +625,10 @@ impl HRS12R {
|
||||
#[doc = "Possible values of the field `HRS13`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum HRS13R {
|
||||
#[doc = "A hardware service request for channel 13 is not present"] _0,
|
||||
#[doc = "A hardware service request for channel 13 is present"] _1,
|
||||
#[doc = "A hardware service request for channel 13 is not present"]
|
||||
_0,
|
||||
#[doc = "A hardware service request for channel 13 is present"]
|
||||
_1,
|
||||
}
|
||||
impl HRS13R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -644,8 +672,10 @@ impl HRS13R {
|
||||
#[doc = "Possible values of the field `HRS14`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum HRS14R {
|
||||
#[doc = "A hardware service request for channel 14 is not present"] _0,
|
||||
#[doc = "A hardware service request for channel 14 is present"] _1,
|
||||
#[doc = "A hardware service request for channel 14 is not present"]
|
||||
_0,
|
||||
#[doc = "A hardware service request for channel 14 is present"]
|
||||
_1,
|
||||
}
|
||||
impl HRS14R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -689,8 +719,10 @@ impl HRS14R {
|
||||
#[doc = "Possible values of the field `HRS15`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum HRS15R {
|
||||
#[doc = "A hardware service request for channel 15 is not present"] _0,
|
||||
#[doc = "A hardware service request for channel 15 is present"] _1,
|
||||
#[doc = "A hardware service request for channel 15 is not present"]
|
||||
_0,
|
||||
#[doc = "A hardware service request for channel 15 is present"]
|
||||
_1,
|
||||
}
|
||||
impl HRS15R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
@ -45,8 +45,10 @@ impl super::INT {
|
||||
#[doc = "Possible values of the field `INT0`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum INT0R {
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"] _0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"] _1,
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"]
|
||||
_0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"]
|
||||
_1,
|
||||
}
|
||||
impl INT0R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -90,8 +92,10 @@ impl INT0R {
|
||||
#[doc = "Possible values of the field `INT1`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum INT1R {
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"] _0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"] _1,
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"]
|
||||
_0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"]
|
||||
_1,
|
||||
}
|
||||
impl INT1R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -135,8 +139,10 @@ impl INT1R {
|
||||
#[doc = "Possible values of the field `INT2`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum INT2R {
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"] _0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"] _1,
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"]
|
||||
_0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"]
|
||||
_1,
|
||||
}
|
||||
impl INT2R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -180,8 +186,10 @@ impl INT2R {
|
||||
#[doc = "Possible values of the field `INT3`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum INT3R {
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"] _0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"] _1,
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"]
|
||||
_0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"]
|
||||
_1,
|
||||
}
|
||||
impl INT3R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -225,8 +233,10 @@ impl INT3R {
|
||||
#[doc = "Possible values of the field `INT4`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum INT4R {
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"] _0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"] _1,
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"]
|
||||
_0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"]
|
||||
_1,
|
||||
}
|
||||
impl INT4R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -270,8 +280,10 @@ impl INT4R {
|
||||
#[doc = "Possible values of the field `INT5`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum INT5R {
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"] _0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"] _1,
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"]
|
||||
_0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"]
|
||||
_1,
|
||||
}
|
||||
impl INT5R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -315,8 +327,10 @@ impl INT5R {
|
||||
#[doc = "Possible values of the field `INT6`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum INT6R {
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"] _0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"] _1,
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"]
|
||||
_0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"]
|
||||
_1,
|
||||
}
|
||||
impl INT6R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -360,8 +374,10 @@ impl INT6R {
|
||||
#[doc = "Possible values of the field `INT7`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum INT7R {
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"] _0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"] _1,
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"]
|
||||
_0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"]
|
||||
_1,
|
||||
}
|
||||
impl INT7R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -405,8 +421,10 @@ impl INT7R {
|
||||
#[doc = "Possible values of the field `INT8`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum INT8R {
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"] _0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"] _1,
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"]
|
||||
_0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"]
|
||||
_1,
|
||||
}
|
||||
impl INT8R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -450,8 +468,10 @@ impl INT8R {
|
||||
#[doc = "Possible values of the field `INT9`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum INT9R {
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"] _0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"] _1,
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"]
|
||||
_0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"]
|
||||
_1,
|
||||
}
|
||||
impl INT9R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -495,8 +515,10 @@ impl INT9R {
|
||||
#[doc = "Possible values of the field `INT10`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum INT10R {
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"] _0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"] _1,
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"]
|
||||
_0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"]
|
||||
_1,
|
||||
}
|
||||
impl INT10R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -540,8 +562,10 @@ impl INT10R {
|
||||
#[doc = "Possible values of the field `INT11`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum INT11R {
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"] _0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"] _1,
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"]
|
||||
_0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"]
|
||||
_1,
|
||||
}
|
||||
impl INT11R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -585,8 +609,10 @@ impl INT11R {
|
||||
#[doc = "Possible values of the field `INT12`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum INT12R {
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"] _0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"] _1,
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"]
|
||||
_0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"]
|
||||
_1,
|
||||
}
|
||||
impl INT12R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -630,8 +656,10 @@ impl INT12R {
|
||||
#[doc = "Possible values of the field `INT13`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum INT13R {
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"] _0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"] _1,
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"]
|
||||
_0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"]
|
||||
_1,
|
||||
}
|
||||
impl INT13R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -675,8 +703,10 @@ impl INT13R {
|
||||
#[doc = "Possible values of the field `INT14`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum INT14R {
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"] _0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"] _1,
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"]
|
||||
_0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"]
|
||||
_1,
|
||||
}
|
||||
impl INT14R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -720,8 +750,10 @@ impl INT14R {
|
||||
#[doc = "Possible values of the field `INT15`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum INT15R {
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"] _0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"] _1,
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"]
|
||||
_0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"]
|
||||
_1,
|
||||
}
|
||||
impl INT15R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -764,8 +796,10 @@ impl INT15R {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `INT0`"]
|
||||
pub enum INT0W {
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"] _0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"] _1,
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"]
|
||||
_0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"]
|
||||
_1,
|
||||
}
|
||||
impl INT0W {
|
||||
#[allow(missing_docs)]
|
||||
@ -820,8 +854,10 @@ impl<'a> _INT0W<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `INT1`"]
|
||||
pub enum INT1W {
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"] _0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"] _1,
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"]
|
||||
_0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"]
|
||||
_1,
|
||||
}
|
||||
impl INT1W {
|
||||
#[allow(missing_docs)]
|
||||
@ -876,8 +912,10 @@ impl<'a> _INT1W<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `INT2`"]
|
||||
pub enum INT2W {
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"] _0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"] _1,
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"]
|
||||
_0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"]
|
||||
_1,
|
||||
}
|
||||
impl INT2W {
|
||||
#[allow(missing_docs)]
|
||||
@ -932,8 +970,10 @@ impl<'a> _INT2W<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `INT3`"]
|
||||
pub enum INT3W {
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"] _0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"] _1,
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"]
|
||||
_0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"]
|
||||
_1,
|
||||
}
|
||||
impl INT3W {
|
||||
#[allow(missing_docs)]
|
||||
@ -988,8 +1028,10 @@ impl<'a> _INT3W<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `INT4`"]
|
||||
pub enum INT4W {
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"] _0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"] _1,
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"]
|
||||
_0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"]
|
||||
_1,
|
||||
}
|
||||
impl INT4W {
|
||||
#[allow(missing_docs)]
|
||||
@ -1044,8 +1086,10 @@ impl<'a> _INT4W<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `INT5`"]
|
||||
pub enum INT5W {
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"] _0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"] _1,
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"]
|
||||
_0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"]
|
||||
_1,
|
||||
}
|
||||
impl INT5W {
|
||||
#[allow(missing_docs)]
|
||||
@ -1100,8 +1144,10 @@ impl<'a> _INT5W<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `INT6`"]
|
||||
pub enum INT6W {
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"] _0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"] _1,
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"]
|
||||
_0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"]
|
||||
_1,
|
||||
}
|
||||
impl INT6W {
|
||||
#[allow(missing_docs)]
|
||||
@ -1156,8 +1202,10 @@ impl<'a> _INT6W<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `INT7`"]
|
||||
pub enum INT7W {
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"] _0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"] _1,
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"]
|
||||
_0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"]
|
||||
_1,
|
||||
}
|
||||
impl INT7W {
|
||||
#[allow(missing_docs)]
|
||||
@ -1212,8 +1260,10 @@ impl<'a> _INT7W<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `INT8`"]
|
||||
pub enum INT8W {
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"] _0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"] _1,
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"]
|
||||
_0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"]
|
||||
_1,
|
||||
}
|
||||
impl INT8W {
|
||||
#[allow(missing_docs)]
|
||||
@ -1268,8 +1318,10 @@ impl<'a> _INT8W<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `INT9`"]
|
||||
pub enum INT9W {
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"] _0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"] _1,
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"]
|
||||
_0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"]
|
||||
_1,
|
||||
}
|
||||
impl INT9W {
|
||||
#[allow(missing_docs)]
|
||||
@ -1324,8 +1376,10 @@ impl<'a> _INT9W<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `INT10`"]
|
||||
pub enum INT10W {
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"] _0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"] _1,
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"]
|
||||
_0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"]
|
||||
_1,
|
||||
}
|
||||
impl INT10W {
|
||||
#[allow(missing_docs)]
|
||||
@ -1380,8 +1434,10 @@ impl<'a> _INT10W<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `INT11`"]
|
||||
pub enum INT11W {
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"] _0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"] _1,
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"]
|
||||
_0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"]
|
||||
_1,
|
||||
}
|
||||
impl INT11W {
|
||||
#[allow(missing_docs)]
|
||||
@ -1436,8 +1492,10 @@ impl<'a> _INT11W<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `INT12`"]
|
||||
pub enum INT12W {
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"] _0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"] _1,
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"]
|
||||
_0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"]
|
||||
_1,
|
||||
}
|
||||
impl INT12W {
|
||||
#[allow(missing_docs)]
|
||||
@ -1492,8 +1550,10 @@ impl<'a> _INT12W<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `INT13`"]
|
||||
pub enum INT13W {
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"] _0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"] _1,
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"]
|
||||
_0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"]
|
||||
_1,
|
||||
}
|
||||
impl INT13W {
|
||||
#[allow(missing_docs)]
|
||||
@ -1548,8 +1608,10 @@ impl<'a> _INT13W<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `INT14`"]
|
||||
pub enum INT14W {
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"] _0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"] _1,
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"]
|
||||
_0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"]
|
||||
_1,
|
||||
}
|
||||
impl INT14W {
|
||||
#[allow(missing_docs)]
|
||||
@ -1604,8 +1666,10 @@ impl<'a> _INT14W<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `INT15`"]
|
||||
pub enum INT15W {
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"] _0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"] _1,
|
||||
#[doc = "The interrupt request for corresponding channel is cleared"]
|
||||
_0,
|
||||
#[doc = "The interrupt request for corresponding channel is active"]
|
||||
_1,
|
||||
}
|
||||
impl INT15W {
|
||||
#[allow(missing_docs)]
|
||||
|
480
src/dma/mod.rs
480
src/dma/mod.rs
@ -2,300 +2,428 @@ use vcell::VolatileCell;
|
||||
#[doc = r" Register block"]
|
||||
#[repr(C)]
|
||||
pub struct RegisterBlock {
|
||||
#[doc = "0x00 - Control Register"] pub cr: CR,
|
||||
#[doc = "0x04 - Error Status Register"] pub es: ES,
|
||||
#[doc = "0x00 - Control Register"]
|
||||
pub cr: CR,
|
||||
#[doc = "0x04 - Error Status Register"]
|
||||
pub es: ES,
|
||||
_reserved0: [u8; 4usize],
|
||||
#[doc = "0x0c - Enable Request Register"] pub erq: ERQ,
|
||||
#[doc = "0x0c - Enable Request Register"]
|
||||
pub erq: ERQ,
|
||||
_reserved1: [u8; 4usize],
|
||||
#[doc = "0x14 - Enable Error Interrupt Register"] pub eei: EEI,
|
||||
#[doc = "0x18 - Clear Enable Error Interrupt Register"] pub ceei: CEEI,
|
||||
#[doc = "0x19 - Set Enable Error Interrupt Register"] pub seei: SEEI,
|
||||
#[doc = "0x1a - Clear Enable Request Register"] pub cerq: CERQ,
|
||||
#[doc = "0x1b - Set Enable Request Register"] pub serq: SERQ,
|
||||
#[doc = "0x1c - Clear DONE Status Bit Register"] pub cdne: CDNE,
|
||||
#[doc = "0x1d - Set START Bit Register"] pub ssrt: SSRT,
|
||||
#[doc = "0x1e - Clear Error Register"] pub cerr: CERR,
|
||||
#[doc = "0x1f - Clear Interrupt Request Register"] pub cint: CINT,
|
||||
#[doc = "0x14 - Enable Error Interrupt Register"]
|
||||
pub eei: EEI,
|
||||
#[doc = "0x18 - Clear Enable Error Interrupt Register"]
|
||||
pub ceei: CEEI,
|
||||
#[doc = "0x19 - Set Enable Error Interrupt Register"]
|
||||
pub seei: SEEI,
|
||||
#[doc = "0x1a - Clear Enable Request Register"]
|
||||
pub cerq: CERQ,
|
||||
#[doc = "0x1b - Set Enable Request Register"]
|
||||
pub serq: SERQ,
|
||||
#[doc = "0x1c - Clear DONE Status Bit Register"]
|
||||
pub cdne: CDNE,
|
||||
#[doc = "0x1d - Set START Bit Register"]
|
||||
pub ssrt: SSRT,
|
||||
#[doc = "0x1e - Clear Error Register"]
|
||||
pub cerr: CERR,
|
||||
#[doc = "0x1f - Clear Interrupt Request Register"]
|
||||
pub cint: CINT,
|
||||
_reserved2: [u8; 4usize],
|
||||
#[doc = "0x24 - Interrupt Request Register"] pub int: INT,
|
||||
#[doc = "0x24 - Interrupt Request Register"]
|
||||
pub int: INT,
|
||||
_reserved3: [u8; 4usize],
|
||||
#[doc = "0x2c - Error Register"] pub err: ERR,
|
||||
#[doc = "0x2c - Error Register"]
|
||||
pub err: ERR,
|
||||
_reserved4: [u8; 4usize],
|
||||
#[doc = "0x34 - Hardware Request Status Register"] pub hrs: HRS,
|
||||
#[doc = "0x34 - Hardware Request Status Register"]
|
||||
pub hrs: HRS,
|
||||
_reserved5: [u8; 12usize],
|
||||
#[doc = "0x44 - Enable Asynchronous Request in Stop Register"] pub ears: EARS,
|
||||
#[doc = "0x44 - Enable Asynchronous Request in Stop Register"]
|
||||
pub ears: EARS,
|
||||
_reserved6: [u8; 184usize],
|
||||
#[doc = "0x100 - Channel n Priority Register"] pub dchpri3: DCHPRI3,
|
||||
#[doc = "0x101 - Channel n Priority Register"] pub dchpri2: DCHPRI2,
|
||||
#[doc = "0x102 - Channel n Priority Register"] pub dchpri1: DCHPRI1,
|
||||
#[doc = "0x103 - Channel n Priority Register"] pub dchpri0: DCHPRI0,
|
||||
#[doc = "0x104 - Channel n Priority Register"] pub dchpri7: DCHPRI7,
|
||||
#[doc = "0x105 - Channel n Priority Register"] pub dchpri6: DCHPRI6,
|
||||
#[doc = "0x106 - Channel n Priority Register"] pub dchpri5: DCHPRI5,
|
||||
#[doc = "0x107 - Channel n Priority Register"] pub dchpri4: DCHPRI4,
|
||||
#[doc = "0x108 - Channel n Priority Register"] pub dchpri11: DCHPRI11,
|
||||
#[doc = "0x109 - Channel n Priority Register"] pub dchpri10: DCHPRI10,
|
||||
#[doc = "0x10a - Channel n Priority Register"] pub dchpri9: DCHPRI9,
|
||||
#[doc = "0x10b - Channel n Priority Register"] pub dchpri8: DCHPRI8,
|
||||
#[doc = "0x10c - Channel n Priority Register"] pub dchpri15: DCHPRI15,
|
||||
#[doc = "0x10d - Channel n Priority Register"] pub dchpri14: DCHPRI14,
|
||||
#[doc = "0x10e - Channel n Priority Register"] pub dchpri13: DCHPRI13,
|
||||
#[doc = "0x10f - Channel n Priority Register"] pub dchpri12: DCHPRI12,
|
||||
#[doc = "0x100 - Channel n Priority Register"]
|
||||
pub dchpri3: DCHPRI3,
|
||||
#[doc = "0x101 - Channel n Priority Register"]
|
||||
pub dchpri2: DCHPRI2,
|
||||
#[doc = "0x102 - Channel n Priority Register"]
|
||||
pub dchpri1: DCHPRI1,
|
||||
#[doc = "0x103 - Channel n Priority Register"]
|
||||
pub dchpri0: DCHPRI0,
|
||||
#[doc = "0x104 - Channel n Priority Register"]
|
||||
pub dchpri7: DCHPRI7,
|
||||
#[doc = "0x105 - Channel n Priority Register"]
|
||||
pub dchpri6: DCHPRI6,
|
||||
#[doc = "0x106 - Channel n Priority Register"]
|
||||
pub dchpri5: DCHPRI5,
|
||||
#[doc = "0x107 - Channel n Priority Register"]
|
||||
pub dchpri4: DCHPRI4,
|
||||
#[doc = "0x108 - Channel n Priority Register"]
|
||||
pub dchpri11: DCHPRI11,
|
||||
#[doc = "0x109 - Channel n Priority Register"]
|
||||
pub dchpri10: DCHPRI10,
|
||||
#[doc = "0x10a - Channel n Priority Register"]
|
||||
pub dchpri9: DCHPRI9,
|
||||
#[doc = "0x10b - Channel n Priority Register"]
|
||||
pub dchpri8: DCHPRI8,
|
||||
#[doc = "0x10c - Channel n Priority Register"]
|
||||
pub dchpri15: DCHPRI15,
|
||||
#[doc = "0x10d - Channel n Priority Register"]
|
||||
pub dchpri14: DCHPRI14,
|
||||
#[doc = "0x10e - Channel n Priority Register"]
|
||||
pub dchpri13: DCHPRI13,
|
||||
#[doc = "0x10f - Channel n Priority Register"]
|
||||
pub dchpri12: DCHPRI12,
|
||||
_reserved7: [u8; 3824usize],
|
||||
#[doc = "0x1000 - TCD Source Address"] pub tcd0_saddr: TCD0_SADDR,
|
||||
#[doc = "0x1004 - TCD Signed Source Address Offset"] pub tcd0_soff: TCD0_SOFF,
|
||||
#[doc = "0x1006 - TCD Transfer Attributes"] pub tcd0_attr: TCD0_ATTR,
|
||||
#[doc = "0x1000 - TCD Source Address"]
|
||||
pub tcd0_saddr: TCD0_SADDR,
|
||||
#[doc = "0x1004 - TCD Signed Source Address Offset"]
|
||||
pub tcd0_soff: TCD0_SOFF,
|
||||
#[doc = "0x1006 - TCD Transfer Attributes"]
|
||||
pub tcd0_attr: TCD0_ATTR,
|
||||
#[doc = "0x1008 - TCD Minor Byte Count (Minor Loop Mapping Disabled)"]
|
||||
pub tcd0_nbytes_mlno:
|
||||
TCD0_NBYTES_MLNO,
|
||||
#[doc = "0x100c - TCD Last Source Address Adjustment"] pub tcd0_slast: TCD0_SLAST,
|
||||
#[doc = "0x1010 - TCD Destination Address"] pub tcd0_daddr: TCD0_DADDR,
|
||||
#[doc = "0x1014 - TCD Signed Destination Address Offset"] pub tcd0_doff: TCD0_DOFF,
|
||||
pub tcd0_nbytes_mlno: TCD0_NBYTES_MLNO,
|
||||
#[doc = "0x100c - TCD Last Source Address Adjustment"]
|
||||
pub tcd0_slast: TCD0_SLAST,
|
||||
#[doc = "0x1010 - TCD Destination Address"]
|
||||
pub tcd0_daddr: TCD0_DADDR,
|
||||
#[doc = "0x1014 - TCD Signed Destination Address Offset"]
|
||||
pub tcd0_doff: TCD0_DOFF,
|
||||
#[doc = "0x1016 - TCD Current Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
|
||||
pub tcd0_citer_elinkno: TCD0_CITER_ELINKNO,
|
||||
#[doc = "0x1018 - TCD Last Destination Address Adjustment/Scatter Gather Address"]
|
||||
pub tcd0_dlastsga: TCD0_DLASTSGA,
|
||||
#[doc = "0x101c - TCD Control and Status"] pub tcd0_csr: TCD0_CSR,
|
||||
#[doc = "0x101c - TCD Control and Status"]
|
||||
pub tcd0_csr: TCD0_CSR,
|
||||
#[doc = "0x101e - TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
|
||||
pub tcd0_biter_elinkno: TCD0_BITER_ELINKNO,
|
||||
#[doc = "0x1020 - TCD Source Address"] pub tcd1_saddr: TCD1_SADDR,
|
||||
#[doc = "0x1024 - TCD Signed Source Address Offset"] pub tcd1_soff: TCD1_SOFF,
|
||||
#[doc = "0x1026 - TCD Transfer Attributes"] pub tcd1_attr: TCD1_ATTR,
|
||||
#[doc = "0x1020 - TCD Source Address"]
|
||||
pub tcd1_saddr: TCD1_SADDR,
|
||||
#[doc = "0x1024 - TCD Signed Source Address Offset"]
|
||||
pub tcd1_soff: TCD1_SOFF,
|
||||
#[doc = "0x1026 - TCD Transfer Attributes"]
|
||||
pub tcd1_attr: TCD1_ATTR,
|
||||
#[doc = "0x1028 - TCD Minor Byte Count (Minor Loop Mapping Disabled)"]
|
||||
pub tcd1_nbytes_mlno:
|
||||
TCD1_NBYTES_MLNO,
|
||||
#[doc = "0x102c - TCD Last Source Address Adjustment"] pub tcd1_slast: TCD1_SLAST,
|
||||
#[doc = "0x1030 - TCD Destination Address"] pub tcd1_daddr: TCD1_DADDR,
|
||||
#[doc = "0x1034 - TCD Signed Destination Address Offset"] pub tcd1_doff: TCD1_DOFF,
|
||||
pub tcd1_nbytes_mlno: TCD1_NBYTES_MLNO,
|
||||
#[doc = "0x102c - TCD Last Source Address Adjustment"]
|
||||
pub tcd1_slast: TCD1_SLAST,
|
||||
#[doc = "0x1030 - TCD Destination Address"]
|
||||
pub tcd1_daddr: TCD1_DADDR,
|
||||
#[doc = "0x1034 - TCD Signed Destination Address Offset"]
|
||||
pub tcd1_doff: TCD1_DOFF,
|
||||
#[doc = "0x1036 - TCD Current Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
|
||||
pub tcd1_citer_elinkno: TCD1_CITER_ELINKNO,
|
||||
#[doc = "0x1038 - TCD Last Destination Address Adjustment/Scatter Gather Address"]
|
||||
pub tcd1_dlastsga: TCD1_DLASTSGA,
|
||||
#[doc = "0x103c - TCD Control and Status"] pub tcd1_csr: TCD1_CSR,
|
||||
#[doc = "0x103c - TCD Control and Status"]
|
||||
pub tcd1_csr: TCD1_CSR,
|
||||
#[doc = "0x103e - TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
|
||||
pub tcd1_biter_elinkno: TCD1_BITER_ELINKNO,
|
||||
#[doc = "0x1040 - TCD Source Address"] pub tcd2_saddr: TCD2_SADDR,
|
||||
#[doc = "0x1044 - TCD Signed Source Address Offset"] pub tcd2_soff: TCD2_SOFF,
|
||||
#[doc = "0x1046 - TCD Transfer Attributes"] pub tcd2_attr: TCD2_ATTR,
|
||||
#[doc = "0x1040 - TCD Source Address"]
|
||||
pub tcd2_saddr: TCD2_SADDR,
|
||||
#[doc = "0x1044 - TCD Signed Source Address Offset"]
|
||||
pub tcd2_soff: TCD2_SOFF,
|
||||
#[doc = "0x1046 - TCD Transfer Attributes"]
|
||||
pub tcd2_attr: TCD2_ATTR,
|
||||
#[doc = "0x1048 - TCD Minor Byte Count (Minor Loop Mapping Disabled)"]
|
||||
pub tcd2_nbytes_mlno:
|
||||
TCD2_NBYTES_MLNO,
|
||||
#[doc = "0x104c - TCD Last Source Address Adjustment"] pub tcd2_slast: TCD2_SLAST,
|
||||
#[doc = "0x1050 - TCD Destination Address"] pub tcd2_daddr: TCD2_DADDR,
|
||||
#[doc = "0x1054 - TCD Signed Destination Address Offset"] pub tcd2_doff: TCD2_DOFF,
|
||||
pub tcd2_nbytes_mlno: TCD2_NBYTES_MLNO,
|
||||
#[doc = "0x104c - TCD Last Source Address Adjustment"]
|
||||
pub tcd2_slast: TCD2_SLAST,
|
||||
#[doc = "0x1050 - TCD Destination Address"]
|
||||
pub tcd2_daddr: TCD2_DADDR,
|
||||
#[doc = "0x1054 - TCD Signed Destination Address Offset"]
|
||||
pub tcd2_doff: TCD2_DOFF,
|
||||
#[doc = "0x1056 - TCD Current Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
|
||||
pub tcd2_citer_elinkno: TCD2_CITER_ELINKNO,
|
||||
#[doc = "0x1058 - TCD Last Destination Address Adjustment/Scatter Gather Address"]
|
||||
pub tcd2_dlastsga: TCD2_DLASTSGA,
|
||||
#[doc = "0x105c - TCD Control and Status"] pub tcd2_csr: TCD2_CSR,
|
||||
#[doc = "0x105c - TCD Control and Status"]
|
||||
pub tcd2_csr: TCD2_CSR,
|
||||
#[doc = "0x105e - TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
|
||||
pub tcd2_biter_elinkno: TCD2_BITER_ELINKNO,
|
||||
#[doc = "0x1060 - TCD Source Address"] pub tcd3_saddr: TCD3_SADDR,
|
||||
#[doc = "0x1064 - TCD Signed Source Address Offset"] pub tcd3_soff: TCD3_SOFF,
|
||||
#[doc = "0x1066 - TCD Transfer Attributes"] pub tcd3_attr: TCD3_ATTR,
|
||||
#[doc = "0x1060 - TCD Source Address"]
|
||||
pub tcd3_saddr: TCD3_SADDR,
|
||||
#[doc = "0x1064 - TCD Signed Source Address Offset"]
|
||||
pub tcd3_soff: TCD3_SOFF,
|
||||
#[doc = "0x1066 - TCD Transfer Attributes"]
|
||||
pub tcd3_attr: TCD3_ATTR,
|
||||
#[doc = "0x1068 - TCD Minor Byte Count (Minor Loop Mapping Disabled)"]
|
||||
pub tcd3_nbytes_mlno:
|
||||
TCD3_NBYTES_MLNO,
|
||||
#[doc = "0x106c - TCD Last Source Address Adjustment"] pub tcd3_slast: TCD3_SLAST,
|
||||
#[doc = "0x1070 - TCD Destination Address"] pub tcd3_daddr: TCD3_DADDR,
|
||||
#[doc = "0x1074 - TCD Signed Destination Address Offset"] pub tcd3_doff: TCD3_DOFF,
|
||||
pub tcd3_nbytes_mlno: TCD3_NBYTES_MLNO,
|
||||
#[doc = "0x106c - TCD Last Source Address Adjustment"]
|
||||
pub tcd3_slast: TCD3_SLAST,
|
||||
#[doc = "0x1070 - TCD Destination Address"]
|
||||
pub tcd3_daddr: TCD3_DADDR,
|
||||
#[doc = "0x1074 - TCD Signed Destination Address Offset"]
|
||||
pub tcd3_doff: TCD3_DOFF,
|
||||
#[doc = "0x1076 - TCD Current Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
|
||||
pub tcd3_citer_elinkno: TCD3_CITER_ELINKNO,
|
||||
#[doc = "0x1078 - TCD Last Destination Address Adjustment/Scatter Gather Address"]
|
||||
pub tcd3_dlastsga: TCD3_DLASTSGA,
|
||||
#[doc = "0x107c - TCD Control and Status"] pub tcd3_csr: TCD3_CSR,
|
||||
#[doc = "0x107c - TCD Control and Status"]
|
||||
pub tcd3_csr: TCD3_CSR,
|
||||
#[doc = "0x107e - TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
|
||||
pub tcd3_biter_elinkno: TCD3_BITER_ELINKNO,
|
||||
#[doc = "0x1080 - TCD Source Address"] pub tcd4_saddr: TCD4_SADDR,
|
||||
#[doc = "0x1084 - TCD Signed Source Address Offset"] pub tcd4_soff: TCD4_SOFF,
|
||||
#[doc = "0x1086 - TCD Transfer Attributes"] pub tcd4_attr: TCD4_ATTR,
|
||||
#[doc = "0x1080 - TCD Source Address"]
|
||||
pub tcd4_saddr: TCD4_SADDR,
|
||||
#[doc = "0x1084 - TCD Signed Source Address Offset"]
|
||||
pub tcd4_soff: TCD4_SOFF,
|
||||
#[doc = "0x1086 - TCD Transfer Attributes"]
|
||||
pub tcd4_attr: TCD4_ATTR,
|
||||
#[doc = "0x1088 - TCD Minor Byte Count (Minor Loop Mapping Disabled)"]
|
||||
pub tcd4_nbytes_mlno:
|
||||
TCD4_NBYTES_MLNO,
|
||||
#[doc = "0x108c - TCD Last Source Address Adjustment"] pub tcd4_slast: TCD4_SLAST,
|
||||
#[doc = "0x1090 - TCD Destination Address"] pub tcd4_daddr: TCD4_DADDR,
|
||||
#[doc = "0x1094 - TCD Signed Destination Address Offset"] pub tcd4_doff: TCD4_DOFF,
|
||||
pub tcd4_nbytes_mlno: TCD4_NBYTES_MLNO,
|
||||
#[doc = "0x108c - TCD Last Source Address Adjustment"]
|
||||
pub tcd4_slast: TCD4_SLAST,
|
||||
#[doc = "0x1090 - TCD Destination Address"]
|
||||
pub tcd4_daddr: TCD4_DADDR,
|
||||
#[doc = "0x1094 - TCD Signed Destination Address Offset"]
|
||||
pub tcd4_doff: TCD4_DOFF,
|
||||
#[doc = "0x1096 - TCD Current Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
|
||||
pub tcd4_citer_elinkno: TCD4_CITER_ELINKNO,
|
||||
#[doc = "0x1098 - TCD Last Destination Address Adjustment/Scatter Gather Address"]
|
||||
pub tcd4_dlastsga: TCD4_DLASTSGA,
|
||||
#[doc = "0x109c - TCD Control and Status"] pub tcd4_csr: TCD4_CSR,
|
||||
#[doc = "0x109c - TCD Control and Status"]
|
||||
pub tcd4_csr: TCD4_CSR,
|
||||
#[doc = "0x109e - TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
|
||||
pub tcd4_biter_elinkno: TCD4_BITER_ELINKNO,
|
||||
#[doc = "0x10a0 - TCD Source Address"] pub tcd5_saddr: TCD5_SADDR,
|
||||
#[doc = "0x10a4 - TCD Signed Source Address Offset"] pub tcd5_soff: TCD5_SOFF,
|
||||
#[doc = "0x10a6 - TCD Transfer Attributes"] pub tcd5_attr: TCD5_ATTR,
|
||||
#[doc = "0x10a0 - TCD Source Address"]
|
||||
pub tcd5_saddr: TCD5_SADDR,
|
||||
#[doc = "0x10a4 - TCD Signed Source Address Offset"]
|
||||
pub tcd5_soff: TCD5_SOFF,
|
||||
#[doc = "0x10a6 - TCD Transfer Attributes"]
|
||||
pub tcd5_attr: TCD5_ATTR,
|
||||
#[doc = "0x10a8 - TCD Minor Byte Count (Minor Loop Mapping Disabled)"]
|
||||
pub tcd5_nbytes_mlno:
|
||||
TCD5_NBYTES_MLNO,
|
||||
#[doc = "0x10ac - TCD Last Source Address Adjustment"] pub tcd5_slast: TCD5_SLAST,
|
||||
#[doc = "0x10b0 - TCD Destination Address"] pub tcd5_daddr: TCD5_DADDR,
|
||||
#[doc = "0x10b4 - TCD Signed Destination Address Offset"] pub tcd5_doff: TCD5_DOFF,
|
||||
pub tcd5_nbytes_mlno: TCD5_NBYTES_MLNO,
|
||||
#[doc = "0x10ac - TCD Last Source Address Adjustment"]
|
||||
pub tcd5_slast: TCD5_SLAST,
|
||||
#[doc = "0x10b0 - TCD Destination Address"]
|
||||
pub tcd5_daddr: TCD5_DADDR,
|
||||
#[doc = "0x10b4 - TCD Signed Destination Address Offset"]
|
||||
pub tcd5_doff: TCD5_DOFF,
|
||||
#[doc = "0x10b6 - TCD Current Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
|
||||
pub tcd5_citer_elinkno: TCD5_CITER_ELINKNO,
|
||||
#[doc = "0x10b8 - TCD Last Destination Address Adjustment/Scatter Gather Address"]
|
||||
pub tcd5_dlastsga: TCD5_DLASTSGA,
|
||||
#[doc = "0x10bc - TCD Control and Status"] pub tcd5_csr: TCD5_CSR,
|
||||
#[doc = "0x10bc - TCD Control and Status"]
|
||||
pub tcd5_csr: TCD5_CSR,
|
||||
#[doc = "0x10be - TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
|
||||
pub tcd5_biter_elinkno: TCD5_BITER_ELINKNO,
|
||||
#[doc = "0x10c0 - TCD Source Address"] pub tcd6_saddr: TCD6_SADDR,
|
||||
#[doc = "0x10c4 - TCD Signed Source Address Offset"] pub tcd6_soff: TCD6_SOFF,
|
||||
#[doc = "0x10c6 - TCD Transfer Attributes"] pub tcd6_attr: TCD6_ATTR,
|
||||
#[doc = "0x10c0 - TCD Source Address"]
|
||||
pub tcd6_saddr: TCD6_SADDR,
|
||||
#[doc = "0x10c4 - TCD Signed Source Address Offset"]
|
||||
pub tcd6_soff: TCD6_SOFF,
|
||||
#[doc = "0x10c6 - TCD Transfer Attributes"]
|
||||
pub tcd6_attr: TCD6_ATTR,
|
||||
#[doc = "0x10c8 - TCD Minor Byte Count (Minor Loop Mapping Disabled)"]
|
||||
pub tcd6_nbytes_mlno:
|
||||
TCD6_NBYTES_MLNO,
|
||||
#[doc = "0x10cc - TCD Last Source Address Adjustment"] pub tcd6_slast: TCD6_SLAST,
|
||||
#[doc = "0x10d0 - TCD Destination Address"] pub tcd6_daddr: TCD6_DADDR,
|
||||
#[doc = "0x10d4 - TCD Signed Destination Address Offset"] pub tcd6_doff: TCD6_DOFF,
|
||||
pub tcd6_nbytes_mlno: TCD6_NBYTES_MLNO,
|
||||
#[doc = "0x10cc - TCD Last Source Address Adjustment"]
|
||||
pub tcd6_slast: TCD6_SLAST,
|
||||
#[doc = "0x10d0 - TCD Destination Address"]
|
||||
pub tcd6_daddr: TCD6_DADDR,
|
||||
#[doc = "0x10d4 - TCD Signed Destination Address Offset"]
|
||||
pub tcd6_doff: TCD6_DOFF,
|
||||
#[doc = "0x10d6 - TCD Current Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
|
||||
pub tcd6_citer_elinkno: TCD6_CITER_ELINKNO,
|
||||
#[doc = "0x10d8 - TCD Last Destination Address Adjustment/Scatter Gather Address"]
|
||||
pub tcd6_dlastsga: TCD6_DLASTSGA,
|
||||
#[doc = "0x10dc - TCD Control and Status"] pub tcd6_csr: TCD6_CSR,
|
||||
#[doc = "0x10dc - TCD Control and Status"]
|
||||
pub tcd6_csr: TCD6_CSR,
|
||||
#[doc = "0x10de - TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
|
||||
pub tcd6_biter_elinkno: TCD6_BITER_ELINKNO,
|
||||
#[doc = "0x10e0 - TCD Source Address"] pub tcd7_saddr: TCD7_SADDR,
|
||||
#[doc = "0x10e4 - TCD Signed Source Address Offset"] pub tcd7_soff: TCD7_SOFF,
|
||||
#[doc = "0x10e6 - TCD Transfer Attributes"] pub tcd7_attr: TCD7_ATTR,
|
||||
#[doc = "0x10e0 - TCD Source Address"]
|
||||
pub tcd7_saddr: TCD7_SADDR,
|
||||
#[doc = "0x10e4 - TCD Signed Source Address Offset"]
|
||||
pub tcd7_soff: TCD7_SOFF,
|
||||
#[doc = "0x10e6 - TCD Transfer Attributes"]
|
||||
pub tcd7_attr: TCD7_ATTR,
|
||||
#[doc = "0x10e8 - TCD Minor Byte Count (Minor Loop Mapping Disabled)"]
|
||||
pub tcd7_nbytes_mlno:
|
||||
TCD7_NBYTES_MLNO,
|
||||
#[doc = "0x10ec - TCD Last Source Address Adjustment"] pub tcd7_slast: TCD7_SLAST,
|
||||
#[doc = "0x10f0 - TCD Destination Address"] pub tcd7_daddr: TCD7_DADDR,
|
||||
#[doc = "0x10f4 - TCD Signed Destination Address Offset"] pub tcd7_doff: TCD7_DOFF,
|
||||
pub tcd7_nbytes_mlno: TCD7_NBYTES_MLNO,
|
||||
#[doc = "0x10ec - TCD Last Source Address Adjustment"]
|
||||
pub tcd7_slast: TCD7_SLAST,
|
||||
#[doc = "0x10f0 - TCD Destination Address"]
|
||||
pub tcd7_daddr: TCD7_DADDR,
|
||||
#[doc = "0x10f4 - TCD Signed Destination Address Offset"]
|
||||
pub tcd7_doff: TCD7_DOFF,
|
||||
#[doc = "0x10f6 - TCD Current Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
|
||||
pub tcd7_citer_elinkno: TCD7_CITER_ELINKNO,
|
||||
#[doc = "0x10f8 - TCD Last Destination Address Adjustment/Scatter Gather Address"]
|
||||
pub tcd7_dlastsga: TCD7_DLASTSGA,
|
||||
#[doc = "0x10fc - TCD Control and Status"] pub tcd7_csr: TCD7_CSR,
|
||||
#[doc = "0x10fc - TCD Control and Status"]
|
||||
pub tcd7_csr: TCD7_CSR,
|
||||
#[doc = "0x10fe - TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
|
||||
pub tcd7_biter_elinkno: TCD7_BITER_ELINKNO,
|
||||
#[doc = "0x1100 - TCD Source Address"] pub tcd8_saddr: TCD8_SADDR,
|
||||
#[doc = "0x1104 - TCD Signed Source Address Offset"] pub tcd8_soff: TCD8_SOFF,
|
||||
#[doc = "0x1106 - TCD Transfer Attributes"] pub tcd8_attr: TCD8_ATTR,
|
||||
#[doc = "0x1100 - TCD Source Address"]
|
||||
pub tcd8_saddr: TCD8_SADDR,
|
||||
#[doc = "0x1104 - TCD Signed Source Address Offset"]
|
||||
pub tcd8_soff: TCD8_SOFF,
|
||||
#[doc = "0x1106 - TCD Transfer Attributes"]
|
||||
pub tcd8_attr: TCD8_ATTR,
|
||||
#[doc = "0x1108 - TCD Minor Byte Count (Minor Loop Mapping Disabled)"]
|
||||
pub tcd8_nbytes_mlno:
|
||||
TCD8_NBYTES_MLNO,
|
||||
#[doc = "0x110c - TCD Last Source Address Adjustment"] pub tcd8_slast: TCD8_SLAST,
|
||||
#[doc = "0x1110 - TCD Destination Address"] pub tcd8_daddr: TCD8_DADDR,
|
||||
#[doc = "0x1114 - TCD Signed Destination Address Offset"] pub tcd8_doff: TCD8_DOFF,
|
||||
pub tcd8_nbytes_mlno: TCD8_NBYTES_MLNO,
|
||||
#[doc = "0x110c - TCD Last Source Address Adjustment"]
|
||||
pub tcd8_slast: TCD8_SLAST,
|
||||
#[doc = "0x1110 - TCD Destination Address"]
|
||||
pub tcd8_daddr: TCD8_DADDR,
|
||||
#[doc = "0x1114 - TCD Signed Destination Address Offset"]
|
||||
pub tcd8_doff: TCD8_DOFF,
|
||||
#[doc = "0x1116 - TCD Current Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
|
||||
pub tcd8_citer_elinkno: TCD8_CITER_ELINKNO,
|
||||
#[doc = "0x1118 - TCD Last Destination Address Adjustment/Scatter Gather Address"]
|
||||
pub tcd8_dlastsga: TCD8_DLASTSGA,
|
||||
#[doc = "0x111c - TCD Control and Status"] pub tcd8_csr: TCD8_CSR,
|
||||
#[doc = "0x111c - TCD Control and Status"]
|
||||
pub tcd8_csr: TCD8_CSR,
|
||||
#[doc = "0x111e - TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
|
||||
pub tcd8_biter_elinkno: TCD8_BITER_ELINKNO,
|
||||
#[doc = "0x1120 - TCD Source Address"] pub tcd9_saddr: TCD9_SADDR,
|
||||
#[doc = "0x1124 - TCD Signed Source Address Offset"] pub tcd9_soff: TCD9_SOFF,
|
||||
#[doc = "0x1126 - TCD Transfer Attributes"] pub tcd9_attr: TCD9_ATTR,
|
||||
#[doc = "0x1120 - TCD Source Address"]
|
||||
pub tcd9_saddr: TCD9_SADDR,
|
||||
#[doc = "0x1124 - TCD Signed Source Address Offset"]
|
||||
pub tcd9_soff: TCD9_SOFF,
|
||||
#[doc = "0x1126 - TCD Transfer Attributes"]
|
||||
pub tcd9_attr: TCD9_ATTR,
|
||||
#[doc = "0x1128 - TCD Minor Byte Count (Minor Loop Mapping Disabled)"]
|
||||
pub tcd9_nbytes_mlno:
|
||||
TCD9_NBYTES_MLNO,
|
||||
#[doc = "0x112c - TCD Last Source Address Adjustment"] pub tcd9_slast: TCD9_SLAST,
|
||||
#[doc = "0x1130 - TCD Destination Address"] pub tcd9_daddr: TCD9_DADDR,
|
||||
#[doc = "0x1134 - TCD Signed Destination Address Offset"] pub tcd9_doff: TCD9_DOFF,
|
||||
pub tcd9_nbytes_mlno: TCD9_NBYTES_MLNO,
|
||||
#[doc = "0x112c - TCD Last Source Address Adjustment"]
|
||||
pub tcd9_slast: TCD9_SLAST,
|
||||
#[doc = "0x1130 - TCD Destination Address"]
|
||||
pub tcd9_daddr: TCD9_DADDR,
|
||||
#[doc = "0x1134 - TCD Signed Destination Address Offset"]
|
||||
pub tcd9_doff: TCD9_DOFF,
|
||||
#[doc = "0x1136 - TCD Current Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
|
||||
pub tcd9_citer_elinkno: TCD9_CITER_ELINKNO,
|
||||
#[doc = "0x1138 - TCD Last Destination Address Adjustment/Scatter Gather Address"]
|
||||
pub tcd9_dlastsga: TCD9_DLASTSGA,
|
||||
#[doc = "0x113c - TCD Control and Status"] pub tcd9_csr: TCD9_CSR,
|
||||
#[doc = "0x113c - TCD Control and Status"]
|
||||
pub tcd9_csr: TCD9_CSR,
|
||||
#[doc = "0x113e - TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
|
||||
pub tcd9_biter_elinkno: TCD9_BITER_ELINKNO,
|
||||
#[doc = "0x1140 - TCD Source Address"] pub tcd10_saddr: TCD10_SADDR,
|
||||
#[doc = "0x1144 - TCD Signed Source Address Offset"] pub tcd10_soff: TCD10_SOFF,
|
||||
#[doc = "0x1146 - TCD Transfer Attributes"] pub tcd10_attr: TCD10_ATTR,
|
||||
#[doc = "0x1140 - TCD Source Address"]
|
||||
pub tcd10_saddr: TCD10_SADDR,
|
||||
#[doc = "0x1144 - TCD Signed Source Address Offset"]
|
||||
pub tcd10_soff: TCD10_SOFF,
|
||||
#[doc = "0x1146 - TCD Transfer Attributes"]
|
||||
pub tcd10_attr: TCD10_ATTR,
|
||||
#[doc = "0x1148 - TCD Minor Byte Count (Minor Loop Mapping Disabled)"]
|
||||
pub tcd10_nbytes_mlno:
|
||||
TCD10_NBYTES_MLNO,
|
||||
#[doc = "0x114c - TCD Last Source Address Adjustment"] pub tcd10_slast: TCD10_SLAST,
|
||||
#[doc = "0x1150 - TCD Destination Address"] pub tcd10_daddr: TCD10_DADDR,
|
||||
#[doc = "0x1154 - TCD Signed Destination Address Offset"] pub tcd10_doff: TCD10_DOFF,
|
||||
pub tcd10_nbytes_mlno: TCD10_NBYTES_MLNO,
|
||||
#[doc = "0x114c - TCD Last Source Address Adjustment"]
|
||||
pub tcd10_slast: TCD10_SLAST,
|
||||
#[doc = "0x1150 - TCD Destination Address"]
|
||||
pub tcd10_daddr: TCD10_DADDR,
|
||||
#[doc = "0x1154 - TCD Signed Destination Address Offset"]
|
||||
pub tcd10_doff: TCD10_DOFF,
|
||||
#[doc = "0x1156 - TCD Current Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
|
||||
pub tcd10_citer_elinkno: TCD10_CITER_ELINKNO,
|
||||
#[doc = "0x1158 - TCD Last Destination Address Adjustment/Scatter Gather Address"]
|
||||
pub tcd10_dlastsga: TCD10_DLASTSGA,
|
||||
#[doc = "0x115c - TCD Control and Status"] pub tcd10_csr: TCD10_CSR,
|
||||
#[doc = "0x115c - TCD Control and Status"]
|
||||
pub tcd10_csr: TCD10_CSR,
|
||||
#[doc = "0x115e - TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
|
||||
pub tcd10_biter_elinkno: TCD10_BITER_ELINKNO,
|
||||
#[doc = "0x1160 - TCD Source Address"] pub tcd11_saddr: TCD11_SADDR,
|
||||
#[doc = "0x1164 - TCD Signed Source Address Offset"] pub tcd11_soff: TCD11_SOFF,
|
||||
#[doc = "0x1166 - TCD Transfer Attributes"] pub tcd11_attr: TCD11_ATTR,
|
||||
#[doc = "0x1160 - TCD Source Address"]
|
||||
pub tcd11_saddr: TCD11_SADDR,
|
||||
#[doc = "0x1164 - TCD Signed Source Address Offset"]
|
||||
pub tcd11_soff: TCD11_SOFF,
|
||||
#[doc = "0x1166 - TCD Transfer Attributes"]
|
||||
pub tcd11_attr: TCD11_ATTR,
|
||||
#[doc = "0x1168 - TCD Minor Byte Count (Minor Loop Mapping Disabled)"]
|
||||
pub tcd11_nbytes_mlno:
|
||||
TCD11_NBYTES_MLNO,
|
||||
#[doc = "0x116c - TCD Last Source Address Adjustment"] pub tcd11_slast: TCD11_SLAST,
|
||||
#[doc = "0x1170 - TCD Destination Address"] pub tcd11_daddr: TCD11_DADDR,
|
||||
#[doc = "0x1174 - TCD Signed Destination Address Offset"] pub tcd11_doff: TCD11_DOFF,
|
||||
pub tcd11_nbytes_mlno: TCD11_NBYTES_MLNO,
|
||||
#[doc = "0x116c - TCD Last Source Address Adjustment"]
|
||||
pub tcd11_slast: TCD11_SLAST,
|
||||
#[doc = "0x1170 - TCD Destination Address"]
|
||||
pub tcd11_daddr: TCD11_DADDR,
|
||||
#[doc = "0x1174 - TCD Signed Destination Address Offset"]
|
||||
pub tcd11_doff: TCD11_DOFF,
|
||||
#[doc = "0x1176 - TCD Current Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
|
||||
pub tcd11_citer_elinkno: TCD11_CITER_ELINKNO,
|
||||
#[doc = "0x1178 - TCD Last Destination Address Adjustment/Scatter Gather Address"]
|
||||
pub tcd11_dlastsga: TCD11_DLASTSGA,
|
||||
#[doc = "0x117c - TCD Control and Status"] pub tcd11_csr: TCD11_CSR,
|
||||
#[doc = "0x117c - TCD Control and Status"]
|
||||
pub tcd11_csr: TCD11_CSR,
|
||||
#[doc = "0x117e - TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
|
||||
pub tcd11_biter_elinkno: TCD11_BITER_ELINKNO,
|
||||
#[doc = "0x1180 - TCD Source Address"] pub tcd12_saddr: TCD12_SADDR,
|
||||
#[doc = "0x1184 - TCD Signed Source Address Offset"] pub tcd12_soff: TCD12_SOFF,
|
||||
#[doc = "0x1186 - TCD Transfer Attributes"] pub tcd12_attr: TCD12_ATTR,
|
||||
#[doc = "0x1180 - TCD Source Address"]
|
||||
pub tcd12_saddr: TCD12_SADDR,
|
||||
#[doc = "0x1184 - TCD Signed Source Address Offset"]
|
||||
pub tcd12_soff: TCD12_SOFF,
|
||||
#[doc = "0x1186 - TCD Transfer Attributes"]
|
||||
pub tcd12_attr: TCD12_ATTR,
|
||||
#[doc = "0x1188 - TCD Minor Byte Count (Minor Loop Mapping Disabled)"]
|
||||
pub tcd12_nbytes_mlno:
|
||||
TCD12_NBYTES_MLNO,
|
||||
#[doc = "0x118c - TCD Last Source Address Adjustment"] pub tcd12_slast: TCD12_SLAST,
|
||||
#[doc = "0x1190 - TCD Destination Address"] pub tcd12_daddr: TCD12_DADDR,
|
||||
#[doc = "0x1194 - TCD Signed Destination Address Offset"] pub tcd12_doff: TCD12_DOFF,
|
||||
pub tcd12_nbytes_mlno: TCD12_NBYTES_MLNO,
|
||||
#[doc = "0x118c - TCD Last Source Address Adjustment"]
|
||||
pub tcd12_slast: TCD12_SLAST,
|
||||
#[doc = "0x1190 - TCD Destination Address"]
|
||||
pub tcd12_daddr: TCD12_DADDR,
|
||||
#[doc = "0x1194 - TCD Signed Destination Address Offset"]
|
||||
pub tcd12_doff: TCD12_DOFF,
|
||||
#[doc = "0x1196 - TCD Current Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
|
||||
pub tcd12_citer_elinkno: TCD12_CITER_ELINKNO,
|
||||
#[doc = "0x1198 - TCD Last Destination Address Adjustment/Scatter Gather Address"]
|
||||
pub tcd12_dlastsga: TCD12_DLASTSGA,
|
||||
#[doc = "0x119c - TCD Control and Status"] pub tcd12_csr: TCD12_CSR,
|
||||
#[doc = "0x119c - TCD Control and Status"]
|
||||
pub tcd12_csr: TCD12_CSR,
|
||||
#[doc = "0x119e - TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
|
||||
pub tcd12_biter_elinkno: TCD12_BITER_ELINKNO,
|
||||
#[doc = "0x11a0 - TCD Source Address"] pub tcd13_saddr: TCD13_SADDR,
|
||||
#[doc = "0x11a4 - TCD Signed Source Address Offset"] pub tcd13_soff: TCD13_SOFF,
|
||||
#[doc = "0x11a6 - TCD Transfer Attributes"] pub tcd13_attr: TCD13_ATTR,
|
||||
#[doc = "0x11a0 - TCD Source Address"]
|
||||
pub tcd13_saddr: TCD13_SADDR,
|
||||
#[doc = "0x11a4 - TCD Signed Source Address Offset"]
|
||||
pub tcd13_soff: TCD13_SOFF,
|
||||
#[doc = "0x11a6 - TCD Transfer Attributes"]
|
||||
pub tcd13_attr: TCD13_ATTR,
|
||||
#[doc = "0x11a8 - TCD Minor Byte Count (Minor Loop Mapping Disabled)"]
|
||||
pub tcd13_nbytes_mlno:
|
||||
TCD13_NBYTES_MLNO,
|
||||
#[doc = "0x11ac - TCD Last Source Address Adjustment"] pub tcd13_slast: TCD13_SLAST,
|
||||
#[doc = "0x11b0 - TCD Destination Address"] pub tcd13_daddr: TCD13_DADDR,
|
||||
#[doc = "0x11b4 - TCD Signed Destination Address Offset"] pub tcd13_doff: TCD13_DOFF,
|
||||
pub tcd13_nbytes_mlno: TCD13_NBYTES_MLNO,
|
||||
#[doc = "0x11ac - TCD Last Source Address Adjustment"]
|
||||
pub tcd13_slast: TCD13_SLAST,
|
||||
#[doc = "0x11b0 - TCD Destination Address"]
|
||||
pub tcd13_daddr: TCD13_DADDR,
|
||||
#[doc = "0x11b4 - TCD Signed Destination Address Offset"]
|
||||
pub tcd13_doff: TCD13_DOFF,
|
||||
#[doc = "0x11b6 - TCD Current Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
|
||||
pub tcd13_citer_elinkno: TCD13_CITER_ELINKNO,
|
||||
#[doc = "0x11b8 - TCD Last Destination Address Adjustment/Scatter Gather Address"]
|
||||
pub tcd13_dlastsga: TCD13_DLASTSGA,
|
||||
#[doc = "0x11bc - TCD Control and Status"] pub tcd13_csr: TCD13_CSR,
|
||||
#[doc = "0x11bc - TCD Control and Status"]
|
||||
pub tcd13_csr: TCD13_CSR,
|
||||
#[doc = "0x11be - TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
|
||||
pub tcd13_biter_elinkno: TCD13_BITER_ELINKNO,
|
||||
#[doc = "0x11c0 - TCD Source Address"] pub tcd14_saddr: TCD14_SADDR,
|
||||
#[doc = "0x11c4 - TCD Signed Source Address Offset"] pub tcd14_soff: TCD14_SOFF,
|
||||
#[doc = "0x11c6 - TCD Transfer Attributes"] pub tcd14_attr: TCD14_ATTR,
|
||||
#[doc = "0x11c0 - TCD Source Address"]
|
||||
pub tcd14_saddr: TCD14_SADDR,
|
||||
#[doc = "0x11c4 - TCD Signed Source Address Offset"]
|
||||
pub tcd14_soff: TCD14_SOFF,
|
||||
#[doc = "0x11c6 - TCD Transfer Attributes"]
|
||||
pub tcd14_attr: TCD14_ATTR,
|
||||
#[doc = "0x11c8 - TCD Minor Byte Count (Minor Loop Mapping Disabled)"]
|
||||
pub tcd14_nbytes_mlno:
|
||||
TCD14_NBYTES_MLNO,
|
||||
#[doc = "0x11cc - TCD Last Source Address Adjustment"] pub tcd14_slast: TCD14_SLAST,
|
||||
#[doc = "0x11d0 - TCD Destination Address"] pub tcd14_daddr: TCD14_DADDR,
|
||||
#[doc = "0x11d4 - TCD Signed Destination Address Offset"] pub tcd14_doff: TCD14_DOFF,
|
||||
pub tcd14_nbytes_mlno: TCD14_NBYTES_MLNO,
|
||||
#[doc = "0x11cc - TCD Last Source Address Adjustment"]
|
||||
pub tcd14_slast: TCD14_SLAST,
|
||||
#[doc = "0x11d0 - TCD Destination Address"]
|
||||
pub tcd14_daddr: TCD14_DADDR,
|
||||
#[doc = "0x11d4 - TCD Signed Destination Address Offset"]
|
||||
pub tcd14_doff: TCD14_DOFF,
|
||||
#[doc = "0x11d6 - TCD Current Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
|
||||
pub tcd14_citer_elinkno: TCD14_CITER_ELINKNO,
|
||||
#[doc = "0x11d8 - TCD Last Destination Address Adjustment/Scatter Gather Address"]
|
||||
pub tcd14_dlastsga: TCD14_DLASTSGA,
|
||||
#[doc = "0x11dc - TCD Control and Status"] pub tcd14_csr: TCD14_CSR,
|
||||
#[doc = "0x11dc - TCD Control and Status"]
|
||||
pub tcd14_csr: TCD14_CSR,
|
||||
#[doc = "0x11de - TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
|
||||
pub tcd14_biter_elinkno: TCD14_BITER_ELINKNO,
|
||||
#[doc = "0x11e0 - TCD Source Address"] pub tcd15_saddr: TCD15_SADDR,
|
||||
#[doc = "0x11e4 - TCD Signed Source Address Offset"] pub tcd15_soff: TCD15_SOFF,
|
||||
#[doc = "0x11e6 - TCD Transfer Attributes"] pub tcd15_attr: TCD15_ATTR,
|
||||
#[doc = "0x11e0 - TCD Source Address"]
|
||||
pub tcd15_saddr: TCD15_SADDR,
|
||||
#[doc = "0x11e4 - TCD Signed Source Address Offset"]
|
||||
pub tcd15_soff: TCD15_SOFF,
|
||||
#[doc = "0x11e6 - TCD Transfer Attributes"]
|
||||
pub tcd15_attr: TCD15_ATTR,
|
||||
#[doc = "0x11e8 - TCD Minor Byte Count (Minor Loop Mapping Disabled)"]
|
||||
pub tcd15_nbytes_mlno:
|
||||
TCD15_NBYTES_MLNO,
|
||||
#[doc = "0x11ec - TCD Last Source Address Adjustment"] pub tcd15_slast: TCD15_SLAST,
|
||||
#[doc = "0x11f0 - TCD Destination Address"] pub tcd15_daddr: TCD15_DADDR,
|
||||
#[doc = "0x11f4 - TCD Signed Destination Address Offset"] pub tcd15_doff: TCD15_DOFF,
|
||||
pub tcd15_nbytes_mlno: TCD15_NBYTES_MLNO,
|
||||
#[doc = "0x11ec - TCD Last Source Address Adjustment"]
|
||||
pub tcd15_slast: TCD15_SLAST,
|
||||
#[doc = "0x11f0 - TCD Destination Address"]
|
||||
pub tcd15_daddr: TCD15_DADDR,
|
||||
#[doc = "0x11f4 - TCD Signed Destination Address Offset"]
|
||||
pub tcd15_doff: TCD15_DOFF,
|
||||
#[doc = "0x11f6 - TCD Current Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
|
||||
pub tcd15_citer_elinkno: TCD15_CITER_ELINKNO,
|
||||
#[doc = "0x11f8 - TCD Last Destination Address Adjustment/Scatter Gather Address"]
|
||||
pub tcd15_dlastsga: TCD15_DLASTSGA,
|
||||
#[doc = "0x11fc - TCD Control and Status"] pub tcd15_csr: TCD15_CSR,
|
||||
#[doc = "0x11fc - TCD Control and Status"]
|
||||
pub tcd15_csr: TCD15_CSR,
|
||||
#[doc = "0x11fe - TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Disabled)"]
|
||||
pub tcd15_biter_elinkno: TCD15_BITER_ELINKNO,
|
||||
}
|
||||
|
@ -54,8 +54,10 @@ impl<'a> _SAEEW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `NOP`"]
|
||||
pub enum NOPW {
|
||||
#[doc = "Normal operation"] _0,
|
||||
#[doc = "No operation, ignore the other bits in this register"] _1,
|
||||
#[doc = "Normal operation"]
|
||||
_0,
|
||||
#[doc = "No operation, ignore the other bits in this register"]
|
||||
_1,
|
||||
}
|
||||
impl NOPW {
|
||||
#[allow(missing_docs)]
|
||||
|
@ -54,8 +54,10 @@ impl<'a> _SAERW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `NOP`"]
|
||||
pub enum NOPW {
|
||||
#[doc = "Normal operation"] _0,
|
||||
#[doc = "No operation, ignore the other bits in this register"] _1,
|
||||
#[doc = "Normal operation"]
|
||||
_0,
|
||||
#[doc = "No operation, ignore the other bits in this register"]
|
||||
_1,
|
||||
}
|
||||
impl NOPW {
|
||||
#[allow(missing_docs)]
|
||||
|
@ -31,8 +31,10 @@ impl<'a> _SSRTW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `SAST`"]
|
||||
pub enum SASTW {
|
||||
#[doc = "Set only the TCDn_CSR[START] bit specified in the SSRT field"] _0,
|
||||
#[doc = "Set all bits in TCDn_CSR[START]"] _1,
|
||||
#[doc = "Set only the TCDn_CSR[START] bit specified in the SSRT field"]
|
||||
_0,
|
||||
#[doc = "Set all bits in TCDn_CSR[START]"]
|
||||
_1,
|
||||
}
|
||||
impl SASTW {
|
||||
#[allow(missing_docs)]
|
||||
@ -87,8 +89,10 @@ impl<'a> _SASTW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `NOP`"]
|
||||
pub enum NOPW {
|
||||
#[doc = "Normal operation"] _0,
|
||||
#[doc = "No operation, ignore the other bits in this register"] _1,
|
||||
#[doc = "Normal operation"]
|
||||
_0,
|
||||
#[doc = "No operation, ignore the other bits in this register"]
|
||||
_1,
|
||||
}
|
||||
impl NOPW {
|
||||
#[allow(missing_docs)]
|
||||
|
@ -67,10 +67,14 @@ impl DMODR {
|
||||
#[doc = "Possible values of the field `SSIZE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SSIZER {
|
||||
#[doc = "8-bit"] _0,
|
||||
#[doc = "16-bit"] _1,
|
||||
#[doc = "32-bit"] _10,
|
||||
#[doc = r" Reserved"] _Reserved(u8),
|
||||
#[doc = "8-bit"]
|
||||
_0,
|
||||
#[doc = "16-bit"]
|
||||
_1,
|
||||
#[doc = "32-bit"]
|
||||
_10,
|
||||
#[doc = r" Reserved"]
|
||||
_Reserved(u8),
|
||||
}
|
||||
impl SSIZER {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
@ -113,8 +117,10 @@ impl SSIZER {
|
||||
#[doc = "Possible values of the field `SMOD`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SMODR {
|
||||
#[doc = "Source address modulo feature is disabled"] _0,
|
||||
#[doc = r" Reserved"] _Reserved(u8),
|
||||
#[doc = "Source address modulo feature is disabled"]
|
||||
_0,
|
||||
#[doc = r" Reserved"]
|
||||
_Reserved(u8),
|
||||
}
|
||||
impl SMODR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
@ -172,9 +178,12 @@ impl<'a> _DMODW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `SSIZE`"]
|
||||
pub enum SSIZEW {
|
||||
#[doc = "8-bit"] _0,
|
||||
#[doc = "16-bit"] _1,
|
||||
#[doc = "32-bit"] _10,
|
||||
#[doc = "8-bit"]
|
||||
_0,
|
||||
#[doc = "16-bit"]
|
||||
_1,
|
||||
#[doc = "32-bit"]
|
||||
_10,
|
||||
}
|
||||
impl SSIZEW {
|
||||
#[allow(missing_docs)]
|
||||
@ -225,7 +234,8 @@ impl<'a> _SSIZEW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `SMOD`"]
|
||||
pub enum SMODW {
|
||||
#[doc = "Source address modulo feature is disabled"] _0,
|
||||
#[doc = "Source address modulo feature is disabled"]
|
||||
_0,
|
||||
}
|
||||
impl SMODW {
|
||||
#[allow(missing_docs)]
|
||||
|
@ -56,8 +56,10 @@ impl BITERR {
|
||||
#[doc = "Possible values of the field `ELINK`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ELINKR {
|
||||
#[doc = "The channel-to-channel linking is disabled"] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled"] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled"]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ELINKR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -115,8 +117,10 @@ impl<'a> _BITERW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `ELINK`"]
|
||||
pub enum ELINKW {
|
||||
#[doc = "The channel-to-channel linking is disabled"] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled"] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled"]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ELINKW {
|
||||
#[allow(missing_docs)]
|
||||
|
@ -67,8 +67,10 @@ impl LINKCHR {
|
||||
#[doc = "Possible values of the field `ELINK`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ELINKR {
|
||||
#[doc = "The channel-to-channel linking is disabled"] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled"] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled"]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ELINKR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -141,8 +143,10 @@ impl<'a> _LINKCHW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `ELINK`"]
|
||||
pub enum ELINKW {
|
||||
#[doc = "The channel-to-channel linking is disabled"] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled"] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled"]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ELINKW {
|
||||
#[allow(missing_docs)]
|
||||
|
@ -56,8 +56,10 @@ impl CITERR {
|
||||
#[doc = "Possible values of the field `ELINK`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ELINKR {
|
||||
#[doc = "The channel-to-channel linking is disabled"] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled"] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled"]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ELINKR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -115,8 +117,10 @@ impl<'a> _CITERW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `ELINK`"]
|
||||
pub enum ELINKW {
|
||||
#[doc = "The channel-to-channel linking is disabled"] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled"] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled"]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ELINKW {
|
||||
#[allow(missing_docs)]
|
||||
|
@ -67,8 +67,10 @@ impl LINKCHR {
|
||||
#[doc = "Possible values of the field `ELINK`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ELINKR {
|
||||
#[doc = "The channel-to-channel linking is disabled"] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled"] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled"]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ELINKR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -141,8 +143,10 @@ impl<'a> _LINKCHW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `ELINK`"]
|
||||
pub enum ELINKW {
|
||||
#[doc = "The channel-to-channel linking is disabled"] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled"] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled"]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ELINKW {
|
||||
#[allow(missing_docs)]
|
||||
|
@ -45,8 +45,10 @@ impl super::TCD0_CSR {
|
||||
#[doc = "Possible values of the field `START`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum STARTR {
|
||||
#[doc = "The channel is not explicitly started."] _0,
|
||||
#[doc = "The channel is explicitly started via a software initiated service request."] _1,
|
||||
#[doc = "The channel is not explicitly started."]
|
||||
_0,
|
||||
#[doc = "The channel is explicitly started via a software initiated service request."]
|
||||
_1,
|
||||
}
|
||||
impl STARTR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -90,8 +92,10 @@ impl STARTR {
|
||||
#[doc = "Possible values of the field `INTMAJOR`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum INTMAJORR {
|
||||
#[doc = "The end-of-major loop interrupt is disabled."] _0,
|
||||
#[doc = "The end-of-major loop interrupt is enabled."] _1,
|
||||
#[doc = "The end-of-major loop interrupt is disabled."]
|
||||
_0,
|
||||
#[doc = "The end-of-major loop interrupt is enabled."]
|
||||
_1,
|
||||
}
|
||||
impl INTMAJORR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -135,8 +139,10 @@ impl INTMAJORR {
|
||||
#[doc = "Possible values of the field `INTHALF`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum INTHALFR {
|
||||
#[doc = "The half-point interrupt is disabled."] _0,
|
||||
#[doc = "The half-point interrupt is enabled."] _1,
|
||||
#[doc = "The half-point interrupt is disabled."]
|
||||
_0,
|
||||
#[doc = "The half-point interrupt is enabled."]
|
||||
_1,
|
||||
}
|
||||
impl INTHALFR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -201,7 +207,8 @@ impl DREQR {
|
||||
#[doc = "Possible values of the field `ESG`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ESGR {
|
||||
#[doc = "The current channel's TCD is normal format."] _0,
|
||||
#[doc = "The current channel's TCD is normal format."]
|
||||
_0,
|
||||
#[doc = "The current channel's TCD specifies a scatter gather format. The DLASTSGA field provides a memory pointer to the next TCD to be loaded into this channel after the major loop completes its execution."]
|
||||
_1,
|
||||
}
|
||||
@ -247,8 +254,10 @@ impl ESGR {
|
||||
#[doc = "Possible values of the field `MAJORELINK`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum MAJORELINKR {
|
||||
#[doc = "The channel-to-channel linking is disabled."] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled."] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled."]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled."]
|
||||
_1,
|
||||
}
|
||||
impl MAJORELINKR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -345,10 +354,14 @@ impl MAJORLINKCHR {
|
||||
#[doc = "Possible values of the field `BWC`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum BWCR {
|
||||
#[doc = "No eDMA engine stalls."] _0,
|
||||
#[doc = "eDMA engine stalls for 4 cycles after each R/W."] _10,
|
||||
#[doc = "eDMA engine stalls for 8 cycles after each R/W."] _11,
|
||||
#[doc = r" Reserved"] _Reserved(u8),
|
||||
#[doc = "No eDMA engine stalls."]
|
||||
_0,
|
||||
#[doc = "eDMA engine stalls for 4 cycles after each R/W."]
|
||||
_10,
|
||||
#[doc = "eDMA engine stalls for 8 cycles after each R/W."]
|
||||
_11,
|
||||
#[doc = r" Reserved"]
|
||||
_Reserved(u8),
|
||||
}
|
||||
impl BWCR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
@ -390,8 +403,10 @@ impl BWCR {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `START`"]
|
||||
pub enum STARTW {
|
||||
#[doc = "The channel is not explicitly started."] _0,
|
||||
#[doc = "The channel is explicitly started via a software initiated service request."] _1,
|
||||
#[doc = "The channel is not explicitly started."]
|
||||
_0,
|
||||
#[doc = "The channel is explicitly started via a software initiated service request."]
|
||||
_1,
|
||||
}
|
||||
impl STARTW {
|
||||
#[allow(missing_docs)]
|
||||
@ -446,8 +461,10 @@ impl<'a> _STARTW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `INTMAJOR`"]
|
||||
pub enum INTMAJORW {
|
||||
#[doc = "The end-of-major loop interrupt is disabled."] _0,
|
||||
#[doc = "The end-of-major loop interrupt is enabled."] _1,
|
||||
#[doc = "The end-of-major loop interrupt is disabled."]
|
||||
_0,
|
||||
#[doc = "The end-of-major loop interrupt is enabled."]
|
||||
_1,
|
||||
}
|
||||
impl INTMAJORW {
|
||||
#[allow(missing_docs)]
|
||||
@ -502,8 +519,10 @@ impl<'a> _INTMAJORW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `INTHALF`"]
|
||||
pub enum INTHALFW {
|
||||
#[doc = "The half-point interrupt is disabled."] _0,
|
||||
#[doc = "The half-point interrupt is enabled."] _1,
|
||||
#[doc = "The half-point interrupt is disabled."]
|
||||
_0,
|
||||
#[doc = "The half-point interrupt is enabled."]
|
||||
_1,
|
||||
}
|
||||
impl INTHALFW {
|
||||
#[allow(missing_docs)]
|
||||
@ -581,7 +600,8 @@ impl<'a> _DREQW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `ESG`"]
|
||||
pub enum ESGW {
|
||||
#[doc = "The current channel's TCD is normal format."] _0,
|
||||
#[doc = "The current channel's TCD is normal format."]
|
||||
_0,
|
||||
#[doc = "The current channel's TCD specifies a scatter gather format. The DLASTSGA field provides a memory pointer to the next TCD to be loaded into this channel after the major loop completes its execution."]
|
||||
_1,
|
||||
}
|
||||
@ -638,8 +658,10 @@ impl<'a> _ESGW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `MAJORELINK`"]
|
||||
pub enum MAJORELINKW {
|
||||
#[doc = "The channel-to-channel linking is disabled."] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled."] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled."]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled."]
|
||||
_1,
|
||||
}
|
||||
impl MAJORELINKW {
|
||||
#[allow(missing_docs)]
|
||||
@ -755,9 +777,12 @@ impl<'a> _MAJORLINKCHW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `BWC`"]
|
||||
pub enum BWCW {
|
||||
#[doc = "No eDMA engine stalls."] _0,
|
||||
#[doc = "eDMA engine stalls for 4 cycles after each R/W."] _10,
|
||||
#[doc = "eDMA engine stalls for 8 cycles after each R/W."] _11,
|
||||
#[doc = "No eDMA engine stalls."]
|
||||
_0,
|
||||
#[doc = "eDMA engine stalls for 4 cycles after each R/W."]
|
||||
_10,
|
||||
#[doc = "eDMA engine stalls for 8 cycles after each R/W."]
|
||||
_11,
|
||||
}
|
||||
impl BWCW {
|
||||
#[allow(missing_docs)]
|
||||
|
@ -56,8 +56,10 @@ impl NBYTESR {
|
||||
#[doc = "Possible values of the field `DMLOE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum DMLOER {
|
||||
#[doc = "The minor loop offset is not applied to the DADDR"] _0,
|
||||
#[doc = "The minor loop offset is applied to the DADDR"] _1,
|
||||
#[doc = "The minor loop offset is not applied to the DADDR"]
|
||||
_0,
|
||||
#[doc = "The minor loop offset is applied to the DADDR"]
|
||||
_1,
|
||||
}
|
||||
impl DMLOER {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -101,8 +103,10 @@ impl DMLOER {
|
||||
#[doc = "Possible values of the field `SMLOE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SMLOER {
|
||||
#[doc = "The minor loop offset is not applied to the SADDR"] _0,
|
||||
#[doc = "The minor loop offset is applied to the SADDR"] _1,
|
||||
#[doc = "The minor loop offset is not applied to the SADDR"]
|
||||
_0,
|
||||
#[doc = "The minor loop offset is applied to the SADDR"]
|
||||
_1,
|
||||
}
|
||||
impl SMLOER {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -160,8 +164,10 @@ impl<'a> _NBYTESW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `DMLOE`"]
|
||||
pub enum DMLOEW {
|
||||
#[doc = "The minor loop offset is not applied to the DADDR"] _0,
|
||||
#[doc = "The minor loop offset is applied to the DADDR"] _1,
|
||||
#[doc = "The minor loop offset is not applied to the DADDR"]
|
||||
_0,
|
||||
#[doc = "The minor loop offset is applied to the DADDR"]
|
||||
_1,
|
||||
}
|
||||
impl DMLOEW {
|
||||
#[allow(missing_docs)]
|
||||
@ -216,8 +222,10 @@ impl<'a> _DMLOEW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `SMLOE`"]
|
||||
pub enum SMLOEW {
|
||||
#[doc = "The minor loop offset is not applied to the SADDR"] _0,
|
||||
#[doc = "The minor loop offset is applied to the SADDR"] _1,
|
||||
#[doc = "The minor loop offset is not applied to the SADDR"]
|
||||
_0,
|
||||
#[doc = "The minor loop offset is applied to the SADDR"]
|
||||
_1,
|
||||
}
|
||||
impl SMLOEW {
|
||||
#[allow(missing_docs)]
|
||||
|
@ -67,8 +67,10 @@ impl MLOFFR {
|
||||
#[doc = "Possible values of the field `DMLOE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum DMLOER {
|
||||
#[doc = "The minor loop offset is not applied to the DADDR"] _0,
|
||||
#[doc = "The minor loop offset is applied to the DADDR"] _1,
|
||||
#[doc = "The minor loop offset is not applied to the DADDR"]
|
||||
_0,
|
||||
#[doc = "The minor loop offset is applied to the DADDR"]
|
||||
_1,
|
||||
}
|
||||
impl DMLOER {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -112,8 +114,10 @@ impl DMLOER {
|
||||
#[doc = "Possible values of the field `SMLOE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SMLOER {
|
||||
#[doc = "The minor loop offset is not applied to the SADDR"] _0,
|
||||
#[doc = "The minor loop offset is applied to the SADDR"] _1,
|
||||
#[doc = "The minor loop offset is not applied to the SADDR"]
|
||||
_0,
|
||||
#[doc = "The minor loop offset is applied to the SADDR"]
|
||||
_1,
|
||||
}
|
||||
impl SMLOER {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -186,8 +190,10 @@ impl<'a> _MLOFFW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `DMLOE`"]
|
||||
pub enum DMLOEW {
|
||||
#[doc = "The minor loop offset is not applied to the DADDR"] _0,
|
||||
#[doc = "The minor loop offset is applied to the DADDR"] _1,
|
||||
#[doc = "The minor loop offset is not applied to the DADDR"]
|
||||
_0,
|
||||
#[doc = "The minor loop offset is applied to the DADDR"]
|
||||
_1,
|
||||
}
|
||||
impl DMLOEW {
|
||||
#[allow(missing_docs)]
|
||||
@ -242,8 +248,10 @@ impl<'a> _DMLOEW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `SMLOE`"]
|
||||
pub enum SMLOEW {
|
||||
#[doc = "The minor loop offset is not applied to the SADDR"] _0,
|
||||
#[doc = "The minor loop offset is applied to the SADDR"] _1,
|
||||
#[doc = "The minor loop offset is not applied to the SADDR"]
|
||||
_0,
|
||||
#[doc = "The minor loop offset is applied to the SADDR"]
|
||||
_1,
|
||||
}
|
||||
impl SMLOEW {
|
||||
#[allow(missing_docs)]
|
||||
|
@ -67,10 +67,14 @@ impl DMODR {
|
||||
#[doc = "Possible values of the field `SSIZE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SSIZER {
|
||||
#[doc = "8-bit"] _0,
|
||||
#[doc = "16-bit"] _1,
|
||||
#[doc = "32-bit"] _10,
|
||||
#[doc = r" Reserved"] _Reserved(u8),
|
||||
#[doc = "8-bit"]
|
||||
_0,
|
||||
#[doc = "16-bit"]
|
||||
_1,
|
||||
#[doc = "32-bit"]
|
||||
_10,
|
||||
#[doc = r" Reserved"]
|
||||
_Reserved(u8),
|
||||
}
|
||||
impl SSIZER {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
@ -113,8 +117,10 @@ impl SSIZER {
|
||||
#[doc = "Possible values of the field `SMOD`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SMODR {
|
||||
#[doc = "Source address modulo feature is disabled"] _0,
|
||||
#[doc = r" Reserved"] _Reserved(u8),
|
||||
#[doc = "Source address modulo feature is disabled"]
|
||||
_0,
|
||||
#[doc = r" Reserved"]
|
||||
_Reserved(u8),
|
||||
}
|
||||
impl SMODR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
@ -172,9 +178,12 @@ impl<'a> _DMODW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `SSIZE`"]
|
||||
pub enum SSIZEW {
|
||||
#[doc = "8-bit"] _0,
|
||||
#[doc = "16-bit"] _1,
|
||||
#[doc = "32-bit"] _10,
|
||||
#[doc = "8-bit"]
|
||||
_0,
|
||||
#[doc = "16-bit"]
|
||||
_1,
|
||||
#[doc = "32-bit"]
|
||||
_10,
|
||||
}
|
||||
impl SSIZEW {
|
||||
#[allow(missing_docs)]
|
||||
@ -225,7 +234,8 @@ impl<'a> _SSIZEW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `SMOD`"]
|
||||
pub enum SMODW {
|
||||
#[doc = "Source address modulo feature is disabled"] _0,
|
||||
#[doc = "Source address modulo feature is disabled"]
|
||||
_0,
|
||||
}
|
||||
impl SMODW {
|
||||
#[allow(missing_docs)]
|
||||
|
@ -56,8 +56,10 @@ impl BITERR {
|
||||
#[doc = "Possible values of the field `ELINK`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ELINKR {
|
||||
#[doc = "The channel-to-channel linking is disabled"] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled"] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled"]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ELINKR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -115,8 +117,10 @@ impl<'a> _BITERW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `ELINK`"]
|
||||
pub enum ELINKW {
|
||||
#[doc = "The channel-to-channel linking is disabled"] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled"] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled"]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ELINKW {
|
||||
#[allow(missing_docs)]
|
||||
|
@ -67,8 +67,10 @@ impl LINKCHR {
|
||||
#[doc = "Possible values of the field `ELINK`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ELINKR {
|
||||
#[doc = "The channel-to-channel linking is disabled"] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled"] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled"]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ELINKR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -141,8 +143,10 @@ impl<'a> _LINKCHW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `ELINK`"]
|
||||
pub enum ELINKW {
|
||||
#[doc = "The channel-to-channel linking is disabled"] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled"] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled"]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ELINKW {
|
||||
#[allow(missing_docs)]
|
||||
|
@ -56,8 +56,10 @@ impl CITERR {
|
||||
#[doc = "Possible values of the field `ELINK`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ELINKR {
|
||||
#[doc = "The channel-to-channel linking is disabled"] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled"] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled"]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ELINKR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -115,8 +117,10 @@ impl<'a> _CITERW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `ELINK`"]
|
||||
pub enum ELINKW {
|
||||
#[doc = "The channel-to-channel linking is disabled"] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled"] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled"]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ELINKW {
|
||||
#[allow(missing_docs)]
|
||||
|
@ -67,8 +67,10 @@ impl LINKCHR {
|
||||
#[doc = "Possible values of the field `ELINK`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ELINKR {
|
||||
#[doc = "The channel-to-channel linking is disabled"] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled"] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled"]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ELINKR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -141,8 +143,10 @@ impl<'a> _LINKCHW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `ELINK`"]
|
||||
pub enum ELINKW {
|
||||
#[doc = "The channel-to-channel linking is disabled"] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled"] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled"]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ELINKW {
|
||||
#[allow(missing_docs)]
|
||||
|
@ -45,8 +45,10 @@ impl super::TCD10_CSR {
|
||||
#[doc = "Possible values of the field `START`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum STARTR {
|
||||
#[doc = "The channel is not explicitly started."] _0,
|
||||
#[doc = "The channel is explicitly started via a software initiated service request."] _1,
|
||||
#[doc = "The channel is not explicitly started."]
|
||||
_0,
|
||||
#[doc = "The channel is explicitly started via a software initiated service request."]
|
||||
_1,
|
||||
}
|
||||
impl STARTR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -90,8 +92,10 @@ impl STARTR {
|
||||
#[doc = "Possible values of the field `INTMAJOR`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum INTMAJORR {
|
||||
#[doc = "The end-of-major loop interrupt is disabled."] _0,
|
||||
#[doc = "The end-of-major loop interrupt is enabled."] _1,
|
||||
#[doc = "The end-of-major loop interrupt is disabled."]
|
||||
_0,
|
||||
#[doc = "The end-of-major loop interrupt is enabled."]
|
||||
_1,
|
||||
}
|
||||
impl INTMAJORR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -135,8 +139,10 @@ impl INTMAJORR {
|
||||
#[doc = "Possible values of the field `INTHALF`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum INTHALFR {
|
||||
#[doc = "The half-point interrupt is disabled."] _0,
|
||||
#[doc = "The half-point interrupt is enabled."] _1,
|
||||
#[doc = "The half-point interrupt is disabled."]
|
||||
_0,
|
||||
#[doc = "The half-point interrupt is enabled."]
|
||||
_1,
|
||||
}
|
||||
impl INTHALFR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -201,7 +207,8 @@ impl DREQR {
|
||||
#[doc = "Possible values of the field `ESG`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ESGR {
|
||||
#[doc = "The current channel's TCD is normal format."] _0,
|
||||
#[doc = "The current channel's TCD is normal format."]
|
||||
_0,
|
||||
#[doc = "The current channel's TCD specifies a scatter gather format. The DLASTSGA field provides a memory pointer to the next TCD to be loaded into this channel after the major loop completes its execution."]
|
||||
_1,
|
||||
}
|
||||
@ -247,8 +254,10 @@ impl ESGR {
|
||||
#[doc = "Possible values of the field `MAJORELINK`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum MAJORELINKR {
|
||||
#[doc = "The channel-to-channel linking is disabled."] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled."] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled."]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled."]
|
||||
_1,
|
||||
}
|
||||
impl MAJORELINKR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -345,10 +354,14 @@ impl MAJORLINKCHR {
|
||||
#[doc = "Possible values of the field `BWC`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum BWCR {
|
||||
#[doc = "No eDMA engine stalls."] _0,
|
||||
#[doc = "eDMA engine stalls for 4 cycles after each R/W."] _10,
|
||||
#[doc = "eDMA engine stalls for 8 cycles after each R/W."] _11,
|
||||
#[doc = r" Reserved"] _Reserved(u8),
|
||||
#[doc = "No eDMA engine stalls."]
|
||||
_0,
|
||||
#[doc = "eDMA engine stalls for 4 cycles after each R/W."]
|
||||
_10,
|
||||
#[doc = "eDMA engine stalls for 8 cycles after each R/W."]
|
||||
_11,
|
||||
#[doc = r" Reserved"]
|
||||
_Reserved(u8),
|
||||
}
|
||||
impl BWCR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
@ -390,8 +403,10 @@ impl BWCR {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `START`"]
|
||||
pub enum STARTW {
|
||||
#[doc = "The channel is not explicitly started."] _0,
|
||||
#[doc = "The channel is explicitly started via a software initiated service request."] _1,
|
||||
#[doc = "The channel is not explicitly started."]
|
||||
_0,
|
||||
#[doc = "The channel is explicitly started via a software initiated service request."]
|
||||
_1,
|
||||
}
|
||||
impl STARTW {
|
||||
#[allow(missing_docs)]
|
||||
@ -446,8 +461,10 @@ impl<'a> _STARTW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `INTMAJOR`"]
|
||||
pub enum INTMAJORW {
|
||||
#[doc = "The end-of-major loop interrupt is disabled."] _0,
|
||||
#[doc = "The end-of-major loop interrupt is enabled."] _1,
|
||||
#[doc = "The end-of-major loop interrupt is disabled."]
|
||||
_0,
|
||||
#[doc = "The end-of-major loop interrupt is enabled."]
|
||||
_1,
|
||||
}
|
||||
impl INTMAJORW {
|
||||
#[allow(missing_docs)]
|
||||
@ -502,8 +519,10 @@ impl<'a> _INTMAJORW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `INTHALF`"]
|
||||
pub enum INTHALFW {
|
||||
#[doc = "The half-point interrupt is disabled."] _0,
|
||||
#[doc = "The half-point interrupt is enabled."] _1,
|
||||
#[doc = "The half-point interrupt is disabled."]
|
||||
_0,
|
||||
#[doc = "The half-point interrupt is enabled."]
|
||||
_1,
|
||||
}
|
||||
impl INTHALFW {
|
||||
#[allow(missing_docs)]
|
||||
@ -581,7 +600,8 @@ impl<'a> _DREQW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `ESG`"]
|
||||
pub enum ESGW {
|
||||
#[doc = "The current channel's TCD is normal format."] _0,
|
||||
#[doc = "The current channel's TCD is normal format."]
|
||||
_0,
|
||||
#[doc = "The current channel's TCD specifies a scatter gather format. The DLASTSGA field provides a memory pointer to the next TCD to be loaded into this channel after the major loop completes its execution."]
|
||||
_1,
|
||||
}
|
||||
@ -638,8 +658,10 @@ impl<'a> _ESGW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `MAJORELINK`"]
|
||||
pub enum MAJORELINKW {
|
||||
#[doc = "The channel-to-channel linking is disabled."] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled."] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled."]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled."]
|
||||
_1,
|
||||
}
|
||||
impl MAJORELINKW {
|
||||
#[allow(missing_docs)]
|
||||
@ -755,9 +777,12 @@ impl<'a> _MAJORLINKCHW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `BWC`"]
|
||||
pub enum BWCW {
|
||||
#[doc = "No eDMA engine stalls."] _0,
|
||||
#[doc = "eDMA engine stalls for 4 cycles after each R/W."] _10,
|
||||
#[doc = "eDMA engine stalls for 8 cycles after each R/W."] _11,
|
||||
#[doc = "No eDMA engine stalls."]
|
||||
_0,
|
||||
#[doc = "eDMA engine stalls for 4 cycles after each R/W."]
|
||||
_10,
|
||||
#[doc = "eDMA engine stalls for 8 cycles after each R/W."]
|
||||
_11,
|
||||
}
|
||||
impl BWCW {
|
||||
#[allow(missing_docs)]
|
||||
|
@ -56,8 +56,10 @@ impl NBYTESR {
|
||||
#[doc = "Possible values of the field `DMLOE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum DMLOER {
|
||||
#[doc = "The minor loop offset is not applied to the DADDR"] _0,
|
||||
#[doc = "The minor loop offset is applied to the DADDR"] _1,
|
||||
#[doc = "The minor loop offset is not applied to the DADDR"]
|
||||
_0,
|
||||
#[doc = "The minor loop offset is applied to the DADDR"]
|
||||
_1,
|
||||
}
|
||||
impl DMLOER {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -101,8 +103,10 @@ impl DMLOER {
|
||||
#[doc = "Possible values of the field `SMLOE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SMLOER {
|
||||
#[doc = "The minor loop offset is not applied to the SADDR"] _0,
|
||||
#[doc = "The minor loop offset is applied to the SADDR"] _1,
|
||||
#[doc = "The minor loop offset is not applied to the SADDR"]
|
||||
_0,
|
||||
#[doc = "The minor loop offset is applied to the SADDR"]
|
||||
_1,
|
||||
}
|
||||
impl SMLOER {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -160,8 +164,10 @@ impl<'a> _NBYTESW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `DMLOE`"]
|
||||
pub enum DMLOEW {
|
||||
#[doc = "The minor loop offset is not applied to the DADDR"] _0,
|
||||
#[doc = "The minor loop offset is applied to the DADDR"] _1,
|
||||
#[doc = "The minor loop offset is not applied to the DADDR"]
|
||||
_0,
|
||||
#[doc = "The minor loop offset is applied to the DADDR"]
|
||||
_1,
|
||||
}
|
||||
impl DMLOEW {
|
||||
#[allow(missing_docs)]
|
||||
@ -216,8 +222,10 @@ impl<'a> _DMLOEW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `SMLOE`"]
|
||||
pub enum SMLOEW {
|
||||
#[doc = "The minor loop offset is not applied to the SADDR"] _0,
|
||||
#[doc = "The minor loop offset is applied to the SADDR"] _1,
|
||||
#[doc = "The minor loop offset is not applied to the SADDR"]
|
||||
_0,
|
||||
#[doc = "The minor loop offset is applied to the SADDR"]
|
||||
_1,
|
||||
}
|
||||
impl SMLOEW {
|
||||
#[allow(missing_docs)]
|
||||
|
@ -67,8 +67,10 @@ impl MLOFFR {
|
||||
#[doc = "Possible values of the field `DMLOE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum DMLOER {
|
||||
#[doc = "The minor loop offset is not applied to the DADDR"] _0,
|
||||
#[doc = "The minor loop offset is applied to the DADDR"] _1,
|
||||
#[doc = "The minor loop offset is not applied to the DADDR"]
|
||||
_0,
|
||||
#[doc = "The minor loop offset is applied to the DADDR"]
|
||||
_1,
|
||||
}
|
||||
impl DMLOER {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -112,8 +114,10 @@ impl DMLOER {
|
||||
#[doc = "Possible values of the field `SMLOE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SMLOER {
|
||||
#[doc = "The minor loop offset is not applied to the SADDR"] _0,
|
||||
#[doc = "The minor loop offset is applied to the SADDR"] _1,
|
||||
#[doc = "The minor loop offset is not applied to the SADDR"]
|
||||
_0,
|
||||
#[doc = "The minor loop offset is applied to the SADDR"]
|
||||
_1,
|
||||
}
|
||||
impl SMLOER {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -186,8 +190,10 @@ impl<'a> _MLOFFW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `DMLOE`"]
|
||||
pub enum DMLOEW {
|
||||
#[doc = "The minor loop offset is not applied to the DADDR"] _0,
|
||||
#[doc = "The minor loop offset is applied to the DADDR"] _1,
|
||||
#[doc = "The minor loop offset is not applied to the DADDR"]
|
||||
_0,
|
||||
#[doc = "The minor loop offset is applied to the DADDR"]
|
||||
_1,
|
||||
}
|
||||
impl DMLOEW {
|
||||
#[allow(missing_docs)]
|
||||
@ -242,8 +248,10 @@ impl<'a> _DMLOEW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `SMLOE`"]
|
||||
pub enum SMLOEW {
|
||||
#[doc = "The minor loop offset is not applied to the SADDR"] _0,
|
||||
#[doc = "The minor loop offset is applied to the SADDR"] _1,
|
||||
#[doc = "The minor loop offset is not applied to the SADDR"]
|
||||
_0,
|
||||
#[doc = "The minor loop offset is applied to the SADDR"]
|
||||
_1,
|
||||
}
|
||||
impl SMLOEW {
|
||||
#[allow(missing_docs)]
|
||||
|
@ -67,10 +67,14 @@ impl DMODR {
|
||||
#[doc = "Possible values of the field `SSIZE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SSIZER {
|
||||
#[doc = "8-bit"] _0,
|
||||
#[doc = "16-bit"] _1,
|
||||
#[doc = "32-bit"] _10,
|
||||
#[doc = r" Reserved"] _Reserved(u8),
|
||||
#[doc = "8-bit"]
|
||||
_0,
|
||||
#[doc = "16-bit"]
|
||||
_1,
|
||||
#[doc = "32-bit"]
|
||||
_10,
|
||||
#[doc = r" Reserved"]
|
||||
_Reserved(u8),
|
||||
}
|
||||
impl SSIZER {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
@ -113,8 +117,10 @@ impl SSIZER {
|
||||
#[doc = "Possible values of the field `SMOD`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SMODR {
|
||||
#[doc = "Source address modulo feature is disabled"] _0,
|
||||
#[doc = r" Reserved"] _Reserved(u8),
|
||||
#[doc = "Source address modulo feature is disabled"]
|
||||
_0,
|
||||
#[doc = r" Reserved"]
|
||||
_Reserved(u8),
|
||||
}
|
||||
impl SMODR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
@ -172,9 +178,12 @@ impl<'a> _DMODW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `SSIZE`"]
|
||||
pub enum SSIZEW {
|
||||
#[doc = "8-bit"] _0,
|
||||
#[doc = "16-bit"] _1,
|
||||
#[doc = "32-bit"] _10,
|
||||
#[doc = "8-bit"]
|
||||
_0,
|
||||
#[doc = "16-bit"]
|
||||
_1,
|
||||
#[doc = "32-bit"]
|
||||
_10,
|
||||
}
|
||||
impl SSIZEW {
|
||||
#[allow(missing_docs)]
|
||||
@ -225,7 +234,8 @@ impl<'a> _SSIZEW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `SMOD`"]
|
||||
pub enum SMODW {
|
||||
#[doc = "Source address modulo feature is disabled"] _0,
|
||||
#[doc = "Source address modulo feature is disabled"]
|
||||
_0,
|
||||
}
|
||||
impl SMODW {
|
||||
#[allow(missing_docs)]
|
||||
|
@ -56,8 +56,10 @@ impl BITERR {
|
||||
#[doc = "Possible values of the field `ELINK`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ELINKR {
|
||||
#[doc = "The channel-to-channel linking is disabled"] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled"] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled"]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ELINKR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -115,8 +117,10 @@ impl<'a> _BITERW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `ELINK`"]
|
||||
pub enum ELINKW {
|
||||
#[doc = "The channel-to-channel linking is disabled"] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled"] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled"]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ELINKW {
|
||||
#[allow(missing_docs)]
|
||||
|
@ -67,8 +67,10 @@ impl LINKCHR {
|
||||
#[doc = "Possible values of the field `ELINK`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ELINKR {
|
||||
#[doc = "The channel-to-channel linking is disabled"] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled"] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled"]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ELINKR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -141,8 +143,10 @@ impl<'a> _LINKCHW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `ELINK`"]
|
||||
pub enum ELINKW {
|
||||
#[doc = "The channel-to-channel linking is disabled"] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled"] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled"]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ELINKW {
|
||||
#[allow(missing_docs)]
|
||||
|
@ -56,8 +56,10 @@ impl CITERR {
|
||||
#[doc = "Possible values of the field `ELINK`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ELINKR {
|
||||
#[doc = "The channel-to-channel linking is disabled"] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled"] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled"]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ELINKR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -115,8 +117,10 @@ impl<'a> _CITERW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `ELINK`"]
|
||||
pub enum ELINKW {
|
||||
#[doc = "The channel-to-channel linking is disabled"] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled"] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled"]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ELINKW {
|
||||
#[allow(missing_docs)]
|
||||
|
@ -67,8 +67,10 @@ impl LINKCHR {
|
||||
#[doc = "Possible values of the field `ELINK`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ELINKR {
|
||||
#[doc = "The channel-to-channel linking is disabled"] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled"] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled"]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ELINKR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -141,8 +143,10 @@ impl<'a> _LINKCHW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `ELINK`"]
|
||||
pub enum ELINKW {
|
||||
#[doc = "The channel-to-channel linking is disabled"] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled"] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled"]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ELINKW {
|
||||
#[allow(missing_docs)]
|
||||
|
@ -45,8 +45,10 @@ impl super::TCD11_CSR {
|
||||
#[doc = "Possible values of the field `START`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum STARTR {
|
||||
#[doc = "The channel is not explicitly started."] _0,
|
||||
#[doc = "The channel is explicitly started via a software initiated service request."] _1,
|
||||
#[doc = "The channel is not explicitly started."]
|
||||
_0,
|
||||
#[doc = "The channel is explicitly started via a software initiated service request."]
|
||||
_1,
|
||||
}
|
||||
impl STARTR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -90,8 +92,10 @@ impl STARTR {
|
||||
#[doc = "Possible values of the field `INTMAJOR`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum INTMAJORR {
|
||||
#[doc = "The end-of-major loop interrupt is disabled."] _0,
|
||||
#[doc = "The end-of-major loop interrupt is enabled."] _1,
|
||||
#[doc = "The end-of-major loop interrupt is disabled."]
|
||||
_0,
|
||||
#[doc = "The end-of-major loop interrupt is enabled."]
|
||||
_1,
|
||||
}
|
||||
impl INTMAJORR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -135,8 +139,10 @@ impl INTMAJORR {
|
||||
#[doc = "Possible values of the field `INTHALF`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum INTHALFR {
|
||||
#[doc = "The half-point interrupt is disabled."] _0,
|
||||
#[doc = "The half-point interrupt is enabled."] _1,
|
||||
#[doc = "The half-point interrupt is disabled."]
|
||||
_0,
|
||||
#[doc = "The half-point interrupt is enabled."]
|
||||
_1,
|
||||
}
|
||||
impl INTHALFR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -201,7 +207,8 @@ impl DREQR {
|
||||
#[doc = "Possible values of the field `ESG`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ESGR {
|
||||
#[doc = "The current channel's TCD is normal format."] _0,
|
||||
#[doc = "The current channel's TCD is normal format."]
|
||||
_0,
|
||||
#[doc = "The current channel's TCD specifies a scatter gather format. The DLASTSGA field provides a memory pointer to the next TCD to be loaded into this channel after the major loop completes its execution."]
|
||||
_1,
|
||||
}
|
||||
@ -247,8 +254,10 @@ impl ESGR {
|
||||
#[doc = "Possible values of the field `MAJORELINK`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum MAJORELINKR {
|
||||
#[doc = "The channel-to-channel linking is disabled."] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled."] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled."]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled."]
|
||||
_1,
|
||||
}
|
||||
impl MAJORELINKR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -345,10 +354,14 @@ impl MAJORLINKCHR {
|
||||
#[doc = "Possible values of the field `BWC`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum BWCR {
|
||||
#[doc = "No eDMA engine stalls."] _0,
|
||||
#[doc = "eDMA engine stalls for 4 cycles after each R/W."] _10,
|
||||
#[doc = "eDMA engine stalls for 8 cycles after each R/W."] _11,
|
||||
#[doc = r" Reserved"] _Reserved(u8),
|
||||
#[doc = "No eDMA engine stalls."]
|
||||
_0,
|
||||
#[doc = "eDMA engine stalls for 4 cycles after each R/W."]
|
||||
_10,
|
||||
#[doc = "eDMA engine stalls for 8 cycles after each R/W."]
|
||||
_11,
|
||||
#[doc = r" Reserved"]
|
||||
_Reserved(u8),
|
||||
}
|
||||
impl BWCR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
@ -390,8 +403,10 @@ impl BWCR {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `START`"]
|
||||
pub enum STARTW {
|
||||
#[doc = "The channel is not explicitly started."] _0,
|
||||
#[doc = "The channel is explicitly started via a software initiated service request."] _1,
|
||||
#[doc = "The channel is not explicitly started."]
|
||||
_0,
|
||||
#[doc = "The channel is explicitly started via a software initiated service request."]
|
||||
_1,
|
||||
}
|
||||
impl STARTW {
|
||||
#[allow(missing_docs)]
|
||||
@ -446,8 +461,10 @@ impl<'a> _STARTW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `INTMAJOR`"]
|
||||
pub enum INTMAJORW {
|
||||
#[doc = "The end-of-major loop interrupt is disabled."] _0,
|
||||
#[doc = "The end-of-major loop interrupt is enabled."] _1,
|
||||
#[doc = "The end-of-major loop interrupt is disabled."]
|
||||
_0,
|
||||
#[doc = "The end-of-major loop interrupt is enabled."]
|
||||
_1,
|
||||
}
|
||||
impl INTMAJORW {
|
||||
#[allow(missing_docs)]
|
||||
@ -502,8 +519,10 @@ impl<'a> _INTMAJORW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `INTHALF`"]
|
||||
pub enum INTHALFW {
|
||||
#[doc = "The half-point interrupt is disabled."] _0,
|
||||
#[doc = "The half-point interrupt is enabled."] _1,
|
||||
#[doc = "The half-point interrupt is disabled."]
|
||||
_0,
|
||||
#[doc = "The half-point interrupt is enabled."]
|
||||
_1,
|
||||
}
|
||||
impl INTHALFW {
|
||||
#[allow(missing_docs)]
|
||||
@ -581,7 +600,8 @@ impl<'a> _DREQW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `ESG`"]
|
||||
pub enum ESGW {
|
||||
#[doc = "The current channel's TCD is normal format."] _0,
|
||||
#[doc = "The current channel's TCD is normal format."]
|
||||
_0,
|
||||
#[doc = "The current channel's TCD specifies a scatter gather format. The DLASTSGA field provides a memory pointer to the next TCD to be loaded into this channel after the major loop completes its execution."]
|
||||
_1,
|
||||
}
|
||||
@ -638,8 +658,10 @@ impl<'a> _ESGW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `MAJORELINK`"]
|
||||
pub enum MAJORELINKW {
|
||||
#[doc = "The channel-to-channel linking is disabled."] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled."] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled."]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled."]
|
||||
_1,
|
||||
}
|
||||
impl MAJORELINKW {
|
||||
#[allow(missing_docs)]
|
||||
@ -755,9 +777,12 @@ impl<'a> _MAJORLINKCHW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `BWC`"]
|
||||
pub enum BWCW {
|
||||
#[doc = "No eDMA engine stalls."] _0,
|
||||
#[doc = "eDMA engine stalls for 4 cycles after each R/W."] _10,
|
||||
#[doc = "eDMA engine stalls for 8 cycles after each R/W."] _11,
|
||||
#[doc = "No eDMA engine stalls."]
|
||||
_0,
|
||||
#[doc = "eDMA engine stalls for 4 cycles after each R/W."]
|
||||
_10,
|
||||
#[doc = "eDMA engine stalls for 8 cycles after each R/W."]
|
||||
_11,
|
||||
}
|
||||
impl BWCW {
|
||||
#[allow(missing_docs)]
|
||||
|
@ -56,8 +56,10 @@ impl NBYTESR {
|
||||
#[doc = "Possible values of the field `DMLOE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum DMLOER {
|
||||
#[doc = "The minor loop offset is not applied to the DADDR"] _0,
|
||||
#[doc = "The minor loop offset is applied to the DADDR"] _1,
|
||||
#[doc = "The minor loop offset is not applied to the DADDR"]
|
||||
_0,
|
||||
#[doc = "The minor loop offset is applied to the DADDR"]
|
||||
_1,
|
||||
}
|
||||
impl DMLOER {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -101,8 +103,10 @@ impl DMLOER {
|
||||
#[doc = "Possible values of the field `SMLOE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SMLOER {
|
||||
#[doc = "The minor loop offset is not applied to the SADDR"] _0,
|
||||
#[doc = "The minor loop offset is applied to the SADDR"] _1,
|
||||
#[doc = "The minor loop offset is not applied to the SADDR"]
|
||||
_0,
|
||||
#[doc = "The minor loop offset is applied to the SADDR"]
|
||||
_1,
|
||||
}
|
||||
impl SMLOER {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -160,8 +164,10 @@ impl<'a> _NBYTESW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `DMLOE`"]
|
||||
pub enum DMLOEW {
|
||||
#[doc = "The minor loop offset is not applied to the DADDR"] _0,
|
||||
#[doc = "The minor loop offset is applied to the DADDR"] _1,
|
||||
#[doc = "The minor loop offset is not applied to the DADDR"]
|
||||
_0,
|
||||
#[doc = "The minor loop offset is applied to the DADDR"]
|
||||
_1,
|
||||
}
|
||||
impl DMLOEW {
|
||||
#[allow(missing_docs)]
|
||||
@ -216,8 +222,10 @@ impl<'a> _DMLOEW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `SMLOE`"]
|
||||
pub enum SMLOEW {
|
||||
#[doc = "The minor loop offset is not applied to the SADDR"] _0,
|
||||
#[doc = "The minor loop offset is applied to the SADDR"] _1,
|
||||
#[doc = "The minor loop offset is not applied to the SADDR"]
|
||||
_0,
|
||||
#[doc = "The minor loop offset is applied to the SADDR"]
|
||||
_1,
|
||||
}
|
||||
impl SMLOEW {
|
||||
#[allow(missing_docs)]
|
||||
|
@ -67,8 +67,10 @@ impl MLOFFR {
|
||||
#[doc = "Possible values of the field `DMLOE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum DMLOER {
|
||||
#[doc = "The minor loop offset is not applied to the DADDR"] _0,
|
||||
#[doc = "The minor loop offset is applied to the DADDR"] _1,
|
||||
#[doc = "The minor loop offset is not applied to the DADDR"]
|
||||
_0,
|
||||
#[doc = "The minor loop offset is applied to the DADDR"]
|
||||
_1,
|
||||
}
|
||||
impl DMLOER {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -112,8 +114,10 @@ impl DMLOER {
|
||||
#[doc = "Possible values of the field `SMLOE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SMLOER {
|
||||
#[doc = "The minor loop offset is not applied to the SADDR"] _0,
|
||||
#[doc = "The minor loop offset is applied to the SADDR"] _1,
|
||||
#[doc = "The minor loop offset is not applied to the SADDR"]
|
||||
_0,
|
||||
#[doc = "The minor loop offset is applied to the SADDR"]
|
||||
_1,
|
||||
}
|
||||
impl SMLOER {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -186,8 +190,10 @@ impl<'a> _MLOFFW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `DMLOE`"]
|
||||
pub enum DMLOEW {
|
||||
#[doc = "The minor loop offset is not applied to the DADDR"] _0,
|
||||
#[doc = "The minor loop offset is applied to the DADDR"] _1,
|
||||
#[doc = "The minor loop offset is not applied to the DADDR"]
|
||||
_0,
|
||||
#[doc = "The minor loop offset is applied to the DADDR"]
|
||||
_1,
|
||||
}
|
||||
impl DMLOEW {
|
||||
#[allow(missing_docs)]
|
||||
@ -242,8 +248,10 @@ impl<'a> _DMLOEW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `SMLOE`"]
|
||||
pub enum SMLOEW {
|
||||
#[doc = "The minor loop offset is not applied to the SADDR"] _0,
|
||||
#[doc = "The minor loop offset is applied to the SADDR"] _1,
|
||||
#[doc = "The minor loop offset is not applied to the SADDR"]
|
||||
_0,
|
||||
#[doc = "The minor loop offset is applied to the SADDR"]
|
||||
_1,
|
||||
}
|
||||
impl SMLOEW {
|
||||
#[allow(missing_docs)]
|
||||
|
@ -67,10 +67,14 @@ impl DMODR {
|
||||
#[doc = "Possible values of the field `SSIZE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SSIZER {
|
||||
#[doc = "8-bit"] _0,
|
||||
#[doc = "16-bit"] _1,
|
||||
#[doc = "32-bit"] _10,
|
||||
#[doc = r" Reserved"] _Reserved(u8),
|
||||
#[doc = "8-bit"]
|
||||
_0,
|
||||
#[doc = "16-bit"]
|
||||
_1,
|
||||
#[doc = "32-bit"]
|
||||
_10,
|
||||
#[doc = r" Reserved"]
|
||||
_Reserved(u8),
|
||||
}
|
||||
impl SSIZER {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
@ -113,8 +117,10 @@ impl SSIZER {
|
||||
#[doc = "Possible values of the field `SMOD`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SMODR {
|
||||
#[doc = "Source address modulo feature is disabled"] _0,
|
||||
#[doc = r" Reserved"] _Reserved(u8),
|
||||
#[doc = "Source address modulo feature is disabled"]
|
||||
_0,
|
||||
#[doc = r" Reserved"]
|
||||
_Reserved(u8),
|
||||
}
|
||||
impl SMODR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
@ -172,9 +178,12 @@ impl<'a> _DMODW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `SSIZE`"]
|
||||
pub enum SSIZEW {
|
||||
#[doc = "8-bit"] _0,
|
||||
#[doc = "16-bit"] _1,
|
||||
#[doc = "32-bit"] _10,
|
||||
#[doc = "8-bit"]
|
||||
_0,
|
||||
#[doc = "16-bit"]
|
||||
_1,
|
||||
#[doc = "32-bit"]
|
||||
_10,
|
||||
}
|
||||
impl SSIZEW {
|
||||
#[allow(missing_docs)]
|
||||
@ -225,7 +234,8 @@ impl<'a> _SSIZEW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `SMOD`"]
|
||||
pub enum SMODW {
|
||||
#[doc = "Source address modulo feature is disabled"] _0,
|
||||
#[doc = "Source address modulo feature is disabled"]
|
||||
_0,
|
||||
}
|
||||
impl SMODW {
|
||||
#[allow(missing_docs)]
|
||||
|
@ -56,8 +56,10 @@ impl BITERR {
|
||||
#[doc = "Possible values of the field `ELINK`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ELINKR {
|
||||
#[doc = "The channel-to-channel linking is disabled"] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled"] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled"]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ELINKR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -115,8 +117,10 @@ impl<'a> _BITERW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `ELINK`"]
|
||||
pub enum ELINKW {
|
||||
#[doc = "The channel-to-channel linking is disabled"] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled"] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled"]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ELINKW {
|
||||
#[allow(missing_docs)]
|
||||
|
@ -67,8 +67,10 @@ impl LINKCHR {
|
||||
#[doc = "Possible values of the field `ELINK`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ELINKR {
|
||||
#[doc = "The channel-to-channel linking is disabled"] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled"] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled"]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ELINKR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -141,8 +143,10 @@ impl<'a> _LINKCHW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `ELINK`"]
|
||||
pub enum ELINKW {
|
||||
#[doc = "The channel-to-channel linking is disabled"] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled"] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled"]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ELINKW {
|
||||
#[allow(missing_docs)]
|
||||
|
@ -56,8 +56,10 @@ impl CITERR {
|
||||
#[doc = "Possible values of the field `ELINK`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ELINKR {
|
||||
#[doc = "The channel-to-channel linking is disabled"] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled"] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled"]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ELINKR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -115,8 +117,10 @@ impl<'a> _CITERW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `ELINK`"]
|
||||
pub enum ELINKW {
|
||||
#[doc = "The channel-to-channel linking is disabled"] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled"] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled"]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ELINKW {
|
||||
#[allow(missing_docs)]
|
||||
|
@ -67,8 +67,10 @@ impl LINKCHR {
|
||||
#[doc = "Possible values of the field `ELINK`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ELINKR {
|
||||
#[doc = "The channel-to-channel linking is disabled"] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled"] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled"]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ELINKR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -141,8 +143,10 @@ impl<'a> _LINKCHW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `ELINK`"]
|
||||
pub enum ELINKW {
|
||||
#[doc = "The channel-to-channel linking is disabled"] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled"] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled"]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ELINKW {
|
||||
#[allow(missing_docs)]
|
||||
|
@ -45,8 +45,10 @@ impl super::TCD12_CSR {
|
||||
#[doc = "Possible values of the field `START`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum STARTR {
|
||||
#[doc = "The channel is not explicitly started."] _0,
|
||||
#[doc = "The channel is explicitly started via a software initiated service request."] _1,
|
||||
#[doc = "The channel is not explicitly started."]
|
||||
_0,
|
||||
#[doc = "The channel is explicitly started via a software initiated service request."]
|
||||
_1,
|
||||
}
|
||||
impl STARTR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -90,8 +92,10 @@ impl STARTR {
|
||||
#[doc = "Possible values of the field `INTMAJOR`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum INTMAJORR {
|
||||
#[doc = "The end-of-major loop interrupt is disabled."] _0,
|
||||
#[doc = "The end-of-major loop interrupt is enabled."] _1,
|
||||
#[doc = "The end-of-major loop interrupt is disabled."]
|
||||
_0,
|
||||
#[doc = "The end-of-major loop interrupt is enabled."]
|
||||
_1,
|
||||
}
|
||||
impl INTMAJORR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -135,8 +139,10 @@ impl INTMAJORR {
|
||||
#[doc = "Possible values of the field `INTHALF`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum INTHALFR {
|
||||
#[doc = "The half-point interrupt is disabled."] _0,
|
||||
#[doc = "The half-point interrupt is enabled."] _1,
|
||||
#[doc = "The half-point interrupt is disabled."]
|
||||
_0,
|
||||
#[doc = "The half-point interrupt is enabled."]
|
||||
_1,
|
||||
}
|
||||
impl INTHALFR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -201,7 +207,8 @@ impl DREQR {
|
||||
#[doc = "Possible values of the field `ESG`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ESGR {
|
||||
#[doc = "The current channel's TCD is normal format."] _0,
|
||||
#[doc = "The current channel's TCD is normal format."]
|
||||
_0,
|
||||
#[doc = "The current channel's TCD specifies a scatter gather format. The DLASTSGA field provides a memory pointer to the next TCD to be loaded into this channel after the major loop completes its execution."]
|
||||
_1,
|
||||
}
|
||||
@ -247,8 +254,10 @@ impl ESGR {
|
||||
#[doc = "Possible values of the field `MAJORELINK`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum MAJORELINKR {
|
||||
#[doc = "The channel-to-channel linking is disabled."] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled."] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled."]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled."]
|
||||
_1,
|
||||
}
|
||||
impl MAJORELINKR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -345,10 +354,14 @@ impl MAJORLINKCHR {
|
||||
#[doc = "Possible values of the field `BWC`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum BWCR {
|
||||
#[doc = "No eDMA engine stalls."] _0,
|
||||
#[doc = "eDMA engine stalls for 4 cycles after each R/W."] _10,
|
||||
#[doc = "eDMA engine stalls for 8 cycles after each R/W."] _11,
|
||||
#[doc = r" Reserved"] _Reserved(u8),
|
||||
#[doc = "No eDMA engine stalls."]
|
||||
_0,
|
||||
#[doc = "eDMA engine stalls for 4 cycles after each R/W."]
|
||||
_10,
|
||||
#[doc = "eDMA engine stalls for 8 cycles after each R/W."]
|
||||
_11,
|
||||
#[doc = r" Reserved"]
|
||||
_Reserved(u8),
|
||||
}
|
||||
impl BWCR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
@ -390,8 +403,10 @@ impl BWCR {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `START`"]
|
||||
pub enum STARTW {
|
||||
#[doc = "The channel is not explicitly started."] _0,
|
||||
#[doc = "The channel is explicitly started via a software initiated service request."] _1,
|
||||
#[doc = "The channel is not explicitly started."]
|
||||
_0,
|
||||
#[doc = "The channel is explicitly started via a software initiated service request."]
|
||||
_1,
|
||||
}
|
||||
impl STARTW {
|
||||
#[allow(missing_docs)]
|
||||
@ -446,8 +461,10 @@ impl<'a> _STARTW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `INTMAJOR`"]
|
||||
pub enum INTMAJORW {
|
||||
#[doc = "The end-of-major loop interrupt is disabled."] _0,
|
||||
#[doc = "The end-of-major loop interrupt is enabled."] _1,
|
||||
#[doc = "The end-of-major loop interrupt is disabled."]
|
||||
_0,
|
||||
#[doc = "The end-of-major loop interrupt is enabled."]
|
||||
_1,
|
||||
}
|
||||
impl INTMAJORW {
|
||||
#[allow(missing_docs)]
|
||||
@ -502,8 +519,10 @@ impl<'a> _INTMAJORW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `INTHALF`"]
|
||||
pub enum INTHALFW {
|
||||
#[doc = "The half-point interrupt is disabled."] _0,
|
||||
#[doc = "The half-point interrupt is enabled."] _1,
|
||||
#[doc = "The half-point interrupt is disabled."]
|
||||
_0,
|
||||
#[doc = "The half-point interrupt is enabled."]
|
||||
_1,
|
||||
}
|
||||
impl INTHALFW {
|
||||
#[allow(missing_docs)]
|
||||
@ -581,7 +600,8 @@ impl<'a> _DREQW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `ESG`"]
|
||||
pub enum ESGW {
|
||||
#[doc = "The current channel's TCD is normal format."] _0,
|
||||
#[doc = "The current channel's TCD is normal format."]
|
||||
_0,
|
||||
#[doc = "The current channel's TCD specifies a scatter gather format. The DLASTSGA field provides a memory pointer to the next TCD to be loaded into this channel after the major loop completes its execution."]
|
||||
_1,
|
||||
}
|
||||
@ -638,8 +658,10 @@ impl<'a> _ESGW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `MAJORELINK`"]
|
||||
pub enum MAJORELINKW {
|
||||
#[doc = "The channel-to-channel linking is disabled."] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled."] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled."]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled."]
|
||||
_1,
|
||||
}
|
||||
impl MAJORELINKW {
|
||||
#[allow(missing_docs)]
|
||||
@ -755,9 +777,12 @@ impl<'a> _MAJORLINKCHW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `BWC`"]
|
||||
pub enum BWCW {
|
||||
#[doc = "No eDMA engine stalls."] _0,
|
||||
#[doc = "eDMA engine stalls for 4 cycles after each R/W."] _10,
|
||||
#[doc = "eDMA engine stalls for 8 cycles after each R/W."] _11,
|
||||
#[doc = "No eDMA engine stalls."]
|
||||
_0,
|
||||
#[doc = "eDMA engine stalls for 4 cycles after each R/W."]
|
||||
_10,
|
||||
#[doc = "eDMA engine stalls for 8 cycles after each R/W."]
|
||||
_11,
|
||||
}
|
||||
impl BWCW {
|
||||
#[allow(missing_docs)]
|
||||
|
@ -56,8 +56,10 @@ impl NBYTESR {
|
||||
#[doc = "Possible values of the field `DMLOE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum DMLOER {
|
||||
#[doc = "The minor loop offset is not applied to the DADDR"] _0,
|
||||
#[doc = "The minor loop offset is applied to the DADDR"] _1,
|
||||
#[doc = "The minor loop offset is not applied to the DADDR"]
|
||||
_0,
|
||||
#[doc = "The minor loop offset is applied to the DADDR"]
|
||||
_1,
|
||||
}
|
||||
impl DMLOER {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -101,8 +103,10 @@ impl DMLOER {
|
||||
#[doc = "Possible values of the field `SMLOE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SMLOER {
|
||||
#[doc = "The minor loop offset is not applied to the SADDR"] _0,
|
||||
#[doc = "The minor loop offset is applied to the SADDR"] _1,
|
||||
#[doc = "The minor loop offset is not applied to the SADDR"]
|
||||
_0,
|
||||
#[doc = "The minor loop offset is applied to the SADDR"]
|
||||
_1,
|
||||
}
|
||||
impl SMLOER {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -160,8 +164,10 @@ impl<'a> _NBYTESW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `DMLOE`"]
|
||||
pub enum DMLOEW {
|
||||
#[doc = "The minor loop offset is not applied to the DADDR"] _0,
|
||||
#[doc = "The minor loop offset is applied to the DADDR"] _1,
|
||||
#[doc = "The minor loop offset is not applied to the DADDR"]
|
||||
_0,
|
||||
#[doc = "The minor loop offset is applied to the DADDR"]
|
||||
_1,
|
||||
}
|
||||
impl DMLOEW {
|
||||
#[allow(missing_docs)]
|
||||
@ -216,8 +222,10 @@ impl<'a> _DMLOEW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `SMLOE`"]
|
||||
pub enum SMLOEW {
|
||||
#[doc = "The minor loop offset is not applied to the SADDR"] _0,
|
||||
#[doc = "The minor loop offset is applied to the SADDR"] _1,
|
||||
#[doc = "The minor loop offset is not applied to the SADDR"]
|
||||
_0,
|
||||
#[doc = "The minor loop offset is applied to the SADDR"]
|
||||
_1,
|
||||
}
|
||||
impl SMLOEW {
|
||||
#[allow(missing_docs)]
|
||||
|
@ -67,8 +67,10 @@ impl MLOFFR {
|
||||
#[doc = "Possible values of the field `DMLOE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum DMLOER {
|
||||
#[doc = "The minor loop offset is not applied to the DADDR"] _0,
|
||||
#[doc = "The minor loop offset is applied to the DADDR"] _1,
|
||||
#[doc = "The minor loop offset is not applied to the DADDR"]
|
||||
_0,
|
||||
#[doc = "The minor loop offset is applied to the DADDR"]
|
||||
_1,
|
||||
}
|
||||
impl DMLOER {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -112,8 +114,10 @@ impl DMLOER {
|
||||
#[doc = "Possible values of the field `SMLOE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SMLOER {
|
||||
#[doc = "The minor loop offset is not applied to the SADDR"] _0,
|
||||
#[doc = "The minor loop offset is applied to the SADDR"] _1,
|
||||
#[doc = "The minor loop offset is not applied to the SADDR"]
|
||||
_0,
|
||||
#[doc = "The minor loop offset is applied to the SADDR"]
|
||||
_1,
|
||||
}
|
||||
impl SMLOER {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -186,8 +190,10 @@ impl<'a> _MLOFFW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `DMLOE`"]
|
||||
pub enum DMLOEW {
|
||||
#[doc = "The minor loop offset is not applied to the DADDR"] _0,
|
||||
#[doc = "The minor loop offset is applied to the DADDR"] _1,
|
||||
#[doc = "The minor loop offset is not applied to the DADDR"]
|
||||
_0,
|
||||
#[doc = "The minor loop offset is applied to the DADDR"]
|
||||
_1,
|
||||
}
|
||||
impl DMLOEW {
|
||||
#[allow(missing_docs)]
|
||||
@ -242,8 +248,10 @@ impl<'a> _DMLOEW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `SMLOE`"]
|
||||
pub enum SMLOEW {
|
||||
#[doc = "The minor loop offset is not applied to the SADDR"] _0,
|
||||
#[doc = "The minor loop offset is applied to the SADDR"] _1,
|
||||
#[doc = "The minor loop offset is not applied to the SADDR"]
|
||||
_0,
|
||||
#[doc = "The minor loop offset is applied to the SADDR"]
|
||||
_1,
|
||||
}
|
||||
impl SMLOEW {
|
||||
#[allow(missing_docs)]
|
||||
|
@ -67,10 +67,14 @@ impl DMODR {
|
||||
#[doc = "Possible values of the field `SSIZE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SSIZER {
|
||||
#[doc = "8-bit"] _0,
|
||||
#[doc = "16-bit"] _1,
|
||||
#[doc = "32-bit"] _10,
|
||||
#[doc = r" Reserved"] _Reserved(u8),
|
||||
#[doc = "8-bit"]
|
||||
_0,
|
||||
#[doc = "16-bit"]
|
||||
_1,
|
||||
#[doc = "32-bit"]
|
||||
_10,
|
||||
#[doc = r" Reserved"]
|
||||
_Reserved(u8),
|
||||
}
|
||||
impl SSIZER {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
@ -113,8 +117,10 @@ impl SSIZER {
|
||||
#[doc = "Possible values of the field `SMOD`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SMODR {
|
||||
#[doc = "Source address modulo feature is disabled"] _0,
|
||||
#[doc = r" Reserved"] _Reserved(u8),
|
||||
#[doc = "Source address modulo feature is disabled"]
|
||||
_0,
|
||||
#[doc = r" Reserved"]
|
||||
_Reserved(u8),
|
||||
}
|
||||
impl SMODR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
@ -172,9 +178,12 @@ impl<'a> _DMODW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `SSIZE`"]
|
||||
pub enum SSIZEW {
|
||||
#[doc = "8-bit"] _0,
|
||||
#[doc = "16-bit"] _1,
|
||||
#[doc = "32-bit"] _10,
|
||||
#[doc = "8-bit"]
|
||||
_0,
|
||||
#[doc = "16-bit"]
|
||||
_1,
|
||||
#[doc = "32-bit"]
|
||||
_10,
|
||||
}
|
||||
impl SSIZEW {
|
||||
#[allow(missing_docs)]
|
||||
@ -225,7 +234,8 @@ impl<'a> _SSIZEW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `SMOD`"]
|
||||
pub enum SMODW {
|
||||
#[doc = "Source address modulo feature is disabled"] _0,
|
||||
#[doc = "Source address modulo feature is disabled"]
|
||||
_0,
|
||||
}
|
||||
impl SMODW {
|
||||
#[allow(missing_docs)]
|
||||
|
@ -56,8 +56,10 @@ impl BITERR {
|
||||
#[doc = "Possible values of the field `ELINK`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ELINKR {
|
||||
#[doc = "The channel-to-channel linking is disabled"] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled"] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled"]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ELINKR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -115,8 +117,10 @@ impl<'a> _BITERW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `ELINK`"]
|
||||
pub enum ELINKW {
|
||||
#[doc = "The channel-to-channel linking is disabled"] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled"] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled"]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ELINKW {
|
||||
#[allow(missing_docs)]
|
||||
|
@ -67,8 +67,10 @@ impl LINKCHR {
|
||||
#[doc = "Possible values of the field `ELINK`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ELINKR {
|
||||
#[doc = "The channel-to-channel linking is disabled"] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled"] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled"]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ELINKR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -141,8 +143,10 @@ impl<'a> _LINKCHW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `ELINK`"]
|
||||
pub enum ELINKW {
|
||||
#[doc = "The channel-to-channel linking is disabled"] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled"] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled"]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ELINKW {
|
||||
#[allow(missing_docs)]
|
||||
|
@ -56,8 +56,10 @@ impl CITERR {
|
||||
#[doc = "Possible values of the field `ELINK`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ELINKR {
|
||||
#[doc = "The channel-to-channel linking is disabled"] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled"] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled"]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ELINKR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -115,8 +117,10 @@ impl<'a> _CITERW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `ELINK`"]
|
||||
pub enum ELINKW {
|
||||
#[doc = "The channel-to-channel linking is disabled"] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled"] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled"]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ELINKW {
|
||||
#[allow(missing_docs)]
|
||||
|
@ -67,8 +67,10 @@ impl LINKCHR {
|
||||
#[doc = "Possible values of the field `ELINK`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ELINKR {
|
||||
#[doc = "The channel-to-channel linking is disabled"] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled"] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled"]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ELINKR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -141,8 +143,10 @@ impl<'a> _LINKCHW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `ELINK`"]
|
||||
pub enum ELINKW {
|
||||
#[doc = "The channel-to-channel linking is disabled"] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled"] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled"]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ELINKW {
|
||||
#[allow(missing_docs)]
|
||||
|
@ -45,8 +45,10 @@ impl super::TCD13_CSR {
|
||||
#[doc = "Possible values of the field `START`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum STARTR {
|
||||
#[doc = "The channel is not explicitly started."] _0,
|
||||
#[doc = "The channel is explicitly started via a software initiated service request."] _1,
|
||||
#[doc = "The channel is not explicitly started."]
|
||||
_0,
|
||||
#[doc = "The channel is explicitly started via a software initiated service request."]
|
||||
_1,
|
||||
}
|
||||
impl STARTR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -90,8 +92,10 @@ impl STARTR {
|
||||
#[doc = "Possible values of the field `INTMAJOR`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum INTMAJORR {
|
||||
#[doc = "The end-of-major loop interrupt is disabled."] _0,
|
||||
#[doc = "The end-of-major loop interrupt is enabled."] _1,
|
||||
#[doc = "The end-of-major loop interrupt is disabled."]
|
||||
_0,
|
||||
#[doc = "The end-of-major loop interrupt is enabled."]
|
||||
_1,
|
||||
}
|
||||
impl INTMAJORR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -135,8 +139,10 @@ impl INTMAJORR {
|
||||
#[doc = "Possible values of the field `INTHALF`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum INTHALFR {
|
||||
#[doc = "The half-point interrupt is disabled."] _0,
|
||||
#[doc = "The half-point interrupt is enabled."] _1,
|
||||
#[doc = "The half-point interrupt is disabled."]
|
||||
_0,
|
||||
#[doc = "The half-point interrupt is enabled."]
|
||||
_1,
|
||||
}
|
||||
impl INTHALFR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -201,7 +207,8 @@ impl DREQR {
|
||||
#[doc = "Possible values of the field `ESG`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ESGR {
|
||||
#[doc = "The current channel's TCD is normal format."] _0,
|
||||
#[doc = "The current channel's TCD is normal format."]
|
||||
_0,
|
||||
#[doc = "The current channel's TCD specifies a scatter gather format. The DLASTSGA field provides a memory pointer to the next TCD to be loaded into this channel after the major loop completes its execution."]
|
||||
_1,
|
||||
}
|
||||
@ -247,8 +254,10 @@ impl ESGR {
|
||||
#[doc = "Possible values of the field `MAJORELINK`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum MAJORELINKR {
|
||||
#[doc = "The channel-to-channel linking is disabled."] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled."] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled."]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled."]
|
||||
_1,
|
||||
}
|
||||
impl MAJORELINKR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -345,10 +354,14 @@ impl MAJORLINKCHR {
|
||||
#[doc = "Possible values of the field `BWC`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum BWCR {
|
||||
#[doc = "No eDMA engine stalls."] _0,
|
||||
#[doc = "eDMA engine stalls for 4 cycles after each R/W."] _10,
|
||||
#[doc = "eDMA engine stalls for 8 cycles after each R/W."] _11,
|
||||
#[doc = r" Reserved"] _Reserved(u8),
|
||||
#[doc = "No eDMA engine stalls."]
|
||||
_0,
|
||||
#[doc = "eDMA engine stalls for 4 cycles after each R/W."]
|
||||
_10,
|
||||
#[doc = "eDMA engine stalls for 8 cycles after each R/W."]
|
||||
_11,
|
||||
#[doc = r" Reserved"]
|
||||
_Reserved(u8),
|
||||
}
|
||||
impl BWCR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
@ -390,8 +403,10 @@ impl BWCR {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `START`"]
|
||||
pub enum STARTW {
|
||||
#[doc = "The channel is not explicitly started."] _0,
|
||||
#[doc = "The channel is explicitly started via a software initiated service request."] _1,
|
||||
#[doc = "The channel is not explicitly started."]
|
||||
_0,
|
||||
#[doc = "The channel is explicitly started via a software initiated service request."]
|
||||
_1,
|
||||
}
|
||||
impl STARTW {
|
||||
#[allow(missing_docs)]
|
||||
@ -446,8 +461,10 @@ impl<'a> _STARTW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `INTMAJOR`"]
|
||||
pub enum INTMAJORW {
|
||||
#[doc = "The end-of-major loop interrupt is disabled."] _0,
|
||||
#[doc = "The end-of-major loop interrupt is enabled."] _1,
|
||||
#[doc = "The end-of-major loop interrupt is disabled."]
|
||||
_0,
|
||||
#[doc = "The end-of-major loop interrupt is enabled."]
|
||||
_1,
|
||||
}
|
||||
impl INTMAJORW {
|
||||
#[allow(missing_docs)]
|
||||
@ -502,8 +519,10 @@ impl<'a> _INTMAJORW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `INTHALF`"]
|
||||
pub enum INTHALFW {
|
||||
#[doc = "The half-point interrupt is disabled."] _0,
|
||||
#[doc = "The half-point interrupt is enabled."] _1,
|
||||
#[doc = "The half-point interrupt is disabled."]
|
||||
_0,
|
||||
#[doc = "The half-point interrupt is enabled."]
|
||||
_1,
|
||||
}
|
||||
impl INTHALFW {
|
||||
#[allow(missing_docs)]
|
||||
@ -581,7 +600,8 @@ impl<'a> _DREQW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `ESG`"]
|
||||
pub enum ESGW {
|
||||
#[doc = "The current channel's TCD is normal format."] _0,
|
||||
#[doc = "The current channel's TCD is normal format."]
|
||||
_0,
|
||||
#[doc = "The current channel's TCD specifies a scatter gather format. The DLASTSGA field provides a memory pointer to the next TCD to be loaded into this channel after the major loop completes its execution."]
|
||||
_1,
|
||||
}
|
||||
@ -638,8 +658,10 @@ impl<'a> _ESGW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `MAJORELINK`"]
|
||||
pub enum MAJORELINKW {
|
||||
#[doc = "The channel-to-channel linking is disabled."] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled."] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled."]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled."]
|
||||
_1,
|
||||
}
|
||||
impl MAJORELINKW {
|
||||
#[allow(missing_docs)]
|
||||
@ -755,9 +777,12 @@ impl<'a> _MAJORLINKCHW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `BWC`"]
|
||||
pub enum BWCW {
|
||||
#[doc = "No eDMA engine stalls."] _0,
|
||||
#[doc = "eDMA engine stalls for 4 cycles after each R/W."] _10,
|
||||
#[doc = "eDMA engine stalls for 8 cycles after each R/W."] _11,
|
||||
#[doc = "No eDMA engine stalls."]
|
||||
_0,
|
||||
#[doc = "eDMA engine stalls for 4 cycles after each R/W."]
|
||||
_10,
|
||||
#[doc = "eDMA engine stalls for 8 cycles after each R/W."]
|
||||
_11,
|
||||
}
|
||||
impl BWCW {
|
||||
#[allow(missing_docs)]
|
||||
|
@ -56,8 +56,10 @@ impl NBYTESR {
|
||||
#[doc = "Possible values of the field `DMLOE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum DMLOER {
|
||||
#[doc = "The minor loop offset is not applied to the DADDR"] _0,
|
||||
#[doc = "The minor loop offset is applied to the DADDR"] _1,
|
||||
#[doc = "The minor loop offset is not applied to the DADDR"]
|
||||
_0,
|
||||
#[doc = "The minor loop offset is applied to the DADDR"]
|
||||
_1,
|
||||
}
|
||||
impl DMLOER {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -101,8 +103,10 @@ impl DMLOER {
|
||||
#[doc = "Possible values of the field `SMLOE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SMLOER {
|
||||
#[doc = "The minor loop offset is not applied to the SADDR"] _0,
|
||||
#[doc = "The minor loop offset is applied to the SADDR"] _1,
|
||||
#[doc = "The minor loop offset is not applied to the SADDR"]
|
||||
_0,
|
||||
#[doc = "The minor loop offset is applied to the SADDR"]
|
||||
_1,
|
||||
}
|
||||
impl SMLOER {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -160,8 +164,10 @@ impl<'a> _NBYTESW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `DMLOE`"]
|
||||
pub enum DMLOEW {
|
||||
#[doc = "The minor loop offset is not applied to the DADDR"] _0,
|
||||
#[doc = "The minor loop offset is applied to the DADDR"] _1,
|
||||
#[doc = "The minor loop offset is not applied to the DADDR"]
|
||||
_0,
|
||||
#[doc = "The minor loop offset is applied to the DADDR"]
|
||||
_1,
|
||||
}
|
||||
impl DMLOEW {
|
||||
#[allow(missing_docs)]
|
||||
@ -216,8 +222,10 @@ impl<'a> _DMLOEW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `SMLOE`"]
|
||||
pub enum SMLOEW {
|
||||
#[doc = "The minor loop offset is not applied to the SADDR"] _0,
|
||||
#[doc = "The minor loop offset is applied to the SADDR"] _1,
|
||||
#[doc = "The minor loop offset is not applied to the SADDR"]
|
||||
_0,
|
||||
#[doc = "The minor loop offset is applied to the SADDR"]
|
||||
_1,
|
||||
}
|
||||
impl SMLOEW {
|
||||
#[allow(missing_docs)]
|
||||
|
@ -67,8 +67,10 @@ impl MLOFFR {
|
||||
#[doc = "Possible values of the field `DMLOE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum DMLOER {
|
||||
#[doc = "The minor loop offset is not applied to the DADDR"] _0,
|
||||
#[doc = "The minor loop offset is applied to the DADDR"] _1,
|
||||
#[doc = "The minor loop offset is not applied to the DADDR"]
|
||||
_0,
|
||||
#[doc = "The minor loop offset is applied to the DADDR"]
|
||||
_1,
|
||||
}
|
||||
impl DMLOER {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -112,8 +114,10 @@ impl DMLOER {
|
||||
#[doc = "Possible values of the field `SMLOE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SMLOER {
|
||||
#[doc = "The minor loop offset is not applied to the SADDR"] _0,
|
||||
#[doc = "The minor loop offset is applied to the SADDR"] _1,
|
||||
#[doc = "The minor loop offset is not applied to the SADDR"]
|
||||
_0,
|
||||
#[doc = "The minor loop offset is applied to the SADDR"]
|
||||
_1,
|
||||
}
|
||||
impl SMLOER {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -186,8 +190,10 @@ impl<'a> _MLOFFW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `DMLOE`"]
|
||||
pub enum DMLOEW {
|
||||
#[doc = "The minor loop offset is not applied to the DADDR"] _0,
|
||||
#[doc = "The minor loop offset is applied to the DADDR"] _1,
|
||||
#[doc = "The minor loop offset is not applied to the DADDR"]
|
||||
_0,
|
||||
#[doc = "The minor loop offset is applied to the DADDR"]
|
||||
_1,
|
||||
}
|
||||
impl DMLOEW {
|
||||
#[allow(missing_docs)]
|
||||
@ -242,8 +248,10 @@ impl<'a> _DMLOEW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `SMLOE`"]
|
||||
pub enum SMLOEW {
|
||||
#[doc = "The minor loop offset is not applied to the SADDR"] _0,
|
||||
#[doc = "The minor loop offset is applied to the SADDR"] _1,
|
||||
#[doc = "The minor loop offset is not applied to the SADDR"]
|
||||
_0,
|
||||
#[doc = "The minor loop offset is applied to the SADDR"]
|
||||
_1,
|
||||
}
|
||||
impl SMLOEW {
|
||||
#[allow(missing_docs)]
|
||||
|
@ -67,10 +67,14 @@ impl DMODR {
|
||||
#[doc = "Possible values of the field `SSIZE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SSIZER {
|
||||
#[doc = "8-bit"] _0,
|
||||
#[doc = "16-bit"] _1,
|
||||
#[doc = "32-bit"] _10,
|
||||
#[doc = r" Reserved"] _Reserved(u8),
|
||||
#[doc = "8-bit"]
|
||||
_0,
|
||||
#[doc = "16-bit"]
|
||||
_1,
|
||||
#[doc = "32-bit"]
|
||||
_10,
|
||||
#[doc = r" Reserved"]
|
||||
_Reserved(u8),
|
||||
}
|
||||
impl SSIZER {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
@ -113,8 +117,10 @@ impl SSIZER {
|
||||
#[doc = "Possible values of the field `SMOD`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SMODR {
|
||||
#[doc = "Source address modulo feature is disabled"] _0,
|
||||
#[doc = r" Reserved"] _Reserved(u8),
|
||||
#[doc = "Source address modulo feature is disabled"]
|
||||
_0,
|
||||
#[doc = r" Reserved"]
|
||||
_Reserved(u8),
|
||||
}
|
||||
impl SMODR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
@ -172,9 +178,12 @@ impl<'a> _DMODW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `SSIZE`"]
|
||||
pub enum SSIZEW {
|
||||
#[doc = "8-bit"] _0,
|
||||
#[doc = "16-bit"] _1,
|
||||
#[doc = "32-bit"] _10,
|
||||
#[doc = "8-bit"]
|
||||
_0,
|
||||
#[doc = "16-bit"]
|
||||
_1,
|
||||
#[doc = "32-bit"]
|
||||
_10,
|
||||
}
|
||||
impl SSIZEW {
|
||||
#[allow(missing_docs)]
|
||||
@ -225,7 +234,8 @@ impl<'a> _SSIZEW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `SMOD`"]
|
||||
pub enum SMODW {
|
||||
#[doc = "Source address modulo feature is disabled"] _0,
|
||||
#[doc = "Source address modulo feature is disabled"]
|
||||
_0,
|
||||
}
|
||||
impl SMODW {
|
||||
#[allow(missing_docs)]
|
||||
|
@ -56,8 +56,10 @@ impl BITERR {
|
||||
#[doc = "Possible values of the field `ELINK`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ELINKR {
|
||||
#[doc = "The channel-to-channel linking is disabled"] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled"] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled"]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ELINKR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -115,8 +117,10 @@ impl<'a> _BITERW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `ELINK`"]
|
||||
pub enum ELINKW {
|
||||
#[doc = "The channel-to-channel linking is disabled"] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled"] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled"]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ELINKW {
|
||||
#[allow(missing_docs)]
|
||||
|
@ -67,8 +67,10 @@ impl LINKCHR {
|
||||
#[doc = "Possible values of the field `ELINK`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ELINKR {
|
||||
#[doc = "The channel-to-channel linking is disabled"] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled"] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled"]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ELINKR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -141,8 +143,10 @@ impl<'a> _LINKCHW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `ELINK`"]
|
||||
pub enum ELINKW {
|
||||
#[doc = "The channel-to-channel linking is disabled"] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled"] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled"]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ELINKW {
|
||||
#[allow(missing_docs)]
|
||||
|
@ -56,8 +56,10 @@ impl CITERR {
|
||||
#[doc = "Possible values of the field `ELINK`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ELINKR {
|
||||
#[doc = "The channel-to-channel linking is disabled"] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled"] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled"]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ELINKR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -115,8 +117,10 @@ impl<'a> _CITERW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `ELINK`"]
|
||||
pub enum ELINKW {
|
||||
#[doc = "The channel-to-channel linking is disabled"] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled"] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled"]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ELINKW {
|
||||
#[allow(missing_docs)]
|
||||
|
@ -67,8 +67,10 @@ impl LINKCHR {
|
||||
#[doc = "Possible values of the field `ELINK`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ELINKR {
|
||||
#[doc = "The channel-to-channel linking is disabled"] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled"] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled"]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ELINKR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -141,8 +143,10 @@ impl<'a> _LINKCHW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `ELINK`"]
|
||||
pub enum ELINKW {
|
||||
#[doc = "The channel-to-channel linking is disabled"] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled"] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled"]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ELINKW {
|
||||
#[allow(missing_docs)]
|
||||
|
@ -45,8 +45,10 @@ impl super::TCD14_CSR {
|
||||
#[doc = "Possible values of the field `START`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum STARTR {
|
||||
#[doc = "The channel is not explicitly started."] _0,
|
||||
#[doc = "The channel is explicitly started via a software initiated service request."] _1,
|
||||
#[doc = "The channel is not explicitly started."]
|
||||
_0,
|
||||
#[doc = "The channel is explicitly started via a software initiated service request."]
|
||||
_1,
|
||||
}
|
||||
impl STARTR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -90,8 +92,10 @@ impl STARTR {
|
||||
#[doc = "Possible values of the field `INTMAJOR`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum INTMAJORR {
|
||||
#[doc = "The end-of-major loop interrupt is disabled."] _0,
|
||||
#[doc = "The end-of-major loop interrupt is enabled."] _1,
|
||||
#[doc = "The end-of-major loop interrupt is disabled."]
|
||||
_0,
|
||||
#[doc = "The end-of-major loop interrupt is enabled."]
|
||||
_1,
|
||||
}
|
||||
impl INTMAJORR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -135,8 +139,10 @@ impl INTMAJORR {
|
||||
#[doc = "Possible values of the field `INTHALF`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum INTHALFR {
|
||||
#[doc = "The half-point interrupt is disabled."] _0,
|
||||
#[doc = "The half-point interrupt is enabled."] _1,
|
||||
#[doc = "The half-point interrupt is disabled."]
|
||||
_0,
|
||||
#[doc = "The half-point interrupt is enabled."]
|
||||
_1,
|
||||
}
|
||||
impl INTHALFR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -201,7 +207,8 @@ impl DREQR {
|
||||
#[doc = "Possible values of the field `ESG`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ESGR {
|
||||
#[doc = "The current channel's TCD is normal format."] _0,
|
||||
#[doc = "The current channel's TCD is normal format."]
|
||||
_0,
|
||||
#[doc = "The current channel's TCD specifies a scatter gather format. The DLASTSGA field provides a memory pointer to the next TCD to be loaded into this channel after the major loop completes its execution."]
|
||||
_1,
|
||||
}
|
||||
@ -247,8 +254,10 @@ impl ESGR {
|
||||
#[doc = "Possible values of the field `MAJORELINK`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum MAJORELINKR {
|
||||
#[doc = "The channel-to-channel linking is disabled."] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled."] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled."]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled."]
|
||||
_1,
|
||||
}
|
||||
impl MAJORELINKR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -345,10 +354,14 @@ impl MAJORLINKCHR {
|
||||
#[doc = "Possible values of the field `BWC`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum BWCR {
|
||||
#[doc = "No eDMA engine stalls."] _0,
|
||||
#[doc = "eDMA engine stalls for 4 cycles after each R/W."] _10,
|
||||
#[doc = "eDMA engine stalls for 8 cycles after each R/W."] _11,
|
||||
#[doc = r" Reserved"] _Reserved(u8),
|
||||
#[doc = "No eDMA engine stalls."]
|
||||
_0,
|
||||
#[doc = "eDMA engine stalls for 4 cycles after each R/W."]
|
||||
_10,
|
||||
#[doc = "eDMA engine stalls for 8 cycles after each R/W."]
|
||||
_11,
|
||||
#[doc = r" Reserved"]
|
||||
_Reserved(u8),
|
||||
}
|
||||
impl BWCR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
@ -390,8 +403,10 @@ impl BWCR {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `START`"]
|
||||
pub enum STARTW {
|
||||
#[doc = "The channel is not explicitly started."] _0,
|
||||
#[doc = "The channel is explicitly started via a software initiated service request."] _1,
|
||||
#[doc = "The channel is not explicitly started."]
|
||||
_0,
|
||||
#[doc = "The channel is explicitly started via a software initiated service request."]
|
||||
_1,
|
||||
}
|
||||
impl STARTW {
|
||||
#[allow(missing_docs)]
|
||||
@ -446,8 +461,10 @@ impl<'a> _STARTW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `INTMAJOR`"]
|
||||
pub enum INTMAJORW {
|
||||
#[doc = "The end-of-major loop interrupt is disabled."] _0,
|
||||
#[doc = "The end-of-major loop interrupt is enabled."] _1,
|
||||
#[doc = "The end-of-major loop interrupt is disabled."]
|
||||
_0,
|
||||
#[doc = "The end-of-major loop interrupt is enabled."]
|
||||
_1,
|
||||
}
|
||||
impl INTMAJORW {
|
||||
#[allow(missing_docs)]
|
||||
@ -502,8 +519,10 @@ impl<'a> _INTMAJORW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `INTHALF`"]
|
||||
pub enum INTHALFW {
|
||||
#[doc = "The half-point interrupt is disabled."] _0,
|
||||
#[doc = "The half-point interrupt is enabled."] _1,
|
||||
#[doc = "The half-point interrupt is disabled."]
|
||||
_0,
|
||||
#[doc = "The half-point interrupt is enabled."]
|
||||
_1,
|
||||
}
|
||||
impl INTHALFW {
|
||||
#[allow(missing_docs)]
|
||||
@ -581,7 +600,8 @@ impl<'a> _DREQW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `ESG`"]
|
||||
pub enum ESGW {
|
||||
#[doc = "The current channel's TCD is normal format."] _0,
|
||||
#[doc = "The current channel's TCD is normal format."]
|
||||
_0,
|
||||
#[doc = "The current channel's TCD specifies a scatter gather format. The DLASTSGA field provides a memory pointer to the next TCD to be loaded into this channel after the major loop completes its execution."]
|
||||
_1,
|
||||
}
|
||||
@ -638,8 +658,10 @@ impl<'a> _ESGW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `MAJORELINK`"]
|
||||
pub enum MAJORELINKW {
|
||||
#[doc = "The channel-to-channel linking is disabled."] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled."] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled."]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled."]
|
||||
_1,
|
||||
}
|
||||
impl MAJORELINKW {
|
||||
#[allow(missing_docs)]
|
||||
@ -755,9 +777,12 @@ impl<'a> _MAJORLINKCHW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `BWC`"]
|
||||
pub enum BWCW {
|
||||
#[doc = "No eDMA engine stalls."] _0,
|
||||
#[doc = "eDMA engine stalls for 4 cycles after each R/W."] _10,
|
||||
#[doc = "eDMA engine stalls for 8 cycles after each R/W."] _11,
|
||||
#[doc = "No eDMA engine stalls."]
|
||||
_0,
|
||||
#[doc = "eDMA engine stalls for 4 cycles after each R/W."]
|
||||
_10,
|
||||
#[doc = "eDMA engine stalls for 8 cycles after each R/W."]
|
||||
_11,
|
||||
}
|
||||
impl BWCW {
|
||||
#[allow(missing_docs)]
|
||||
|
@ -56,8 +56,10 @@ impl NBYTESR {
|
||||
#[doc = "Possible values of the field `DMLOE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum DMLOER {
|
||||
#[doc = "The minor loop offset is not applied to the DADDR"] _0,
|
||||
#[doc = "The minor loop offset is applied to the DADDR"] _1,
|
||||
#[doc = "The minor loop offset is not applied to the DADDR"]
|
||||
_0,
|
||||
#[doc = "The minor loop offset is applied to the DADDR"]
|
||||
_1,
|
||||
}
|
||||
impl DMLOER {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -101,8 +103,10 @@ impl DMLOER {
|
||||
#[doc = "Possible values of the field `SMLOE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SMLOER {
|
||||
#[doc = "The minor loop offset is not applied to the SADDR"] _0,
|
||||
#[doc = "The minor loop offset is applied to the SADDR"] _1,
|
||||
#[doc = "The minor loop offset is not applied to the SADDR"]
|
||||
_0,
|
||||
#[doc = "The minor loop offset is applied to the SADDR"]
|
||||
_1,
|
||||
}
|
||||
impl SMLOER {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -160,8 +164,10 @@ impl<'a> _NBYTESW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `DMLOE`"]
|
||||
pub enum DMLOEW {
|
||||
#[doc = "The minor loop offset is not applied to the DADDR"] _0,
|
||||
#[doc = "The minor loop offset is applied to the DADDR"] _1,
|
||||
#[doc = "The minor loop offset is not applied to the DADDR"]
|
||||
_0,
|
||||
#[doc = "The minor loop offset is applied to the DADDR"]
|
||||
_1,
|
||||
}
|
||||
impl DMLOEW {
|
||||
#[allow(missing_docs)]
|
||||
@ -216,8 +222,10 @@ impl<'a> _DMLOEW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `SMLOE`"]
|
||||
pub enum SMLOEW {
|
||||
#[doc = "The minor loop offset is not applied to the SADDR"] _0,
|
||||
#[doc = "The minor loop offset is applied to the SADDR"] _1,
|
||||
#[doc = "The minor loop offset is not applied to the SADDR"]
|
||||
_0,
|
||||
#[doc = "The minor loop offset is applied to the SADDR"]
|
||||
_1,
|
||||
}
|
||||
impl SMLOEW {
|
||||
#[allow(missing_docs)]
|
||||
|
@ -67,8 +67,10 @@ impl MLOFFR {
|
||||
#[doc = "Possible values of the field `DMLOE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum DMLOER {
|
||||
#[doc = "The minor loop offset is not applied to the DADDR"] _0,
|
||||
#[doc = "The minor loop offset is applied to the DADDR"] _1,
|
||||
#[doc = "The minor loop offset is not applied to the DADDR"]
|
||||
_0,
|
||||
#[doc = "The minor loop offset is applied to the DADDR"]
|
||||
_1,
|
||||
}
|
||||
impl DMLOER {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -112,8 +114,10 @@ impl DMLOER {
|
||||
#[doc = "Possible values of the field `SMLOE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SMLOER {
|
||||
#[doc = "The minor loop offset is not applied to the SADDR"] _0,
|
||||
#[doc = "The minor loop offset is applied to the SADDR"] _1,
|
||||
#[doc = "The minor loop offset is not applied to the SADDR"]
|
||||
_0,
|
||||
#[doc = "The minor loop offset is applied to the SADDR"]
|
||||
_1,
|
||||
}
|
||||
impl SMLOER {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -186,8 +190,10 @@ impl<'a> _MLOFFW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `DMLOE`"]
|
||||
pub enum DMLOEW {
|
||||
#[doc = "The minor loop offset is not applied to the DADDR"] _0,
|
||||
#[doc = "The minor loop offset is applied to the DADDR"] _1,
|
||||
#[doc = "The minor loop offset is not applied to the DADDR"]
|
||||
_0,
|
||||
#[doc = "The minor loop offset is applied to the DADDR"]
|
||||
_1,
|
||||
}
|
||||
impl DMLOEW {
|
||||
#[allow(missing_docs)]
|
||||
@ -242,8 +248,10 @@ impl<'a> _DMLOEW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `SMLOE`"]
|
||||
pub enum SMLOEW {
|
||||
#[doc = "The minor loop offset is not applied to the SADDR"] _0,
|
||||
#[doc = "The minor loop offset is applied to the SADDR"] _1,
|
||||
#[doc = "The minor loop offset is not applied to the SADDR"]
|
||||
_0,
|
||||
#[doc = "The minor loop offset is applied to the SADDR"]
|
||||
_1,
|
||||
}
|
||||
impl SMLOEW {
|
||||
#[allow(missing_docs)]
|
||||
|
@ -67,10 +67,14 @@ impl DMODR {
|
||||
#[doc = "Possible values of the field `SSIZE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SSIZER {
|
||||
#[doc = "8-bit"] _0,
|
||||
#[doc = "16-bit"] _1,
|
||||
#[doc = "32-bit"] _10,
|
||||
#[doc = r" Reserved"] _Reserved(u8),
|
||||
#[doc = "8-bit"]
|
||||
_0,
|
||||
#[doc = "16-bit"]
|
||||
_1,
|
||||
#[doc = "32-bit"]
|
||||
_10,
|
||||
#[doc = r" Reserved"]
|
||||
_Reserved(u8),
|
||||
}
|
||||
impl SSIZER {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
@ -113,8 +117,10 @@ impl SSIZER {
|
||||
#[doc = "Possible values of the field `SMOD`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SMODR {
|
||||
#[doc = "Source address modulo feature is disabled"] _0,
|
||||
#[doc = r" Reserved"] _Reserved(u8),
|
||||
#[doc = "Source address modulo feature is disabled"]
|
||||
_0,
|
||||
#[doc = r" Reserved"]
|
||||
_Reserved(u8),
|
||||
}
|
||||
impl SMODR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
@ -172,9 +178,12 @@ impl<'a> _DMODW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `SSIZE`"]
|
||||
pub enum SSIZEW {
|
||||
#[doc = "8-bit"] _0,
|
||||
#[doc = "16-bit"] _1,
|
||||
#[doc = "32-bit"] _10,
|
||||
#[doc = "8-bit"]
|
||||
_0,
|
||||
#[doc = "16-bit"]
|
||||
_1,
|
||||
#[doc = "32-bit"]
|
||||
_10,
|
||||
}
|
||||
impl SSIZEW {
|
||||
#[allow(missing_docs)]
|
||||
@ -225,7 +234,8 @@ impl<'a> _SSIZEW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `SMOD`"]
|
||||
pub enum SMODW {
|
||||
#[doc = "Source address modulo feature is disabled"] _0,
|
||||
#[doc = "Source address modulo feature is disabled"]
|
||||
_0,
|
||||
}
|
||||
impl SMODW {
|
||||
#[allow(missing_docs)]
|
||||
|
@ -56,8 +56,10 @@ impl BITERR {
|
||||
#[doc = "Possible values of the field `ELINK`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ELINKR {
|
||||
#[doc = "The channel-to-channel linking is disabled"] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled"] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled"]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ELINKR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -115,8 +117,10 @@ impl<'a> _BITERW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `ELINK`"]
|
||||
pub enum ELINKW {
|
||||
#[doc = "The channel-to-channel linking is disabled"] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled"] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled"]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ELINKW {
|
||||
#[allow(missing_docs)]
|
||||
|
@ -67,8 +67,10 @@ impl LINKCHR {
|
||||
#[doc = "Possible values of the field `ELINK`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ELINKR {
|
||||
#[doc = "The channel-to-channel linking is disabled"] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled"] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled"]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ELINKR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -141,8 +143,10 @@ impl<'a> _LINKCHW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `ELINK`"]
|
||||
pub enum ELINKW {
|
||||
#[doc = "The channel-to-channel linking is disabled"] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled"] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled"]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ELINKW {
|
||||
#[allow(missing_docs)]
|
||||
|
@ -56,8 +56,10 @@ impl CITERR {
|
||||
#[doc = "Possible values of the field `ELINK`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ELINKR {
|
||||
#[doc = "The channel-to-channel linking is disabled"] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled"] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled"]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ELINKR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -115,8 +117,10 @@ impl<'a> _CITERW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `ELINK`"]
|
||||
pub enum ELINKW {
|
||||
#[doc = "The channel-to-channel linking is disabled"] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled"] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled"]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ELINKW {
|
||||
#[allow(missing_docs)]
|
||||
|
@ -67,8 +67,10 @@ impl LINKCHR {
|
||||
#[doc = "Possible values of the field `ELINK`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ELINKR {
|
||||
#[doc = "The channel-to-channel linking is disabled"] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled"] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled"]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ELINKR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -141,8 +143,10 @@ impl<'a> _LINKCHW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `ELINK`"]
|
||||
pub enum ELINKW {
|
||||
#[doc = "The channel-to-channel linking is disabled"] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled"] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled"]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ELINKW {
|
||||
#[allow(missing_docs)]
|
||||
|
@ -45,8 +45,10 @@ impl super::TCD15_CSR {
|
||||
#[doc = "Possible values of the field `START`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum STARTR {
|
||||
#[doc = "The channel is not explicitly started."] _0,
|
||||
#[doc = "The channel is explicitly started via a software initiated service request."] _1,
|
||||
#[doc = "The channel is not explicitly started."]
|
||||
_0,
|
||||
#[doc = "The channel is explicitly started via a software initiated service request."]
|
||||
_1,
|
||||
}
|
||||
impl STARTR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -90,8 +92,10 @@ impl STARTR {
|
||||
#[doc = "Possible values of the field `INTMAJOR`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum INTMAJORR {
|
||||
#[doc = "The end-of-major loop interrupt is disabled."] _0,
|
||||
#[doc = "The end-of-major loop interrupt is enabled."] _1,
|
||||
#[doc = "The end-of-major loop interrupt is disabled."]
|
||||
_0,
|
||||
#[doc = "The end-of-major loop interrupt is enabled."]
|
||||
_1,
|
||||
}
|
||||
impl INTMAJORR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -135,8 +139,10 @@ impl INTMAJORR {
|
||||
#[doc = "Possible values of the field `INTHALF`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum INTHALFR {
|
||||
#[doc = "The half-point interrupt is disabled."] _0,
|
||||
#[doc = "The half-point interrupt is enabled."] _1,
|
||||
#[doc = "The half-point interrupt is disabled."]
|
||||
_0,
|
||||
#[doc = "The half-point interrupt is enabled."]
|
||||
_1,
|
||||
}
|
||||
impl INTHALFR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -201,7 +207,8 @@ impl DREQR {
|
||||
#[doc = "Possible values of the field `ESG`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ESGR {
|
||||
#[doc = "The current channel's TCD is normal format."] _0,
|
||||
#[doc = "The current channel's TCD is normal format."]
|
||||
_0,
|
||||
#[doc = "The current channel's TCD specifies a scatter gather format. The DLASTSGA field provides a memory pointer to the next TCD to be loaded into this channel after the major loop completes its execution."]
|
||||
_1,
|
||||
}
|
||||
@ -247,8 +254,10 @@ impl ESGR {
|
||||
#[doc = "Possible values of the field `MAJORELINK`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum MAJORELINKR {
|
||||
#[doc = "The channel-to-channel linking is disabled."] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled."] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled."]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled."]
|
||||
_1,
|
||||
}
|
||||
impl MAJORELINKR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -345,10 +354,14 @@ impl MAJORLINKCHR {
|
||||
#[doc = "Possible values of the field `BWC`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum BWCR {
|
||||
#[doc = "No eDMA engine stalls."] _0,
|
||||
#[doc = "eDMA engine stalls for 4 cycles after each R/W."] _10,
|
||||
#[doc = "eDMA engine stalls for 8 cycles after each R/W."] _11,
|
||||
#[doc = r" Reserved"] _Reserved(u8),
|
||||
#[doc = "No eDMA engine stalls."]
|
||||
_0,
|
||||
#[doc = "eDMA engine stalls for 4 cycles after each R/W."]
|
||||
_10,
|
||||
#[doc = "eDMA engine stalls for 8 cycles after each R/W."]
|
||||
_11,
|
||||
#[doc = r" Reserved"]
|
||||
_Reserved(u8),
|
||||
}
|
||||
impl BWCR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
@ -390,8 +403,10 @@ impl BWCR {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `START`"]
|
||||
pub enum STARTW {
|
||||
#[doc = "The channel is not explicitly started."] _0,
|
||||
#[doc = "The channel is explicitly started via a software initiated service request."] _1,
|
||||
#[doc = "The channel is not explicitly started."]
|
||||
_0,
|
||||
#[doc = "The channel is explicitly started via a software initiated service request."]
|
||||
_1,
|
||||
}
|
||||
impl STARTW {
|
||||
#[allow(missing_docs)]
|
||||
@ -446,8 +461,10 @@ impl<'a> _STARTW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `INTMAJOR`"]
|
||||
pub enum INTMAJORW {
|
||||
#[doc = "The end-of-major loop interrupt is disabled."] _0,
|
||||
#[doc = "The end-of-major loop interrupt is enabled."] _1,
|
||||
#[doc = "The end-of-major loop interrupt is disabled."]
|
||||
_0,
|
||||
#[doc = "The end-of-major loop interrupt is enabled."]
|
||||
_1,
|
||||
}
|
||||
impl INTMAJORW {
|
||||
#[allow(missing_docs)]
|
||||
@ -502,8 +519,10 @@ impl<'a> _INTMAJORW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `INTHALF`"]
|
||||
pub enum INTHALFW {
|
||||
#[doc = "The half-point interrupt is disabled."] _0,
|
||||
#[doc = "The half-point interrupt is enabled."] _1,
|
||||
#[doc = "The half-point interrupt is disabled."]
|
||||
_0,
|
||||
#[doc = "The half-point interrupt is enabled."]
|
||||
_1,
|
||||
}
|
||||
impl INTHALFW {
|
||||
#[allow(missing_docs)]
|
||||
@ -581,7 +600,8 @@ impl<'a> _DREQW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `ESG`"]
|
||||
pub enum ESGW {
|
||||
#[doc = "The current channel's TCD is normal format."] _0,
|
||||
#[doc = "The current channel's TCD is normal format."]
|
||||
_0,
|
||||
#[doc = "The current channel's TCD specifies a scatter gather format. The DLASTSGA field provides a memory pointer to the next TCD to be loaded into this channel after the major loop completes its execution."]
|
||||
_1,
|
||||
}
|
||||
@ -638,8 +658,10 @@ impl<'a> _ESGW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `MAJORELINK`"]
|
||||
pub enum MAJORELINKW {
|
||||
#[doc = "The channel-to-channel linking is disabled."] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled."] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled."]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled."]
|
||||
_1,
|
||||
}
|
||||
impl MAJORELINKW {
|
||||
#[allow(missing_docs)]
|
||||
@ -755,9 +777,12 @@ impl<'a> _MAJORLINKCHW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `BWC`"]
|
||||
pub enum BWCW {
|
||||
#[doc = "No eDMA engine stalls."] _0,
|
||||
#[doc = "eDMA engine stalls for 4 cycles after each R/W."] _10,
|
||||
#[doc = "eDMA engine stalls for 8 cycles after each R/W."] _11,
|
||||
#[doc = "No eDMA engine stalls."]
|
||||
_0,
|
||||
#[doc = "eDMA engine stalls for 4 cycles after each R/W."]
|
||||
_10,
|
||||
#[doc = "eDMA engine stalls for 8 cycles after each R/W."]
|
||||
_11,
|
||||
}
|
||||
impl BWCW {
|
||||
#[allow(missing_docs)]
|
||||
|
@ -56,8 +56,10 @@ impl NBYTESR {
|
||||
#[doc = "Possible values of the field `DMLOE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum DMLOER {
|
||||
#[doc = "The minor loop offset is not applied to the DADDR"] _0,
|
||||
#[doc = "The minor loop offset is applied to the DADDR"] _1,
|
||||
#[doc = "The minor loop offset is not applied to the DADDR"]
|
||||
_0,
|
||||
#[doc = "The minor loop offset is applied to the DADDR"]
|
||||
_1,
|
||||
}
|
||||
impl DMLOER {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -101,8 +103,10 @@ impl DMLOER {
|
||||
#[doc = "Possible values of the field `SMLOE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SMLOER {
|
||||
#[doc = "The minor loop offset is not applied to the SADDR"] _0,
|
||||
#[doc = "The minor loop offset is applied to the SADDR"] _1,
|
||||
#[doc = "The minor loop offset is not applied to the SADDR"]
|
||||
_0,
|
||||
#[doc = "The minor loop offset is applied to the SADDR"]
|
||||
_1,
|
||||
}
|
||||
impl SMLOER {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -160,8 +164,10 @@ impl<'a> _NBYTESW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `DMLOE`"]
|
||||
pub enum DMLOEW {
|
||||
#[doc = "The minor loop offset is not applied to the DADDR"] _0,
|
||||
#[doc = "The minor loop offset is applied to the DADDR"] _1,
|
||||
#[doc = "The minor loop offset is not applied to the DADDR"]
|
||||
_0,
|
||||
#[doc = "The minor loop offset is applied to the DADDR"]
|
||||
_1,
|
||||
}
|
||||
impl DMLOEW {
|
||||
#[allow(missing_docs)]
|
||||
@ -216,8 +222,10 @@ impl<'a> _DMLOEW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `SMLOE`"]
|
||||
pub enum SMLOEW {
|
||||
#[doc = "The minor loop offset is not applied to the SADDR"] _0,
|
||||
#[doc = "The minor loop offset is applied to the SADDR"] _1,
|
||||
#[doc = "The minor loop offset is not applied to the SADDR"]
|
||||
_0,
|
||||
#[doc = "The minor loop offset is applied to the SADDR"]
|
||||
_1,
|
||||
}
|
||||
impl SMLOEW {
|
||||
#[allow(missing_docs)]
|
||||
|
@ -67,8 +67,10 @@ impl MLOFFR {
|
||||
#[doc = "Possible values of the field `DMLOE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum DMLOER {
|
||||
#[doc = "The minor loop offset is not applied to the DADDR"] _0,
|
||||
#[doc = "The minor loop offset is applied to the DADDR"] _1,
|
||||
#[doc = "The minor loop offset is not applied to the DADDR"]
|
||||
_0,
|
||||
#[doc = "The minor loop offset is applied to the DADDR"]
|
||||
_1,
|
||||
}
|
||||
impl DMLOER {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -112,8 +114,10 @@ impl DMLOER {
|
||||
#[doc = "Possible values of the field `SMLOE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SMLOER {
|
||||
#[doc = "The minor loop offset is not applied to the SADDR"] _0,
|
||||
#[doc = "The minor loop offset is applied to the SADDR"] _1,
|
||||
#[doc = "The minor loop offset is not applied to the SADDR"]
|
||||
_0,
|
||||
#[doc = "The minor loop offset is applied to the SADDR"]
|
||||
_1,
|
||||
}
|
||||
impl SMLOER {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -186,8 +190,10 @@ impl<'a> _MLOFFW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `DMLOE`"]
|
||||
pub enum DMLOEW {
|
||||
#[doc = "The minor loop offset is not applied to the DADDR"] _0,
|
||||
#[doc = "The minor loop offset is applied to the DADDR"] _1,
|
||||
#[doc = "The minor loop offset is not applied to the DADDR"]
|
||||
_0,
|
||||
#[doc = "The minor loop offset is applied to the DADDR"]
|
||||
_1,
|
||||
}
|
||||
impl DMLOEW {
|
||||
#[allow(missing_docs)]
|
||||
@ -242,8 +248,10 @@ impl<'a> _DMLOEW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `SMLOE`"]
|
||||
pub enum SMLOEW {
|
||||
#[doc = "The minor loop offset is not applied to the SADDR"] _0,
|
||||
#[doc = "The minor loop offset is applied to the SADDR"] _1,
|
||||
#[doc = "The minor loop offset is not applied to the SADDR"]
|
||||
_0,
|
||||
#[doc = "The minor loop offset is applied to the SADDR"]
|
||||
_1,
|
||||
}
|
||||
impl SMLOEW {
|
||||
#[allow(missing_docs)]
|
||||
|
@ -67,10 +67,14 @@ impl DMODR {
|
||||
#[doc = "Possible values of the field `SSIZE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SSIZER {
|
||||
#[doc = "8-bit"] _0,
|
||||
#[doc = "16-bit"] _1,
|
||||
#[doc = "32-bit"] _10,
|
||||
#[doc = r" Reserved"] _Reserved(u8),
|
||||
#[doc = "8-bit"]
|
||||
_0,
|
||||
#[doc = "16-bit"]
|
||||
_1,
|
||||
#[doc = "32-bit"]
|
||||
_10,
|
||||
#[doc = r" Reserved"]
|
||||
_Reserved(u8),
|
||||
}
|
||||
impl SSIZER {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
@ -113,8 +117,10 @@ impl SSIZER {
|
||||
#[doc = "Possible values of the field `SMOD`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SMODR {
|
||||
#[doc = "Source address modulo feature is disabled"] _0,
|
||||
#[doc = r" Reserved"] _Reserved(u8),
|
||||
#[doc = "Source address modulo feature is disabled"]
|
||||
_0,
|
||||
#[doc = r" Reserved"]
|
||||
_Reserved(u8),
|
||||
}
|
||||
impl SMODR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
@ -172,9 +178,12 @@ impl<'a> _DMODW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `SSIZE`"]
|
||||
pub enum SSIZEW {
|
||||
#[doc = "8-bit"] _0,
|
||||
#[doc = "16-bit"] _1,
|
||||
#[doc = "32-bit"] _10,
|
||||
#[doc = "8-bit"]
|
||||
_0,
|
||||
#[doc = "16-bit"]
|
||||
_1,
|
||||
#[doc = "32-bit"]
|
||||
_10,
|
||||
}
|
||||
impl SSIZEW {
|
||||
#[allow(missing_docs)]
|
||||
@ -225,7 +234,8 @@ impl<'a> _SSIZEW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `SMOD`"]
|
||||
pub enum SMODW {
|
||||
#[doc = "Source address modulo feature is disabled"] _0,
|
||||
#[doc = "Source address modulo feature is disabled"]
|
||||
_0,
|
||||
}
|
||||
impl SMODW {
|
||||
#[allow(missing_docs)]
|
||||
|
@ -56,8 +56,10 @@ impl BITERR {
|
||||
#[doc = "Possible values of the field `ELINK`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ELINKR {
|
||||
#[doc = "The channel-to-channel linking is disabled"] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled"] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled"]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ELINKR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -115,8 +117,10 @@ impl<'a> _BITERW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `ELINK`"]
|
||||
pub enum ELINKW {
|
||||
#[doc = "The channel-to-channel linking is disabled"] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled"] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled"]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ELINKW {
|
||||
#[allow(missing_docs)]
|
||||
|
@ -67,8 +67,10 @@ impl LINKCHR {
|
||||
#[doc = "Possible values of the field `ELINK`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ELINKR {
|
||||
#[doc = "The channel-to-channel linking is disabled"] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled"] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled"]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ELINKR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -141,8 +143,10 @@ impl<'a> _LINKCHW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `ELINK`"]
|
||||
pub enum ELINKW {
|
||||
#[doc = "The channel-to-channel linking is disabled"] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled"] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled"]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ELINKW {
|
||||
#[allow(missing_docs)]
|
||||
|
@ -56,8 +56,10 @@ impl CITERR {
|
||||
#[doc = "Possible values of the field `ELINK`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ELINKR {
|
||||
#[doc = "The channel-to-channel linking is disabled"] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled"] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled"]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ELINKR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -115,8 +117,10 @@ impl<'a> _CITERW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `ELINK`"]
|
||||
pub enum ELINKW {
|
||||
#[doc = "The channel-to-channel linking is disabled"] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled"] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled"]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ELINKW {
|
||||
#[allow(missing_docs)]
|
||||
|
@ -67,8 +67,10 @@ impl LINKCHR {
|
||||
#[doc = "Possible values of the field `ELINK`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ELINKR {
|
||||
#[doc = "The channel-to-channel linking is disabled"] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled"] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled"]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ELINKR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -141,8 +143,10 @@ impl<'a> _LINKCHW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `ELINK`"]
|
||||
pub enum ELINKW {
|
||||
#[doc = "The channel-to-channel linking is disabled"] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled"] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled"]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ELINKW {
|
||||
#[allow(missing_docs)]
|
||||
|
@ -45,8 +45,10 @@ impl super::TCD1_CSR {
|
||||
#[doc = "Possible values of the field `START`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum STARTR {
|
||||
#[doc = "The channel is not explicitly started."] _0,
|
||||
#[doc = "The channel is explicitly started via a software initiated service request."] _1,
|
||||
#[doc = "The channel is not explicitly started."]
|
||||
_0,
|
||||
#[doc = "The channel is explicitly started via a software initiated service request."]
|
||||
_1,
|
||||
}
|
||||
impl STARTR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -90,8 +92,10 @@ impl STARTR {
|
||||
#[doc = "Possible values of the field `INTMAJOR`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum INTMAJORR {
|
||||
#[doc = "The end-of-major loop interrupt is disabled."] _0,
|
||||
#[doc = "The end-of-major loop interrupt is enabled."] _1,
|
||||
#[doc = "The end-of-major loop interrupt is disabled."]
|
||||
_0,
|
||||
#[doc = "The end-of-major loop interrupt is enabled."]
|
||||
_1,
|
||||
}
|
||||
impl INTMAJORR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -135,8 +139,10 @@ impl INTMAJORR {
|
||||
#[doc = "Possible values of the field `INTHALF`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum INTHALFR {
|
||||
#[doc = "The half-point interrupt is disabled."] _0,
|
||||
#[doc = "The half-point interrupt is enabled."] _1,
|
||||
#[doc = "The half-point interrupt is disabled."]
|
||||
_0,
|
||||
#[doc = "The half-point interrupt is enabled."]
|
||||
_1,
|
||||
}
|
||||
impl INTHALFR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -201,7 +207,8 @@ impl DREQR {
|
||||
#[doc = "Possible values of the field `ESG`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ESGR {
|
||||
#[doc = "The current channel's TCD is normal format."] _0,
|
||||
#[doc = "The current channel's TCD is normal format."]
|
||||
_0,
|
||||
#[doc = "The current channel's TCD specifies a scatter gather format. The DLASTSGA field provides a memory pointer to the next TCD to be loaded into this channel after the major loop completes its execution."]
|
||||
_1,
|
||||
}
|
||||
@ -247,8 +254,10 @@ impl ESGR {
|
||||
#[doc = "Possible values of the field `MAJORELINK`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum MAJORELINKR {
|
||||
#[doc = "The channel-to-channel linking is disabled."] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled."] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled."]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled."]
|
||||
_1,
|
||||
}
|
||||
impl MAJORELINKR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -345,10 +354,14 @@ impl MAJORLINKCHR {
|
||||
#[doc = "Possible values of the field `BWC`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum BWCR {
|
||||
#[doc = "No eDMA engine stalls."] _0,
|
||||
#[doc = "eDMA engine stalls for 4 cycles after each R/W."] _10,
|
||||
#[doc = "eDMA engine stalls for 8 cycles after each R/W."] _11,
|
||||
#[doc = r" Reserved"] _Reserved(u8),
|
||||
#[doc = "No eDMA engine stalls."]
|
||||
_0,
|
||||
#[doc = "eDMA engine stalls for 4 cycles after each R/W."]
|
||||
_10,
|
||||
#[doc = "eDMA engine stalls for 8 cycles after each R/W."]
|
||||
_11,
|
||||
#[doc = r" Reserved"]
|
||||
_Reserved(u8),
|
||||
}
|
||||
impl BWCR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
@ -390,8 +403,10 @@ impl BWCR {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `START`"]
|
||||
pub enum STARTW {
|
||||
#[doc = "The channel is not explicitly started."] _0,
|
||||
#[doc = "The channel is explicitly started via a software initiated service request."] _1,
|
||||
#[doc = "The channel is not explicitly started."]
|
||||
_0,
|
||||
#[doc = "The channel is explicitly started via a software initiated service request."]
|
||||
_1,
|
||||
}
|
||||
impl STARTW {
|
||||
#[allow(missing_docs)]
|
||||
@ -446,8 +461,10 @@ impl<'a> _STARTW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `INTMAJOR`"]
|
||||
pub enum INTMAJORW {
|
||||
#[doc = "The end-of-major loop interrupt is disabled."] _0,
|
||||
#[doc = "The end-of-major loop interrupt is enabled."] _1,
|
||||
#[doc = "The end-of-major loop interrupt is disabled."]
|
||||
_0,
|
||||
#[doc = "The end-of-major loop interrupt is enabled."]
|
||||
_1,
|
||||
}
|
||||
impl INTMAJORW {
|
||||
#[allow(missing_docs)]
|
||||
@ -502,8 +519,10 @@ impl<'a> _INTMAJORW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `INTHALF`"]
|
||||
pub enum INTHALFW {
|
||||
#[doc = "The half-point interrupt is disabled."] _0,
|
||||
#[doc = "The half-point interrupt is enabled."] _1,
|
||||
#[doc = "The half-point interrupt is disabled."]
|
||||
_0,
|
||||
#[doc = "The half-point interrupt is enabled."]
|
||||
_1,
|
||||
}
|
||||
impl INTHALFW {
|
||||
#[allow(missing_docs)]
|
||||
@ -581,7 +600,8 @@ impl<'a> _DREQW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `ESG`"]
|
||||
pub enum ESGW {
|
||||
#[doc = "The current channel's TCD is normal format."] _0,
|
||||
#[doc = "The current channel's TCD is normal format."]
|
||||
_0,
|
||||
#[doc = "The current channel's TCD specifies a scatter gather format. The DLASTSGA field provides a memory pointer to the next TCD to be loaded into this channel after the major loop completes its execution."]
|
||||
_1,
|
||||
}
|
||||
@ -638,8 +658,10 @@ impl<'a> _ESGW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `MAJORELINK`"]
|
||||
pub enum MAJORELINKW {
|
||||
#[doc = "The channel-to-channel linking is disabled."] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled."] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled."]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled."]
|
||||
_1,
|
||||
}
|
||||
impl MAJORELINKW {
|
||||
#[allow(missing_docs)]
|
||||
@ -755,9 +777,12 @@ impl<'a> _MAJORLINKCHW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `BWC`"]
|
||||
pub enum BWCW {
|
||||
#[doc = "No eDMA engine stalls."] _0,
|
||||
#[doc = "eDMA engine stalls for 4 cycles after each R/W."] _10,
|
||||
#[doc = "eDMA engine stalls for 8 cycles after each R/W."] _11,
|
||||
#[doc = "No eDMA engine stalls."]
|
||||
_0,
|
||||
#[doc = "eDMA engine stalls for 4 cycles after each R/W."]
|
||||
_10,
|
||||
#[doc = "eDMA engine stalls for 8 cycles after each R/W."]
|
||||
_11,
|
||||
}
|
||||
impl BWCW {
|
||||
#[allow(missing_docs)]
|
||||
|
@ -56,8 +56,10 @@ impl NBYTESR {
|
||||
#[doc = "Possible values of the field `DMLOE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum DMLOER {
|
||||
#[doc = "The minor loop offset is not applied to the DADDR"] _0,
|
||||
#[doc = "The minor loop offset is applied to the DADDR"] _1,
|
||||
#[doc = "The minor loop offset is not applied to the DADDR"]
|
||||
_0,
|
||||
#[doc = "The minor loop offset is applied to the DADDR"]
|
||||
_1,
|
||||
}
|
||||
impl DMLOER {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -101,8 +103,10 @@ impl DMLOER {
|
||||
#[doc = "Possible values of the field `SMLOE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SMLOER {
|
||||
#[doc = "The minor loop offset is not applied to the SADDR"] _0,
|
||||
#[doc = "The minor loop offset is applied to the SADDR"] _1,
|
||||
#[doc = "The minor loop offset is not applied to the SADDR"]
|
||||
_0,
|
||||
#[doc = "The minor loop offset is applied to the SADDR"]
|
||||
_1,
|
||||
}
|
||||
impl SMLOER {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -160,8 +164,10 @@ impl<'a> _NBYTESW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `DMLOE`"]
|
||||
pub enum DMLOEW {
|
||||
#[doc = "The minor loop offset is not applied to the DADDR"] _0,
|
||||
#[doc = "The minor loop offset is applied to the DADDR"] _1,
|
||||
#[doc = "The minor loop offset is not applied to the DADDR"]
|
||||
_0,
|
||||
#[doc = "The minor loop offset is applied to the DADDR"]
|
||||
_1,
|
||||
}
|
||||
impl DMLOEW {
|
||||
#[allow(missing_docs)]
|
||||
@ -216,8 +222,10 @@ impl<'a> _DMLOEW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `SMLOE`"]
|
||||
pub enum SMLOEW {
|
||||
#[doc = "The minor loop offset is not applied to the SADDR"] _0,
|
||||
#[doc = "The minor loop offset is applied to the SADDR"] _1,
|
||||
#[doc = "The minor loop offset is not applied to the SADDR"]
|
||||
_0,
|
||||
#[doc = "The minor loop offset is applied to the SADDR"]
|
||||
_1,
|
||||
}
|
||||
impl SMLOEW {
|
||||
#[allow(missing_docs)]
|
||||
|
@ -67,8 +67,10 @@ impl MLOFFR {
|
||||
#[doc = "Possible values of the field `DMLOE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum DMLOER {
|
||||
#[doc = "The minor loop offset is not applied to the DADDR"] _0,
|
||||
#[doc = "The minor loop offset is applied to the DADDR"] _1,
|
||||
#[doc = "The minor loop offset is not applied to the DADDR"]
|
||||
_0,
|
||||
#[doc = "The minor loop offset is applied to the DADDR"]
|
||||
_1,
|
||||
}
|
||||
impl DMLOER {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -112,8 +114,10 @@ impl DMLOER {
|
||||
#[doc = "Possible values of the field `SMLOE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SMLOER {
|
||||
#[doc = "The minor loop offset is not applied to the SADDR"] _0,
|
||||
#[doc = "The minor loop offset is applied to the SADDR"] _1,
|
||||
#[doc = "The minor loop offset is not applied to the SADDR"]
|
||||
_0,
|
||||
#[doc = "The minor loop offset is applied to the SADDR"]
|
||||
_1,
|
||||
}
|
||||
impl SMLOER {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -186,8 +190,10 @@ impl<'a> _MLOFFW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `DMLOE`"]
|
||||
pub enum DMLOEW {
|
||||
#[doc = "The minor loop offset is not applied to the DADDR"] _0,
|
||||
#[doc = "The minor loop offset is applied to the DADDR"] _1,
|
||||
#[doc = "The minor loop offset is not applied to the DADDR"]
|
||||
_0,
|
||||
#[doc = "The minor loop offset is applied to the DADDR"]
|
||||
_1,
|
||||
}
|
||||
impl DMLOEW {
|
||||
#[allow(missing_docs)]
|
||||
@ -242,8 +248,10 @@ impl<'a> _DMLOEW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `SMLOE`"]
|
||||
pub enum SMLOEW {
|
||||
#[doc = "The minor loop offset is not applied to the SADDR"] _0,
|
||||
#[doc = "The minor loop offset is applied to the SADDR"] _1,
|
||||
#[doc = "The minor loop offset is not applied to the SADDR"]
|
||||
_0,
|
||||
#[doc = "The minor loop offset is applied to the SADDR"]
|
||||
_1,
|
||||
}
|
||||
impl SMLOEW {
|
||||
#[allow(missing_docs)]
|
||||
|
@ -67,10 +67,14 @@ impl DMODR {
|
||||
#[doc = "Possible values of the field `SSIZE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SSIZER {
|
||||
#[doc = "8-bit"] _0,
|
||||
#[doc = "16-bit"] _1,
|
||||
#[doc = "32-bit"] _10,
|
||||
#[doc = r" Reserved"] _Reserved(u8),
|
||||
#[doc = "8-bit"]
|
||||
_0,
|
||||
#[doc = "16-bit"]
|
||||
_1,
|
||||
#[doc = "32-bit"]
|
||||
_10,
|
||||
#[doc = r" Reserved"]
|
||||
_Reserved(u8),
|
||||
}
|
||||
impl SSIZER {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
@ -113,8 +117,10 @@ impl SSIZER {
|
||||
#[doc = "Possible values of the field `SMOD`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SMODR {
|
||||
#[doc = "Source address modulo feature is disabled"] _0,
|
||||
#[doc = r" Reserved"] _Reserved(u8),
|
||||
#[doc = "Source address modulo feature is disabled"]
|
||||
_0,
|
||||
#[doc = r" Reserved"]
|
||||
_Reserved(u8),
|
||||
}
|
||||
impl SMODR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
@ -172,9 +178,12 @@ impl<'a> _DMODW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `SSIZE`"]
|
||||
pub enum SSIZEW {
|
||||
#[doc = "8-bit"] _0,
|
||||
#[doc = "16-bit"] _1,
|
||||
#[doc = "32-bit"] _10,
|
||||
#[doc = "8-bit"]
|
||||
_0,
|
||||
#[doc = "16-bit"]
|
||||
_1,
|
||||
#[doc = "32-bit"]
|
||||
_10,
|
||||
}
|
||||
impl SSIZEW {
|
||||
#[allow(missing_docs)]
|
||||
@ -225,7 +234,8 @@ impl<'a> _SSIZEW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `SMOD`"]
|
||||
pub enum SMODW {
|
||||
#[doc = "Source address modulo feature is disabled"] _0,
|
||||
#[doc = "Source address modulo feature is disabled"]
|
||||
_0,
|
||||
}
|
||||
impl SMODW {
|
||||
#[allow(missing_docs)]
|
||||
|
@ -56,8 +56,10 @@ impl BITERR {
|
||||
#[doc = "Possible values of the field `ELINK`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ELINKR {
|
||||
#[doc = "The channel-to-channel linking is disabled"] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled"] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled"]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ELINKR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -115,8 +117,10 @@ impl<'a> _BITERW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `ELINK`"]
|
||||
pub enum ELINKW {
|
||||
#[doc = "The channel-to-channel linking is disabled"] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled"] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled"]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ELINKW {
|
||||
#[allow(missing_docs)]
|
||||
|
@ -67,8 +67,10 @@ impl LINKCHR {
|
||||
#[doc = "Possible values of the field `ELINK`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ELINKR {
|
||||
#[doc = "The channel-to-channel linking is disabled"] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled"] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled"]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ELINKR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -141,8 +143,10 @@ impl<'a> _LINKCHW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `ELINK`"]
|
||||
pub enum ELINKW {
|
||||
#[doc = "The channel-to-channel linking is disabled"] _0,
|
||||
#[doc = "The channel-to-channel linking is enabled"] _1,
|
||||
#[doc = "The channel-to-channel linking is disabled"]
|
||||
_0,
|
||||
#[doc = "The channel-to-channel linking is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl ELINKW {
|
||||
#[allow(missing_docs)]
|
||||
|
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Reference in New Issue
Block a user