s32k118.rs/src/can0/fdcbt/mod.rs

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#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
#[doc = r" Value to write to the register"]
pub struct W {
bits: u32,
}
impl super::FDCBT {
#[doc = r" Modifies the contents of the register"]
#[inline]
pub fn modify<F>(&self, f: F)
where
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
{
let bits = self.register.get();
let r = R { bits: bits };
let mut w = W { bits: bits };
f(&r, &mut w);
self.register.set(w.bits);
}
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
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R {
bits: self.register.get(),
}
}
#[doc = r" Writes to the register"]
#[inline]
pub fn write<F>(&self, f: F)
where
F: FnOnce(&mut W) -> &mut W,
{
let mut w = W::reset_value();
f(&mut w);
self.register.set(w.bits);
}
#[doc = r" Writes the reset value to the register"]
#[inline]
pub fn reset(&self) {
self.write(|w| w)
}
}
#[doc = r" Value of the field"]
pub struct FPSEG2R {
bits: u8,
}
impl FPSEG2R {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct FPSEG1R {
bits: u8,
}
impl FPSEG1R {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct FPROPSEGR {
bits: u8,
}
impl FPROPSEGR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct FRJWR {
bits: u8,
}
impl FRJWR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct FPRESDIVR {
bits: u16,
}
impl FPRESDIVR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u16 {
self.bits
}
}
#[doc = r" Proxy"]
pub struct _FPSEG2W<'a> {
w: &'a mut W,
}
impl<'a> _FPSEG2W<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 7;
const OFFSET: u8 = 0;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = r" Proxy"]
pub struct _FPSEG1W<'a> {
w: &'a mut W,
}
impl<'a> _FPSEG1W<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 7;
const OFFSET: u8 = 5;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = r" Proxy"]
pub struct _FPROPSEGW<'a> {
w: &'a mut W,
}
impl<'a> _FPROPSEGW<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 31;
const OFFSET: u8 = 10;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = r" Proxy"]
pub struct _FRJWW<'a> {
w: &'a mut W,
}
impl<'a> _FRJWW<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 7;
const OFFSET: u8 = 16;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = r" Proxy"]
pub struct _FPRESDIVW<'a> {
w: &'a mut W,
}
impl<'a> _FPRESDIVW<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u16) -> &'a mut W {
const MASK: u16 = 1023;
const OFFSET: u8 = 20;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 0:2 - Fast Phase Segment 2"]
#[inline]
pub fn fpseg2(&self) -> FPSEG2R {
let bits = {
const MASK: u8 = 7;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) as u8
};
FPSEG2R { bits }
}
#[doc = "Bits 5:7 - Fast Phase Segment 1"]
#[inline]
pub fn fpseg1(&self) -> FPSEG1R {
let bits = {
const MASK: u8 = 7;
const OFFSET: u8 = 5;
((self.bits >> OFFSET) & MASK as u32) as u8
};
FPSEG1R { bits }
}
#[doc = "Bits 10:14 - Fast Propagation Segment"]
#[inline]
pub fn fpropseg(&self) -> FPROPSEGR {
let bits = {
const MASK: u8 = 31;
const OFFSET: u8 = 10;
((self.bits >> OFFSET) & MASK as u32) as u8
};
FPROPSEGR { bits }
}
#[doc = "Bits 16:18 - Fast Resync Jump Width"]
#[inline]
pub fn frjw(&self) -> FRJWR {
let bits = {
const MASK: u8 = 7;
const OFFSET: u8 = 16;
((self.bits >> OFFSET) & MASK as u32) as u8
};
FRJWR { bits }
}
#[doc = "Bits 20:29 - Fast Prescaler Division Factor"]
#[inline]
pub fn fpresdiv(&self) -> FPRESDIVR {
let bits = {
const MASK: u16 = 1023;
const OFFSET: u8 = 20;
((self.bits >> OFFSET) & MASK as u32) as u16
};
FPRESDIVR { bits }
}
}
impl W {
#[doc = r" Reset value of the register"]
#[inline]
pub fn reset_value() -> W {
W { bits: 0 }
}
#[doc = r" Writes raw bits to the register"]
#[inline]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.bits = bits;
self
}
#[doc = "Bits 0:2 - Fast Phase Segment 2"]
#[inline]
pub fn fpseg2(&mut self) -> _FPSEG2W {
_FPSEG2W { w: self }
}
#[doc = "Bits 5:7 - Fast Phase Segment 1"]
#[inline]
pub fn fpseg1(&mut self) -> _FPSEG1W {
_FPSEG1W { w: self }
}
#[doc = "Bits 10:14 - Fast Propagation Segment"]
#[inline]
pub fn fpropseg(&mut self) -> _FPROPSEGW {
_FPROPSEGW { w: self }
}
#[doc = "Bits 16:18 - Fast Resync Jump Width"]
#[inline]
pub fn frjw(&mut self) -> _FRJWW {
_FRJWW { w: self }
}
#[doc = "Bits 20:29 - Fast Prescaler Division Factor"]
#[inline]
pub fn fpresdiv(&mut self) -> _FPRESDIVW {
_FPRESDIVW { w: self }
}
}