sw: update to latest generated files
Signed-off-by: Sean Cross <sean@xobs.io>
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dbc0f81715
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85b6d75882
@ -93,6 +93,36 @@ static inline void reboot_ctrl_write(unsigned char value) {
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csr_writel(value, 0xe0005800);
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}
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/* rgb */
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#define CSR_RGB_BASE 0xe0006000
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#define CSR_RGB_DAT_ADDR 0xe0006000
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#define CSR_RGB_DAT_SIZE 1
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static inline unsigned char rgb_dat_read(void) {
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unsigned char r = csr_readl(0xe0006000);
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return r;
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}
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static inline void rgb_dat_write(unsigned char value) {
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csr_writel(value, 0xe0006000);
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}
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#define CSR_RGB_ADDR_ADDR 0xe0006004
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#define CSR_RGB_ADDR_SIZE 1
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static inline unsigned char rgb_addr_read(void) {
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unsigned char r = csr_readl(0xe0006004);
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return r;
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}
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static inline void rgb_addr_write(unsigned char value) {
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csr_writel(value, 0xe0006004);
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}
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#define CSR_RGB_CTRL_ADDR 0xe0006008
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#define CSR_RGB_CTRL_SIZE 1
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static inline unsigned char rgb_ctrl_read(void) {
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unsigned char r = csr_readl(0xe0006008);
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return r;
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}
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static inline void rgb_ctrl_write(unsigned char value) {
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csr_writel(value, 0xe0006008);
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}
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/* timer0 */
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#define CSR_TIMER0_BASE 0xe0002800
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#define CSR_TIMER0_LOAD_ADDR 0xe0002800
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@ -1,9 +1,6 @@
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#ifndef __GENERATED_MEM_H
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#define __GENERATED_MEM_H
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#define VEXRISCV_DEBUG_BASE 0xf00f0000
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#define VEXRISCV_DEBUG_SIZE 0x00000010
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#define SRAM_BASE 0x10000000
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#define SRAM_SIZE 0x00020000
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