From 85b6d7588264c25f0c53060823b8f6337d3cf0df Mon Sep 17 00:00:00 2001
From: Sean Cross <sean@xobs.io>
Date: Tue, 2 Apr 2019 18:11:25 +0800
Subject: [PATCH] sw: update to latest generated files

Signed-off-by: Sean Cross <sean@xobs.io>
---
 sw/include/generated/csr.h | 30 ++++++++++++++++++++++++++++++
 sw/include/generated/mem.h |  3 ---
 2 files changed, 30 insertions(+), 3 deletions(-)

diff --git a/sw/include/generated/csr.h b/sw/include/generated/csr.h
index ebfec91..50cdcbd 100644
--- a/sw/include/generated/csr.h
+++ b/sw/include/generated/csr.h
@@ -93,6 +93,36 @@ static inline void reboot_ctrl_write(unsigned char value) {
 	csr_writel(value, 0xe0005800);
 }
 
+/* rgb */
+#define CSR_RGB_BASE 0xe0006000
+#define CSR_RGB_DAT_ADDR 0xe0006000
+#define CSR_RGB_DAT_SIZE 1
+static inline unsigned char rgb_dat_read(void) {
+	unsigned char r = csr_readl(0xe0006000);
+	return r;
+}
+static inline void rgb_dat_write(unsigned char value) {
+	csr_writel(value, 0xe0006000);
+}
+#define CSR_RGB_ADDR_ADDR 0xe0006004
+#define CSR_RGB_ADDR_SIZE 1
+static inline unsigned char rgb_addr_read(void) {
+	unsigned char r = csr_readl(0xe0006004);
+	return r;
+}
+static inline void rgb_addr_write(unsigned char value) {
+	csr_writel(value, 0xe0006004);
+}
+#define CSR_RGB_CTRL_ADDR 0xe0006008
+#define CSR_RGB_CTRL_SIZE 1
+static inline unsigned char rgb_ctrl_read(void) {
+	unsigned char r = csr_readl(0xe0006008);
+	return r;
+}
+static inline void rgb_ctrl_write(unsigned char value) {
+	csr_writel(value, 0xe0006008);
+}
+
 /* timer0 */
 #define CSR_TIMER0_BASE 0xe0002800
 #define CSR_TIMER0_LOAD_ADDR 0xe0002800
diff --git a/sw/include/generated/mem.h b/sw/include/generated/mem.h
index 880c8f6..1e2c605 100644
--- a/sw/include/generated/mem.h
+++ b/sw/include/generated/mem.h
@@ -1,9 +1,6 @@
 #ifndef __GENERATED_MEM_H
 #define __GENERATED_MEM_H
 
-#define VEXRISCV_DEBUG_BASE 0xf00f0000
-#define VEXRISCV_DEBUG_SIZE 0x00000010
-
 #define SRAM_BASE 0x10000000
 #define SRAM_SIZE 0x00020000