473 lines
		
	
	
		
			14 KiB
		
	
	
	
		
			HTML
		
	
	
	
	
	
			
		
		
	
	
			473 lines
		
	
	
		
			14 KiB
		
	
	
	
		
			HTML
		
	
	
	
	
	
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	<title>Fomu: An FPGA in your USB Port</title>
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	<meta name="author" content="Sean "xobs" Cross">
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			* ZOOM REVERSE TRANSITION (i.e. zoom out)
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</head>
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<body>
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	<!-- Start of main presentation -->
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	<div class="reveal">
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		<div class="footer">
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			<a class="url" href="https://p.xobs.io/td19/">p.xobs.io/td19</a>
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			<span class="theme">Teardown 2019</span><span class="hashtag"> | #teardown2019</span><span class="twitter"> |
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				@teardown</span>
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		</div>
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		<div class="slides">
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			<section>
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				<h2>Fomu: an FPGA in your USB Port</h2>
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				<img src="img/tomu-fomu-case-superwide.jpg">
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				<p>
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					Pre-order now on Crowd Supply!  <a href="https://t.xobs.io/fomu">t.xobs.io/fomu</a>
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				</p>
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			</section>
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			<section data-background-image="css/theme/lca2019-title-bg-transparent.svg">
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				<h1>Fomu: An FPGA in your USB Port</h1>
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				<h4>A whirlwind introduction to Fomu; a workshop in three levels</h4>
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				<p align="right">
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					<small>Sean Cross - <a href="https://xobs.io/">https://xobs.io/</a> - @xobs</small>
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				</p>
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			</section>
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			<section>
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				<h2>Levels of Fomu</h2>
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				<p>
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					Fomu aims to be accessable on three levels:
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					<ol>
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						<li>Python / Interpreted</li>
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						<li>RISC-V</li>
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						<li>Verilog / FPGA</li>
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					</ol>
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				</p>
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			</section>
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			<section>
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				<h2>Workshop Outline</h2>
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				<ol>
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					<li>What do I need to get started?</li>
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					<li>What is an FPGA, and what is Fomu?</li>
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					<li>What makes Fomu special?</li>
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					<li>What can I do with Fomu?</li>
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				</ol>
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			</section>
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			<section>
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				<section>
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					<h2>What do I need to get started?</h2>
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					<ol>
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						<li>DFU utilities</li>
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						<li>Serial console</li>
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						<li>RISC-V toolchain</li>
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						<li>Synthesis</li>
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						<li>Place-and-Route</li>
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						<li>Packer</li>
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						<li>Python 3</li>
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					</ol>
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				</section>
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			</section>
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			<section>
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				<section>
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					<h2>What is an FPGA?</h2>
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					<img data-src="img/ice40-lut.png" alt="SB_LUT4">
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					<!--
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						<p>
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							An FPGA is a chip that executes logic.
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						</p>
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						<p>
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							FPGAs are measured in resources called LUTs or LCs.
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						</p>
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					-->
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				</section>
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				<section>
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					<h2>What is an FPGA?</h2>
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					<pre><code class="verilog" data-trim>
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						module example (output reg [0:5] Q, input C);
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							reg [0:8] counter;
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							always @(posedge C)
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							begin
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								counter <= counter + 1'b1;
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								Q = counter[7] ^ counter[5] | counter<<2;
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							end
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						endmodule
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					</code></pre>
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					<img class="fragment" data-src="img/verilog-synthesis.png" alt="Verilog Synthesis">
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				</section>
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				<section>
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					<h2>About the ICE40UP5K</h2>
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					<ol>
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						<li>5280 4-input LUTs (LC)</li>
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						<li>16 kilobytes BRAM</li>
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						<li class="fragment highlight-blue">128 kilobytes "SPRAM"</li>
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						<li>Current-limited 3-channel LED driver</li>
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						<li>2x I2C and 2x SPI</li>
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						<li>8 16-bit DSP units</li>
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						<li class="fragment highlight-blue">Warmboot capability</li>
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					</ol>
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				</section>
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				<section>
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					<h2>What is Fomu?</h2>
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					<ul>
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						<li>ICE40UP5K</li>
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						<li>2MB flash memory</li>
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						<li>Four edge-plated pads</li>
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						<li>ESD protection</li>
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						<li>USB implemented in HDL</li>
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						<li class="fragment highlight-blue">Fits in your USB port</li>
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					</ul>
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					<!-- <p>
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						Fomu is an FPGA that fits in your USB port.  It has foru buttons, 2 MB of SPI flash, an RGB LED, and an ICE40UP5K with 5280 LCs.  It also has 128 kB of dedicated RAM, not counting the block RAM.
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						Unlike many other PCBs, Fomu does not have a separate USB controller chip.  This means that any projects that want to use the USB port must include a USB softcore.
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					</p> -->
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				</section>
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				<section>
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					<h2>What is this PCB?</h2>
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					<img data-src="img/tomu-fpga-evt-1-small.jpg" alt="Fomu EVT1">
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					<h3>Fomu EVT1</h3>
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					<!-- <p>
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						This is Fomu EVT1.  This is the original stretch prototype of Fomu.  The schematics are the same, but much has changed:
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						* Name changed from Tomu-FPGA to Fomu
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						* Package changed from SG48 to WLCSP32
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						Additionally, some patches were needed to get this PCB working:
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						* SO-8 for SPI flash was too small
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						* Crystal footprint was upside-down
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						These are yours to take home with you!
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						Differences between EVT1 and EVT3:
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						* Silkscreen on Raspberry Pi header
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						* Populate Raspberry Pi header
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						* Add PMOD pins to touchpads
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						* Swap PMODa pins for I3C
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					</p> -->
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				</section>
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				<section>
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					<h2>What modifications does it have?</h2>
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					<ul>
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						<li>Shorting out two zero-ohm resistors (R7, PU)</li>
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						<li>Programming SPI flash</li>
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						<li>Bending SPI flash pins inward (U4)</li>
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						<li>Mounting crystal on its side (U7)</li>
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						<li>Attaching power to crystal</li>
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					</ul>
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				</section>
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				<section>
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					<h2>Fomu Block Design Diagram</h2>
 | 
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					<img data-src="img/fomu-block-diagram.png" alt="Fomu block diagram">
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				</section>
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				<section>
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					<h2>Fomu SPI Flash Layout</h2>
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					<img data-src="img/fomu-memory-layout.png" alt="Fomu memory layout">
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					<!-- <ol>
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						<li>Bootloader</li>
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						<li>Recovery</li>
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						<li>Magic constants</li>
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						<li>Interpreters</li>
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						<li>Updates</li>
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					</ol> -->
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				</section>		
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			</section>
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			<section>
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				<section>
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					<h2>Working with Fomu</h2>
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				</section>
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				<section>
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					<h2>"fail safe" bootloader</h2>
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					Using dfu
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				</section>
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				<section>
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					<h2>Updating Fomu</h2>
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					<pre><code>$ dfu-util -l
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Found DFU: [1209:5bf0] name="Fomu DFU Bootloader v1.7.2"
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$ dfu-util -D evt-installable.dfu
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Download        [=========                ]  36%   38912 bytes
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Download done.
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$ dfu-util -l
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Found DFU: [1209:5bf0] name="Fomu DFU Bootloader v1.8.1"
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$</code></pre>
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				</section>
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			</section>
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			<section>
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				<section>
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					<h2>Python / Interpreted</h2>
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					<ol>
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						<li><strong>Goal:</strong> Multiple interpreters, auto-reload, USB disk interface</li>
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						<li><strong>Now:</strong> MicroPython binary</li>
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					</ol>
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				</section>
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				<section>
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					<h2>Loading Programs onto Fomu</h2>
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					<pre><code>
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$ dfu-util -l
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Found DFU: [1209:5bf0] name="Fomu DFU Bootloader v1.8.1"
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$ dfu-util -e                  # Boot current program
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$ dfu-util -D new-image.dfu    # Load new program</code></pre>
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					<h3 class="fragment">u<code>5b f0</code>mu</h3>
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				</section>
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				<section>
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					<h2>Loading MicroPython</h2>
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					<pre><code>$ dfu-util -D micropython-fomu.dfu</code></pre>
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				</section>
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				<section>
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					<h2>Connecting via serial</h2>
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					<pre class="fragment"><code>screen /dev/cu.usbserial*</code></pre>
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					<pre class="fragment"><code>screen /dev/ttyACM*</code></pre>
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					<pre class="fragment"><code>Teraterm</code></pre>
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					<pre class="fragment"><code>MicroPython v1.10-296-g0a5a77a on 2019-06-18; fomu with vexriscv
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>>></code></pre>
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				</section>
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				<section>
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					<h2>Interacting with Fomu</h2>
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					<pre><code class="python" data-trim>
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							>>> import fomu
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							>>> rgb = fomu.rgb()
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							>>> rgb.mode("error")
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							>>> 
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					</code></pre>
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				</section>
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				<section>
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					<h2>RGB LEDD reference</h2>
 | 
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					<img data-src="img/ice40-ledd.png" alt="ICE40 LEDD registers">
 | 
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					<pre class="fragment"><code class="python" data-trim>>>> rgb.write_raw(0b0001, 255)
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>>> rgb.write_raw(0b1010, 14)
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>>> rgb.write_raw(0b1011, 1)
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>>> 
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</code></pre>
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				</section>
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				<section>
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					<h2>Future Work</h2>
 | 
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					CircuitPython, etc.
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				</section>
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			</section>
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			<section>
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				<section>
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					<h2>RISC-V code</h2>
 | 
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				</section>
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				<section>
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					<h2>LiteX Model</h2>
 | 
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					<img data-src="img/litex-design.png" alt="LiteX Design">
 | 
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				</section>
 | 
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				<section>
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					<h2>Wishbone Bridge</h2>
 | 
						|
					<img data-src="img/wishbone-usb-debug-bridge.png" alt="Wishbone bridge">
 | 
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				</section>
 | 
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				<section>
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					<h2>CSR Access</h2>
 | 
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					<pre><code class="cpp">#define CSR_VERSION_MAJOR_ADDR 0xe0007000L
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#define CSR_VERSION_MAJOR_SIZE 1
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#define CSR_VERSION_MINOR_ADDR 0xe0007004L
 | 
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#define CSR_VERSION_MINOR_SIZE 1
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#define CSR_VERSION_REVISION_ADDR 0xe0007008L
 | 
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#define CSR_VERSION_REVISION_SIZE 1
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#define CSR_VERSION_GITREV_ADDR 0xe000700cL
 | 
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#define CSR_VERSION_GITREV_SIZE 4
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#define CSR_VERSION_GITEXTRA_ADDR 0xe000701cL
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#define CSR_VERSION_GITEXTRA_SIZE 2
 | 
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</code></pre>
 | 
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Excerpt from <code>csr.h</code>
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				</section>
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 | 
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				<section>
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					<h2>Reading CPU Version</h2>
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					<pre><code class="sh">$ wishbone-tool --pid 0x5bf0 0xe0007000
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Value at e0007000: 00000001
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$ wishbone-tool --pid 0x5bf0 0xe0007004
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Value at e0007004: 00000008
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$ wishbone-tool --pid 0x5bf0 0xe0007008
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Value at e0007008: 00000001</code></pre>
 | 
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				</section>
 | 
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 | 
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				<section>
 | 
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					<h2>Interacting with LEDD directly</h2>
 | 
						|
					<img data-src="img/ice40-ledd.png" alt="ICE40 LEDD registers">
 | 
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					<pre class="fragment"><code class="cpp">#define CSR_RGB_DAT_ADDR 0xe0006800L
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#define CSR_RGB_ADDR_ADDR 0xe0006804L</code></pre>
 | 
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					<pre class="fragment"><code>$ wishbone-tool --pid 0x5bf0 0xe0006804 1
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$ wishbone-tool --pid 0x5bf0 0xe0006800 0xff</code></pre>
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				</section>
 | 
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 | 
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				<section>
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					<h2>Writing RISC-V Code</h2>
 | 
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				</section>
 | 
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			</section>
 | 
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 | 
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			<section>
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				<section>
 | 
						|
					<h2>Hardware Description Language</h2>
 | 
						|
				</section>
 | 
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 | 
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				<section>
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					<h2>Yosys and NextPNR</h2>
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				</section>
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				<section>
 | 
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					<h2>Blinking an LED</h2>
 | 
						|
				</section>
 | 
						|
 | 
						|
				<section>
 | 
						|
					<h2>LiteX and MiGen</h2>
 | 
						|
				</section>
 | 
						|
 | 
						|
				<section>
 | 
						|
					<h2>VexRiscv</h2>
 | 
						|
				</section>
 | 
						|
			</section>
 | 
						|
		</div>
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	</div> <!-- class="reveal" -->
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</html> |