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index: finish up to the end of risc-v 

Signed-off-by: Sean Cross <sean@xobs.io>
This commit is contained in:
Sean Cross 2019-06-18 20:04:33 -07:00
parent 03aab024d6
commit c84d5d9e50
5 changed files with 37 additions and 6 deletions
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index.html
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@ -183,11 +183,12 @@
<section>
<h2>What is Fomu?</h2>
<ul>
<li>ICE40UP5K in your USB port</li>
<li>ICE40UP5K</li>
<li>2MB flash memory</li>
<li>Four edge-plated pads</li>
<li>ESD protection</li>
<li>USB implemented in HDL</li>
<li class="fragment highlight-blue">Fits in your USB port</li>
</ul>
<!-- <p>
Fomu is an FPGA that fits in your USB port. It has foru buttons, 2 MB of SPI flash, an RGB LED, and an ICE40UP5K with 5280 LCs. It also has 128 kB of dedicated RAM, not counting the block RAM.
@ -235,6 +236,7 @@
<section>
<h2>Fomu Block Design Diagram</h2>
<img data-src="img/fomu-block-diagram.png" alt="Fomu block diagram">
</section>
<section>
@ -335,19 +337,48 @@ $ dfu-util -D new-image.dfu # Load new program</code></pre>
</section>
<section>
<h2>LiteX Machine Model</h2>
</section>
<section>
<h2>Wishbone Interface</h2>
<h2>LiteX Model</h2>
<img data-src="img/litex-design.png" alt="LiteX Design">
</section>
<section>
<h2>Wishbone Bridge</h2>
<img data-src="img/wishbone-usb-debug-bridge.png" alt="Wishbone bridge">
</section>
<section>
<h2>CSR Access</h2>
<pre><code class="cpp">#define CSR_VERSION_MAJOR_ADDR 0xe0007000L
#define CSR_VERSION_MAJOR_SIZE 1
#define CSR_VERSION_MINOR_ADDR 0xe0007004L
#define CSR_VERSION_MINOR_SIZE 1
#define CSR_VERSION_REVISION_ADDR 0xe0007008L
#define CSR_VERSION_REVISION_SIZE 1
#define CSR_VERSION_GITREV_ADDR 0xe000700cL
#define CSR_VERSION_GITREV_SIZE 4
#define CSR_VERSION_GITEXTRA_ADDR 0xe000701cL
#define CSR_VERSION_GITEXTRA_SIZE 2
</code></pre>
Excerpt from <code>csr.h</code>
</section>
<section>
<h2>Reading CPU Version</h2>
<pre><code class="sh">$ wishbone-tool --pid 0x5bf0 0xe0007000
Value at e0007000: 00000001
$ wishbone-tool --pid 0x5bf0 0xe0007004
Value at e0007004: 00000008
$ wishbone-tool --pid 0x5bf0 0xe0007008
Value at e0007008: 00000001</code></pre>
</section>
<section>
<h2>Interacting with LEDD directly</h2>
<img data-src="img/ice40-ledd.png" alt="ICE40 LEDD registers">
<pre class="fragment"><code class="cpp">#define CSR_RGB_DAT_ADDR 0xe0006800L
#define CSR_RGB_ADDR_ADDR 0xe0006804L</code></pre>
<pre class="fragment"><code>$ wishbone-tool --pid 0x5bf0 0xe0006804 1
$ wishbone-tool --pid 0x5bf0 0xe0006800 0xff</code></pre>
</section>
<section>