Commit Graph

11 Commits

Author SHA1 Message Date
9e6faf4456 sch: mark VCCPLL regulator as DNP, use filter circuit
The VCCPLL line is extraordinarily sensitive to voltage rise times, and
appears to cause the FPGA to go into latchup very very easily.

As a result, the VCCPLL regulator burns all 250 mA of its budget
constantly, as the FPGA shunts VCCPLL to GND.  This would be ideal
during an ESD event, but not ideal during normal operations.

Indicate the VCCPLL Regulator approach is DNP, and that the VCCPLL
Filter Network is preferred.  Mostly because the regulator doesn't work
at all.

Signed-off-by: Sean Cross <sean@xobs.io>
2018-11-23 15:56:35 +08:00
6a392e57d2 pcb: rework pcb with correct footprints, add tvs diodes
Add TVS diodes, so we make sure they work.

Also, rework the PCB so that the clock actually functions now.

Signed-off-by: Sean Cross <sean@xobs.io>
2018-11-20 22:51:43 +08:00
cd761fe680 hardware: cache: update cached library
Signed-off-by: Sean Cross <sean@xobs.io>
2018-11-13 10:43:34 +08:00
6c95306fbb hardware: misc kicad-related commits
Update the cache file, as well as the evt1 xml source file.

Signed-off-by: Sean Cross <sean@xobs.io>
2018-11-10 12:25:48 +08:00
37899c600b hardware: pcb: move pin headers into local repo
Move the new PMOD pin headers from KiCad into the local repo, so that it
no longer depends on KiCad version.

Signed-off-by: Sean Cross <sean@xobs.io>
2018-11-02 19:21:48 +08:00
74d402417b hardware: tomu-fpga-cache: add conn-1x6 for PMOD
This connector is used for the PMOD, so add it to the schematic library.

Signed-off-by: Sean Cross <sean@xobs.io>
2018-11-02 11:35:28 +08:00
b26b71343d hardware: first fully-routed PCB
The PCB is terrible, and probably would have all sorts of issues.  Will
rip it up and try again tomorrow.

Signed-off-by: Sean Cross <sean@xobs.io>
2018-10-31 22:28:10 +08:00
d99d091d95 pcb: schematic-cache: add Raspberry Pi, new SPI Flash
This reworks the SPI Flash layout and adds the Raspberry Pi header.

Signed-off-by: Sean Cross <sean@xobs.io>
2018-10-31 10:34:33 +08:00
0973972464 hardware: pcb: add SPI debug header
This will be used to program SPI during board bringup.

Signed-off-by: Sean Cross <sean@xobs.io>
2018-10-30 22:28:08 +08:00
76f7bf2548 pcb: sch: make ICE40 VCCPLL a power input
For some reason, this pin was listed as a `power output`, which does not
appear to be the case.  Due to this error, the DRC would fail when using
a regulator directly connected to the pin.

Mark this pin as a `power input` to fix this, since it's really where
power goes into the chip.

Signed-off-by: Sean Cross <sean@xobs.io>
2018-10-30 19:13:32 +08:00
ab33b4a0a1 hardware: rename tomu-fpga to pcb
This more closely reflects what it actually is.

Signed-off-by: Sean Cross <sean@xobs.io>
2018-10-30 17:05:02 +08:00