926f7424dc
sch: give part number for SPI Flash as Value
...
Rather than just having the part number in the "MPN" field, tack it on
to the "Value" field as well so that it shows up in the plotted
schematic.
Signed-off-by: Sean Cross <sean@xobs.io>
2019-05-21 09:48:28 +08:00
e75ca1a362
hardware: sch: move i2c pins to pmoda pins 3 and 4
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The PMOD standard generally puts I2C pins on pins 3 and 4 of a PMOD
header.
Signed-off-by: Sean Cross <sean@xobs.io>
2018-12-29 13:22:53 +01:00
50f783ba42
sch: change name to "Fomu"
...
Signed-off-by: Sean Cross <sean@xobs.io>
2018-12-25 12:16:19 +08:00
10352f9564
hardware: sch: update text to read "evt3"
...
Signed-off-by: Sean Cross <sean@xobs.io>
2018-12-25 10:23:05 +08:00
83d368c34e
sch: ECO004: add PMODb, swap PMODa_1 and DAT4
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Swap PMODa_1 and DAT4 so that PMODa gets two I3C-capable pins.
Signed-off-by: Sean Cross <sean@xobs.io>
2018-12-25 00:37:21 +08:00
cd4d928adb
hardware: sch: fix up DNP columns
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Mark parts as DNP with an "X" in the "DNP" column.
Signed-off-by: Sean Cross <sean@xobs.io>
2018-11-29 08:52:07 -05:00
c9d52e9802
hardware: sch: re-number DBG pins to be consecutive
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Since there are only 6 pins, it doesn't make sense to have numbers such
as "DBG_10" and "DBG_9" anymore.
Signed-off-by: Sean Cross <sean@xobs.io>
2018-11-23 16:13:29 +08:00
f318629747
hardware: sch: update designation to EVT2
...
Signed-off-by: Sean Cross <sean@xobs.io>
2018-11-23 15:59:28 +08:00
9e6faf4456
sch: mark VCCPLL regulator as DNP, use filter circuit
...
The VCCPLL line is extraordinarily sensitive to voltage rise times, and
appears to cause the FPGA to go into latchup very very easily.
As a result, the VCCPLL regulator burns all 250 mA of its budget
constantly, as the FPGA shunts VCCPLL to GND. This would be ideal
during an ESD event, but not ideal during normal operations.
Indicate the VCCPLL Regulator approach is DNP, and that the VCCPLL
Filter Network is preferred. Mostly because the regulator doesn't work
at all.
Signed-off-by: Sean Cross <sean@xobs.io>
2018-11-23 15:56:35 +08:00
6a392e57d2
pcb: rework pcb with correct footprints, add tvs diodes
...
Add TVS diodes, so we make sure they work.
Also, rework the PCB so that the clock actually functions now.
Signed-off-by: Sean Cross <sean@xobs.io>
2018-11-20 22:51:43 +08:00
a4fdc6365d
hardware: sch: use local copy of 20pin header
...
Signed-off-by: Sean Cross <sean@xobs.io>
2018-11-13 10:41:16 +08:00
ac7446dc12
hardware: sch: change "value" for user switches
...
Change the "Value" of the user switch from "USER1" and "USER2" to "5"
and "6". This way we can use the "Value" as the silk rather than adding
another text layer.
Signed-off-by: Sean Cross <sean@xobs.io>
2018-11-10 12:11:11 +08:00
da8ede5f75
hardware: fix USB footprint being mirrored
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That could have been bad.
Signed-off-by: Sean Cross <sean@xobs.io>
2018-11-02 20:38:34 +08:00
8bb0524872
hardware: sch: provide APN for RGB LED
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Provide an alternate part number for the RGB LED, since the current one
is hard to source.
Signed-off-by: Sean Cross <sean@xobs.io>
2018-11-02 19:48:25 +08:00
c02b3ef4ac
hardware: sch: add PMOD connector
...
Signed-off-by: Sean Cross <sean@xobs.io>
2018-11-02 11:37:40 +08:00
b26b71343d
hardware: first fully-routed PCB
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The PCB is terrible, and probably would have all sorts of issues. Will
rip it up and try again tomorrow.
Signed-off-by: Sean Cross <sean@xobs.io>
2018-10-31 22:28:10 +08:00
1acf50df39
hardware: sch: use footprints from tomu-fpga
...
Use our local copy of footprints, which are guaranteed not to change
between Kicad versions.
Signed-off-by: Sean Cross <sean@xobs.io>
2018-10-31 16:03:06 +08:00
061b2c81a7
hardware: sch: map remaining footprints
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Add footprints for the remaining schematic components.
Signed-off-by: Sean Cross <sean@xobs.io>
2018-10-31 12:57:33 +08:00
a715f5c728
hardware: add testpoints for SPI programming
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This will become necessary when doing factory burning.
Signed-off-by: Sean Cross <sean@xobs.io>
2018-10-31 10:54:13 +08:00
30b7610996
pcb: hook up more debug wires
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We have spare pins, so run more debug wires.
Many of these will probably get cut when doing the PCB layout.
Signed-off-by: Sean Cross <sean@xobs.io>
2018-10-31 10:45:27 +08:00
4fe5f8f629
hardware: sch: use raspberry pi header, rework signaling
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Rework the signaling to send everything to a Raspberry Pi header.
Signed-off-by: Sean Cross <sean@xobs.io>
2018-10-31 10:36:01 +08:00
0973972464
hardware: pcb: add SPI debug header
...
This will be used to program SPI during board bringup.
Signed-off-by: Sean Cross <sean@xobs.io>
2018-10-30 22:28:08 +08:00
78bb283bc6
hardware: sch: populate SPI, /RESET pullups
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It turns out these resistors are important.
Signed-off-by: Sean Cross <sean@xobs.io>
2018-10-30 19:21:01 +08:00
f06ef4a7d5
hardware: sch: add crystal, VCCPLL regulator
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Add a crystal, so we can test to make sure it works.
Also add a second regulator dedicated to VCCPLL in an effort to
cost-down the capacitor and large components that shouldn't be
necessary.
Signed-off-by: Sean Cross <sean@xobs.io>
2018-10-30 19:14:33 +08:00
ab18c90450
hardware: sch: specify spinor part
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SPINOR parts are largely interchangeable. Pick one.
Signed-off-by: Sean Cross <sean@xobs.io>
2018-10-30 17:09:11 +08:00
c7bfc248af
pcb: sch: renumber schematic
...
Renumber the schematic again, as things have shifted around a bit.
Signed-off-by: Sean Cross <sean@xobs.io>
2018-10-30 17:06:04 +08:00
ab33b4a0a1
hardware: rename tomu-fpga to pcb
...
This more closely reflects what it actually is.
Signed-off-by: Sean Cross <sean@xobs.io>
2018-10-30 17:05:02 +08:00
