Commit Graph

8 Commits

Author SHA1 Message Date
a6fa6cf3e9 hardware: footprints: cleanup ice40 footprints
Signed-off-by: Sean Cross <sean@xobs.io>
2018-11-06 19:42:01 +08:00
bbc18d2a90 hardware: sch: work-in-progress to go from QFN to WLCSP
Signed-off-by: Sean Cross <sean@xobs.io>
2018-11-05 13:03:36 +08:00
34f74fbf51 hardware: sch: first draft of dvt1
This removes much of the support debugging stuff from evt1.  Still to
do:

- Assign footprints
- Figure out which PU resistor to include (if any)
- Figure out if we need to keep the USB buffering
- Remove extra decoupling caps

Signed-off-by: Sean Cross <sean@xobs.io>
2018-11-04 22:00:23 +08:00
37899c600b hardware: pcb: move pin headers into local repo
Move the new PMOD pin headers from KiCad into the local repo, so that it
no longer depends on KiCad version.

Signed-off-by: Sean Cross <sean@xobs.io>
2018-11-02 19:21:48 +08:00
b26b71343d hardware: first fully-routed PCB
The PCB is terrible, and probably would have all sorts of issues.  Will
rip it up and try again tomorrow.

Signed-off-by: Sean Cross <sean@xobs.io>
2018-10-31 22:28:10 +08:00
eb93c70f01 hardware: sch: restructure SPI Flash symbol
It's much cleaner if we put power pins on one side and signal pins on
the other.  This removes the ratsnest that was building up.

Signed-off-by: Sean Cross <sean@xobs.io>
2018-10-31 10:35:19 +08:00
76f7bf2548 pcb: sch: make ICE40 VCCPLL a power input
For some reason, this pin was listed as a `power output`, which does not
appear to be the case.  Due to this error, the DRC would fail when using
a regulator directly connected to the pin.

Mark this pin as a `power input` to fix this, since it's really where
power goes into the chip.

Signed-off-by: Sean Cross <sean@xobs.io>
2018-10-30 19:13:32 +08:00
ab33b4a0a1 hardware: rename tomu-fpga to pcb
This more closely reflects what it actually is.

Signed-off-by: Sean Cross <sean@xobs.io>
2018-10-30 17:05:02 +08:00