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hardware: sch: complete schematic layout of DVT1

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This is the first cut of a schematic layout of DVT1.

It includes all the decoupling caps still.  We'll need to see if they're
kept around.

Signed-off-by: Sean Cross <sean@xobs.io>
This commit is contained in:
Sean Cross 2018-11-06 19:43:31 +08:00
parent a6fa6cf3e9
commit 596c686249
1 changed files with 197 additions and 138 deletions
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335
hardware/pcb/tomu-fpga.sch
View File

@ -6,10 +6,10 @@ $Descr A4 11693 8268
encoding utf-8 encoding utf-8
Sheet 1 1 Sheet 1 1
Title "Tomu FPGA" Title "Tomu FPGA"
Date "2018-10-30" Date "2018-11-06"
Rev "EVT1" Rev "DVT1"
Comp "Foosn PTE Ltd." Comp "Foosn PTE Ltd."
Comment1 "Stretch PCB for electrical verification" Comment1 "Tomu - An FPGA in your USB port"
Comment2 "" Comment2 ""
Comment3 "" Comment3 ""
Comment4 "" Comment4 ""
@ -410,7 +410,7 @@ L Device:R_Small R9
U 1 1 5BDC6632 U 1 1 5BDC6632
P 9150 2400 P 9150 2400
F 0 "R9" V 9150 2400 50 0000 C CNN F 0 "R9" V 9150 2400 50 0000 C CNN
F 1 "0201, 1.5k, 1/16W, 1%" V 9050 2300 50 0000 C CNN F 1 "0201, 1.5k, 1/16W, 1%" V 9250 2250 50 0000 C CNN
F 2 "tomu-fpga:R_0201_0603Metric" H 9150 2400 50 0001 C CNN F 2 "tomu-fpga:R_0201_0603Metric" H 9150 2400 50 0001 C CNN
F 3 "" H 9150 2400 50 0001 C CNN F 3 "" H 9150 2400 50 0001 C CNN
F 4 "ANY" H 650 200 50 0001 C CNN "MPN" F 4 "ANY" H 650 200 50 0001 C CNN "MPN"
@ -487,13 +487,12 @@ U 1 1 5BE44C19
P 5300 1200 P 5300 1200
F 0 "SW2" H 5350 1650 50 0000 C CNN F 0 "SW2" H 5350 1650 50 0000 C CNN
F 1 "Captouch Pads" H 5150 1750 50 0000 C CNN F 1 "Captouch Pads" H 5150 1750 50 0000 C CNN
F 2 "tomu-fpga:Touchpads" H 5350 1200 50 0001 C CNN F 2 "tomu-fpga:captouch-edge" H 5350 1200 50 0001 C CNN
F 3 "" H 5350 1200 50 0001 C CNN F 3 "" H 5350 1200 50 0001 C CNN
F 4 "DNP" H 5300 1200 50 0001 C CNN "MPN" F 4 "DNP" H 5300 1200 50 0001 C CNN "MPN"
F 5 "DNP" H 5300 1200 50 0001 C CNN "Manufacturer" F 5 "DNP" H 5300 1200 50 0001 C CNN "Manufacturer"
F 6 "DNP" H 5300 1200 50 0001 C CNN "MYPN" F 6 "DNP" H 5300 1200 50 0001 C CNN "MYPN"
F 7 "" H 5300 1200 50 0001 C CNN "DPN" F 7 "PCB-etched captouch pads" H -200 -1000 50 0001 C CNN "Description"
F 8 "PCB-etched captouch pads" H -200 -1000 50 0001 C CNN "Description"
1 5300 1200 1 5300 1200
0 -1 -1 0 0 -1 -1 0
$EndComp $EndComp
@ -1236,7 +1235,7 @@ U 3 1 5C122A3A
P 6450 1750 P 6450 1750
F 0 "U5" H 6050 1200 50 0000 L CNN F 0 "U5" H 6050 1200 50 0000 L CNN
F 1 "ICE40UP5K-UWG30" H 6050 1100 50 0000 L CNN F 1 "ICE40UP5K-UWG30" H 6050 1100 50 0000 L CNN
F 2 "tomu-fpga:QFN-48-1EP_7x7mm_P0.5mm_EP5.6x5.6mm" H 6450 400 50 0001 C CNN F 2 "tomu-fpga:iCE40UP5K-UWG30" H 6450 400 50 0001 C CNN
F 3 "http://www.latticesemi.com/Products/FPGAandCPLD/iCE40Ultra" H 6050 2750 50 0001 C CNN F 3 "http://www.latticesemi.com/Products/FPGAandCPLD/iCE40Ultra" H 6050 2750 50 0001 C CNN
F 4 "ICE40UP5K-UWG30ITR" H 400 -900 50 0001 C CNN "MPN" F 4 "ICE40UP5K-UWG30ITR" H 400 -900 50 0001 C CNN "MPN"
F 5 " ICE40UP5K-UWG30ITR-ND " H 400 -900 50 0001 C CNN "DPN" F 5 " ICE40UP5K-UWG30ITR-ND " H 400 -900 50 0001 C CNN "DPN"
@ -1251,7 +1250,7 @@ U 4 1 5C122B60
P 10200 4800 P 10200 4800
F 0 "U5" H 9850 4250 50 0000 C CNN F 0 "U5" H 9850 4250 50 0000 C CNN
F 1 "ICE40UP5K-UWG30" H 10150 4150 50 0000 C CNN F 1 "ICE40UP5K-UWG30" H 10150 4150 50 0000 C CNN
F 2 "tomu-fpga:QFN-48-1EP_7x7mm_P0.5mm_EP5.6x5.6mm" H 10200 3450 50 0001 C CNN F 2 "tomu-fpga:iCE40UP5K-UWG30" H 10200 3450 50 0001 C CNN
F 3 "http://www.latticesemi.com/Products/FPGAandCPLD/iCE40Ultra" H 9800 5800 50 0001 C CNN F 3 "http://www.latticesemi.com/Products/FPGAandCPLD/iCE40Ultra" H 9800 5800 50 0001 C CNN
F 4 "ICE40UP5K-UWG30ITR" H 550 -300 50 0001 C CNN "MPN" F 4 "ICE40UP5K-UWG30ITR" H 550 -300 50 0001 C CNN "MPN"
F 5 " ICE40UP5K-UWG30ITR-ND " H 550 -300 50 0001 C CNN "DPN" F 5 " ICE40UP5K-UWG30ITR-ND " H 550 -300 50 0001 C CNN "DPN"
@ -1266,7 +1265,7 @@ U 1 1 5C1645BF
P 1650 7000 P 1650 7000
F 0 "U4" H 1675 7815 50 0000 C CNN F 0 "U4" H 1675 7815 50 0000 C CNN
F 1 "SPI Flash" H 1675 7724 50 0000 C CNN F 1 "SPI Flash" H 1675 7724 50 0000 C CNN
F 2 "tomu-fpga:SOIC-8" H 1450 7000 50 0001 C CNN F 2 "tomu-fpga:USON8_2X3MM" H 1450 7000 50 0001 C CNN
F 3 "http://www.winbond.com/resource-files/w25q128jv_dtr%20revc%2003272018%20plus.pdf" H 1450 7000 50 0001 C CNN F 3 "http://www.winbond.com/resource-files/w25q128jv_dtr%20revc%2003272018%20plus.pdf" H 1450 7000 50 0001 C CNN
F 4 "W25Q128JVSIMCT-ND" H -450 -1450 50 0001 C CNN "DPN" F 4 "W25Q128JVSIMCT-ND" H -450 -1450 50 0001 C CNN "DPN"
F 5 "W25Q128JVSIM" H -450 -1450 50 0001 C CNN "MPN" F 5 "W25Q128JVSIM" H -450 -1450 50 0001 C CNN "MPN"
@ -1339,8 +1338,6 @@ Wire Wire Line
Connection ~ 1900 4850 Connection ~ 1900 4850
Wire Wire Line Wire Wire Line
1900 4850 1900 5050 1900 4850 1900 5050
Text Label 7100 4500 0 50 ~ 0
DBG_18
Wire Wire Line Wire Wire Line
8700 1900 9000 1900 8700 1900 9000 1900
Connection ~ 9000 1900 Connection ~ 9000 1900
@ -1363,21 +1360,21 @@ LED_G
Text Label 9050 2800 0 50 ~ 0 Text Label 9050 2800 0 50 ~ 0
LED_R LED_R
Wire Wire Line Wire Wire Line
9850 2600 9800 2600 9850 2600 9700 2600
Wire Wire Line Wire Wire Line
9800 2600 9800 2900 9700 2600 9700 2900
Wire Wire Line Wire Wire Line
9800 2900 9650 2900 9700 2900 9400 2900
Wire Wire Line Wire Wire Line
9850 2700 9750 2700 9850 2700 9600 2700
Wire Wire Line Wire Wire Line
9750 2700 9750 2600 9600 2700 9600 2600
Wire Wire Line Wire Wire Line
9700 2800 9700 2700 9500 2800 9500 2700
Wire Wire Line Wire Wire Line
9700 2800 9850 2800 9500 2800 9850 2800
Wire Wire Line Wire Wire Line
9650 2800 9650 2900 9400 2800 9400 2900
Text Label 9550 1900 0 50 ~ 0 Text Label 9550 1900 0 50 ~ 0
ICE_USBP ICE_USBP
Text Label 9550 1800 0 50 ~ 0 Text Label 9550 1800 0 50 ~ 0
@ -1400,7 +1397,7 @@ U 1 1 5C1225F9
P 10400 2400 P 10400 2400
F 0 "U5" H 10100 1250 50 0000 L CNN F 0 "U5" H 10100 1250 50 0000 L CNN
F 1 "ICE40UP5K-UWG30" H 10100 1150 50 0000 L CNN F 1 "ICE40UP5K-UWG30" H 10100 1150 50 0000 L CNN
F 2 "tomu-fpga:QFN-48-1EP_7x7mm_P0.5mm_EP5.6x5.6mm" H 10400 1050 50 0001 C CNN F 2 "tomu-fpga:iCE40UP5K-UWG30" H 10400 1050 50 0001 C CNN
F 3 "http://www.latticesemi.com/Products/FPGAandCPLD/iCE40Ultra" H 10000 3400 50 0001 C CNN F 3 "http://www.latticesemi.com/Products/FPGAandCPLD/iCE40Ultra" H 10000 3400 50 0001 C CNN
F 4 "ICE40UP5K-UWG30ITR" H 650 100 50 0001 C CNN "MPN" F 4 "ICE40UP5K-UWG30ITR" H 650 100 50 0001 C CNN "MPN"
F 5 " ICE40UP5K-UWG30ITR-ND " H 650 100 50 0001 C CNN "DPN" F 5 " ICE40UP5K-UWG30ITR-ND " H 650 100 50 0001 C CNN "DPN"
@ -1529,207 +1526,207 @@ Wire Wire Line
$Comp $Comp
L tomu-fpga:Testpoint TP2 L tomu-fpga:Testpoint TP2
U 1 1 5C03018F U 1 1 5C03018F
P 5350 4650 P 5250 4500
F 0 "TP2" H 5500 4700 50 0000 C CNN F 0 "TP2" H 5400 4550 50 0000 C CNN
F 1 "Testpoint" H 5800 4700 50 0000 C CNN F 1 "Testpoint" H 5700 4550 50 0000 C CNN
F 2 "" H 5350 4650 50 0001 C CNN F 2 "tomu-fpga:testpoint" H 5250 4500 50 0001 C CNN
F 3 "" H 5350 4650 50 0001 C CNN F 3 "" H 5250 4500 50 0001 C CNN
1 5350 4650 1 5250 4500
-1 0 0 1 -1 0 0 1
$EndComp $EndComp
Wire Wire Line Wire Wire Line
5500 4700 5950 4700 5400 4550 5850 4550
Text Label 5550 4700 0 50 ~ 0 Text Label 5450 4550 0 50 ~ 0
SPI_MOSI SPI_MOSI
Text Label 5550 4850 0 50 ~ 0 Text Label 5450 4700 0 50 ~ 0
SPI_MISO SPI_MISO
$Comp $Comp
L tomu-fpga:Testpoint TP3 L tomu-fpga:Testpoint TP3
U 1 1 5C042DE8 U 1 1 5C042DE8
P 5350 4800 P 5250 4650
F 0 "TP3" H 5500 4850 50 0000 C CNN F 0 "TP3" H 5400 4700 50 0000 C CNN
F 1 "Testpoint" H 5800 4850 50 0000 C CNN F 1 "Testpoint" H 5700 4700 50 0000 C CNN
F 2 "" H 5350 4800 50 0001 C CNN F 2 "tomu-fpga:testpoint" H 5250 4650 50 0001 C CNN
F 3 "" H 5350 4800 50 0001 C CNN F 3 "" H 5250 4650 50 0001 C CNN
1 5350 4800 1 5250 4650
-1 0 0 1 -1 0 0 1
$EndComp $EndComp
Wire Wire Line Wire Wire Line
5500 4850 5950 4850 5400 4700 5850 4700
$Comp $Comp
L tomu-fpga:Testpoint TP4 L tomu-fpga:Testpoint TP4
U 1 1 5C068EF3 U 1 1 5C068EF3
P 5350 4950 P 5250 4800
F 0 "TP4" H 5500 5000 50 0000 C CNN F 0 "TP4" H 5400 4850 50 0000 C CNN
F 1 "Testpoint" H 5800 5000 50 0000 C CNN F 1 "Testpoint" H 5700 4850 50 0000 C CNN
F 2 "" H 5350 4950 50 0001 C CNN F 2 "tomu-fpga:testpoint" H 5250 4800 50 0001 C CNN
F 3 "" H 5350 4950 50 0001 C CNN F 3 "" H 5250 4800 50 0001 C CNN
1 5350 4950 1 5250 4800
-1 0 0 1 -1 0 0 1
$EndComp $EndComp
Wire Wire Line Wire Wire Line
5500 5000 5950 5000 5400 4850 5850 4850
$Comp $Comp
L tomu-fpga:Testpoint TP5 L tomu-fpga:Testpoint TP5
U 1 1 5C068EFC U 1 1 5C068EFC
P 5350 5100 P 5250 4950
F 0 "TP5" H 5500 5150 50 0000 C CNN F 0 "TP5" H 5400 5000 50 0000 C CNN
F 1 "Testpoint" H 5800 5150 50 0000 C CNN F 1 "Testpoint" H 5700 5000 50 0000 C CNN
F 2 "" H 5350 5100 50 0001 C CNN F 2 "tomu-fpga:testpoint" H 5250 4950 50 0001 C CNN
F 3 "" H 5350 5100 50 0001 C CNN F 3 "" H 5250 4950 50 0001 C CNN
1 5350 5100 1 5250 4950
-1 0 0 1 -1 0 0 1
$EndComp $EndComp
Wire Wire Line Wire Wire Line
5500 5150 5950 5150 5400 5000 5850 5000
Text Label 5550 5000 0 50 ~ 0 Text Label 5450 4850 0 50 ~ 0
SPI_CS SPI_CS
Text Label 5550 5150 0 50 ~ 0 Text Label 5450 5000 0 50 ~ 0
SPI_CLK SPI_CLK
Text Label 5550 5300 0 50 ~ 0 Text Label 5450 5150 0 50 ~ 0
SPI_IO2 SPI_IO2
Text Label 5550 5450 0 50 ~ 0 Text Label 5450 5300 0 50 ~ 0
SPI_IO3 SPI_IO3
$Comp $Comp
L tomu-fpga:Testpoint TP6 L tomu-fpga:Testpoint TP6
U 1 1 5C07C50C U 1 1 5C07C50C
P 5350 5250 P 5250 5100
F 0 "TP6" H 5500 5300 50 0000 C CNN F 0 "TP6" H 5400 5150 50 0000 C CNN
F 1 "Testpoint" H 5800 5300 50 0000 C CNN F 1 "Testpoint" H 5700 5150 50 0000 C CNN
F 2 "" H 5350 5250 50 0001 C CNN F 2 "tomu-fpga:testpoint" H 5250 5100 50 0001 C CNN
F 3 "" H 5350 5250 50 0001 C CNN F 3 "" H 5250 5100 50 0001 C CNN
1 5350 5250 1 5250 5100
-1 0 0 1 -1 0 0 1
$EndComp $EndComp
$Comp $Comp
L tomu-fpga:Testpoint TP7 L tomu-fpga:Testpoint TP7
U 1 1 5C07C63D U 1 1 5C07C63D
P 5350 5400 P 5250 5250
F 0 "TP7" H 5500 5450 50 0000 C CNN F 0 "TP7" H 5400 5300 50 0000 C CNN
F 1 "Testpoint" H 5800 5450 50 0000 C CNN F 1 "Testpoint" H 5700 5300 50 0000 C CNN
F 2 "" H 5350 5400 50 0001 C CNN F 2 "tomu-fpga:testpoint" H 5250 5250 50 0001 C CNN
F 3 "" H 5350 5400 50 0001 C CNN F 3 "" H 5250 5250 50 0001 C CNN
1 5350 5400 1 5250 5250
-1 0 0 1 -1 0 0 1
$EndComp $EndComp
Wire Wire Line Wire Wire Line
5500 5300 5950 5300 5400 5150 5850 5150
Wire Wire Line Wire Wire Line
5500 5450 5950 5450 5400 5300 5850 5300
Text Label 5550 5600 0 50 ~ 0 Text Label 5450 5450 0 50 ~ 0
CRESET CRESET
$Comp $Comp
L tomu-fpga:Testpoint TP8 L tomu-fpga:Testpoint TP8
U 1 1 5C0A39C6 U 1 1 5C0A39C6
P 5350 5550 P 5250 5400
F 0 "TP8" H 5500 5600 50 0000 C CNN F 0 "TP8" H 5400 5450 50 0000 C CNN
F 1 "Testpoint" H 5800 5600 50 0000 C CNN F 1 "Testpoint" H 5700 5450 50 0000 C CNN
F 2 "" H 5350 5550 50 0001 C CNN F 2 "tomu-fpga:testpoint" H 5250 5400 50 0001 C CNN
F 3 "" H 5350 5550 50 0001 C CNN F 3 "" H 5250 5400 50 0001 C CNN
1 5350 5550 1 5250 5400
-1 0 0 1 -1 0 0 1
$EndComp $EndComp
Wire Wire Line Wire Wire Line
5500 5600 5950 5600 5400 5450 5850 5450
Text Label 5550 5750 0 50 ~ 0 Text Label 5450 5600 0 50 ~ 0
CDONE CDONE
$Comp $Comp
L tomu-fpga:Testpoint TP9 L tomu-fpga:Testpoint TP9
U 1 1 5C0B4DBE U 1 1 5C0B4DBE
P 5350 5700 P 5250 5550
F 0 "TP9" H 5500 5750 50 0000 C CNN F 0 "TP9" H 5400 5600 50 0000 C CNN
F 1 "Testpoint" H 5800 5750 50 0000 C CNN F 1 "Testpoint" H 5700 5600 50 0000 C CNN
F 2 "" H 5350 5700 50 0001 C CNN F 2 "tomu-fpga:testpoint" H 5250 5550 50 0001 C CNN
F 3 "" H 5350 5700 50 0001 C CNN F 3 "" H 5250 5550 50 0001 C CNN
1 5350 5700 1 5250 5550
-1 0 0 1 -1 0 0 1
$EndComp $EndComp
Wire Wire Line Wire Wire Line
5500 5750 5950 5750 5400 5600 5850 5600
$Comp $Comp
L tomu-fpga:Testpoint TP1 L tomu-fpga:Testpoint TP1
U 1 1 5C0C6529 U 1 1 5C0C6529
P 5350 4500 P 5250 4350
F 0 "TP1" H 5500 4550 50 0000 C CNN F 0 "TP1" H 5400 4400 50 0000 C CNN
F 1 "Testpoint" H 5800 4550 50 0000 C CNN F 1 "Testpoint" H 5700 4400 50 0000 C CNN
F 2 "" H 5350 4500 50 0001 C CNN F 2 "tomu-fpga:testpoint" H 5250 4350 50 0001 C CNN
F 3 "" H 5350 4500 50 0001 C CNN F 3 "" H 5250 4350 50 0001 C CNN
1 5350 4500 1 5250 4350
-1 0 0 1 -1 0 0 1
$EndComp $EndComp
$Comp $Comp
L tomu-fpga:Testpoint TP12 L tomu-fpga:Testpoint TP12
U 1 1 5C0C65AF U 1 1 5C0C65AF
P 5350 6150 P 5250 6000
F 0 "TP12" H 5500 6200 50 0000 C CNN F 0 "TP12" H 5400 6050 50 0000 C CNN
F 1 "Testpoint" H 5800 6200 50 0000 C CNN F 1 "Testpoint" H 5700 6050 50 0000 C CNN
F 2 "" H 5350 6150 50 0001 C CNN F 2 "tomu-fpga:testpoint" H 5250 6000 50 0001 C CNN
F 3 "" H 5350 6150 50 0001 C CNN F 3 "" H 5250 6000 50 0001 C CNN
1 5350 6150 1 5250 6000
-1 0 0 1 -1 0 0 1
$EndComp $EndComp
Text Label 5550 4550 0 50 ~ 0 Text Label 5450 4400 0 50 ~ 0
+5V +5V
Text Label 5550 6200 0 50 ~ 0 Text Label 5450 6050 0 50 ~ 0
GND GND
Text Label 5550 6050 0 50 ~ 0 Text Label 5450 5900 0 50 ~ 0
ICE_USBP ICE_USBP
Text Label 5550 5900 0 50 ~ 0 Text Label 5450 5750 0 50 ~ 0
ICE_USBN ICE_USBN
$Comp $Comp
L tomu-fpga:Testpoint TP10 L tomu-fpga:Testpoint TP10
U 1 1 5C0EA6CF U 1 1 5C0EA6CF
P 5350 5850 P 5250 5700
F 0 "TP10" H 5500 5900 50 0000 C CNN F 0 "TP10" H 5400 5750 50 0000 C CNN
F 1 "Testpoint" H 5800 5900 50 0000 C CNN F 1 "Testpoint" H 5700 5750 50 0000 C CNN
F 2 "" H 5350 5850 50 0001 C CNN F 2 "tomu-fpga:testpoint" H 5250 5700 50 0001 C CNN
F 3 "" H 5350 5850 50 0001 C CNN F 3 "" H 5250 5700 50 0001 C CNN
1 5350 5850 1 5250 5700
-1 0 0 1 -1 0 0 1
$EndComp $EndComp
$Comp $Comp
L tomu-fpga:Testpoint TP11 L tomu-fpga:Testpoint TP11
U 1 1 5C0EA757 U 1 1 5C0EA757
P 5350 6000 P 5250 5850
F 0 "TP11" H 5500 6050 50 0000 C CNN F 0 "TP11" H 5400 5900 50 0000 C CNN
F 1 "Testpoint" H 5800 6050 50 0000 C CNN F 1 "Testpoint" H 5700 5900 50 0000 C CNN
F 2 "" H 5350 6000 50 0001 C CNN F 2 "tomu-fpga:testpoint" H 5250 5850 50 0001 C CNN
F 3 "" H 5350 6000 50 0001 C CNN F 3 "" H 5250 5850 50 0001 C CNN
1 5350 6000 1 5250 5850
-1 0 0 1 -1 0 0 1
$EndComp $EndComp
Wire Wire Line Wire Wire Line
5500 5900 5950 5900 5400 5750 5850 5750
Wire Wire Line Wire Wire Line
5500 6050 5950 6050 5400 5900 5850 5900
Wire Wire Line Wire Wire Line
6150 4550 6150 4400 6050 4400 6050 4250
Wire Wire Line Wire Wire Line
5500 4550 6150 4550 5400 4400 6050 4400
$Comp $Comp
L power:+5V #PWR0101 L power:+5V #PWR0101
U 1 1 5C17A30E U 1 1 5C17A30E
P 6150 4400 P 6050 4250
F 0 "#PWR0101" H 6150 4250 50 0001 C CNN F 0 "#PWR0101" H 6050 4100 50 0001 C CNN
F 1 "+5V" H 6165 4573 50 0000 C CNN F 1 "+5V" H 6065 4423 50 0000 C CNN
F 2 "" H 6150 4400 50 0001 C CNN F 2 "" H 6050 4250 50 0001 C CNN
F 3 "" H 6150 4400 50 0001 C CNN F 3 "" H 6050 4250 50 0001 C CNN
1 6150 4400 1 6050 4250
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
Wire Wire Line Wire Wire Line
6100 6200 6100 6400 6000 6050 6000 6250
Wire Wire Line Wire Wire Line
5500 6200 6100 6200 5400 6050 6000 6050
$Comp $Comp
L power:GND #PWR0102 L power:GND #PWR0102
U 1 1 5C18C8A3 U 1 1 5C18C8A3
P 6100 6400 P 6000 6250
F 0 "#PWR0102" H 6100 6150 50 0001 C CNN F 0 "#PWR0102" H 6000 6000 50 0001 C CNN
F 1 "GND" H 6105 6227 50 0000 C CNN F 1 "GND" H 6005 6077 50 0000 C CNN
F 2 "" H 6100 6400 50 0001 C CNN F 2 "" H 6000 6250 50 0001 C CNN
F 3 "" H 6100 6400 50 0001 C CNN F 3 "" H 6000 6250 50 0001 C CNN
1 6100 6400 1 6000 6250
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
NoConn ~ 2650 5950 NoConn ~ 2650 5950
@ -1747,7 +1744,7 @@ U 2 1 5C122971
P 3250 6500 P 3250 6500
F 0 "U5" H 2900 5950 50 0000 C CNN F 0 "U5" H 2900 5950 50 0000 C CNN
F 1 "ICE40UP5K-UWG30" H 3150 5850 50 0000 C CNN F 1 "ICE40UP5K-UWG30" H 3150 5850 50 0000 C CNN
F 2 "tomu-fpga:QFN-48-1EP_7x7mm_P0.5mm_EP5.6x5.6mm" H 3250 5150 50 0001 C CNN F 2 "tomu-fpga:iCE40UP5K-UWG30" H 3250 5150 50 0001 C CNN
F 3 "http://www.latticesemi.com/Products/FPGAandCPLD/iCE40Ultra" H 2850 7500 50 0001 C CNN F 3 "http://www.latticesemi.com/Products/FPGAandCPLD/iCE40Ultra" H 2850 7500 50 0001 C CNN
F 4 "ICE40UP5K-UWG30ITR" H 3250 6500 50 0001 C CNN "MPN" F 4 "ICE40UP5K-UWG30ITR" H 3250 6500 50 0001 C CNN "MPN"
F 5 "Lattice" H 3250 6500 50 0001 C CNN "Manufacturer" F 5 "Lattice" H 3250 6500 50 0001 C CNN "Manufacturer"
@ -1784,17 +1781,17 @@ Wire Wire Line
Wire Wire Line Wire Wire Line
9850 2300 9650 2300 9850 2300 9650 2300
Wire Wire Line Wire Wire Line
9850 2500 9500 2500 9850 2500 9800 2500
Wire Wire Line Wire Wire Line
9500 2500 9500 2400 9800 2500 9800 2400
Wire Wire Line Wire Wire Line
9250 2400 9500 2400 9250 2400 9800 2400
Wire Wire Line Wire Wire Line
8950 2800 9650 2800 8950 2800 9400 2800
Wire Wire Line Wire Wire Line
8950 2700 9700 2700 8950 2700 9500 2700
Wire Wire Line Wire Wire Line
8950 2600 9750 2600 8950 2600 9600 2600
Wire Wire Line Wire Wire Line
8100 2400 8100 2600 8100 2400 8100 2600
Wire Wire Line Wire Wire Line
@ -1818,4 +1815,66 @@ TOUCH_4
Wire Wire Line Wire Wire Line
2650 6350 2300 6350 2650 6350 2300 6350
NoConn ~ 9850 2400 NoConn ~ 9850 2400
Wire Notes Line
4550 4000 6800 4000
Wire Notes Line
6800 4000 6800 6500
Wire Notes Line
6800 6500 4550 6500
Wire Notes Line
4550 6500 4550 4000
Text Notes 6400 4100 0 50 ~ 0
Test Pads
$Comp
L tomu-fpga:Touchpad-Note XX1
U 1 1 5C0024CC
P 5900 3500
F 0 "XX1" H 5978 3696 50 0000 L CNN
F 1 "Touchpad Mask Removal" H 5978 3605 50 0000 L CNN
F 2 "tomu-fpga:soldermask-removal" H 5900 3500 50 0001 C CNN
F 3 "" H 5900 3500 50 0001 C CNN
F 4 "DNP" H 5900 3500 50 0001 C CNN "MPN"
F 5 "DNP" H 5900 3500 50 0001 C CNN "MYPN"
F 6 "DNP" H 5900 3500 50 0001 C CNN "Manufacturer"
1 5900 3500
1 0 0 -1
$EndComp
$Comp
L tomu-fpga:Case XX2
U 1 1 5C011D36
P 5900 3750
F 0 "XX2" H 6028 3896 50 0000 L CNN
F 1 "Case" H 6028 3805 50 0000 L CNN
F 2 "tomu-fpga:nothing" H 5900 3750 50 0001 C CNN
F 3 "" H 5900 3750 50 0001 C CNN
F 4 "Case for Tomu, customized for FPGA" H 900 400 50 0001 C CNN "Description"
F 5 "Tomu-FPGA-Case" H 900 400 50 0001 C CNN "MPN"
F 6 "Jiada" H 900 400 50 0001 C CNN "Manufacturer"
1 5900 3750
1 0 0 -1
$EndComp
Wire Notes Line
7150 3100 7150 3800
Wire Notes Line
7150 3800 4100 3800
Wire Notes Line
4100 3800 4100 3100
Wire Notes Line
4100 3100 7150 3100
Text Notes 4150 3750 0 50 ~ 0
Manufacturing Notes
$Comp
L tomu-fpga:Case XX3
U 1 1 5C0476E4
P 5250 3450
F 0 "XX3" H 5378 3596 50 0000 L CNN
F 1 "ESD Bag" H 5378 3505 50 0000 L CNN
F 2 "tomu-fpga:nothing" H 5250 3450 50 0001 C CNN
F 3 "" H 5250 3450 50 0001 C CNN
F 4 "ESD bag containing case and PCBA" H 250 100 50 0001 C CNN "Description"
F 5 "Tomu-ESD-Bag" H 250 100 50 0001 C CNN "MPN"
F 6 "ANY" H 250 100 50 0001 C CNN "Manufacturer"
1 5250 3450
1 0 0 -1
$EndComp
$EndSCHEMATC $EndSCHEMATC