335 lines
10 KiB
C
335 lines
10 KiB
C
/* Copyright (c) 2015 Nordic Semiconductor. All Rights Reserved.
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*
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* The information contained herein is property of Nordic Semiconductor ASA.
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* Terms and conditions of usage are described in detail in NORDIC
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* SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
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*
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* Licensees are granted free, non-transferable use of the information. NO
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* WARRANTY of ANY KIND is provided. This heading must NOT be removed from
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* the file.
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*
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*/
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/**
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* @defgroup nrf_spi_hal SPI HAL
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* @{
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* @ingroup nrf_spi_master
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*
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* @brief Hardware access layer for accessing the SPI peripheral.
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*/
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#ifndef NRF_SPI_H__
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#define NRF_SPI_H__
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#include <stddef.h>
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#include <stdbool.h>
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#include <stdint.h>
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#include "nrf.h"
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/**
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* @brief This value can be used as a parameter for the @ref nrf_spi_pins_set
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* function to specify that a given SPI signal (SCK, MOSI, or MISO)
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* shall not be connected to a physical pin.
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*/
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#define NRF_SPI_PIN_NOT_CONNECTED 0xFFFFFFFF
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/**
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* @brief SPI events.
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*/
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typedef enum
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{
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/*lint -save -e30*/
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NRF_SPI_EVENT_READY = offsetof(NRF_SPI_Type, EVENTS_READY) ///< TXD byte sent and RXD byte received.
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/*lint -restore*/
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} nrf_spi_event_t;
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/**
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* @brief SPI interrupts.
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*/
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typedef enum
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{
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NRF_SPI_INT_READY_MASK = SPI_INTENSET_READY_Msk ///< Interrupt on READY event.
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} nrf_spi_int_mask_t;
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/**
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* @brief SPI data rates.
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*/
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typedef enum
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{
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NRF_SPI_FREQ_125K = SPI_FREQUENCY_FREQUENCY_K125, ///< 125 kbps.
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NRF_SPI_FREQ_250K = SPI_FREQUENCY_FREQUENCY_K250, ///< 250 kbps.
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NRF_SPI_FREQ_500K = SPI_FREQUENCY_FREQUENCY_K500, ///< 500 kbps.
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NRF_SPI_FREQ_1M = SPI_FREQUENCY_FREQUENCY_M1, ///< 1 Mbps.
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NRF_SPI_FREQ_2M = SPI_FREQUENCY_FREQUENCY_M2, ///< 2 Mbps.
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NRF_SPI_FREQ_4M = SPI_FREQUENCY_FREQUENCY_M4, ///< 4 Mbps.
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// [conversion to 'int' needed to prevent compilers from complaining
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// that the provided value (0x80000000UL) is out of range of "int"]
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NRF_SPI_FREQ_8M = (int)SPI_FREQUENCY_FREQUENCY_M8 ///< 8 Mbps.
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} nrf_spi_frequency_t;
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/**
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* @brief SPI modes.
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*/
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typedef enum
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{
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NRF_SPI_MODE_0, ///< SCK active high, sample on leading edge of clock.
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NRF_SPI_MODE_1, ///< SCK active high, sample on trailing edge of clock.
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NRF_SPI_MODE_2, ///< SCK active low, sample on leading edge of clock.
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NRF_SPI_MODE_3 ///< SCK active low, sample on trailing edge of clock.
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} nrf_spi_mode_t;
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/**
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* @brief SPI bit orders.
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*/
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typedef enum
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{
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NRF_SPI_BIT_ORDER_MSB_FIRST = SPI_CONFIG_ORDER_MsbFirst, ///< Most significant bit shifted out first.
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NRF_SPI_BIT_ORDER_LSB_FIRST = SPI_CONFIG_ORDER_LsbFirst ///< Least significant bit shifted out first.
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} nrf_spi_bit_order_t;
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/**
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* @brief Function for clearing a specific SPI event.
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*
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* @param[in] p_spi SPI instance.
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* @param[in] spi_event Event to clear.
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*/
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__STATIC_INLINE void nrf_spi_event_clear(NRF_SPI_Type * p_spi,
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nrf_spi_event_t spi_event);
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/**
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* @brief Function for checking the state of a specific SPI event.
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*
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* @param[in] p_spi SPI instance.
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* @param[in] spi_event Event to check.
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*
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* @retval true If the event is set.
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* @retval false If the event is not set.
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*/
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__STATIC_INLINE bool nrf_spi_event_check(NRF_SPI_Type * p_spi,
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nrf_spi_event_t spi_event);
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/**
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* @brief Function for getting the address of a specific SPI event register.
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*
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* @param[in] p_spi SPI instance.
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* @param[in] spi_event Requested event.
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*
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* @return Address of the specified event register.
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*/
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__STATIC_INLINE uint32_t * nrf_spi_event_address_get(NRF_SPI_Type * p_spi,
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nrf_spi_event_t spi_event);
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/**
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* @brief Function for enabling specified interrupts.
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*
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* @param[in] p_spi SPI instance.
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* @param[in] spi_int_mask Interrupts to enable.
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*/
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__STATIC_INLINE void nrf_spi_int_enable(NRF_SPI_Type * p_spi,
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uint32_t spi_int_mask);
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/**
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* @brief Function for disabling specified interrupts.
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*
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* @param[in] p_spi SPI instance.
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* @param[in] spi_int_mask Interrupts to disable.
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*/
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__STATIC_INLINE void nrf_spi_int_disable(NRF_SPI_Type * p_spi,
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uint32_t spi_int_mask);
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/**
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* @brief Function for retrieving the state of a given interrupt.
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*
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* @param[in] p_spi SPI instance.
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* @param[in] spi_int Interrupt to check.
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*
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* @retval true If the interrupt is enabled.
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* @retval false If the interrupt is not enabled.
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*/
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__STATIC_INLINE bool nrf_spi_int_enable_check(NRF_SPI_Type * p_spi,
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nrf_spi_int_mask_t spi_int);
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/**
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* @brief Function for enabling the SPI peripheral.
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*
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* @param[in] p_spi SPI instance.
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*/
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__STATIC_INLINE void nrf_spi_enable(NRF_SPI_Type * p_spi);
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/**
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* @brief Function for disabling the SPI peripheral.
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*
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* @param[in] p_spi SPI instance.
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*/
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__STATIC_INLINE void nrf_spi_disable(NRF_SPI_Type * p_spi);
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/**
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* @brief Function for configuring SPI pins.
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*
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* If a given signal is not needed, pass the @ref NRF_SPI_PIN_NOT_CONNECTED
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* value instead of its pin number.
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*
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* @param[in] p_spi SPI instance.
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* @param[in] sck_pin SCK pin number.
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* @param[in] mosi_pin MOSI pin number.
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* @param[in] miso_pin MISO pin number.
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*/
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__STATIC_INLINE void nrf_spi_pins_set(NRF_SPI_Type * p_spi,
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uint32_t sck_pin,
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uint32_t mosi_pin,
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uint32_t miso_pin);
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/**
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* @brief Function for writing data to the SPI transmitter register.
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*
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* @param[in] p_spi SPI instance.
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* @param[in] data TX data to send.
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*/
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__STATIC_INLINE void nrf_spi_txd_set(NRF_SPI_Type * p_spi, uint8_t data);
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/**
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* @brief Function for reading data from the SPI receiver register.
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*
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* @param[in] p_spi SPI instance.
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*
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* @return RX data received.
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*/
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__STATIC_INLINE uint8_t nrf_spi_rxd_get(NRF_SPI_Type * p_spi);
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/**
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* @brief Function for setting the SPI master data rate.
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*
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* @param[in] p_spi SPI instance.
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* @param[in] frequency SPI frequency.
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*/
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__STATIC_INLINE void nrf_spi_frequency_set(NRF_SPI_Type * p_spi,
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nrf_spi_frequency_t frequency);
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/**
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* @brief Function for setting the SPI configuration.
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*
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* @param[in] p_spi SPI instance.
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* @param[in] spi_mode SPI mode.
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* @param[in] spi_bit_order SPI bit order.
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*/
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__STATIC_INLINE void nrf_spi_configure(NRF_SPI_Type * p_spi,
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nrf_spi_mode_t spi_mode,
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nrf_spi_bit_order_t spi_bit_order);
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#ifndef SUPPRESS_INLINE_IMPLEMENTATION
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__STATIC_INLINE void nrf_spi_event_clear(NRF_SPI_Type * p_spi,
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nrf_spi_event_t spi_event)
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{
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*((volatile uint32_t *)((uint8_t *)p_spi + (uint32_t)spi_event)) = 0x0UL;
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}
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__STATIC_INLINE bool nrf_spi_event_check(NRF_SPI_Type * p_spi,
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nrf_spi_event_t spi_event)
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{
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return (bool)*(volatile uint32_t *)((uint8_t *)p_spi + (uint32_t)spi_event);
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}
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__STATIC_INLINE uint32_t * nrf_spi_event_address_get(NRF_SPI_Type * p_spi,
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nrf_spi_event_t spi_event)
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{
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return (uint32_t *)((uint8_t *)p_spi + (uint32_t)spi_event);
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}
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__STATIC_INLINE void nrf_spi_int_enable(NRF_SPI_Type * p_spi,
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uint32_t spi_int_mask)
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{
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p_spi->INTENSET = spi_int_mask;
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}
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__STATIC_INLINE void nrf_spi_int_disable(NRF_SPI_Type * p_spi,
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uint32_t spi_int_mask)
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{
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p_spi->INTENCLR = spi_int_mask;
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}
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__STATIC_INLINE bool nrf_spi_int_enable_check(NRF_SPI_Type * p_spi,
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nrf_spi_int_mask_t spi_int)
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{
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return (bool)(p_spi->INTENSET & spi_int);
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}
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__STATIC_INLINE void nrf_spi_enable(NRF_SPI_Type * p_spi)
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{
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p_spi->ENABLE = (SPI_ENABLE_ENABLE_Enabled << SPI_ENABLE_ENABLE_Pos);
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}
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__STATIC_INLINE void nrf_spi_disable(NRF_SPI_Type * p_spi)
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{
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p_spi->ENABLE = (SPI_ENABLE_ENABLE_Disabled << SPI_ENABLE_ENABLE_Pos);
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}
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__STATIC_INLINE void nrf_spi_pins_set(NRF_SPI_Type * p_spi,
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uint32_t sck_pin,
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uint32_t mosi_pin,
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uint32_t miso_pin)
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{
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p_spi->PSELSCK = sck_pin;
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p_spi->PSELMOSI = mosi_pin;
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p_spi->PSELMISO = miso_pin;
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}
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__STATIC_INLINE void nrf_spi_txd_set(NRF_SPI_Type * p_spi, uint8_t data)
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{
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p_spi->TXD = data;
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}
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__STATIC_INLINE uint8_t nrf_spi_rxd_get(NRF_SPI_Type * p_spi)
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{
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return p_spi->RXD;
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}
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__STATIC_INLINE void nrf_spi_frequency_set(NRF_SPI_Type * p_spi,
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nrf_spi_frequency_t frequency)
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{
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p_spi->FREQUENCY = frequency;
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}
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__STATIC_INLINE void nrf_spi_configure(NRF_SPI_Type * p_spi,
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nrf_spi_mode_t spi_mode,
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nrf_spi_bit_order_t spi_bit_order)
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{
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uint32_t config = (spi_bit_order == NRF_SPI_BIT_ORDER_MSB_FIRST ?
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SPI_CONFIG_ORDER_MsbFirst : SPI_CONFIG_ORDER_LsbFirst);
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switch (spi_mode)
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{
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default:
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case NRF_SPI_MODE_0:
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config |= (SPI_CONFIG_CPOL_ActiveHigh << SPI_CONFIG_CPOL_Pos) |
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(SPI_CONFIG_CPHA_Leading << SPI_CONFIG_CPHA_Pos);
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break;
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case NRF_SPI_MODE_1:
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config |= (SPI_CONFIG_CPOL_ActiveHigh << SPI_CONFIG_CPOL_Pos) |
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(SPI_CONFIG_CPHA_Trailing << SPI_CONFIG_CPHA_Pos);
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break;
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case NRF_SPI_MODE_2:
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config |= (SPI_CONFIG_CPOL_ActiveLow << SPI_CONFIG_CPOL_Pos) |
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(SPI_CONFIG_CPHA_Leading << SPI_CONFIG_CPHA_Pos);
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break;
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case NRF_SPI_MODE_3:
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config |= (SPI_CONFIG_CPOL_ActiveLow << SPI_CONFIG_CPOL_Pos) |
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(SPI_CONFIG_CPHA_Trailing << SPI_CONFIG_CPHA_Pos);
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break;
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}
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p_spi->CONFIG = config;
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}
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#endif // SUPPRESS_INLINE_IMPLEMENTATION
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#endif // NRF_SPI_H__
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/** @} */
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