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add files from nrf52832 bootloader project

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hathach
2018-02-07 23:32:49 +07:00
parent ac1f0e7955
commit 9f1d9f321e
186 changed files with 83021 additions and 0 deletions
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65
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/* Copyright (c) 2014 Nordic Semiconductor. All Rights Reserved.
*
* The information contained herein is property of Nordic Semiconductor ASA.
* Terms and conditions of usage are described in detail in NORDIC
* SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
*
* Licensees are granted free, non-transferable use of the information. NO
* WARRANTY of ANY KIND is provided. This heading must NOT be removed from
* the file.
*
*/
#ifndef BOARDS_H
#define BOARDS_H
#include <stdbool.h>
#include <stdint.h>
#include "nrf_gpio.h"
#if defined BOARD_FEATHER52
#include "feather52.h"
#elif defined BOARD_METRO52
#include "metro52.h"
#else
#error No boards defined
#endif
// Make sure we have at least two buttons (DFU + FRESET since DFU+FRST=OTA)
#if BUTTONS_NUMBER < 2
#error "At least two buttons required in the BSP (see 'BUTTONS_NUMBER')"
#endif
#define LED_RED LED_1
#define LED_BLUE LED_2
#define bit(b) (1UL << (b))
static inline uint32_t bit_set(uint32_t value, uint8_t n)
{
return value | bit(n);
}
static inline uint32_t bit_clear(uint32_t value, uint8_t n)
{
return value & (~bit(n));
}
static inline bool bit_test(uint32_t value, uint8_t n)
{
return (value & bit(n)) ? true : false;
}
void led_control(uint32_t pin, bool state);
static inline void led_on(uint32_t pin)
{
led_control(pin, true);
}
static inline void led_off(uint32_t pin)
{
led_control(pin, false);
}
#endif

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/* Copyright (c) 2014 Nordic Semiconductor. All Rights Reserved.
*
* The information contained herein is property of Nordic Semiconductor ASA.
* Terms and conditions of usage are described in detail in NORDIC
* SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
*
* Licensees are granted free, non-transferable use of the information. NO
* WARRANTY of ANY KIND is provided. This heading must NOT be removed from
* the file.
*
*/
#include "dfu_ble_svc.h"
#include <string.h>
#include "nrf_error.h"
#include "crc16.h"
#if defined ( __CC_ARM )
static dfu_ble_peer_data_t m_peer_data __attribute__((section("NoInit"), zero_init)); /**< This variable should be placed in a non initialized RAM section in order to be valid upon soft reset from application into bootloader. */
static uint16_t m_peer_data_crc __attribute__((section("NoInit"), zero_init)); /**< CRC variable to ensure the integrity of the peer data provided. */
#elif defined ( __GNUC__ )
__attribute__((section(".noinit"))) static dfu_ble_peer_data_t m_peer_data; /**< This variable should be placed in a non initialized RAM section in order to be valid upon soft reset from application into bootloader. */
__attribute__((section(".noinit"))) static uint16_t m_peer_data_crc; /**< CRC variable to ensure the integrity of the peer data provided. */
#elif defined ( __ICCARM__ )
__no_init static dfu_ble_peer_data_t m_peer_data @ 0x20003F80; /**< This variable should be placed in a non initialized RAM section in order to be valid upon soft reset from application into bootloader. */
__no_init static uint16_t m_peer_data_crc @ 0x20003F80 + sizeof(dfu_ble_peer_data_t); /**< CRC variable to ensure the integrity of the peer data provided. */
#endif
/**@brief Function for setting the peer data from application in bootloader before reset.
*
* @param[in] p_peer_data Pointer to the peer data containing keys for the connection.
*
* @retval NRF_SUCCES The data was set succesfully.
* @retval NRF_ERROR_NULL If a null pointer was passed as argument.
*/
static uint32_t dfu_ble_peer_data_set(dfu_ble_peer_data_t * p_peer_data)
{
if (p_peer_data == NULL)
{
return NRF_ERROR_NULL;
}
uint32_t src = (uint32_t)p_peer_data;
uint32_t dst = (uint32_t)&m_peer_data;
// Calculating length in order to check if destination is residing inside source.
// Source inside the the destination (calculation underflow) is safe a source is read before
// written to destination so that when destination grows into source, the source data is no
// longer needed.
uint32_t len = dst - src;
if (src == dst)
{
// Do nothing as source and destination are identical, just calculate crc below.
}
else if (len < sizeof(dfu_ble_peer_data_t))
{
uint32_t i = 0;
dst += sizeof(dfu_ble_peer_data_t);
src += sizeof(dfu_ble_peer_data_t);
// Copy byte wise backwards when facing overlapping structures.
while (i++ <= sizeof(dfu_ble_peer_data_t))
{
*((uint8_t *)dst--) = *((uint8_t *)src--);
}
}
else
{
memcpy((void *)dst, (void *)src, sizeof(dfu_ble_peer_data_t));
}
m_peer_data_crc = crc16_compute((uint8_t *)&m_peer_data, sizeof(m_peer_data), NULL);
return NRF_SUCCESS;
}
/**@brief Function for handling second stage of SuperVisor Calls (SVC).
*
* @details The function will use svc_num to call the corresponding SVC function.
*
* @param[in] svc_num SVC number for function to be executed
* @param[in] p_svc_args Argument list for the SVC.
*
* @return This function returns the error value of the SVC return. For further details, please
* refer to the details of the SVC implementation itself.
* @ref NRF_ERROR_SVC_HANDLER_MISSING is returned if no SVC handler is implemented for the
* provided svc_num.
*/
void C_SVC_Handler(uint8_t svc_num, uint32_t * p_svc_args)
{
switch (svc_num)
{
case DFU_BLE_SVC_PEER_DATA_SET:
p_svc_args[0] = dfu_ble_peer_data_set((dfu_ble_peer_data_t *)p_svc_args[0]);
break;
default:
p_svc_args[0] = NRF_ERROR_SVC_HANDLER_MISSING;
break;
}
}
/**@brief Function for handling the first stage of SuperVisor Calls (SVC) in assembly.
*
* @details The function will use the link register (LR) to determine the stack (PSP or MSP) to be
* used and then decode the SVC number afterwards. After decoding the SVC number then
* @ref C_SVC_Handler is called for further processing of the SVC.
*/
#if defined ( __CC_ARM )
__asm void SVC_Handler(void)
{
EXC_RETURN_CMD_PSP EQU 0xFFFFFFFD ; EXC_RETURN using PSP for ARM Cortex. If Link register contains this value it indicates the PSP was used before the SVC, otherwise the MSP was used.
IMPORT C_SVC_Handler
LDR R0, =EXC_RETURN_CMD_PSP ; Load the EXC_RETURN into R0 to be able to compare against LR to determine stack pointer used.
CMP R0, LR ; Compare the link register with R0. If equal then PSP was used, otherwise MSP was used before SVC.
BNE UseMSP ; Branch to code fetching SVC arguments using MSP.
MRS R1, PSP ; Move PSP into R1.
B Call_C_SVC_Handler ; Branch to Call_C_SVC_Handler below.
UseMSP
MRS R1, MSP ; MSP was used, therefore Move MSP into R1.
Call_C_SVC_Handler
LDR R0, [R1, #24] ; The arguments for the SVC was stacked. R1 contains Stack Pointer, the values stacked before SVC are R0, R1, R2, R3, R12, LR, PC (Return address), xPSR.
; R1 contains current SP so the PC of the stacked frame is at SP + 6 words (24 bytes). We load the PC into R0.
SUBS R0, #2 ; The PC before the SVC is in R0. We subtract 2 to get the address prior to the instruction executed where the SVC number is located.
LDRB R0, [R0] ; SVC instruction low octet: Load the byte at the address before the PC to fetch the SVC number.
LDR R2, =C_SVC_Handler ; Load address of C implementation of SVC handler.
BX R2 ; Branch to C implementation of SVC handler. R0 is now the SVC number, R1 is the StackPointer where the arguments (R0-R3) of the original SVC are located.
ALIGN
}
#elif defined ( __GNUC__ )
void __attribute__ (( naked )) SVC_Handler(void)
{
const uint32_t exc_return = 0xFFFFFFFD; // EXC_RETURN using PSP for ARM Cortex. If Link register contains this value it indicates the PSP was used before the SVC, otherwise the MSP was used.
__asm volatile(
"cmp lr, %0\t\n" // Compare the link register with argument 0 (%0), which is exc_return. If equal then PSP was used, otherwise MSP was used before SVC.
"bne UseMSP\t\n" // Branch to code fetching SVC arguments using MSP.
"mrs r1, psp\t\n" // Move PSP into R1.
"b Call_C_SVC_Handler\t\n" // Branch to Call_C_SVC_Handler below.
"UseMSP: \t\n" //
"mrs r1, msp\t\n" // MSP was used, therefore Move MSP into R1.
"Call_C_SVC_Handler: \t\n" //
"ldr r0, [r1, #24]\t\n" // The arguments for the SVC was stacked. R1 contains Stack Pointer, the values stacked before SVC are R0, R1, R2, R3, R12, LR, PC (Return address), xPSR.
// R1 contains current SP so the PC of the stacked frame is at SP + 6 words (24 bytes). We load the PC into R0.
"sub r0, r0, #2\t\n" // The PC before the SVC is in R0. We subtract 2 to get the address prior to the instruction executed where the SVC number is located.
"ldrb r0, [r0]\t\n" // SVC instruction low octet: Load the byte at the address before the PC to fetch the SVC number.
"bx %1\t\n" // Branch to C implementation of SVC handler, argument 1 (%1). R0 is now the SVC number, R1 is the StackPointer where the arguments (R0-R3) of the original SVC are located.
".align\t\n"
:: "r" (exc_return), "r" (C_SVC_Handler) // Argument list for the gcc assembly. exc_return is %0, C_SVC_Handler is %1.
: "r0", "r1" // List of register maintained manually.
);
}
#elif defined ( __ICCARM__ )
void SVC_Handler(void)
{
asm("movs r0, #0x02\n" // Load 0x02 into R6 to prepare for exec return test.
"mvns r0, r0\n" // Invert R0 to obtain exec return code using PSP for ARM Cortex.
"cmp lr, r0\n" // Compare the link register with argument 0 (%0), which is exc_return. If equal then PSP was used, otherwise MSP was used before SVC.
"bne.n UseMSP\n" // Branch to code fetching SVC arguments using MSP.
"mrs r1, psp\n" // Move PSP into R1.
"b.n Call_C_SVC_Handler\t\n" // Branch to Call_C_SVC_Handler below.
"UseMSP: \n" //
"mrs r1, msp\n" // MSP was used, therefore Move MSP into R1.
"Call_C_SVC_Handler: \n" //
"ldr r0, [r1, #24]\n" // The arguments for the SVC was stacked. R1 contains Stack Pointer, the values stacked before SVC are R0, R1, R2, R3, R12, LR, PC (Return address), xPSR.
// R1 contains current SP so the PC of the stacked frame is at SP + 6 words (24 bytes). We load the PC into R0.
"subs r0, #0x02\n" // The PC before the SVC is in R0. We subtract 2 to get the address prior to the instruction executed where the SVC number is located.
"ldrb r0, [r0]\n" // SVC instruction low octet: Load the byte at the address before the PC to fetch the SVC number.
"bx %0\n" // Branch to C implementation of SVC handler, argument 1 (%1). R0 is now the SVC number, R1 is the StackPointer where the arguments (R0-R3) of the original SVC are located.
:: "r" (C_SVC_Handler) // Argument list for the gcc assembly. C_SVC_Handler is %0.
: "r0", "r1" // List of register maintained manually.
);
}
#else
#error Compiler not supported.
#endif
uint32_t dfu_ble_peer_data_get(dfu_ble_peer_data_t * p_peer_data)
{
uint16_t crc;
if (p_peer_data == NULL)
{
return NRF_ERROR_NULL;
}
crc = crc16_compute((uint8_t *)&m_peer_data, sizeof(m_peer_data), NULL);
if (crc != m_peer_data_crc)
{
return NRF_ERROR_INVALID_DATA;
}
*p_peer_data = m_peer_data;
// corrupt CRC to invalidate shared information.
m_peer_data_crc++;
return NRF_SUCCESS;
}

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#******************************************************************************
# CONFIGURE
# - SINGLEBANK : 0 (dual), 1 (single)
#******************************************************************************
VERSION_SINGLEBANK = 0
include ../make_common.mk

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/**************************************************************************/
/*!
@file feather52.h
@author hathach
@section LICENSE
Software License Agreement (BSD License)
Copyright (c) ${year}, Adafruit Industries (adafruit.com)
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
3. Neither the name of the copyright holders nor the
names of its contributors may be used to endorse or promote products
derived from this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS ''AS IS'' AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/**************************************************************************/
#ifndef FEATHER52_H
#define FEATHER52_H
/*------------------------------------------------------------------*/
/* LED
*------------------------------------------------------------------*/
#define LEDS_NUMBER 2
#define LED_1 17
#define LED_2 19
#define LED_STATE_ON 1
/*------------------------------------------------------------------*/
/* BUTTON
*------------------------------------------------------------------*/
#define BUTTONS_NUMBER 2
#define BUTTON_1 20
#define BUTTON_2 22
#define BUTTON_PULL NRF_GPIO_PIN_PULLUP
/*------------------------------------------------------------------*/
/* UART
*------------------------------------------------------------------*/
#define RX_PIN_NUMBER 8
#define TX_PIN_NUMBER 6
#define CTS_PIN_NUMBER 7
#define RTS_PIN_NUMBER 5
#define HWFC false
// Used as model string in OTA mode
#define DIS_MODEL "Bluefruit Feather 52"
#endif // FEATHER52_H

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This text contains two licenses (License #1, License #2).
License #1 applies to the whole SDK, except i) files including Dynastream copyright notices and ii) source files including BSD 3-clause license texts.
License #2 applies only to files including Dynastream copyright notices.
All must be read and accepted before proceeding.
License #1
License Agreement
Nordic Semiconductor ASA (<28>Nordic<69>)
Software Development Kit
You (<28>You<6F> or <20>Licensee<65>) must carefully and thoroughly read this License Agreement (<28>Agreement<6E>), and accept to adhere to this Agreement before downloading, installing and/or using any software or content in the Software Development Kit (<28>SDK<44>) provided herewith.
YOU ACCEPT THIS LICENSE AGREEMENT BY (A) CLICKING ACCEPT OR AGREE TO THIS LICENSE AGREEMENT, WHERE THIS OPTION IS MADE AVAILABLE TO YOU; OR (B) BY ACTUALLY USING THE SDK, IN THIS CASE YOU AGREE THAT THE USE OF THE SDK CONSTITUTES ACCEPTANCE OF THE LICENSING AGREEMENT FROM THAT POINT ONWARDS.
IF YOU DO NOT AGREE TO BE BOUND BY THE TERMS OF THIS AGREEMENT, THEN DO NOT DOWNLOAD, INSTALL/COMPLETE INSTALLATION OF, OR IN ANY OTHER WAY MAKE USE OF THE SDK OR RELATED CONTENT.
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Subject to the terms in this Agreement Nordic grants Licensee a limited, non-exclusive, non-transferable, non-sub licensable, revocable license (<28>License<73>): (a) to use the SDK as a development platform solely in connection with a Nordic Integrated Circuit (<28>nRF IC<49>), (b) to modify any source code contained in the SDK solely as necessary to implement products developed by Licensee that incorporate an nRF IC (<28>Licensee Product<63>), and (c) to distribute the SDK solely as implemented in Licensee Product. Licensee shall not use the SDK for any purpose other than specifically authorized herein.
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Licensee shall not, modify, reverse engineer, disassemble, decompile or otherwise attempt to discover the source code of any non-source code parts of the SDK including, but not limited to pre-compiled binaries and object code.
4. Distribution Restrictions
Except as set forward in Section 1 above, the Licensee may not disclose or distribute any or all parts of the SDK to any third party. Licensee agrees to provide reasonable security precautions to prevent unauthorized access to or use of the SDK as proscribed herein. Licensee also agrees that use of and access to the SDK will be strictly limited to the employees and subcontractors of the Licensee necessary for the performance of development, verification and production tasks under this Agreement. The Licensee is responsible for making such employees and subcontractors agree on complying with the obligations concerning use and non-disclosure of the SDK.
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Key. The ANT+ Network Key is available to ANT+ Adopters.
Please refer to http://thisisant.com to become an ANT+
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2) Reverse engineering, decompilation, and/or disassembly of
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
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/* Copyright (c) 2013 Nordic Semiconductor. All Rights Reserved.
*
* The information contained herein is property of Nordic Semiconductor ASA.
* Terms and conditions of usage are described in detail in NORDIC
* SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
*
* Licensees are granted free, non-transferable use of the information. NO
* WARRANTY of ANY KIND is provided. This heading must NOT be removed from
* the file.
*
*/
/**@file
*
* @defgroup ble_sdk_app_bootloader_main main.c
* @{
* @ingroup dfu_bootloader_api
* @brief Bootloader project main file.
*
* -# Receive start data packet.
* -# Based on start packet, prepare NVM area to store received data.
* -# Receive data packet.
* -# Validate data packet.
* -# Write Data packet to NVM.
* -# If not finished - Wait for next packet.
* -# Receive stop data packet.
* -# Activate Image, boot application.
*
*/
#include <stdint.h>
#include <stdbool.h>
#include <string.h>
#include <stddef.h>
#include "dfu_transport.h"
#include "bootloader.h"
#include "bootloader_util.h"
#include "nordic_common.h"
#include "sdk_common.h"
#include "nrf.h"
#include "nrf_soc.h"
#include "app_error.h"
#include "nrf_gpio.h"
#include "ble.h"
#include "nrf.h"
#include "ble_hci.h"
#include "app_scheduler.h"
#include "app_timer_appsh.h"
#include "nrf_error.h"
#include "boards.h"
#include "softdevice_handler_appsh.h"
//#include "nrf_sdh.h"
//#include "nrf_sdh_ble.h"
//#include "nrf_sdh_soc.h"
#include "pstorage_platform.h"
#include "nrf_mbr.h"
//#include "nrf_log.h"
#include "nrf_wdt.h"
#include "nrf_delay.h"
#include "pstorage.h"
#define BOOTLOADER_VERSION_REGISTER NRF_TIMER2->CC[0]
#define LED_BLINK_INTERVAL 100
#define BOOTLOADER_STARTUP_DFU_INTERVAL 1000
/* Magic that written to NRF_POWER->GPREGRET by application when it wish to go into DFU
* - BOOTLOADER_DFU_OTA_MAGIC used by BLEDfu service : SD is already init
* - BOOTLOADER_DFU_OTA_FULLRESET_MAGIC entered by soft reset : SD is not init
* - BOOTLOADER_DFU_SERIAL_MAGIC entered by soft reset : SD is not init
*
* Note: for BOOTLOADER_DFU_OTA_MAGIC Softdevice should not initialized. In other case SD must be initialized
*/
#define BOOTLOADER_DFU_OTA_MAGIC BOOTLOADER_DFU_START // 0xB1
#define BOOTLOADER_DFU_OTA_FULLRESET_MAGIC 0xA8
#define BOOTLOADER_DFU_SERIAL_MAGIC 0x4e
#define BOOTLOADER_BUTTON BUTTON_1 // Button used to enter SW update mode.
#define FRESET_BUTTON BUTTON_2 // Button used in addition to DFU button, to force OTA DFU
#define APP_TIMER_PRESCALER 0 /**< Value of the RTC1 PRESCALER register. */
#define APP_TIMER_OP_QUEUE_SIZE 4 /**< Size of timer operation queues. */
#define SCHED_MAX_EVENT_DATA_SIZE MAX(APP_TIMER_SCHED_EVT_SIZE, 0) /**< Maximum size of scheduler events. */
#define SCHED_QUEUE_SIZE 20 /**< Maximum number of events in the scheduler queue. */
// Helper function
#define memclr(buffer, size) memset(buffer, 0, size)
#define varclr(_var) memclr(_var, sizeof(*(_var)))
#define arrclr(_arr) memclr(_arr, sizeof(_arr))
#define arrcount(_arr) ( sizeof(_arr) / sizeof(_arr[0]) )
// These value must be the same with one in dfu_transport_ble.c
#define BLEGAP_EVENT_LENGTH 6
#define BLEGATT_ATT_MTU_MAX 247
enum { BLE_CONN_CFG_HIGH_BANDWIDTH = 1 };
// Adafruit for factory reset
#define APPDATA_ADDR_START (BOOTLOADER_REGION_START-DFU_APP_DATA_RESERVED)
STATIC_ASSERT( APPDATA_ADDR_START == 0x6D000);
void adafruit_factory_reset(void);
volatile bool _freset_erased_complete = false;
// Adafruit for Blink pattern
bool isBlinkFast = false;
bool isOTAConnected = false;
APP_TIMER_DEF( blinky_timer_id );
// true if ble, false if serial
bool _ota_update = false;
bool is_ota(void) { return _ota_update; }
void assert_nrf_callback(uint16_t line_num, const uint8_t * p_file_name)
{
app_error_handler(0xDEADBEEF, line_num, p_file_name);
}
static void button_pin_init(uint32_t pin)
{
nrf_gpio_cfg_sense_input(pin, BUTTON_PULL, NRF_GPIO_PIN_SENSE_LOW);
}
bool button_pressed(uint32_t pin)
{
return (nrf_gpio_pin_read(pin) == 0) ? true : false;
}
static void led_pin_init(uint32_t pin)
{
#ifdef BOARD_METRO52
// LED BLUE is muxed with FRESET. We need to make sure it is
// not wired to GND before configuring it as output.
// Only check if it is not yet configured as OUTPUT
if (pin == LED_BLUE && !bit_test(NRF_GPIO->PIN_CNF[pin], GPIO_PIN_CNF_DIR_Pos))
{
// skip and configure as input if grounded instead of output !!!
if ( button_pressed(pin) ) return;
}
#endif
nrf_gpio_cfg_output(pin);
led_off(pin);
}
void led_control(uint32_t pin, bool state)
{
#ifdef BOARD_METRO52
// Skip if LED_BLUE is configured as input and wiring to GND
// Otherwise configure it as output (it may just transition from hardware GND to open)
if ( pin == LED_2 && !bit_test(NRF_GPIO->PIN_CNF[pin], GPIO_PIN_CNF_DIR_Pos) )
{
if ( button_pressed(pin) ) return;
// configure as output
nrf_gpio_cfg_output(pin);
}
#endif
nrf_gpio_pin_write(pin, state ? LED_STATE_ON : (1-LED_STATE_ON));
}
/*
* Blinking function, there are a few patterns
* - DFU Serial : LED Status blink
* - DFU OTA : LED Status & Conn blink at the same time
* - DFU Flashing : LED Status blink 2x fast
* - Factory Reset : LED Status blink 2x fast
* - Fatal Error : LED Status & Conn blink one after another
*/
static void blinky_handler(void * p_context)
{
static uint8_t state = 0;
static uint32_t count = 0;
count++;
// if not uploading then blink slow (interval/2)
if ( !isBlinkFast && count%2 ) return;
state = 1-state;
led_control(LED_RED, state);
// Blink LED BLUE if OTA mode and not connected
if (is_ota() && !isOTAConnected)
{
led_control(LED_BLUE, state);
}
// Feed all Watchdog just in case application enable it (WDT last through a soft reboot to bootloader)
if ( nrf_wdt_started() )
{
for (uint8_t i=0; i<8; i++) nrf_wdt_reload_request_set(i);
}
}
void blinky_fast_set(bool isFast)
{
isBlinkFast = isFast;
}
void blinky_ota_connected(void)
{
isOTAConnected = true;
}
void blinky_ota_disconneted(void)
{
isOTAConnected = false;
}
/**@brief Function for dispatching a BLE stack event to all modules with a BLE stack event handler.
*
* @details This function is called from the scheduler in the main loop after a BLE stack
* event has been received.
*
* @param[in] p_ble_evt Bluetooth stack event.
*/
static void sys_evt_dispatch(uint32_t event)
{
pstorage_sys_event_handler(event);
}
/**@brief Function for initializing the BLE stack.
*
* @details Initializes the SoftDevice and the BLE event interrupt.
*
* @param[in] init_softdevice true if SoftDevice should be initialized. The SoftDevice must only
* be initialized if a chip reset has occured. Soft reset from
* application must not reinitialize the SoftDevice.
*/
static uint32_t ble_stack_init(bool init_softdevice)
{
uint32_t err_code;
nrf_clock_lf_cfg_t clock_lf_cfg =
{
.source = NRF_CLOCK_LF_SRC_RC,
.rc_ctiv = 16,
.rc_temp_ctiv = 2,
.accuracy = NRF_CLOCK_LF_ACCURACY_20_PPM
};
if (init_softdevice)
{
sd_mbr_command_t com = { .command = SD_MBR_COMMAND_INIT_SD };
err_code = sd_mbr_command(&com);
APP_ERROR_CHECK(err_code);
}
err_code = sd_softdevice_vector_table_base_set(BOOTLOADER_REGION_START);
APP_ERROR_CHECK(err_code);
// equivalent to nrf_sdh_enable_request()
SOFTDEVICE_HANDLER_APPSH_INIT(&clock_lf_cfg, true);
/*------------- Configure BLE params -------------*/
extern uint32_t __data_start__[]; // defined in linker
uint32_t ram_start = (uint32_t) __data_start__;
ble_cfg_t blecfg;
// Configure the maximum number of connections.
varclr(&blecfg);
blecfg.gap_cfg.role_count_cfg.periph_role_count = 1;
blecfg.gap_cfg.role_count_cfg.central_role_count = 0;
blecfg.gap_cfg.role_count_cfg.central_sec_count = 0;
err_code = sd_ble_cfg_set(BLE_GAP_CFG_ROLE_COUNT, &blecfg, ram_start);
// NRF_DFU_BLE_REQUIRES_BONDS
varclr(&blecfg);
blecfg.gatts_cfg.service_changed.service_changed = 1;
err_code = sd_ble_cfg_set(BLE_GATTS_CFG_SERVICE_CHANGED, &blecfg, ram_start);
VERIFY_SUCCESS(err_code);
// ATT MTU
varclr(&blecfg);
blecfg.conn_cfg.conn_cfg_tag = BLE_CONN_CFG_HIGH_BANDWIDTH;
blecfg.conn_cfg.params.gatt_conn_cfg.att_mtu = BLEGATT_ATT_MTU_MAX;
err_code = sd_ble_cfg_set(BLE_CONN_CFG_GATT, &blecfg, ram_start);
VERIFY_SUCCESS ( err_code );
// Event Length + HVN queue + WRITE CMD queue setting affecting bandwidth
varclr(&blecfg);
blecfg.conn_cfg.conn_cfg_tag = BLE_CONN_CFG_HIGH_BANDWIDTH;
blecfg.conn_cfg.params.gap_conn_cfg.conn_count = 1;
blecfg.conn_cfg.params.gap_conn_cfg.event_length = BLEGAP_EVENT_LENGTH;
err_code = sd_ble_cfg_set(BLE_CONN_CFG_GAP, &blecfg, ram_start);
VERIFY_SUCCESS ( err_code );
// Enable BLE stack.
err_code = sd_ble_enable(&ram_start);
VERIFY_SUCCESS(err_code);
err_code = softdevice_sys_evt_handler_set(sys_evt_dispatch);
VERIFY_SUCCESS(err_code);
return err_code;
}
/**
* @brief Function for event scheduler initialization.
*/
static void scheduler_init(void)
{
APP_SCHED_INIT(SCHED_MAX_EVENT_DATA_SIZE, SCHED_QUEUE_SIZE);
/* Initialize a blinky timer to show that we're in bootloader */
(void) app_timer_create(&blinky_timer_id, APP_TIMER_MODE_REPEATED, blinky_handler);
app_timer_start(blinky_timer_id, APP_TIMER_TICKS(LED_BLINK_INTERVAL, APP_TIMER_PRESCALER), NULL);
}
/**
* @brief Function for bootloader main entry.
*/
int main(void)
{
uint32_t err_code;
// SD is already Initialized in case of BOOTLOADER_DFU_OTA_MAGIC
bool sd_inited = (NRF_POWER->GPREGRET == BOOTLOADER_DFU_OTA_MAGIC);
// Start Bootloader in BLE OTA mode
_ota_update = (NRF_POWER->GPREGRET == BOOTLOADER_DFU_OTA_MAGIC) ||
(NRF_POWER->GPREGRET == BOOTLOADER_DFU_OTA_FULLRESET_MAGIC);
// start bootloader either serial or ble
bool dfu_start = _ota_update || (NRF_POWER->GPREGRET == BOOTLOADER_DFU_SERIAL_MAGIC);
if (dfu_start)
{
// Clear GPREGRET if it is our values
NRF_POWER->GPREGRET = 0;
}
// Save bootloader version to pre-defined register, retrieved by application
BOOTLOADER_VERSION_REGISTER = (BOOTLOADER_VERSION);
// This check ensures that the defined fields in the bootloader corresponds with actual
// setting in the chip.
APP_ERROR_CHECK_BOOL(*((uint32_t *)NRF_UICR_BOOT_START_ADDRESS) == BOOTLOADER_REGION_START);
APP_ERROR_CHECK_BOOL(NRF_FICR->CODEPAGESIZE == CODE_PAGE_SIZE);
/* Initialize GPIOs
* For metro52 LED_BLUE is muxed with FRESET
*/
button_pin_init(BOOTLOADER_BUTTON);
button_pin_init(FRESET_BUTTON);
nrf_delay_us(100); // wait for the pin state is stable
led_pin_init(LED_RED);
led_pin_init(LED_BLUE); // on metro52 will override FRESET
// Initialize timer module, already configred to use with the scheduler.
APP_TIMER_APPSH_INIT(APP_TIMER_PRESCALER, APP_TIMER_OP_QUEUE_SIZE, true);
(void) bootloader_init();
if (bootloader_dfu_sd_in_progress())
{
err_code = bootloader_dfu_sd_update_continue();
APP_ERROR_CHECK(err_code);
ble_stack_init(!sd_inited);
scheduler_init();
err_code = bootloader_dfu_sd_update_finalize();
APP_ERROR_CHECK(err_code);
}
else
{
// If stack is present then continue initialization of bootloader.
ble_stack_init(!sd_inited);
scheduler_init();
}
/* For metro52 LED_BLUE is muxed with FRESET. We only init FRESET BUTTON
* as needed and reconfigure as LED BLUE when done. */
#ifdef BOARD_METRO52
button_pin_init(FRESET_BUTTON);
nrf_delay_us(100); // wait for the pin state is stable
#endif
// DFU button pressed
dfu_start = dfu_start || button_pressed(BOOTLOADER_BUTTON);
// DFU + FRESET are pressed --> OTA
_ota_update = _ota_update || ( button_pressed(BOOTLOADER_BUTTON) && button_pressed(FRESET_BUTTON) ) ;
#ifdef BOARD_METRO52
led_pin_init(LED_BLUE);
#endif
if (dfu_start || (!bootloader_app_is_valid(DFU_BANK_0_REGION_START)))
{
// Initiate an update of the firmware.
err_code = bootloader_dfu_start(_ota_update, 0);
APP_ERROR_CHECK(err_code);
}
else
{
/* Adafruit Modification
* Even DFU is not active, we still force an 1000 ms dfu serial mode when startup
* to support auto programming from Arduino IDE
*/
(void) bootloader_dfu_start(false, BOOTLOADER_STARTUP_DFU_INTERVAL);
}
// Adafruit Factory reset
#ifdef BOARD_METRO52
button_pin_init(FRESET_BUTTON);
nrf_delay_us(100); // wait for the pin state is stable
#endif
bool is_freset = ( !button_pressed(BOOTLOADER_BUTTON) && button_pressed(FRESET_BUTTON) );
#ifdef BOARD_METRO52
led_pin_init(LED_BLUE);
#endif
if (is_freset)
{
adafruit_factory_reset();
}
app_timer_stop(blinky_timer_id);
if (bootloader_app_is_valid(DFU_BANK_0_REGION_START) && !bootloader_dfu_sd_in_progress())
{
// Select a bank region to use as application region.
// @note: Only applications running from DFU_BANK_0_REGION_START is supported.
bootloader_app_start(DFU_BANK_0_REGION_START);
}
NVIC_SystemReset();
}
/**
* Pstorage callback, fired after erased Application Data
*/
static void appdata_pstorage_cb(pstorage_handle_t * p_handle, uint8_t op_code, uint32_t result,
uint8_t * p_data, uint32_t data_len)
{
if ( op_code == PSTORAGE_CLEAR_OP_CODE)
{
_freset_erased_complete = true;
}
}
void freset_erase_and_wait(pstorage_handle_t* hdl, uint32_t addr, uint32_t size)
{
_freset_erased_complete = false;
// set address and start erasing
hdl->block_id = addr;
pstorage_clear(hdl, size);
// Time to erase a page is 100 ms max
// It is better to force a timeout to prevent lock-up
uint32_t timeout_tck = (size/CODE_PAGE_SIZE)*100;
timeout_tck = APP_TIMER_TICKS(timeout_tck, APP_TIMER_PRESCALER);
uint32_t start_tck;
app_timer_cnt_get(&start_tck);
while(!_freset_erased_complete)
{
sd_app_evt_wait();
app_sched_execute();
uint32_t now_tck;
app_timer_cnt_get(&now_tck);
if ( (now_tck - start_tck) > timeout_tck ) break;
}
}
/**
* Perform factory reset to erase Application + Data
*/
void adafruit_factory_reset(void)
{
// Blink fast RED and turn on BLUE when erasing
blinky_fast_set(true);
led_on(LED_BLUE);
static pstorage_handle_t freset_handle = { .block_id = APPDATA_ADDR_START } ;
pstorage_module_param_t storage_params = { .cb = appdata_pstorage_cb};
pstorage_register(&storage_params, &freset_handle);
// clear all App Data
freset_erase_and_wait(&freset_handle, APPDATA_ADDR_START, DFU_APP_DATA_RESERVED);
// Only need to erase the 1st page of Application code to make it invalid
freset_erase_and_wait(&freset_handle, DFU_BANK_0_REGION_START, CODE_PAGE_SIZE);
// back to normal
blinky_fast_set(false);
led_off(LED_BLUE);
}

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#******************************************************************************
# CONFIGURE (no spaces!)
# - VERSION_MAJOR, VERSION_MINOR, VERSION_REVISION: e.g 5.0.0 or 5.1.0 (usually
# is the same to the SoftDevice if possible)
#
# - SDK_PATH : path to SDK directory
# - SRC_PATH : path to src folder
#
# - SD_NAME : e.g s132, s140
# - SD_VERSION : e.g 5.1.0
# - SD_HEX : path to bootloader hex binary
#******************************************************************************
VERSION_MAJOR = 5
VERSION_MINOR = 1
VERSION_REVISION = 0
SDK_PATH = ../../nRF5_SDK_11.0.0_89a8197/components
SRC_PATH = ..
SD_NAME = s132
SD_VERSION = 5.1.0
SD_PATH = ../../softdevice/$(SD_NAME)/$(SD_VERSION)
SD_HEX = $(SD_PATH)/hex/$(SD_NAME)_nrf52_$(SD_VERSION)_softdevice.hex
LINKER_SCRIPT = $(SRC_PATH)/$(SD_NAME)_$(SD_VERSION).ld
ifeq ($(VERSION_SINGLEBANK),1)
BANKMODE = single
C_SOURCE_FILES += $(SDK_PATH)/libraries/bootloader_dfu/dfu_single_bank.c
else
BANKMODE = dual
C_SOURCE_FILES += $(SDK_PATH)/libraries/bootloader_dfu/dfu_dual_bank.c
endif
BOOTLOADER_S132_SUFFIX = $(VERSION_MAJOR).$(VERSION_MINOR).$(VERSION_REVISION)_$(SD_NAME)_$(BANKMODE)
FINAL_BIN_DIR := ../../bin
TEMPLATE_PATH = $(SDK_PATH)/toolchain/gcc
#******************************************************************************
# Tool configure
#******************************************************************************
NRFUTIL = nrfutil
ifeq ($(OS),Windows_NT)
PROGFILES = C:/Program Files (x86)
GNU_INSTALL_ROOT = $(PROGFILES)/GNU Tools ARM Embedded/6 2017-q2-update
else
GNU_INSTALL_ROOT = /usr
endif
MK := mkdir
RM := rm -rf
ifeq ("$(VERBOSE)","1")
NO_ECHO :=
else
NO_ECHO := @
endif
GNU_PREFIX = arm-none-eabi
# Toolchain commands
CC := '$(GNU_INSTALL_ROOT)/bin/$(GNU_PREFIX)-gcc'
AS := '$(GNU_INSTALL_ROOT)/bin/$(GNU_PREFIX)-as'
AR := '$(GNU_INSTALL_ROOT)/bin/$(GNU_PREFIX)-ar' -r
LD := '$(GNU_INSTALL_ROOT)/bin/$(GNU_PREFIX)-ld'
NM := '$(GNU_INSTALL_ROOT)/bin/$(GNU_PREFIX)-nm'
OBJDUMP := '$(GNU_INSTALL_ROOT)/bin/$(GNU_PREFIX)-objdump'
OBJCOPY := '$(GNU_INSTALL_ROOT)/bin/$(GNU_PREFIX)-objcopy'
SIZE := '$(GNU_INSTALL_ROOT)/bin/$(GNU_PREFIX)-size'
#function for removing duplicates in a list
remduplicates = $(strip $(if $1,$(firstword $1) $(call remduplicates,$(filter-out $(firstword $1),$1))))
#******************************************************************************
# SOURCE FILES
#******************************************************************************
#source common to all targets
C_SOURCE_FILES += $(SRC_PATH)/main.c
C_SOURCE_FILES += $(SRC_PATH)/dfu_ble_svc.c
C_SOURCE_FILES += $(SDK_PATH)/libraries/bootloader_dfu/bootloader.c
C_SOURCE_FILES += $(SDK_PATH)/libraries/bootloader_dfu/bootloader_settings.c
C_SOURCE_FILES += $(SDK_PATH)/libraries/bootloader_dfu/bootloader_util.c
C_SOURCE_FILES += $(SDK_PATH)/libraries/bootloader_dfu/dfu_init_template.c
C_SOURCE_FILES += $(SDK_PATH)/libraries/bootloader_dfu/dfu_transport_serial.c
C_SOURCE_FILES += $(SDK_PATH)/libraries/bootloader_dfu/dfu_transport_ble.c
C_SOURCE_FILES += $(SDK_PATH)/libraries/timer/app_timer.c
C_SOURCE_FILES += $(SDK_PATH)/libraries/timer/app_timer_appsh.c
C_SOURCE_FILES += $(SDK_PATH)/libraries/scheduler/app_scheduler.c
C_SOURCE_FILES += $(SDK_PATH)/libraries/util/app_error.c
C_SOURCE_FILES += $(SDK_PATH)/libraries/util/app_error_weak.c
C_SOURCE_FILES += $(SDK_PATH)/libraries/util/app_util_platform.c
C_SOURCE_FILES += $(SDK_PATH)/libraries/crc16/crc16.c
C_SOURCE_FILES += $(SDK_PATH)/libraries/hci/hci_mem_pool.c
C_SOURCE_FILES += $(SDK_PATH)/libraries/hci/hci_slip.c
C_SOURCE_FILES += $(SDK_PATH)/libraries/hci/hci_transport.c
C_SOURCE_FILES += $(SDK_PATH)/libraries/util/nrf_assert.c
C_SOURCE_FILES += $(SDK_PATH)/libraries/uart/app_uart.c
C_SOURCE_FILES += $(SDK_PATH)/drivers_nrf/delay/nrf_delay.c
C_SOURCE_FILES += $(SDK_PATH)/drivers_nrf/common/nrf_drv_common.c
C_SOURCE_FILES += $(SDK_PATH)/drivers_nrf/uart/nrf_drv_uart.c
C_SOURCE_FILES += $(SDK_PATH)/ble/common/ble_advdata.c
C_SOURCE_FILES += $(SDK_PATH)/ble/common/ble_conn_params.c
C_SOURCE_FILES += $(SDK_PATH)/ble/common/ble_srv_common.c
C_SOURCE_FILES += $(SDK_PATH)/ble/ble_services/ble_dfu/ble_dfu.c
C_SOURCE_FILES += $(SDK_PATH)/ble/ble_services/ble_dis/ble_dis.c
C_SOURCE_FILES += $(SDK_PATH)/drivers_nrf/pstorage/pstorage_raw.c
C_SOURCE_FILES += $(SDK_PATH)/toolchain/system_nrf52.c
C_SOURCE_FILES += ../../softdevice/common/softdevice_handler/softdevice_handler.c
C_SOURCE_FILES += ../../softdevice/common/softdevice_handler/softdevice_handler_appsh.c
#******************************************************************************
# Assembly Files
#******************************************************************************
ASM_SOURCE_FILES = $(SDK_PATH)/toolchain/gcc/gcc_startup_nrf52.S
#******************************************************************************
# INCLUDE PATH
#******************************************************************************
INC_PATHS += -I$(SRC_PATH)/
INC_PATHS += -I$(SDK_PATH)/libraries/bootloader_dfu/hci_transport
INC_PATHS += -I$(SDK_PATH)/libraries/bootloader_dfu
INC_PATHS += -I$(SDK_PATH)/libraries/timer
INC_PATHS += -I$(SDK_PATH)/libraries/scheduler
INC_PATHS += -I$(SDK_PATH)/libraries/crc16
INC_PATHS += -I$(SDK_PATH)/libraries/util
INC_PATHS += -I$(SDK_PATH)/libraries/hci/config
INC_PATHS += -I$(SDK_PATH)/libraries/uart
INC_PATHS += -I$(SDK_PATH)/libraries/hci
INC_PATHS += -I$(SDK_PATH)/drivers_nrf/common
INC_PATHS += -I$(SDK_PATH)/drivers_nrf/hal
INC_PATHS += -I$(SDK_PATH)/drivers_nrf/config
INC_PATHS += -I$(SDK_PATH)/drivers_nrf/delay
INC_PATHS += -I$(SDK_PATH)/drivers_nrf/uart
INC_PATHS += -I../../softdevice/common
INC_PATHS += -I../../softdevice/common/softdevice_handler/
INC_PATHS += -I$(SD_PATH)/headers
INC_PATHS += -I$(SD_PATH)/headers/nrf52
INC_PATHS += -I$(SDK_PATH)/device
INC_PATHS += -I$(SDK_PATH)/drivers_nrf/pstorage
INC_PATHS += -I$(SDK_PATH)/toolchain/cmsis/include
INC_PATHS += -I$(SDK_PATH)/toolchain/gcc
INC_PATHS += -I$(SDK_PATH)/toolchain
INC_PATHS += -I$(SDK_PATH)/ble/common
INC_PATHS += -I$(SDK_PATH)/ble/ble_services/ble_dfu
INC_PATHS += -I$(SDK_PATH)/ble/ble_services/ble_dis
OBJECT_DIRECTORY = _build
LISTING_DIRECTORY = $(OBJECT_DIRECTORY)
OUTPUT_BINARY_DIRECTORY = $(OBJECT_DIRECTORY)
# Sorting removes duplicates
BUILD_DIRECTORIES := $(sort $(OBJECT_DIRECTORY) $(OUTPUT_BINARY_DIRECTORY) $(LISTING_DIRECTORY))
#******************************************************************************
# Compiler Flags
# - Additional compiler flags
#******************************************************************************
#flags common to all targets
#CFLAGS += -DENABLE_SWO
#*************************
# Defined Symbol (MACROS)
#*************************
CFLAGS += -DBOOTLOADER_VERSION=0x0$(VERSION_MAJOR)0$(VERSION_MINOR)0$(VERSION_REVISION)0$(VERSION_SINGLEBANK)UL
CFLAGS += -DNRF52
CFLAGS += -DNRF52_PAN_12
CFLAGS += -DNRF52_PAN_15
CFLAGS += -DNRF52_PAN_58
CFLAGS += -DNRF52_PAN_55
CFLAGS += -DNRF52_PAN_54
CFLAGS += -DNRF52_PAN_31
CFLAGS += -DNRF52_PAN_30
CFLAGS += -DNRF52_PAN_51
CFLAGS += -DNRF52_PAN_36
CFLAGS += -DNRF52_PAN_53
CFLAGS += -D__HEAP_SIZE=0
CFLAGS += -DS132
CFLAGS += -DCONFIG_GPIO_AS_PINRESET
CFLAGS += -DBLE_STACK_SUPPORT_REQD
CFLAGS += -DBSP_DEFINES_ONLY
CFLAGS += -DSWI_DISABLE0
CFLAGS += -DNRF52_PAN_20
CFLAGS += -DNRF52_PAN_64
CFLAGS += -DSOFTDEVICE_PRESENT
CFLAGS += -DNRF52_PAN_62
CFLAGS += -DNRF52_PAN_63
CFLAGS += -DDFU_APP_DATA_RESERVED=7*4096
CFLAGS += -mcpu=cortex-m4
CFLAGS += -mthumb -mabi=aapcs --std=gnu99
CFLAGS += -Wall -Werror -Os -g3
CFLAGS += -mfloat-abi=hard -mfpu=fpv4-sp-d16
# keep every function in separate section. This will allow linker to dump unused functions
CFLAGS += -ffunction-sections -fdata-sections -fno-strict-aliasing
CFLAGS += -fno-builtin --short-enums
#******************************************************************************
# Linker Flags
#
#******************************************************************************
# keep every function in separate section. This will allow linker to dump unused functions
LDFLAGS += -Xlinker -Map=$(LISTING_DIRECTORY)/$(OUTPUT_FILENAME).map
LDFLAGS += -mthumb -mabi=aapcs -L $(TEMPLATE_PATH) -T$(LINKER_SCRIPT)
LDFLAGS += -mcpu=cortex-m4
LDFLAGS += -mfloat-abi=hard -mfpu=fpv4-sp-d16
# let linker to dump unused sections
LDFLAGS += -Wl,--gc-sections
# use newlib in nano version
LDFLAGS += --specs=nano.specs -lc -lnosys
#******************************************************************************
# Assembler flags
#
#******************************************************************************
ASMFLAGS += -x assembler-with-cpp
ASMFLAGS += -DNRF52
ASMFLAGS += -DNRF52_PAN_12
ASMFLAGS += -DNRF52_PAN_15
ASMFLAGS += -DNRF52_PAN_58
ASMFLAGS += -DNRF52_PAN_55
ASMFLAGS += -DNRF52_PAN_54
ASMFLAGS += -DNRF52_PAN_31
ASMFLAGS += -DNRF52_PAN_30
ASMFLAGS += -DNRF52_PAN_51
ASMFLAGS += -DNRF52_PAN_36
ASMFLAGS += -DNRF52_PAN_53
ASMFLAGS += -D__HEAP_SIZE=0
ASMFLAGS += -DS132
ASMFLAGS += -DCONFIG_GPIO_AS_PINRESET
ASMFLAGS += -DBLE_STACK_SUPPORT_REQD
ASMFLAGS += -DBSP_DEFINES_ONLY
ASMFLAGS += -DSWI_DISABLE0
ASMFLAGS += -DNRF52_PAN_20
ASMFLAGS += -DNRF52_PAN_64
ASMFLAGS += -DSOFTDEVICE_PRESENT
ASMFLAGS += -DNRF52_PAN_62
ASMFLAGS += -DNRF52_PAN_63
MAKEFILE_NAME := $(MAKEFILE_LIST)
MAKEFILE_DIR := $(dir $(MAKEFILE_NAME) )
#******************************************************************************
# BUILD TARGETS
#******************************************************************************
ifeq ("$(VERBOSE)","1")
$(info CFLAGS $(CFLAGS))
$(info )
$(info LDFLAGS $(LDFLAGS))
$(info )
endif
#default target - first one defined
default: all
#building all targets
all:
@$(MAKE) -s -f $(MAKEFILE_NAME) -C $(MAKEFILE_DIR) -e clean
@echo Making Feather52 board
@echo ----------------------
@$(MAKE) -s -f $(MAKEFILE_NAME) -C $(MAKEFILE_DIR) -e feather52
@$(MAKE) -s -f $(MAKEFILE_NAME) -C $(MAKEFILE_DIR) -e clean
@echo Making Metro52 board
@echo --------------------
@$(MAKE) -s -f $(MAKEFILE_NAME) -C $(MAKEFILE_DIR) -e metro52
#target for printing all targets
help:
@echo following targets are available:
@echo - feather52 : build for Feather nrf52 board
@echo - metro52 : build for Metro nrf52 board
@echo - flash_feather52 : flash Feather nrf52 board
@echo - flash_metro52 : flash Metro nrf52 board
C_SOURCE_FILE_NAMES = $(notdir $(C_SOURCE_FILES))
C_PATHS = $(call remduplicates, $(dir $(C_SOURCE_FILES) ) )
C_OBJECTS = $(addprefix $(OBJECT_DIRECTORY)/, $(C_SOURCE_FILE_NAMES:.c=.o) )
ASM_SOURCE_FILE_NAMES = $(notdir $(ASM_SOURCE_FILES))
ASM_PATHS = $(call remduplicates, $(dir $(ASM_SOURCE_FILES) ))
ASM_OBJECTS = $(addprefix $(OBJECT_DIRECTORY)/, $(ASM_SOURCE_FILE_NAMES:.S=.o) )
vpath %.c $(C_PATHS)
vpath %.S $(ASM_PATHS)
OBJECTS = $(C_OBJECTS) $(ASM_OBJECTS)
export OUTPUT_FILENAME
export FINAL_BIN_DIR
BOOTLOADER_WITH_S132_NAME := $(OUTPUT_FILENAME)_$(BOOTLOADER_S132_SUFFIX)
# Target for Feather nrf52 board
feather52: OUTPUT_FILENAME := feather52_bootloader
feather52: FINAL_BIN_DIR := $(FINAL_BIN_DIR)/feather52/$(VERSION_MAJOR).$(VERSION_MINOR).$(VERSION_REVISION)/$(BANKMODE)
feather52: CFLAGS += -DBOARD_FEATHER52
feather52: $(BUILD_DIRECTORIES) $(OBJECTS)
@echo Linking target: $(OUTPUT_FILENAME).out
$(NO_ECHO)$(CC) $(LDFLAGS) $(OBJECTS) $(LIBS) -lm -o $(OUTPUT_BINARY_DIRECTORY)/$(OUTPUT_FILENAME).out
$(NO_ECHO)$(MAKE) -f $(MAKEFILE_NAME) -C $(MAKEFILE_DIR) -e finalize
# Target for Metro nrf52 board
metro52: OUTPUT_FILENAME := metro52_bootloader
metro52: FINAL_BIN_DIR := $(FINAL_BIN_DIR)/metro52/$(BANKMODE)
metro52: CFLAGS += -DBOARD_METRO52
metro52: $(BUILD_DIRECTORIES) $(OBJECTS)
@echo Linking target: $(OUTPUT_FILENAME).out
$(NO_ECHO)$(CC) $(LDFLAGS) $(OBJECTS) $(LIBS) -lm -o $(OUTPUT_BINARY_DIRECTORY)/$(OUTPUT_FILENAME).out
$(NO_ECHO)$(MAKE) -f $(MAKEFILE_NAME) -C $(MAKEFILE_DIR) -e finalize
## Create build directories
$(BUILD_DIRECTORIES):
@$(MK) $@
# Create objects from C SRC files
$(OBJECT_DIRECTORY)/%.o: %.c
@echo Compiling file: $(notdir $<)
$(NO_ECHO)$(CC) $(CFLAGS) $(INC_PATHS) -c -o $@ $<
# Assemble files
$(OBJECT_DIRECTORY)/%.o: %.S
@echo Assembly file: $(notdir $<)
$(NO_ECHO)$(CC) $(ASMFLAGS) $(INC_PATHS) -c -o $@ $<
# Link
$(OUTPUT_BINARY_DIRECTORY)/$(OUTPUT_FILENAME).out: $(BUILD_DIRECTORIES) $(OBJECTS)
@echo Linking target: $(OUTPUT_FILENAME).out
$(NO_ECHO)$(CC) $(LDFLAGS) $(OBJECTS) $(LIBS) -lm -o $(OUTPUT_BINARY_DIRECTORY)/$(OUTPUT_FILENAME).out
finalize: genhex genbin genpkg echosize
## Create binary .hex file from the .out file
genhex:
@echo Preparing: $(OUTPUT_FILENAME).hex $(BOOTLOADER_WITH_S132_NAME).hex
$(NO_ECHO)$(OBJCOPY) -O ihex $(OUTPUT_BINARY_DIRECTORY)/$(OUTPUT_FILENAME).out $(OUTPUT_BINARY_DIRECTORY)/$(OUTPUT_FILENAME).hex
@mergehex -q -m $(OUTPUT_BINARY_DIRECTORY)/$(OUTPUT_FILENAME).hex $(SD_HEX) -o $(OUTPUT_BINARY_DIRECTORY)/$(BOOTLOADER_WITH_S132_NAME).hex
@mkdir -p $(FINAL_BIN_DIR)
@cp $(OUTPUT_BINARY_DIRECTORY)/$(BOOTLOADER_WITH_S132_NAME).hex $(FINAL_BIN_DIR)/
## Create .bin file
genbin:
@echo Preparing: $(BOOTLOADER_WITH_S132_NAME).bin
$(NO_ECHO)$(OBJCOPY) -j .text -j .data -j .bss -O binary $(OUTPUT_BINARY_DIRECTORY)/$(OUTPUT_FILENAME).out $(FINAL_BIN_DIR)/$(BOOTLOADER_WITH_S132_NAME).bin
## Create pkg file for bootloader only and bootloader+SD combo to use with DFU
genpkg:
@echo Preparing: $(BOOTLOADER_WITH_S132_NAME).zip
@$(NRFUTIL) dfu genpkg --dev-type 0x0052 --dev-revision 0xADAF --bootloader $(OUTPUT_BINARY_DIRECTORY)/$(OUTPUT_FILENAME).hex --softdevice $(SD_HEX) $(FINAL_BIN_DIR)/$(BOOTLOADER_WITH_S132_NAME).zip
echosize:
-@echo ''
$(NO_ECHO)$(SIZE) $(OUTPUT_BINARY_DIRECTORY)/$(OUTPUT_FILENAME).out
-@echo ''
clean:
@$(RM) $(BUILD_DIRECTORIES)
flash_feather52: BOOTLOADER_WITH_S132_NAME := feather52_bootloader_$(BOOTLOADER_S132_SUFFIX)
flash_feather52: feather52
@echo Flashing: $(OUTPUT_BINARY_DIRECTORY)/$(BOOTLOADER_WITH_S132_NAME).hex
nrfjprog --program $(OUTPUT_BINARY_DIRECTORY)/$(BOOTLOADER_WITH_S132_NAME).hex -f nrf52 --chiperase --reset
flash_metro52: BOOTLOADER_WITH_S132_NAME := metro52_bootloader_$(BOOTLOADER_S132_SUFFIX)
flash_metro52: metro52
@echo Flashing: $(OUTPUT_BINARY_DIRECTORY)/$(BOOTLOADER_WITH_S132_NAME).hex
nrfjprog --program $(OUTPUT_BINARY_DIRECTORY)/$(BOOTLOADER_WITH_S132_NAME).hex -f nrf52 --chiperase --reset

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/**************************************************************************/
/*!
@file metro52.h
@author hathach
@section LICENSE
Software License Agreement (BSD License)
Copyright (c) 2017, Adafruit Industries (adafruit.com)
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
3. Neither the name of the copyright holders nor the
names of its contributors may be used to endorse or promote products
derived from this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS ''AS IS'' AND ANY
EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/**************************************************************************/
#ifndef METRO52_H
#define METRO52_H
// Note: FRST and LED2 are on the same pin, so can't be used together
// LED2 will be disabled since it is less critical
/*------------------------------------------------------------------*/
/* LED
*------------------------------------------------------------------*/
#define LEDS_NUMBER 2
#define LED_1 29
#define LED_2 22
#define LED_STATE_ON 1
/*------------------------------------------------------------------*/
/* BUTTON
*------------------------------------------------------------------*/
#define BUTTONS_NUMBER 2
#define BUTTON_1 18
#define BUTTON_2 22
#define BUTTON_PULL NRF_GPIO_PIN_PULLUP
/*------------------------------------------------------------------*/
/* UART
*------------------------------------------------------------------*/
#define RX_PIN_NUMBER 23
#define TX_PIN_NUMBER 8
#define CTS_PIN_NUMBER 0
#define RTS_PIN_NUMBER 0
#define HWFC false
// Used as model string in OTA mode
#define DIS_MODEL "Bluefruit Metro 52"
#endif // METRO52_H

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/* Copyright (c) 2015 Nordic Semiconductor. All Rights Reserved.
*
* The information contained herein is property of Nordic Semiconductor ASA.
* Terms and conditions of usage are described in detail in NORDIC
* SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
*
* Licensees are granted free, non-transferable use of the information. NO
* WARRANTY of ANY KIND is provided. This heading must NOT be removed from
* the file.
*
*/
#ifndef NRF_DRV_CONFIG_H
#define NRF_DRV_CONFIG_H
/**
* Provide a non-zero value here in applications that need to use several
* peripherals with the same ID that are sharing certain resources
* (for example, SPI0 and TWI0). Obviously, such peripherals cannot be used
* simultaneously. Therefore, this definition allows to initialize the driver
* for another peripheral from a given group only after the previously used one
* is uninitialized. Normally, this is not possible, because interrupt handlers
* are implemented in individual drivers.
* This functionality requires a more complicated interrupt handling and driver
* initialization, hence it is not always desirable to use it.
*/
#define PERIPHERAL_RESOURCE_SHARING_ENABLED 0
/* CLOCK */
#define CLOCK_ENABLED 0
#if (CLOCK_ENABLED == 1)
#define CLOCK_CONFIG_XTAL_FREQ NRF_CLOCK_XTALFREQ_Default
#define CLOCK_CONFIG_LF_SRC NRF_CLOCK_LFCLK_Xtal
#define CLOCK_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
#endif
/* GPIOTE */
#define GPIOTE_ENABLED 0
#if (GPIOTE_ENABLED == 1)
#define GPIOTE_CONFIG_USE_SWI_EGU false
#define GPIOTE_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
#define GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS 1
#endif
/* TIMER */
#define TIMER0_ENABLED 0
#if (TIMER0_ENABLED == 1)
#define TIMER0_CONFIG_FREQUENCY NRF_TIMER_FREQ_16MHz
#define TIMER0_CONFIG_MODE TIMER_MODE_MODE_Timer
#define TIMER0_CONFIG_BIT_WIDTH TIMER_BITMODE_BITMODE_32Bit
#define TIMER0_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
#define TIMER0_INSTANCE_INDEX 0
#endif
#define TIMER1_ENABLED 0
#if (TIMER1_ENABLED == 1)
#define TIMER1_CONFIG_FREQUENCY NRF_TIMER_FREQ_16MHz
#define TIMER1_CONFIG_MODE TIMER_MODE_MODE_Timer
#define TIMER1_CONFIG_BIT_WIDTH TIMER_BITMODE_BITMODE_16Bit
#define TIMER1_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
#define TIMER1_INSTANCE_INDEX (TIMER0_ENABLED)
#endif
#define TIMER2_ENABLED 0
#if (TIMER2_ENABLED == 1)
#define TIMER2_CONFIG_FREQUENCY NRF_TIMER_FREQ_16MHz
#define TIMER2_CONFIG_MODE TIMER_MODE_MODE_Timer
#define TIMER2_CONFIG_BIT_WIDTH TIMER_BITMODE_BITMODE_16Bit
#define TIMER2_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
#define TIMER2_INSTANCE_INDEX (TIMER1_ENABLED+TIMER0_ENABLED)
#endif
#define TIMER3_ENABLED 0
#if (TIMER3_ENABLED == 1)
#define TIMER3_CONFIG_FREQUENCY NRF_TIMER_FREQ_16MHz
#define TIMER3_CONFIG_MODE TIMER_MODE_MODE_Timer
#define TIMER3_CONFIG_BIT_WIDTH TIMER_BITMODE_BITMODE_16Bit
#define TIMER3_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
#define TIMER3_INSTANCE_INDEX (TIMER2_ENABLED+TIMER1_ENABLED+TIMER0_ENABLED)
#endif
#define TIMER4_ENABLED 0
#if (TIMER4_ENABLED == 1)
#define TIMER4_CONFIG_FREQUENCY NRF_TIMER_FREQ_16MHz
#define TIMER4_CONFIG_MODE TIMER_MODE_MODE_Timer
#define TIMER4_CONFIG_BIT_WIDTH TIMER_BITMODE_BITMODE_16Bit
#define TIMER4_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
#define TIMER4_INSTANCE_INDEX (TIMER3_ENABLED+TIMER2_ENABLED+TIMER1_ENABLED+TIMER0_ENABLED)
#endif
#define TIMER_COUNT (TIMER0_ENABLED + TIMER1_ENABLED + TIMER2_ENABLED + TIMER3_ENABLED + TIMER4_ENABLED)
/* RTC */
#define RTC0_ENABLED 0
#if (RTC0_ENABLED == 1)
#define RTC0_CONFIG_FREQUENCY 32678
#define RTC0_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
#define RTC0_CONFIG_RELIABLE false
#define RTC0_INSTANCE_INDEX 0
#endif
#define RTC1_ENABLED 0
#if (RTC1_ENABLED == 1)
#define RTC1_CONFIG_FREQUENCY 32768
#define RTC1_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
#define RTC1_CONFIG_RELIABLE false
#define RTC1_INSTANCE_INDEX (RTC0_ENABLED)
#endif
#define RTC2_ENABLED 0
#if (RTC2_ENABLED == 1)
#define RTC2_CONFIG_FREQUENCY 32768
#define RTC2_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
#define RTC2_CONFIG_RELIABLE false
#define RTC2_INSTANCE_INDEX (RTC0_ENABLED+RTC1_ENABLED)
#endif
#define RTC_COUNT (RTC0_ENABLED+RTC1_ENABLED+RTC2_ENABLED)
#define NRF_MAXIMUM_LATENCY_US 2000
/* RNG */
#define RNG_ENABLED 0
#if (RNG_ENABLED == 1)
#define RNG_CONFIG_ERROR_CORRECTION true
#define RNG_CONFIG_POOL_SIZE 8
#define RNG_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
#endif
/* PWM */
#define PWM0_ENABLED 0
#if (PWM0_ENABLED == 1)
#define PWM0_CONFIG_OUT0_PIN 2
#define PWM0_CONFIG_OUT1_PIN 3
#define PWM0_CONFIG_OUT2_PIN 4
#define PWM0_CONFIG_OUT3_PIN 5
#define PWM0_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
#define PWM0_CONFIG_BASE_CLOCK NRF_PWM_CLK_1MHz
#define PWM0_CONFIG_COUNT_MODE NRF_PWM_MODE_UP
#define PWM0_CONFIG_TOP_VALUE 1000
#define PWM0_CONFIG_LOAD_MODE NRF_PWM_LOAD_COMMON
#define PWM0_CONFIG_STEP_MODE NRF_PWM_STEP_AUTO
#define PWM0_INSTANCE_INDEX 0
#endif
#define PWM1_ENABLED 0
#if (PWM1_ENABLED == 1)
#define PWM1_CONFIG_OUT0_PIN 2
#define PWM1_CONFIG_OUT1_PIN 3
#define PWM1_CONFIG_OUT2_PIN 4
#define PWM1_CONFIG_OUT3_PIN 5
#define PWM1_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
#define PWM1_CONFIG_BASE_CLOCK NRF_PWM_CLK_1MHz
#define PWM1_CONFIG_COUNT_MODE NRF_PWM_MODE_UP
#define PWM1_CONFIG_TOP_VALUE 1000
#define PWM1_CONFIG_LOAD_MODE NRF_PWM_LOAD_COMMON
#define PWM1_CONFIG_STEP_MODE NRF_PWM_STEP_AUTO
#define PWM1_INSTANCE_INDEX (PWM0_ENABLED)
#endif
#define PWM2_ENABLED 0
#if (PWM2_ENABLED == 1)
#define PWM2_CONFIG_OUT0_PIN 2
#define PWM2_CONFIG_OUT1_PIN 3
#define PWM2_CONFIG_OUT2_PIN 4
#define PWM2_CONFIG_OUT3_PIN 5
#define PWM2_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
#define PWM2_CONFIG_BASE_CLOCK NRF_PWM_CLK_1MHz
#define PWM2_CONFIG_COUNT_MODE NRF_PWM_MODE_UP
#define PWM2_CONFIG_TOP_VALUE 1000
#define PWM2_CONFIG_LOAD_MODE NRF_PWM_LOAD_COMMON
#define PWM2_CONFIG_STEP_MODE NRF_PWM_STEP_AUTO
#define PWM2_INSTANCE_INDEX (PWM0_ENABLED + PWM1_ENABLED)
#endif
#define PWM_COUNT (PWM0_ENABLED + PWM1_ENABLED + PWM2_ENABLED)
/* SPI */
#define SPI0_ENABLED 0
#if (SPI0_ENABLED == 1)
#define SPI0_USE_EASY_DMA 0
#define SPI0_CONFIG_SCK_PIN 2
#define SPI0_CONFIG_MOSI_PIN 3
#define SPI0_CONFIG_MISO_PIN 4
#define SPI0_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
#define SPI0_INSTANCE_INDEX 0
#endif
#define SPI1_ENABLED 0
#if (SPI1_ENABLED == 1)
#define SPI1_USE_EASY_DMA 0
#define SPI1_CONFIG_SCK_PIN 2
#define SPI1_CONFIG_MOSI_PIN 3
#define SPI1_CONFIG_MISO_PIN 4
#define SPI1_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
#define SPI1_INSTANCE_INDEX (SPI0_ENABLED)
#endif
#define SPI2_ENABLED 0
#if (SPI2_ENABLED == 1)
#define SPI2_USE_EASY_DMA 0
#define SPI2_CONFIG_SCK_PIN 2
#define SPI2_CONFIG_MOSI_PIN 3
#define SPI2_CONFIG_MISO_PIN 4
#define SPI2_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
#define SPI2_INSTANCE_INDEX (SPI0_ENABLED + SPI1_ENABLED)
#endif
#define SPI_COUNT (SPI0_ENABLED + SPI1_ENABLED + SPI2_ENABLED)
/* SPIS */
#define SPIS0_ENABLED 0
#if (SPIS0_ENABLED == 1)
#define SPIS0_CONFIG_SCK_PIN 2
#define SPIS0_CONFIG_MOSI_PIN 3
#define SPIS0_CONFIG_MISO_PIN 4
#define SPIS0_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
#define SPIS0_INSTANCE_INDEX 0
#endif
#define SPIS1_ENABLED 0
#if (SPIS1_ENABLED == 1)
#define SPIS1_CONFIG_SCK_PIN 2
#define SPIS1_CONFIG_MOSI_PIN 3
#define SPIS1_CONFIG_MISO_PIN 4
#define SPIS1_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
#define SPIS1_INSTANCE_INDEX SPIS0_ENABLED
#endif
#define SPIS2_ENABLED 0
#if (SPIS2_ENABLED == 1)
#define SPIS2_CONFIG_SCK_PIN 2
#define SPIS2_CONFIG_MOSI_PIN 3
#define SPIS2_CONFIG_MISO_PIN 4
#define SPIS2_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
#define SPIS2_INSTANCE_INDEX (SPIS0_ENABLED + SPIS1_ENABLED)
#endif
#define SPIS_COUNT (SPIS0_ENABLED + SPIS1_ENABLED + SPIS2_ENABLED)
/* UART */
#define UART0_ENABLED 1
#if (UART0_ENABLED == 1)
#define UART0_CONFIG_HWFC NRF_UART_HWFC_DISABLED
#define UART0_CONFIG_PARITY NRF_UART_PARITY_EXCLUDED
#define UART0_CONFIG_BAUDRATE NRF_UART_BAUDRATE_115200
#define UART0_CONFIG_PSEL_TXD 6
#define UART0_CONFIG_PSEL_RXD 8
#define UART0_CONFIG_PSEL_CTS 7
#define UART0_CONFIG_PSEL_RTS 5
#define UART0_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
#ifdef NRF52
#define UART0_CONFIG_USE_EASY_DMA false
//Compile time flag
#define UART_EASY_DMA_SUPPORT 1
#define UART_LEGACY_SUPPORT 1
#endif //NRF52
#endif
#define TWI0_ENABLED 0
#if (TWI0_ENABLED == 1)
#define TWI0_USE_EASY_DMA 0
#define TWI0_CONFIG_FREQUENCY NRF_TWI_FREQ_100K
#define TWI0_CONFIG_SCL 0
#define TWI0_CONFIG_SDA 1
#define TWI0_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
#define TWI0_INSTANCE_INDEX 0
#endif
#define TWI1_ENABLED 0
#if (TWI1_ENABLED == 1)
#define TWI1_USE_EASY_DMA 0
#define TWI1_CONFIG_FREQUENCY NRF_TWI_FREQ_100K
#define TWI1_CONFIG_SCL 0
#define TWI1_CONFIG_SDA 1
#define TWI1_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
#define TWI1_INSTANCE_INDEX (TWI0_ENABLED)
#endif
#define TWI_COUNT (TWI0_ENABLED + TWI1_ENABLED)
/* TWIS */
#define TWIS0_ENABLED 0
#if (TWIS0_ENABLED == 1)
#define TWIS0_CONFIG_ADDR0 0
#define TWIS0_CONFIG_ADDR1 0 /* 0: Disabled */
#define TWIS0_CONFIG_SCL 0
#define TWIS0_CONFIG_SDA 1
#define TWIS0_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
#define TWIS0_INSTANCE_INDEX 0
#endif
#define TWIS1_ENABLED 0
#if (TWIS1_ENABLED == 1)
#define TWIS1_CONFIG_ADDR0 0
#define TWIS1_CONFIG_ADDR1 0 /* 0: Disabled */
#define TWIS1_CONFIG_SCL 0
#define TWIS1_CONFIG_SDA 1
#define TWIS1_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
#define TWIS1_INSTANCE_INDEX (TWIS0_ENABLED)
#endif
#define TWIS_COUNT (TWIS0_ENABLED + TWIS1_ENABLED)
/* For more documentation see nrf_drv_twis.h file */
#define TWIS_ASSUME_INIT_AFTER_RESET_ONLY 0
/* For more documentation see nrf_drv_twis.h file */
#define TWIS_NO_SYNC_MODE 0
/* QDEC */
#define QDEC_ENABLED 0
#if (QDEC_ENABLED == 1)
#define QDEC_CONFIG_REPORTPER NRF_QDEC_REPORTPER_10
#define QDEC_CONFIG_SAMPLEPER NRF_QDEC_SAMPLEPER_16384us
#define QDEC_CONFIG_PIO_A 1
#define QDEC_CONFIG_PIO_B 2
#define QDEC_CONFIG_PIO_LED 3
#define QDEC_CONFIG_LEDPRE 511
#define QDEC_CONFIG_LEDPOL NRF_QDEC_LEPOL_ACTIVE_HIGH
#define QDEC_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
#define QDEC_CONFIG_DBFEN false
#define QDEC_CONFIG_SAMPLE_INTEN false
#endif
/* ADC */
#define ADC_ENABLED 0
#if (ADC_ENABLED == 1)
#define ADC_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
#endif
/* SAADC */
#define SAADC_ENABLED 0
#if (SAADC_ENABLED == 1)
#define SAADC_CONFIG_RESOLUTION NRF_SAADC_RESOLUTION_10BIT
#define SAADC_CONFIG_OVERSAMPLE NRF_SAADC_OVERSAMPLE_DISABLED
#define SAADC_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
#endif
/* PDM */
#define PDM_ENABLED 0
#if (PDM_ENABLED == 1)
#define PDM_CONFIG_MODE NRF_PDM_MODE_MONO
#define PDM_CONFIG_EDGE NRF_PDM_EDGE_LEFTFALLING
#define PDM_CONFIG_CLOCK_FREQ NRF_PDM_FREQ_1032K
#define PDM_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
#endif
/* COMP */
#define COMP_ENABLED 0
#if (COMP_ENABLED == 1)
#define COMP_CONFIG_REF NRF_COMP_REF_Int1V8
#define COMP_CONFIG_MAIN_MODE NRF_COMP_MAIN_MODE_SE
#define COMP_CONFIG_SPEED_MODE NRF_COMP_SP_MODE_High
#define COMP_CONFIG_HYST NRF_COMP_HYST_NoHyst
#define COMP_CONFIG_ISOURCE NRF_COMP_ISOURCE_Off
#define COMP_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
#define COMP_CONFIG_INPUT NRF_COMP_INPUT_0
#endif
/* LPCOMP */
#define LPCOMP_ENABLED 0
#if (LPCOMP_ENABLED == 1)
#define LPCOMP_CONFIG_REFERENCE NRF_LPCOMP_REF_SUPPLY_4_8
#define LPCOMP_CONFIG_DETECTION NRF_LPCOMP_DETECT_DOWN
#define LPCOMP_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
#define LPCOMP_CONFIG_INPUT NRF_LPCOMP_INPUT_0
#endif
/* WDT */
#define WDT_ENABLED 0
#if (WDT_ENABLED == 1)
#define WDT_CONFIG_BEHAVIOUR NRF_WDT_BEHAVIOUR_RUN_SLEEP
#define WDT_CONFIG_RELOAD_VALUE 2000
#define WDT_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_HIGH
#endif
/* SWI EGU */
#ifdef NRF52
#define EGU_ENABLED 0
#endif
/* I2S */
#define I2S_ENABLED 0
#if (I2S_ENABLED == 1)
#define I2S_CONFIG_SCK_PIN 22
#define I2S_CONFIG_LRCK_PIN 23
#define I2S_CONFIG_MCK_PIN NRF_DRV_I2S_PIN_NOT_USED
#define I2S_CONFIG_SDOUT_PIN 24
#define I2S_CONFIG_SDIN_PIN 25
#define I2S_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_HIGH
#define I2S_CONFIG_MASTER NRF_I2S_MODE_MASTER
#define I2S_CONFIG_FORMAT NRF_I2S_FORMAT_I2S
#define I2S_CONFIG_ALIGN NRF_I2S_ALIGN_LEFT
#define I2S_CONFIG_SWIDTH NRF_I2S_SWIDTH_16BIT
#define I2S_CONFIG_CHANNELS NRF_I2S_CHANNELS_STEREO
#define I2S_CONFIG_MCK_SETUP NRF_I2S_MCK_32MDIV8
#define I2S_CONFIG_RATIO NRF_I2S_RATIO_256X
#endif
#include "nrf_drv_config_validation.h"
#endif // NRF_DRV_CONFIG_H

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/* Copyright (c) 2013 Nordic Semiconductor. All Rights Reserved.
*
* The information contained herein is property of Nordic Semiconductor ASA.
* Terms and conditions of usage are described in detail in NORDIC
* SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
*
* Licensees are granted free, non-transferable use of the information. NO
* WARRANTY of ANY KIND is provided. This heading must NOT be removed from
* the file.
*
*/
/** @cond To make doxygen skip this file */
/** @file
* This header contains defines with respect persistent storage that are specific to
* persistent storage implementation and application use case.
*/
#ifndef PSTORAGE_PL_H__
#define PSTORAGE_PL_H__
#include <stdint.h>
#include "nrf.h"
static __INLINE uint16_t pstorage_flash_page_size()
{
return (uint16_t)NRF_FICR->CODEPAGESIZE;
}
#define PSTORAGE_FLASH_PAGE_SIZE pstorage_flash_page_size() /**< Size of one flash page. */
#define PSTORAGE_FLASH_EMPTY_MASK 0xFFFFFFFF /**< Bit mask that defines an empty address in flash. */
static __INLINE uint32_t pstorage_flash_page_end()
{
uint32_t bootloader_addr = NRF_UICR->NRFFW[0];
return ((bootloader_addr != PSTORAGE_FLASH_EMPTY_MASK) ?
(bootloader_addr/ PSTORAGE_FLASH_PAGE_SIZE) : NRF_FICR->CODESIZE);
}
#define PSTORAGE_FLASH_PAGE_END pstorage_flash_page_end()
#define PSTORAGE_NUM_OF_PAGES 4 //3 /**< Number of flash pages allocated for the pstorage module excluding the swap page, configurable based on system requirements. */
#define PSTORAGE_MIN_BLOCK_SIZE 0x0010 /**< Minimum size of block that can be registered with the module. Should be configured based on system requirements, recommendation is not have this value to be at least size of word. */
#define PSTORAGE_DATA_START_ADDR ((PSTORAGE_FLASH_PAGE_END - PSTORAGE_NUM_OF_PAGES) \
* PSTORAGE_FLASH_PAGE_SIZE) /**< Start address for persistent data, configurable according to system requirements. */
#define PSTORAGE_DATA_END_ADDR (PSTORAGE_FLASH_PAGE_END * PSTORAGE_FLASH_PAGE_SIZE) /**< End address for persistent data, configurable according to system requirements. */
#define PSTORAGE_SWAP_ADDR PSTORAGE_DATA_END_ADDR
#define PSTORAGE_MAX_BLOCK_SIZE PSTORAGE_FLASH_PAGE_SIZE /**< Maximum size of block that can be registered with the module. Should be configured based on system requirements. And should be greater than or equal to the minimum size. */
#define PSTORAGE_CMD_QUEUE_SIZE 10 /**< Maximum number of flash access commands that can be maintained by the module for all applications. Configurable. */
/**@breif Define this flag in case Raw access to persistent memory is to be enabled. Raw mode
* unlike the data mode is for uses other than storing data from various mode. This mode is
* employed when unpdating firmware or similar uses. Therefore, this mode shall be enabled
* only for these special usecases and typically disabled.
*/
#define PSTORAGE_RAW_MODE_ENABLE
/** Abstracts persistently memory block identifier. */
typedef uint32_t pstorage_block_t;
typedef struct
{
uint32_t module_id; /**< Module ID.*/
pstorage_block_t block_id; /**< Block ID.*/
} pstorage_handle_t;
typedef uint32_t pstorage_size_t; /** Size of length and offset fields. */
/**@brief Handles Flash Access Result Events. To be called in the system event dispatcher of the application. */
void pstorage_sys_event_handler (uint32_t sys_evt);
#endif // PSTORAGE_PL_H__
/** @} */
/** @endcond */

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/* Linker script to configure memory regions. */
SEARCH_DIR(.)
GROUP(-lgcc -lc -lnosys)
MEMORY
{
/** Flash start address for the bootloader. This setting will also be stored in UICR to allow the
* MBR to init the bootloader when starting the system. This value must correspond to
* BOOTLOADER_REGION_START found in dfu_types.h. The system is prevented from starting up if
* those values do not match. The check is performed in main.c, see
* APP_ERROR_CHECK_BOOL(*((uint32_t *)NRF_UICR_BOOT_START_ADDRESS) == BOOTLOADER_REGION_START);
*/
FLASH (rx) : ORIGIN = 0x74000, LENGTH = 0xA000 /* 40 KB */
/** RAM Region for bootloader. This setting is suitable when used with s132. */
RAM (rwx) : ORIGIN = 0x20002C00, LENGTH = 0x5380
/** Location of non initialized RAM. Non initialized RAM is used for exchanging bond information
* from application to bootloader when using buttonluss DFU OTA.
*/
NOINIT (rwx) : ORIGIN = 0x20007F80, LENGTH = 0x80
/** Location of bootloader setting in flash. */
BOOTLOADER_SETTINGS (rw) : ORIGIN = 0x0007F000, LENGTH = 0x1000
/** Location in UICR where bootloader start address is stored. */
UICR_BOOTLOADER (r) : ORIGIN = 0x10001014, LENGTH = 0x04
/** Location of mbr params page in flash. */
MBR_PARAMS_PAGE (rw) : ORIGIN = 0x0007E000, LENGTH = 0x1000
/** Location in UICR where mbr params page address is stored. */
UICR_MBR_PARAM_PAGE(r) : ORIGIN = 0x10001018, LENGTH = 0x04
}
SECTIONS
{
.fs_data_out ALIGN(4):
{
PROVIDE( __start_fs_data = .);
KEEP(*(fs_data))
PROVIDE( __stop_fs_data = .);
} = 0
/* Place the bootloader settings page in flash. */
.bootloaderSettings(NOLOAD) :
{
} > BOOTLOADER_SETTINGS
/* Write the bootloader address in UICR. */
.uicrBootStartAddress :
{
KEEP(*(.uicrBootStartAddress))
} > UICR_BOOTLOADER
/* Place the mbr params page in flash. */
.mbrParamsPage(NOLOAD) :
{
} > MBR_PARAMS_PAGE
/* Write the bootloader address in UICR. */
.uicrMbrParamsPageAddress :
{
KEEP(*(.uicrMbrParamsPageAddress))
} > UICR_MBR_PARAM_PAGE
/* No init RAM section in bootloader. Used for bond information exchange. */
.noinit(NOLOAD) :
{
} > NOINIT
/* other placements follow here... */
}
INCLUDE "nrf52_common.ld"

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/* Linker script to configure memory regions. */
SEARCH_DIR(.)
GROUP(-lgcc -lc -lnosys)
MEMORY
{
/** Flash start address for the bootloader. This setting will also be stored in UICR to allow the
* MBR to init the bootloader when starting the system. This value must correspond to
* BOOTLOADER_REGION_START found in dfu_types.h. The system is prevented from starting up if
* those values do not match. The check is performed in main.c, see
* APP_ERROR_CHECK_BOOL(*((uint32_t *)NRF_UICR_BOOT_START_ADDRESS) == BOOTLOADER_REGION_START);
*/
FLASH (rx) : ORIGIN = 0x74000, LENGTH = 0xA000 /* 40 KB */
/** RAM Region for bootloader. This setting is suitable when used with s132. */
RAM (rwx) : ORIGIN = 0x20003000, LENGTH = 0x4000
/** Location of non initialized RAM. Non initialized RAM is used for exchanging bond information
* from application to bootloader when using buttonluss DFU OTA.
*/
NOINIT (rwx) : ORIGIN = 0x20007F80, LENGTH = 0x80
/** Location of bootloader setting in flash. */
BOOTLOADER_SETTINGS (rw) : ORIGIN = 0x0007F000, LENGTH = 0x1000
/** Location in UICR where bootloader start address is stored. */
UICR_BOOTLOADER (r) : ORIGIN = 0x10001014, LENGTH = 0x04
/** Location of mbr params page in flash. */
MBR_PARAMS_PAGE (rw) : ORIGIN = 0x0007E000, LENGTH = 0x1000
/** Location in UICR where mbr params page address is stored. */
UICR_MBR_PARAM_PAGE(r) : ORIGIN = 0x10001018, LENGTH = 0x04
}
SECTIONS
{
.fs_data_out ALIGN(4):
{
PROVIDE( __start_fs_data = .);
KEEP(*(fs_data))
PROVIDE( __stop_fs_data = .);
} = 0
/* Place the bootloader settings page in flash. */
.bootloaderSettings(NOLOAD) :
{
} > BOOTLOADER_SETTINGS
/* Write the bootloader address in UICR. */
.uicrBootStartAddress :
{
KEEP(*(.uicrBootStartAddress))
} > UICR_BOOTLOADER
/* Place the mbr params page in flash. */
.mbrParamsPage(NOLOAD) :
{
} > MBR_PARAMS_PAGE
/* Write the bootloader address in UICR. */
.uicrMbrParamsPageAddress :
{
KEEP(*(.uicrMbrParamsPageAddress))
} > UICR_MBR_PARAM_PAGE
/* No init RAM section in bootloader. Used for bond information exchange. */
.noinit(NOLOAD) :
{
} > NOINIT
/* other placements follow here... */
}
INCLUDE "nrf52_common.ld"

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#******************************************************************************
# CONFIGURE
# - BOOT VERSION : 050: S132 v201, 055: S132 v500
#******************************************************************************
VERSION_SINGLEBANK = 1
include ../make_common.mk