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porting to 52840

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hathach 2018-02-08 17:34:27 +07:00
parent 9b5c36b161
commit 7de0b11529
12 changed files with 603 additions and 3620 deletions
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91
nRF5_SDK_11.0.0_89a8197/components/device/compiler_abstraction.h
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@ -1,32 +1,44 @@
/* Copyright (c) 2015, Nordic Semiconductor ASA /*
* All rights reserved.
* Copyright (c) 2010 - 2017, Nordic Semiconductor ASA
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met: All rights reserved.
*
* * Redistributions of source code must retain the above copyright notice, this Redistribution and use in source and binary forms, with or without modification,
* list of conditions and the following disclaimer. are permitted provided that the following conditions are met:
*
* * Redistributions in binary form must reproduce the above copyright notice, 1. Redistributions of source code must retain the above copyright notice, this
* this list of conditions and the following disclaimer in the documentation list of conditions and the following disclaimer.
* and/or other materials provided with the distribution.
* 2. Redistributions in binary form, except as embedded into a Nordic
* * Neither the name of Nordic Semiconductor ASA nor the names of its Semiconductor ASA integrated circuit in a product or a software update for
* contributors may be used to endorse or promote products derived from such product, must reproduce the above copyright notice, this list of
* this software without specific prior written permission. conditions and the following disclaimer in the documentation and/or other
* materials provided with the distribution.
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 3. Neither the name of Nordic Semiconductor ASA nor the names of its
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE contributors may be used to endorse or promote products derived from this
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE software without specific prior written permission.
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 4. This software, with or without modification, must only be used with a
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER Nordic Semiconductor ASA integrated circuit.
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 5. Any software provided in binary form under this license must not be reverse
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. engineered, decompiled, modified and/or disassembled.
*
*/ THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _COMPILER_ABSTRACTION_H #ifndef _COMPILER_ABSTRACTION_H
#define _COMPILER_ABSTRACTION_H #define _COMPILER_ABSTRACTION_H
@ -50,6 +62,10 @@
#define __ALIGN(n) __align(n) #define __ALIGN(n) __align(n)
#endif #endif
#ifndef __PACKED
#define __PACKED __packed
#endif
#define GET_SP() __current_sp() #define GET_SP() __current_sp()
#elif defined ( __ICCARM__ ) #elif defined ( __ICCARM__ )
@ -66,11 +82,15 @@
#define __WEAK __weak #define __WEAK __weak
#endif #endif
/* Not defined for IAR since it requires a new line to work, and C preprocessor does not allow that. */
#ifndef __ALIGN #ifndef __ALIGN
#define __ALIGN(n) #define STRING_PRAGMA(x) _Pragma(#x)
#define __ALIGN(n) STRING_PRAGMA(data_alignment = n)
#endif #endif
#ifndef __PACKED
#define __PACKED __packed
#endif
#define GET_SP() __get_SP() #define GET_SP() __get_SP()
#elif defined ( __GNUC__ ) #elif defined ( __GNUC__ )
@ -91,6 +111,10 @@
#define __ALIGN(n) __attribute__((aligned(n))) #define __ALIGN(n) __attribute__((aligned(n)))
#endif #endif
#ifndef __PACKED
#define __PACKED __attribute__((packed))
#endif
#define GET_SP() gcc_current_sp() #define GET_SP() gcc_current_sp()
static inline unsigned int gcc_current_sp(void) static inline unsigned int gcc_current_sp(void)
@ -116,6 +140,11 @@
#ifndef __ALIGN #ifndef __ALIGN
#define __ALIGN(n) __align(n) #define __ALIGN(n) __align(n)
#endif #endif
/* Not defined for TASKING. */
#ifndef __PACKED
#define __PACKED
#endif
#define GET_SP() __get_MSP() #define GET_SP() __get_MSP()

112
nRF5_SDK_11.0.0_89a8197/components/device/nrf.h
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@ -1,62 +1,98 @@
/* Copyright (c) 2015, Nordic Semiconductor ASA /*
* All rights reserved.
* Copyright (c) 2010 - 2017, Nordic Semiconductor ASA
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met: All rights reserved.
*
* * Redistributions of source code must retain the above copyright notice, this Redistribution and use in source and binary forms, with or without modification,
* list of conditions and the following disclaimer. are permitted provided that the following conditions are met:
*
* * Redistributions in binary form must reproduce the above copyright notice, 1. Redistributions of source code must retain the above copyright notice, this
* this list of conditions and the following disclaimer in the documentation list of conditions and the following disclaimer.
* and/or other materials provided with the distribution.
* 2. Redistributions in binary form, except as embedded into a Nordic
* * Neither the name of Nordic Semiconductor ASA nor the names of its Semiconductor ASA integrated circuit in a product or a software update for
* contributors may be used to endorse or promote products derived from such product, must reproduce the above copyright notice, this list of
* this software without specific prior written permission. conditions and the following disclaimer in the documentation and/or other
* materials provided with the distribution.
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 3. Neither the name of Nordic Semiconductor ASA nor the names of its
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE contributors may be used to endorse or promote products derived from this
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE software without specific prior written permission.
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 4. This software, with or without modification, must only be used with a
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER Nordic Semiconductor ASA integrated circuit.
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 5. Any software provided in binary form under this license must not be reverse
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. engineered, decompiled, modified and/or disassembled.
*
*/ THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef NRF_H #ifndef NRF_H
#define NRF_H #define NRF_H
/* MDK version */ /* MDK version */
#define MDK_MAJOR_VERSION 8 #define MDK_MAJOR_VERSION 8
#define MDK_MINOR_VERSION 5 #define MDK_MINOR_VERSION 15
#define MDK_MICRO_VERSION 0 #define MDK_MICRO_VERSION 0
/* Redefine "old" too-generic name NRF52 to NRF52832_XXAA to keep backwards compatibility. */
#if defined (NRF52)
#ifndef NRF52832_XXAA
#define NRF52832_XXAA
#endif
#endif
/* Define NRF52_SERIES for common use in nRF52 series devices. Only if not previously defined. */
#if defined (NRF52810_XXAA) || defined (NRF52832_XXAA) || defined (NRF52832_XXAB) || defined (NRF52840_XXAA)
#ifndef NRF52_SERIES
#define NRF52_SERIES
#endif
#endif
#if defined(_WIN32) #if defined(_WIN32)
/* Do not include nrf51 specific files when building for PC host */ /* Do not include nrf specific files when building for PC host */
//#elif defined(__unix) #elif defined(__unix)
/* Do not include nrf51 specific files when building for PC host */ /* Do not include nrf specific files when building for PC host */
#elif defined(__APPLE__) #elif defined(__APPLE__)
/* Do not include nrf51 specific files when building for PC host */ /* Do not include nrf specific files when building for PC host */
#else #else
/* Family selection for family includes. */ /* Device selection for device includes. */
#if defined (NRF51) #if defined (NRF51)
#include "nrf51.h" #include "nrf51.h"
#include "nrf51_bitfields.h" #include "nrf51_bitfields.h"
#include "nrf51_deprecated.h" #include "nrf51_deprecated.h"
#elif defined (NRF52) #elif defined (NRF52840_XXAA)
#include "nrf52840.h"
#include "nrf52840_bitfields.h"
#include "nrf51_to_nrf52840.h"
#include "nrf52_to_nrf52840.h"
#elif defined (NRF52832_XXAA) || defined (NRF52832_XXAB)
#include "nrf52.h" #include "nrf52.h"
#include "nrf52_bitfields.h" #include "nrf52_bitfields.h"
#include "nrf51_to_nrf52.h" #include "nrf51_to_nrf52.h"
#include "nrf52_name_change.h" #include "nrf52_name_change.h"
#elif defined (NRF52810_XXAA)
#include "nrf52810.h"
#include "nrf52810_bitfields.h"
#include "nrf51_to_nrf52810.h"
#include "nrf52_to_nrf52810.h"
#else #else
#error "Device family must be defined. See nrf.h." #error "Device must be defined. See nrf.h."
#endif /* NRF51, NRF52 */ #endif /* NRF51, NRF52832_XXAA, NRF52832_XXAB, NRF52810_XXAA, NRF52840_XXAA */
#include "compiler_abstraction.h" #include "compiler_abstraction.h"

88
nRF5_SDK_11.0.0_89a8197/components/device/nrf51_to_nrf52.h
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@ -1,32 +1,43 @@
/* Copyright (c) 2015, Nordic Semiconductor ASA /*
* All rights reserved.
* Copyright (c) 2010 - 2017, Nordic Semiconductor ASA
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met: All rights reserved.
*
* * Redistributions of source code must retain the above copyright notice, this Redistribution and use in source and binary forms, with or without modification,
* list of conditions and the following disclaimer. are permitted provided that the following conditions are met:
*
* * Redistributions in binary form must reproduce the above copyright notice, 1. Redistributions of source code must retain the above copyright notice, this
* this list of conditions and the following disclaimer in the documentation list of conditions and the following disclaimer.
* and/or other materials provided with the distribution.
* 2. Redistributions in binary form, except as embedded into a Nordic
* * Neither the name of Nordic Semiconductor ASA nor the names of its Semiconductor ASA integrated circuit in a product or a software update for
* contributors may be used to endorse or promote products derived from such product, must reproduce the above copyright notice, this list of
* this software without specific prior written permission. conditions and the following disclaimer in the documentation and/or other
* materials provided with the distribution.
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 3. Neither the name of Nordic Semiconductor ASA nor the names of its
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE contributors may be used to endorse or promote products derived from this
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE software without specific prior written permission.
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 4. This software, with or without modification, must only be used with a
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER Nordic Semiconductor ASA integrated circuit.
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 5. Any software provided in binary form under this license must not be reverse
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. engineered, decompiled, modified and/or disassembled.
*
*/ THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef NRF51_TO_NRF52_H #ifndef NRF51_TO_NRF52_H
#define NRF51_TO_NRF52_H #define NRF51_TO_NRF52_H
@ -35,7 +46,7 @@
/* This file is given to prevent your SW from not compiling with the name changes between nRF51 and nRF52 devices. /* This file is given to prevent your SW from not compiling with the name changes between nRF51 and nRF52 devices.
* It redefines the old nRF51 names into the new ones as long as the functionality is still supported. If the * It redefines the old nRF51 names into the new ones as long as the functionality is still supported. If the
* functionality is gone, there old names are not define, so compilation will fail. Note that also includes macros * functionality is gone, there old names are not defined, so compilation will fail. Note that also includes macros
* from the nrf51_deprecated.h file. */ * from the nrf51_deprecated.h file. */
@ -82,6 +93,13 @@
#define NRF_GPIO_BASE NRF_P0_BASE #define NRF_GPIO_BASE NRF_P0_BASE
/* QDEC */
/* The registers PSELA, PSELB and PSELLED were restructured into a struct. */
#define PSELLED PSEL.LED
#define PSELA PSEL.A
#define PSELB PSEL.B
/* SPIS */ /* SPIS */
/* The registers PSELSCK, PSELMISO, PSELMOSI, PSELCSN were restructured into a struct. */ /* The registers PSELSCK, PSELMISO, PSELMOSI, PSELCSN were restructured into a struct. */
#define PSELSCK PSEL.SCK #define PSELSCK PSEL.SCK
@ -524,6 +542,16 @@
#define LPCOMP_COMP_IRQn COMP_LPCOMP_IRQn #define LPCOMP_COMP_IRQn COMP_LPCOMP_IRQn
/* REFSEL register redefined enumerated values and added some more. */
#define LPCOMP_REFSEL_REFSEL_SupplyOneEighthPrescaling LPCOMP_REFSEL_REFSEL_Ref1_8Vdd
#define LPCOMP_REFSEL_REFSEL_SupplyTwoEighthsPrescaling LPCOMP_REFSEL_REFSEL_Ref2_8Vdd
#define LPCOMP_REFSEL_REFSEL_SupplyThreeEighthsPrescaling LPCOMP_REFSEL_REFSEL_Ref3_8Vdd
#define LPCOMP_REFSEL_REFSEL_SupplyFourEighthsPrescaling LPCOMP_REFSEL_REFSEL_Ref4_8Vdd
#define LPCOMP_REFSEL_REFSEL_SupplyFiveEighthsPrescaling LPCOMP_REFSEL_REFSEL_Ref5_8Vdd
#define LPCOMP_REFSEL_REFSEL_SupplySixEighthsPrescaling LPCOMP_REFSEL_REFSEL_Ref6_8Vdd
#define LPCOMP_REFSEL_REFSEL_SupplySevenEighthsPrescaling LPCOMP_REFSEL_REFSEL_Ref7_8Vdd
/* RADIO */ /* RADIO */
/* The name of the field SKIPADDR was corrected. Old macros added for compatibility. */ /* The name of the field SKIPADDR was corrected. Old macros added for compatibility. */
#define RADIO_CRCCNF_SKIP_ADDR_Pos RADIO_CRCCNF_SKIPADDR_Pos #define RADIO_CRCCNF_SKIP_ADDR_Pos RADIO_CRCCNF_SKIPADDR_Pos

111
nRF5_SDK_11.0.0_89a8197/components/device/nrf52.h
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@ -6,38 +6,47 @@
* nrf52 from Nordic Semiconductor. * nrf52 from Nordic Semiconductor.
* *
* @version V1 * @version V1
* @date 23. February 2016 * @date 3. October 2017
* *
* @note Generated with SVDConv V2.81d * @note Generated with SVDConv V2.81d
* from CMSIS SVD File 'nrf52.svd' Version 1, * from CMSIS SVD File 'nrf52.svd' Version 1,
* *
* @par Copyright (c) 2015, Nordic Semiconductor ASA * @par Copyright (c) 2010 - 2017, Nordic Semiconductor ASA
*
* All rights reserved. * All rights reserved.
* *
* Redistribution and use in source and binary forms, with or without * Redistribution and use in source and binary forms, with or without modification,
* modification, are permitted provided that the following conditions are met: * are permitted provided that the following conditions are met:
* *
* * Redistributions of source code must retain the above copyright notice, this * 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer. * list of conditions and the following disclaimer.
* *
* * Redistributions in binary form must reproduce the above copyright notice, * 2. Redistributions in binary form, except as embedded into a Nordic
* this list of conditions and the following disclaimer in the documentation * Semiconductor ASA integrated circuit in a product or a software update for
* and/or other materials provided with the distribution. * such product, must reproduce the above copyright notice, this list of
* conditions and the following disclaimer in the documentation and/or other
* materials provided with the distribution.
* *
* * Neither the name of Nordic Semiconductor ASA nor the names of its * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
* contributors may be used to endorse or promote products derived from * contributors may be used to endorse or promote products derived from this
* this software without specific prior written permission. * software without specific prior written permission.
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * 4. This software, with or without modification, must only be used with a
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * Nordic Semiconductor ASA integrated circuit.
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE *
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE * 5. Any software provided in binary form under this license must not be reverse
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * engineered, decompiled, modified and/or disassembled.
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR *
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
* GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* *
* *
*******************************************************************************************************/ *******************************************************************************************************/
@ -212,25 +221,6 @@ typedef struct {
__I uint32_t RESERVED0; __I uint32_t RESERVED0;
} POWER_RAM_Type; } POWER_RAM_Type;
typedef struct {
__IO uint32_t CPU0; /*!< AHB bus master priority register for CPU0 */
__IO uint32_t SPIS1; /*!< AHB bus master priority register for SPIM1, SPIS1, TWIM1 and
TWIS1 */
__IO uint32_t RADIO; /*!< AHB bus master priority register for RADIO */
__IO uint32_t ECB; /*!< AHB bus master priority register for ECB */
__IO uint32_t CCM; /*!< AHB bus master priority register for CCM */
__IO uint32_t AAR; /*!< AHB bus master priority register for AAR */
__IO uint32_t SAADC; /*!< AHB bus master priority register for SAADC */
__IO uint32_t UARTE; /*!< AHB bus master priority register for UARTE */
__IO uint32_t SERIAL0; /*!< AHB bus master priority register for SPIM0, SPIS0, TWIM0 and
TWIS0 */
__IO uint32_t SERIAL2; /*!< AHB bus master priority register for SPIM2 and SPIS2 */
__IO uint32_t NFCT; /*!< AHB bus master priority register for NFCT */
__IO uint32_t I2S; /*!< AHB bus master priority register for I2S */
__IO uint32_t PDM; /*!< AHB bus master priority register for PDM */
__IO uint32_t PWM; /*!< AHB bus master priority register for PWM0, PWM1 and PWM2 */
} AMLI_RAMPRI_Type;
typedef struct { typedef struct {
__IO uint32_t RTS; /*!< Pin select for RTS signal */ __IO uint32_t RTS; /*!< Pin select for RTS signal */
__IO uint32_t TXD; /*!< Pin select for TXD signal */ __IO uint32_t TXD; /*!< Pin select for TXD signal */
@ -371,12 +361,12 @@ typedef struct {
} QDEC_PSEL_Type; } QDEC_PSEL_Type;
typedef struct { typedef struct {
__IO uint32_t PTR; /*!< Description cluster[0]: Beginning address in Data RAM of sequence __IO uint32_t PTR; /*!< Description cluster[0]: Beginning address in Data RAM of this
A */ sequence */
__IO uint32_t CNT; /*!< Description cluster[0]: Amount of values (duty cycles) in sequence __IO uint32_t CNT; /*!< Description cluster[0]: Amount of values (duty cycles) in this
A */ sequence */
__IO uint32_t REFRESH; /*!< Description cluster[0]: Amount of additional PWM periods between __IO uint32_t REFRESH; /*!< Description cluster[0]: Amount of additional PWM periods between
samples loaded to compare register (load every CNT+1 PWM periods) */ samples loaded into compare register */
__IO uint32_t ENDDELAY; /*!< Description cluster[0]: Time added after the sequence */ __IO uint32_t ENDDELAY; /*!< Description cluster[0]: Time added after the sequence */
__I uint32_t RESERVED1[4]; __I uint32_t RESERVED1[4];
} PWM_SEQ_Type; } PWM_SEQ_Type;
@ -633,28 +623,12 @@ typedef struct { /*!< CLOCK Structure
__I uint32_t RESERVED5[62]; __I uint32_t RESERVED5[62];
__IO uint32_t LFCLKSRC; /*!< Clock source for the LFCLK */ __IO uint32_t LFCLKSRC; /*!< Clock source for the LFCLK */
__I uint32_t RESERVED6[7]; __I uint32_t RESERVED6[7];
__IO uint32_t CTIV; /*!< Calibration timer interval (retained register, same reset behaviour __IO uint32_t CTIV; /*!< Calibration timer interval */
as RESETREAS) */
__I uint32_t RESERVED7[8]; __I uint32_t RESERVED7[8];
__IO uint32_t TRACECONFIG; /*!< Clocking options for the Trace Port debug interface */ __IO uint32_t TRACECONFIG; /*!< Clocking options for the Trace Port debug interface */
} NRF_CLOCK_Type; } NRF_CLOCK_Type;
/* ================================================================================ */
/* ================ AMLI ================ */
/* ================================================================================ */
/**
* @brief AHB Multi-Layer Interface (AMLI)
*/
typedef struct { /*!< AMLI Structure */
__I uint32_t RESERVED0[896];
AMLI_RAMPRI_Type RAMPRI; /*!< RAM configurable priority configuration structure */
} NRF_AMLI_Type;
/* ================================================================================ */ /* ================================================================================ */
/* ================ RADIO ================ */ /* ================ RADIO ================ */
/* ================================================================================ */ /* ================================================================================ */
@ -754,9 +728,12 @@ typedef struct { /*!< UARTE Structure
__I uint32_t RESERVED1[52]; __I uint32_t RESERVED1[52];
__IO uint32_t EVENTS_CTS; /*!< CTS is activated (set low). Clear To Send. */ __IO uint32_t EVENTS_CTS; /*!< CTS is activated (set low). Clear To Send. */
__IO uint32_t EVENTS_NCTS; /*!< CTS is deactivated (set high). Not Clear To Send. */ __IO uint32_t EVENTS_NCTS; /*!< CTS is deactivated (set high). Not Clear To Send. */
__I uint32_t RESERVED2[2]; __IO uint32_t EVENTS_RXDRDY; /*!< Data received in RXD (but potentially not yet transferred to
Data RAM) */
__I uint32_t RESERVED2;
__IO uint32_t EVENTS_ENDRX; /*!< Receive buffer is filled up */ __IO uint32_t EVENTS_ENDRX; /*!< Receive buffer is filled up */
__I uint32_t RESERVED3[3]; __I uint32_t RESERVED3[2];
__IO uint32_t EVENTS_TXDRDY; /*!< Data sent from TXD */
__IO uint32_t EVENTS_ENDTX; /*!< Last TX byte transmitted */ __IO uint32_t EVENTS_ENDTX; /*!< Last TX byte transmitted */
__IO uint32_t EVENTS_ERROR; /*!< Error detected */ __IO uint32_t EVENTS_ERROR; /*!< Error detected */
__I uint32_t RESERVED4[7]; __I uint32_t RESERVED4[7];
@ -779,7 +756,7 @@ typedef struct { /*!< UARTE Structure
__I uint32_t RESERVED11; __I uint32_t RESERVED11;
UARTE_PSEL_Type PSEL; /*!< Unspecified */ UARTE_PSEL_Type PSEL; /*!< Unspecified */
__I uint32_t RESERVED12[3]; __I uint32_t RESERVED12[3];
__IO uint32_t BAUDRATE; /*!< Baud rate */ __IO uint32_t BAUDRATE; /*!< Baud rate. Accuracy depends on the HFCLK source selected. */
__I uint32_t RESERVED13[3]; __I uint32_t RESERVED13[3];
UARTE_RXD_Type RXD; /*!< RXD EasyDMA channel */ UARTE_RXD_Type RXD; /*!< RXD EasyDMA channel */
__I uint32_t RESERVED14; __I uint32_t RESERVED14;
@ -874,7 +851,7 @@ typedef struct { /*!< SPIM Structure
__I uint32_t RESERVED10; __I uint32_t RESERVED10;
SPIM_PSEL_Type PSEL; /*!< Unspecified */ SPIM_PSEL_Type PSEL; /*!< Unspecified */
__I uint32_t RESERVED11[4]; __I uint32_t RESERVED11[4];
__IO uint32_t FREQUENCY; /*!< SPI frequency */ __IO uint32_t FREQUENCY; /*!< SPI frequency. Accuracy depends on the HFCLK source selected. */
__I uint32_t RESERVED12[3]; __I uint32_t RESERVED12[3];
SPIM_RXD_Type RXD; /*!< RXD EasyDMA channel */ SPIM_RXD_Type RXD; /*!< RXD EasyDMA channel */
SPIM_TXD_Type TXD; /*!< TXD EasyDMA channel */ SPIM_TXD_Type TXD; /*!< TXD EasyDMA channel */
@ -1977,7 +1954,6 @@ typedef struct { /*!< GPIO Structure
#define NRF_BPROT_BASE 0x40000000UL #define NRF_BPROT_BASE 0x40000000UL
#define NRF_POWER_BASE 0x40000000UL #define NRF_POWER_BASE 0x40000000UL
#define NRF_CLOCK_BASE 0x40000000UL #define NRF_CLOCK_BASE 0x40000000UL
#define NRF_AMLI_BASE 0x40000000UL
#define NRF_RADIO_BASE 0x40001000UL #define NRF_RADIO_BASE 0x40001000UL
#define NRF_UARTE0_BASE 0x40002000UL #define NRF_UARTE0_BASE 0x40002000UL
#define NRF_UART0_BASE 0x40002000UL #define NRF_UART0_BASE 0x40002000UL
@ -2049,7 +2025,6 @@ typedef struct { /*!< GPIO Structure
#define NRF_BPROT ((NRF_BPROT_Type *) NRF_BPROT_BASE) #define NRF_BPROT ((NRF_BPROT_Type *) NRF_BPROT_BASE)
#define NRF_POWER ((NRF_POWER_Type *) NRF_POWER_BASE) #define NRF_POWER ((NRF_POWER_Type *) NRF_POWER_BASE)
#define NRF_CLOCK ((NRF_CLOCK_Type *) NRF_CLOCK_BASE) #define NRF_CLOCK ((NRF_CLOCK_Type *) NRF_CLOCK_BASE)
#define NRF_AMLI ((NRF_AMLI_Type *) NRF_AMLI_BASE)
#define NRF_RADIO ((NRF_RADIO_Type *) NRF_RADIO_BASE) #define NRF_RADIO ((NRF_RADIO_Type *) NRF_RADIO_BASE)
#define NRF_UARTE0 ((NRF_UARTE_Type *) NRF_UARTE0_BASE) #define NRF_UARTE0 ((NRF_UARTE_Type *) NRF_UARTE0_BASE)
#define NRF_UART0 ((NRF_UART_Type *) NRF_UART0_BASE) #define NRF_UART0 ((NRF_UART_Type *) NRF_UART0_BASE)

2780
nRF5_SDK_11.0.0_89a8197/components/device/nrf52_bitfields.h
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File diff suppressed because it is too large Load Diff

75
nRF5_SDK_11.0.0_89a8197/components/device/nrf52_name_change.h
View File

@ -1,32 +1,43 @@
/* Copyright (c) 2015, Nordic Semiconductor ASA /*
* All rights reserved.
* Copyright (c) 2010 - 2017, Nordic Semiconductor ASA
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met: All rights reserved.
*
* * Redistributions of source code must retain the above copyright notice, this Redistribution and use in source and binary forms, with or without modification,
* list of conditions and the following disclaimer. are permitted provided that the following conditions are met:
*
* * Redistributions in binary form must reproduce the above copyright notice, 1. Redistributions of source code must retain the above copyright notice, this
* this list of conditions and the following disclaimer in the documentation list of conditions and the following disclaimer.
* and/or other materials provided with the distribution.
* 2. Redistributions in binary form, except as embedded into a Nordic
* * Neither the name of Nordic Semiconductor ASA nor the names of its Semiconductor ASA integrated circuit in a product or a software update for
* contributors may be used to endorse or promote products derived from such product, must reproduce the above copyright notice, this list of
* this software without specific prior written permission. conditions and the following disclaimer in the documentation and/or other
* materials provided with the distribution.
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 3. Neither the name of Nordic Semiconductor ASA nor the names of its
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE contributors may be used to endorse or promote products derived from this
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE software without specific prior written permission.
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 4. This software, with or without modification, must only be used with a
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER Nordic Semiconductor ASA integrated circuit.
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 5. Any software provided in binary form under this license must not be reverse
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. engineered, decompiled, modified and/or disassembled.
*
*/ THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef NRF52_NAME_CHANGE_H #ifndef NRF52_NAME_CHANGE_H
#define NRF52_NAME_CHANGE_H #define NRF52_NAME_CHANGE_H
@ -60,9 +71,9 @@
#define I2S_CONFIG_CHANNELS_CHANNELS_LEFT I2S_CONFIG_CHANNELS_CHANNELS_Left #define I2S_CONFIG_CHANNELS_CHANNELS_LEFT I2S_CONFIG_CHANNELS_CHANNELS_Left
#define I2S_CONFIG_CHANNELS_CHANNELS_RIGHT I2S_CONFIG_CHANNELS_CHANNELS_Right #define I2S_CONFIG_CHANNELS_CHANNELS_RIGHT I2S_CONFIG_CHANNELS_CHANNELS_Right
/* LPCOMP */
/* Corrected typo in RESULT register. */
#define LPCOMP_RESULT_RESULT_Bellow LPCOMP_RESULT_RESULT_Below
/*lint --flb "Leave library region" */ /*lint --flb "Leave library region" */

524
nRF5_SDK_11.0.0_89a8197/components/toolchain/gcc/gcc_startup_nrf52.S
View File

@ -1,524 +0,0 @@
/* Copyright (c) 2013 ARM LIMITED
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
- Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
- Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
- Neither the name of ARM nor the names of its contributors may be used
to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.
---------------------------------------------------------------------------*/
.syntax unified
.arch armv7e-m
.section .stack
.align 3
#ifdef __STACK_SIZE
.equ Stack_Size, __STACK_SIZE
#else
.equ Stack_Size, 8192
#endif
.globl __StackTop
.globl __StackLimit
__StackLimit:
.space Stack_Size
.size __StackLimit, . - __StackLimit
__StackTop:
.size __StackTop, . - __StackTop
.section .heap
.align 3
#ifdef __HEAP_SIZE
.equ Heap_Size, __HEAP_SIZE
#else
.equ Heap_Size, 8192
#endif
.globl __HeapBase
.globl __HeapLimit
__HeapBase:
.if Heap_Size
.space Heap_Size
.endif
.size __HeapBase, . - __HeapBase
__HeapLimit:
.size __HeapLimit, . - __HeapLimit
.section .isr_vector
.align 2
.globl __isr_vector
__isr_vector:
.long __StackTop /* Top of Stack */
.long Reset_Handler
.long NMI_Handler
.long HardFault_Handler
.long MemoryManagement_Handler
.long BusFault_Handler
.long UsageFault_Handler
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long SVC_Handler
.long DebugMonitor_Handler
.long 0 /*Reserved */
.long PendSV_Handler
.long SysTick_Handler
/* External Interrupts */
.long POWER_CLOCK_IRQHandler
.long RADIO_IRQHandler
.long UARTE0_UART0_IRQHandler
.long SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler
.long SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler
.long NFCT_IRQHandler
.long GPIOTE_IRQHandler
.long SAADC_IRQHandler
.long TIMER0_IRQHandler
.long TIMER1_IRQHandler
.long TIMER2_IRQHandler
.long RTC0_IRQHandler
.long TEMP_IRQHandler
.long RNG_IRQHandler
.long ECB_IRQHandler
.long CCM_AAR_IRQHandler
.long WDT_IRQHandler
.long RTC1_IRQHandler
.long QDEC_IRQHandler
.long COMP_LPCOMP_IRQHandler
.long SWI0_EGU0_IRQHandler
.long SWI1_EGU1_IRQHandler
.long SWI2_EGU2_IRQHandler
.long SWI3_EGU3_IRQHandler
.long SWI4_EGU4_IRQHandler
.long SWI5_EGU5_IRQHandler
.long TIMER3_IRQHandler
.long TIMER4_IRQHandler
.long PWM0_IRQHandler
.long PDM_IRQHandler
.long 0 /*Reserved */
.long 0 /*Reserved */
.long MWU_IRQHandler
.long PWM1_IRQHandler
.long PWM2_IRQHandler
.long SPIM2_SPIS2_SPI2_IRQHandler
.long RTC2_IRQHandler
.long I2S_IRQHandler
.long FPU_IRQHandler
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.long 0 /*Reserved */
.size __isr_vector, . - __isr_vector
/* Reset Handler */
.text
.thumb
.thumb_func
.align 1
.globl Reset_Handler
.type Reset_Handler, %function
Reset_Handler:
/* Loop to copy data from read only memory to RAM.
* The ranges of copy from/to are specified by following symbols:
* __etext: LMA of start of the section to copy from. Usually end of text
* __data_start__: VMA of start of the section to copy to.
* __bss_start__: VMA of end of the section to copy to. Normally __data_end__ is used, but by using __bss_start__
* the user can add their own initialized data section before BSS section with the INTERT AFTER command.
*
* All addresses must be aligned to 4 bytes boundary.
*/
ldr r1, =__etext
ldr r2, =__data_start__
ldr r3, =__bss_start__
subs r3, r2
ble .L_loop1_done
.L_loop1:
subs r3, #4
ldr r0, [r1,r3]
str r0, [r2,r3]
bgt .L_loop1
.L_loop1_done:
/* This part of work usually is done in C library startup code. Otherwise,
* define __STARTUP_CLEAR_BSS to enable it in this startup. This section
* clears the RAM where BSS data is located.
*
* The BSS section is specified by following symbols
* __bss_start__: start of the BSS section.
* __bss_end__: end of the BSS section.
*
* All addresses must be aligned to 4 bytes boundary.
*/
#ifdef __STARTUP_CLEAR_BSS
ldr r1, =__bss_start__
ldr r2, =__bss_end__
movs r0, 0
subs r2, r1
ble .L_loop3_done
.L_loop3:
subs r2, #4
str r0, [r1, r2]
bgt .L_loop3
.L_loop3_done:
#endif /* __STARTUP_CLEAR_BSS */
/* Execute SystemInit function. */
bl SystemInit
/* Call _start function provided by libraries.
* If those libraries are not accessible, define __START as your entry point.
*/
#ifndef __START
#define __START _start
#endif
bl __START
.pool
.size Reset_Handler,.-Reset_Handler
.section ".text"
/* Dummy Exception Handlers (infinite loops which can be modified) */
.weak NMI_Handler
.type NMI_Handler, %function
NMI_Handler:
b .
.size NMI_Handler, . - NMI_Handler
.weak HardFault_Handler
.type HardFault_Handler, %function
HardFault_Handler:
b .
.size HardFault_Handler, . - HardFault_Handler
.weak MemoryManagement_Handler
.type MemoryManagement_Handler, %function
MemoryManagement_Handler:
b .
.size MemoryManagement_Handler, . - MemoryManagement_Handler
.weak BusFault_Handler
.type BusFault_Handler, %function
BusFault_Handler:
b .
.size BusFault_Handler, . - BusFault_Handler
.weak UsageFault_Handler
.type UsageFault_Handler, %function
UsageFault_Handler:
b .
.size UsageFault_Handler, . - UsageFault_Handler
.weak SVC_Handler
.type SVC_Handler, %function
SVC_Handler:
b .
.size SVC_Handler, . - SVC_Handler
.weak DebugMonitor_Handler
.type DebugMonitor_Handler, %function
DebugMonitor_Handler:
b .
.size DebugMonitor_Handler, . - DebugMonitor_Handler
.weak PendSV_Handler
.type PendSV_Handler, %function
PendSV_Handler:
b .
.size PendSV_Handler, . - PendSV_Handler
.weak SysTick_Handler
.type SysTick_Handler, %function
SysTick_Handler:
b .
.size SysTick_Handler, . - SysTick_Handler
/* IRQ Handlers */
.globl Default_Handler
.type Default_Handler, %function
Default_Handler:
b .
.size Default_Handler, . - Default_Handler
.macro IRQ handler
.weak \handler
.set \handler, Default_Handler
.endm
IRQ POWER_CLOCK_IRQHandler
IRQ RADIO_IRQHandler
IRQ UARTE0_UART0_IRQHandler
IRQ SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler
IRQ SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler
IRQ NFCT_IRQHandler
IRQ GPIOTE_IRQHandler
IRQ SAADC_IRQHandler
IRQ TIMER0_IRQHandler
IRQ TIMER1_IRQHandler
IRQ TIMER2_IRQHandler
IRQ RTC0_IRQHandler
IRQ TEMP_IRQHandler
IRQ RNG_IRQHandler
IRQ ECB_IRQHandler
IRQ CCM_AAR_IRQHandler
IRQ WDT_IRQHandler
IRQ RTC1_IRQHandler
IRQ QDEC_IRQHandler
IRQ COMP_LPCOMP_IRQHandler
IRQ SWI0_EGU0_IRQHandler
IRQ SWI1_EGU1_IRQHandler
IRQ SWI2_EGU2_IRQHandler
IRQ SWI3_EGU3_IRQHandler
IRQ SWI4_EGU4_IRQHandler
IRQ SWI5_EGU5_IRQHandler
IRQ TIMER3_IRQHandler
IRQ TIMER4_IRQHandler
IRQ PWM0_IRQHandler
IRQ PDM_IRQHandler
IRQ MWU_IRQHandler
IRQ PWM1_IRQHandler
IRQ PWM2_IRQHandler
IRQ SPIM2_SPIS2_SPI2_IRQHandler
IRQ RTC2_IRQHandler
IRQ I2S_IRQHandler
IRQ FPU_IRQHandler
.end

301
nRF5_SDK_11.0.0_89a8197/components/toolchain/system_nrf52.c
View File

@ -1,301 +0,0 @@
/* Copyright (c) 2015, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* * Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* * Neither the name of Nordic Semiconductor ASA nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#include <stdint.h>
#include <stdbool.h>
#include "nrf.h"
#include "system_nrf52.h"
/*lint ++flb "Enter library region" */
#define __SYSTEM_CLOCK_64M (64000000UL)
static bool errata_16(void);
static bool errata_31(void);
static bool errata_32(void);
static bool errata_36(void);
static bool errata_37(void);
static bool errata_57(void);
static bool errata_66(void);
#if defined ( __CC_ARM )
uint32_t SystemCoreClock __attribute__((used)) = __SYSTEM_CLOCK_64M;
#elif defined ( __ICCARM__ )
__root uint32_t SystemCoreClock = __SYSTEM_CLOCK_64M;
#elif defined ( __GNUC__ )
uint32_t SystemCoreClock __attribute__((used)) = __SYSTEM_CLOCK_64M;
#endif
void SystemCoreClockUpdate(void)
{
SystemCoreClock = __SYSTEM_CLOCK_64M;
}
void SystemInit(void)
{
/* Workaround for Errata 16 "System: RAM may be corrupt on wakeup from CPU IDLE" found at the Errata document
for your device located at https://infocenter.nordicsemi.com/ */
if (errata_16()){
*(volatile uint32_t *)0x4007C074 = 3131961357ul;
}
/* Workaround for Errata 31 "CLOCK: Calibration values are not correctly loaded from FICR at reset" found at the Errata document
for your device located at https://infocenter.nordicsemi.com/ */
if (errata_31()){
*(volatile uint32_t *)0x4000053C = ((*(volatile uint32_t *)0x10000244) & 0x0000E000) >> 13;
}
/* Workaround for Errata 32 "DIF: Debug session automatically enables TracePort pins" found at the Errata document
for your device located at https://infocenter.nordicsemi.com/ */
if (errata_32()){
CoreDebug->DEMCR &= ~CoreDebug_DEMCR_TRCENA_Msk;
}
/* Workaround for Errata 36 "CLOCK: Some registers are not reset when expected" found at the Errata document
for your device located at https://infocenter.nordicsemi.com/ */
if (errata_36()){
NRF_CLOCK->EVENTS_DONE = 0;
NRF_CLOCK->EVENTS_CTTO = 0;
NRF_CLOCK->CTIV = 0;
}
/* Workaround for Errata 37 "RADIO: Encryption engine is slow by default" found at the Errata document
for your device located at https://infocenter.nordicsemi.com/ */
if (errata_37()){
*(volatile uint32_t *)0x400005A0 = 0x3;
}
/* Workaround for Errata 57 "NFCT: NFC Modulation amplitude" found at the Errata document
for your device located at https://infocenter.nordicsemi.com/ */
if (errata_57()){
*(volatile uint32_t *)0x40005610 = 0x00000005;
*(volatile uint32_t *)0x40005688 = 0x00000001;
*(volatile uint32_t *)0x40005618 = 0x00000000;
*(volatile uint32_t *)0x40005614 = 0x0000003F;
}
/* Workaround for Errata 66 "TEMP: Linearity specification not met with default settings" found at the Errata document
for your device located at https://infocenter.nordicsemi.com/ */
if (errata_66()){
NRF_TEMP->A0 = NRF_FICR->TEMP.A0;
NRF_TEMP->A1 = NRF_FICR->TEMP.A1;
NRF_TEMP->A2 = NRF_FICR->TEMP.A2;
NRF_TEMP->A3 = NRF_FICR->TEMP.A3;
NRF_TEMP->A4 = NRF_FICR->TEMP.A4;
NRF_TEMP->A5 = NRF_FICR->TEMP.A5;
NRF_TEMP->B0 = NRF_FICR->TEMP.B0;
NRF_TEMP->B1 = NRF_FICR->TEMP.B1;
NRF_TEMP->B2 = NRF_FICR->TEMP.B2;
NRF_TEMP->B3 = NRF_FICR->TEMP.B3;
NRF_TEMP->B4 = NRF_FICR->TEMP.B4;
NRF_TEMP->B5 = NRF_FICR->TEMP.B5;
NRF_TEMP->T0 = NRF_FICR->TEMP.T0;
NRF_TEMP->T1 = NRF_FICR->TEMP.T1;
NRF_TEMP->T2 = NRF_FICR->TEMP.T2;
NRF_TEMP->T3 = NRF_FICR->TEMP.T3;
NRF_TEMP->T4 = NRF_FICR->TEMP.T4;
}
/* Enable the FPU if the compiler used floating point unit instructions. __FPU_USED is a MACRO defined by the
* compiler. Since the FPU consumes energy, remember to disable FPU use in the compiler if floating point unit
* operations are not used in your code. */
#if (__FPU_USED == 1)
SCB->CPACR |= (3UL << 20) | (3UL << 22);
__DSB();
__ISB();
#endif
/* Configure NFCT pins as GPIOs if NFCT is not to be used in your code. If CONFIG_NFCT_PINS_AS_GPIOS is not defined,
two GPIOs (see Product Specification to see which ones) will be reserved for NFC and will not be available as
normal GPIOs. */
#if defined (CONFIG_NFCT_PINS_AS_GPIOS)
if ((NRF_UICR->NFCPINS & UICR_NFCPINS_PROTECT_Msk) == (UICR_NFCPINS_PROTECT_NFC << UICR_NFCPINS_PROTECT_Pos)){
NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Wen << NVMC_CONFIG_WEN_Pos;
while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
NRF_UICR->NFCPINS &= ~UICR_NFCPINS_PROTECT_Msk;
while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Ren << NVMC_CONFIG_WEN_Pos;
while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
NVIC_SystemReset();
}
#endif
/* Configure GPIO pads as pPin Reset pin if Pin Reset capabilities desired. If CONFIG_GPIO_AS_PINRESET is not
defined, pin reset will not be available. One GPIO (see Product Specification to see which one) will then be
reserved for PinReset and not available as normal GPIO. */
#if defined (CONFIG_GPIO_AS_PINRESET)
if (((NRF_UICR->PSELRESET[0] & UICR_PSELRESET_CONNECT_Msk) != (UICR_PSELRESET_CONNECT_Connected << UICR_PSELRESET_CONNECT_Pos)) ||
((NRF_UICR->PSELRESET[1] & UICR_PSELRESET_CONNECT_Msk) != (UICR_PSELRESET_CONNECT_Connected << UICR_PSELRESET_CONNECT_Pos))){
NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Wen << NVMC_CONFIG_WEN_Pos;
while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
NRF_UICR->PSELRESET[0] = 21;
while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
NRF_UICR->PSELRESET[1] = 21;
while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Ren << NVMC_CONFIG_WEN_Pos;
while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
NVIC_SystemReset();
}
#endif
/* Enable SWO trace functionality. If ENABLE_SWO is not defined, SWO pin will be used as GPIO (see Product
Specification to see which one). */
#if defined (ENABLE_SWO)
CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk;
NRF_CLOCK->TRACECONFIG |= CLOCK_TRACECONFIG_TRACEMUX_Serial << CLOCK_TRACECONFIG_TRACEMUX_Pos;
NRF_P0->PIN_CNF[18] = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
#endif
/* Enable Trace functionality. If ENABLE_TRACE is not defined, TRACE pins will be used as GPIOs (see Product
Specification to see which ones). */
#if defined (ENABLE_TRACE)
CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk;
NRF_CLOCK->TRACECONFIG |= CLOCK_TRACECONFIG_TRACEMUX_Parallel << CLOCK_TRACECONFIG_TRACEMUX_Pos;
NRF_P0->PIN_CNF[14] = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
NRF_P0->PIN_CNF[15] = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
NRF_P0->PIN_CNF[16] = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
NRF_P0->PIN_CNF[18] = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
NRF_P0->PIN_CNF[20] = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
#endif
SystemCoreClockUpdate();
}
static bool errata_16(void)
{
if ((((*(uint32_t *)0xF0000FE0) & 0x000000FF) == 0x6) && (((*(uint32_t *)0xF0000FE4) & 0x0000000F) == 0x0))
{
if (((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x30)
{
return true;
}
}
return false;
}
static bool errata_31(void)
{
if ((((*(uint32_t *)0xF0000FE0) & 0x000000FF) == 0x6) && (((*(uint32_t *)0xF0000FE4) & 0x0000000F) == 0x0))
{
if (((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x30)
{
return true;
}
if (((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x40)
{
return true;
}
if (((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x50)
{
return true;
}
}
return false;
}
static bool errata_32(void)
{
if ((((*(uint32_t *)0xF0000FE0) & 0x000000FF) == 0x6) && (((*(uint32_t *)0xF0000FE4) & 0x0000000F) == 0x0))
{
if (((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x30)
{
return true;
}
}
return false;
}
static bool errata_36(void)
{
if ((((*(uint32_t *)0xF0000FE0) & 0x000000FF) == 0x6) && (((*(uint32_t *)0xF0000FE4) & 0x0000000F) == 0x0))
{
if (((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x30)
{
return true;
}
if (((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x40)
{
return true;
}
if (((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x50)
{
return true;
}
}
return false;
}
static bool errata_37(void)
{
if ((((*(uint32_t *)0xF0000FE0) & 0x000000FF) == 0x6) && (((*(uint32_t *)0xF0000FE4) & 0x0000000F) == 0x0))
{
if (((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x30)
{
return true;
}
}
return false;
}
static bool errata_57(void)
{
if ((((*(uint32_t *)0xF0000FE0) & 0x000000FF) == 0x6) && (((*(uint32_t *)0xF0000FE4) & 0x0000000F) == 0x0))
{
if (((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x30)
{
return true;
}
}
return false;
}
static bool errata_66(void)
{
if ((((*(uint32_t *)0xF0000FE0) & 0x000000FF) == 0x6) && (((*(uint32_t *)0xF0000FE4) & 0x0000000F) == 0x0))
{
if (((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x50)
{
return true;
}
}
return false;
}
/*lint --flb "Leave library region" */

69
nRF5_SDK_11.0.0_89a8197/components/toolchain/system_nrf52.h
View File

@ -1,69 +0,0 @@
/* Copyright (c) 2015, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* * Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* * Neither the name of Nordic Semiconductor ASA nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#ifndef SYSTEM_NRF52_H
#define SYSTEM_NRF52_H
#ifdef __cplusplus
extern "C" {
#endif
#include <stdint.h>
extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
/**
* Initialize the system
*
* @param none
* @return none
*
* @brief Setup the microcontroller system.
* Initialize the System and update the SystemCoreClock variable.
*/
extern void SystemInit (void);
/**
* Update SystemCoreClock variable
*
* @param none
* @return none
*
* @brief Updates the SystemCoreClock with current core Clock
* retrieved from cpu registers.
*/
extern void SystemCoreClockUpdate (void);
#ifdef __cplusplus
}
#endif
#endif /* SYSTEM_NRF52_H */

4
src/boards.h
View File

@ -16,8 +16,8 @@
#include <stdint.h> #include <stdint.h>
#include "nrf_gpio.h" #include "nrf_gpio.h"
#if defined BOARD_FEATHER52 #if defined BOARD_FEATHER52840
#include "feather52.h" #include "feather52840.h"
#elif defined BOARD_METRO52 #elif defined BOARD_METRO52
#include "metro52.h" #include "metro52.h"
#else #else

18
src/feather52.h → src/feather52840.h
View File

@ -34,23 +34,23 @@
*/ */
/**************************************************************************/ /**************************************************************************/
#ifndef FEATHER52_H #ifndef _FEATHER52840_H
#define FEATHER52_H #define _FEATHER52840_H
/*------------------------------------------------------------------*/ /*------------------------------------------------------------------*/
/* LED /* LED
*------------------------------------------------------------------*/ *------------------------------------------------------------------*/
#define LEDS_NUMBER 2 #define LEDS_NUMBER 2
#define LED_1 17 #define LED_1 13
#define LED_2 19 #define LED_2 14
#define LED_STATE_ON 1 #define LED_STATE_ON 0
/*------------------------------------------------------------------*/ /*------------------------------------------------------------------*/
/* BUTTON /* BUTTON
*------------------------------------------------------------------*/ *------------------------------------------------------------------*/
#define BUTTONS_NUMBER 2 #define BUTTONS_NUMBER 2
#define BUTTON_1 20 #define BUTTON_1 11
#define BUTTON_2 22 #define BUTTON_2 12
#define BUTTON_PULL NRF_GPIO_PIN_PULLUP #define BUTTON_PULL NRF_GPIO_PIN_PULLUP
/*------------------------------------------------------------------*/ /*------------------------------------------------------------------*/
@ -63,6 +63,6 @@
#define HWFC false #define HWFC false
// Used as model string in OTA mode // Used as model string in OTA mode
#define DIS_MODEL "Bluefruit Feather 52" #define DIS_MODEL "Bluefruit Feather 52840"
#endif // FEATHER52_H #endif // _FEATHER52840_H

50
src/make_common.mk
View File

@ -20,6 +20,8 @@ SRC_PATH = ..
SD_NAME = s140 SD_NAME = s140
SD_VERSION = 6.0.0 SD_VERSION = 6.0.0
SD_NAME_UPPER = $(subst s,S,$(SD_NAME))
SD_PATH = ../../softdevice/$(SD_NAME)/$(SD_VERSION) SD_PATH = ../../softdevice/$(SD_NAME)/$(SD_VERSION)
SD_HEX = $(SD_PATH)/hex/$(SD_NAME)_nrf52840_$(SD_VERSION)-6.alpha_softdevice.hex SD_HEX = $(SD_PATH)/hex/$(SD_NAME)_nrf52840_$(SD_VERSION)-6.alpha_softdevice.hex
LINKER_SCRIPT = $(SRC_PATH)/$(SD_NAME)_$(SD_VERSION).ld LINKER_SCRIPT = $(SRC_PATH)/$(SD_NAME)_$(SD_VERSION).ld
@ -32,7 +34,7 @@ BANKMODE = dual
C_SOURCE_FILES += $(SDK_PATH)/libraries/bootloader_dfu/dfu_dual_bank.c C_SOURCE_FILES += $(SDK_PATH)/libraries/bootloader_dfu/dfu_dual_bank.c
endif endif
BOOTLOADER_S132_SUFFIX = $(VERSION_MAJOR).$(VERSION_MINOR).$(VERSION_REVISION)_$(SD_NAME)_$(BANKMODE) BOOTLOADER_SD_SUFFIX = $(VERSION_MAJOR).$(VERSION_MINOR).$(VERSION_REVISION)_$(SD_NAME)_$(BANKMODE)
FINAL_BIN_DIR := ../../bin FINAL_BIN_DIR := ../../bin
TEMPLATE_PATH = $(SDK_PATH)/toolchain/gcc TEMPLATE_PATH = $(SDK_PATH)/toolchain/gcc
@ -257,9 +259,9 @@ default: all
#building all targets #building all targets
all: all:
@$(MAKE) -s -f $(MAKEFILE_NAME) -C $(MAKEFILE_DIR) -e clean @$(MAKE) -s -f $(MAKEFILE_NAME) -C $(MAKEFILE_DIR) -e clean
@echo Making Feather52 board @echo Making Feather52840 board
@echo ---------------------- @echo ----------------------
@$(MAKE) -s -f $(MAKEFILE_NAME) -C $(MAKEFILE_DIR) -e feather52 @$(MAKE) -s -f $(MAKEFILE_NAME) -C $(MAKEFILE_DIR) -e feather52840
@$(MAKE) -s -f $(MAKEFILE_NAME) -C $(MAKEFILE_DIR) -e clean @$(MAKE) -s -f $(MAKEFILE_NAME) -C $(MAKEFILE_DIR) -e clean
@echo Making Metro52 board @echo Making Metro52 board
@echo -------------------- @echo --------------------
@ -268,9 +270,9 @@ all:
#target for printing all targets #target for printing all targets
help: help:
@echo following targets are available: @echo following targets are available:
@echo - feather52 : build for Feather nrf52 board @echo - feather52840 : build for Feather nrf52 board
@echo - metro52 : build for Metro nrf52 board @echo - metro52 : build for Metro nrf52 board
@echo - flash_feather52 : flash Feather nrf52 board @echo - flash_feather52840 : flash Feather nrf52 board
@echo - flash_metro52 : flash Metro nrf52 board @echo - flash_metro52 : flash Metro nrf52 board
C_SOURCE_FILE_NAMES = $(notdir $(C_SOURCE_FILES)) C_SOURCE_FILE_NAMES = $(notdir $(C_SOURCE_FILES))
@ -288,13 +290,13 @@ OBJECTS = $(C_OBJECTS) $(ASM_OBJECTS)
export OUTPUT_FILENAME export OUTPUT_FILENAME
export FINAL_BIN_DIR export FINAL_BIN_DIR
BOOTLOADER_WITH_S132_NAME := $(OUTPUT_FILENAME)_$(BOOTLOADER_S132_SUFFIX) BOOTLOADER_WITH_SD_NAME := $(OUTPUT_FILENAME)_$(BOOTLOADER_SD_SUFFIX)
# Target for Feather nrf52 board # Target for Feather nrf52 board
feather52: OUTPUT_FILENAME := feather52_bootloader feather52840: OUTPUT_FILENAME := feather52840_bootloader
feather52: FINAL_BIN_DIR := $(FINAL_BIN_DIR)/feather52/$(VERSION_MAJOR).$(VERSION_MINOR).$(VERSION_REVISION)/$(BANKMODE) feather52840: FINAL_BIN_DIR := $(FINAL_BIN_DIR)/feather52840/$(VERSION_MAJOR).$(VERSION_MINOR).$(VERSION_REVISION)/$(BANKMODE)
feather52: CFLAGS += -DBOARD_FEATHER52 feather52840: CFLAGS += -DBOARD_FEATHER52840
feather52: $(BUILD_DIRECTORIES) $(OBJECTS) feather52840: $(BUILD_DIRECTORIES) $(OBJECTS)
@echo Linking target: $(OUTPUT_FILENAME).out @echo Linking target: $(OUTPUT_FILENAME).out
$(NO_ECHO)$(CC) $(LDFLAGS) $(OBJECTS) $(LIBS) -lm -o $(OUTPUT_BINARY_DIRECTORY)/$(OUTPUT_FILENAME).out $(NO_ECHO)$(CC) $(LDFLAGS) $(OBJECTS) $(LIBS) -lm -o $(OUTPUT_BINARY_DIRECTORY)/$(OUTPUT_FILENAME).out
$(NO_ECHO)$(MAKE) -f $(MAKEFILE_NAME) -C $(MAKEFILE_DIR) -e finalize $(NO_ECHO)$(MAKE) -f $(MAKEFILE_NAME) -C $(MAKEFILE_DIR) -e finalize
@ -331,21 +333,21 @@ finalize: genhex genbin genpkg echosize
## Create binary .hex file from the .out file ## Create binary .hex file from the .out file
genhex: genhex:
@echo Preparing: $(OUTPUT_FILENAME).hex $(BOOTLOADER_WITH_S132_NAME).hex @echo Preparing: $(OUTPUT_FILENAME).hex $(BOOTLOADER_WITH_SD_NAME).hex
$(NO_ECHO)$(OBJCOPY) -O ihex $(OUTPUT_BINARY_DIRECTORY)/$(OUTPUT_FILENAME).out $(OUTPUT_BINARY_DIRECTORY)/$(OUTPUT_FILENAME).hex $(NO_ECHO)$(OBJCOPY) -O ihex $(OUTPUT_BINARY_DIRECTORY)/$(OUTPUT_FILENAME).out $(OUTPUT_BINARY_DIRECTORY)/$(OUTPUT_FILENAME).hex
@mergehex -q -m $(OUTPUT_BINARY_DIRECTORY)/$(OUTPUT_FILENAME).hex $(SD_HEX) -o $(OUTPUT_BINARY_DIRECTORY)/$(BOOTLOADER_WITH_S132_NAME).hex @mergehex -q -m $(OUTPUT_BINARY_DIRECTORY)/$(OUTPUT_FILENAME).hex $(SD_HEX) -o $(OUTPUT_BINARY_DIRECTORY)/$(BOOTLOADER_WITH_SD_NAME).hex
@mkdir -p $(FINAL_BIN_DIR) @mkdir -p $(FINAL_BIN_DIR)
@cp $(OUTPUT_BINARY_DIRECTORY)/$(BOOTLOADER_WITH_S132_NAME).hex $(FINAL_BIN_DIR)/ @cp $(OUTPUT_BINARY_DIRECTORY)/$(BOOTLOADER_WITH_SD_NAME).hex $(FINAL_BIN_DIR)/
## Create .bin file ## Create .bin file
genbin: genbin:
@echo Preparing: $(BOOTLOADER_WITH_S132_NAME).bin @echo Preparing: $(BOOTLOADER_WITH_SD_NAME).bin
$(NO_ECHO)$(OBJCOPY) -j .text -j .data -j .bss -O binary $(OUTPUT_BINARY_DIRECTORY)/$(OUTPUT_FILENAME).out $(FINAL_BIN_DIR)/$(BOOTLOADER_WITH_S132_NAME).bin $(NO_ECHO)$(OBJCOPY) -j .text -j .data -j .bss -O binary $(OUTPUT_BINARY_DIRECTORY)/$(OUTPUT_FILENAME).out $(FINAL_BIN_DIR)/$(BOOTLOADER_WITH_SD_NAME).bin
## Create pkg file for bootloader only and bootloader+SD combo to use with DFU ## Create pkg file for bootloader only and bootloader+SD combo to use with DFU
genpkg: genpkg:
@echo Preparing: $(BOOTLOADER_WITH_S132_NAME).zip @echo Preparing: $(BOOTLOADER_WITH_SD_NAME).zip
@$(NRFUTIL) dfu genpkg --dev-type 0x0052 --dev-revision 0xADAF --bootloader $(OUTPUT_BINARY_DIRECTORY)/$(OUTPUT_FILENAME).hex --softdevice $(SD_HEX) $(FINAL_BIN_DIR)/$(BOOTLOADER_WITH_S132_NAME).zip @$(NRFUTIL) dfu genpkg --dev-type 0x0052 --dev-revision 0xADAF --bootloader $(OUTPUT_BINARY_DIRECTORY)/$(OUTPUT_FILENAME).hex --softdevice $(SD_HEX) $(FINAL_BIN_DIR)/$(BOOTLOADER_WITH_SD_NAME).zip
echosize: echosize:
-@echo '' -@echo ''
@ -355,12 +357,12 @@ echosize:
clean: clean:
@$(RM) $(BUILD_DIRECTORIES) @$(RM) $(BUILD_DIRECTORIES)
flash_feather52: BOOTLOADER_WITH_S132_NAME := feather52_bootloader_$(BOOTLOADER_S132_SUFFIX) flash_feather52840: BOOTLOADER_WITH_SD_NAME := feather52840_bootloader_$(BOOTLOADER_SD_SUFFIX)
flash_feather52: feather52 flash_feather52840: feather52840
@echo Flashing: $(OUTPUT_BINARY_DIRECTORY)/$(BOOTLOADER_WITH_S132_NAME).hex @echo Flashing: $(OUTPUT_BINARY_DIRECTORY)/$(BOOTLOADER_WITH_SD_NAME).hex
nrfjprog --program $(OUTPUT_BINARY_DIRECTORY)/$(BOOTLOADER_WITH_S132_NAME).hex -f nrf52 --chiperase --reset nrfjprog --program $(OUTPUT_BINARY_DIRECTORY)/$(BOOTLOADER_WITH_SD_NAME).hex -f nrf52 --chiperase --reset
flash_metro52: BOOTLOADER_WITH_S132_NAME := metro52_bootloader_$(BOOTLOADER_S132_SUFFIX) flash_metro52: BOOTLOADER_WITH_SD_NAME := metro52_bootloader_$(BOOTLOADER_SD_SUFFIX)
flash_metro52: metro52 flash_metro52: metro52
@echo Flashing: $(OUTPUT_BINARY_DIRECTORY)/$(BOOTLOADER_WITH_S132_NAME).hex @echo Flashing: $(OUTPUT_BINARY_DIRECTORY)/$(BOOTLOADER_WITH_SD_NAME).hex
nrfjprog --program $(OUTPUT_BINARY_DIRECTORY)/$(BOOTLOADER_WITH_S132_NAME).hex -f nrf52 --chiperase --reset nrfjprog --program $(OUTPUT_BINARY_DIRECTORY)/$(BOOTLOADER_WITH_SD_NAME).hex -f nrf52 --chiperase --reset