able to build

nRF5_SDK_11.0.0_89a8197/components/ble/common/ble_advdata.c

@@ -716,6 +716,8 @@ static uint32_t srdata_check(const ble_advdata_t * p_srdata)
 
 uint32_t ble_advdata_set(const ble_advdata_t * p_advdata, const ble_advdata_t * p_srdata)
 {
+    enum { BLE_GAP_ADV_MAX_SIZE = BLE_GAP_ADV_SR_MAX_LEN_DEFAULT };
+
     uint32_t  err_code;
     uint16_t  len_advdata = BLE_GAP_ADV_MAX_SIZE;
     uint16_t  len_srdata  = BLE_GAP_ADV_MAX_SIZE;
@@ -756,6 +758,9 @@ uint32_t ble_advdata_set(const ble_advdata_t * p_advdata, const ble_advdata_t *
         len_srdata = 0;
     }
 
+    ble_data_t adv_data = { .p_data = p_encoded_advdata, .len = len_advdata };
+    ble_data_t sr_data  = { .p_data = p_encoded_srdata, .len = len_srdata };
+
     // Pass encoded advertising data and/or scan response data to the stack.
-    return sd_ble_gap_adv_data_set(p_encoded_advdata, len_advdata, p_encoded_srdata, len_srdata);
+    return sd_ble_gap_adv_data_set(BLE_GAP_ADV_SET_HANDLE_DEFAULT, &adv_data, &sr_data);
 }

nRF5_SDK_11.0.0_89a8197/components/device/nrf51_to_nrf52840.h

@@ -0,0 +1,578 @@
+/*
+
+Copyright (c) 2010 - 2017, Nordic Semiconductor ASA
+
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+1. Redistributions of source code must retain the above copyright notice, this
+   list of conditions and the following disclaimer.
+
+2. Redistributions in binary form, except as embedded into a Nordic
+   Semiconductor ASA integrated circuit in a product or a software update for
+   such product, must reproduce the above copyright notice, this list of
+   conditions and the following disclaimer in the documentation and/or other
+   materials provided with the distribution.
+
+3. Neither the name of Nordic Semiconductor ASA nor the names of its
+   contributors may be used to endorse or promote products derived from this
+   software without specific prior written permission.
+
+4. This software, with or without modification, must only be used with a
+   Nordic Semiconductor ASA integrated circuit.
+
+5. Any software provided in binary form under this license must not be reverse
+   engineered, decompiled, modified and/or disassembled.
+
+THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*/
+
+#ifndef NRF51_TO_NRF52840_H
+#define NRF51_TO_NRF52840_H
+
+/*lint ++flb "Enter library region */
+
+/* This file is given to prevent your SW from not compiling with the name changes between nRF51 and nRF52840 devices.
+ * It redefines the old nRF51 names into the new ones as long as the functionality is still supported. If the
+ * functionality is gone, there old names are not defined, so compilation will fail. Note that also includes macros
+ * from the nrf51_deprecated.h file. */
+
+
+/* IRQ */
+/* Several peripherals have been added to several indexes. Names of IRQ handlers and IRQ numbers have changed. */
+#define UART0_IRQHandler        UARTE0_UART0_IRQHandler
+#define SPI0_TWI0_IRQHandler    SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler
+#define SPI1_TWI1_IRQHandler    SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler
+#define ADC_IRQHandler          SAADC_IRQHandler
+#define LPCOMP_IRQHandler       COMP_LPCOMP_IRQHandler
+#define SWI0_IRQHandler         SWI0_EGU0_IRQHandler
+#define SWI1_IRQHandler         SWI1_EGU1_IRQHandler
+#define SWI2_IRQHandler         SWI2_EGU2_IRQHandler
+#define SWI3_IRQHandler         SWI3_EGU3_IRQHandler
+#define SWI4_IRQHandler         SWI4_EGU4_IRQHandler
+#define SWI5_IRQHandler         SWI5_EGU5_IRQHandler
+
+#define UART0_IRQn              UARTE0_UART0_IRQn
+#define SPI0_TWI0_IRQn          SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQn
+#define SPI1_TWI1_IRQn          SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQn
+#define ADC_IRQn                SAADC_IRQn
+#define LPCOMP_IRQn             COMP_LPCOMP_IRQn
+#define SWI0_IRQn               SWI0_EGU0_IRQn
+#define SWI1_IRQn               SWI1_EGU1_IRQn
+#define SWI2_IRQn               SWI2_EGU2_IRQn
+#define SWI3_IRQn               SWI3_EGU3_IRQn
+#define SWI4_IRQn               SWI4_EGU4_IRQn
+#define SWI5_IRQn               SWI5_EGU5_IRQn
+
+
+/* UICR */
+/* Register RBPCONF was renamed to APPROTECT. */
+#define RBPCONF     APPROTECT
+
+#define UICR_RBPCONF_PALL_Pos           UICR_APPROTECT_PALL_Pos
+#define UICR_RBPCONF_PALL_Msk           UICR_APPROTECT_PALL_Msk
+#define UICR_RBPCONF_PALL_Enabled       UICR_APPROTECT_PALL_Enabled
+#define UICR_RBPCONF_PALL_Disabled      UICR_APPROTECT_PALL_Disabled
+
+
+/* GPIO */
+/* GPIO port was renamed to P0. */
+#define NRF_GPIO        NRF_P0
+#define NRF_GPIO_BASE   NRF_P0_BASE
+
+
+/* QDEC */
+/* The registers PSELA, PSELB and PSELLED were restructured into a struct. */
+#define PSELLED     PSEL.LED
+#define PSELA       PSEL.A
+#define PSELB       PSEL.B
+
+
+/* SPIS */
+/* The registers PSELSCK, PSELMISO, PSELMOSI, PSELCSN were restructured into a struct. */
+#define PSELSCK       PSEL.SCK
+#define PSELMISO      PSEL.MISO
+#define PSELMOSI      PSEL.MOSI
+#define PSELCSN       PSEL.CSN
+
+/* The registers RXDPTR, MAXRX, AMOUNTRX were restructured into a struct */
+#define RXDPTR        RXD.PTR
+#define MAXRX         RXD.MAXCNT
+#define AMOUNTRX      RXD.AMOUNT
+
+#define SPIS_MAXRX_MAXRX_Pos        SPIS_RXD_MAXCNT_MAXCNT_Pos
+#define SPIS_MAXRX_MAXRX_Msk        SPIS_RXD_MAXCNT_MAXCNT_Msk
+
+#define SPIS_AMOUNTRX_AMOUNTRX_Pos  SPIS_RXD_AMOUNT_AMOUNT_Pos
+#define SPIS_AMOUNTRX_AMOUNTRX_Msk  SPIS_RXD_AMOUNT_AMOUNT_Msk
+
+/* The registers TXDPTR, MAXTX, AMOUNTTX were restructured into a struct */
+#define TXDPTR        TXD.PTR
+#define MAXTX         TXD.MAXCNT
+#define AMOUNTTX      TXD.AMOUNT
+
+#define SPIS_MAXTX_MAXTX_Pos        SPIS_TXD_MAXCNT_MAXCNT_Pos
+#define SPIS_MAXTX_MAXTX_Msk        SPIS_TXD_MAXCNT_MAXCNT_Msk
+
+#define SPIS_AMOUNTTX_AMOUNTTX_Pos  SPIS_TXD_AMOUNT_AMOUNT_Pos
+#define SPIS_AMOUNTTX_AMOUNTTX_Msk  SPIS_TXD_AMOUNT_AMOUNT_Msk
+
+
+/* UART */
+/* The registers PSELRTS, PSELTXD, PSELCTS, PSELRXD were restructured into a struct. */
+#define PSELRTS       PSEL.RTS
+#define PSELTXD       PSEL.TXD
+#define PSELCTS       PSEL.CTS
+#define PSELRXD       PSEL.RXD
+
+/* TWI */
+/* The registers PSELSCL, PSELSDA were restructured into a struct. */
+#define PSELSCL       PSEL.SCL
+#define PSELSDA       PSEL.SDA
+
+
+
+/* From nrf51_deprecated.h */
+
+/* NVMC */
+/* The register ERASEPROTECTEDPAGE changed name to ERASEPCR0 in the documentation. */
+#define ERASEPROTECTEDPAGE      ERASEPCR0
+
+
+/* IRQ */
+/* COMP module was eliminated. Adapted to nrf52840 headers. */
+#define LPCOMP_COMP_IRQHandler  COMP_LPCOMP_IRQHandler
+#define LPCOMP_COMP_IRQn        COMP_LPCOMP_IRQn
+
+
+/* REFSEL register redefined enumerated values and added some more. */
+#define LPCOMP_REFSEL_REFSEL_SupplyOneEighthPrescaling          LPCOMP_REFSEL_REFSEL_Ref1_8Vdd
+#define LPCOMP_REFSEL_REFSEL_SupplyTwoEighthsPrescaling         LPCOMP_REFSEL_REFSEL_Ref2_8Vdd
+#define LPCOMP_REFSEL_REFSEL_SupplyThreeEighthsPrescaling       LPCOMP_REFSEL_REFSEL_Ref3_8Vdd
+#define LPCOMP_REFSEL_REFSEL_SupplyFourEighthsPrescaling        LPCOMP_REFSEL_REFSEL_Ref4_8Vdd
+#define LPCOMP_REFSEL_REFSEL_SupplyFiveEighthsPrescaling        LPCOMP_REFSEL_REFSEL_Ref5_8Vdd
+#define LPCOMP_REFSEL_REFSEL_SupplySixEighthsPrescaling         LPCOMP_REFSEL_REFSEL_Ref6_8Vdd
+#define LPCOMP_REFSEL_REFSEL_SupplySevenEighthsPrescaling       LPCOMP_REFSEL_REFSEL_Ref7_8Vdd
+
+
+/* RADIO */
+/* The name of the field SKIPADDR was corrected. Old macros added for compatibility. */
+#define RADIO_CRCCNF_SKIP_ADDR_Pos      RADIO_CRCCNF_SKIPADDR_Pos
+#define RADIO_CRCCNF_SKIP_ADDR_Msk      RADIO_CRCCNF_SKIPADDR_Msk
+#define RADIO_CRCCNF_SKIP_ADDR_Include  RADIO_CRCCNF_SKIPADDR_Include
+#define RADIO_CRCCNF_SKIP_ADDR_Skip     RADIO_CRCCNF_SKIPADDR_Skip
+
+
+/* FICR */
+/* The registers FICR.DEVICEID0 and FICR.DEVICEID1 were renamed into an array. */
+#define DEVICEID0       DEVICEID[0]
+#define DEVICEID1       DEVICEID[1]
+
+/* The registers FICR.ER0, FICR.ER1, FICR.ER2 and FICR.ER3 were renamed into an array. */
+#define ER0             ER[0]
+#define ER1             ER[1]
+#define ER2             ER[2]
+#define ER3             ER[3]
+
+/* The registers FICR.IR0, FICR.IR1, FICR.IR2 and FICR.IR3 were renamed into an array. */
+#define IR0             IR[0]
+#define IR1             IR[1]
+#define IR2             IR[2]
+#define IR3             IR[3]
+
+/* The registers FICR.DEVICEADDR0 and FICR.DEVICEADDR1 were renamed into an array. */
+#define DEVICEADDR0     DEVICEADDR[0]
+#define DEVICEADDR1     DEVICEADDR[1]
+
+
+/* PPI */
+/* The tasks PPI.TASKS_CHGxEN and PPI.TASKS_CHGxDIS were renamed into an array of structs. */
+#define TASKS_CHG0EN     TASKS_CHG[0].EN
+#define TASKS_CHG0DIS    TASKS_CHG[0].DIS
+#define TASKS_CHG1EN     TASKS_CHG[1].EN
+#define TASKS_CHG1DIS    TASKS_CHG[1].DIS
+#define TASKS_CHG2EN     TASKS_CHG[2].EN
+#define TASKS_CHG2DIS    TASKS_CHG[2].DIS
+#define TASKS_CHG3EN     TASKS_CHG[3].EN
+#define TASKS_CHG3DIS    TASKS_CHG[3].DIS
+
+/* The registers PPI.CHx_EEP and PPI.CHx_TEP were renamed into an array of structs. */
+#define CH0_EEP          CH[0].EEP
+#define CH0_TEP          CH[0].TEP
+#define CH1_EEP          CH[1].EEP
+#define CH1_TEP          CH[1].TEP
+#define CH2_EEP          CH[2].EEP
+#define CH2_TEP          CH[2].TEP
+#define CH3_EEP          CH[3].EEP
+#define CH3_TEP          CH[3].TEP
+#define CH4_EEP          CH[4].EEP
+#define CH4_TEP          CH[4].TEP
+#define CH5_EEP          CH[5].EEP
+#define CH5_TEP          CH[5].TEP
+#define CH6_EEP          CH[6].EEP
+#define CH6_TEP          CH[6].TEP
+#define CH7_EEP          CH[7].EEP
+#define CH7_TEP          CH[7].TEP
+#define CH8_EEP          CH[8].EEP
+#define CH8_TEP          CH[8].TEP
+#define CH9_EEP          CH[9].EEP
+#define CH9_TEP          CH[9].TEP
+#define CH10_EEP         CH[10].EEP
+#define CH10_TEP         CH[10].TEP
+#define CH11_EEP         CH[11].EEP
+#define CH11_TEP         CH[11].TEP
+#define CH12_EEP         CH[12].EEP
+#define CH12_TEP         CH[12].TEP
+#define CH13_EEP         CH[13].EEP
+#define CH13_TEP         CH[13].TEP
+#define CH14_EEP         CH[14].EEP
+#define CH14_TEP         CH[14].TEP
+#define CH15_EEP         CH[15].EEP
+#define CH15_TEP         CH[15].TEP
+
+/* The registers PPI.CHG0, PPI.CHG1, PPI.CHG2 and PPI.CHG3 were renamed into an array. */
+#define CHG0             CHG[0]
+#define CHG1             CHG[1]
+#define CHG2             CHG[2]
+#define CHG3             CHG[3]
+
+/* All bitfield macros for the CHGx registers therefore changed name. */
+#define PPI_CHG0_CH15_Pos       PPI_CHG_CH15_Pos
+#define PPI_CHG0_CH15_Msk       PPI_CHG_CH15_Msk
+#define PPI_CHG0_CH15_Excluded  PPI_CHG_CH15_Excluded
+#define PPI_CHG0_CH15_Included  PPI_CHG_CH15_Included
+
+#define PPI_CHG0_CH14_Pos       PPI_CHG_CH14_Pos
+#define PPI_CHG0_CH14_Msk       PPI_CHG_CH14_Msk
+#define PPI_CHG0_CH14_Excluded  PPI_CHG_CH14_Excluded
+#define PPI_CHG0_CH14_Included  PPI_CHG_CH14_Included
+
+#define PPI_CHG0_CH13_Pos       PPI_CHG_CH13_Pos
+#define PPI_CHG0_CH13_Msk       PPI_CHG_CH13_Msk
+#define PPI_CHG0_CH13_Excluded  PPI_CHG_CH13_Excluded
+#define PPI_CHG0_CH13_Included  PPI_CHG_CH13_Included
+
+#define PPI_CHG0_CH12_Pos       PPI_CHG_CH12_Pos
+#define PPI_CHG0_CH12_Msk       PPI_CHG_CH12_Msk
+#define PPI_CHG0_CH12_Excluded  PPI_CHG_CH12_Excluded
+#define PPI_CHG0_CH12_Included  PPI_CHG_CH12_Included
+
+#define PPI_CHG0_CH11_Pos       PPI_CHG_CH11_Pos
+#define PPI_CHG0_CH11_Msk       PPI_CHG_CH11_Msk
+#define PPI_CHG0_CH11_Excluded  PPI_CHG_CH11_Excluded
+#define PPI_CHG0_CH11_Included  PPI_CHG_CH11_Included
+
+#define PPI_CHG0_CH10_Pos       PPI_CHG_CH10_Pos
+#define PPI_CHG0_CH10_Msk       PPI_CHG_CH10_Msk
+#define PPI_CHG0_CH10_Excluded  PPI_CHG_CH10_Excluded
+#define PPI_CHG0_CH10_Included  PPI_CHG_CH10_Included
+
+#define PPI_CHG0_CH9_Pos        PPI_CHG_CH9_Pos
+#define PPI_CHG0_CH9_Msk        PPI_CHG_CH9_Msk
+#define PPI_CHG0_CH9_Excluded   PPI_CHG_CH9_Excluded
+#define PPI_CHG0_CH9_Included   PPI_CHG_CH9_Included
+
+#define PPI_CHG0_CH8_Pos        PPI_CHG_CH8_Pos
+#define PPI_CHG0_CH8_Msk        PPI_CHG_CH8_Msk
+#define PPI_CHG0_CH8_Excluded   PPI_CHG_CH8_Excluded
+#define PPI_CHG0_CH8_Included   PPI_CHG_CH8_Included
+
+#define PPI_CHG0_CH7_Pos        PPI_CHG_CH7_Pos
+#define PPI_CHG0_CH7_Msk        PPI_CHG_CH7_Msk
+#define PPI_CHG0_CH7_Excluded   PPI_CHG_CH7_Excluded
+#define PPI_CHG0_CH7_Included   PPI_CHG_CH7_Included
+
+#define PPI_CHG0_CH6_Pos        PPI_CHG_CH6_Pos
+#define PPI_CHG0_CH6_Msk        PPI_CHG_CH6_Msk
+#define PPI_CHG0_CH6_Excluded   PPI_CHG_CH6_Excluded
+#define PPI_CHG0_CH6_Included   PPI_CHG_CH6_Included
+
+#define PPI_CHG0_CH5_Pos        PPI_CHG_CH5_Pos
+#define PPI_CHG0_CH5_Msk        PPI_CHG_CH5_Msk
+#define PPI_CHG0_CH5_Excluded   PPI_CHG_CH5_Excluded
+#define PPI_CHG0_CH5_Included   PPI_CHG_CH5_Included
+
+#define PPI_CHG0_CH4_Pos        PPI_CHG_CH4_Pos
+#define PPI_CHG0_CH4_Msk        PPI_CHG_CH4_Msk
+#define PPI_CHG0_CH4_Excluded   PPI_CHG_CH4_Excluded
+#define PPI_CHG0_CH4_Included   PPI_CHG_CH4_Included
+
+#define PPI_CHG0_CH3_Pos        PPI_CHG_CH3_Pos
+#define PPI_CHG0_CH3_Msk        PPI_CHG_CH3_Msk
+#define PPI_CHG0_CH3_Excluded   PPI_CHG_CH3_Excluded
+#define PPI_CHG0_CH3_Included   PPI_CHG_CH3_Included
+
+#define PPI_CHG0_CH2_Pos        PPI_CHG_CH2_Pos
+#define PPI_CHG0_CH2_Msk        PPI_CHG_CH2_Msk
+#define PPI_CHG0_CH2_Excluded   PPI_CHG_CH2_Excluded
+#define PPI_CHG0_CH2_Included   PPI_CHG_CH2_Included
+
+#define PPI_CHG0_CH1_Pos        PPI_CHG_CH1_Pos
+#define PPI_CHG0_CH1_Msk        PPI_CHG_CH1_Msk
+#define PPI_CHG0_CH1_Excluded   PPI_CHG_CH1_Excluded
+#define PPI_CHG0_CH1_Included   PPI_CHG_CH1_Included
+
+#define PPI_CHG0_CH0_Pos        PPI_CHG_CH0_Pos
+#define PPI_CHG0_CH0_Msk        PPI_CHG_CH0_Msk
+#define PPI_CHG0_CH0_Excluded   PPI_CHG_CH0_Excluded
+#define PPI_CHG0_CH0_Included   PPI_CHG_CH0_Included
+
+#define PPI_CHG1_CH15_Pos       PPI_CHG_CH15_Pos
+#define PPI_CHG1_CH15_Msk       PPI_CHG_CH15_Msk
+#define PPI_CHG1_CH15_Excluded  PPI_CHG_CH15_Excluded
+#define PPI_CHG1_CH15_Included  PPI_CHG_CH15_Included
+
+#define PPI_CHG1_CH14_Pos       PPI_CHG_CH14_Pos
+#define PPI_CHG1_CH14_Msk       PPI_CHG_CH14_Msk
+#define PPI_CHG1_CH14_Excluded  PPI_CHG_CH14_Excluded
+#define PPI_CHG1_CH14_Included  PPI_CHG_CH14_Included
+
+#define PPI_CHG1_CH13_Pos       PPI_CHG_CH13_Pos
+#define PPI_CHG1_CH13_Msk       PPI_CHG_CH13_Msk
+#define PPI_CHG1_CH13_Excluded  PPI_CHG_CH13_Excluded
+#define PPI_CHG1_CH13_Included  PPI_CHG_CH13_Included
+
+#define PPI_CHG1_CH12_Pos       PPI_CHG_CH12_Pos
+#define PPI_CHG1_CH12_Msk       PPI_CHG_CH12_Msk
+#define PPI_CHG1_CH12_Excluded  PPI_CHG_CH12_Excluded
+#define PPI_CHG1_CH12_Included  PPI_CHG_CH12_Included
+
+#define PPI_CHG1_CH11_Pos       PPI_CHG_CH11_Pos
+#define PPI_CHG1_CH11_Msk       PPI_CHG_CH11_Msk
+#define PPI_CHG1_CH11_Excluded  PPI_CHG_CH11_Excluded
+#define PPI_CHG1_CH11_Included  PPI_CHG_CH11_Included
+
+#define PPI_CHG1_CH10_Pos       PPI_CHG_CH10_Pos
+#define PPI_CHG1_CH10_Msk       PPI_CHG_CH10_Msk
+#define PPI_CHG1_CH10_Excluded  PPI_CHG_CH10_Excluded
+#define PPI_CHG1_CH10_Included  PPI_CHG_CH10_Included
+
+#define PPI_CHG1_CH9_Pos        PPI_CHG_CH9_Pos
+#define PPI_CHG1_CH9_Msk        PPI_CHG_CH9_Msk
+#define PPI_CHG1_CH9_Excluded   PPI_CHG_CH9_Excluded
+#define PPI_CHG1_CH9_Included   PPI_CHG_CH9_Included
+
+#define PPI_CHG1_CH8_Pos        PPI_CHG_CH8_Pos
+#define PPI_CHG1_CH8_Msk        PPI_CHG_CH8_Msk
+#define PPI_CHG1_CH8_Excluded   PPI_CHG_CH8_Excluded
+#define PPI_CHG1_CH8_Included   PPI_CHG_CH8_Included
+
+#define PPI_CHG1_CH7_Pos        PPI_CHG_CH7_Pos
+#define PPI_CHG1_CH7_Msk        PPI_CHG_CH7_Msk
+#define PPI_CHG1_CH7_Excluded   PPI_CHG_CH7_Excluded
+#define PPI_CHG1_CH7_Included   PPI_CHG_CH7_Included
+
+#define PPI_CHG1_CH6_Pos        PPI_CHG_CH6_Pos
+#define PPI_CHG1_CH6_Msk        PPI_CHG_CH6_Msk
+#define PPI_CHG1_CH6_Excluded   PPI_CHG_CH6_Excluded
+#define PPI_CHG1_CH6_Included   PPI_CHG_CH6_Included
+
+#define PPI_CHG1_CH5_Pos        PPI_CHG_CH5_Pos
+#define PPI_CHG1_CH5_Msk        PPI_CHG_CH5_Msk
+#define PPI_CHG1_CH5_Excluded   PPI_CHG_CH5_Excluded
+#define PPI_CHG1_CH5_Included   PPI_CHG_CH5_Included
+
+#define PPI_CHG1_CH4_Pos        PPI_CHG_CH4_Pos
+#define PPI_CHG1_CH4_Msk        PPI_CHG_CH4_Msk
+#define PPI_CHG1_CH4_Excluded   PPI_CHG_CH4_Excluded
+#define PPI_CHG1_CH4_Included   PPI_CHG_CH4_Included
+
+#define PPI_CHG1_CH3_Pos        PPI_CHG_CH3_Pos
+#define PPI_CHG1_CH3_Msk        PPI_CHG_CH3_Msk
+#define PPI_CHG1_CH3_Excluded   PPI_CHG_CH3_Excluded
+#define PPI_CHG1_CH3_Included   PPI_CHG_CH3_Included
+
+#define PPI_CHG1_CH2_Pos        PPI_CHG_CH2_Pos
+#define PPI_CHG1_CH2_Msk        PPI_CHG_CH2_Msk
+#define PPI_CHG1_CH2_Excluded   PPI_CHG_CH2_Excluded
+#define PPI_CHG1_CH2_Included   PPI_CHG_CH2_Included
+
+#define PPI_CHG1_CH1_Pos        PPI_CHG_CH1_Pos
+#define PPI_CHG1_CH1_Msk        PPI_CHG_CH1_Msk
+#define PPI_CHG1_CH1_Excluded   PPI_CHG_CH1_Excluded
+#define PPI_CHG1_CH1_Included   PPI_CHG_CH1_Included
+
+#define PPI_CHG1_CH0_Pos        PPI_CHG_CH0_Pos
+#define PPI_CHG1_CH0_Msk        PPI_CHG_CH0_Msk
+#define PPI_CHG1_CH0_Excluded   PPI_CHG_CH0_Excluded
+#define PPI_CHG1_CH0_Included   PPI_CHG_CH0_Included
+
+#define PPI_CHG2_CH15_Pos       PPI_CHG_CH15_Pos
+#define PPI_CHG2_CH15_Msk       PPI_CHG_CH15_Msk
+#define PPI_CHG2_CH15_Excluded  PPI_CHG_CH15_Excluded
+#define PPI_CHG2_CH15_Included  PPI_CHG_CH15_Included
+
+#define PPI_CHG2_CH14_Pos       PPI_CHG_CH14_Pos
+#define PPI_CHG2_CH14_Msk       PPI_CHG_CH14_Msk
+#define PPI_CHG2_CH14_Excluded  PPI_CHG_CH14_Excluded
+#define PPI_CHG2_CH14_Included  PPI_CHG_CH14_Included
+
+#define PPI_CHG2_CH13_Pos       PPI_CHG_CH13_Pos
+#define PPI_CHG2_CH13_Msk       PPI_CHG_CH13_Msk
+#define PPI_CHG2_CH13_Excluded  PPI_CHG_CH13_Excluded
+#define PPI_CHG2_CH13_Included  PPI_CHG_CH13_Included
+
+#define PPI_CHG2_CH12_Pos       PPI_CHG_CH12_Pos
+#define PPI_CHG2_CH12_Msk       PPI_CHG_CH12_Msk
+#define PPI_CHG2_CH12_Excluded  PPI_CHG_CH12_Excluded
+#define PPI_CHG2_CH12_Included  PPI_CHG_CH12_Included
+
+#define PPI_CHG2_CH11_Pos       PPI_CHG_CH11_Pos
+#define PPI_CHG2_CH11_Msk       PPI_CHG_CH11_Msk
+#define PPI_CHG2_CH11_Excluded  PPI_CHG_CH11_Excluded
+#define PPI_CHG2_CH11_Included  PPI_CHG_CH11_Included
+
+#define PPI_CHG2_CH10_Pos       PPI_CHG_CH10_Pos
+#define PPI_CHG2_CH10_Msk       PPI_CHG_CH10_Msk
+#define PPI_CHG2_CH10_Excluded  PPI_CHG_CH10_Excluded
+#define PPI_CHG2_CH10_Included  PPI_CHG_CH10_Included
+
+#define PPI_CHG2_CH9_Pos        PPI_CHG_CH9_Pos
+#define PPI_CHG2_CH9_Msk        PPI_CHG_CH9_Msk
+#define PPI_CHG2_CH9_Excluded   PPI_CHG_CH9_Excluded
+#define PPI_CHG2_CH9_Included   PPI_CHG_CH9_Included
+
+#define PPI_CHG2_CH8_Pos        PPI_CHG_CH8_Pos
+#define PPI_CHG2_CH8_Msk        PPI_CHG_CH8_Msk
+#define PPI_CHG2_CH8_Excluded   PPI_CHG_CH8_Excluded
+#define PPI_CHG2_CH8_Included   PPI_CHG_CH8_Included
+
+#define PPI_CHG2_CH7_Pos        PPI_CHG_CH7_Pos
+#define PPI_CHG2_CH7_Msk        PPI_CHG_CH7_Msk
+#define PPI_CHG2_CH7_Excluded   PPI_CHG_CH7_Excluded
+#define PPI_CHG2_CH7_Included   PPI_CHG_CH7_Included
+
+#define PPI_CHG2_CH6_Pos        PPI_CHG_CH6_Pos
+#define PPI_CHG2_CH6_Msk        PPI_CHG_CH6_Msk
+#define PPI_CHG2_CH6_Excluded   PPI_CHG_CH6_Excluded
+#define PPI_CHG2_CH6_Included   PPI_CHG_CH6_Included
+
+#define PPI_CHG2_CH5_Pos        PPI_CHG_CH5_Pos
+#define PPI_CHG2_CH5_Msk        PPI_CHG_CH5_Msk
+#define PPI_CHG2_CH5_Excluded   PPI_CHG_CH5_Excluded
+#define PPI_CHG2_CH5_Included   PPI_CHG_CH5_Included
+
+#define PPI_CHG2_CH4_Pos        PPI_CHG_CH4_Pos
+#define PPI_CHG2_CH4_Msk        PPI_CHG_CH4_Msk
+#define PPI_CHG2_CH4_Excluded   PPI_CHG_CH4_Excluded
+#define PPI_CHG2_CH4_Included   PPI_CHG_CH4_Included
+
+#define PPI_CHG2_CH3_Pos        PPI_CHG_CH3_Pos
+#define PPI_CHG2_CH3_Msk        PPI_CHG_CH3_Msk
+#define PPI_CHG2_CH3_Excluded   PPI_CHG_CH3_Excluded
+#define PPI_CHG2_CH3_Included   PPI_CHG_CH3_Included
+
+#define PPI_CHG2_CH2_Pos        PPI_CHG_CH2_Pos
+#define PPI_CHG2_CH2_Msk        PPI_CHG_CH2_Msk
+#define PPI_CHG2_CH2_Excluded   PPI_CHG_CH2_Excluded
+#define PPI_CHG2_CH2_Included   PPI_CHG_CH2_Included
+
+#define PPI_CHG2_CH1_Pos        PPI_CHG_CH1_Pos
+#define PPI_CHG2_CH1_Msk        PPI_CHG_CH1_Msk
+#define PPI_CHG2_CH1_Excluded   PPI_CHG_CH1_Excluded
+#define PPI_CHG2_CH1_Included   PPI_CHG_CH1_Included
+
+#define PPI_CHG2_CH0_Pos        PPI_CHG_CH0_Pos
+#define PPI_CHG2_CH0_Msk        PPI_CHG_CH0_Msk
+#define PPI_CHG2_CH0_Excluded   PPI_CHG_CH0_Excluded
+#define PPI_CHG2_CH0_Included   PPI_CHG_CH0_Included
+
+#define PPI_CHG3_CH15_Pos       PPI_CHG_CH15_Pos
+#define PPI_CHG3_CH15_Msk       PPI_CHG_CH15_Msk
+#define PPI_CHG3_CH15_Excluded  PPI_CHG_CH15_Excluded
+#define PPI_CHG3_CH15_Included  PPI_CHG_CH15_Included
+
+#define PPI_CHG3_CH14_Pos       PPI_CHG_CH14_Pos
+#define PPI_CHG3_CH14_Msk       PPI_CHG_CH14_Msk
+#define PPI_CHG3_CH14_Excluded  PPI_CHG_CH14_Excluded
+#define PPI_CHG3_CH14_Included  PPI_CHG_CH14_Included
+
+#define PPI_CHG3_CH13_Pos       PPI_CHG_CH13_Pos
+#define PPI_CHG3_CH13_Msk       PPI_CHG_CH13_Msk
+#define PPI_CHG3_CH13_Excluded  PPI_CHG_CH13_Excluded
+#define PPI_CHG3_CH13_Included  PPI_CHG_CH13_Included
+
+#define PPI_CHG3_CH12_Pos       PPI_CHG_CH12_Pos
+#define PPI_CHG3_CH12_Msk       PPI_CHG_CH12_Msk
+#define PPI_CHG3_CH12_Excluded  PPI_CHG_CH12_Excluded
+#define PPI_CHG3_CH12_Included  PPI_CHG_CH12_Included
+
+#define PPI_CHG3_CH11_Pos       PPI_CHG_CH11_Pos
+#define PPI_CHG3_CH11_Msk       PPI_CHG_CH11_Msk
+#define PPI_CHG3_CH11_Excluded  PPI_CHG_CH11_Excluded
+#define PPI_CHG3_CH11_Included  PPI_CHG_CH11_Included
+
+#define PPI_CHG3_CH10_Pos       PPI_CHG_CH10_Pos
+#define PPI_CHG3_CH10_Msk       PPI_CHG_CH10_Msk
+#define PPI_CHG3_CH10_Excluded  PPI_CHG_CH10_Excluded
+#define PPI_CHG3_CH10_Included  PPI_CHG_CH10_Included
+
+#define PPI_CHG3_CH9_Pos        PPI_CHG_CH9_Pos
+#define PPI_CHG3_CH9_Msk        PPI_CHG_CH9_Msk
+#define PPI_CHG3_CH9_Excluded   PPI_CHG_CH9_Excluded
+#define PPI_CHG3_CH9_Included   PPI_CHG_CH9_Included
+
+#define PPI_CHG3_CH8_Pos        PPI_CHG_CH8_Pos
+#define PPI_CHG3_CH8_Msk        PPI_CHG_CH8_Msk
+#define PPI_CHG3_CH8_Excluded   PPI_CHG_CH8_Excluded
+#define PPI_CHG3_CH8_Included   PPI_CHG_CH8_Included
+
+#define PPI_CHG3_CH7_Pos        PPI_CHG_CH7_Pos
+#define PPI_CHG3_CH7_Msk        PPI_CHG_CH7_Msk
+#define PPI_CHG3_CH7_Excluded   PPI_CHG_CH7_Excluded
+#define PPI_CHG3_CH7_Included   PPI_CHG_CH7_Included
+
+#define PPI_CHG3_CH6_Pos        PPI_CHG_CH6_Pos
+#define PPI_CHG3_CH6_Msk        PPI_CHG_CH6_Msk
+#define PPI_CHG3_CH6_Excluded   PPI_CHG_CH6_Excluded
+#define PPI_CHG3_CH6_Included   PPI_CHG_CH6_Included
+
+#define PPI_CHG3_CH5_Pos        PPI_CHG_CH5_Pos
+#define PPI_CHG3_CH5_Msk        PPI_CHG_CH5_Msk
+#define PPI_CHG3_CH5_Excluded   PPI_CHG_CH5_Excluded
+#define PPI_CHG3_CH5_Included   PPI_CHG_CH5_Included
+
+#define PPI_CHG3_CH4_Pos        PPI_CHG_CH4_Pos
+#define PPI_CHG3_CH4_Msk        PPI_CHG_CH4_Msk
+#define PPI_CHG3_CH4_Excluded   PPI_CHG_CH4_Excluded
+#define PPI_CHG3_CH4_Included   PPI_CHG_CH4_Included
+
+#define PPI_CHG3_CH3_Pos        PPI_CHG_CH3_Pos
+#define PPI_CHG3_CH3_Msk        PPI_CHG_CH3_Msk
+#define PPI_CHG3_CH3_Excluded   PPI_CHG_CH3_Excluded
+#define PPI_CHG3_CH3_Included   PPI_CHG_CH3_Included
+
+#define PPI_CHG3_CH2_Pos        PPI_CHG_CH2_Pos
+#define PPI_CHG3_CH2_Msk        PPI_CHG_CH2_Msk
+#define PPI_CHG3_CH2_Excluded   PPI_CHG_CH2_Excluded
+#define PPI_CHG3_CH2_Included   PPI_CHG_CH2_Included
+
+#define PPI_CHG3_CH1_Pos        PPI_CHG_CH1_Pos
+#define PPI_CHG3_CH1_Msk        PPI_CHG_CH1_Msk
+#define PPI_CHG3_CH1_Excluded   PPI_CHG_CH1_Excluded
+#define PPI_CHG3_CH1_Included   PPI_CHG_CH1_Included
+
+#define PPI_CHG3_CH0_Pos        PPI_CHG_CH0_Pos
+#define PPI_CHG3_CH0_Msk        PPI_CHG_CH0_Msk
+#define PPI_CHG3_CH0_Excluded   PPI_CHG_CH0_Excluded
+#define PPI_CHG3_CH0_Included   PPI_CHG_CH0_Included
+
+
+
+
+/*lint --flb "Leave library region" */
+
+#endif /* NRF51_TO_NRF52840_H */
+

nRF5_SDK_11.0.0_89a8197/components/device/nrf52832_peripherals.h

@@ -0,0 +1,275 @@
+/*
+
+Copyright (c) 2010 - 2017, Nordic Semiconductor ASA
+
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+1. Redistributions of source code must retain the above copyright notice, this
+   list of conditions and the following disclaimer.
+
+2. Redistributions in binary form, except as embedded into a Nordic
+   Semiconductor ASA integrated circuit in a product or a software update for
+   such product, must reproduce the above copyright notice, this list of
+   conditions and the following disclaimer in the documentation and/or other
+   materials provided with the distribution.
+
+3. Neither the name of Nordic Semiconductor ASA nor the names of its
+   contributors may be used to endorse or promote products derived from this
+   software without specific prior written permission.
+
+4. This software, with or without modification, must only be used with a
+   Nordic Semiconductor ASA integrated circuit.
+
+5. Any software provided in binary form under this license must not be reverse
+   engineered, decompiled, modified and/or disassembled.
+
+THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*/
+
+#ifndef _NRF52832_PERIPHERALS_H
+#define _NRF52832_PERIPHERALS_H
+
+
+/* Power Peripheral */
+#define POWER_PRESENT
+#define POWER_COUNT 1
+
+#define POWER_FEATURE_RAM_REGISTERS_PRESENT
+#define POWER_FEATURE_RAM_REGISTERS_COUNT       8
+
+/* Floating Point Unit */
+#define FPU_PRESENT
+#define FPU_COUNT 1
+
+/* Systick timer */
+#define SYSTICK_PRESENT
+#define SYSTICK_COUNT 1
+
+/* Software Interrupts */
+#define SWI_PRESENT
+#define SWI_COUNT 6
+
+/* Memory Watch Unit */
+#define MWU_PRESENT
+#define MWU_COUNT 1
+
+/* GPIO */
+#define GPIO_PRESENT
+#define GPIO_COUNT 1
+
+#define P0_PIN_NUM 32
+
+/* MPU and BPROT */
+#define BPROT_PRESENT
+
+#define BPROT_REGIONS_SIZE 4096
+#define BPROT_REGIONS_NUM 128
+
+/* Radio */
+#define RADIO_PRESENT
+#define RADIO_COUNT 1
+
+#define RADIO_EASYDMA_MAXCNT_SIZE 8
+
+/* Accelerated Address Resolver */
+#define AAR_PRESENT
+#define AAR_COUNT 1
+
+#define AAR_MAX_IRK_NUM 16
+
+/* AES Electronic CodeBook mode encryption */
+#define ECB_PRESENT
+#define ECB_COUNT 1
+
+/* AES CCM mode encryption */
+#define CCM_PRESENT
+#define CCM_COUNT 1
+
+/* NFC Tag */
+#define NFCT_PRESENT
+#define NFCT_COUNT 1
+
+#define NFCT_EASYDMA_MAXCNT_SIZE 9
+
+/* Peripheral to Peripheral Interconnect */
+#define PPI_PRESENT
+#define PPI_COUNT 1
+
+#define PPI_CH_NUM 20
+#define PPI_FIXED_CH_NUM 12
+#define PPI_GROUP_NUM 6
+#define PPI_FEATURE_FORKS_PRESENT
+
+/* Event Generator Unit */
+#define EGU_PRESENT
+#define EGU_COUNT 6
+
+#define EGU0_CH_NUM 16
+#define EGU1_CH_NUM 16
+#define EGU2_CH_NUM 16
+#define EGU3_CH_NUM 16
+#define EGU4_CH_NUM 16
+#define EGU5_CH_NUM 16
+
+/* Timer/Counter */
+#define TIMER_PRESENT
+#define TIMER_COUNT 5
+
+#define TIMER0_MAX_SIZE 32
+#define TIMER1_MAX_SIZE 32
+#define TIMER2_MAX_SIZE 32
+#define TIMER3_MAX_SIZE 32
+#define TIMER4_MAX_SIZE 32
+
+#define TIMER0_CC_NUM 4
+#define TIMER1_CC_NUM 4
+#define TIMER2_CC_NUM 4
+#define TIMER3_CC_NUM 6
+#define TIMER4_CC_NUM 6
+
+/* Real Time Counter */
+#define RTC_PRESENT
+#define RTC_COUNT 3
+
+#define RTC0_CC_NUM 3
+#define RTC1_CC_NUM 4
+#define RTC2_CC_NUM 4
+
+/* RNG */
+#define RNG_PRESENT
+#define RNG_COUNT 1
+
+/* Watchdog Timer */
+#define WDT_PRESENT
+#define WDT_COUNT 1
+
+/* Temperature Sensor */
+#define TEMP_PRESENT
+#define TEMP_COUNT 1
+
+/* Serial Peripheral Interface Master */
+#define SPI_PRESENT
+#define SPI_COUNT 3
+
+/* Serial Peripheral Interface Master with DMA */
+#define SPIM_PRESENT
+#define SPIM_COUNT 3
+
+#define SPIM0_MAX_DATARATE  8
+#define SPIM1_MAX_DATARATE  8
+#define SPIM2_MAX_DATARATE  8
+
+#define SPIM0_FEATURE_HARDWARE_CSN_PRESENT  0
+#define SPIM1_FEATURE_HARDWARE_CSN_PRESENT  0
+#define SPIM2_FEATURE_HARDWARE_CSN_PRESENT  0
+
+#define SPIM0_EASYDMA_MAXCNT_SIZE 8
+#define SPIM1_EASYDMA_MAXCNT_SIZE 8
+#define SPIM2_EASYDMA_MAXCNT_SIZE 8
+
+/* Serial Peripheral Interface Slave with DMA*/
+#define SPIS_PRESENT
+#define SPIS_COUNT 3
+
+#define SPIS0_EASYDMA_MAXCNT_SIZE 8
+#define SPIS1_EASYDMA_MAXCNT_SIZE 8
+#define SPIS2_EASYDMA_MAXCNT_SIZE 8
+
+/* Two Wire Interface Master */
+#define TWI_PRESENT
+#define TWI_COUNT 2
+
+/* Two Wire Interface Master with DMA */
+#define TWIM_PRESENT
+#define TWIM_COUNT 2
+
+#define TWIM0_EASYDMA_MAXCNT_SIZE 8
+#define TWIM1_EASYDMA_MAXCNT_SIZE 8
+
+/* Two Wire Interface Slave with DMA */
+#define TWIS_PRESENT
+#define TWIS_COUNT 2
+
+#define TWIS0_EASYDMA_MAXCNT_SIZE 8
+#define TWIS1_EASYDMA_MAXCNT_SIZE 8
+
+/* Universal Asynchronous Receiver-Transmitter */
+#define UART_PRESENT
+#define UART_COUNT 1
+
+/* Universal Asynchronous Receiver-Transmitter with DMA */
+#define UARTE_PRESENT
+#define UARTE_COUNT 1
+
+#define UARTE0_EASYDMA_MAXCNT_SIZE 8
+
+/* Quadrature Decoder */
+#define QDEC_PRESENT
+#define QDEC_COUNT 1
+
+/* Successive Approximation Analog to Digital Converter */
+#define SAADC_PRESENT
+#define SAADC_COUNT 1
+
+#define SAADC_EASYDMA_MAXCNT_SIZE 15
+
+/* GPIO Tasks and Events */
+#define GPIOTE_PRESENT
+#define GPIOTE_COUNT 1
+
+#define GPIOTE_CH_NUM 8
+
+#define GPIOTE_FEATURE_SET_PRESENT
+#define GPIOTE_FEATURE_CLR_PRESENT
+
+/* Low Power Comparator */
+#define LPCOMP_PRESENT
+#define LPCOMP_COUNT 1
+
+#define LPCOMP_REFSEL_RESOLUTION 16
+
+#define LPCOMP_FEATURE_HYST_PRESENT
+
+/* Comparator */
+#define COMP_PRESENT
+#define COMP_COUNT 1
+
+/* Pulse Width Modulator */
+#define PWM_PRESENT
+#define PWM_COUNT 3
+
+#define PWM0_CH_NUM 4
+#define PWM1_CH_NUM 4
+#define PWM2_CH_NUM 4
+
+#define PWM0_EASYDMA_MAXCNT_SIZE 15
+#define PWM1_EASYDMA_MAXCNT_SIZE 15
+#define PWM2_EASYDMA_MAXCNT_SIZE 15
+
+/* Pulse Density Modulator */
+#define PDM_PRESENT
+#define PDM_COUNT 1
+
+#define PDM_EASYDMA_MAXCNT_SIZE 15
+
+/* Inter-IC Sound Interface */
+#define I2S_PRESENT
+#define I2S_COUNT 1
+
+#define I2S_EASYDMA_MAXCNT_SIZE 14
+
+
+#endif      // _NRF52832_PERIPHERALS_H

nRF5_SDK_11.0.0_89a8197/components/device/nrf52840_peripherals.h

@@ -0,0 +1,298 @@
+/*
+
+Copyright (c) 2010 - 2017, Nordic Semiconductor ASA
+
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+1. Redistributions of source code must retain the above copyright notice, this
+   list of conditions and the following disclaimer.
+
+2. Redistributions in binary form, except as embedded into a Nordic
+   Semiconductor ASA integrated circuit in a product or a software update for
+   such product, must reproduce the above copyright notice, this list of
+   conditions and the following disclaimer in the documentation and/or other
+   materials provided with the distribution.
+
+3. Neither the name of Nordic Semiconductor ASA nor the names of its
+   contributors may be used to endorse or promote products derived from this
+   software without specific prior written permission.
+
+4. This software, with or without modification, must only be used with a
+   Nordic Semiconductor ASA integrated circuit.
+
+5. Any software provided in binary form under this license must not be reverse
+   engineered, decompiled, modified and/or disassembled.
+
+THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*/
+
+#ifndef _NRF52840_PERIPHERALS_H
+#define _NRF52840_PERIPHERALS_H
+
+
+/* Power Peripheral */
+#define POWER_PRESENT
+#define POWER_COUNT 1
+
+#define POWER_FEATURE_RAM_REGISTERS_PRESENT
+#define POWER_FEATURE_RAM_REGISTERS_COUNT       9
+
+#define POWER_FEATURE_VDDH_PRESENT
+
+/* Floating Point Unit */
+#define FPU_PRESENT
+#define FPU_COUNT 1
+
+/* Systick timer */
+#define SYSTICK_PRESENT
+#define SYSTICK_COUNT 1
+
+/* Software Interrupts */
+#define SWI_PRESENT
+#define SWI_COUNT 6
+
+/* Memory Watch Unit */
+#define MWU_PRESENT
+#define MWU_COUNT 1
+
+/* GPIO */
+#define GPIO_PRESENT
+#define GPIO_COUNT 2
+
+#define P0_PIN_NUM 32
+#define P1_PIN_NUM 16
+
+/* ACL */
+#define ACL_PRESENT
+
+#define ACL_REGIONS_COUNT 8
+
+/* Radio */
+#define RADIO_PRESENT
+#define RADIO_COUNT 1
+
+#define RADIO_EASYDMA_MAXCNT_SIZE 8
+
+/* Accelerated Address Resolver */
+#define AAR_PRESENT
+#define AAR_COUNT 1
+
+#define AAR_MAX_IRK_NUM 16
+
+/* AES Electronic CodeBook mode encryption */
+#define ECB_PRESENT
+#define ECB_COUNT 1
+
+/* AES CCM mode encryption */
+#define CCM_PRESENT
+#define CCM_COUNT 1
+
+/* NFC Tag */
+#define NFCT_PRESENT
+#define NFCT_COUNT 1
+
+#define NFCT_EASYDMA_MAXCNT_SIZE 9
+
+/* Peripheral to Peripheral Interconnect */
+#define PPI_PRESENT
+#define PPI_COUNT 1
+
+#define PPI_CH_NUM 20
+#define PPI_FIXED_CH_NUM 12
+#define PPI_GROUP_NUM 6
+#define PPI_FEATURE_FORKS_PRESENT
+
+/* Event Generator Unit */
+#define EGU_PRESENT
+#define EGU_COUNT 6
+
+#define EGU0_CH_NUM 16
+#define EGU1_CH_NUM 16
+#define EGU2_CH_NUM 16
+#define EGU3_CH_NUM 16
+#define EGU4_CH_NUM 16
+#define EGU5_CH_NUM 16
+
+/* Timer/Counter */
+#define TIMER_PRESENT
+#define TIMER_COUNT 5
+
+#define TIMER0_MAX_SIZE 32
+#define TIMER1_MAX_SIZE 32
+#define TIMER2_MAX_SIZE 32
+#define TIMER3_MAX_SIZE 32
+#define TIMER4_MAX_SIZE 32
+
+#define TIMER0_CC_NUM 4
+#define TIMER1_CC_NUM 4
+#define TIMER2_CC_NUM 4
+#define TIMER3_CC_NUM 6
+#define TIMER4_CC_NUM 6
+
+/* Real Time Counter */
+#define RTC_PRESENT
+#define RTC_COUNT 3
+
+#define RTC0_CC_NUM 3
+#define RTC1_CC_NUM 4
+#define RTC2_CC_NUM 4
+
+/* RNG */
+#define RNG_PRESENT
+#define RNG_COUNT 1
+
+/* Watchdog Timer */
+#define WDT_PRESENT
+#define WDT_COUNT 1
+
+/* Temperature Sensor */
+#define TEMP_PRESENT
+#define TEMP_COUNT 1
+
+/* Serial Peripheral Interface Master */
+#define SPI_PRESENT
+#define SPI_COUNT 3
+
+/* Serial Peripheral Interface Master with DMA */
+#define SPIM_PRESENT
+#define SPIM_COUNT 4
+
+#define SPIM0_MAX_DATARATE  8
+#define SPIM1_MAX_DATARATE  8
+#define SPIM2_MAX_DATARATE  8
+#define SPIM3_MAX_DATARATE  32
+
+#define SPIM0_FEATURE_HARDWARE_CSN_PRESENT  0
+#define SPIM1_FEATURE_HARDWARE_CSN_PRESENT  0
+#define SPIM2_FEATURE_HARDWARE_CSN_PRESENT  0
+#define SPIM3_FEATURE_HARDWARE_CSN_PRESENT  1
+
+#define SPIM0_EASYDMA_MAXCNT_SIZE 16
+#define SPIM1_EASYDMA_MAXCNT_SIZE 16
+#define SPIM2_EASYDMA_MAXCNT_SIZE 16
+#define SPIM3_EASYDMA_MAXCNT_SIZE 16
+
+/* Serial Peripheral Interface Slave with DMA*/
+#define SPIS_PRESENT
+#define SPIS_COUNT 3
+
+#define SPIS0_EASYDMA_MAXCNT_SIZE 16
+#define SPIS1_EASYDMA_MAXCNT_SIZE 16
+#define SPIS2_EASYDMA_MAXCNT_SIZE 16
+
+/* Two Wire Interface Master */
+#define TWI_PRESENT
+#define TWI_COUNT 2
+
+/* Two Wire Interface Master with DMA */
+#define TWIM_PRESENT
+#define TWIM_COUNT 2
+
+#define TWIM0_EASYDMA_MAXCNT_SIZE 16
+#define TWIM1_EASYDMA_MAXCNT_SIZE 16
+
+/* Two Wire Interface Slave with DMA */
+#define TWIS_PRESENT
+#define TWIS_COUNT 2
+
+#define TWIS0_EASYDMA_MAXCNT_SIZE 16
+#define TWIS1_EASYDMA_MAXCNT_SIZE 16
+
+/* Universal Asynchronous Receiver-Transmitter */
+#define UART_PRESENT
+#define UART_COUNT 1
+
+/* Universal Asynchronous Receiver-Transmitter with DMA */
+#define UARTE_PRESENT
+#define UARTE_COUNT 2
+
+#define UARTE0_EASYDMA_MAXCNT_SIZE 16
+#define UARTE1_EASYDMA_MAXCNT_SIZE 16
+
+/* Quadrature Decoder */
+#define QDEC_PRESENT
+#define QDEC_COUNT 1
+
+/* Successive Approximation Analog to Digital Converter */
+#define SAADC_PRESENT
+#define SAADC_COUNT 1
+
+#define SAADC_EASYDMA_MAXCNT_SIZE 15
+
+/* GPIO Tasks and Events */
+#define GPIOTE_PRESENT
+#define GPIOTE_COUNT 1
+
+#define GPIOTE_CH_NUM 8
+
+#define GPIOTE_FEATURE_SET_PRESENT
+#define GPIOTE_FEATURE_CLR_PRESENT
+
+/* Low Power Comparator */
+#define LPCOMP_PRESENT
+#define LPCOMP_COUNT 1
+
+#define LPCOMP_REFSEL_RESOLUTION 16
+
+#define LPCOMP_FEATURE_HYST_PRESENT
+
+/* Comparator */
+#define COMP_PRESENT
+#define COMP_COUNT 1
+
+/* Pulse Width Modulator */
+#define PWM_PRESENT
+#define PWM_COUNT 4
+
+#define PWM0_CH_NUM 4
+#define PWM1_CH_NUM 4
+#define PWM2_CH_NUM 4
+#define PWM3_CH_NUM 4
+
+#define PWM0_EASYDMA_MAXCNT_SIZE 15
+#define PWM1_EASYDMA_MAXCNT_SIZE 15
+#define PWM2_EASYDMA_MAXCNT_SIZE 15
+#define PWM3_EASYDMA_MAXCNT_SIZE 15
+
+/* Pulse Density Modulator */
+#define PDM_PRESENT
+#define PDM_COUNT 1
+
+#define PDM_EASYDMA_MAXCNT_SIZE 15
+
+/* Inter-IC Sound Interface */
+#define I2S_PRESENT
+#define I2S_COUNT 1
+
+#define I2S_EASYDMA_MAXCNT_SIZE 14
+
+/* Universal Serial Bus Device */
+#define USBD_PRESENT
+#define USBD_COUNT 1
+
+#define USBD_EASYDMA_MAXCNT_SIZE 7
+
+/* ARM TrustZone Cryptocell 310 */
+#define CRYPTOCELL_PRESENT
+#define CRYPTOCELL_COUNT 1
+
+/* Quad SPI */
+#define QSPI_PRESENT
+#define QSPI_COUNT 1
+
+#define QSPI_EASYDMA_MAXCNT_SIZE 20
+
+#endif      // _NRF52840_PERIPHERALS_H

nRF5_SDK_11.0.0_89a8197/components/device/nrf52_to_nrf52840.h

@@ -0,0 +1,105 @@
+/*
+
+Copyright (c) 2010 - 2017, Nordic Semiconductor ASA
+
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without modification,
+are permitted provided that the following conditions are met:
+
+1. Redistributions of source code must retain the above copyright notice, this
+   list of conditions and the following disclaimer.
+
+2. Redistributions in binary form, except as embedded into a Nordic
+   Semiconductor ASA integrated circuit in a product or a software update for
+   such product, must reproduce the above copyright notice, this list of
+   conditions and the following disclaimer in the documentation and/or other
+   materials provided with the distribution.
+
+3. Neither the name of Nordic Semiconductor ASA nor the names of its
+   contributors may be used to endorse or promote products derived from this
+   software without specific prior written permission.
+
+4. This software, with or without modification, must only be used with a
+   Nordic Semiconductor ASA integrated circuit.
+
+5. Any software provided in binary form under this license must not be reverse
+   engineered, decompiled, modified and/or disassembled.
+
+THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+*/
+
+#ifndef NRF52_TO_NRF52840_H
+#define NRF52_TO_NRF52840_H
+
+/*lint ++flb "Enter library region */
+
+/* This file is given to prevent your SW from not compiling with the name changes between nRF51 or nRF52832 and nRF52840 devices.
+ * It redefines the old nRF51 or nRF52832 names into the new ones as long as the functionality is still supported. If the
+ * functionality is gone, there old names are not defined, so compilation will fail. Note that also includes macros
+ * from the nrf52_namechange.h file. */
+ 
+/* Differences between latest nRF52 headers and nRF52840 headers. */
+
+/* UART */
+/* The registers PSELRTS, PSELTXD, PSELCTS, PSELRXD were restructured into a struct. */
+#define PSELRTS       PSEL.RTS
+#define PSELTXD       PSEL.TXD
+#define PSELCTS       PSEL.CTS
+#define PSELRXD       PSEL.RXD
+
+/* TWI */
+/* The registers PSELSCL, PSELSDA were restructured into a struct. */
+#define PSELSCL       PSEL.SCL
+#define PSELSDA       PSEL.SDA
+
+
+/* LPCOMP */
+/* The hysteresis control enumerated values has changed name for nRF52840 devices. */
+#define LPCOMP_HYST_HYST_NoHyst     LPCOMP_HYST_HYST_Disabled
+#define LPCOMP_HYST_HYST_Hyst50mV   LPCOMP_HYST_HYST_Enabled
+
+
+/* From nrf52_name_change.h. Several macros changed in different versions of nRF52 headers. By defining the following, any code written for any version of nRF52 headers will still compile. */
+
+/* I2S */
+/* Several enumerations changed case. Adding old macros to keep compilation compatibility. */
+#define I2S_ENABLE_ENABLE_DISABLE           I2S_ENABLE_ENABLE_Disabled
+#define I2S_ENABLE_ENABLE_ENABLE            I2S_ENABLE_ENABLE_Enabled
+#define I2S_CONFIG_MODE_MODE_MASTER         I2S_CONFIG_MODE_MODE_Master
+#define I2S_CONFIG_MODE_MODE_SLAVE          I2S_CONFIG_MODE_MODE_Slave
+#define I2S_CONFIG_RXEN_RXEN_DISABLE        I2S_CONFIG_RXEN_RXEN_Disabled
+#define I2S_CONFIG_RXEN_RXEN_ENABLE         I2S_CONFIG_RXEN_RXEN_Enabled
+#define I2S_CONFIG_TXEN_TXEN_DISABLE        I2S_CONFIG_TXEN_TXEN_Disabled
+#define I2S_CONFIG_TXEN_TXEN_ENABLE         I2S_CONFIG_TXEN_TXEN_Enabled
+#define I2S_CONFIG_MCKEN_MCKEN_DISABLE      I2S_CONFIG_MCKEN_MCKEN_Disabled
+#define I2S_CONFIG_MCKEN_MCKEN_ENABLE       I2S_CONFIG_MCKEN_MCKEN_Enabled
+#define I2S_CONFIG_SWIDTH_SWIDTH_8BIT       I2S_CONFIG_SWIDTH_SWIDTH_8Bit
+#define I2S_CONFIG_SWIDTH_SWIDTH_16BIT      I2S_CONFIG_SWIDTH_SWIDTH_16Bit
+#define I2S_CONFIG_SWIDTH_SWIDTH_24BIT      I2S_CONFIG_SWIDTH_SWIDTH_24Bit
+#define I2S_CONFIG_ALIGN_ALIGN_LEFT         I2S_CONFIG_ALIGN_ALIGN_Left
+#define I2S_CONFIG_ALIGN_ALIGN_RIGHT        I2S_CONFIG_ALIGN_ALIGN_Right
+#define I2S_CONFIG_FORMAT_FORMAT_ALIGNED    I2S_CONFIG_FORMAT_FORMAT_Aligned
+#define I2S_CONFIG_CHANNELS_CHANNELS_STEREO I2S_CONFIG_CHANNELS_CHANNELS_Stereo
+#define I2S_CONFIG_CHANNELS_CHANNELS_LEFT   I2S_CONFIG_CHANNELS_CHANNELS_Left
+#define I2S_CONFIG_CHANNELS_CHANNELS_RIGHT  I2S_CONFIG_CHANNELS_CHANNELS_Right
+
+/* LPCOMP */
+/* Corrected typo in RESULT register. */
+#define LPCOMP_RESULT_RESULT_Bellow         LPCOMP_RESULT_RESULT_Below
+
+
+/*lint --flb "Leave library region" */
+
+#endif /* NRF51_TO_NRF52840_H */
+

nRF5_SDK_11.0.0_89a8197/components/drivers_nrf/common/nrf_drv_common.c

@@ -1,26 +1,70 @@
-/* Copyright (c) 2015 Nordic Semiconductor. All Rights Reserved.
+/**
+ * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
  * 
- * The information contained herein is property of Nordic Semiconductor ASA.
+ * All rights reserved.
- * Terms and conditions of usage are described in detail in NORDIC
- * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
  * 
- * Licensees are granted free, non-transferable use of the information. NO
+ * Redistribution and use in source and binary forms, with or without modification,
- * WARRANTY of ANY KIND is provided. This heading must NOT be removed from
+ * are permitted provided that the following conditions are met:
- * the file.
+ * 
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ *    list of conditions and the following disclaimer.
+ * 
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ *    Semiconductor ASA integrated circuit in a product or a software update for
+ *    such product, must reproduce the above copyright notice, this list of
+ *    conditions and the following disclaimer in the documentation and/or other
+ *    materials provided with the distribution.
+ * 
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ *    contributors may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ * 
+ * 4. This software, with or without modification, must only be used with a
+ *    Nordic Semiconductor ASA integrated circuit.
+ * 
+ * 5. Any software provided in binary form under this license must not be reverse
+ *    engineered, decompiled, modified and/or disassembled.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  * 
  */
-
 #include <stddef.h>
 #include "nrf_drv_common.h"
 #include "nrf_assert.h"
 #include "app_util_platform.h"
+#include "nrf_peripherals.h"
 
+#if NRF_DRV_COMMON_POWER_CLOCK_ISR
+#include "nrf_drv_power.h"
+#include "nrf_drv_clock.h"
+#endif
 #ifdef SOFTDEVICE_PRESENT
 #include "nrf_soc.h"
 #endif
 
+#if NRF_MODULE_ENABLED(PERIPHERAL_RESOURCE_SHARING)
+
+#define NRF_LOG_MODULE_NAME common
+
+#if COMMON_CONFIG_LOG_ENABLED
+#define NRF_LOG_LEVEL       COMMON_CONFIG_LOG_LEVEL
+#define NRF_LOG_INFO_COLOR  COMMON_CONFIG_INFO_COLOR
+#define NRF_LOG_DEBUG_COLOR COMMON_CONFIG_DEBUG_COLOR
+#else //COMMON_CONFIG_LOG_ENABLED
+#define NRF_LOG_LEVEL       0
+#endif //COMMON_CONFIG_LOG_ENABLED
+#include "nrf_log.h"
+NRF_LOG_MODULE_REGISTER();
 
-#if PERIPHERAL_RESOURCE_SHARING_ENABLED
 
 typedef struct {
     nrf_drv_irq_handler_t handler;
@@ -28,7 +72,7 @@ typedef struct {
 } shared_resource_t;
 
 // SPIM0, SPIS0, SPI0, TWIM0, TWIS0, TWI0
-#if (SPI0_ENABLED || SPIS0_ENABLED || TWI0_ENABLED || TWIS0_ENABLED)
+#if (NRF_MODULE_ENABLED(SPI0) || NRF_MODULE_ENABLED(SPIS0) || NRF_MODULE_ENABLED(TWI0) || NRF_MODULE_ENABLED(TWIS0))
     #define SERIAL_BOX_0_IN_USE
     // [this checking may need a different form in unit tests, hence macro]
     #ifndef IS_SERIAL_BOX_0
@@ -41,10 +85,10 @@ typedef struct {
         ASSERT(m_serial_box_0.handler);
         m_serial_box_0.handler();
     }
-#endif // (SPI0_ENABLED || SPIS0_ENABLED || TWI0_ENABLED || TWIS0_ENABLED)
+#endif // (NRF_MODULE_ENABLED(SPI0) || NRF_MODULE_ENABLED(SPIS0) || NRF_MODULE_ENABLED(TWI0) || NRF_MODULE_ENABLED(TWIS0))
 
 // SPIM1, SPIS1, SPI1, TWIM1, TWIS1, TWI1
-#if (SPI1_ENABLED || SPIS1_ENABLED || TWI1_ENABLED || TWIS1_ENABLED)
+#if (NRF_MODULE_ENABLED(SPI1) || NRF_MODULE_ENABLED(SPIS1) || NRF_MODULE_ENABLED(TWI1) || NRF_MODULE_ENABLED(TWIS1))
     #define SERIAL_BOX_1_IN_USE
     // [this checking may need a different form in unit tests, hence macro]
     #ifndef IS_SERIAL_BOX_1
@@ -52,15 +96,19 @@ typedef struct {
     #endif
 
     static shared_resource_t m_serial_box_1 = { .acquired = false };
+#ifdef TWIM_PRESENT
+    void SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler(void)
+#else
     void SPI1_TWI1_IRQHandler(void)
+#endif
     {
         ASSERT(m_serial_box_1.handler);
         m_serial_box_1.handler();
     }
-#endif // (SPI1_ENABLED || SPIS1_ENABLED || TWI1_ENABLED || TWIS1_ENABLED)
+#endif // (NRF_MODULE_ENABLED(SPI1) || NRF_MODULE_ENABLED(SPIS1) || NRF_MODULE_ENABLED(TWI1) || NRF_MODULE_ENABLED(TWIS1))
 
 // SPIM2, SPIS2, SPI2
-#if (SPI2_ENABLED || SPIS2_ENABLED)
+#if (NRF_MODULE_ENABLED(SPI2) || NRF_MODULE_ENABLED(SPIS2))
     #define SERIAL_BOX_2_IN_USE
     // [this checking may need a different form in unit tests, hence macro]
     #ifndef IS_SERIAL_BOX_2
@@ -73,10 +121,10 @@ typedef struct {
         ASSERT(m_serial_box_2.handler);
         m_serial_box_2.handler();
     }
-#endif // (SPI2_ENABLED || SPIS2_ENABLED)
+#endif // (NRF_MODULE_ENABLED(SPI2) || NRF_MODULE_ENABLED(SPIS2))
 
 // COMP, LPCOMP
-#if (COMP_ENABLED || LPCOMP_ENABLED)
+#if (NRF_MODULE_ENABLED(COMP) || NRF_MODULE_ENABLED(LPCOMP))
     #define COMP_LPCOMP_IN_USE
 
     #ifndef IS_COMP_LPCOMP
@@ -89,7 +137,7 @@ typedef struct {
         ASSERT(m_comp_lpcomp.handler);
         m_comp_lpcomp.handler();
     }
-#endif	// (COMP_ENABLED || LPCOMP_ENABLED)
+#endif    // (NRF_MODULE_ENABLED(COMP) || NRF_MODULE_ENABLED(LPCOMP))
 
 #if defined(SERIAL_BOX_0_IN_USE) || \
     defined(SERIAL_BOX_1_IN_USE) || \
@@ -98,6 +146,8 @@ typedef struct {
 static ret_code_t acquire_shared_resource(shared_resource_t * p_resource,
                                           nrf_drv_irq_handler_t handler)
 {
+    ret_code_t err_code;
+
     bool busy = false;
 
     CRITICAL_REGION_ENTER();
@@ -113,11 +163,15 @@ static ret_code_t acquire_shared_resource(shared_resource_t * p_resource,
 
     if (busy)
     {
-        return NRF_ERROR_BUSY;
+        err_code = NRF_ERROR_BUSY;
+        NRF_LOG_WARNING("Function: %s, error code: %s.", (uint32_t)__func__, (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code));
+        return err_code;
     }
 
     p_resource->handler = handler;
-    return NRF_SUCCESS;
+    err_code = NRF_SUCCESS;
+    NRF_LOG_INFO("Function: %s, error code: %s.", (uint32_t)__func__, (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code));
+    return err_code;
 }
 #endif
 
@@ -151,8 +205,11 @@ ret_code_t nrf_drv_common_per_res_acquire(void const * p_per_base,
         return acquire_shared_resource(&m_comp_lpcomp, handler);
     }
 #endif
+    ret_code_t err_code;
 
-    return NRF_ERROR_INVALID_PARAM;
+    err_code = NRF_ERROR_INVALID_PARAM;
+    NRF_LOG_WARNING("Function: %s, error code: %s.", (uint32_t)__func__, (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code));
+    return err_code;
 }
 
 void nrf_drv_common_per_res_release(void const * p_per_base)
@@ -192,15 +249,47 @@ void nrf_drv_common_per_res_release(void const * p_per_base)
     {}
 }
 
-#endif // PERIPHERAL_RESOURCE_SHARING_ENABLED
+#endif // NRF_MODULE_ENABLED(PERIPHERAL_RESOURCE_SHARING)
+
+#if NRF_MODULE_ENABLED(POWER)
+void nrf_drv_common_power_irq_disable(void)
+{
+#if NRF_DRV_COMMON_POWER_CLOCK_ISR
+    if (!nrf_drv_clock_init_check())
+#endif
+    {
+        nrf_drv_common_irq_disable(POWER_CLOCK_IRQn);
+    }
+}
+#endif
+
+#if NRF_MODULE_ENABLED(CLOCK)
+void nrf_drv_common_clock_irq_disable(void)
+{
+#if NRF_DRV_COMMON_POWER_CLOCK_ISR
+    if (!nrf_drv_power_init_check())
+#endif
+    {
+        nrf_drv_common_irq_disable(POWER_CLOCK_IRQn);
+    }
+}
+#endif
+
+#if NRF_DRV_COMMON_POWER_CLOCK_ISR
+void POWER_CLOCK_IRQHandler(void)
+{
+    extern void nrf_drv_clock_onIRQ(void);
+    extern void nrf_drv_power_onIRQ(void);
+
+    nrf_drv_clock_onIRQ();
+    nrf_drv_power_onIRQ();
+}
+#endif // NRF_DRV_COMMON_POWER_CLOCK_ISR
 
 
 void nrf_drv_common_irq_enable(IRQn_Type IRQn, uint8_t priority)
 {
-
+    INTERRUPT_PRIORITY_ASSERT(priority);
-#ifdef SOFTDEVICE_PRESENT
-    ASSERT((priority == APP_IRQ_PRIORITY_LOW) || (priority == APP_IRQ_PRIORITY_HIGH));
-#endif
 
     NVIC_SetPriority(IRQn, priority);
     NVIC_ClearPendingIRQ(IRQn);

nRF5_SDK_11.0.0_89a8197/components/drivers_nrf/common/nrf_drv_common.h

@@ -1,15 +1,42 @@
-/* Copyright (c) 2015 Nordic Semiconductor. All Rights Reserved.
+/**
+ * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
  * 
- * The information contained herein is property of Nordic Semiconductor ASA.
+ * All rights reserved.
- * Terms and conditions of usage are described in detail in NORDIC
- * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
  * 
- * Licensees are granted free, non-transferable use of the information. NO
+ * Redistribution and use in source and binary forms, with or without modification,
- * WARRANTY of ANY KIND is provided. This heading must NOT be removed from
+ * are permitted provided that the following conditions are met:
- * the file.
+ * 
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ *    list of conditions and the following disclaimer.
+ * 
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ *    Semiconductor ASA integrated circuit in a product or a software update for
+ *    such product, must reproduce the above copyright notice, this list of
+ *    conditions and the following disclaimer in the documentation and/or other
+ *    materials provided with the distribution.
+ * 
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ *    contributors may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ * 
+ * 4. This software, with or without modification, must only be used with a
+ *    Nordic Semiconductor ASA integrated circuit.
+ * 
+ * 5. Any software provided in binary form under this license must not be reverse
+ *    engineered, decompiled, modified and/or disassembled.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  * 
  */
-
 #ifndef NRF_DRV_COMMON_H__
 #define NRF_DRV_COMMON_H__
 
@@ -17,16 +44,58 @@
 #include <stdbool.h>
 #include "nrf.h"
 #include "sdk_errors.h"
-#include "nrf_drv_config.h"
+#include "sdk_common.h"
+#include "nrf_assert.h"
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifdef NRF51
+#ifdef SOFTDEVICE_PRESENT
+#define INTERRUPT_PRIORITY_IS_VALID(pri) (((pri) == 1) || ((pri) == 3))
+#else
+#define INTERRUPT_PRIORITY_IS_VALID(pri) ((pri) < 4)
+#endif //SOFTDEVICE_PRESENT
+#else
+#ifdef SOFTDEVICE_PRESENT
+#define INTERRUPT_PRIORITY_IS_VALID(pri) ((((pri) > 1) && ((pri) < 4)) || \
+                                          (((pri) > 4) && ((pri) < 8)))
+#else
+#define INTERRUPT_PRIORITY_IS_VALID(pri) ((pri) < 8)
+#endif //SOFTDEVICE_PRESENT
+#endif //NRF52
+
+#define INTERRUPT_PRIORITY_VALIDATION(pri) STATIC_ASSERT(INTERRUPT_PRIORITY_IS_VALID((pri)))
+#define INTERRUPT_PRIORITY_ASSERT(pri)     ASSERT(INTERRUPT_PRIORITY_IS_VALID((pri)))
 
 /**
- * @brief Offset of event registers in every peripheral instance
+ * @defgroup nrf_drv_common Peripheral drivers common module
+ * @{
+ * @ingroup nrf_drivers
+ */
+
+/**
+ * @brief Offset of event registers in every peripheral instance.
  *
- * This is the offset where event registers start in the every peripheral.
+ * This is the offset where event registers start in  every peripheral.
  */
 #define NRF_DRV_COMMON_EVREGS_OFFSET 0x100U
 
+/**
+ * @brief The flag that is set when POWER_CLOCK ISR is implemented in common module
+ *
+ * This flag means that the function POWER_CLOCK_IRQHandler is implemented in
+ * nrf_drv_common.c file. In the @c clock and @c power modules functions
+ * nrf_drv_clock_onIRQ nrf_drv_power_onIRQ should be implemented
+ * and they would be called from common implementation.
+ *
+ * None of the checking is done here.
+ * The implementation functions in @c clock and @c power are required to handle
+ * correctly the case when they are called without any event bit set.
+ */
+#define NRF_DRV_COMMON_POWER_CLOCK_ISR (NRF_MODULE_ENABLED(CLOCK) && NRF_MODULE_ENABLED(POWER))
+
 /**
  * @brief Driver state.
  */
@@ -52,7 +121,7 @@ typedef enum
 typedef void (*nrf_drv_irq_handler_t)(void);
 
 
-#if PERIPHERAL_RESOURCE_SHARING_ENABLED
+#if NRF_MODULE_ENABLED(PERIPHERAL_RESOURCE_SHARING)
 
 /**
  * @brief Function for acquiring shared peripheral resources associated with
@@ -89,7 +158,7 @@ ret_code_t nrf_drv_common_per_res_acquire(void const * p_per_base,
  */
 void nrf_drv_common_per_res_release(void const * p_per_base);
 
-#endif // PERIPHERAL_RESOURCE_SHARING_ENABLED
+#endif // NRF_MODULE_ENABLED(PERIPHERAL_RESOURCE_SHARING)
 
 
 /**
@@ -102,6 +171,44 @@ void nrf_drv_common_per_res_release(void const * p_per_base);
  */
 void nrf_drv_common_irq_enable(IRQn_Type IRQn, uint8_t priority);
 
+#if NRF_MODULE_ENABLED(POWER)
+/**
+ * @brief Disable power IRQ
+ *
+ * Power and clock peripheral uses the same IRQ.
+ * This function disables POWER_CLOCK IRQ only if CLOCK driver
+ * is uninitialized.
+ *
+ * @sa nrf_drv_common_power_clock_irq_init
+ */
+void nrf_drv_common_power_irq_disable(void);
+#endif
+
+#if NRF_MODULE_ENABLED(CLOCK)
+/**
+ * @brief Disable clock IRQ
+ *
+ * Power and clock peripheral uses the same IRQ.
+ * This function disables POWER_CLOCK IRQ only if POWER driver
+ * is uninitialized.
+ *
+ * @sa nrf_drv_common_power_clock_irq_init
+ */
+void nrf_drv_common_clock_irq_disable(void);
+#endif
+
+/**
+ * @brief Check if interrupt is enabled
+ *
+ * Function that checks if selected interrupt is enabled.
+ *
+ * @param[in] IRQn     Interrupt id
+ *
+ * @retval true  Selected IRQ is enabled.
+ * @retval false Selected IRQ is disabled.
+ */
+__STATIC_INLINE bool nrf_drv_common_irq_enable_check(IRQn_Type IRQn);
+
 /**
  * @brief Function disables NVIC interrupt
  *
@@ -117,7 +224,7 @@ __STATIC_INLINE void nrf_drv_common_irq_disable(IRQn_Type IRQn);
  * of peripheral instance.
  *
  * For example the result of this function can be casted directly to
- * the types like @ref nrf_twis_event_t or @ref nrf_rng_events_t...
+ * the types like @ref nrf_twis_event_t or @ref nrf_rng_event_t
  *
  * @param bit Bit position in INTEN register
  * @return Event code to be casted to the right enum type or to be used in functions like
@@ -133,7 +240,7 @@ __STATIC_INLINE uint32_t nrf_drv_bitpos_to_event(uint32_t bit);
  * This function can be used to get bit position in INTEN register from event code.
  *
  * @param event Event code that may be casted from enum values from types like
- * @ref nrf_twis_event_t or @ref nrf_rng_events_t
+ * @ref nrf_twis_event_t or @ref nrf_rng_event_t
  * @return Bit position in INTEN register that corresponds to the given code.
  *
  * @sa nrf_drv_bitpos_to_event
@@ -149,6 +256,29 @@ __STATIC_INLINE uint32_t nrf_drv_event_to_bitpos(uint32_t event);
  */
 __STATIC_INLINE IRQn_Type nrf_drv_get_IRQn(void const * const pinst);
 
+#if NRF_MODULE_ENABLED(CLOCK) || NRF_MODULE_ENABLED(POWER)
+/**
+ * @brief Enable and setup power clock IRQ
+ *
+ * This function would be called from @ref nrf_drv_clock and @ref nrf_drv_power
+ * to enable related interrupt.
+ * This function avoids multiple interrupt configuration.
+ *
+ * @note
+ * This function is aviable only if @ref nrf_drv_clock or @ref nrf_drv_power
+ * module is enabled.
+ *
+ * @note
+ * If both @ref nrf_drv_clock and @ref nrf_drv_power modules are enabled,
+ * during the compilation the check is made that
+ * @ref CLOCK_CONFIG_IRQ_PRIORITY equals @ref POWER_CONFIG_IRQ_PRIORITY.
+ *
+ * @sa nrf_drv_common_power_irq_disable
+ * @sa nrf_drv_common_clock_irq_disable
+ */
+__STATIC_INLINE void nrf_drv_common_power_clock_irq_init(void);
+#endif
+
 /**
  * @brief Check if given object is in RAM
  *
@@ -160,9 +290,14 @@ __STATIC_INLINE IRQn_Type nrf_drv_get_IRQn(void const * const pinst);
  */
 __STATIC_INLINE bool nrf_drv_is_in_RAM(void const * const ptr);
 
-
 #ifndef SUPPRESS_INLINE_IMPLEMENTATION
 
+__STATIC_INLINE bool nrf_drv_common_irq_enable_check(IRQn_Type IRQn)
+{
+    return 0 != (NVIC->ISER[(((uint32_t)(int32_t)IRQn) >> 5UL)] &
+        (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL)));
+}
+
 __STATIC_INLINE void nrf_drv_common_irq_disable(IRQn_Type IRQn)
 {
     NVIC_DisableIRQ(IRQn);
@@ -184,6 +319,28 @@ __STATIC_INLINE IRQn_Type nrf_drv_get_IRQn(void const * const pinst)
     return (IRQn_Type) ret;
 }
 
+#if NRF_MODULE_ENABLED(CLOCK) || NRF_MODULE_ENABLED(POWER)
+__STATIC_INLINE void nrf_drv_common_power_clock_irq_init(void)
+{
+    if (!nrf_drv_common_irq_enable_check(POWER_CLOCK_IRQn))
+    {
+        nrf_drv_common_irq_enable(
+            POWER_CLOCK_IRQn,
+#if NRF_DRV_COMMON_POWER_CLOCK_ISR
+    #if CLOCK_CONFIG_IRQ_PRIORITY != POWER_CONFIG_IRQ_PRIORITY
+    #error CLOCK_CONFIG_IRQ_PRIORITY and POWER_CONFIG_IRQ_PRIORITY have to be the same.
+    #endif
+            CLOCK_CONFIG_IRQ_PRIORITY
+#elif NRF_MODULE_ENABLED(CLOCK)
+            CLOCK_CONFIG_IRQ_PRIORITY
+#elif NRF_MODULE_ENABLED(POWER)
+            POWER_CONFIG_IRQ_PRIORITY
+#endif
+            );
+    }
+}
+#endif
+
 __STATIC_INLINE bool nrf_drv_is_in_RAM(void const * const ptr)
 {
     return ((((uintptr_t)ptr) & 0xE0000000u) == 0x20000000u);
@@ -191,4 +348,11 @@ __STATIC_INLINE bool nrf_drv_is_in_RAM(void const * const ptr)
 
 #endif // SUPPRESS_INLINE_IMPLEMENTATION
 
+
+#ifdef __cplusplus
+}
+#endif
+
 #endif // NRF_DRV_COMMON_H__
+
+/** @} */

nRF5_SDK_11.0.0_89a8197/components/drivers_nrf/config/nrf_drv_config.h

@@ -1,464 +0,0 @@
-/* Copyright (c) 2015 Nordic Semiconductor. All Rights Reserved.
- *
- * The information contained herein is property of Nordic Semiconductor ASA.
- * Terms and conditions of usage are described in detail in NORDIC
- * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
- *
- * Licensees are granted free, non-transferable use of the information. NO
- * WARRANTY of ANY KIND is provided. This heading must NOT be removed from
- * the file.
- *
- */
-
-#ifndef NRF_DRV_CONFIG_H
-#define NRF_DRV_CONFIG_H
-
-/**
- * Provide a non-zero value here in applications that need to use several
- * peripherals with the same ID that are sharing certain resources
- * (for example, SPI0 and TWI0). Obviously, such peripherals cannot be used
- * simultaneously. Therefore, this definition allows to initialize the driver
- * for another peripheral from a given group only after the previously used one
- * is uninitialized. Normally, this is not possible, because interrupt handlers
- * are implemented in individual drivers.
- * This functionality requires a more complicated interrupt handling and driver
- * initialization, hence it is not always desirable to use it.
- */
-#define PERIPHERAL_RESOURCE_SHARING_ENABLED  0
-
-/* CLOCK */
-#define CLOCK_ENABLED 0
-
-#if (CLOCK_ENABLED == 1)
-#define CLOCK_CONFIG_XTAL_FREQ          NRF_CLOCK_XTALFREQ_Default
-#define CLOCK_CONFIG_LF_SRC             NRF_CLOCK_LFCLK_Xtal
-#define CLOCK_CONFIG_IRQ_PRIORITY       APP_IRQ_PRIORITY_LOW
-#endif
-
-/* GPIOTE */
-#define GPIOTE_ENABLED 0
-
-#if (GPIOTE_ENABLED == 1)
-#define GPIOTE_CONFIG_USE_SWI_EGU false
-#define GPIOTE_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
-#define GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS 1
-#endif
-
-/* TIMER */
-#define TIMER0_ENABLED 0
-
-#if (TIMER0_ENABLED == 1)
-#define TIMER0_CONFIG_FREQUENCY    NRF_TIMER_FREQ_16MHz
-#define TIMER0_CONFIG_MODE         TIMER_MODE_MODE_Timer
-#define TIMER0_CONFIG_BIT_WIDTH    TIMER_BITMODE_BITMODE_32Bit
-#define TIMER0_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
-
-#define TIMER0_INSTANCE_INDEX      0
-#endif
-
-#define TIMER1_ENABLED 0
-
-#if (TIMER1_ENABLED == 1)
-#define TIMER1_CONFIG_FREQUENCY    NRF_TIMER_FREQ_16MHz
-#define TIMER1_CONFIG_MODE         TIMER_MODE_MODE_Timer
-#define TIMER1_CONFIG_BIT_WIDTH    TIMER_BITMODE_BITMODE_16Bit
-#define TIMER1_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
-
-#define TIMER1_INSTANCE_INDEX      (TIMER0_ENABLED)
-#endif
- 
-#define TIMER2_ENABLED 0
-
-#if (TIMER2_ENABLED == 1)
-#define TIMER2_CONFIG_FREQUENCY    NRF_TIMER_FREQ_16MHz
-#define TIMER2_CONFIG_MODE         TIMER_MODE_MODE_Timer
-#define TIMER2_CONFIG_BIT_WIDTH    TIMER_BITMODE_BITMODE_16Bit
-#define TIMER2_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
-
-#define TIMER2_INSTANCE_INDEX      (TIMER1_ENABLED+TIMER0_ENABLED)
-#endif
-
-#define TIMER3_ENABLED 0
-
-#if (TIMER3_ENABLED == 1)
-#define TIMER3_CONFIG_FREQUENCY    NRF_TIMER_FREQ_16MHz
-#define TIMER3_CONFIG_MODE         TIMER_MODE_MODE_Timer
-#define TIMER3_CONFIG_BIT_WIDTH    TIMER_BITMODE_BITMODE_16Bit
-#define TIMER3_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
-
-#define TIMER3_INSTANCE_INDEX      (TIMER2_ENABLED+TIMER1_ENABLED+TIMER0_ENABLED)
-#endif
-
-#define TIMER4_ENABLED 0
-
-#if (TIMER4_ENABLED == 1)
-#define TIMER4_CONFIG_FREQUENCY    NRF_TIMER_FREQ_16MHz
-#define TIMER4_CONFIG_MODE         TIMER_MODE_MODE_Timer
-#define TIMER4_CONFIG_BIT_WIDTH    TIMER_BITMODE_BITMODE_16Bit
-#define TIMER4_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
-
-#define TIMER4_INSTANCE_INDEX      (TIMER3_ENABLED+TIMER2_ENABLED+TIMER1_ENABLED+TIMER0_ENABLED)
-#endif
-
-
-#define TIMER_COUNT (TIMER0_ENABLED + TIMER1_ENABLED + TIMER2_ENABLED + TIMER3_ENABLED + TIMER4_ENABLED)
-
-/* RTC */
-#define RTC0_ENABLED 0
-
-#if (RTC0_ENABLED == 1)
-#define RTC0_CONFIG_FREQUENCY    32678
-#define RTC0_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
-#define RTC0_CONFIG_RELIABLE     false
-
-#define RTC0_INSTANCE_INDEX      0
-#endif
-
-#define RTC1_ENABLED 0
-
-#if (RTC1_ENABLED == 1)
-#define RTC1_CONFIG_FREQUENCY    32768
-#define RTC1_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
-#define RTC1_CONFIG_RELIABLE     false
-
-#define RTC1_INSTANCE_INDEX      (RTC0_ENABLED)
-#endif
-
-#define RTC2_ENABLED 0
-
-#if (RTC2_ENABLED == 1)
-#define RTC2_CONFIG_FREQUENCY    32768
-#define RTC2_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
-#define RTC2_CONFIG_RELIABLE     false
-
-#define RTC2_INSTANCE_INDEX      (RTC0_ENABLED+RTC1_ENABLED)
-#endif
-
-
-#define RTC_COUNT                (RTC0_ENABLED+RTC1_ENABLED+RTC2_ENABLED)
-
-#define NRF_MAXIMUM_LATENCY_US 2000
-
-/* RNG */
-#define RNG_ENABLED 0
-
-#if (RNG_ENABLED == 1)
-#define RNG_CONFIG_ERROR_CORRECTION true
-#define RNG_CONFIG_POOL_SIZE        8
-#define RNG_CONFIG_IRQ_PRIORITY     APP_IRQ_PRIORITY_LOW
-#endif
-
-/* PWM */
-
-#define PWM0_ENABLED 0
-
-#if (PWM0_ENABLED == 1)
-#define PWM0_CONFIG_OUT0_PIN        2
-#define PWM0_CONFIG_OUT1_PIN        3
-#define PWM0_CONFIG_OUT2_PIN        4
-#define PWM0_CONFIG_OUT3_PIN        5
-#define PWM0_CONFIG_IRQ_PRIORITY    APP_IRQ_PRIORITY_LOW
-#define PWM0_CONFIG_BASE_CLOCK      NRF_PWM_CLK_1MHz
-#define PWM0_CONFIG_COUNT_MODE      NRF_PWM_MODE_UP
-#define PWM0_CONFIG_TOP_VALUE       1000
-#define PWM0_CONFIG_LOAD_MODE       NRF_PWM_LOAD_COMMON
-#define PWM0_CONFIG_STEP_MODE       NRF_PWM_STEP_AUTO
-
-#define PWM0_INSTANCE_INDEX 0
-#endif
-
-#define PWM1_ENABLED 0
-
-#if (PWM1_ENABLED == 1)
-#define PWM1_CONFIG_OUT0_PIN        2
-#define PWM1_CONFIG_OUT1_PIN        3
-#define PWM1_CONFIG_OUT2_PIN        4
-#define PWM1_CONFIG_OUT3_PIN        5
-#define PWM1_CONFIG_IRQ_PRIORITY    APP_IRQ_PRIORITY_LOW
-#define PWM1_CONFIG_BASE_CLOCK      NRF_PWM_CLK_1MHz
-#define PWM1_CONFIG_COUNT_MODE      NRF_PWM_MODE_UP
-#define PWM1_CONFIG_TOP_VALUE       1000
-#define PWM1_CONFIG_LOAD_MODE       NRF_PWM_LOAD_COMMON
-#define PWM1_CONFIG_STEP_MODE       NRF_PWM_STEP_AUTO
-
-#define PWM1_INSTANCE_INDEX (PWM0_ENABLED)
-#endif
-
-#define PWM2_ENABLED 0
-
-#if (PWM2_ENABLED == 1)
-#define PWM2_CONFIG_OUT0_PIN        2
-#define PWM2_CONFIG_OUT1_PIN        3
-#define PWM2_CONFIG_OUT2_PIN        4
-#define PWM2_CONFIG_OUT3_PIN        5
-#define PWM2_CONFIG_IRQ_PRIORITY    APP_IRQ_PRIORITY_LOW
-#define PWM2_CONFIG_BASE_CLOCK      NRF_PWM_CLK_1MHz
-#define PWM2_CONFIG_COUNT_MODE      NRF_PWM_MODE_UP
-#define PWM2_CONFIG_TOP_VALUE       1000
-#define PWM2_CONFIG_LOAD_MODE       NRF_PWM_LOAD_COMMON
-#define PWM2_CONFIG_STEP_MODE       NRF_PWM_STEP_AUTO
-
-#define PWM2_INSTANCE_INDEX (PWM0_ENABLED + PWM1_ENABLED)
-#endif
-
-#define PWM_COUNT   (PWM0_ENABLED + PWM1_ENABLED + PWM2_ENABLED)
-
-/* SPI */
-#define SPI0_ENABLED 0
-
-#if (SPI0_ENABLED == 1)
-#define SPI0_USE_EASY_DMA 0
-
-#define SPI0_CONFIG_SCK_PIN         2
-#define SPI0_CONFIG_MOSI_PIN        3
-#define SPI0_CONFIG_MISO_PIN        4
-#define SPI0_CONFIG_IRQ_PRIORITY    APP_IRQ_PRIORITY_LOW
-
-#define SPI0_INSTANCE_INDEX 0
-#endif
-
-#define SPI1_ENABLED 0
-
-#if (SPI1_ENABLED == 1)
-#define SPI1_USE_EASY_DMA 0
-
-#define SPI1_CONFIG_SCK_PIN         2
-#define SPI1_CONFIG_MOSI_PIN        3
-#define SPI1_CONFIG_MISO_PIN        4
-#define SPI1_CONFIG_IRQ_PRIORITY    APP_IRQ_PRIORITY_LOW
-
-#define SPI1_INSTANCE_INDEX (SPI0_ENABLED)
-#endif
-
-#define SPI2_ENABLED 0
-
-#if (SPI2_ENABLED == 1)
-#define SPI2_USE_EASY_DMA 0
-
-#define SPI2_CONFIG_SCK_PIN         2
-#define SPI2_CONFIG_MOSI_PIN        3
-#define SPI2_CONFIG_MISO_PIN        4
-#define SPI2_CONFIG_IRQ_PRIORITY    APP_IRQ_PRIORITY_LOW
-
-#define SPI2_INSTANCE_INDEX (SPI0_ENABLED + SPI1_ENABLED)
-#endif
-
-#define SPI_COUNT   (SPI0_ENABLED + SPI1_ENABLED + SPI2_ENABLED)
-
-/* SPIS */
-#define SPIS0_ENABLED 0
-
-#if (SPIS0_ENABLED == 1)
-#define SPIS0_CONFIG_SCK_PIN         2
-#define SPIS0_CONFIG_MOSI_PIN        3
-#define SPIS0_CONFIG_MISO_PIN        4
-#define SPIS0_CONFIG_IRQ_PRIORITY    APP_IRQ_PRIORITY_LOW
-
-#define SPIS0_INSTANCE_INDEX 0
-#endif
-
-#define SPIS1_ENABLED 0
-
-#if (SPIS1_ENABLED == 1)
-#define SPIS1_CONFIG_SCK_PIN         2
-#define SPIS1_CONFIG_MOSI_PIN        3
-#define SPIS1_CONFIG_MISO_PIN        4
-#define SPIS1_CONFIG_IRQ_PRIORITY    APP_IRQ_PRIORITY_LOW
-
-#define SPIS1_INSTANCE_INDEX SPIS0_ENABLED
-#endif
-
-#define SPIS2_ENABLED 0
-
-#if (SPIS2_ENABLED == 1)
-#define SPIS2_CONFIG_SCK_PIN         2
-#define SPIS2_CONFIG_MOSI_PIN        3
-#define SPIS2_CONFIG_MISO_PIN        4
-#define SPIS2_CONFIG_IRQ_PRIORITY    APP_IRQ_PRIORITY_LOW
-
-#define SPIS2_INSTANCE_INDEX (SPIS0_ENABLED + SPIS1_ENABLED)
-#endif
-
-#define SPIS_COUNT   (SPIS0_ENABLED + SPIS1_ENABLED + SPIS2_ENABLED)
-
-/* UART */
-#define UART0_ENABLED 0
-
-#if (UART0_ENABLED == 1)
-#define UART0_CONFIG_HWFC         NRF_UART_HWFC_DISABLED
-#define UART0_CONFIG_PARITY       NRF_UART_PARITY_EXCLUDED
-#define UART0_CONFIG_BAUDRATE     NRF_UART_BAUDRATE_115200
-#define UART0_CONFIG_PSEL_TXD     0
-#define UART0_CONFIG_PSEL_RXD     0
-#define UART0_CONFIG_PSEL_CTS     0
-#define UART0_CONFIG_PSEL_RTS     0
-#define UART0_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
-#ifdef NRF52
-#define UART0_CONFIG_USE_EASY_DMA false
-//Compile time flag
-#define UART_EASY_DMA_SUPPORT     1
-#define UART_LEGACY_SUPPORT       1
-#endif //NRF52
-#endif
-
-#define TWI0_ENABLED 0
-
-#if (TWI0_ENABLED == 1)
-#define TWI0_USE_EASY_DMA 0
-
-#define TWI0_CONFIG_FREQUENCY    NRF_TWI_FREQ_100K
-#define TWI0_CONFIG_SCL          0
-#define TWI0_CONFIG_SDA          1
-#define TWI0_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
-
-#define TWI0_INSTANCE_INDEX      0
-#endif
-
-#define TWI1_ENABLED 0
-
-#if (TWI1_ENABLED == 1)
-#define TWI1_USE_EASY_DMA 0
-
-#define TWI1_CONFIG_FREQUENCY    NRF_TWI_FREQ_100K
-#define TWI1_CONFIG_SCL          0
-#define TWI1_CONFIG_SDA          1
-#define TWI1_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
-
-#define TWI1_INSTANCE_INDEX      (TWI0_ENABLED)
-#endif
-
-#define TWI_COUNT                (TWI0_ENABLED + TWI1_ENABLED)
-
-/* TWIS */
-#define TWIS0_ENABLED 0
-
-#if (TWIS0_ENABLED == 1)
-    #define TWIS0_CONFIG_ADDR0        0
-    #define TWIS0_CONFIG_ADDR1        0 /* 0: Disabled */
-    #define TWIS0_CONFIG_SCL          0
-    #define TWIS0_CONFIG_SDA          1
-    #define TWIS0_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
-
-    #define TWIS0_INSTANCE_INDEX      0
-#endif
-
-#define TWIS1_ENABLED 0
-
-#if (TWIS1_ENABLED ==  1)
-    #define TWIS1_CONFIG_ADDR0        0
-    #define TWIS1_CONFIG_ADDR1        0 /* 0: Disabled */
-    #define TWIS1_CONFIG_SCL          0
-    #define TWIS1_CONFIG_SDA          1
-    #define TWIS1_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
-
-    #define TWIS1_INSTANCE_INDEX      (TWIS0_ENABLED)
-#endif
-
-#define TWIS_COUNT (TWIS0_ENABLED + TWIS1_ENABLED)
-/* For more documentation see nrf_drv_twis.h file */
-#define TWIS_ASSUME_INIT_AFTER_RESET_ONLY 0
-/* For more documentation see nrf_drv_twis.h file */
-#define TWIS_NO_SYNC_MODE 0
-
-/* QDEC */
-#define QDEC_ENABLED 0
-
-#if (QDEC_ENABLED == 1)
-#define QDEC_CONFIG_REPORTPER    NRF_QDEC_REPORTPER_10
-#define QDEC_CONFIG_SAMPLEPER    NRF_QDEC_SAMPLEPER_16384us
-#define QDEC_CONFIG_PIO_A        1
-#define QDEC_CONFIG_PIO_B        2
-#define QDEC_CONFIG_PIO_LED      3
-#define QDEC_CONFIG_LEDPRE       511
-#define QDEC_CONFIG_LEDPOL       NRF_QDEC_LEPOL_ACTIVE_HIGH
-#define QDEC_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
-#define QDEC_CONFIG_DBFEN        false
-#define QDEC_CONFIG_SAMPLE_INTEN false
-#endif
-
-/* ADC */
-#define ADC_ENABLED 0
-
-#if (ADC_ENABLED == 1)
-#define ADC_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
-#endif
-
-
-/* SAADC */
-#define SAADC_ENABLED 0
-
-#if (SAADC_ENABLED == 1)
-#define SAADC_CONFIG_RESOLUTION      NRF_SAADC_RESOLUTION_10BIT
-#define SAADC_CONFIG_OVERSAMPLE      NRF_SAADC_OVERSAMPLE_DISABLED
-#define SAADC_CONFIG_IRQ_PRIORITY    APP_IRQ_PRIORITY_LOW
-#endif
-
-/* PDM */
-#define PDM_ENABLED 0
-
-#if (PDM_ENABLED == 1)
-#define PDM_CONFIG_MODE            NRF_PDM_MODE_MONO
-#define PDM_CONFIG_EDGE            NRF_PDM_EDGE_LEFTFALLING
-#define PDM_CONFIG_CLOCK_FREQ      NRF_PDM_FREQ_1032K
-#define PDM_CONFIG_IRQ_PRIORITY    APP_IRQ_PRIORITY_LOW
-#endif
-
-/* COMP */
-#define COMP_ENABLED 0
-
-#if (COMP_ENABLED == 1)
-#define COMP_CONFIG_REF     		NRF_COMP_REF_Int1V8
-#define COMP_CONFIG_MAIN_MODE		NRF_COMP_MAIN_MODE_SE
-#define COMP_CONFIG_SPEED_MODE		NRF_COMP_SP_MODE_High
-#define COMP_CONFIG_HYST			NRF_COMP_HYST_NoHyst
-#define COMP_CONFIG_ISOURCE			NRF_COMP_ISOURCE_Off
-#define COMP_CONFIG_IRQ_PRIORITY 	APP_IRQ_PRIORITY_LOW
-#define COMP_CONFIG_INPUT        	NRF_COMP_INPUT_0
-#endif
-
-/* LPCOMP */
-#define LPCOMP_ENABLED 0
-
-#if (LPCOMP_ENABLED == 1)
-#define LPCOMP_CONFIG_REFERENCE    NRF_LPCOMP_REF_SUPPLY_4_8
-#define LPCOMP_CONFIG_DETECTION    NRF_LPCOMP_DETECT_DOWN
-#define LPCOMP_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
-#define LPCOMP_CONFIG_INPUT        NRF_LPCOMP_INPUT_0
-#endif
-
-/* WDT */
-#define WDT_ENABLED 0
-
-#if (WDT_ENABLED == 1)
-#define WDT_CONFIG_BEHAVIOUR     NRF_WDT_BEHAVIOUR_RUN_SLEEP
-#define WDT_CONFIG_RELOAD_VALUE  2000
-#define WDT_CONFIG_IRQ_PRIORITY  APP_IRQ_PRIORITY_HIGH
-#endif
-
-/* SWI EGU */
-#ifdef NRF52
-    #define EGU_ENABLED 0
-#endif
-
-/* I2S */
-#define I2S_ENABLED 0
-
-#if (I2S_ENABLED == 1)
-#define I2S_CONFIG_SCK_PIN      22
-#define I2S_CONFIG_LRCK_PIN     23
-#define I2S_CONFIG_MCK_PIN      NRF_DRV_I2S_PIN_NOT_USED
-#define I2S_CONFIG_SDOUT_PIN    24
-#define I2S_CONFIG_SDIN_PIN     25
-#define I2S_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_HIGH
-#define I2S_CONFIG_MASTER       NRF_I2S_MODE_MASTER
-#define I2S_CONFIG_FORMAT       NRF_I2S_FORMAT_I2S
-#define I2S_CONFIG_ALIGN        NRF_I2S_ALIGN_LEFT
-#define I2S_CONFIG_SWIDTH       NRF_I2S_SWIDTH_16BIT
-#define I2S_CONFIG_CHANNELS     NRF_I2S_CHANNELS_STEREO
-#define I2S_CONFIG_MCK_SETUP    NRF_I2S_MCK_32MDIV8
-#define I2S_CONFIG_RATIO        NRF_I2S_RATIO_256X
-#endif
-
-#include "nrf_drv_config_validation.h"
-
-#endif // NRF_DRV_CONFIG_H

nRF5_SDK_11.0.0_89a8197/components/drivers_nrf/config/nrf_drv_config_validation.h

@@ -1,83 +0,0 @@
-/* Copyright (c) 2015 Nordic Semiconductor. All Rights Reserved.
- *
- * The information contained herein is property of Nordic Semiconductor ASA.
- * Terms and conditions of usage are described in detail in NORDIC
- * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
- *
- * Licensees are granted free, non-transferable use of the information. NO
- * WARRANTY of ANY KIND is provided. This heading must NOT be removed from
- * the file.
- *
- */
-
-#ifndef NRF_DRV_CONFIG_VALIDATION_H
-#define NRF_DRV_CONFIG_VALIDATION_H
-
-#ifdef NRF52
-
-#if (!PERIPHERAL_RESOURCE_SHARING_ENABLED) && \
-    ((SPI0_ENABLED + SPIS0_ENABLED + TWI0_ENABLED + TWIS0_ENABLED) > 1)
-#error "Peripherals overlap. SPI0, SPIS0, TWI0, TWIS0 - only one of these can be enabled."
-#endif
-
-#if (!PERIPHERAL_RESOURCE_SHARING_ENABLED) && \
-    ((SPI1_ENABLED + SPIS1_ENABLED + TWI1_ENABLED + TWIS1_ENABLED) > 1)
-#error "Peripherals overlap. SPI1, SPIS1, TWI1, TWIS1 - only one of these can be enabled."
-#endif
-
-#if (!PERIPHERAL_RESOURCE_SHARING_ENABLED) && \
-    ((SPI2_ENABLED + SPIS2_ENABLED) > 1)
-#error "Peripherals overlap. SPI2, SPIS2 - only one of these can be enabled."
-#endif
-
-#if (!PERIPHERAL_RESOURCE_SHARING_ENABLED) && \
-    ((COMP_ENABLED + LPCOMP_ENABLED) > 1)
-#error "COMP and LPCOMP cannot be enabled together. Peripherals overlap."
-#endif
-
-#else //NRF51
-
-#if (TWIS0_ENABLED + TWIS1_ENABLED) > 0
-#error "TWIS not present in nRF51."
-#endif
-
-#if SPIS0_ENABLED > 0
-#error "SPIS0 instance not present in nRF51."
-#endif 
-
-#if (SPI2_ENABLED + SPIS2_ENABLED) > 0
-#error "SPI2/SPIS2 instance not present in nRF51."
-#endif 
-
-#if RTC2_ENABLED
-#error "RTC2 not present in NRF51."
-#endif
-
-#if (TIMER3_ENABLED + TIMER4_ENABLED) > 0
-#error "TIMER3 and TIMER4 not present in nRF51."
-#endif
-
-#if (!PERIPHERAL_RESOURCE_SHARING_ENABLED) && \
-    ((SPI0_ENABLED + TWI0_ENABLED) > 1)
-#error "Peripherals overlap. SPI0, TWI0 - only one of these can be enabled."
-#endif
-
-#if (!PERIPHERAL_RESOURCE_SHARING_ENABLED) && \
-    ((SPI1_ENABLED + SPIS1_ENABLED + TWI1_ENABLED) > 1)
-#error "Peripherals overlap. SPI1, SPIS1, TWI1 - only one of these can be enabled."
-#endif
-
-#if SAADC_ENABLED > 0
-#error "SAADC not present in nRF51."
-#endif
-
-#if I2S_ENABLED > 0
-#error "I2S not present in nRF51."
-#endif
-#if COMP_ENABLED > 0
-#error "COMP not present in nRF51."
-#endif
-
-#endif //NRF51
-
-#endif // NRF_DRV_CONFIG_VALIDATION_H

nRF5_SDK_11.0.0_89a8197/components/drivers_nrf/delay/nrf_delay.c

@@ -1,26 +0,0 @@
-/* Copyright (c) 2012 Nordic Semiconductor. All Rights Reserved.
- *
- * The information contained herein is property of Nordic Semiconductor ASA.
- * Terms and conditions of usage are described in detail in NORDIC
- * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
- *
- * Licensees are granted free, non-transferable use of the information. NO
- * WARRANTY of ANY KIND is provided. This heading must NOT be removed from
- * the file.
- *
- */
- 
-#include <stdio.h> 
-#include "compiler_abstraction.h"
-#include "nrf.h"
-#include "nrf_delay.h"
-
-/*lint --e{438} "Variable not used" */
-void nrf_delay_ms(uint32_t volatile number_of_ms)
-{
-    while(number_of_ms != 0)
-    {
-        number_of_ms--;
-        nrf_delay_us(999);
-    }
-}

nRF5_SDK_11.0.0_89a8197/components/drivers_nrf/delay/nrf_delay.h

@@ -1,22 +1,93 @@
+/**
+ * Copyright (c) 2011 - 2017, Nordic Semiconductor ASA
+ * 
+ * All rights reserved.
+ * 
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ * 
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ *    list of conditions and the following disclaimer.
+ * 
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ *    Semiconductor ASA integrated circuit in a product or a software update for
+ *    such product, must reproduce the above copyright notice, this list of
+ *    conditions and the following disclaimer in the documentation and/or other
+ *    materials provided with the distribution.
+ * 
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ *    contributors may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ * 
+ * 4. This software, with or without modification, must only be used with a
+ *    Nordic Semiconductor ASA integrated circuit.
+ * 
+ * 5. Any software provided in binary form under this license must not be reverse
+ *    engineered, decompiled, modified and/or disassembled.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ */
+
 #ifndef _NRF_DELAY_H
 #define _NRF_DELAY_H
 
 #include "nrf.h"
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define CLOCK_FREQ_16MHz (16000000UL)
+
+#ifdef NRF52_SERIES
+  #define CPU_FREQ_64MHz
+#endif
+
 /**
  * @brief Function for delaying execution for number of microseconds.
  *
  * @note NRF52 has instruction cache and because of that delay is not precise.
  *
- * @param number_of_ms
+ * @param number_of_us
+ *
  */
-/*lint --e{438, 522} "Variable not used" "Function lacks side-effects" */
+/*lint -e{438, 522, 40, 10, 563} */
+__STATIC_INLINE void nrf_delay_us(uint32_t number_of_us);
+
+
+/**
+ * @brief Function for delaying execution for number of miliseconds.
+ *
+ * @note NRF52 has instruction cache and because of that delay is not precise.
+ *
+ * @note Function internally calls @ref nrf_delay_us so the maximum delay is the
+ * same as in case of @ref nrf_delay_us, approx. 71 minutes.
+ *
+ * @param number_of_ms
+ *
+ */
+
+/*lint -e{438, 522, 40, 10, 563} */
+__STATIC_INLINE void nrf_delay_ms(uint32_t number_of_ms);
+
 #if defined ( __CC_ARM   )
-
+__STATIC_INLINE void nrf_delay_us(uint32_t number_of_us)
-static __ASM void __INLINE nrf_delay_us(uint32_t volatile number_of_us)
 {
-loop
+    if (!number_of_us)
-        SUBS    R0, R0, #1
+        return;
+__asm
+    {
+loop:
     NOP
     NOP
     NOP
@@ -25,11 +96,10 @@ loop
     NOP
     NOP
     NOP
+    CMP SystemCoreClock, CLOCK_FREQ_16MHz
+    BEQ cond
     NOP
-        NOP
+#ifdef  CPU_FREQ_64MHz
-        NOP
-        NOP
-#ifdef NRF52
     NOP
     NOP
     NOP
@@ -74,101 +144,36 @@ loop
     NOP
     NOP
     NOP
-#endif
+    NOP
+    NOP
+    NOP
+#endif //CPU_FREQ_64MHz
+cond:
+    SUBS number_of_us, #1
     BNE loop
-        BX     LR
+    }
 }
 
-#elif defined ( __ICCARM__ )
+#elif defined ( _WIN32 ) || defined ( __unix ) || defined( __APPLE__ )
 
-static void __INLINE nrf_delay_us(uint32_t volatile number_of_us)
-{
-__ASM (
-"loop:\n\t"
-       " SUBS R0, R0, #1\n\t"
-       " NOP\n\t"
-       " NOP\n\t"
-       " NOP\n\t"
-       " NOP\n\t"
-       " NOP\n\t"
-       " NOP\n\t"
-       " NOP\n\t"
-       " NOP\n\t"
-       " NOP\n\t"
-       " NOP\n\t"
-       " NOP\n\t"
-       " NOP\n\t"
-#ifdef NRF52
-        " NOP\n\t"
-        " NOP\n\t"
-        " NOP\n\t"
-        " NOP\n\t"
-        " NOP\n\t"
-        " NOP\n\t"
-        " NOP\n\t"
-        " NOP\n\t"
-        " NOP\n\t"
-        " NOP\n\t"
-        " NOP\n\t"
-        " NOP\n\t"
-        " NOP\n\t"
-        " NOP\n\t"
-        " NOP\n\t"
-        " NOP\n\t"
-        " NOP\n\t"
-        " NOP\n\t"
-        " NOP\n\t"
-        " NOP\n\t"
-        " NOP\n\t"
-        " NOP\n\t"
-        " NOP\n\t"
-        " NOP\n\t"
-        " NOP\n\t"
-        " NOP\n\t"
-        " NOP\n\t"
-        " NOP\n\t"
-        " NOP\n\t"
-        " NOP\n\t"
-        " NOP\n\t"
-        " NOP\n\t"
-        " NOP\n\t"
-        " NOP\n\t"
-        " NOP\n\t"
-        " NOP\n\t"
-        " NOP\n\t"
-        " NOP\n\t"
-        " NOP\n\t"
-        " NOP\n\t"
-        " NOP\n\t"
-        " NOP\n\t"
-        " NOP\n\t"
-        " NOP\n\t"
-        " NOP\n\t"
-#endif
-       " BNE.n loop\n\t");
-}
-
-#elif defined ( _WIN32 ) /*|| defined ( __unix )*/ || defined( __APPLE__ )
-
-__STATIC_INLINE void nrf_delay_us(uint32_t volatile number_of_us);
 
 #ifndef CUSTOM_NRF_DELAY_US
-__STATIC_INLINE void nrf_delay_us(uint32_t volatile number_of_us)
+__STATIC_INLINE void nrf_delay_us(uint32_t number_of_us)
 {}
 #endif
 
-#elif defined ( __GNUC__ )
+#elif defined ( __GNUC__ ) || ( __ICCARM__ )
 
-static void __INLINE nrf_delay_us(uint32_t volatile number_of_us) __attribute__((always_inline));
+__STATIC_INLINE void nrf_delay_us(uint32_t number_of_us)
-static void __INLINE nrf_delay_us(uint32_t volatile number_of_us)
+{
+    const uint32_t clock16MHz = CLOCK_FREQ_16MHz;
+    if (number_of_us)
     {
-register uint32_t delay __ASM ("r0") = number_of_us;
 __ASM volatile (
-#ifdef NRF51
+#if ( defined(__GNUC__) && (__CORTEX_M == (0x00U) ) )
     ".syntax unified\n"
 #endif
 "1:\n"
-    " SUBS %0, %0, #1\n"
        " NOP\n"
        " NOP\n"
        " NOP\n"
@@ -177,11 +182,10 @@ __ASM volatile (
        " NOP\n"
        " NOP\n"
        " NOP\n"
+       " CMP %[SystemCoreClock], %[clock16MHz]\n"
+       " BEQ.N 2f\n"
        " NOP\n"
-    " NOP\n"
+#ifdef  CPU_FREQ_64MHz
-    " NOP\n"
-    " NOP\n"
-#ifdef NRF52
        " NOP\n"
        " NOP\n"
        " NOP\n"
@@ -228,15 +232,38 @@ __ASM volatile (
        " NOP\n"
        " NOP\n"
        " NOP\n"
-#endif
+       " NOP\n"
-    " BNE 1b\n"
+#endif //CPU_FREQ_64MHz
-#ifdef NRF51
+"2:\n"
+       " SUBS %[number_of_us], %[number_of_us], #1\n"
+       " BNE.N 1b\n"
+#if ( defined(__GNUC__) && (__CORTEX_M == (0x00U) ) )
     ".syntax divided\n"
 #endif
-    : "+r" (delay));
+#if ( __CORTEX_M == (0x00U) )
+    // The SUBS instruction in Cortex-M0 is available only in 16-bit encoding,
+    // hence it requires a "lo" register (r0-r7) as an operand.
+    : [number_of_us]    "=l"             (number_of_us)
+#else
+    : [number_of_us]    "=r"             (number_of_us)
+#endif
+    : [SystemCoreClock] "r"              (SystemCoreClock),
+      [clock16MHz]      "r"              (clock16MHz),
+                        "[number_of_us]" (number_of_us)
+    : "cc"
+    );
+    }
 }
 #endif
 
-void nrf_delay_ms(uint32_t volatile number_of_ms);
+__STATIC_INLINE void nrf_delay_ms(uint32_t number_of_ms)
+{
+    nrf_delay_us(1000*number_of_ms);
+}
+
+
+#ifdef __cplusplus
+}
+#endif
 
 #endif

nRF5_SDK_11.0.0_89a8197/components/drivers_nrf/hal/nrf_adc.c

@@ -1,78 +0,0 @@
-/* Copyright (c) 2014 Nordic Semiconductor. All Rights Reserved.
- *
- * The information contained herein is property of Nordic Semiconductor ASA.
- * Terms and conditions of usage are described in detail in NORDIC
- * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
- *
- * Licensees are granted free, non-transferable use of the information. NO
- * WARRANTY of ANY KIND is provided. This heading must NOT be removed from
- * the file.
- *
- */
-
-/**
- * @file
- * @brief ADC HAL implementation
- */
-
-#include "nrf_adc.h"
-
-#ifndef NRF52
-
-/**
- * @brief Function for configuring ADC.
- *
- * This function powers on ADC and configures it. ADC is in DISABLE state after configuration,
- * so it should be enabled before using it.
- *
- * @param[in] config  Requested configuration.
- */
-void nrf_adc_configure(nrf_adc_config_t * config)
-{
-    uint32_t config_reg = 0;
-
-    config_reg |= ((uint32_t)config->resolution << ADC_CONFIG_RES_Pos) & ADC_CONFIG_RES_Msk;
-    config_reg |= ((uint32_t)config->scaling << ADC_CONFIG_INPSEL_Pos) & ADC_CONFIG_INPSEL_Msk;
-    config_reg |= ((uint32_t)config->reference << ADC_CONFIG_REFSEL_Pos) & ADC_CONFIG_REFSEL_Msk;
-
-    if (config->reference & ADC_CONFIG_EXTREFSEL_Msk)
-    {
-        config_reg |= config->reference & ADC_CONFIG_EXTREFSEL_Msk;
-    }
-
-    /* select input */
-    nrf_adc_input_select(NRF_ADC_CONFIG_INPUT_DISABLED);
-
-    /* set new configuration keeping selected input */
-    NRF_ADC->CONFIG = config_reg | (NRF_ADC->CONFIG & ADC_CONFIG_PSEL_Msk);
-}
-
-
-/**
- * @brief Blocking function for executing single ADC conversion.
- *
- * This function selects the desired input, starts a single conversion,
- * waits for it to finish, and returns the result.
- * ADC is left in STOP state, the given input is selected.
- * This function does not check if ADC is initialized and powered.
- *
- * @param[in] input Requested input to be selected.
- *
- * @return Conversion result
- */
-int32_t nrf_adc_convert_single(nrf_adc_config_input_t input)
-{
-    int32_t val;
-
-    nrf_adc_input_select(input);
-    nrf_adc_start();
-
-    while (!nrf_adc_conversion_finished())
-    {
-    }
-    nrf_adc_conversion_event_clean();
-    val = nrf_adc_result_get();
-    nrf_adc_stop();
-    return val;
-}
-#endif

nRF5_SDK_11.0.0_89a8197/components/drivers_nrf/hal/nrf_adc.h

@@ -1,416 +0,0 @@
-/* Copyright (c) 2014 Nordic Semiconductor. All Rights Reserved.
- *
- * The information contained herein is property of Nordic Semiconductor ASA.
- * Terms and conditions of usage are described in detail in NORDIC
- * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
- *
- * Licensees are granted free, non-transferable use of the information. NO
- * WARRANTY of ANY KIND is provided. This heading must NOT be removed from
- * the file.
- *
- */
-
-#ifndef NRF_ADC_H_
-#define NRF_ADC_H_
-
-/**
- * @defgroup nrf_adc_hal ADC HAL
- * @{
- * @ingroup nrf_adc
- * @brief @tagAPI51 Hardware access layer for managing the analog-to-digital converter (ADC).
- */
-
-#include <stdbool.h>
-#include <stddef.h>
-
-#include "nrf.h"
-
-#ifndef NRF52
-/**
- * @enum  nrf_adc_config_resolution_t
- * @brief Resolution of the analog-to-digital converter.
- */
-
-/**
- * @brief ADC interrupts.
- */
-typedef enum
-{
-    NRF_ADC_INT_END_MASK  = ADC_INTENSET_END_Msk,   /**< ADC interrupt on END event. */
-} nrf_adc_int_mask_t;
-
-typedef enum
-{
-    NRF_ADC_CONFIG_RES_8BIT  = ADC_CONFIG_RES_8bit,  /**< 8 bit resolution. */
-    NRF_ADC_CONFIG_RES_9BIT  = ADC_CONFIG_RES_9bit,  /**< 9 bit resolution. */
-    NRF_ADC_CONFIG_RES_10BIT = ADC_CONFIG_RES_10bit, /**< 10 bit resolution. */
-} nrf_adc_config_resolution_t;
-
-
-/**
- * @enum nrf_adc_config_scaling_t
- * @brief Scaling factor of the analog-to-digital conversion.
- */
-typedef enum
-{
-    NRF_ADC_CONFIG_SCALING_INPUT_FULL_SCALE  = ADC_CONFIG_INPSEL_AnalogInputNoPrescaling,        /**< Full scale input. */
-    NRF_ADC_CONFIG_SCALING_INPUT_TWO_THIRDS  = ADC_CONFIG_INPSEL_AnalogInputTwoThirdsPrescaling, /**< 2/3 scale input. */
-    NRF_ADC_CONFIG_SCALING_INPUT_ONE_THIRD   = ADC_CONFIG_INPSEL_AnalogInputOneThirdPrescaling,  /**< 1/3 scale input. */
-    NRF_ADC_CONFIG_SCALING_SUPPLY_TWO_THIRDS = ADC_CONFIG_INPSEL_SupplyTwoThirdsPrescaling,      /**< 2/3 of supply. */
-    NRF_ADC_CONFIG_SCALING_SUPPLY_ONE_THIRD  = ADC_CONFIG_INPSEL_SupplyOneThirdPrescaling        /**< 1/3 of supply. */
-} nrf_adc_config_scaling_t;
-
-/**
- * @enum nrf_adc_config_reference_t
- * @brief Reference selection of the analog-to-digital converter.
- */
-typedef enum
-{
-    NRF_ADC_CONFIG_REF_VBG              = ADC_CONFIG_REFSEL_VBG,                      /**< 1.2 V reference. */
-    NRF_ADC_CONFIG_REF_SUPPLY_ONE_HALF  = ADC_CONFIG_REFSEL_SupplyOneHalfPrescaling,  /**< 1/2 of power supply. */
-    NRF_ADC_CONFIG_REF_SUPPLY_ONE_THIRD = ADC_CONFIG_REFSEL_SupplyOneThirdPrescaling, /**< 1/3 of power supply. */
-    NRF_ADC_CONFIG_REF_EXT_REF0         = ADC_CONFIG_REFSEL_External |
-                                          ADC_CONFIG_EXTREFSEL_AnalogReference0 <<
-    ADC_CONFIG_EXTREFSEL_Pos, /**< External reference 0. */
-        NRF_ADC_CONFIG_REF_EXT_REF1 = ADC_CONFIG_REFSEL_External |
-                                  ADC_CONFIG_EXTREFSEL_AnalogReference1 << ADC_CONFIG_EXTREFSEL_Pos, /**< External reference 0. */
-} nrf_adc_config_reference_t;
-
-/**
- * @enum nrf_adc_config_input_t
- * @brief Input selection of the analog-to-digital converter.
- */
-typedef enum
-{
-    NRF_ADC_CONFIG_INPUT_DISABLED = ADC_CONFIG_PSEL_Disabled,     /**< No input selected. */
-    NRF_ADC_CONFIG_INPUT_0        = ADC_CONFIG_PSEL_AnalogInput0, /**< Input 0. */
-    NRF_ADC_CONFIG_INPUT_1        = ADC_CONFIG_PSEL_AnalogInput1, /**< Input 1. */
-    NRF_ADC_CONFIG_INPUT_2        = ADC_CONFIG_PSEL_AnalogInput2, /**< Input 2. */
-    NRF_ADC_CONFIG_INPUT_3        = ADC_CONFIG_PSEL_AnalogInput3, /**< Input 3. */
-    NRF_ADC_CONFIG_INPUT_4        = ADC_CONFIG_PSEL_AnalogInput4, /**< Input 4. */
-    NRF_ADC_CONFIG_INPUT_5        = ADC_CONFIG_PSEL_AnalogInput5, /**< Input 5. */
-    NRF_ADC_CONFIG_INPUT_6        = ADC_CONFIG_PSEL_AnalogInput6, /**< Input 6. */
-    NRF_ADC_CONFIG_INPUT_7        = ADC_CONFIG_PSEL_AnalogInput7, /**< Input 7. */
-} nrf_adc_config_input_t;
-
-/**
- * @enum nrf_adc_task_t
- * @brief Analog-to-digital converter tasks.
- */
-typedef enum
-{
-    /*lint -save -e30*/
-    NRF_ADC_TASK_START = offsetof(NRF_ADC_Type, TASKS_START), /**< ADC start sampling task. */
-    NRF_ADC_TASK_STOP  = offsetof(NRF_ADC_Type, TASKS_STOP)   /**< ADC stop sampling task. */
-    /*lint -restore*/
-} nrf_adc_task_t;
-
-/**
- * @enum nrf_adc_event_t
- * @brief Analog-to-digital converter events.
- */
-typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */
-{
-    /*lint -save -e30*/
-    NRF_ADC_EVENT_END = offsetof(NRF_ADC_Type, EVENTS_END) /**< End of conversion event. */
-    /*lint -restore*/
-} nrf_adc_event_t;
-
-/**@brief Analog-to-digital converter configuration. */
-typedef struct
-{
-    nrf_adc_config_resolution_t resolution; /**< ADC resolution. */
-    nrf_adc_config_scaling_t    scaling;    /**< ADC scaling factor. */
-    nrf_adc_config_reference_t  reference;  /**< ADC reference. */
-} nrf_adc_config_t;
-
-/** Default ADC configuration. */
-#define NRF_ADC_CONFIG_DEFAULT { NRF_ADC_CONFIG_RES_10BIT,               \
-                                 NRF_ADC_CONFIG_SCALING_INPUT_ONE_THIRD, \
-                                 NRF_ADC_CONFIG_REF_VBG }
-
-/**
- * @brief Function for configuring ADC.
- *
- * This function powers on the analog-to-digital converter and configures it. 
- * After the configuration, the ADC is in DISABLE state and must be
- * enabled before using it.
- *
- * @param[in] config Configuration parameters.
- */
-void nrf_adc_configure(nrf_adc_config_t * config);
-
-/**
- * @brief Blocking function for executing a single ADC conversion.
- *
- * This function selects the desired input, starts a single conversion,
- * waits for it to finish, and returns the result.
- * After the input is selected, the analog-to-digital converter
- * is left in STOP state.
- * The function does not check if the ADC is initialized and powered.
- *
- * @param[in] input Input to be selected.
- *
- * @return Conversion result.
- */
-int32_t nrf_adc_convert_single(nrf_adc_config_input_t input);
-
-/**
- * @brief Function for selecting ADC input.
- *
- * This function selects the active input of ADC. Ensure that
- * the ADC is powered on and in IDLE state before calling this function.
- *
- * @param[in] input Input to be selected.
- */
-__STATIC_INLINE void nrf_adc_input_select(nrf_adc_config_input_t input)
-{
-    NRF_ADC->CONFIG =
-        ((uint32_t)input << ADC_CONFIG_PSEL_Pos) | (NRF_ADC->CONFIG & ~ADC_CONFIG_PSEL_Msk);
-
-    if (input != NRF_ADC_CONFIG_INPUT_DISABLED)
-    {
-        NRF_ADC->ENABLE = ADC_ENABLE_ENABLE_Enabled << ADC_ENABLE_ENABLE_Pos;
-    }
-    else
-    {
-        NRF_ADC->ENABLE = ADC_ENABLE_ENABLE_Disabled << ADC_ENABLE_ENABLE_Pos;
-    }
-}
-
-
-/**
- * @brief Function for retrieving the ADC conversion result.
- *
- * This function retrieves and returns the last analog-to-digital conversion result.
- *
- * @return Last conversion result.
- */
-__STATIC_INLINE int32_t nrf_adc_result_get(void)
-{
-    return (int32_t)NRF_ADC->RESULT;
-}
-
-
-/**
- * @brief Function for checking whether the ADC is busy.
- *
- * This function checks whether the analog-to-digital converter is busy with a conversion.
- *
- * @retval true If the ADC is busy.
- * @retval false If the ADC is not busy.
- */
-__STATIC_INLINE bool nrf_adc_is_busy(void)
-{
-    return ( (NRF_ADC->BUSY & ADC_BUSY_BUSY_Msk) == ADC_BUSY_BUSY_Msk);
-}
-
-/**
- * @brief Function for getting the ADC's enabled interrupts.
- *
- * @param[in] mask Mask of interrupts to check.
- *
- * @return State of the interrupts selected by the mask.
- *
- * @sa nrf_adc_int_enable()
- * @sa nrf_adc_int_disable()
- */
-__STATIC_INLINE uint32_t nrf_adc_int_get(uint32_t mask)
-{
-    return (NRF_ADC->INTENSET & mask); // when read this register will return the value of INTEN.
-}
-
-
-/**
- * @brief Function for starting conversion.
- *
- * @sa nrf_adc_stop()
- *
- */
-__STATIC_INLINE void nrf_adc_start(void)
-{
-    NRF_ADC->TASKS_START = 1;
-}
-
-
-/**
- * @brief Function for stopping conversion. 
- *
- * If the analog-to-digital converter is in inactive state, power consumption is reduced.
- *
- * @sa nrf_adc_start()
- *
- */
-__STATIC_INLINE void nrf_adc_stop(void)
-{
-    NRF_ADC->TASKS_STOP = 1;
-}
-
-
-/**
- * @brief Function for checking if the requested ADC conversion has ended.
- *
- * @retval true If the task has finished.
- * @retval false If the task is still running.
- */
-__STATIC_INLINE bool nrf_adc_conversion_finished(void)
-{
-    return ((bool)NRF_ADC->EVENTS_END);
-}
-
-/**
- * @brief Function for clearing the conversion END event.
- */
-__STATIC_INLINE void nrf_adc_conversion_event_clean(void)
-{
-    NRF_ADC->EVENTS_END = 0;
-}
-
-/**
- * @brief Function for getting the address of an ADC task register.
- *
- * @param[in] adc_task ADC task.
- *
- * @return Address of the specified ADC task.
- */
-__STATIC_INLINE uint32_t nrf_adc_task_address_get(nrf_adc_task_t adc_task);
-
-/**
- * @brief Function for getting the address of a specific ADC event register.
- *
- * @param[in] adc_event ADC event.
- *
- * @return Address of the specified ADC event.
- */
-__STATIC_INLINE uint32_t nrf_adc_event_address_get(nrf_adc_event_t adc_event);
-
-/**
- * @brief Function for setting the CONFIG register in ADC.
- *
- * @param[in] configuration Value to be written to the CONFIG register.
- */
-__STATIC_INLINE void nrf_adc_config_set(uint32_t configuration);
-
-/**
- * @brief Function for clearing an ADC event.
- *
- * @param[in] event Event to clear.
- */
-__STATIC_INLINE void nrf_adc_event_clear(nrf_adc_event_t event);
-
-/**
- * @brief Function for checking state of an ADC event.
- *
- * @param[in] event Event to check.
- *
- * @retval true  If the event is set.
- * @retval false If the event is not set.
- */
-__STATIC_INLINE bool nrf_adc_event_check(nrf_adc_event_t event);
-
-/**
- * @brief Function for enabling specified interrupts.
- *
- * @param[in] int_mask  Interrupts to enable.
- */
-__STATIC_INLINE void nrf_adc_int_enable(uint32_t int_mask);
-
-/**
- * @brief Function for disabling specified interrupts.
- *
- * @param[in] int_mask  Interrupts to disable.
- */
-__STATIC_INLINE void nrf_adc_int_disable(uint32_t int_mask);
-
-/**
- * @brief Function for retrieving the state of a given interrupt.
- *
- * @param[in] int_mask Interrupt to check.
- *
- * @retval true  If the interrupt is enabled.
- * @retval false If the interrupt is not enabled.
- */
-__STATIC_INLINE bool nrf_adc_int_enable_check(nrf_adc_int_mask_t int_mask);
-
-/**
- * @brief Function for activating a specific ADC task.
- *
- * @param[in] task Task to activate.
- */
-__STATIC_INLINE void nrf_adc_task_trigger(nrf_adc_task_t task);
-
-/**
- * @brief Function for enabling ADC.
- *
- */
-__STATIC_INLINE void nrf_adc_enable(void);
-
-/**
- * @brief Function for disabling ADC.
- *
- */
-__STATIC_INLINE void nrf_adc_disable(void);
-
-#ifndef SUPPRESS_INLINE_IMPLEMENTATION
-
-__STATIC_INLINE uint32_t nrf_adc_task_address_get(nrf_adc_task_t adc_task)
-{
-    return (uint32_t)((uint8_t *)NRF_ADC + adc_task);
-}
-
-__STATIC_INLINE uint32_t nrf_adc_event_address_get(nrf_adc_event_t adc_event)
-{
-    return (uint32_t)((uint8_t *)NRF_ADC + adc_event);
-}
-
-__STATIC_INLINE void nrf_adc_config_set(uint32_t configuration)
-{
-    NRF_ADC->CONFIG = configuration;
-}
-
-__STATIC_INLINE void nrf_adc_event_clear(nrf_adc_event_t event)
-{
-    *((volatile uint32_t *)((uint8_t *)NRF_ADC + (uint32_t)event)) = 0x0UL;
-}
-
-__STATIC_INLINE bool nrf_adc_event_check(nrf_adc_event_t event)
-{
-    return (bool)*(volatile uint32_t *)((uint8_t *)NRF_ADC + (uint32_t)event);
-}
-
-__STATIC_INLINE void nrf_adc_int_enable(uint32_t int_mask)
-{
-    NRF_ADC->INTENSET = int_mask;
-}
-
-__STATIC_INLINE void nrf_adc_int_disable(uint32_t int_mask)
-{
-    NRF_ADC->INTENCLR = int_mask;
-}
-
-__STATIC_INLINE bool nrf_adc_int_enable_check(nrf_adc_int_mask_t int_mask)
-{
-    return (bool)(NRF_ADC->INTENSET & int_mask);
-}
-
-__STATIC_INLINE void nrf_adc_task_trigger(nrf_adc_task_t task)
-{
-    *((volatile uint32_t *)((uint8_t *)NRF_ADC + (uint32_t)task)) = 0x1UL;
-}
-
-__STATIC_INLINE void nrf_adc_enable(void)
-{
-    NRF_ADC->ENABLE = 1;
-}
-
-__STATIC_INLINE void nrf_adc_disable(void)
-{
-    NRF_ADC->ENABLE = 0;
-}
-#endif
-#endif /* NRF52 */
-/**
- *@}
- **/
-
-#endif /* NRF_ADC_H_ */

nRF5_SDK_11.0.0_89a8197/components/drivers_nrf/hal/nrf_clock.h

@@ -1,15 +1,42 @@
-/* Copyright (c) 2015 Nordic Semiconductor. All Rights Reserved.
+/**
+ * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
  * 
- * The information contained herein is property of Nordic Semiconductor ASA.
+ * All rights reserved.
- * Terms and conditions of usage are described in detail in NORDIC
- * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
  * 
- * Licensees are granted free, non-transferable use of the information. NO
+ * Redistribution and use in source and binary forms, with or without modification,
- * WARRANTY of ANY KIND is provided. This heading must NOT be removed from
+ * are permitted provided that the following conditions are met:
- * the file.
+ * 
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ *    list of conditions and the following disclaimer.
+ * 
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ *    Semiconductor ASA integrated circuit in a product or a software update for
+ *    such product, must reproduce the above copyright notice, this list of
+ *    conditions and the following disclaimer in the documentation and/or other
+ *    materials provided with the distribution.
+ * 
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ *    contributors may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ * 
+ * 4. This software, with or without modification, must only be used with a
+ *    Nordic Semiconductor ASA integrated circuit.
+ * 
+ * 5. Any software provided in binary form under this license must not be reverse
+ *    engineered, decompiled, modified and/or disassembled.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  * 
  */
-
 #ifndef NRF_CLOCK_H__
 #define NRF_CLOCK_H__
 
@@ -18,6 +45,10 @@
 
 #include "nrf.h"
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 /**
  * @defgroup nrf_clock_hal Clock HAL
  * @{
@@ -58,20 +89,6 @@ typedef enum
     NRF_CLOCK_START_TASK_TRIGGERED     = CLOCK_LFCLKRUN_STATUS_Triggered     /**< Task LFCLKSTART/HFCLKSTART has been triggered. */
 } nrf_clock_start_task_status_t;
 
-/**
- * @brief Crystal frequency selection.
- */
-typedef enum
-{
-#ifdef NRF51
-    NRF_CLOCK_XTALFREQ_Default = CLOCK_XTALFREQ_XTALFREQ_16MHz, /**< Default. 32 MHz. */
-    NRF_CLOCK_XTALFREQ_16MHz   = CLOCK_XTALFREQ_XTALFREQ_16MHz, /**< 16 MHz crystal. */
-    NRF_CLOCK_XTALFREQ_32MHz   = CLOCK_XTALFREQ_XTALFREQ_32MHz  /**< 32 MHz crystal. */
-#elif defined NRF52
-    NRF_CLOCK_XTALFREQ_Default,                                 /**< Default. 64MHz. */
-#endif
-} nrf_clock_xtalfreq_t;
-
 /**
  * @brief Interrupts.
  */
@@ -257,21 +274,6 @@ __STATIC_INLINE bool nrf_clock_hf_is_running(nrf_clock_hfclk_t clk_src);
  */
 __STATIC_INLINE nrf_clock_start_task_status_t nrf_clock_hf_start_task_status_get(void);
 
-/**
- * @brief Function for retrieving the frequency selection of the external crystal.
- *
- * @retval     NRF_CLOCK_XTALFREQ_16MHz     If a 16 MHz crystal is used as source for the HFCLK oscillator.
- * @retval     NRF_CLOCK_XTALFREQ_32MHz     If a 32 MHz crystal is used as source for the HFCLK oscillator.
- */
-__STATIC_INLINE nrf_clock_xtalfreq_t nrf_clock_xtalfreq_get(void);
-
-/**
- * @brief Function for changing the frequency selection of the external crystal.
- *
- * @param[in]  xtalfreq             New frequency selection for the external crystal.
- */
-__STATIC_INLINE void nrf_clock_xtalfreq_set(nrf_clock_xtalfreq_t xtalfreq);
-
 /**
  * @brief Function for changing the calibration timer interval.
  *
@@ -381,26 +383,6 @@ __STATIC_INLINE nrf_clock_start_task_status_t nrf_clock_hf_start_task_status_get
                                            CLOCK_HFCLKRUN_STATUS_Pos);
 }
 
-__STATIC_INLINE nrf_clock_xtalfreq_t nrf_clock_xtalfreq_get(void)
-{
-#ifdef NRF51
-    return (nrf_clock_xtalfreq_t)((NRF_CLOCK->XTALFREQ &
-                                       CLOCK_XTALFREQ_XTALFREQ_Msk) >> CLOCK_XTALFREQ_XTALFREQ_Pos);
-#elif defined NRF52
-    return NRF_CLOCK_XTALFREQ_Default;
-#endif
-}
-
-__STATIC_INLINE void nrf_clock_xtalfreq_set(nrf_clock_xtalfreq_t xtalfreq)
-{
-#ifdef NRF51
-    NRF_CLOCK->XTALFREQ =
-        (uint32_t)((xtalfreq << CLOCK_XTALFREQ_XTALFREQ_Pos) & CLOCK_XTALFREQ_XTALFREQ_Msk);
-#elif defined NRF52
-    return;
-#endif
-}
-
 __STATIC_INLINE void nrf_clock_cal_timer_timeout_set(uint32_t interval)
 {
     NRF_CLOCK->CTIV = ((interval << CLOCK_CTIV_CTIV_Pos) & CLOCK_CTIV_CTIV_Msk);
@@ -411,4 +393,9 @@ __STATIC_INLINE void nrf_clock_cal_timer_timeout_set(uint32_t interval)
 /**
  *@}
  **/
+
+#ifdef __cplusplus
+}
+#endif
+
 #endif // NRF_CLOCK_H__

nRF5_SDK_11.0.0_89a8197/components/drivers_nrf/hal/nrf_comp.h

@@ -1,15 +1,42 @@
-/* Copyright (c) 2015 Nordic Semiconductor. All Rights Reserved.
+/**
+ * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
  * 
- * The information contained herein is property of Nordic Semiconductor ASA.
+ * All rights reserved.
- * Terms and conditions of usage are described in detail in NORDIC
- * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
  * 
- * Licensees are granted free, non-transferable use of the information. NO
+ * Redistribution and use in source and binary forms, with or without modification,
- * WARRANTY of ANY KIND is provided. This heading must NOT be removed from
+ * are permitted provided that the following conditions are met:
- * the file.
+ * 
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ *    list of conditions and the following disclaimer.
+ * 
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ *    Semiconductor ASA integrated circuit in a product or a software update for
+ *    such product, must reproduce the above copyright notice, this list of
+ *    conditions and the following disclaimer in the documentation and/or other
+ *    materials provided with the distribution.
+ * 
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ *    contributors may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ * 
+ * 4. This software, with or without modification, must only be used with a
+ *    Nordic Semiconductor ASA integrated circuit.
+ * 
+ * 5. Any software provided in binary form under this license must not be reverse
+ *    engineered, decompiled, modified and/or disassembled.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  * 
  */
-
 /**
  * @file
  * @brief COMP HAL API.
@@ -31,6 +58,10 @@
 #include <stddef.h>
 #include <stdint.h>
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 /**
  * @enum nrf_comp_input_t
  * @brief COMP analog pin selection.
@@ -44,7 +75,12 @@ typedef enum
     NRF_COMP_INPUT_4 = COMP_PSEL_PSEL_AnalogInput4,        /*!< AIN4 selected as analog input. */
     NRF_COMP_INPUT_5 = COMP_PSEL_PSEL_AnalogInput5,        /*!< AIN5 selected as analog input. */
     NRF_COMP_INPUT_6 = COMP_PSEL_PSEL_AnalogInput6,        /*!< AIN6 selected as analog input. */
-	NRF_COMP_INPUT_7 = COMP_PSEL_PSEL_AnalogInput7		/*!< AIN7 selected as analog input. */
+#if defined (COMP_PSEL_PSEL_AnalogInput7) || defined (__SDK_DOXYGEN__)
+    NRF_COMP_INPUT_7 = COMP_PSEL_PSEL_AnalogInput7,        /*!< AIN7 selected as analog input. */
+#endif
+#if defined (COMP_PSEL_PSEL_VddDiv2) || defined (__SDK_DOXYGEN__)
+    NRF_COMP_VDD_DIV2 = COMP_PSEL_PSEL_VddDiv2,            /*!< VDD/2 selected as analog input. */
+#endif
 }nrf_comp_input_t;
 
 /**
@@ -110,6 +146,7 @@ typedef enum
     NRF_COMP_HYST_50mV = COMP_HYST_HYST_Hyst50mV     /*!< Comparator hysteresis enabled. */
 }nrf_comp_hyst_t;
 
+#if defined (COMP_ISOURCE_ISOURCE_Msk)
 /**
  * @brief COMP current source selection on analog input.
  */
@@ -120,6 +157,7 @@ typedef enum
     NRF_COMP_ISOURCE_Ien5uA = COMP_ISOURCE_ISOURCE_Ien5mA,      /*!< Current source enabled (+/- 5 uA). */
     NRF_COMP_ISOURCE_Ien10uA = COMP_ISOURCE_ISOURCE_Ien10mA     /*!< Current source enabled (+/- 10 uA). */
 }nrf_isource_t;
+#endif
 
 /**
  * @enum nrf_comp_task_t
@@ -225,14 +263,14 @@ __STATIC_INLINE void nrf_comp_speed_mode_set(nrf_comp_sp_mode_t speed_mode);
  */
 __STATIC_INLINE void nrf_comp_hysteresis_set(nrf_comp_hyst_t hyst);
 
-
+#if defined (COMP_ISOURCE_ISOURCE_Msk)
 /**
  * @brief Function for setting the current source on the analog input.
  *
  * @param[in] isource                   COMP current source selection on analog input.
  */
 __STATIC_INLINE void nrf_comp_isource_set(nrf_isource_t isource);
-
+#endif
 
 /**
  * @brief Function for selecting the active input of the COMP.
@@ -395,10 +433,12 @@ __STATIC_INLINE void nrf_comp_hysteresis_set(nrf_comp_hyst_t hyst)
     NRF_COMP->HYST = (hyst << COMP_HYST_HYST_Pos) & COMP_HYST_HYST_Msk;
 }
 
+#if defined (COMP_ISOURCE_ISOURCE_Msk)
 __STATIC_INLINE void nrf_comp_isource_set(nrf_isource_t isource)
 {
     NRF_COMP->ISOURCE = (isource << COMP_ISOURCE_ISOURCE_Pos) & COMP_ISOURCE_ISOURCE_Msk;
 }
+#endif
 
 __STATIC_INLINE void nrf_comp_input_select(nrf_comp_input_t input)
 {
@@ -453,6 +493,10 @@ __STATIC_INLINE void nrf_comp_task_trigger(nrf_comp_task_t comp_task)
 __STATIC_INLINE void nrf_comp_event_clear(nrf_comp_event_t comp_event)
 {
     *( (volatile uint32_t *)( (uint8_t *)NRF_COMP + (uint32_t)comp_event) ) = 0;
+#if __CORTEX_M == 0x04
+    volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)NRF_COMP + (uint32_t)comp_event));
+    (void)dummy;
+#endif
 }
 
 __STATIC_INLINE bool nrf_comp_event_check(nrf_comp_event_t comp_event)
@@ -466,4 +510,9 @@ __STATIC_INLINE bool nrf_comp_event_check(nrf_comp_event_t comp_event)
  *@}
  **/
 
+
+#ifdef __cplusplus
+}
+#endif
+
 #endif // NRF_COMP_H_

nRF5_SDK_11.0.0_89a8197/components/drivers_nrf/hal/nrf_ecb.c

@@ -1,16 +1,42 @@
-/* Copyright (c) 2012 Nordic Semiconductor. All Rights Reserved.
+/**
+ * Copyright (c) 2012 - 2017, Nordic Semiconductor ASA
  * 
-* The information contained herein is property of Nordic Semiconductor ASA.
+ * All rights reserved.
-* Terms and conditions of usage are described in detail in NORDIC
-* SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT. 
  * 
-* Licensees are granted free, non-transferable use of the information. NO
+ * Redistribution and use in source and binary forms, with or without modification,
-* WARRANTY of ANY KIND is provided. This heading must NOT be removed from
+ * are permitted provided that the following conditions are met:
-* the file.
+ * 
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ *    list of conditions and the following disclaimer.
+ * 
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ *    Semiconductor ASA integrated circuit in a product or a software update for
+ *    such product, must reproduce the above copyright notice, this list of
+ *    conditions and the following disclaimer in the documentation and/or other
+ *    materials provided with the distribution.
+ * 
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ *    contributors may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ * 
+ * 4. This software, with or without modification, must only be used with a
+ *    Nordic Semiconductor ASA integrated circuit.
+ * 
+ * 5. Any software provided in binary form under this license must not be reverse
+ *    engineered, decompiled, modified and/or disassembled.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  * 
-* $LastChangedRevision: 25419 $
  */
-
 /**
  * @file
  * @brief Implementation of AES ECB driver

nRF5_SDK_11.0.0_89a8197/components/drivers_nrf/hal/nrf_ecb.h

@@ -1,16 +1,42 @@
-/* Copyright (c) 2012 Nordic Semiconductor. All Rights Reserved.
+/**
+ * Copyright (c) 2012 - 2017, Nordic Semiconductor ASA
  * 
- * The information contained herein is confidential property of Nordic 
+ * All rights reserved.
- * Semiconductor ASA.Terms and conditions of usage are described in detail 
- * in NORDIC SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT. 
  * 
- * Licensees are granted free, non-transferable use of the information. NO
+ * Redistribution and use in source and binary forms, with or without modification,
- * WARRANTY of ANY KIND is provided. This heading must NOT be removed from
+ * are permitted provided that the following conditions are met:
- * the file.
+ * 
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ *    list of conditions and the following disclaimer.
+ * 
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ *    Semiconductor ASA integrated circuit in a product or a software update for
+ *    such product, must reproduce the above copyright notice, this list of
+ *    conditions and the following disclaimer in the documentation and/or other
+ *    materials provided with the distribution.
+ * 
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ *    contributors may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ * 
+ * 4. This software, with or without modification, must only be used with a
+ *    Nordic Semiconductor ASA integrated circuit.
+ * 
+ * 5. Any software provided in binary form under this license must not be reverse
+ *    engineered, decompiled, modified and/or disassembled.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  * 
- * $LastChangedRevision: 13999 $
  */
-
 /**
  * @file
  * @brief ECB driver API.
@@ -25,12 +51,16 @@
  * @ingroup nrf_drivers
  * @brief Driver for the AES Electronic Code Book (ECB) peripheral.
  *
- * To encrypt and decrypt data, the peripheral must first be powered on
+ * To encrypt data, the peripheral must first be powered on
  * using @ref nrf_ecb_init. Next, the key must be set using @ref nrf_ecb_set_key.
  */
 
 #include <stdint.h>
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 /**
  * @brief Function for initializing and powering on the ECB peripheral.
  *
@@ -41,13 +71,13 @@
 bool nrf_ecb_init(void);
 
 /**
- * @brief Function for encrypting and decrypting 16-byte data using current key.
+ * @brief Function for encrypting 16-byte data using current key.
  *
  * This function avoids unnecessary copying of data if the parameters point to the
  * correct locations in the ECB data structure.
  *
- * @param dst Result of encryption/decryption. 16 bytes will be written. 
+ * @param dst Result of encryption, 16 bytes will be written.
- * @param src Source with 16-byte data to be encrypted/decrypted.
+ * @param src Source with 16-byte data to be encrypted.
  *
  * @retval true  If the encryption operation completed.
  * @retval false If the encryption operation did not complete.
@@ -55,12 +85,17 @@ bool nrf_ecb_init(void);
 bool nrf_ecb_crypt(uint8_t * dst, const uint8_t * src);
 
 /**
- * @brief Function for setting the key to be used for encryption and decryption.
+ * @brief Function for setting the key to be used for encryption.
  *
  * @param key Pointer to the key. 16 bytes will be read.
  */
 void nrf_ecb_set_key(const uint8_t * key);
 
+
+#ifdef __cplusplus
+}
+#endif
+
 #endif  // NRF_ECB_H__
 
 /** @} */

nRF5_SDK_11.0.0_89a8197/components/drivers_nrf/hal/nrf_egu.h

@@ -1,22 +1,45 @@
-/* Copyright (c) 2015 Nordic Semiconductor. All Rights Reserved.
+/**
+ * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
  * 
- * The information contained herein is property of Nordic Semiconductor ASA.
+ * All rights reserved.
- * Terms and conditions of usage are described in detail in NORDIC
- * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
  * 
- * Licensees are granted free, non-transferable use of the information. NO
+ * Redistribution and use in source and binary forms, with or without modification,
- * WARRANTY of ANY KIND is provided. This heading must NOT be removed from
+ * are permitted provided that the following conditions are met:
- * the file.
+ * 
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ *    list of conditions and the following disclaimer.
+ * 
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ *    Semiconductor ASA integrated circuit in a product or a software update for
+ *    such product, must reproduce the above copyright notice, this list of
+ *    conditions and the following disclaimer in the documentation and/or other
+ *    materials provided with the distribution.
+ * 
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ *    contributors may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ * 
+ * 4. This software, with or without modification, must only be used with a
+ *    Nordic Semiconductor ASA integrated circuit.
+ * 
+ * 5. Any software provided in binary form under this license must not be reverse
+ *    engineered, decompiled, modified and/or disassembled.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  * 
  */
-
 #ifndef NRF_EGU_H__
 #define NRF_EGU_H__
 
-#ifndef NRF52
-    #error EGU is not supported on your chip.
-#endif
-
 /**
 * @defgroup nrf_egu EGU (Event Generator Unit) abstraction
 * @{
@@ -30,9 +53,11 @@
 #include <stdint.h>
 #include "nrf_assert.h"
 #include "nrf.h"
+#include "nrf_peripherals.h"
 
-#define NRF_EGU_COUNT           6   /**< Number of EGU instances. */
+#ifdef __cplusplus
-#define NRF_EGU_CHANNEL_COUNT   16  /**< Number of channels per EGU instance. */
+extern "C" {
+#endif
 
 /**
  * @enum  nrf_egu_task_t
@@ -113,6 +138,36 @@ typedef enum
     NRF_EGU_INT_ALL         = 0xFFFFuL
 } nrf_egu_int_mask_t;
 
+/**@brief Function for getting max channel number of given EGU.
+ *
+ * @param NRF_EGUx EGU instance.
+ *
+ * @returns number of available channels.
+ */
+__STATIC_INLINE uint32_t nrf_egu_channel_count(NRF_EGU_Type * NRF_EGUx)
+{
+    if (NRF_EGUx == NRF_EGU0){
+        return EGU0_CH_NUM;
+    }
+    if (NRF_EGUx ==  NRF_EGU1){
+        return EGU1_CH_NUM;
+    }
+#if EGU_COUNT > 2
+    if (NRF_EGUx ==  NRF_EGU2){
+        return EGU2_CH_NUM;
+    }
+    if (NRF_EGUx ==  NRF_EGU3){
+        return EGU3_CH_NUM;
+    }
+    if (NRF_EGUx ==  NRF_EGU4){
+        return EGU4_CH_NUM;
+    }
+    if (NRF_EGUx ==  NRF_EGU5){
+        return EGU5_CH_NUM;
+    }
+#endif
+    return 0;
+}
 
 /**
  * @brief Function for triggering a specific EGU task.
@@ -122,6 +177,7 @@ typedef enum
  */
 __STATIC_INLINE void nrf_egu_task_trigger(NRF_EGU_Type * NRF_EGUx, nrf_egu_task_t egu_task)
 {
+    ASSERT(NRF_EGUx);
     *((volatile uint32_t *)((uint8_t *)NRF_EGUx + (uint32_t)egu_task)) = 0x1UL;
 }
 
@@ -135,6 +191,7 @@ __STATIC_INLINE void nrf_egu_task_trigger(NRF_EGU_Type * NRF_EGUx, nrf_egu_task_
 __STATIC_INLINE uint32_t * nrf_egu_task_address_get(NRF_EGU_Type * NRF_EGUx,
                                                     nrf_egu_task_t egu_task)
 {
+    ASSERT(NRF_EGUx);
     return (uint32_t *)((uint8_t *)NRF_EGUx + (uint32_t)egu_task);
 }
 
@@ -145,10 +202,11 @@ __STATIC_INLINE uint32_t * nrf_egu_task_address_get(NRF_EGU_Type * NRF_EGUx,
  * @param NRF_EGUx EGU instance.
  * @param channel  Channel number.
  */
-__STATIC_INLINE uint32_t * nrf_egu_task_trigger_addres_get(NRF_EGU_Type * NRF_EGUx,
+__STATIC_INLINE uint32_t * nrf_egu_task_trigger_address_get(NRF_EGU_Type * NRF_EGUx,
                                                            uint8_t channel)
 {
-    ASSERT(channel < NRF_EGU_CHANNEL_COUNT);
+    ASSERT(NRF_EGUx);
+    ASSERT(channel < nrf_egu_channel_count(NRF_EGUx));
     return (uint32_t*)&NRF_EGUx->TASKS_TRIGGER[channel];
 }
 
@@ -156,11 +214,13 @@ __STATIC_INLINE uint32_t * nrf_egu_task_trigger_addres_get(NRF_EGU_Type * NRF_EG
 /**
  * @brief Function for returning the specific EGU TRIGGER task.
  *
+ * @param NRF_EGUx EGU instance.
  * @param channel  Channel number.
  */
-__STATIC_INLINE nrf_egu_task_t nrf_egu_task_trigger_get(uint8_t channel)
+__STATIC_INLINE nrf_egu_task_t nrf_egu_task_trigger_get(NRF_EGU_Type * NRF_EGUx, uint8_t channel)
 {
-    ASSERT(channel <= NRF_EGU_CHANNEL_COUNT);
+    ASSERT(NRF_EGUx);
+    ASSERT(channel < nrf_egu_channel_count(NRF_EGUx));
     return (nrf_egu_task_t)((uint32_t) NRF_EGU_TASK_TRIGGER0 + (channel * sizeof(uint32_t)));
 }
 
@@ -174,6 +234,7 @@ __STATIC_INLINE nrf_egu_task_t nrf_egu_task_trigger_get(uint8_t channel)
 __STATIC_INLINE bool nrf_egu_event_check(NRF_EGU_Type * NRF_EGUx,
                                          nrf_egu_event_t egu_event)
 {
+    ASSERT(NRF_EGUx);
     return (bool)*(volatile uint32_t *)((uint8_t *)NRF_EGUx + (uint32_t)egu_event);
 }
 
@@ -187,7 +248,12 @@ __STATIC_INLINE bool nrf_egu_event_check(NRF_EGU_Type * NRF_EGUx,
 __STATIC_INLINE void nrf_egu_event_clear(NRF_EGU_Type * NRF_EGUx,
                                          nrf_egu_event_t egu_event)
 {
+    ASSERT(NRF_EGUx);
     *((volatile uint32_t *)((uint8_t *)NRF_EGUx + (uint32_t)egu_event)) = 0x0UL;
+#if __CORTEX_M == 0x04
+    volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)NRF_EGUx + (uint32_t)egu_event));
+    (void)dummy;
+#endif
 }
 
 
@@ -200,6 +266,7 @@ __STATIC_INLINE void nrf_egu_event_clear(NRF_EGU_Type * NRF_EGUx,
 __STATIC_INLINE uint32_t * nrf_egu_event_address_get(NRF_EGU_Type * NRF_EGUx,
                                                      nrf_egu_event_t egu_event)
 {
+    ASSERT(NRF_EGUx);
     return (uint32_t *)((uint8_t *)NRF_EGUx + (uint32_t)egu_event);
 }
 
@@ -210,10 +277,11 @@ __STATIC_INLINE uint32_t * nrf_egu_event_address_get(NRF_EGU_Type * NRF_EGUx,
  * @param NRF_EGUx EGU instance.
  * @param channel  Channel number.
  */
-__STATIC_INLINE uint32_t * nrf_egu_event_triggered_addres_get(NRF_EGU_Type * NRF_EGUx,
+__STATIC_INLINE uint32_t * nrf_egu_event_triggered_address_get(NRF_EGU_Type * NRF_EGUx,
                                                               uint8_t channel)
 {
-    ASSERT(channel < NRF_EGU_CHANNEL_COUNT);
+    ASSERT(NRF_EGUx);
+    ASSERT(channel < nrf_egu_channel_count(NRF_EGUx));
     return (uint32_t*)&NRF_EGUx->EVENTS_TRIGGERED[channel];
 }
 
@@ -221,11 +289,14 @@ __STATIC_INLINE uint32_t * nrf_egu_event_triggered_addres_get(NRF_EGU_Type * NRF
 /**
  * @brief Function for returning the specific EGU TRIGGERED event.
  *
+ * @param NRF_EGUx EGU instance.
  * @param channel  Channel number.
  */
-__STATIC_INLINE nrf_egu_event_t nrf_egu_event_triggered_get(uint8_t channel)
+__STATIC_INLINE nrf_egu_event_t nrf_egu_event_triggered_get(NRF_EGU_Type * NRF_EGUx,
+                                                            uint8_t channel)
 {
-    ASSERT(channel < NRF_EGU_CHANNEL_COUNT);
+    ASSERT(NRF_EGUx);
+    ASSERT(channel < nrf_egu_channel_count(NRF_EGUx));
     return (nrf_egu_event_t)((uint32_t) NRF_EGU_EVENT_TRIGGERED0 + (channel * sizeof(uint32_t)));
 }
 
@@ -238,6 +309,7 @@ __STATIC_INLINE nrf_egu_event_t nrf_egu_event_triggered_get(uint8_t channel)
  */
 __STATIC_INLINE void nrf_egu_int_enable(NRF_EGU_Type * NRF_EGUx, uint32_t egu_int_mask)
 {
+    ASSERT(NRF_EGUx);
     NRF_EGUx->INTENSET = egu_int_mask;
 }
 
@@ -253,6 +325,7 @@ __STATIC_INLINE void nrf_egu_int_enable(NRF_EGU_Type * NRF_EGUx, uint32_t egu_in
  */
 __STATIC_INLINE bool nrf_egu_int_enable_check(NRF_EGU_Type * NRF_EGUx, uint32_t egu_int_mask)
 {
+    ASSERT(NRF_EGUx);
     return (bool)(NRF_EGUx->INTENSET & egu_int_mask);
 }
 
@@ -265,22 +338,30 @@ __STATIC_INLINE bool nrf_egu_int_enable_check(NRF_EGU_Type * NRF_EGUx, uint32_t
  */
 __STATIC_INLINE void nrf_egu_int_disable(NRF_EGU_Type * NRF_EGUx, uint32_t egu_int_mask)
 {
+    ASSERT(NRF_EGUx);
     NRF_EGUx->INTENCLR = egu_int_mask;
 }
 
 /**
  * @brief Function for retrieving one or more specific EGU interrupts.
  *
+ * @param NRF_EGUx EGU instance.
  * @param channel Channel number.
  *
  * @returns EGU interrupt mask.
  */
-__STATIC_INLINE nrf_egu_int_mask_t nrf_egu_int_get(uint8_t channel)
+__STATIC_INLINE nrf_egu_int_mask_t nrf_egu_int_get(NRF_EGU_Type * NRF_EGUx, uint8_t channel)
 {
-    ASSERT(channel < NRF_EGU_CHANNEL_COUNT);
+    ASSERT(NRF_EGUx);
+    ASSERT(channel < nrf_egu_channel_count(NRF_EGUx));
     return (nrf_egu_int_mask_t)((uint32_t) (EGU_INTENSET_TRIGGERED0_Msk << channel));
 }
 
 /** @} */
 
+
+#ifdef __cplusplus
+}
+#endif
+
 #endif

nRF5_SDK_11.0.0_89a8197/components/drivers_nrf/hal/nrf_gpio.h

@@ -1,96 +1,119 @@
-/* Copyright (c) 2015 Nordic Semiconductor. All Rights Reserved.
+/**
+ * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
  * 
-* The information contained herein is property of Nordic Semiconductor ASA.
+ * All rights reserved.
-* Terms and conditions of usage are described in detail in NORDIC
-* SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
  * 
-* Licensees are granted free, non-transferable use of the information. NO
+ * Redistribution and use in source and binary forms, with or without modification,
-* WARRANTY of ANY KIND is provided. This heading must NOT be removed from
+ * are permitted provided that the following conditions are met:
-* the file.
+ * 
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ *    list of conditions and the following disclaimer.
+ * 
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ *    Semiconductor ASA integrated circuit in a product or a software update for
+ *    such product, must reproduce the above copyright notice, this list of
+ *    conditions and the following disclaimer in the documentation and/or other
+ *    materials provided with the distribution.
+ * 
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ *    contributors may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ * 
+ * 4. This software, with or without modification, must only be used with a
+ *    Nordic Semiconductor ASA integrated circuit.
+ * 
+ * 5. Any software provided in binary form under this license must not be reverse
+ *    engineered, decompiled, modified and/or disassembled.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  * 
  */
 #ifndef NRF_GPIO_H__
 #define NRF_GPIO_H__
 
 #include "nrf.h"
+#include "nrf_peripherals.h"
+#include "nrf_assert.h"
 #include <stdbool.h>
+#include <stdlib.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
 
 /**
  * @defgroup nrf_gpio GPIO abstraction
  * @{
  * @ingroup nrf_drivers
  * @brief GPIO pin abstraction and port abstraction for reading and writing byte-wise to GPIO ports.
- *
- * Here, the GPIO ports are defined as follows:
- * - Port 0 -> pin 0-7
- * - Port 1 -> pin 8-15
- * - Port 2 -> pin 16-23
- * - Port 3 -> pin 24-31
  */
 
-#define NUMBER_OF_PINS 32
+#if (GPIO_COUNT == 1)
+#define NUMBER_OF_PINS (P0_PIN_NUM)
+#define GPIO_REG_LIST  {NRF_GPIO}
+#elif (GPIO_COUNT == 2)
+#define NUMBER_OF_PINS (P0_PIN_NUM + P1_PIN_NUM)
+#define GPIO_REG_LIST  {NRF_P0, NRF_P1}
+#else
+#error "Not supported."
+#endif
+
 
 /**
- * @brief Enumerator used for selecting between port 0 - 3.
+ * @brief Macro for mapping port and pin numbers to values understandable for nrf_gpio functions.
  */
-typedef enum
+#define NRF_GPIO_PIN_MAP(port, pin) ((port << 5) | (pin & 0x1F))
-{
-    NRF_GPIO_PORT_SELECT_PORT0 = 0,           ///<  Port 0 (GPIO pin 0-7)
-    NRF_GPIO_PORT_SELECT_PORT1,               ///<  Port 1 (GPIO pin 8-15)
-    NRF_GPIO_PORT_SELECT_PORT2,               ///<  Port 2 (GPIO pin 16-23)
-    NRF_GPIO_PORT_SELECT_PORT3,               ///<  Port 3 (GPIO pin 24-31)
-} nrf_gpio_port_select_t;
-
-/**
- * @brief Enumerator used for setting the direction of a GPIO port.
- */
-typedef enum
-{
-    NRF_GPIO_PORT_DIR_OUTPUT,       ///<  Output
-    NRF_GPIO_PORT_DIR_INPUT         ///<  Input
-} nrf_gpio_port_dir_t;
 
 /**
  * @brief Pin direction definitions.
  */
 typedef enum
 {
-    NRF_GPIO_PIN_DIR_INPUT  = GPIO_PIN_CNF_DIR_Input,   ///< Input
+    NRF_GPIO_PIN_DIR_INPUT  = GPIO_PIN_CNF_DIR_Input, ///< Input.
-    NRF_GPIO_PIN_DIR_OUTPUT = GPIO_PIN_CNF_DIR_Output   ///< Output
+    NRF_GPIO_PIN_DIR_OUTPUT = GPIO_PIN_CNF_DIR_Output ///< Output.
 } nrf_gpio_pin_dir_t;
 
 /**
- * @brief Connection of input buffer
+ * @brief Connection of input buffer.
  */
 typedef enum
 {
-    NRF_GPIO_PIN_INPUT_CONNECT    = GPIO_PIN_CNF_INPUT_Connect,   ///< Connect input buffer
+    NRF_GPIO_PIN_INPUT_CONNECT    = GPIO_PIN_CNF_INPUT_Connect,   ///< Connect input buffer.
-    NRF_GPIO_PIN_INPUT_DISCONNECT = GPIO_PIN_CNF_INPUT_Disconnect ///< Disconnect input buffer
+    NRF_GPIO_PIN_INPUT_DISCONNECT = GPIO_PIN_CNF_INPUT_Disconnect ///< Disconnect input buffer.
 } nrf_gpio_pin_input_t;
 
 /**
- * @brief Enumerator used for selecting the pin to be pulled down or up at the time of pin configuration
+ * @brief Enumerator used for selecting the pin to be pulled down or up at the time of pin configuration.
  */
 typedef enum
 {
-    NRF_GPIO_PIN_NOPULL   = GPIO_PIN_CNF_PULL_Disabled,                 ///<  Pin pullup resistor disabled
+    NRF_GPIO_PIN_NOPULL   = GPIO_PIN_CNF_PULL_Disabled, ///<  Pin pull-up resistor disabled.
-    NRF_GPIO_PIN_PULLDOWN = GPIO_PIN_CNF_PULL_Pulldown,                 ///<  Pin pulldown resistor enabled
+    NRF_GPIO_PIN_PULLDOWN = GPIO_PIN_CNF_PULL_Pulldown, ///<  Pin pull-down resistor enabled.
-    NRF_GPIO_PIN_PULLUP   = GPIO_PIN_CNF_PULL_Pullup,                   ///<  Pin pullup resistor enabled
+    NRF_GPIO_PIN_PULLUP   = GPIO_PIN_CNF_PULL_Pullup,   ///<  Pin pull-up resistor enabled.
 } nrf_gpio_pin_pull_t;
 
 /**
- * @brief Enumerator used for selecting output drive mode
+ * @brief Enumerator used for selecting output drive mode.
  */
 typedef enum
 {
-    NRF_GPIO_PIN_S0S1 = GPIO_PIN_CNF_DRIVE_S0S1, ///< !< Standard '0', standard '1'
+    NRF_GPIO_PIN_S0S1 = GPIO_PIN_CNF_DRIVE_S0S1, ///< !< Standard '0', standard '1'.
-    NRF_GPIO_PIN_H0S1 = GPIO_PIN_CNF_DRIVE_H0S1, ///< !< High drive '0', standard '1'
+    NRF_GPIO_PIN_H0S1 = GPIO_PIN_CNF_DRIVE_H0S1, ///< !< High-drive '0', standard '1'.
-    NRF_GPIO_PIN_S0H1 = GPIO_PIN_CNF_DRIVE_S0H1, ///< !< Standard '0', high drive '1'
+    NRF_GPIO_PIN_S0H1 = GPIO_PIN_CNF_DRIVE_S0H1, ///< !< Standard '0', high-drive '1'.
-    NRF_GPIO_PIN_H0H1 = GPIO_PIN_CNF_DRIVE_H0H1, ///< !< High drive '0', high 'drive '1''
+    NRF_GPIO_PIN_H0H1 = GPIO_PIN_CNF_DRIVE_H0H1, ///< !< High drive '0', high-drive '1'.
-    NRF_GPIO_PIN_D0S1 = GPIO_PIN_CNF_DRIVE_D0S1, ///< !< Disconnect '0' standard '1'
+    NRF_GPIO_PIN_D0S1 = GPIO_PIN_CNF_DRIVE_D0S1, ///< !< Disconnect '0' standard '1'.
-    NRF_GPIO_PIN_D0H1 = GPIO_PIN_CNF_DRIVE_D0H1, ///< !< Disconnect '0', high drive '1'
+    NRF_GPIO_PIN_D0H1 = GPIO_PIN_CNF_DRIVE_D0H1, ///< !< Disconnect '0', high-drive '1'.
-    NRF_GPIO_PIN_S0D1 = GPIO_PIN_CNF_DRIVE_S0D1, ///< !< Standard '0'. disconnect '1'
+    NRF_GPIO_PIN_S0D1 = GPIO_PIN_CNF_DRIVE_S0D1, ///< !< Standard '0', disconnect '1'.
-    NRF_GPIO_PIN_H0D1 = GPIO_PIN_CNF_DRIVE_H0D1, ///< !< High drive '0', disconnect '1'
+    NRF_GPIO_PIN_H0D1 = GPIO_PIN_CNF_DRIVE_H0D1, ///< !< High-drive '0', disconnect '1'.
 } nrf_gpio_pin_drive_t;
 
 /**
@@ -104,45 +127,49 @@ typedef enum
 } nrf_gpio_pin_sense_t;
 
 
+#if (__LINT__ != 1)
+
 /**
- * @brief Function for configuring the GPIO pin range as outputs with normal drive strength.
+ * @brief Function for configuring the GPIO pin range as output pins with normal drive strength.
  *        This function can be used to configure pin range as simple output with gate driving GPIO_PIN_CNF_DRIVE_S0S1 (normal cases).
  *
- * @param pin_range_start specifies the start number (inclusive) in the range of pin numbers to be configured (allowed values 0-30)
+ * @param pin_range_start Specifies the start number (inclusive) in the range of pin numbers to be configured (allowed values 0-30).
  *
- * @param pin_range_end specifies the end number (inclusive) in the range of pin numbers to be configured (allowed values 0-30)
+ * @param pin_range_end Specifies the end number (inclusive) in the range of pin numbers to be configured (allowed values 0-30).
  *
- * @note For configuring only one pin as output use @ref nrf_gpio_cfg_output
+ * @note For configuring only one pin as output, use @ref nrf_gpio_cfg_output.
- *       Sense capability on the pin is disabled, and input is disconnected from the buffer as the pins are configured as output.
+ *       Sense capability on the pin is disabled and input is disconnected from the buffer as the pins are configured as output.
  */
 __STATIC_INLINE void nrf_gpio_range_cfg_output(uint32_t pin_range_start, uint32_t pin_range_end);
 
 /**
- * @brief Function for configuring the GPIO pin range as inputs with given initial value set, hiding inner details.
+ * @brief Function for configuring the GPIO pin range as input pins with given initial value set, hiding inner details.
  *        This function can be used to configure pin range as simple input.
  *
- * @param pin_range_start specifies the start number (inclusive) in the range of pin numbers to be configured (allowed values 0-30)
+ * @param pin_range_start Specifies the start number (inclusive) in the range of pin numbers to be configured (allowed values 0-30).
  *
- * @param pin_range_end specifies the end number (inclusive) in the range of pin numbers to be configured (allowed values 0-30)
+ * @param pin_range_end Specifies the end number (inclusive) in the range of pin numbers to be configured (allowed values 0-30).
  *
- * @param pull_config State of the pin range pull resistor (no pull, pulled down or pulled high)
+ * @param pull_config State of the pin range pull resistor (no pull, pulled down, or pulled high).
  *
- * @note  For configuring only one pin as input use @ref nrf_gpio_cfg_input
+ * @note  For configuring only one pin as input, use @ref nrf_gpio_cfg_input.
- *        Sense capability on the pin is disabled, and input is connected to buffer so that the GPIO->IN register is readable
+ *        Sense capability on the pin is disabled and input is connected to buffer so that the GPIO->IN register is readable.
  */
-__STATIC_INLINE void nrf_gpio_range_cfg_input(uint32_t pin_range_start, uint32_t pin_range_end, nrf_gpio_pin_pull_t pull_config);
+__STATIC_INLINE void nrf_gpio_range_cfg_input(uint32_t            pin_range_start,
+                                              uint32_t            pin_range_end,
+                                              nrf_gpio_pin_pull_t pull_config);
 
 /**
- * @brief Pin configuration function
+ * @brief Pin configuration function.
  *
  * The main pin configuration function.
  * This function allows to set any aspect in PIN_CNF register.
- * @param pin_number Specifies the pin number (allowed values 0-31).
+ * @param pin_number Specifies the pin number.
- * @param dir   Pin direction
+ * @param dir        Pin direction.
- * @param input Connect or disconnect input buffer
+ * @param input      Connect or disconnect the input buffer.
- * @param pull  Pull configuration
+ * @param pull       Pull configuration.
- * @param drive Drive configuration
+ * @param drive      Drive configuration.
- * @param sense Pin sensing mechanism
+ * @param sense      Pin sensing mechanism.
  */
 __STATIC_INLINE void nrf_gpio_cfg(
     uint32_t             pin_number,
@@ -153,37 +180,37 @@ __STATIC_INLINE void nrf_gpio_cfg(
     nrf_gpio_pin_sense_t sense);
 
 /**
- * @brief Function for configuring the given GPIO pin number as output with given initial value set, hiding inner details.
+ * @brief Function for configuring the given GPIO pin number as output, hiding inner details.
- *        This function can be used to configure pin range as simple input with gate driving GPIO_PIN_CNF_DRIVE_S0S1 (normal cases).
+ *        This function can be used to configure a pin as simple output with gate driving GPIO_PIN_CNF_DRIVE_S0S1 (normal cases).
  *
- * @param pin_number specifies the pin number (allowed values 0-31)
+ * @param pin_number Specifies the pin number.
  *
- * @note  Sense capability on the pin is disabled, and input is disconnected from the buffer as the pins are configured as output.
+ * @note  Sense capability on the pin is disabled and input is disconnected from the buffer as the pins are configured as output.
  */
 __STATIC_INLINE void nrf_gpio_cfg_output(uint32_t pin_number);
 
 /**
- * @brief Function for configuring the given GPIO pin number as input with given initial value set, hiding inner details.
+ * @brief Function for configuring the given GPIO pin number as input, hiding inner details.
- *        This function can be used to configure pin range as simple input with gate driving GPIO_PIN_CNF_DRIVE_S0S1 (normal cases).
+ *        This function can be used to configure a pin as simple input.
  *
- * @param pin_number Specifies the pin number (allowed values 0-30).
+ * @param pin_number Specifies the pin number.
- * @param pull_config State of the pin range pull resistor (no pull, pulled down or pulled high).
+ * @param pull_config State of the pin range pull resistor (no pull, pulled down, or pulled high).
  *
- * @note  Sense capability on the pin is disabled, and input is connected to buffer so that the GPIO->IN register is readable
+ * @note  Sense capability on the pin is disabled and input is connected to buffer so that the GPIO->IN register is readable.
  */
 __STATIC_INLINE void nrf_gpio_cfg_input(uint32_t pin_number, nrf_gpio_pin_pull_t pull_config);
 
 /**
- * @brief Function for reseting pin configuration to its default state.
+ * @brief Function for resetting pin configuration to its default state.
  *
- * @param pin_number Specifies the pin number (allowed values 0-31).
+ * @param pin_number Specifies the pin number.
  */
 __STATIC_INLINE void nrf_gpio_cfg_default(uint32_t pin_number);
 
 /**
  * @brief Function for configuring the given GPIO pin number as a watcher. Only input is connected.
  *
- * @param pin_number Specifies the pin number (allowed values 0-31).
+ * @param pin_number Specifies the pin number.
  *
  */
 __STATIC_INLINE void nrf_gpio_cfg_watcher(uint32_t pin_number);
@@ -191,26 +218,28 @@ __STATIC_INLINE void nrf_gpio_cfg_watcher(uint32_t pin_number);
 /**
  * @brief Function for disconnecting input for the given GPIO.
  *
- * @param pin_number Specifies the pin number (allowed values 0-31).
+ * @param pin_number Specifies the pin number.
  *
  */
 __STATIC_INLINE void nrf_gpio_input_disconnect(uint32_t pin_number);
 
 /**
- * @brief Function for configuring the given GPIO pin number as input with given initial value set, hiding inner details.
+ * @brief Function for configuring the given GPIO pin number as input, hiding inner details.
- *        This function can be used to configure pin range as simple input with gate driving GPIO_PIN_CNF_DRIVE_S0S1 (normal cases).
+ *        This function can be used to configure pin range as simple input.
- *        Sense capability on the pin is configurable, and input is connected to buffer so that the GPIO->IN register is readable.
+ *        Sense capability on the pin is configurable and input is connected to buffer so that the GPIO->IN register is readable.
  *
- * @param pin_number   Specifies the pin number (allowed values 0-30).
+ * @param pin_number   Specifies the pin number.
- * @param pull_config  State of the pin pull resistor (no pull, pulled down or pulled high).
+ * @param pull_config  State of the pin pull resistor (no pull, pulled down, or pulled high).
- * @param sense_config Sense level of the pin (no sense, sense low or sense high).
+ * @param sense_config Sense level of the pin (no sense, sense low, or sense high).
  */
-__STATIC_INLINE void nrf_gpio_cfg_sense_input(uint32_t pin_number, nrf_gpio_pin_pull_t pull_config, nrf_gpio_pin_sense_t sense_config);
+__STATIC_INLINE void nrf_gpio_cfg_sense_input(uint32_t             pin_number,
+                                              nrf_gpio_pin_pull_t  pull_config,
+                                              nrf_gpio_pin_sense_t sense_config);
 
 /**
  * @brief Function for configuring sense level for the given GPIO.
  *
- * @param pin_number   Specifies the pin number of gpio pin numbers to be configured (allowed values 0-30).
+ * @param pin_number   Specifies the pin number.
  * @param sense_config Sense configuration.
  *
  */
@@ -219,85 +248,52 @@ __STATIC_INLINE void nrf_gpio_cfg_sense_set(uint32_t pin_number, nrf_gpio_pin_se
 /**
  * @brief Function for setting the direction for a GPIO pin.
  *
- * @param pin_number specifies the pin number (0-31) for which to
+ * @param pin_number Specifies the pin number for which to set the direction.
- * set the direction.
  *
- * @param direction specifies the direction
+ * @param direction Specifies the direction.
  */
 __STATIC_INLINE void nrf_gpio_pin_dir_set(uint32_t pin_number, nrf_gpio_pin_dir_t direction);
 
 /**
  * @brief Function for setting a GPIO pin.
  *
- * Note that the pin must be configured as an output for this
+ * Note that the pin must be configured as an output for this function to have any effect.
- * function to have any effect.
  *
- * @param pin_number Specifies the pin number (0-31) to set.
+ * @param pin_number Specifies the pin number to set.
  */
 __STATIC_INLINE void nrf_gpio_pin_set(uint32_t pin_number);
 
-/**
- * @brief Function for setting GPIO pins.
- *
- * Note that the pins must be configured as outputs for this
- * function to have any effect.
- *
- * @param pin_mask Specifies the pins to set.
- */
-__STATIC_INLINE void nrf_gpio_pins_set(uint32_t pin_mask);
-
 /**
  * @brief Function for clearing a GPIO pin.
  *
  * Note that the pin must be configured as an output for this
  * function to have any effect.
  *
- * @param pin_number Specifies the pin number (0-31) to clear.
+ * @param pin_number Specifies the pin number to clear.
  */
 __STATIC_INLINE void nrf_gpio_pin_clear(uint32_t pin_number);
 
-/**
- * @brief Function for clearing GPIO pins.
- *
- * Note that the pins must be configured as outputs for this
- * function to have any effect.
- *
- * @param pin_mask Specifies the pins to clear.
- */
-__STATIC_INLINE void nrf_gpio_pins_clear(uint32_t pin_mask);
-
 /**
  * @brief Function for toggling a GPIO pin.
  *
  * Note that the pin must be configured as an output for this
  * function to have any effect.
  *
- * @param pin_number Specifies the pin number (0-31) to toggle.
+ * @param pin_number Specifies the pin number to toggle.
  */
 __STATIC_INLINE void nrf_gpio_pin_toggle(uint32_t pin_number);
 
-/**
- * @brief Function for toggling GPIO pins.
- *
- * Note that the pins must be configured as outputs for this
- * function to have any effect.
- *
- * @param pin_mask Specifies the pins to toggle.
- */
-__STATIC_INLINE void nrf_gpio_pins_toggle(uint32_t pin_mask);
-
 /**
  * @brief Function for writing a value to a GPIO pin.
  *
  * Note that the pin must be configured as an output for this
  * function to have any effect.
  *
- * @param pin_number specifies the pin number (0-31) to
+ * @param pin_number Specifies the pin number to write.
- * write.
  *
- * @param value specifies the value to be written to the pin.
+ * @param value Specifies the value to be written to the pin.
- * @arg 0 clears the pin
+ * @arg 0 Clears the pin.
- * @arg >=1 sets the pin.
+ * @arg >=1 Sets the pin.
  */
 __STATIC_INLINE void nrf_gpio_pin_write(uint32_t pin_number, uint32_t value);
 
@@ -307,123 +303,182 @@ __STATIC_INLINE void nrf_gpio_pin_write(uint32_t pin_number, uint32_t value);
  * Note that the pin must have input connected for the value
  * returned from this function to be valid.
  *
- * @param pin_number specifies the pin number (0-31) to
+ * @param pin_number Specifies the pin number to read.
- * read.
  *
- * @return
+ * @return 0 if the pin input level is low. Positive value if the pin is high.
- * @retval 0 if the pin input level is low.
- * @retval 1 if the pin input level is high.
- * @retval > 1 should never occur.
  */
 __STATIC_INLINE uint32_t nrf_gpio_pin_read(uint32_t pin_number);
 
 /**
- * @brief Function for reading the input level of all GPIO pins.
+ * @brief Function for reading the output level of a GPIO pin.
  *
- * Note that the pin must have input connected for the value
+ * @param pin_number Specifies the pin number to read.
- * returned from this function to be valid.
  *
- * @retval Status of input of all pins
+ * @return 0 if the pin output level is low. Positive value if pin output is high.
  */
-__STATIC_INLINE uint32_t nrf_gpio_pins_read(void);
+__STATIC_INLINE uint32_t nrf_gpio_pin_out_read(uint32_t pin_number);
 
 /**
  * @brief Function for reading the sense configuration of a GPIO pin.
  *
- * @param pin_number specifies the pin number (0-31) to
+ * @param pin_number Specifies the pin number to read.
- * read.
  *
- * @retval Sense configuration
+ * @retval Sense configuration.
  */
 __STATIC_INLINE nrf_gpio_pin_sense_t nrf_gpio_pin_sense_get(uint32_t pin_number);
 
 /**
- * @brief Generic function for writing a single byte of a 32 bit word at a given
+ * @brief Function for setting output direction on selected pins on a given port.
- * address.
  *
- * This function should not be called from outside the nrf_gpio
+ * @param p_reg    Pointer to the peripheral registers structure.
- * abstraction layer.
+ * @param out_mask Mask specifying the pins to set as output.
  *
- * @param word_address is the address of the word to be written.
- *
- * @param byte_no is the word byte number (0-3) to be written.
- *
- * @param value is the value to be written to byte "byte_no" of word
- * at address "word_address"
  */
-__STATIC_INLINE void nrf_gpio_word_byte_write(volatile uint32_t * word_address, uint8_t byte_no, uint8_t value);
+__STATIC_INLINE void nrf_gpio_port_dir_output_set(NRF_GPIO_Type * p_reg, uint32_t out_mask);
 
 /**
- * @brief Generic function for reading a single byte of a 32 bit word at a given
+ * @brief Function for setting input direction on selected pins on a given port.
- * address.
  *
- * This function should not be called from outside the nrf_gpio
+ * @param p_reg    Pointer to the peripheral registers structure.
- * abstraction layer.
+ * @param in_mask  Mask specifying the pins to set as input.
  *
- * @param word_address is the address of the word to be read.
- *
- * @param byte_no is the byte number (0-3) of the word to be read.
- *
- * @return byte "byte_no" of word at address "word_address".
  */
-__STATIC_INLINE uint8_t nrf_gpio_word_byte_read(const volatile uint32_t* word_address, uint8_t byte_no);
+__STATIC_INLINE void nrf_gpio_port_dir_input_set(NRF_GPIO_Type * p_reg, uint32_t in_mask);
 
 /**
- * @brief Function for setting the direction of a port.
+ * @brief Function for writing the direction configuration of GPIO pins in a given port.
  *
- * @param port is the port for which to set the direction.
+ * @param p_reg    Pointer to the peripheral registers structure.
+ * @param dir_mask Mask specifying the direction of pins. Bit set means that the given pin is configured as output.
  *
- * @param dir direction to be set for this port.
  */
-__STATIC_INLINE void nrf_gpio_port_dir_set(nrf_gpio_port_select_t port, nrf_gpio_port_dir_t dir);
+__STATIC_INLINE void nrf_gpio_port_dir_write(NRF_GPIO_Type * p_reg, uint32_t dir_mask);
 
 /**
- * @brief Function for reading a GPIO port.
+ * @brief Function for reading the direction configuration of a GPIO port.
  *
- * @param port is the port to read.
+ * @param p_reg    Pointer to the peripheral registers structure.
  *
- * @return the input value on this port.
+ * @retval Pin configuration of the current direction settings. Bit set means that the given pin is configured as output.
  */
-__STATIC_INLINE uint8_t nrf_gpio_port_read(nrf_gpio_port_select_t port);
+__STATIC_INLINE uint32_t nrf_gpio_port_dir_read(NRF_GPIO_Type const * p_reg);
 
 /**
- * @brief Function for writing to a GPIO port.
+ * @brief Function for reading the input signals of GPIO pins on a given port.
  *
- * @param port is the port to write.
+ * @param p_reg Pointer to the peripheral registers structure.
  *
- * @param value is the value to write to this port.
+ * @retval Port input values.
- *
- * @sa nrf_gpio_port_dir_set()
  */
-__STATIC_INLINE void nrf_gpio_port_write(nrf_gpio_port_select_t port, uint8_t value);
+__STATIC_INLINE uint32_t nrf_gpio_port_in_read(NRF_GPIO_Type const * p_reg);
 
 /**
- * @brief Function for setting individual pins on GPIO port.
+ * @brief Function for reading the output signals of GPIO pins of a given port.
  *
- * @param port is the port for which to set the pins.
+ * @param p_reg Pointer to the peripheral registers structure.
  *
- * @param set_mask is a mask specifying which pins to set. A bit
+ * @retval Port output values.
- * set to 1 indicates that the corresponding port pin shall be
- * set.
- *
- * @sa nrf_gpio_port_dir_set()
  */
-__STATIC_INLINE void nrf_gpio_port_set(nrf_gpio_port_select_t port, uint8_t set_mask);
+__STATIC_INLINE uint32_t nrf_gpio_port_out_read(NRF_GPIO_Type const * p_reg);
 
 /**
- * @brief Function for clearing individual pins on GPIO port.
+ * @brief Function for writing the GPIO pins output on a given port.
  *
- * @param port is the port for which to clear the pins.
+ * @param p_reg Pointer to the peripheral registers structure.
+ * @param value Output port mask.
  *
- * @param clr_mask is a mask specifying which pins to clear. A bit
- * set to 1 indicates that the corresponding port pin shall be
- * cleared.
- *
- * @sa nrf_gpio_port_dir_set()
  */
-__STATIC_INLINE void nrf_gpio_port_clear(nrf_gpio_port_select_t port, uint8_t clr_mask);
+__STATIC_INLINE void nrf_gpio_port_out_write(NRF_GPIO_Type * p_reg, uint32_t value);
+
+/**
+ * @brief Function for setting high level on selected GPIO pins of a given port.
+ *
+ * @param p_reg    Pointer to the peripheral registers structure.
+ * @param set_mask Mask with pins to set as logical high level.
+ *
+ */
+__STATIC_INLINE void nrf_gpio_port_out_set(NRF_GPIO_Type * p_reg, uint32_t set_mask);
+
+/**
+ * @brief Function for setting low level on selected GPIO pins of a given port.
+ *
+ * @param p_reg    Pointer to the peripheral registers structure.
+ * @param clr_mask Mask with pins to set as logical low level.
+ *
+ */
+__STATIC_INLINE void nrf_gpio_port_out_clear(NRF_GPIO_Type * p_reg, uint32_t clr_mask);
+
+/**
+ * @brief Function for reading pins state of multiple consecutive ports.
+ *
+ * @param start_port Index of the first port to read.
+ * @param length     Number of ports to read.
+ * @param p_masks    Pointer to output array where port states will be stored.
+ */
+__STATIC_INLINE void nrf_gpio_ports_read(uint32_t start_port, uint32_t length, uint32_t * p_masks);
+
+#ifdef GPIO_DETECTMODE_DETECTMODE_LDETECT
+/**
+ * @brief Function for reading latch state of multiple consecutive ports.
+ *
+ * @param start_port Index of the first port to read.
+ * @param length     Number of ports to read.
+ * @param p_masks    Pointer to output array where latch states will be stored.
+ */
+__STATIC_INLINE void nrf_gpio_latches_read(uint32_t start_port, uint32_t length,
+                                           uint32_t * p_masks);
+
+/**
+ * @brief Function for reading latch state of single pin.
+ *
+ * @param pin_number Pin number.
+ * @return 0 if latch is not set. Positive value otherwise.
+ *
+ */
+__STATIC_INLINE uint32_t nrf_gpio_pin_latch_get(uint32_t pin_number);
+
+/**
+ * @brief Function for clearing latch state of a single pin.
+ *
+ * @param pin_number Pin number.
+ *
+ */
+__STATIC_INLINE void nrf_gpio_pin_latch_clear(uint32_t pin_number);
+#endif
+
+
+#endif // #ifndef (__LINT__ != 1)
 
 #ifndef SUPPRESS_INLINE_IMPLEMENTATION
+
+/**
+ * @brief Function for extracting port and relative pin number from absolute pin number.
+ *
+ * @param[inout] Pointer to absolute pin number which is overriden by relative to port pin number.
+ *
+ * @return Pointer to port register set.
+ *
+ */
+__STATIC_INLINE NRF_GPIO_Type * nrf_gpio_pin_port_decode(uint32_t * p_pin)
+{
+    ASSERT(*p_pin < NUMBER_OF_PINS);
+#if (GPIO_COUNT == 1)
+    // The oldest definition case
+    return NRF_GPIO;
+#else
+    if (*p_pin < P0_PIN_NUM)
+    {
+        return NRF_P0;
+    }
+    else
+    {
+        *p_pin = *p_pin & (P0_PIN_NUM - 1);
+        return NRF_P1;
+    }
+#endif
+}
+
+
 __STATIC_INLINE void nrf_gpio_range_cfg_output(uint32_t pin_range_start, uint32_t pin_range_end)
 {
     /*lint -e{845} // A zero has been given as right argument to operator '|'" */
@@ -433,7 +488,10 @@ __STATIC_INLINE void nrf_gpio_range_cfg_output(uint32_t pin_range_start, uint32_
     }
 }
 
-__STATIC_INLINE void nrf_gpio_range_cfg_input(uint32_t pin_range_start, uint32_t pin_range_end, nrf_gpio_pin_pull_t pull_config)
+
+__STATIC_INLINE void nrf_gpio_range_cfg_input(uint32_t            pin_range_start,
+                                              uint32_t            pin_range_end,
+                                              nrf_gpio_pin_pull_t pull_config)
 {
     /*lint -e{845} // A zero has been given as right argument to operator '|'" */
     for (; pin_range_start <= pin_range_end; pin_range_start++)
@@ -442,6 +500,7 @@ __STATIC_INLINE void nrf_gpio_range_cfg_input(uint32_t pin_range_start, uint32_t
     }
 }
 
+
 __STATIC_INLINE void nrf_gpio_cfg(
     uint32_t             pin_number,
     nrf_gpio_pin_dir_t   dir,
@@ -450,13 +509,16 @@ __STATIC_INLINE void nrf_gpio_cfg(
     nrf_gpio_pin_drive_t drive,
     nrf_gpio_pin_sense_t sense)
 {
-    NRF_GPIO->PIN_CNF[pin_number] = ((uint32_t)dir   << GPIO_PIN_CNF_DIR_Pos)
+    NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number);
+
+    reg->PIN_CNF[pin_number] = ((uint32_t)dir << GPIO_PIN_CNF_DIR_Pos)
                                | ((uint32_t)input << GPIO_PIN_CNF_INPUT_Pos)
                                | ((uint32_t)pull << GPIO_PIN_CNF_PULL_Pos)
                                | ((uint32_t)drive << GPIO_PIN_CNF_DRIVE_Pos)
                                | ((uint32_t)sense << GPIO_PIN_CNF_SENSE_Pos);
 }
 
+
 __STATIC_INLINE void nrf_gpio_cfg_output(uint32_t pin_number)
 {
     nrf_gpio_cfg(
@@ -468,6 +530,7 @@ __STATIC_INLINE void nrf_gpio_cfg_output(uint32_t pin_number)
         NRF_GPIO_PIN_NOSENSE);
 }
 
+
 __STATIC_INLINE void nrf_gpio_cfg_input(uint32_t pin_number, nrf_gpio_pin_pull_t pull_config)
 {
     nrf_gpio_cfg(
@@ -479,6 +542,7 @@ __STATIC_INLINE void nrf_gpio_cfg_input(uint32_t pin_number, nrf_gpio_pin_pull_t
         NRF_GPIO_PIN_NOSENSE);
 }
 
+
 __STATIC_INLINE void nrf_gpio_cfg_default(uint32_t pin_number)
 {
     nrf_gpio_cfg(
@@ -490,21 +554,30 @@ __STATIC_INLINE void nrf_gpio_cfg_default(uint32_t pin_number)
         NRF_GPIO_PIN_NOSENSE);
 }
 
+
 __STATIC_INLINE void nrf_gpio_cfg_watcher(uint32_t pin_number)
 {
+    NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number);
     /*lint -e{845} // A zero has been given as right argument to operator '|'" */
-    uint32_t cnf = NRF_GPIO->PIN_CNF[pin_number] & ~GPIO_PIN_CNF_INPUT_Msk;
+    uint32_t cnf = reg->PIN_CNF[pin_number] & ~GPIO_PIN_CNF_INPUT_Msk;
-    NRF_GPIO->PIN_CNF[pin_number] = cnf | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos);
+
+    reg->PIN_CNF[pin_number] = cnf | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos);
 }
 
+
 __STATIC_INLINE void nrf_gpio_input_disconnect(uint32_t pin_number)
 {
+    NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number);
     /*lint -e{845} // A zero has been given as right argument to operator '|'" */
-    uint32_t cnf = NRF_GPIO->PIN_CNF[pin_number] & ~GPIO_PIN_CNF_INPUT_Msk;
+    uint32_t cnf = reg->PIN_CNF[pin_number] & ~GPIO_PIN_CNF_INPUT_Msk;
-    NRF_GPIO->PIN_CNF[pin_number] = cnf | (GPIO_PIN_CNF_INPUT_Disconnect << GPIO_PIN_CNF_INPUT_Pos);
+
+    reg->PIN_CNF[pin_number] = cnf | (GPIO_PIN_CNF_INPUT_Disconnect << GPIO_PIN_CNF_INPUT_Pos);
 }
 
-__STATIC_INLINE void nrf_gpio_cfg_sense_input(uint32_t pin_number, nrf_gpio_pin_pull_t pull_config, nrf_gpio_pin_sense_t sense_config)
+
+__STATIC_INLINE void nrf_gpio_cfg_sense_input(uint32_t             pin_number,
+                                              nrf_gpio_pin_pull_t  pull_config,
+                                              nrf_gpio_pin_sense_t sense_config)
 {
     nrf_gpio_cfg(
         pin_number,
@@ -515,14 +588,17 @@ __STATIC_INLINE void nrf_gpio_cfg_sense_input(uint32_t pin_number, nrf_gpio_pin_
         sense_config);
 }
 
+
 __STATIC_INLINE void nrf_gpio_cfg_sense_set(uint32_t pin_number, nrf_gpio_pin_sense_t sense_config)
 {
+    NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number);
+
     /*lint -e{845} // A zero has been given as right argument to operator '|'" */
-    //uint32_t cnf = NRF_GPIO->PIN_CNF[pin_number] & ~GPIO_PIN_CNF_SENSE_Msk;
+    reg->PIN_CNF[pin_number] &= ~GPIO_PIN_CNF_SENSE_Msk;
-    NRF_GPIO->PIN_CNF[pin_number] &= ~GPIO_PIN_CNF_SENSE_Msk;
+    reg->PIN_CNF[pin_number] |= (sense_config << GPIO_PIN_CNF_SENSE_Pos);
-    NRF_GPIO->PIN_CNF[pin_number] |= (sense_config << GPIO_PIN_CNF_SENSE_Pos);
 }
 
+
 __STATIC_INLINE void nrf_gpio_pin_dir_set(uint32_t pin_number, nrf_gpio_pin_dir_t direction)
 {
     if (direction == NRF_GPIO_PIN_DIR_INPUT)
@@ -537,41 +613,37 @@ __STATIC_INLINE void nrf_gpio_pin_dir_set(uint32_t pin_number, nrf_gpio_pin_dir_
     }
     else
     {
-        NRF_GPIO->DIRSET = (1UL << pin_number);
+        NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number);
+        reg->DIRSET = (1UL << pin_number);
     }
 }
 
+
 __STATIC_INLINE void nrf_gpio_pin_set(uint32_t pin_number)
 {
-    NRF_GPIO->OUTSET = (1UL << pin_number);
+    NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number);
+
+    nrf_gpio_port_out_set(reg, 1UL << pin_number);
 }
 
-__STATIC_INLINE void nrf_gpio_pins_set(uint32_t pin_mask)
-{
-    NRF_GPIO->OUTSET = pin_mask;
-}
 
 __STATIC_INLINE void nrf_gpio_pin_clear(uint32_t pin_number)
 {
-    NRF_GPIO->OUTCLR = (1UL << pin_number);
+    NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number);
+
+    nrf_gpio_port_out_clear(reg, 1UL << pin_number);
 }
 
-__STATIC_INLINE void nrf_gpio_pins_clear(uint32_t pin_mask)
-{
-    NRF_GPIO->OUTCLR = pin_mask;
-}
 
 __STATIC_INLINE void nrf_gpio_pin_toggle(uint32_t pin_number)
 {
-    nrf_gpio_pins_toggle(1UL << pin_number);
+    NRF_GPIO_Type * reg        = nrf_gpio_pin_port_decode(&pin_number);
+    uint32_t        pins_state = reg->OUT;
+
+    reg->OUTSET = (~pins_state & (1UL << pin_number));
+    reg->OUTCLR = (pins_state & (1UL << pin_number));
 }
 
-__STATIC_INLINE void nrf_gpio_pins_toggle(uint32_t pin_mask)
-{
-    uint32_t pins_state = NRF_GPIO->OUT;
-    NRF_GPIO->OUTSET = (~pins_state & pin_mask);
-    NRF_GPIO->OUTCLR = ( pins_state & pin_mask);
-}
 
 __STATIC_INLINE void nrf_gpio_pin_write(uint32_t pin_number, uint32_t value)
 {
@@ -585,63 +657,139 @@ __STATIC_INLINE void nrf_gpio_pin_write(uint32_t pin_number, uint32_t value)
     }
 }
 
+
 __STATIC_INLINE uint32_t nrf_gpio_pin_read(uint32_t pin_number)
 {
-    return  ((NRF_GPIO->IN >> pin_number) & 1UL);
+    NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number);
+
+    return ((nrf_gpio_port_in_read(reg) >> pin_number) & 1UL);
 }
 
-__STATIC_INLINE uint32_t nrf_gpio_pins_read(void)
+
+__STATIC_INLINE uint32_t nrf_gpio_pin_out_read(uint32_t pin_number)
 {
-    return NRF_GPIO->IN;
+    NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number);
+
+    return ((nrf_gpio_port_out_read(reg) >> pin_number) & 1UL);
 }
 
+
 __STATIC_INLINE nrf_gpio_pin_sense_t nrf_gpio_pin_sense_get(uint32_t pin_number)
 {
-    return (nrf_gpio_pin_sense_t)((NRF_GPIO->PIN_CNF[pin_number] & GPIO_PIN_CNF_SENSE_Msk) >> GPIO_PIN_CNF_SENSE_Pos);
+    NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number);
+
+    return (nrf_gpio_pin_sense_t)((reg->PIN_CNF[pin_number] &
+                                   GPIO_PIN_CNF_SENSE_Msk) >> GPIO_PIN_CNF_SENSE_Pos);
 }
 
-__STATIC_INLINE void nrf_gpio_word_byte_write(volatile uint32_t * word_address, uint8_t byte_no, uint8_t value)
+
+__STATIC_INLINE void nrf_gpio_port_dir_output_set(NRF_GPIO_Type * p_reg, uint32_t out_mask)
 {
-    *((volatile uint8_t*)(word_address) + byte_no) = value;
+    p_reg->DIRSET = out_mask;
 }
 
-__STATIC_INLINE uint8_t nrf_gpio_word_byte_read(const volatile uint32_t* word_address, uint8_t byte_no)
+
+__STATIC_INLINE void nrf_gpio_port_dir_input_set(NRF_GPIO_Type * p_reg, uint32_t in_mask)
 {
-    return (*((const volatile uint8_t*)(word_address) + byte_no));
+    p_reg->DIRCLR = in_mask;
 }
 
-__STATIC_INLINE void nrf_gpio_port_dir_set(nrf_gpio_port_select_t port, nrf_gpio_port_dir_t dir)
+
+__STATIC_INLINE void nrf_gpio_port_dir_write(NRF_GPIO_Type * p_reg, uint32_t value)
 {
-    if (dir == NRF_GPIO_PORT_DIR_OUTPUT)
+    p_reg->DIR = value;
-    {
-        nrf_gpio_word_byte_write(&NRF_GPIO->DIRSET, port, 0xFF);
 }
-    else
+
+
+__STATIC_INLINE uint32_t nrf_gpio_port_dir_read(NRF_GPIO_Type const * p_reg)
 {
-        nrf_gpio_range_cfg_input(port*8, (port+1)*8-1, NRF_GPIO_PIN_NOPULL);
+    return p_reg->DIR;
+}
+
+
+__STATIC_INLINE uint32_t nrf_gpio_port_in_read(NRF_GPIO_Type const * p_reg)
+{
+    return p_reg->IN;
+}
+
+
+__STATIC_INLINE uint32_t nrf_gpio_port_out_read(NRF_GPIO_Type const * p_reg)
+{
+    return p_reg->OUT;
+}
+
+
+__STATIC_INLINE void nrf_gpio_port_out_write(NRF_GPIO_Type * p_reg, uint32_t value)
+{
+    p_reg->OUT = value;
+}
+
+
+__STATIC_INLINE void nrf_gpio_port_out_set(NRF_GPIO_Type * p_reg, uint32_t set_mask)
+{
+    p_reg->OUTSET = set_mask;
+}
+
+
+__STATIC_INLINE void nrf_gpio_port_out_clear(NRF_GPIO_Type * p_reg, uint32_t clr_mask)
+{
+    p_reg->OUTCLR = clr_mask;
+}
+
+
+__STATIC_INLINE void nrf_gpio_ports_read(uint32_t start_port, uint32_t length, uint32_t * p_masks)
+{
+    NRF_GPIO_Type * gpio_regs[GPIO_COUNT] = GPIO_REG_LIST;
+
+    ASSERT(start_port + length <= GPIO_COUNT);
+    uint32_t i;
+
+    for (i = start_port; i < (start_port + length); i++)
+    {
+        *p_masks = nrf_gpio_port_in_read(gpio_regs[i]);
+        p_masks++;
     }
 }
 
-__STATIC_INLINE uint8_t nrf_gpio_port_read(nrf_gpio_port_select_t port)
+
+#ifdef GPIO_DETECTMODE_DETECTMODE_LDETECT
+__STATIC_INLINE void nrf_gpio_latches_read(uint32_t start_port, uint32_t length, uint32_t * p_masks)
 {
-    return nrf_gpio_word_byte_read(&NRF_GPIO->IN, port);
+    NRF_GPIO_Type * gpio_regs[GPIO_COUNT] = GPIO_REG_LIST;
+    uint32_t        i;
+
+    for (i = start_port; i < (start_port + length); i++)
+    {
+        *p_masks = gpio_regs[i]->LATCH;
+        p_masks++;
+    }
 }
 
-__STATIC_INLINE void nrf_gpio_port_write(nrf_gpio_port_select_t port, uint8_t value)
+
+__STATIC_INLINE uint32_t nrf_gpio_pin_latch_get(uint32_t pin_number)
 {
-    nrf_gpio_word_byte_write(&NRF_GPIO->OUT, port, value);
+    NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number);
+
+    return (reg->LATCH & (1 << pin_number)) ? 1 : 0;
 }
 
-__STATIC_INLINE void nrf_gpio_port_set(nrf_gpio_port_select_t port, uint8_t set_mask)
+
+__STATIC_INLINE void nrf_gpio_pin_latch_clear(uint32_t pin_number)
 {
-    nrf_gpio_word_byte_write(&NRF_GPIO->OUTSET, port, set_mask);
+    NRF_GPIO_Type * reg = nrf_gpio_pin_port_decode(&pin_number);
+
+    reg->LATCH = (1 << pin_number);
 }
 
-__STATIC_INLINE void nrf_gpio_port_clear(nrf_gpio_port_select_t port, uint8_t clr_mask)
+
-{
+#endif
-    nrf_gpio_word_byte_write(&NRF_GPIO->OUTCLR, port, clr_mask);
+#endif // SUPPRESS_INLINE_IMPLEMENTATION
-}
+
-#endif //SUPPRESS_INLINE_IMPLEMENTATION
+/** @} */
-/** @} */
+
+
+#ifdef __cplusplus
+}
+#endif
 
 #endif

nRF5_SDK_11.0.0_89a8197/components/drivers_nrf/hal/nrf_gpiote.h

@@ -1,35 +1,66 @@
-/* Copyright (c) 2015 Nordic Semiconductor. All Rights Reserved.
+/**
+ * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
  * 
- * The information contained herein is property of Nordic Semiconductor ASA.
+ * All rights reserved.
- * Terms and conditions of usage are described in detail in NORDIC
- * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
  * 
- * Licensees are granted free, non-transferable use of the information. NO
+ * Redistribution and use in source and binary forms, with or without modification,
- * WARRANTY of ANY KIND is provided. This heading must NOT be removed from
+ * are permitted provided that the following conditions are met:
- * the file.
+ * 
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ *    list of conditions and the following disclaimer.
+ * 
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ *    Semiconductor ASA integrated circuit in a product or a software update for
+ *    such product, must reproduce the above copyright notice, this list of
+ *    conditions and the following disclaimer in the documentation and/or other
+ *    materials provided with the distribution.
+ * 
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ *    contributors may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ * 
+ * 4. This software, with or without modification, must only be used with a
+ *    Nordic Semiconductor ASA integrated circuit.
+ * 
+ * 5. Any software provided in binary form under this license must not be reverse
+ *    engineered, decompiled, modified and/or disassembled.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  * 
  */
 #ifndef NRF_GPIOTE_H__
 #define NRF_GPIOTE_H__
 
+#include "nrf_peripherals.h"
 #include "nrf.h"
 #include <stdint.h>
 #include <stddef.h>
 #include <stdbool.h>
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifdef GPIOTE_CONFIG_PORT_Msk
+#define GPIOTE_CONFIG_PORT_PIN_Msk (GPIOTE_CONFIG_PORT_Msk | GPIOTE_CONFIG_PSEL_Msk)
+#else
+#define GPIOTE_CONFIG_PORT_PIN_Msk GPIOTE_CONFIG_PSEL_Msk
+#endif
 /**
 * @defgroup nrf_gpiote_abs GPIOTE abstraction
 * @{
 * @ingroup nrf_gpiote
 * @brief GPIOTE abstraction for configuration of channels.
 */
-#ifdef NRF51
-#define NUMBER_OF_GPIO_TE 4
-#elif defined(NRF52)
-#define NUMBER_OF_GPIO_TE 8
-#else
-#error "Chip family not specified"
-#endif
 
  /**
  * @enum nrf_gpiote_polarity_t
@@ -62,13 +93,13 @@ typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */
     NRF_GPIOTE_TASKS_OUT_1     = offsetof(NRF_GPIOTE_Type, TASKS_OUT[1]), /**< Out task 1.*/
     NRF_GPIOTE_TASKS_OUT_2     = offsetof(NRF_GPIOTE_Type, TASKS_OUT[2]), /**< Out task 2.*/
     NRF_GPIOTE_TASKS_OUT_3     = offsetof(NRF_GPIOTE_Type, TASKS_OUT[3]), /**< Out task 3.*/
-#if (NUMBER_OF_GPIO_TE == 8)
+#if (GPIOTE_CH_NUM > 4) || defined(__SDK_DOXYGEN__)
     NRF_GPIOTE_TASKS_OUT_4     = offsetof(NRF_GPIOTE_Type, TASKS_OUT[4]), /**< Out task 4.*/
     NRF_GPIOTE_TASKS_OUT_5     = offsetof(NRF_GPIOTE_Type, TASKS_OUT[5]), /**< Out task 5.*/
     NRF_GPIOTE_TASKS_OUT_6     = offsetof(NRF_GPIOTE_Type, TASKS_OUT[6]), /**< Out task 6.*/
     NRF_GPIOTE_TASKS_OUT_7     = offsetof(NRF_GPIOTE_Type, TASKS_OUT[7]), /**< Out task 7.*/
 #endif
-#ifdef NRF52
+#if defined(GPIOTE_FEATURE_SET_PRESENT) || defined(__SDK_DOXYGEN__)
     NRF_GPIOTE_TASKS_SET_0     = offsetof(NRF_GPIOTE_Type, TASKS_SET[0]), /**< Set task 0.*/
     NRF_GPIOTE_TASKS_SET_1     = offsetof(NRF_GPIOTE_Type, TASKS_SET[1]), /**< Set task 1.*/
     NRF_GPIOTE_TASKS_SET_2     = offsetof(NRF_GPIOTE_Type, TASKS_SET[2]), /**< Set task 2.*/
@@ -77,6 +108,8 @@ typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */
     NRF_GPIOTE_TASKS_SET_5     = offsetof(NRF_GPIOTE_Type, TASKS_SET[5]), /**< Set task 5.*/
     NRF_GPIOTE_TASKS_SET_6     = offsetof(NRF_GPIOTE_Type, TASKS_SET[6]), /**< Set task 6.*/
     NRF_GPIOTE_TASKS_SET_7     = offsetof(NRF_GPIOTE_Type, TASKS_SET[7]), /**< Set task 7.*/
+#endif
+#if defined(GPIOTE_FEATURE_CLR_PRESENT) || defined(__SDK_DOXYGEN__)
     NRF_GPIOTE_TASKS_CLR_0     = offsetof(NRF_GPIOTE_Type, TASKS_CLR[0]), /**< Clear task 0.*/
     NRF_GPIOTE_TASKS_CLR_1     = offsetof(NRF_GPIOTE_Type, TASKS_CLR[1]), /**< Clear task 1.*/
     NRF_GPIOTE_TASKS_CLR_2     = offsetof(NRF_GPIOTE_Type, TASKS_CLR[2]), /**< Clear task 2.*/
@@ -98,7 +131,7 @@ typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */
     NRF_GPIOTE_EVENTS_IN_1     = offsetof(NRF_GPIOTE_Type, EVENTS_IN[1]), /**< In event 1.*/
     NRF_GPIOTE_EVENTS_IN_2     = offsetof(NRF_GPIOTE_Type, EVENTS_IN[2]), /**< In event 2.*/
     NRF_GPIOTE_EVENTS_IN_3     = offsetof(NRF_GPIOTE_Type, EVENTS_IN[3]), /**< In event 3.*/
-#if (NUMBER_OF_GPIO_TE == 8)
+#if (GPIOTE_CH_NUM > 4) || defined(__SDK_DOXYGEN__)
     NRF_GPIOTE_EVENTS_IN_4     = offsetof(NRF_GPIOTE_Type, EVENTS_IN[4]), /**< In event 4.*/
     NRF_GPIOTE_EVENTS_IN_5     = offsetof(NRF_GPIOTE_Type, EVENTS_IN[5]), /**< In event 5.*/
     NRF_GPIOTE_EVENTS_IN_6     = offsetof(NRF_GPIOTE_Type, EVENTS_IN[6]), /**< In event 6.*/
@@ -118,7 +151,7 @@ typedef enum
     NRF_GPIOTE_INT_IN1_MASK  = GPIOTE_INTENSET_IN1_Msk,  /**< GPIOTE interrupt from IN1. */
     NRF_GPIOTE_INT_IN2_MASK  = GPIOTE_INTENSET_IN2_Msk,  /**< GPIOTE interrupt from IN2. */
     NRF_GPIOTE_INT_IN3_MASK  = GPIOTE_INTENSET_IN3_Msk,  /**< GPIOTE interrupt from IN3. */
-#if (NUMBER_OF_GPIO_TE == 8)
+#if (GPIOTE_CH_NUM > 4) || defined(__SDK_DOXYGEN__)
     NRF_GPIOTE_INT_IN4_MASK  = GPIOTE_INTENSET_IN4_Msk,  /**< GPIOTE interrupt from IN4. */
     NRF_GPIOTE_INT_IN5_MASK  = GPIOTE_INTENSET_IN5_Msk,  /**< GPIOTE interrupt from IN5. */
     NRF_GPIOTE_INT_IN6_MASK  = GPIOTE_INTENSET_IN6_Msk,  /**< GPIOTE interrupt from IN6. */
@@ -127,17 +160,16 @@ typedef enum
     NRF_GPIOTE_INT_PORT_MASK = (int)GPIOTE_INTENSET_PORT_Msk, /**< GPIOTE interrupt from PORT event. */
 } nrf_gpiote_int_t;
 
-#if (NUMBER_OF_GPIO_TE == 4)
 #define NRF_GPIOTE_INT_IN_MASK (NRF_GPIOTE_INT_IN0_MASK | NRF_GPIOTE_INT_IN1_MASK |\
                                 NRF_GPIOTE_INT_IN2_MASK | NRF_GPIOTE_INT_IN3_MASK)
-#elif (NUMBER_OF_GPIO_TE == 8)
+#if (GPIOTE_CH_NUM > 4)
+#undef NRF_GPIOTE_INT_IN_MASK
 #define NRF_GPIOTE_INT_IN_MASK (NRF_GPIOTE_INT_IN0_MASK | NRF_GPIOTE_INT_IN1_MASK |\
                                 NRF_GPIOTE_INT_IN2_MASK | NRF_GPIOTE_INT_IN3_MASK |\
                                 NRF_GPIOTE_INT_IN4_MASK | NRF_GPIOTE_INT_IN5_MASK |\
                                 NRF_GPIOTE_INT_IN6_MASK | NRF_GPIOTE_INT_IN7_MASK)
-#else
-#error "Unexpected number of GPIO Tasks and Events"
 #endif
+
 /**
  * @brief Function for activating a specific GPIOTE task.
  *
@@ -252,7 +284,7 @@ __STATIC_INLINE void nrf_gpiote_task_disable(uint32_t idx);
  * @param[in]  idx        Task-Event index.
  * @param[in]  pin        Pin associated with event.
  * @param[in]  polarity   Transition that should generate an event.
- * @param[in]  init_val   Initial value of pin.
+ * @param[in]  init_val   Initial value of the pin.
  */
 __STATIC_INLINE void nrf_gpiote_task_configure(uint32_t idx, uint32_t pin,
                                                nrf_gpiote_polarity_t polarity,
@@ -328,14 +360,14 @@ __STATIC_INLINE void nrf_gpiote_event_disable(uint32_t idx)
 
 __STATIC_INLINE void nrf_gpiote_event_configure(uint32_t idx, uint32_t pin, nrf_gpiote_polarity_t polarity)
 {
-  NRF_GPIOTE->CONFIG[idx] &= ~(GPIOTE_CONFIG_PSEL_Msk | GPIOTE_CONFIG_POLARITY_Msk);
+  NRF_GPIOTE->CONFIG[idx] &= ~(GPIOTE_CONFIG_PORT_PIN_Msk | GPIOTE_CONFIG_POLARITY_Msk);
-  NRF_GPIOTE->CONFIG[idx] |= ((pin << GPIOTE_CONFIG_PSEL_Pos) & GPIOTE_CONFIG_PSEL_Msk) |
+  NRF_GPIOTE->CONFIG[idx] |= ((pin << GPIOTE_CONFIG_PSEL_Pos) & GPIOTE_CONFIG_PORT_PIN_Msk) |
                               ((polarity << GPIOTE_CONFIG_POLARITY_Pos) & GPIOTE_CONFIG_POLARITY_Msk);
 }
 
 __STATIC_INLINE uint32_t nrf_gpiote_event_pin_get(uint32_t idx)
 {
-    return ((NRF_GPIOTE->CONFIG[idx] & GPIOTE_CONFIG_PSEL_Msk) >> GPIOTE_CONFIG_PSEL_Pos);
+    return ((NRF_GPIOTE->CONFIG[idx] & GPIOTE_CONFIG_PORT_PIN_Msk) >> GPIOTE_CONFIG_PSEL_Pos);
 }
 
 __STATIC_INLINE nrf_gpiote_polarity_t nrf_gpiote_event_polarity_get(uint32_t idx)
@@ -346,14 +378,16 @@ __STATIC_INLINE nrf_gpiote_polarity_t nrf_gpiote_event_polarity_get(uint32_t idx
 __STATIC_INLINE void nrf_gpiote_task_enable(uint32_t idx)
 {
     uint32_t final_config = NRF_GPIOTE->CONFIG[idx] | GPIOTE_CONFIG_MODE_Task;
+#ifdef NRF51
     /* Workaround for the OUTINIT PAN. When nrf_gpiote_task_config() is called a glitch happens
     on the GPIO if the GPIO in question is already assigned to GPIOTE and the pin is in the
     correct state in GPIOTE but not in the OUT register. */
-    /* Configure channel to Pin31, not connected to the pin, and configure as a tasks that will set it to proper level */
+    /* Configure channel to not existing, not connected to the pin, and configure as a tasks that will set it to proper level */
-    NRF_GPIOTE->CONFIG[idx] = final_config | ((31 << GPIOTE_CONFIG_PSEL_Pos) & GPIOTE_CONFIG_PSEL_Msk);
+    NRF_GPIOTE->CONFIG[idx] = final_config | (((31) << GPIOTE_CONFIG_PSEL_Pos) & GPIOTE_CONFIG_PORT_PIN_Msk);
     __NOP();
     __NOP();
     __NOP();
+#endif
     NRF_GPIOTE->CONFIG[idx] = final_config;
 }
 
@@ -366,11 +400,11 @@ __STATIC_INLINE void nrf_gpiote_task_configure(uint32_t idx, uint32_t pin,
                                                 nrf_gpiote_polarity_t polarity,
                                                 nrf_gpiote_outinit_t  init_val)
 {
-  NRF_GPIOTE->CONFIG[idx] &= ~(GPIOTE_CONFIG_PSEL_Msk |
+  NRF_GPIOTE->CONFIG[idx] &= ~(GPIOTE_CONFIG_PORT_PIN_Msk |
                                GPIOTE_CONFIG_POLARITY_Msk |
                                GPIOTE_CONFIG_OUTINIT_Msk);
 
-  NRF_GPIOTE->CONFIG[idx] |= ((pin << GPIOTE_CONFIG_PSEL_Pos) & GPIOTE_CONFIG_PSEL_Msk) |
+  NRF_GPIOTE->CONFIG[idx] |= ((pin << GPIOTE_CONFIG_PSEL_Pos) & GPIOTE_CONFIG_PORT_PIN_Msk) |
                              ((polarity << GPIOTE_CONFIG_POLARITY_Pos) & GPIOTE_CONFIG_POLARITY_Msk) |
                              ((init_val << GPIOTE_CONFIG_OUTINIT_Pos) & GPIOTE_CONFIG_OUTINIT_Msk);
 }
@@ -388,4 +422,9 @@ __STATIC_INLINE void nrf_gpiote_te_default(uint32_t idx)
 #endif //SUPPRESS_INLINE_IMPLEMENTATION
 /** @} */
 
+
+#ifdef __cplusplus
+}
+#endif
+
 #endif

nRF5_SDK_11.0.0_89a8197/components/drivers_nrf/hal/nrf_i2s.h

@@ -1,15 +1,42 @@
-/* Copyright (c) 2015 Nordic Semiconductor. All Rights Reserved.
+/**
+ * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
  * 
- * The information contained herein is property of Nordic Semiconductor ASA.
+ * All rights reserved.
- * Terms and conditions of usage are described in detail in NORDIC
- * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
  * 
- * Licensees are granted free, non-transferable use of the information. NO
+ * Redistribution and use in source and binary forms, with or without modification,
- * WARRANTY of ANY KIND is provided. This heading must NOT be removed from
+ * are permitted provided that the following conditions are met:
- * the file.
+ * 
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ *    list of conditions and the following disclaimer.
+ * 
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ *    Semiconductor ASA integrated circuit in a product or a software update for
+ *    such product, must reproduce the above copyright notice, this list of
+ *    conditions and the following disclaimer in the documentation and/or other
+ *    materials provided with the distribution.
+ * 
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ *    contributors may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ * 
+ * 4. This software, with or without modification, must only be used with a
+ *    Nordic Semiconductor ASA integrated circuit.
+ * 
+ * 5. Any software provided in binary form under this license must not be reverse
+ *    engineered, decompiled, modified and/or disassembled.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  * 
  */
-
 /**
  * @defgroup nrf_i2s_hal I2S HAL
  * @{
@@ -27,6 +54,10 @@
 
 #include "nrf.h"
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 
 /**
  * @brief This value can be provided as a parameter for the @ref nrf_i2s_pins_set
@@ -378,6 +409,10 @@ __STATIC_INLINE void nrf_i2s_event_clear(NRF_I2S_Type * p_i2s,
                                          nrf_i2s_event_t event)
 {
     *((volatile uint32_t *)((uint8_t *)p_i2s + (uint32_t)event)) = 0x0UL;
+#if __CORTEX_M == 0x04
+    volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)p_i2s + (uint32_t)event));
+    (void)dummy;
+#endif
 }
 
 __STATIC_INLINE bool nrf_i2s_event_check(NRF_I2S_Type const * p_i2s,
@@ -518,6 +553,11 @@ __STATIC_INLINE uint32_t * nrf_i2s_tx_buffer_get(NRF_I2S_Type const * p_i2s)
 
 #endif // SUPPRESS_INLINE_IMPLEMENTATION
 
+
+#ifdef __cplusplus
+}
+#endif
+
 #endif // NRF_I2S_H__
 
 /** @} */

nRF5_SDK_11.0.0_89a8197/components/drivers_nrf/hal/nrf_lpcomp.h

@@ -1,15 +1,42 @@
-/* Copyright (c) 2014 Nordic Semiconductor. All Rights Reserved.
+/**
+ * Copyright (c) 2014 - 2017, Nordic Semiconductor ASA
  * 
- * The information contained herein is property of Nordic Semiconductor ASA.
+ * All rights reserved.
- * Terms and conditions of usage are described in detail in NORDIC
- * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
  * 
- * Licensees are granted free, non-transferable use of the information. NO
+ * Redistribution and use in source and binary forms, with or without modification,
- * WARRANTY of ANY KIND is provided. This heading must NOT be removed from
+ * are permitted provided that the following conditions are met:
- * the file.
+ * 
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ *    list of conditions and the following disclaimer.
+ * 
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ *    Semiconductor ASA integrated circuit in a product or a software update for
+ *    such product, must reproduce the above copyright notice, this list of
+ *    conditions and the following disclaimer in the documentation and/or other
+ *    materials provided with the distribution.
+ * 
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ *    contributors may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ * 
+ * 4. This software, with or without modification, must only be used with a
+ *    Nordic Semiconductor ASA integrated circuit.
+ * 
+ * 5. Any software provided in binary form under this license must not be reverse
+ *    engineered, decompiled, modified and/or disassembled.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  * 
  */
-
 /**
  * @file
  * @brief LPCOMP HAL API.
@@ -26,18 +53,23 @@
  */
 
 #include "nrf.h"
+#include "nrf_peripherals.h"
 
 #include <stdbool.h>
 #include <stddef.h>
 #include <stdint.h>
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 /**
  * @enum nrf_lpcomp_ref_t
  * @brief LPCOMP reference selection.
  */
 typedef enum
 {
-#ifdef NRF51
+#if (LPCOMP_REFSEL_RESOLUTION == 8) || defined(__SDK_DOXYGEN__)
     NRF_LPCOMP_REF_SUPPLY_1_8   = LPCOMP_REFSEL_REFSEL_SupplyOneEighthPrescaling,    /**< Use supply with a 1/8 prescaler as reference. */
     NRF_LPCOMP_REF_SUPPLY_2_8   = LPCOMP_REFSEL_REFSEL_SupplyTwoEighthsPrescaling,   /**< Use supply with a 2/8 prescaler as reference. */
     NRF_LPCOMP_REF_SUPPLY_3_8   = LPCOMP_REFSEL_REFSEL_SupplyThreeEighthsPrescaling, /**< Use supply with a 3/8 prescaler as reference. */
@@ -45,7 +77,7 @@ typedef enum
     NRF_LPCOMP_REF_SUPPLY_5_8   = LPCOMP_REFSEL_REFSEL_SupplyFiveEighthsPrescaling,  /**< Use supply with a 5/8 prescaler as reference. */
     NRF_LPCOMP_REF_SUPPLY_6_8   = LPCOMP_REFSEL_REFSEL_SupplySixEighthsPrescaling,   /**< Use supply with a 6/8 prescaler as reference. */
     NRF_LPCOMP_REF_SUPPLY_7_8   = LPCOMP_REFSEL_REFSEL_SupplySevenEighthsPrescaling, /**< Use supply with a 7/8 prescaler as reference. */
-#elif defined NRF52
+#elif (LPCOMP_REFSEL_RESOLUTION == 16) || defined(__SDK_DOXYGEN__)
     NRF_LPCOMP_REF_SUPPLY_1_8   = LPCOMP_REFSEL_REFSEL_Ref1_8Vdd, /**< Use supply with a 1/8 prescaler as reference. */
     NRF_LPCOMP_REF_SUPPLY_2_8   = LPCOMP_REFSEL_REFSEL_Ref2_8Vdd, /**< Use supply with a 2/8 prescaler as reference. */
     NRF_LPCOMP_REF_SUPPLY_3_8   = LPCOMP_REFSEL_REFSEL_Ref3_8Vdd, /**< Use supply with a 3/8 prescaler as reference. */
@@ -54,13 +86,13 @@ typedef enum
     NRF_LPCOMP_REF_SUPPLY_6_8   = LPCOMP_REFSEL_REFSEL_Ref6_8Vdd, /**< Use supply with a 6/8 prescaler as reference. */
     NRF_LPCOMP_REF_SUPPLY_7_8   = LPCOMP_REFSEL_REFSEL_Ref7_8Vdd, /**< Use supply with a 7/8 prescaler as reference. */
     NRF_LPCOMP_REF_SUPPLY_1_16  = LPCOMP_REFSEL_REFSEL_Ref1_16Vdd, /**< Use supply with a 1/16 prescaler as reference. */
-    NRF_LPCOMP_REF_SUPPLY_3_16  = LPCOMP_REFSEL_REFSEL_Ref1_16Vdd, /**< Use supply with a 3/16 prescaler as reference. */
+    NRF_LPCOMP_REF_SUPPLY_3_16  = LPCOMP_REFSEL_REFSEL_Ref3_16Vdd, /**< Use supply with a 3/16 prescaler as reference. */
-    NRF_LPCOMP_REF_SUPPLY_5_16  = LPCOMP_REFSEL_REFSEL_Ref1_16Vdd, /**< Use supply with a 5/16 prescaler as reference. */
+    NRF_LPCOMP_REF_SUPPLY_5_16  = LPCOMP_REFSEL_REFSEL_Ref5_16Vdd, /**< Use supply with a 5/16 prescaler as reference. */
-    NRF_LPCOMP_REF_SUPPLY_7_16  = LPCOMP_REFSEL_REFSEL_Ref1_16Vdd, /**< Use supply with a 7/16 prescaler as reference. */
+    NRF_LPCOMP_REF_SUPPLY_7_16  = LPCOMP_REFSEL_REFSEL_Ref7_16Vdd, /**< Use supply with a 7/16 prescaler as reference. */
-    NRF_LPCOMP_REF_SUPPLY_9_16  = LPCOMP_REFSEL_REFSEL_Ref1_16Vdd, /**< Use supply with a 9/16 prescaler as reference. */
+    NRF_LPCOMP_REF_SUPPLY_9_16  = LPCOMP_REFSEL_REFSEL_Ref9_16Vdd, /**< Use supply with a 9/16 prescaler as reference. */
-    NRF_LPCOMP_REF_SUPPLY_11_16 = LPCOMP_REFSEL_REFSEL_Ref1_16Vdd, /**< Use supply with a 11/16 prescaler as reference. */
+    NRF_LPCOMP_REF_SUPPLY_11_16 = LPCOMP_REFSEL_REFSEL_Ref11_16Vdd, /**< Use supply with a 11/16 prescaler as reference. */
-    NRF_LPCOMP_REF_SUPPLY_13_16 = LPCOMP_REFSEL_REFSEL_Ref1_16Vdd, /**< Use supply with a 13/16 prescaler as reference. */
+    NRF_LPCOMP_REF_SUPPLY_13_16 = LPCOMP_REFSEL_REFSEL_Ref13_16Vdd, /**< Use supply with a 13/16 prescaler as reference. */
-    NRF_LPCOMP_REF_SUPPLY_15_16 = LPCOMP_REFSEL_REFSEL_Ref1_16Vdd, /**< Use supply with a 15/16 prescaler as reference. */
+    NRF_LPCOMP_REF_SUPPLY_15_16 = LPCOMP_REFSEL_REFSEL_Ref15_16Vdd, /**< Use supply with a 15/16 prescaler as reference. */
 #endif
     NRF_LPCOMP_REF_EXT_REF0        = LPCOMP_REFSEL_REFSEL_ARef |
                        (LPCOMP_EXTREFSEL_EXTREFSEL_AnalogReference0 << 16), /**< External reference 0. */
@@ -132,12 +164,26 @@ typedef enum
     NRF_LPCOMP_SHORT_READY_SAMPLE_MASK = LPCOMP_SHORTS_READY_SAMPLE_Msk /*!< Short between READY event and SAMPLE task. */
 } nrf_lpcomp_short_mask_t;
 
+#ifdef LPCOMP_FEATURE_HYST_PRESENT
+/**
+ * @enum nrf_lpcomp_hysteresis_t
+ * @brief LPCOMP hysteresis.
+ */
+typedef enum
+{
+    NRF_LPCOMP_HYST_NOHYST              = LPCOMP_HYST_HYST_NoHyst,      /**< Comparator hysteresis disabled. */
+    NRF_LPCOMP_HYST_50mV                = LPCOMP_HYST_HYST_Hyst50mV     /**< Comparator hysteresis enabled (typ. 50 mV). */
+}nrf_lpcomp_hysteresis_t;
+#endif // LPCOMP_FEATURE_HYST_PRESENT
 
 /** @brief LPCOMP configuration. */
 typedef struct
 {
     nrf_lpcomp_ref_t            reference; /**< LPCOMP reference. */
     nrf_lpcomp_detect_t         detection; /**< LPCOMP detection type. */
+#ifdef LPCOMP_FEATURE_HYST_PRESENT
+    nrf_lpcomp_hysteresis_t     hyst;      /**< LPCOMP hysteresis. */
+#endif // LPCOMP_FEATURE_HYST_PRESENT
 } nrf_lpcomp_config_t;
 
 /** Default LPCOMP configuration. */
@@ -167,6 +213,9 @@ __STATIC_INLINE void nrf_lpcomp_configure(const nrf_lpcomp_config_t * p_config)
 
     NRF_LPCOMP->ANADETECT   =
         (p_config->detection << LPCOMP_ANADETECT_ANADETECT_Pos) & LPCOMP_ANADETECT_ANADETECT_Msk;
+#ifdef LPCOMP_FEATURE_HYST_PRESENT
+    NRF_LPCOMP->HYST        = ((p_config->hyst) << LPCOMP_HYST_HYST_Pos) & LPCOMP_HYST_HYST_Msk;
+#endif //LPCOMP_FEATURE_HYST_PRESENT
     NRF_LPCOMP->SHORTS      = 0;
     NRF_LPCOMP->INTENCLR    = LPCOMP_INTENCLR_CROSS_Msk | LPCOMP_INTENCLR_UP_Msk |
                                LPCOMP_INTENCLR_DOWN_Msk | LPCOMP_INTENCLR_READY_Msk;
@@ -345,6 +394,10 @@ __STATIC_INLINE void nrf_lpcomp_task_trigger(nrf_lpcomp_task_t lpcomp_task)
 __STATIC_INLINE void nrf_lpcomp_event_clear(nrf_lpcomp_event_t lpcomp_event)
 {
     *( (volatile uint32_t *)( (uint8_t *)NRF_LPCOMP + lpcomp_event) ) = 0;
+#if __CORTEX_M == 0x04
+    volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)NRF_LPCOMP + lpcomp_event));
+    (void)dummy;
+#endif
 }
 
 
@@ -364,4 +417,9 @@ __STATIC_INLINE bool nrf_lpcomp_event_check(nrf_lpcomp_event_t lpcomp_event)
  *@}
  **/
 
+
+#ifdef __cplusplus
+}
+#endif
+
 #endif /* NRF_LPCOMP_H_ */

nRF5_SDK_11.0.0_89a8197/components/drivers_nrf/hal/nrf_nvmc.c

@@ -1,16 +1,42 @@
-/* Copyright (c) 2012 Nordic Semiconductor. All Rights Reserved.
+/**
+ * Copyright (c) 2012 - 2017, Nordic Semiconductor ASA
  * 
-* The information contained herein is property of Nordic Semiconductor ASA.
+ * All rights reserved.
-* Terms and conditions of usage are described in detail in NORDIC
-* SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT. 
  * 
-* Licensees are granted free, non-transferable use of the information. NO
+ * Redistribution and use in source and binary forms, with or without modification,
-* WARRANTY of ANY KIND is provided. This heading must NOT be removed from
+ * are permitted provided that the following conditions are met:
-* the file.
+ * 
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ *    list of conditions and the following disclaimer.
+ * 
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ *    Semiconductor ASA integrated circuit in a product or a software update for
+ *    such product, must reproduce the above copyright notice, this list of
+ *    conditions and the following disclaimer in the documentation and/or other
+ *    materials provided with the distribution.
+ * 
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ *    contributors may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ * 
+ * 4. This software, with or without modification, must only be used with a
+ *    Nordic Semiconductor ASA integrated circuit.
+ * 
+ * 5. Any software provided in binary form under this license must not be reverse
+ *    engineered, decompiled, modified and/or disassembled.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  * 
-* $LastChangedRevision: 17685 $
  */
-
 /**
  *@file
  *@brief NMVC driver implementation
@@ -21,24 +47,26 @@
 #include "nrf_nvmc.h"
 
 
+static inline void wait_for_flash_ready(void)
+{
+    while (NRF_NVMC->READY == NVMC_READY_READY_Busy) {;}
+}
+
+
 void nrf_nvmc_page_erase(uint32_t address)
 {
     // Enable erase.
     NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Een;
-  while (NRF_NVMC->READY == NVMC_READY_READY_Busy)
+    __ISB();
-  {
+    __DSB();
-  }
 
     // Erase the page
     NRF_NVMC->ERASEPAGE = address;
-  while (NRF_NVMC->READY == NVMC_READY_READY_Busy)
+    wait_for_flash_ready();
-  {
-  }
 
     NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Ren;
-  while (NRF_NVMC->READY == NVMC_READY_READY_Busy)
+    __ISB();
-  {
+    __DSB();
-  }
 }
 
 
@@ -50,68 +78,59 @@ void nrf_nvmc_write_byte(uint32_t address, uint8_t value)
     value32 = value32 + ((uint32_t)value << (byte_shift << 3));
 
     // Enable write.
-  NRF_NVMC->CONFIG = (NVMC_CONFIG_WEN_Wen << NVMC_CONFIG_WEN_Pos);
+    NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Wen;
-  while (NRF_NVMC->READY == NVMC_READY_READY_Busy)
+    __ISB();
-  {
+    __DSB();
-  }
 
     *(uint32_t*)address32 = value32;
-  while(NRF_NVMC->READY == NVMC_READY_READY_Busy)
+    wait_for_flash_ready();
-  {
+
+    NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Ren;
+    __ISB();
+    __DSB();
 }
 
-  NRF_NVMC->CONFIG = (NVMC_CONFIG_WEN_Ren << NVMC_CONFIG_WEN_Pos);
-  {
-  }
-}
 
 void nrf_nvmc_write_word(uint32_t address, uint32_t value)
 {
     // Enable write.
     NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Wen;
-  while (NRF_NVMC->READY == NVMC_READY_READY_Busy){
+    __ISB();
-  }
+    __DSB();
 
     *(uint32_t*)address = value;
-  while (NRF_NVMC->READY == NVMC_READY_READY_Busy){
+    wait_for_flash_ready();
-  }
 
     NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Ren;
-  while (NRF_NVMC->READY == NVMC_READY_READY_Busy)
+    __ISB();
-  {
+    __DSB();
-  }
 }
 
+
 void nrf_nvmc_write_bytes(uint32_t address, const uint8_t * src, uint32_t num_bytes)
 {
-  uint32_t i;
+    for (uint32_t i = 0; i < num_bytes; i++)
-  for(i=0;i<num_bytes;i++)
     {
        nrf_nvmc_write_byte(address + i, src[i]);
     }
 }
 
+
 void nrf_nvmc_write_words(uint32_t address, const uint32_t * src, uint32_t num_words)
 {
-  uint32_t i;
-
     // Enable write.
     NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Wen;
-  while (NRF_NVMC->READY == NVMC_READY_READY_Busy)
+    __ISB();
-  {
+    __DSB();
-  }
 
-  for(i=0;i<num_words;i++)
+    for (uint32_t i = 0; i < num_words; i++)
     {
         ((uint32_t*)address)[i] = src[i];
-    while (NRF_NVMC->READY == NVMC_READY_READY_Busy)
+        wait_for_flash_ready();
-    {
-    }
     }
 
     NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Ren;
-  while (NRF_NVMC->READY == NVMC_READY_READY_Busy)
+    __ISB();
-  {
+    __DSB();
-  }
 }
 

nRF5_SDK_11.0.0_89a8197/components/drivers_nrf/hal/nrf_nvmc.h

@@ -1,16 +1,42 @@
-/* Copyright (c) 2012 Nordic Semiconductor. All Rights Reserved.
+/**
+ * Copyright (c) 2012 - 2017, Nordic Semiconductor ASA
  * 
- * The information contained herein is confidential property of Nordic 
+ * All rights reserved.
- * Semiconductor ASA.Terms and conditions of usage are described in detail 
- * in NORDIC SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT. 
  * 
- * Licensees are granted free, non-transferable use of the information. NO
+ * Redistribution and use in source and binary forms, with or without modification,
- * WARRANTY of ANY KIND is provided. This heading must NOT be removed from
+ * are permitted provided that the following conditions are met:
- * the file.
+ * 
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ *    list of conditions and the following disclaimer.
+ * 
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ *    Semiconductor ASA integrated circuit in a product or a software update for
+ *    such product, must reproduce the above copyright notice, this list of
+ *    conditions and the following disclaimer in the documentation and/or other
+ *    materials provided with the distribution.
+ * 
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ *    contributors may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ * 
+ * 4. This software, with or without modification, must only be used with a
+ *    Nordic Semiconductor ASA integrated circuit.
+ * 
+ * 5. Any software provided in binary form under this license must not be reverse
+ *    engineered, decompiled, modified and/or disassembled.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  * 
- * $LastChangedRevision: 17685 $
  */
-
 /**
  * @file
  * @brief NMVC driver API.
@@ -21,6 +47,10 @@
 
 #include <stdint.h>
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 
 /**
  * @defgroup nrf_nvmc Non-volatile memory controller
@@ -79,11 +109,16 @@ void nrf_nvmc_write_bytes(uint32_t  address, const uint8_t * src, uint32_t num_b
  *
  * @param address   Address to write to.
  * @param src       Pointer to data to copy from.
- * @param num_words Number of bytes in src to write.
+ * @param num_words Number of words in src to write.
  */
 void nrf_nvmc_write_words(uint32_t address, const uint32_t * src, uint32_t num_words);
 
 
+
+#ifdef __cplusplus
+}
+#endif
+
 #endif // NRF_NVMC_H__
 /** @} */
 

nRF5_SDK_11.0.0_89a8197/components/drivers_nrf/hal/nrf_pdm.h

@@ -1,16 +1,42 @@
-/* Copyright (c) 2015 Nordic Semiconductor. All Rights Reserved.
+/**
+ * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
  * 
- * The information contained herein is property of Nordic Semiconductor ASA.
+ * All rights reserved.
- * Terms and conditions of usage are described in detail in NORDIC
- * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
  * 
- * Licensees are granted free, non-transferable use of the information. NO
+ * Redistribution and use in source and binary forms, with or without modification,
- * WARRANTY of ANY KIND is provided. This heading must NOT be removed from
+ * are permitted provided that the following conditions are met:
- * the file.
+ * 
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ *    list of conditions and the following disclaimer.
+ * 
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ *    Semiconductor ASA integrated circuit in a product or a software update for
+ *    such product, must reproduce the above copyright notice, this list of
+ *    conditions and the following disclaimer in the documentation and/or other
+ *    materials provided with the distribution.
+ * 
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ *    contributors may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ * 
+ * 4. This software, with or without modification, must only be used with a
+ *    Nordic Semiconductor ASA integrated circuit.
+ * 
+ * 5. Any software provided in binary form under this license must not be reverse
+ *    engineered, decompiled, modified and/or disassembled.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  * 
  */
-
-
 #ifndef NRF_PDM_H_
 #define NRF_PDM_H_
 
@@ -27,6 +53,10 @@
 #include "nrf.h"
 #include "nrf_assert.h"
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 
 #define NRF_PDM_GAIN_MINIMUM  0x00
 #define NRF_PDM_GAIN_DEFAULT  0x28
@@ -142,6 +172,10 @@ __STATIC_INLINE bool nrf_pdm_event_check(nrf_pdm_event_t pdm_event)
 __STATIC_INLINE void nrf_pdm_event_clear(nrf_pdm_event_t pdm_event)
 {
     *((volatile uint32_t *)((uint8_t *)NRF_PDM + (uint32_t)pdm_event)) = 0x0UL;
+#if __CORTEX_M == 0x04
+    volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)NRF_PDM + (uint32_t)pdm_event));
+    (void)dummy;
+#endif
 }
 
 
@@ -281,10 +315,8 @@ __STATIC_INLINE nrf_pdm_freq_t nrf_pdm_clock_get(void)
  */
 __STATIC_INLINE void nrf_pdm_psel_connect(uint32_t psel_clk, uint32_t psel_din)
 {
-    NRF_PDM->PSEL.CLK = ((psel_clk << PDM_PSEL_CLK_PIN_Pos) & PDM_PSEL_CLK_PIN_Msk)
+    NRF_PDM->PSEL.CLK = psel_clk;
-            | ((PDM_PSEL_CLK_CONNECT_Connected << PDM_PSEL_CLK_CONNECT_Pos) & PDM_PSEL_CLK_CONNECT_Msk);
+    NRF_PDM->PSEL.DIN = psel_din;
-    NRF_PDM->PSEL.DIN = ((psel_din << PDM_PSEL_DIN_PIN_Pos) & PDM_PSEL_DIN_PIN_Msk)
-            | ((PDM_PSEL_DIN_CONNECT_Connected << PDM_PSEL_CLK_CONNECT_Pos) & PDM_PSEL_DIN_CONNECT_Msk);
 }
 
 /**
@@ -356,4 +388,9 @@ __STATIC_INLINE uint32_t * nrf_pdm_buffer_get()
  *@}
  **/
 
+
+#ifdef __cplusplus
+}
+#endif
+
 #endif /* NRF_PDM_H_ */

nRF5_SDK_11.0.0_89a8197/components/drivers_nrf/hal/nrf_peripherals.h

@@ -0,0 +1,73 @@
+/**
+ * Copyright (c) 2016 - 2017, Nordic Semiconductor ASA
+ * 
+ * All rights reserved.
+ * 
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ * 
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ *    list of conditions and the following disclaimer.
+ * 
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ *    Semiconductor ASA integrated circuit in a product or a software update for
+ *    such product, must reproduce the above copyright notice, this list of
+ *    conditions and the following disclaimer in the documentation and/or other
+ *    materials provided with the distribution.
+ * 
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ *    contributors may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ * 
+ * 4. This software, with or without modification, must only be used with a
+ *    Nordic Semiconductor ASA integrated circuit.
+ * 
+ * 5. Any software provided in binary form under this license must not be reverse
+ *    engineered, decompiled, modified and/or disassembled.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ */
+#ifndef NRF_PERIPHERALS_H
+#define NRF_PERIPHERALS_H
+
+/*lint ++flb "Enter library region */
+
+#ifdef NRF51422
+#include "nrf51422_peripherals.h"
+#endif
+
+#ifdef NRF51802
+#include "nrf51802_peripherals.h"
+#endif
+
+#ifdef NRF51822
+#include "nrf51822_peripherals.h"
+#endif
+
+#ifdef NRF52810_XXAA
+#include "nrf52810_peripherals.h"
+#endif
+
+#ifdef NRF52832_XXAA
+#include "nrf52832_peripherals.h"
+#endif
+
+#ifdef NRF52840_XXAA
+#include "nrf52840_peripherals.h"
+#endif
+
+
+/*lint --flb "Leave library region" */
+
+#endif /* NRF_PERIPHERALS_H */
+

nRF5_SDK_11.0.0_89a8197/components/drivers_nrf/hal/nrf_ppi.h

@@ -1,20 +1,52 @@
-/* Copyright (c) 2015 Nordic Semiconductor. All Rights Reserved.
+/**
+ * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
  * 
- * The information contained herein is property of Nordic Semiconductor ASA.
+ * All rights reserved.
- * Terms and conditions of usage are described in detail in NORDIC
- * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
  * 
- * Licensees are granted free, non-transferable use of the information. NO
+ * Redistribution and use in source and binary forms, with or without modification,
- * WARRANTY of ANY KIND is provided. This heading must NOT be removed from
+ * are permitted provided that the following conditions are met:
- * the file.
+ * 
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ *    list of conditions and the following disclaimer.
+ * 
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ *    Semiconductor ASA integrated circuit in a product or a software update for
+ *    such product, must reproduce the above copyright notice, this list of
+ *    conditions and the following disclaimer in the documentation and/or other
+ *    materials provided with the distribution.
+ * 
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ *    contributors may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ * 
+ * 4. This software, with or without modification, must only be used with a
+ *    Nordic Semiconductor ASA integrated circuit.
+ * 
+ * 5. Any software provided in binary form under this license must not be reverse
+ *    engineered, decompiled, modified and/or disassembled.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  * 
  */
-
 #ifndef NRF_PPI_H__
 #define NRF_PPI_H__
 
 #include <stddef.h>
 #include "nrf.h"
+#include "nrf_peripherals.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
 
 /**
  * @defgroup nrf_ppi_hal PPI HAL
@@ -47,7 +79,7 @@ typedef enum
     NRF_PPI_CHANNEL13 = PPI_CHEN_CH13_Pos, /**< Channel 13. */
     NRF_PPI_CHANNEL14 = PPI_CHEN_CH14_Pos, /**< Channel 14. */
     NRF_PPI_CHANNEL15 = PPI_CHEN_CH15_Pos, /**< Channel 15. */
-#ifdef NRF52
+#if (PPI_CH_NUM > 16) || defined(__SDK_DOXYGEN__)
     NRF_PPI_CHANNEL16 = PPI_CHEN_CH16_Pos, /**< Channel 16. */
     NRF_PPI_CHANNEL17 = PPI_CHEN_CH17_Pos, /**< Channel 17. */
     NRF_PPI_CHANNEL18 = PPI_CHEN_CH18_Pos, /**< Channel 18. */
@@ -77,7 +109,7 @@ typedef enum
     NRF_PPI_CHANNEL_GROUP1 = 1, /**< Channel group 1. */
     NRF_PPI_CHANNEL_GROUP2 = 2, /**< Channel group 2. */
     NRF_PPI_CHANNEL_GROUP3 = 3, /**< Channel group 3. */
-#ifdef NRF52
+#if (PPI_GROUP_NUM > 4) || defined(__SDK_DOXYGEN__)
     NRF_PPI_CHANNEL_GROUP4 = 4, /**< Channel group 4. */
     NRF_PPI_CHANNEL_GROUP5 = 5  /**< Channel group 5. */
 #endif
@@ -118,7 +150,7 @@ typedef enum
     NRF_PPI_TASK_CHG2_DIS = offsetof(NRF_PPI_Type, TASKS_CHG[2].DIS), /**< Task for disabling channel group 2 */
     NRF_PPI_TASK_CHG3_EN  = offsetof(NRF_PPI_Type, TASKS_CHG[3].EN),  /**< Task for enabling channel group 3 */
     NRF_PPI_TASK_CHG3_DIS = offsetof(NRF_PPI_Type, TASKS_CHG[3].DIS), /**< Task for disabling channel group 3 */
-#ifdef NRF52
+#if (PPI_GROUP_NUM > 4) || defined(__SDK_DOXYGEN__)
     NRF_PPI_TASK_CHG4_EN  = offsetof(NRF_PPI_Type, TASKS_CHG[4].EN),  /**< Task for enabling channel group 4 */
     NRF_PPI_TASK_CHG4_DIS = offsetof(NRF_PPI_Type, TASKS_CHG[4].DIS), /**< Task for disabling channel group 4 */
     NRF_PPI_TASK_CHG5_EN  = offsetof(NRF_PPI_Type, TASKS_CHG[5].EN),  /**< Task for enabling channel group 5 */
@@ -213,7 +245,7 @@ __STATIC_INLINE void nrf_ppi_channel_endpoint_setup(nrf_ppi_channel_t channel,
     NRF_PPI->CH[(uint32_t) channel].TEP = tep;
 }
 
-#ifdef NRF52
+#if defined(PPI_FEATURE_FORKS_PRESENT) || defined(__SDK_DOXYGEN__)
 /**
  * @brief Function for setting up task endpoint for a given PPI fork.
  *
@@ -399,4 +431,9 @@ __STATIC_INLINE uint32_t * nrf_ppi_task_group_disable_address_get(nrf_ppi_channe
  **/
 
 /*lint --flb "Leave library region" */
+
+#ifdef __cplusplus
+}
+#endif
+
 #endif // NRF_PPI_H__

nRF5_SDK_11.0.0_89a8197/components/drivers_nrf/hal/nrf_pwm.h

@@ -1,15 +1,42 @@
-/* Copyright (c) 2015 Nordic Semiconductor. All Rights Reserved.
+/**
+ * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
  * 
- * The information contained herein is property of Nordic Semiconductor ASA.
+ * All rights reserved.
- * Terms and conditions of usage are described in detail in NORDIC
- * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
  * 
- * Licensees are granted free, non-transferable use of the information. NO
+ * Redistribution and use in source and binary forms, with or without modification,
- * WARRANTY of ANY KIND is provided. This heading must NOT be removed from
+ * are permitted provided that the following conditions are met:
- * the file.
+ * 
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ *    list of conditions and the following disclaimer.
+ * 
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ *    Semiconductor ASA integrated circuit in a product or a software update for
+ *    such product, must reproduce the above copyright notice, this list of
+ *    conditions and the following disclaimer in the documentation and/or other
+ *    materials provided with the distribution.
+ * 
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ *    contributors may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ * 
+ * 4. This software, with or without modification, must only be used with a
+ *    Nordic Semiconductor ASA integrated circuit.
+ * 
+ * 5. Any software provided in binary form under this license must not be reverse
+ *    engineered, decompiled, modified and/or disassembled.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  * 
  */
-
 /**
  * @defgroup nrf_pwm_hal PWM HAL
  * @{
@@ -29,6 +56,10 @@
 #include "nrf.h"
 #include "nrf_assert.h"
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 
 /**
  * @brief This value can be provided as a parameter for the @ref nrf_pwm_pins_set
@@ -38,7 +69,7 @@
 #define NRF_PWM_PIN_NOT_CONNECTED   0xFFFFFFFF
 
 /**
- * @brief Number of channels in each PWM instance.
+ * @brief Number of channels in each Pointer to the peripheral registers structure.
  */
 #define NRF_PWM_CHANNEL_COUNT   4
 
@@ -245,134 +276,134 @@ typedef struct
 /**
  * @brief Function for activating a specific PWM task.
  *
- * @param[in] p_pwm PWM instance.
+ * @param[in] p_reg Pointer to the peripheral registers structure.
  * @param[in] task  Task to activate.
  */
-__STATIC_INLINE void nrf_pwm_task_trigger(NRF_PWM_Type * p_pwm,
+__STATIC_INLINE void nrf_pwm_task_trigger(NRF_PWM_Type * p_reg,
                                           nrf_pwm_task_t task);
 
 /**
  * @brief Function for getting the address of a specific PWM task register.
  *
- * @param[in] p_pwm PWM instance.
+ * @param[in] p_reg Pointer to the peripheral registers structure.
  * @param[in] task  Requested task.
  *
  * @return Address of the specified task register.
  */
-__STATIC_INLINE uint32_t nrf_pwm_task_address_get(NRF_PWM_Type const * p_pwm,
+__STATIC_INLINE uint32_t nrf_pwm_task_address_get(NRF_PWM_Type const * p_reg,
                                                   nrf_pwm_task_t task);
 
 /**
  * @brief Function for clearing a specific PWM event.
  *
- * @param[in] p_pwm PWM instance.
+ * @param[in] p_reg Pointer to the peripheral registers structure.
  * @param[in] event Event to clear.
  */
-__STATIC_INLINE void nrf_pwm_event_clear(NRF_PWM_Type * p_pwm,
+__STATIC_INLINE void nrf_pwm_event_clear(NRF_PWM_Type * p_reg,
                                          nrf_pwm_event_t event);
 
 /**
  * @brief Function for checking the state of a specific PWM event.
  *
- * @param[in] p_pwm PWM instance.
+ * @param[in] p_reg Pointer to the peripheral registers structure.
  * @param[in] event Event to check.
  *
  * @retval true  If the event is set.
  * @retval false If the event is not set.
  */
-__STATIC_INLINE bool nrf_pwm_event_check(NRF_PWM_Type const * p_pwm,
+__STATIC_INLINE bool nrf_pwm_event_check(NRF_PWM_Type const * p_reg,
                                          nrf_pwm_event_t event);
 
 /**
  * @brief Function for getting the address of a specific PWM event register.
  *
- * @param[in] p_pwm PWM instance.
+ * @param[in] p_reg Pointer to the peripheral registers structure.
  * @param[in] event Requested event.
  *
  * @return Address of the specified event register.
  */
-__STATIC_INLINE uint32_t nrf_pwm_event_address_get(NRF_PWM_Type const * p_pwm,
+__STATIC_INLINE uint32_t nrf_pwm_event_address_get(NRF_PWM_Type const * p_reg,
                                                    nrf_pwm_event_t event);
 
 /**
  * @brief Function for enabling specified shortcuts.
  *
- * @param[in] p_pwm           PWM instance.
+ * @param[in] p_reg           Pointer to the peripheral registers structure.
  * @param[in] pwm_shorts_mask Shortcuts to enable.
  */
-__STATIC_INLINE void nrf_pwm_shorts_enable(NRF_PWM_Type * p_pwm,
+__STATIC_INLINE void nrf_pwm_shorts_enable(NRF_PWM_Type * p_reg,
                                            uint32_t pwm_shorts_mask);
 
 /**
  * @brief Function for disabling specified shortcuts.
  *
- * @param[in] p_pwm           PWM instance.
+ * @param[in] p_reg           Pointer to the peripheral registers structure.
  * @param[in] pwm_shorts_mask Shortcuts to disable.
  */
-__STATIC_INLINE void nrf_pwm_shorts_disable(NRF_PWM_Type * p_pwm,
+__STATIC_INLINE void nrf_pwm_shorts_disable(NRF_PWM_Type * p_reg,
                                             uint32_t pwm_shorts_mask);
 
 /**
  * @brief Function for setting the configuration of PWM shortcuts.
  *
- * @param[in] p_pwm           PWM instance.
+ * @param[in] p_reg           Pointer to the peripheral registers structure.
  * @param[in] pwm_shorts_mask Shortcuts configuration to set.
  */
-__STATIC_INLINE void nrf_pwm_shorts_set(NRF_PWM_Type * p_pwm,
+__STATIC_INLINE void nrf_pwm_shorts_set(NRF_PWM_Type * p_reg,
                                         uint32_t pwm_shorts_mask);
 
 /**
  * @brief Function for enabling specified interrupts.
  *
- * @param[in] p_pwm        PWM instance.
+ * @param[in] p_reg        Pointer to the peripheral registers structure.
  * @param[in] pwm_int_mask Interrupts to enable.
  */
-__STATIC_INLINE void nrf_pwm_int_enable(NRF_PWM_Type * p_pwm,
+__STATIC_INLINE void nrf_pwm_int_enable(NRF_PWM_Type * p_reg,
                                         uint32_t pwm_int_mask);
 
 /**
  * @brief Function for disabling specified interrupts.
  *
- * @param[in] p_pwm        PWM instance.
+ * @param[in] p_reg        Pointer to the peripheral registers structure.
  * @param[in] pwm_int_mask Interrupts to disable.
  */
-__STATIC_INLINE void nrf_pwm_int_disable(NRF_PWM_Type * p_pwm,
+__STATIC_INLINE void nrf_pwm_int_disable(NRF_PWM_Type * p_reg,
                                          uint32_t pwm_int_mask);
 
 /**
  * @brief Function for setting the configuration of PWM interrupts.
  *
- * @param[in] p_pwm        PWM instance.
+ * @param[in] p_reg        Pointer to the peripheral registers structure.
  * @param[in] pwm_int_mask Interrupts configuration to set.
  */
-__STATIC_INLINE void nrf_pwm_int_set(NRF_PWM_Type * p_pwm,
+__STATIC_INLINE void nrf_pwm_int_set(NRF_PWM_Type * p_reg,
                                      uint32_t pwm_int_mask);
 
 /**
  * @brief Function for retrieving the state of a given interrupt.
  *
- * @param[in] p_pwm   PWM instance.
+ * @param[in] p_reg   Pointer to the peripheral registers structure.
  * @param[in] pwm_int Interrupt to check.
  *
  * @retval true  If the interrupt is enabled.
  * @retval false If the interrupt is not enabled.
  */
-__STATIC_INLINE bool nrf_pwm_int_enable_check(NRF_PWM_Type const * p_pwm,
+__STATIC_INLINE bool nrf_pwm_int_enable_check(NRF_PWM_Type const * p_reg,
                                               nrf_pwm_int_mask_t pwm_int);
 
 /**
  * @brief Function for enabling the PWM peripheral.
  *
- * @param[in] p_pwm PWM instance.
+ * @param[in] p_reg Pointer to the peripheral registers structure.
  */
-__STATIC_INLINE void nrf_pwm_enable(NRF_PWM_Type * p_pwm);
+__STATIC_INLINE void nrf_pwm_enable(NRF_PWM_Type * p_reg);
 
 /**
  * @brief Function for disabling the PWM peripheral.
  *
- * @param[in] p_pwm PWM instance.
+ * @param[in] p_reg Pointer to the peripheral registers structure.
  */
-__STATIC_INLINE void nrf_pwm_disable(NRF_PWM_Type * p_pwm);
+__STATIC_INLINE void nrf_pwm_disable(NRF_PWM_Type * p_reg);
 
 /**
  * @brief Function for assigning pins to PWM output channels.
@@ -381,21 +412,21 @@ __STATIC_INLINE void nrf_pwm_disable(NRF_PWM_Type * p_pwm);
  * needed, pass the @ref NRF_PWM_PIN_NOT_CONNECTED value instead of its pin
  * number.
  *
- * @param[in] p_pwm    PWM instance.
+ * @param[in] p_reg    Pointer to the peripheral registers structure.
  * @param[in] out_pins Array with pin numbers for individual PWM output channels.
  */
-__STATIC_INLINE void nrf_pwm_pins_set(NRF_PWM_Type * p_pwm,
+__STATIC_INLINE void nrf_pwm_pins_set(NRF_PWM_Type * p_reg,
                                       uint32_t out_pins[NRF_PWM_CHANNEL_COUNT]);
 
 /**
  * @brief Function for configuring the PWM peripheral.
  *
- * @param[in] p_pwm      PWM instance.
+ * @param[in] p_reg      Pointer to the peripheral registers structure.
  * @param[in] base_clock Base clock frequency.
  * @param[in] mode       Operating mode of the pulse generator counter.
  * @param[in] top_value  Value up to which the pulse generator counter counts.
  */
-__STATIC_INLINE void nrf_pwm_configure(NRF_PWM_Type * p_pwm,
+__STATIC_INLINE void nrf_pwm_configure(NRF_PWM_Type * p_reg,
                                        nrf_pwm_clk_t  base_clock,
                                        nrf_pwm_mode_t mode,
                                        uint16_t       top_value);
@@ -403,11 +434,11 @@ __STATIC_INLINE void nrf_pwm_configure(NRF_PWM_Type * p_pwm,
 /**
  * @brief Function for defining a sequence of PWM duty cycles.
  *
- * @param[in] p_pwm  PWM instance.
+ * @param[in] p_reg  Pointer to the peripheral registers structure.
  * @param[in] seq_id Identifier of the sequence (0 or 1).
  * @param[in] p_seq  Pointer to the sequence definition.
  */
-__STATIC_INLINE void nrf_pwm_sequence_set(NRF_PWM_Type * p_pwm,
+__STATIC_INLINE void nrf_pwm_sequence_set(NRF_PWM_Type * p_reg,
                                           uint8_t                    seq_id,
                                           nrf_pwm_sequence_t const * p_seq);
 
@@ -415,11 +446,11 @@ __STATIC_INLINE void nrf_pwm_sequence_set(NRF_PWM_Type * p_pwm,
  * @brief Function for modifying the pointer to the duty cycle values
  *        in the specified sequence.
  *
- * @param[in] p_pwm    PWM instance.
+ * @param[in] p_reg    Pointer to the peripheral registers structure.
  * @param[in] seq_id   Identifier of the sequence (0 or 1).
  * @param[in] p_values Pointer to an array with duty cycle values.
  */
-__STATIC_INLINE void nrf_pwm_seq_ptr_set(NRF_PWM_Type * p_pwm,
+__STATIC_INLINE void nrf_pwm_seq_ptr_set(NRF_PWM_Type * p_reg,
                                          uint8_t          seq_id,
                                          uint16_t const * p_values);
 
@@ -427,11 +458,11 @@ __STATIC_INLINE void nrf_pwm_seq_ptr_set(NRF_PWM_Type * p_pwm,
  * @brief Function for modifying the total number of duty cycle values
  *        in the specified sequence.
  *
- * @param[in] p_pwm  PWM instance.
+ * @param[in] p_reg  Pointer to the peripheral registers structure.
  * @param[in] seq_id Identifier of the sequence (0 or 1).
  * @param[in] length Number of duty cycle values.
  */
-__STATIC_INLINE void nrf_pwm_seq_cnt_set(NRF_PWM_Type * p_pwm,
+__STATIC_INLINE void nrf_pwm_seq_cnt_set(NRF_PWM_Type * p_reg,
                                          uint8_t  seq_id,
                                          uint16_t length);
 
@@ -439,11 +470,11 @@ __STATIC_INLINE void nrf_pwm_seq_cnt_set(NRF_PWM_Type * p_pwm,
  * @brief Function for modifying the additional number of PWM periods spent
  *        on each duty cycle value in the specified sequence.
  *
- * @param[in] p_pwm   PWM instance.
+ * @param[in] p_reg   Pointer to the peripheral registers structure.
  * @param[in] seq_id  Identifier of the sequence (0 or 1).
  * @param[in] refresh Number of additional PWM periods for each duty cycle value.
  */
-__STATIC_INLINE void nrf_pwm_seq_refresh_set(NRF_PWM_Type * p_pwm,
+__STATIC_INLINE void nrf_pwm_seq_refresh_set(NRF_PWM_Type * p_reg,
                                              uint8_t  seq_id,
                                              uint32_t refresh);
 
@@ -451,11 +482,11 @@ __STATIC_INLINE void nrf_pwm_seq_refresh_set(NRF_PWM_Type * p_pwm,
  * @brief Function for modifying the additional time added after the sequence
  *        is played.
  *
- * @param[in] p_pwm     PWM instance.
+ * @param[in] p_reg     Pointer to the peripheral registers structure.
  * @param[in] seq_id    Identifier of the sequence (0 or 1).
  * @param[in] end_delay Number of PWM periods added at the end of the sequence.
  */
-__STATIC_INLINE void nrf_pwm_seq_end_delay_set(NRF_PWM_Type * p_pwm,
+__STATIC_INLINE void nrf_pwm_seq_end_delay_set(NRF_PWM_Type * p_reg,
                                                uint8_t  seq_id,
                                                uint32_t end_delay);
 
@@ -463,11 +494,11 @@ __STATIC_INLINE void nrf_pwm_seq_end_delay_set(NRF_PWM_Type * p_pwm,
  * @brief Function for setting the mode of loading sequence data from RAM
  *        and advancing the sequence.
  *
- * @param[in] p_pwm    PWM instance.
+ * @param[in] p_reg    Pointer to the peripheral registers structure.
  * @param[in] dec_load Mode of loading sequence data from RAM.
  * @param[in] dec_step Mode of advancing the active sequence.
  */
-__STATIC_INLINE void nrf_pwm_decoder_set(NRF_PWM_Type * p_pwm,
+__STATIC_INLINE void nrf_pwm_decoder_set(NRF_PWM_Type * p_reg,
                                          nrf_pwm_dec_load_t dec_load,
                                          nrf_pwm_dec_step_t dec_step);
 
@@ -478,184 +509,193 @@ __STATIC_INLINE void nrf_pwm_decoder_set(NRF_PWM_Type * p_pwm,
  * This function applies to two-sequence playback (concatenated sequence 0 and 1).
  * A single sequence can be played back only once.
  *
- * @param[in] p_pwm      PWM instance.
+ * @param[in] p_reg      Pointer to the peripheral registers structure.
  * @param[in] loop_count Number of times to perform the sequence playback.
  */
-__STATIC_INLINE void nrf_pwm_loop_set(NRF_PWM_Type * p_pwm,
+__STATIC_INLINE void nrf_pwm_loop_set(NRF_PWM_Type * p_reg,
                                       uint16_t loop_count);
 
 
 #ifndef SUPPRESS_INLINE_IMPLEMENTATION
 
-__STATIC_INLINE void nrf_pwm_task_trigger(NRF_PWM_Type * p_pwm,
+__STATIC_INLINE void nrf_pwm_task_trigger(NRF_PWM_Type * p_reg,
                                           nrf_pwm_task_t task)
 {
-    *((volatile uint32_t *)((uint8_t *)p_pwm + (uint32_t)task)) = 0x1UL;
+    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)task)) = 0x1UL;
 }
 
-__STATIC_INLINE uint32_t nrf_pwm_task_address_get(NRF_PWM_Type const * p_pwm,
+__STATIC_INLINE uint32_t nrf_pwm_task_address_get(NRF_PWM_Type const * p_reg,
                                                   nrf_pwm_task_t task)
 {
-    return ((uint32_t)p_pwm + (uint32_t)task);
+    return ((uint32_t)p_reg + (uint32_t)task);
 }
 
-__STATIC_INLINE void nrf_pwm_event_clear(NRF_PWM_Type * p_pwm,
+__STATIC_INLINE void nrf_pwm_event_clear(NRF_PWM_Type * p_reg,
                                          nrf_pwm_event_t event)
 {
-    *((volatile uint32_t *)((uint8_t *)p_pwm + (uint32_t)event)) = 0x0UL;
+    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL;
+#if __CORTEX_M == 0x04
+    volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event));
+    (void)dummy;
+#endif
 }
 
-__STATIC_INLINE bool nrf_pwm_event_check(NRF_PWM_Type const * p_pwm,
+__STATIC_INLINE bool nrf_pwm_event_check(NRF_PWM_Type const * p_reg,
                                          nrf_pwm_event_t event)
 {
-    return (bool)*(volatile uint32_t *)((uint8_t *)p_pwm + (uint32_t)event);
+    return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event);
 }
 
-__STATIC_INLINE uint32_t nrf_pwm_event_address_get(NRF_PWM_Type const * p_pwm,
+__STATIC_INLINE uint32_t nrf_pwm_event_address_get(NRF_PWM_Type const * p_reg,
                                                    nrf_pwm_event_t event)
 {
-    return ((uint32_t)p_pwm + (uint32_t)event);
+    return ((uint32_t)p_reg + (uint32_t)event);
 }
 
-__STATIC_INLINE void nrf_pwm_shorts_enable(NRF_PWM_Type * p_pwm,
+__STATIC_INLINE void nrf_pwm_shorts_enable(NRF_PWM_Type * p_reg,
                                            uint32_t pwm_shorts_mask)
 {
-    p_pwm->SHORTS |= pwm_shorts_mask;
+    p_reg->SHORTS |= pwm_shorts_mask;
 }
 
-__STATIC_INLINE void nrf_pwm_shorts_disable(NRF_PWM_Type * p_pwm,
+__STATIC_INLINE void nrf_pwm_shorts_disable(NRF_PWM_Type * p_reg,
                                             uint32_t pwm_shorts_mask)
 {
-    p_pwm->SHORTS &= ~(pwm_shorts_mask);
+    p_reg->SHORTS &= ~(pwm_shorts_mask);
 }
 
-__STATIC_INLINE void nrf_pwm_shorts_set(NRF_PWM_Type * p_pwm,
+__STATIC_INLINE void nrf_pwm_shorts_set(NRF_PWM_Type * p_reg,
                                         uint32_t pwm_shorts_mask)
 {
-    p_pwm->SHORTS = pwm_shorts_mask;
+    p_reg->SHORTS = pwm_shorts_mask;
 }
 
-__STATIC_INLINE void nrf_pwm_int_enable(NRF_PWM_Type * p_pwm,
+__STATIC_INLINE void nrf_pwm_int_enable(NRF_PWM_Type * p_reg,
                                         uint32_t pwm_int_mask)
 {
-    p_pwm->INTENSET = pwm_int_mask;
+    p_reg->INTENSET = pwm_int_mask;
 }
 
-__STATIC_INLINE void nrf_pwm_int_disable(NRF_PWM_Type * p_pwm,
+__STATIC_INLINE void nrf_pwm_int_disable(NRF_PWM_Type * p_reg,
                                          uint32_t pwm_int_mask)
 {
-    p_pwm->INTENCLR = pwm_int_mask;
+    p_reg->INTENCLR = pwm_int_mask;
 }
 
-__STATIC_INLINE void nrf_pwm_int_set(NRF_PWM_Type * p_pwm,
+__STATIC_INLINE void nrf_pwm_int_set(NRF_PWM_Type * p_reg,
                                      uint32_t pwm_int_mask)
 {
-    p_pwm->INTEN = pwm_int_mask;
+    p_reg->INTEN = pwm_int_mask;
 }
 
-__STATIC_INLINE bool nrf_pwm_int_enable_check(NRF_PWM_Type const * p_pwm,
+__STATIC_INLINE bool nrf_pwm_int_enable_check(NRF_PWM_Type const * p_reg,
                                               nrf_pwm_int_mask_t pwm_int)
 {
-    return (bool)(p_pwm->INTENSET & pwm_int);
+    return (bool)(p_reg->INTENSET & pwm_int);
 }
 
-__STATIC_INLINE void nrf_pwm_enable(NRF_PWM_Type * p_pwm)
+__STATIC_INLINE void nrf_pwm_enable(NRF_PWM_Type * p_reg)
 {
-    p_pwm->ENABLE = (PWM_ENABLE_ENABLE_Enabled << PWM_ENABLE_ENABLE_Pos);
+    p_reg->ENABLE = (PWM_ENABLE_ENABLE_Enabled << PWM_ENABLE_ENABLE_Pos);
 }
 
-__STATIC_INLINE void nrf_pwm_disable(NRF_PWM_Type * p_pwm)
+__STATIC_INLINE void nrf_pwm_disable(NRF_PWM_Type * p_reg)
 {
-    p_pwm->ENABLE = (PWM_ENABLE_ENABLE_Disabled << PWM_ENABLE_ENABLE_Pos);
+    p_reg->ENABLE = (PWM_ENABLE_ENABLE_Disabled << PWM_ENABLE_ENABLE_Pos);
 }
 
-__STATIC_INLINE void nrf_pwm_pins_set(NRF_PWM_Type * p_pwm,
+__STATIC_INLINE void nrf_pwm_pins_set(NRF_PWM_Type * p_reg,
                                       uint32_t out_pins[NRF_PWM_CHANNEL_COUNT])
 {
     uint8_t i;
     for (i = 0; i < NRF_PWM_CHANNEL_COUNT; ++i)
     {
-        p_pwm->PSEL.OUT[i] = out_pins[i];
+        p_reg->PSEL.OUT[i] = out_pins[i];
     }
 }
 
-__STATIC_INLINE void nrf_pwm_configure(NRF_PWM_Type * p_pwm,
+__STATIC_INLINE void nrf_pwm_configure(NRF_PWM_Type * p_reg,
                                        nrf_pwm_clk_t  base_clock,
                                        nrf_pwm_mode_t mode,
                                        uint16_t       top_value)
 {
     ASSERT(top_value <= PWM_COUNTERTOP_COUNTERTOP_Msk);
 
-    p_pwm->PRESCALER  = base_clock;
+    p_reg->PRESCALER  = base_clock;
-    p_pwm->MODE       = mode;
+    p_reg->MODE       = mode;
-    p_pwm->COUNTERTOP = top_value;
+    p_reg->COUNTERTOP = top_value;
 }
 
-__STATIC_INLINE void nrf_pwm_sequence_set(NRF_PWM_Type * p_pwm,
+__STATIC_INLINE void nrf_pwm_sequence_set(NRF_PWM_Type * p_reg,
                                           uint8_t                    seq_id,
                                           nrf_pwm_sequence_t const * p_seq)
 {
     ASSERT(p_seq != NULL);
 
-    nrf_pwm_seq_ptr_set(      p_pwm, seq_id, p_seq->values.p_raw);
+    nrf_pwm_seq_ptr_set(      p_reg, seq_id, p_seq->values.p_raw);
-    nrf_pwm_seq_cnt_set(      p_pwm, seq_id, p_seq->length);
+    nrf_pwm_seq_cnt_set(      p_reg, seq_id, p_seq->length);
-    nrf_pwm_seq_refresh_set(  p_pwm, seq_id, p_seq->repeats);
+    nrf_pwm_seq_refresh_set(  p_reg, seq_id, p_seq->repeats);
-    nrf_pwm_seq_end_delay_set(p_pwm, seq_id, p_seq->end_delay);
+    nrf_pwm_seq_end_delay_set(p_reg, seq_id, p_seq->end_delay);
 }
 
-__STATIC_INLINE void nrf_pwm_seq_ptr_set(NRF_PWM_Type * p_pwm,
+__STATIC_INLINE void nrf_pwm_seq_ptr_set(NRF_PWM_Type * p_reg,
                                          uint8_t          seq_id,
                                          uint16_t const * p_values)
 {
     ASSERT(seq_id <= 1);
     ASSERT(p_values != NULL);
-    p_pwm->SEQ[seq_id].PTR = (uint32_t)p_values;
+    p_reg->SEQ[seq_id].PTR = (uint32_t)p_values;
 }
 
-__STATIC_INLINE void nrf_pwm_seq_cnt_set(NRF_PWM_Type * p_pwm,
+__STATIC_INLINE void nrf_pwm_seq_cnt_set(NRF_PWM_Type * p_reg,
                                          uint8_t  seq_id,
                                          uint16_t length)
 {
     ASSERT(seq_id <= 1);
     ASSERT(length != 0);
     ASSERT(length <= PWM_SEQ_CNT_CNT_Msk);
-    p_pwm->SEQ[seq_id].CNT = length;
+    p_reg->SEQ[seq_id].CNT = length;
 }
 
-__STATIC_INLINE void nrf_pwm_seq_refresh_set(NRF_PWM_Type * p_pwm,
+__STATIC_INLINE void nrf_pwm_seq_refresh_set(NRF_PWM_Type * p_reg,
                                              uint8_t  seq_id,
                                              uint32_t refresh)
 {
     ASSERT(seq_id <= 1);
     ASSERT(refresh <= PWM_SEQ_REFRESH_CNT_Msk);
-    p_pwm->SEQ[seq_id].REFRESH  = refresh;
+    p_reg->SEQ[seq_id].REFRESH  = refresh;
 }
 
-__STATIC_INLINE void nrf_pwm_seq_end_delay_set(NRF_PWM_Type * p_pwm,
+__STATIC_INLINE void nrf_pwm_seq_end_delay_set(NRF_PWM_Type * p_reg,
                                                uint8_t  seq_id,
                                                uint32_t end_delay)
 {
     ASSERT(seq_id <= 1);
     ASSERT(end_delay <= PWM_SEQ_ENDDELAY_CNT_Msk);
-    p_pwm->SEQ[seq_id].ENDDELAY = end_delay;
+    p_reg->SEQ[seq_id].ENDDELAY = end_delay;
 }
 
-__STATIC_INLINE void nrf_pwm_decoder_set(NRF_PWM_Type * p_pwm,
+__STATIC_INLINE void nrf_pwm_decoder_set(NRF_PWM_Type * p_reg,
                                          nrf_pwm_dec_load_t dec_load,
                                          nrf_pwm_dec_step_t dec_step)
 {
-    p_pwm->DECODER = ((uint32_t)dec_load << PWM_DECODER_LOAD_Pos) |
+    p_reg->DECODER = ((uint32_t)dec_load << PWM_DECODER_LOAD_Pos) |
                      ((uint32_t)dec_step << PWM_DECODER_MODE_Pos);
 }
 
-__STATIC_INLINE void nrf_pwm_loop_set(NRF_PWM_Type * p_pwm,
+__STATIC_INLINE void nrf_pwm_loop_set(NRF_PWM_Type * p_reg,
                                       uint16_t loop_count)
 {
-    p_pwm->LOOP = loop_count;
+    p_reg->LOOP = loop_count;
 }
 
 #endif // SUPPRESS_INLINE_IMPLEMENTATION
 
+
+#ifdef __cplusplus
+}
+#endif
+
 #endif // NRF_PWM_H__
 
 /** @} */

nRF5_SDK_11.0.0_89a8197/components/drivers_nrf/hal/nrf_qdec.h

@@ -1,12 +1,40 @@
-/* Copyright (c) 2014 Nordic Semiconductor. All Rights Reserved.
+/**
+ * Copyright (c) 2014 - 2017, Nordic Semiconductor ASA
  * 
- * The information contained herein is property of Nordic Semiconductor ASA.
+ * All rights reserved.
- * Terms and conditions of usage are described in detail in NORDIC
- * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
  * 
- * Licensees are granted free, non-transferable use of the information. NO
+ * Redistribution and use in source and binary forms, with or without modification,
- * WARRANTY of ANY KIND is provided. This heading must NOT be removed from
+ * are permitted provided that the following conditions are met:
- * the file.
+ * 
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ *    list of conditions and the following disclaimer.
+ * 
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ *    Semiconductor ASA integrated circuit in a product or a software update for
+ *    such product, must reproduce the above copyright notice, this list of
+ *    conditions and the following disclaimer in the documentation and/or other
+ *    materials provided with the distribution.
+ * 
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ *    contributors may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ * 
+ * 4. This software, with or without modification, must only be used with a
+ *    Nordic Semiconductor ASA integrated circuit.
+ * 
+ * 5. Any software provided in binary form under this license must not be reverse
+ *    engineered, decompiled, modified and/or disassembled.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  * 
  */
 #ifndef NRF_QDEC_H__
@@ -16,6 +44,10 @@
 #include "nrf_error.h"
 #include "nrf.h"
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 /*lint ++flb "Enter library region" */
 
 /**
@@ -228,15 +260,10 @@ __STATIC_INLINE uint32_t nrf_qdec_dbfen_get(void)
  */
 __STATIC_INLINE void nrf_qdec_pio_assign( uint32_t psela, uint32_t pselb, uint32_t pselled)
 {
-#ifdef NRF51
     NRF_QDEC->PSELA = psela;
     NRF_QDEC->PSELB = pselb;
     NRF_QDEC->PSELLED = pselled;
-#elif defined NRF52
+
-    NRF_QDEC->PSEL.A = psela;
-    NRF_QDEC->PSEL.B = pselb;
-    NRF_QDEC->PSEL.LED = pselled;
-#endif
 }
 
 /**
@@ -266,6 +293,10 @@ __STATIC_INLINE uint32_t * nrf_qdec_task_address_get(nrf_qdec_task_t qdec_task)
 __STATIC_INLINE void nrf_qdec_event_clear(nrf_qdec_event_t qdec_event)
 {
     *( (volatile uint32_t *)( (uint8_t *)NRF_QDEC + qdec_event) ) = 0;
+#if __CORTEX_M == 0x04
+    volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)NRF_QDEC + qdec_event));
+    (void)dummy;
+#endif
 }
 
 
@@ -465,4 +496,9 @@ __STATIC_INLINE uint32_t nrf_qdec_ledpol_get(void)
  **/
 
 /*lint --flb "Leave library region" */
+
+#ifdef __cplusplus
+}
+#endif
+
 #endif

nRF5_SDK_11.0.0_89a8197/components/drivers_nrf/hal/nrf_qspi.h

@@ -0,0 +1,765 @@
+/**
+ * Copyright (c) 2016 - 2017, Nordic Semiconductor ASA
+ * 
+ * All rights reserved.
+ * 
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ * 
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ *    list of conditions and the following disclaimer.
+ * 
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ *    Semiconductor ASA integrated circuit in a product or a software update for
+ *    such product, must reproduce the above copyright notice, this list of
+ *    conditions and the following disclaimer in the documentation and/or other
+ *    materials provided with the distribution.
+ * 
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ *    contributors may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ * 
+ * 4. This software, with or without modification, must only be used with a
+ *    Nordic Semiconductor ASA integrated circuit.
+ * 
+ * 5. Any software provided in binary form under this license must not be reverse
+ *    engineered, decompiled, modified and/or disassembled.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ */
+/**
+ * @defgroup nrf_qspi_hal QSPI HAL
+ * @{
+ * @ingroup nrf_qspi
+ *
+ * @brief Hardware access layer for accessing the QSPI peripheral.
+ */
+
+#ifndef NRF_QSPI_H__
+#define NRF_QSPI_H__
+
+#include <stddef.h>
+#include <stdbool.h>
+#include "boards.h"
+#include "nrf.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief This value can be used as a parameter for the @ref nrf_qspi_pins_set
+ *        function to specify that a given QSPI signal (SCK, CSN, IO0, IO1, IO2, or IO3)
+ *        will not be connected to a physical pin.
+ */
+#define NRF_QSPI_PIN_NOT_CONNECTED 0xFF
+
+/**
+ * @brief Macro for setting proper values to pin registers.
+ */
+
+#define NRF_QSPI_PIN_VAL(pin) (pin) == NRF_QSPI_PIN_NOT_CONNECTED ? 0xFFFFFFFF : (pin)
+
+/**
+ * @brief QSPI tasks.
+ */
+typedef enum
+{
+    /*lint -save -e30*/
+    NRF_QSPI_TASK_ACTIVATE   = offsetof(NRF_QSPI_Type, TASKS_ACTIVATE),   /**< Activate the QSPI interface. */
+    NRF_QSPI_TASK_READSTART  = offsetof(NRF_QSPI_Type, TASKS_READSTART),  /**< Start transfer from external flash memory to internal RAM. */
+    NRF_QSPI_TASK_WRITESTART = offsetof(NRF_QSPI_Type, TASKS_WRITESTART), /**< Start transfer from internal RAM to external flash memory. */
+    NRF_QSPI_TASK_ERASESTART = offsetof(NRF_QSPI_Type, TASKS_ERASESTART), /**< Start external flash memory erase operation. */
+    /*lint -restore*/
+} nrf_qspi_task_t;
+
+/**
+ * @brief QSPI events.
+ */
+typedef enum
+{
+    /*lint -save -e30*/
+    NRF_QSPI_EVENT_READY = offsetof(NRF_QSPI_Type, EVENTS_READY) /**< QSPI peripheral is ready after it executes any task. */
+    /*lint -restore*/
+} nrf_qspi_event_t;
+
+/**
+ * @brief QSPI interrupts.
+ */
+typedef enum
+{
+    NRF_QSPI_INT_READY_MASK = QSPI_INTENSET_READY_Msk /**< Interrupt on READY event. */
+} nrf_qspi_int_mask_t;
+
+/**
+ * @brief QSPI frequency divider values.
+ */
+typedef enum
+{
+    NRF_QSPI_FREQ_32MDIV1,  /**< 32.0 MHz. */
+    NRF_QSPI_FREQ_32MDIV2,  /**< 16.0 MHz. */
+    NRF_QSPI_FREQ_32MDIV3,  /**< 10.6 MHz. */
+    NRF_QSPI_FREQ_32MDIV4,  /**< 8.00 MHz. */
+    NRF_QSPI_FREQ_32MDIV5,  /**< 6.40 MHz. */
+    NRF_QSPI_FREQ_32MDIV6,  /**< 5.33 MHz. */
+    NRF_QSPI_FREQ_32MDIV7,  /**< 4.57 MHz. */
+    NRF_QSPI_FREQ_32MDIV8,  /**< 4.00 MHz. */
+    NRF_QSPI_FREQ_32MDIV9,  /**< 3.55 MHz. */
+    NRF_QSPI_FREQ_32MDIV10, /**< 3.20 MHz. */
+    NRF_QSPI_FREQ_32MDIV11, /**< 2.90 MHz. */
+    NRF_QSPI_FREQ_32MDIV12, /**< 2.66 MHz. */
+    NRF_QSPI_FREQ_32MDIV13, /**< 2.46 MHz. */
+    NRF_QSPI_FREQ_32MDIV14, /**< 2.29 MHz. */
+    NRF_QSPI_FREQ_32MDIV15, /**< 2.13 MHz. */
+    NRF_QSPI_FREQ_32MDIV16, /**< 2.00 MHz. */
+} nrf_qspi_frequency_t;
+
+/**
+ * @brief Interface configuration for a read operation.
+ */
+typedef enum
+{
+    NRF_QSPI_READOC_FASTREAD = QSPI_IFCONFIG0_READOC_FASTREAD, /**< Single data line SPI. FAST_READ (opcode 0x0B). */
+    NRF_QSPI_READOC_READ2O   = QSPI_IFCONFIG0_READOC_READ2O,   /**< Dual data line SPI. READ2O (opcode 0x3B). */
+    NRF_QSPI_READOC_READ2IO  = QSPI_IFCONFIG0_READOC_READ2IO,  /**< Dual data line SPI. READ2IO (opcode 0xBB). */
+    NRF_QSPI_READOC_READ4O   = QSPI_IFCONFIG0_READOC_READ4O,   /**< Quad data line SPI. READ4O (opcode 0x6B). */
+    NRF_QSPI_READOC_READ4IO  = QSPI_IFCONFIG0_READOC_READ4IO   /**< Quad data line SPI. READ4IO (opcode 0xEB). */
+} nrf_qspi_readoc_t;
+
+/**
+ * @brief Interface configuration for a write operation.
+ */
+typedef enum
+{
+    NRF_QSPI_WRITEOC_PP    = QSPI_IFCONFIG0_WRITEOC_PP,    /**< Single data line SPI. PP (opcode 0x02). */
+    NRF_QSPI_WRITEOC_PP2O  = QSPI_IFCONFIG0_WRITEOC_PP2O,  /**< Dual data line SPI. PP2O (opcode 0xA2). */
+    NRF_QSPI_WRITEOC_PP4O  = QSPI_IFCONFIG0_WRITEOC_PP4O,  /**< Quad data line SPI. PP4O (opcode 0x32). */
+    NRF_QSPI_WRITEOC_PP4IO = QSPI_IFCONFIG0_WRITEOC_PP4IO, /**< Quad data line SPI. READ4O (opcode 0x38). */
+} nrf_qspi_writeoc_t;
+
+/**
+ * @brief Interface configuration for addressing mode.
+ */
+typedef enum
+{
+    NRF_QSPI_ADDRMODE_24BIT = QSPI_IFCONFIG0_ADDRMODE_24BIT, /**< 24-bit addressing. */
+    NRF_QSPI_ADDRMODE_32BIT = QSPI_IFCONFIG0_ADDRMODE_32BIT  /**< 32-bit addressing. */
+} nrf_qspi_addrmode_t;
+
+/**
+ * @brief QSPI SPI mode. Polarization and phase configuration.
+ */
+typedef enum
+{
+    NRF_QSPI_MODE_0 = QSPI_IFCONFIG1_SPIMODE_MODE0, /**< Mode 0 (CPOL=0, CPHA=0). */
+    NRF_QSPI_MODE_1 = QSPI_IFCONFIG1_SPIMODE_MODE3  /**< Mode 1 (CPOL=1, CPHA=1). */
+} nrf_qspi_spi_mode_t;
+
+/**
+ * @brief Addressing configuration mode.
+ */
+typedef enum
+{
+    NRF_QSPI_ADDRCONF_MODE_NOINSTR = QSPI_ADDRCONF_MODE_NoInstr, /**< Do not send any instruction. */
+    NRF_QSPI_ADDRCONF_MODE_OPCODE  = QSPI_ADDRCONF_MODE_Opcode,  /**< Send opcode. */
+    NRF_QSPI_ADDRCONF_MODE_OPBYTE0 = QSPI_ADDRCONF_MODE_OpByte0, /**< Send opcode, byte0. */
+    NRF_QSPI_ADDRCONF_MODE_ALL     = QSPI_ADDRCONF_MODE_All      /**< Send opcode, byte0, byte1. */
+} nrf_qspi_addrconfig_mode_t;
+
+/**
+ * @brief Erasing data length.
+ */
+typedef enum
+{
+    NRF_QSPI_ERASE_LEN_4KB  = QSPI_ERASE_LEN_LEN_4KB,  /**< Erase 4 kB block (flash command 0x20). */
+    NRF_QSPI_ERASE_LEN_64KB = QSPI_ERASE_LEN_LEN_64KB, /**< Erase 64 kB block (flash command 0xD8). */
+    NRF_QSPI_ERASE_LEN_ALL  = QSPI_ERASE_LEN_LEN_All   /**< Erase all (flash command 0xC7). */
+} nrf_qspi_erase_len_t;
+
+/**
+ * @brief Custom instruction length.
+ */
+typedef enum
+{
+    NRF_QSPI_CINSTR_LEN_1B = QSPI_CINSTRCONF_LENGTH_1B, /**< Send opcode only. */
+    NRF_QSPI_CINSTR_LEN_2B = QSPI_CINSTRCONF_LENGTH_2B, /**< Send opcode, CINSTRDAT0.BYTE0. */
+    NRF_QSPI_CINSTR_LEN_3B = QSPI_CINSTRCONF_LENGTH_3B, /**< Send opcode, CINSTRDAT0.BYTE0 -> CINSTRDAT0.BYTE1. */
+    NRF_QSPI_CINSTR_LEN_4B = QSPI_CINSTRCONF_LENGTH_4B, /**< Send opcode, CINSTRDAT0.BYTE0 -> CINSTRDAT0.BYTE2. */
+    NRF_QSPI_CINSTR_LEN_5B = QSPI_CINSTRCONF_LENGTH_5B, /**< Send opcode, CINSTRDAT0.BYTE0 -> CINSTRDAT0.BYTE3. */
+    NRF_QSPI_CINSTR_LEN_6B = QSPI_CINSTRCONF_LENGTH_6B, /**< Send opcode, CINSTRDAT0.BYTE0 -> CINSTRDAT1.BYTE4. */
+    NRF_QSPI_CINSTR_LEN_7B = QSPI_CINSTRCONF_LENGTH_7B, /**< Send opcode, CINSTRDAT0.BYTE0 -> CINSTRDAT1.BYTE5. */
+    NRF_QSPI_CINSTR_LEN_8B = QSPI_CINSTRCONF_LENGTH_8B, /**< Send opcode, CINSTRDAT0.BYTE0 -> CINSTRDAT1.BYTE6. */
+    NRF_QSPI_CINSTR_LEN_9B = QSPI_CINSTRCONF_LENGTH_9B  /**< Send opcode, CINSTRDAT0.BYTE0 -> CINSTRDAT1.BYTE7. */
+} nrf_qspi_cinstr_len_t;
+
+/**
+ * @brief Pins configuration.
+ */
+typedef struct
+{
+    uint8_t sck_pin; /**< SCK pin number. */
+    uint8_t csn_pin; /**< Chip select pin number. */
+    uint8_t io0_pin; /**< IO0/MOSI pin number. */
+    uint8_t io1_pin; /**< IO1/MISO pin number. */
+    uint8_t io2_pin; /**< IO2 pin number (optional).
+                      * Set to @ref NRF_QSPI_PIN_NOT_CONNECTED if this signal is not needed.
+                      */
+    uint8_t io3_pin; /**< IO3 pin number (optional).
+                      * Set to @ref NRF_QSPI_PIN_NOT_CONNECTED if this signal is not needed.
+                      */
+} nrf_qspi_pins_t;
+
+/**
+ * @brief Custom instruction configuration.
+ */
+typedef struct
+{
+    uint8_t               opcode;    /**< Opcode used in custom instruction transmission. */
+    nrf_qspi_cinstr_len_t length;    /**< Length of the custom instruction data. */
+    bool                  io2_level; /**< I/O line level during transmission. */
+    bool                  io3_level; /**< I/O line level during transmission. */
+    bool                  wipwait;   /**< Wait if a Wait in Progress bit is set in the memory status byte. */
+    bool                  wren;      /**< Send write enable before instruction. */
+} nrf_qspi_cinstr_conf_t;
+
+/**
+ * @brief Addressing mode register configuration. See @ref nrf_qspi_addrconfig_set
+ */
+typedef struct
+{
+    uint8_t                    opcode;  /**< Opcode used to enter proper addressing mode. */
+    uint8_t                    byte0;   /**< Byte following the opcode. */
+    uint8_t                    byte1;   /**< Byte following byte0. */
+    nrf_qspi_addrconfig_mode_t mode;    /**< Extended addresing mode. */
+    bool                       wipwait; /**< Enable/disable waiting for complete operation execution. */
+    bool                       wren;    /**< Send write enable before instruction. */
+} nrf_qspi_addrconfig_conf_t;
+
+/**
+ * @brief Structure with QSPI protocol interface configuration.
+ */
+typedef struct
+{
+    nrf_qspi_readoc_t   readoc;    /**< Read operation code. */
+    nrf_qspi_writeoc_t  writeoc;   /**< Write operation code. */
+    nrf_qspi_addrmode_t addrmode;  /**< Addresing mode (24-bit or 32-bit). */
+    bool                dpmconfig; /**< Enable the Deep Power-down Mode (DPM) feature. */
+} nrf_qspi_prot_conf_t;
+
+/**
+ * @brief QSPI physical interface configuration.
+ */
+typedef struct
+{
+    uint8_t              sck_delay; /**< tSHSL, tWHSL, and tSHWL in number of 16 MHz periods (62.5ns). */
+    bool                 dpmen;     /**< Enable the DPM feature. */
+    nrf_qspi_spi_mode_t  spi_mode;  /**< SPI phase and polarization. */
+    nrf_qspi_frequency_t sck_freq;  /**< SCK frequency given as enum @ref nrf_qspi_frequency_t. */
+} nrf_qspi_phy_conf_t;
+
+/**
+ * @brief Function for activating a specific QSPI task.
+ *
+ * @param[in] p_reg Pointer to the peripheral register structure.
+ * @param[in] task  Task to activate.
+ */
+__STATIC_INLINE void nrf_qspi_task_trigger(NRF_QSPI_Type * p_reg, nrf_qspi_task_t task);
+
+/**
+ * @brief Function for getting the address of a specific QSPI task register.
+ *
+ * @param[in] p_reg Pointer to the peripheral register structure.
+ * @param[in] task  Requested task.
+ *
+ * @return Address of the specified task register.
+ */
+__STATIC_INLINE uint32_t nrf_qspi_task_address_get(NRF_QSPI_Type const * p_reg,
+                                                   nrf_qspi_task_t       task);
+
+/**
+ * @brief Function for clearing a specific QSPI event.
+ *
+ * @param[in] p_reg      Pointer to the peripheral register structure.
+ * @param[in] qspi_event Event to clear.
+ */
+__STATIC_INLINE void nrf_qspi_event_clear(NRF_QSPI_Type *  p_reg, nrf_qspi_event_t qspi_event);
+
+/**
+ * @brief Function for checking the state of a specific SPI event.
+ *
+ * @param[in] p_reg      Pointer to the peripheral register structure.
+ * @param[in] qspi_event Event to check.
+ *
+ * @retval true  If the event is set.
+ * @retval false If the event is not set.
+ */
+__STATIC_INLINE bool nrf_qspi_event_check(NRF_QSPI_Type const * p_reg, nrf_qspi_event_t qspi_event);
+
+/**
+ * @brief Function for getting the address of a specific QSPI event register.
+ *
+ * @param[in] p_reg      Pointer to the peripheral register structure.
+ * @param[in] qspi_event Requested event.
+ *
+ * @return Address of the specified event register.
+ */
+__STATIC_INLINE uint32_t * nrf_qspi_event_address_get(NRF_QSPI_Type const * p_reg,
+                                                      nrf_qspi_event_t      qspi_event);
+
+/**
+ * @brief Function for enabling specified interrupts.
+ *
+ * @param[in] p_reg          Pointer to the peripheral register structure.
+ * @param[in] qspi_int_mask  Interrupts to enable.
+ */
+__STATIC_INLINE void nrf_qspi_int_enable(NRF_QSPI_Type * p_reg, uint32_t qspi_int_mask);
+
+/**
+ * @brief Function for disabling specified interrupts.
+ *
+ * @param[in] p_reg          Pointer to the peripheral register structure.
+ * @param[in] qspi_int_mask  Interrupts to disable.
+ */
+__STATIC_INLINE void nrf_qspi_int_disable(NRF_QSPI_Type * p_reg, uint32_t qspi_int_mask);
+
+/**
+ * @brief Function for retrieving the state of a given interrupt.
+ *
+ * @param[in] p_reg    Pointer to the peripheral register structure.
+ * @param[in] qspi_int Interrupt to check.
+ *
+ * @retval true  If the interrupt is enabled.
+ * @retval false If the interrupt is not enabled.
+ */
+__STATIC_INLINE bool nrf_qspi_int_enable_check(NRF_QSPI_Type const * p_reg,
+                                               nrf_qspi_int_mask_t   qspi_int);
+
+/**
+ * @brief Function for enabling the QSPI peripheral.
+ *
+ * @param[in] p_reg Pointer to the peripheral register structure.
+ */
+__STATIC_INLINE void nrf_qspi_enable(NRF_QSPI_Type * p_reg);
+
+/**
+ * @brief Function for disabling the QSPI peripheral.
+ *
+ * @param[in] p_reg Pointer to the peripheral register structure.
+ */
+__STATIC_INLINE void nrf_qspi_disable(NRF_QSPI_Type * p_reg);
+
+/**
+ * @brief Function for configuring QSPI pins.
+ *
+ * If a given signal is not needed, pass the @ref NRF_QSPI_PIN_NOT_CONNECTED
+ * value instead of its pin number.
+ *
+ * @param[in] p_reg  Pointer to the peripheral register structure.
+ * @param[in] p_pins Pointer to the pins configuration structure. See @ref nrf_qspi_pins_t.
+ */
+__STATIC_INLINE void nrf_qspi_pins_set(NRF_QSPI_Type *         p_reg,
+                                       const nrf_qspi_pins_t * p_pins);
+
+/**
+ * @brief Function for setting the QSPI IFCONFIG0 register.
+ *
+ * @param[in] p_reg    Pointer to the peripheral register structure.
+ * @param[in] p_config Pointer to the QSPI protocol interface configuration structure. See @ref nrf_qspi_prot_conf_t.
+ */
+__STATIC_INLINE void nrf_qspi_ifconfig0_set(NRF_QSPI_Type *              p_reg,
+                                            const nrf_qspi_prot_conf_t * p_config);
+
+/**
+ * @brief Function for setting the QSPI IFCONFIG1 register.
+ *
+ * @param[in] p_reg    Pointer to the peripheral register structure.
+ * @param[in] p_config Pointer to the QSPI physical interface configuration structure. See @ref nrf_qspi_phy_conf_t.
+ */
+__STATIC_INLINE void nrf_qspi_ifconfig1_set(NRF_QSPI_Type *             p_reg,
+                                            const nrf_qspi_phy_conf_t * p_config);
+
+/**
+ * @brief Function for setting the QSPI ADDRCONF register.
+ *
+ * Function must be executed before sending task NRF_QSPI_TASK_ACTIVATE. Data stored in the structure
+ * is sent during the start of the peripheral. Remember that the reset instruction can set
+ * addressing mode to default in the memory device. If memory reset is necessary before configuring
+ * the addressing mode, use custom instruction feature instead of this function.
+ * Case with reset: Enable the peripheral without setting ADDRCONF register, send reset instructions
+ * using a custom instruction feature (reset enable and then reset), set proper addressing mode
+ * using the custom instruction feature.
+ *
+ * @param[in] p_reg    Pointer to the peripheral register structure.
+ * @param[in] p_config Pointer to the addressing mode configuration structure. See @ref nrf_qspi_addrconfig_conf_t.
+*/
+__STATIC_INLINE void nrf_qspi_addrconfig_set(NRF_QSPI_Type *                    p_reg,
+                                             const nrf_qspi_addrconfig_conf_t * p_config);
+
+/**
+ * @brief Function for setting write data into the peripheral register (without starting the process).
+ *
+ * @param[in] p_reg     Pointer to the peripheral register structure.
+ * @param[in] p_buffer  Pointer to the writing buffer.
+ * @param[in] length    Lenght of the writing data.
+ * @param[in] dest_addr Address in memory to write to.
+ */
+__STATIC_INLINE void nrf_qspi_write_buffer_set(NRF_QSPI_Type * p_reg,
+                                               void const *    p_buffer,
+                                               uint32_t        length,
+                                               uint32_t        dest_addr);
+
+/**
+ * @brief Function for setting read data into the peripheral register (without starting the process).
+ *
+ * @param[in]  p_reg    Pointer to the peripheral register structure.
+ * @param[out] p_buffer Pointer to the reading buffer.
+ * @param[in]  length   Length of the read data.
+ * @param[in]  src_addr Address in memory to read from.
+ */
+__STATIC_INLINE void nrf_qspi_read_buffer_set(NRF_QSPI_Type * p_reg,
+                                              void *          p_buffer,
+                                              uint32_t        length,
+                                              uint32_t        src_addr);
+
+/**
+ * @brief Function for setting erase data into the peripheral register (without starting the process).
+ *
+ * @param[in] p_reg      Pointer to the peripheral register structure.
+ * @param[in] erase_addr Start address to erase. Address must have padding set to 4 bytes.
+ * @param[in] len        Size of erasing area.
+ */
+__STATIC_INLINE void nrf_qspi_erase_ptr_set(NRF_QSPI_Type *      p_reg,
+                                            uint32_t             erase_addr,
+                                            nrf_qspi_erase_len_t len);
+
+/**
+ * @brief Function for getting the peripheral status register.
+ *
+ * @param[in] p_reg Pointer to the peripheral register structure.
+ *
+ * @return Peripheral status register.
+ */
+__STATIC_INLINE uint32_t nrf_qspi_status_reg_get(NRF_QSPI_Type const * p_reg);
+
+/**
+ * @brief Function for getting the device status register stored in the peripheral status register.
+ *
+ * @param[in] p_reg Pointer to the peripheral register structure.
+ *
+ * @return Device status register (lower byte).
+ */
+__STATIC_INLINE uint8_t nrf_qspi_sreg_get(NRF_QSPI_Type const * p_reg);
+
+/**
+ * @brief Function for checking if the peripheral is busy or not.
+ *
+ * @param[in] p_reg Pointer to the peripheral register structure.
+ *
+ * @retval true  If QSPI is busy.
+ * @retval false If QSPI is ready.
+ */
+__STATIC_INLINE bool nrf_qspi_busy_check(NRF_QSPI_Type const * p_reg);
+
+/**
+ * @brief Function for setting registers sending with custom instruction transmission.
+ *
+ * This function can be ommited when using NRF_QSPI_CINSTR_LEN_1B as the length argument
+ * (sending only opcode without data).
+ *
+ * @param[in] p_reg     Pointer to the peripheral register structure.
+ * @param[in] length    Length of the custom instruction data.
+ * @param[in] p_tx_data Pointer to the data to send with the custom instruction.
+ */
+__STATIC_INLINE void nrf_qspi_cinstrdata_set(NRF_QSPI_Type *       p_reg,
+                                             nrf_qspi_cinstr_len_t length,
+                                             void const *          p_tx_data);
+
+/**
+ * @brief Function for getting data from register after custom instruction transmission.
+ * @param[in] p_reg     Pointer to the peripheral register structure.
+ * @param[in] length    Length of the custom instruction data.
+ * @param[in] p_rx_data Pointer to the reading buffer.
+ */
+__STATIC_INLINE void nrf_qspi_cinstrdata_get(NRF_QSPI_Type const * p_reg,
+                                             nrf_qspi_cinstr_len_t length,
+                                             void *                p_rx_data);
+
+/**
+ * @brief Function for sending custom instruction to external memory.
+ *
+ * @param[in] p_reg    Pointer to the peripheral register structure.
+ * @param[in] p_config Pointer to the custom instruction configuration structure. See @ref nrf_qspi_cinstr_conf_t.
+ */
+
+__STATIC_INLINE void nrf_qspi_cinstr_transfer_start(NRF_QSPI_Type *                p_reg,
+                                                    const nrf_qspi_cinstr_conf_t * p_config);
+
+#ifndef SUPPRESS_INLINE_IMPLEMENTATION
+
+__STATIC_INLINE void nrf_qspi_task_trigger(NRF_QSPI_Type * p_reg, nrf_qspi_task_t task)
+{
+    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)task)) = 0x1UL;
+}
+
+__STATIC_INLINE uint32_t nrf_qspi_task_address_get(NRF_QSPI_Type const * p_reg,
+                                                   nrf_qspi_task_t       task)
+{
+    return ((uint32_t)p_reg + (uint32_t)task);
+}
+
+__STATIC_INLINE void nrf_qspi_event_clear(NRF_QSPI_Type * p_reg, nrf_qspi_event_t qspi_event)
+{
+    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)qspi_event)) = 0x0UL;
+}
+
+__STATIC_INLINE bool nrf_qspi_event_check(NRF_QSPI_Type const * p_reg, nrf_qspi_event_t qspi_event)
+{
+    return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)qspi_event);
+}
+
+__STATIC_INLINE uint32_t * nrf_qspi_event_address_get(NRF_QSPI_Type const * p_reg,
+                                                      nrf_qspi_event_t      qspi_event)
+{
+    return (uint32_t *)((uint8_t *)p_reg + (uint32_t)qspi_event);
+}
+
+__STATIC_INLINE void nrf_qspi_int_enable(NRF_QSPI_Type * p_reg, uint32_t qspi_int_mask)
+{
+    p_reg->INTENSET = qspi_int_mask;
+}
+
+__STATIC_INLINE void nrf_qspi_int_disable(NRF_QSPI_Type * p_reg, uint32_t qspi_int_mask)
+{
+    p_reg->INTENCLR = qspi_int_mask;
+}
+
+__STATIC_INLINE bool nrf_qspi_int_enable_check(NRF_QSPI_Type const * p_reg,
+                                               nrf_qspi_int_mask_t   qspi_int)
+{
+    return (bool)(p_reg->INTENSET & qspi_int);
+}
+
+__STATIC_INLINE void nrf_qspi_enable(NRF_QSPI_Type * p_reg)
+{
+    p_reg->ENABLE = (QSPI_ENABLE_ENABLE_Enabled << QSPI_ENABLE_ENABLE_Pos);
+}
+
+__STATIC_INLINE void nrf_qspi_disable(NRF_QSPI_Type * p_reg)
+{
+    p_reg->ENABLE = (QSPI_ENABLE_ENABLE_Disabled << QSPI_ENABLE_ENABLE_Pos);
+}
+
+__STATIC_INLINE void nrf_qspi_pins_set(NRF_QSPI_Type * p_reg, const nrf_qspi_pins_t * p_pins)
+{
+    p_reg->PSEL.SCK = NRF_QSPI_PIN_VAL(p_pins->sck_pin);
+    p_reg->PSEL.CSN = NRF_QSPI_PIN_VAL(p_pins->csn_pin);
+    p_reg->PSEL.IO0 = NRF_QSPI_PIN_VAL(p_pins->io0_pin);
+    p_reg->PSEL.IO1 = NRF_QSPI_PIN_VAL(p_pins->io1_pin);
+    p_reg->PSEL.IO2 = NRF_QSPI_PIN_VAL(p_pins->io2_pin);
+    p_reg->PSEL.IO3 = NRF_QSPI_PIN_VAL(p_pins->io3_pin);
+}
+
+__STATIC_INLINE void nrf_qspi_ifconfig0_set(NRF_QSPI_Type *              p_reg,
+                                            const nrf_qspi_prot_conf_t * p_config)
+{
+    uint32_t config = p_config->readoc;
+    config |= ((uint32_t)p_config->writeoc)    << QSPI_IFCONFIG0_WRITEOC_Pos;
+    config |= ((uint32_t)p_config->addrmode)   << QSPI_IFCONFIG0_ADDRMODE_Pos;
+    config |= (p_config->dpmconfig ? 1U : 0U ) << QSPI_IFCONFIG0_DPMENABLE_Pos;
+
+    p_reg->IFCONFIG0 = config;
+}
+
+__STATIC_INLINE void nrf_qspi_ifconfig1_set(NRF_QSPI_Type *             p_reg,
+                                            const nrf_qspi_phy_conf_t * p_config)
+{
+    // IFCONFIG1 mask for reserved fields in the register.
+    uint32_t config = p_reg->IFCONFIG1 & 0x00FFFF00;
+    config |= p_config->sck_delay;
+    config |= (p_config->dpmen ? 1U : 0U)      << QSPI_IFCONFIG1_DPMEN_Pos;
+    config |= ((uint32_t)(p_config->spi_mode)) << QSPI_IFCONFIG1_SPIMODE_Pos;
+    config |= ((uint32_t)(p_config->sck_freq)) << QSPI_IFCONFIG1_SCKFREQ_Pos;
+
+    p_reg->IFCONFIG1 = config;
+}
+
+__STATIC_INLINE void nrf_qspi_addrconfig_set(NRF_QSPI_Type *                    p_reg,
+                                             const nrf_qspi_addrconfig_conf_t * p_config)
+{
+    uint32_t config = p_config->opcode;
+    config |= ((uint32_t)p_config->byte0)   << QSPI_ADDRCONF_BYTE0_Pos;
+    config |= ((uint32_t)p_config->byte1)   << QSPI_ADDRCONF_BYTE1_Pos;
+    config |= ((uint32_t)(p_config->mode))  << QSPI_ADDRCONF_MODE_Pos;
+    config |= (p_config->wipwait ? 1U : 0U) << QSPI_ADDRCONF_WIPWAIT_Pos;
+    config |= (p_config->wren    ? 1U : 0U) << QSPI_ADDRCONF_WREN_Pos;
+
+    p_reg->ADDRCONF = config;
+}
+
+__STATIC_INLINE void nrf_qspi_write_buffer_set(NRF_QSPI_Type * p_reg,
+                                               void const    * p_buffer,
+                                               uint32_t        length,
+                                               uint32_t        dest_addr)
+{
+    p_reg->WRITE.DST = dest_addr;
+    p_reg->WRITE.SRC = (uint32_t) p_buffer;
+    p_reg->WRITE.CNT = length;
+}
+
+__STATIC_INLINE void nrf_qspi_read_buffer_set(NRF_QSPI_Type * p_reg,
+                                              void          * p_buffer,
+                                              uint32_t        length,
+                                              uint32_t        src_addr)
+{
+    p_reg->READ.SRC = src_addr;
+    p_reg->READ.DST = (uint32_t) p_buffer;
+    p_reg->READ.CNT = length;
+}
+
+__STATIC_INLINE void nrf_qspi_erase_ptr_set(NRF_QSPI_Type *      p_reg,
+                                            uint32_t             erase_addr,
+                                            nrf_qspi_erase_len_t len)
+{
+    p_reg->ERASE.PTR = erase_addr;
+    p_reg->ERASE.LEN = len;
+}
+
+__STATIC_INLINE uint32_t nrf_qspi_status_reg_get(NRF_QSPI_Type const * p_reg)
+{
+    return p_reg->STATUS;
+}
+
+__STATIC_INLINE uint8_t nrf_qspi_sreg_get(NRF_QSPI_Type const * p_reg)
+{
+    return (uint8_t)(p_reg->STATUS & QSPI_STATUS_SREG_Msk) >> QSPI_STATUS_SREG_Pos;
+}
+
+__STATIC_INLINE bool nrf_qspi_busy_check(NRF_QSPI_Type const * p_reg)
+{
+    return ((p_reg->STATUS & QSPI_STATUS_READY_Msk) >>
+            QSPI_STATUS_READY_Pos) == QSPI_STATUS_READY_BUSY;
+}
+
+__STATIC_INLINE void nrf_qspi_cinstrdata_set(NRF_QSPI_Type *       p_reg,
+                                             nrf_qspi_cinstr_len_t length,
+                                             void const *          p_tx_data)
+{
+    uint32_t reg = 0;
+    uint8_t const *p_tx_data_8 = (uint8_t const *) p_tx_data;
+
+    // Load custom instruction.
+    switch (length)
+    {
+        case NRF_QSPI_CINSTR_LEN_9B:
+            reg |= ((uint32_t)p_tx_data_8[7]) << QSPI_CINSTRDAT1_BYTE7_Pos;
+            /* fall-through */
+        case NRF_QSPI_CINSTR_LEN_8B:
+            reg |= ((uint32_t)p_tx_data_8[6]) << QSPI_CINSTRDAT1_BYTE6_Pos;
+            /* fall-through */
+        case NRF_QSPI_CINSTR_LEN_7B:
+            reg |= ((uint32_t)p_tx_data_8[5]) << QSPI_CINSTRDAT1_BYTE5_Pos;
+            /* fall-through */
+        case NRF_QSPI_CINSTR_LEN_6B:
+            reg |= ((uint32_t)p_tx_data_8[4]);
+            p_reg->CINSTRDAT1 = reg;
+            reg = 0;
+            /* fall-through */
+        case NRF_QSPI_CINSTR_LEN_5B:
+            reg |= ((uint32_t)p_tx_data_8[3]) << QSPI_CINSTRDAT0_BYTE3_Pos;
+            /* fall-through */
+        case NRF_QSPI_CINSTR_LEN_4B:
+            reg |= ((uint32_t)p_tx_data_8[2]) << QSPI_CINSTRDAT0_BYTE2_Pos;
+            /* fall-through */
+        case NRF_QSPI_CINSTR_LEN_3B:
+            reg |= ((uint32_t)p_tx_data_8[1]) << QSPI_CINSTRDAT0_BYTE1_Pos;
+            /* fall-through */
+        case NRF_QSPI_CINSTR_LEN_2B:
+            reg |= ((uint32_t)p_tx_data_8[0]);
+            p_reg->CINSTRDAT0 = reg;
+            /* fall-through */
+        case NRF_QSPI_CINSTR_LEN_1B:
+            /* Send only opcode. Case to avoid compiler warnings. */
+            break;
+        default:
+            break;
+    }
+}
+
+__STATIC_INLINE void nrf_qspi_cinstrdata_get(NRF_QSPI_Type const * p_reg,
+                                             nrf_qspi_cinstr_len_t length,
+                                             void *                p_rx_data)
+{
+    uint8_t *p_rx_data_8 = (uint8_t *) p_rx_data;
+
+    uint32_t reg = p_reg->CINSTRDAT1;
+    switch (length)
+    {
+        case NRF_QSPI_CINSTR_LEN_9B:
+            p_rx_data_8[7] = (uint8_t)(reg >> QSPI_CINSTRDAT1_BYTE7_Pos);
+            /* fall-through */
+        case NRF_QSPI_CINSTR_LEN_8B:
+            p_rx_data_8[6] = (uint8_t)(reg >> QSPI_CINSTRDAT1_BYTE6_Pos);
+            /* fall-through */
+        case NRF_QSPI_CINSTR_LEN_7B:
+            p_rx_data_8[5] = (uint8_t)(reg >> QSPI_CINSTRDAT1_BYTE5_Pos);
+            /* fall-through */
+        case NRF_QSPI_CINSTR_LEN_6B:
+            p_rx_data_8[4] = (uint8_t)(reg);
+            /* fall-through */
+        default:
+            break;
+    }
+
+    reg = p_reg->CINSTRDAT0;
+    switch (length)
+    {
+        case NRF_QSPI_CINSTR_LEN_5B:
+            p_rx_data_8[3] = (uint8_t)(reg >> QSPI_CINSTRDAT0_BYTE3_Pos);
+            /* fall-through */
+        case NRF_QSPI_CINSTR_LEN_4B:
+            p_rx_data_8[2] = (uint8_t)(reg >> QSPI_CINSTRDAT0_BYTE2_Pos);
+            /* fall-through */
+        case NRF_QSPI_CINSTR_LEN_3B:
+            p_rx_data_8[1] = (uint8_t)(reg >> QSPI_CINSTRDAT0_BYTE1_Pos);
+            /* fall-through */
+        case NRF_QSPI_CINSTR_LEN_2B:
+            p_rx_data_8[0] = (uint8_t)(reg);
+            /* fall-through */
+        case NRF_QSPI_CINSTR_LEN_1B:
+            /* Send only opcode. Case to avoid compiler warnings. */
+            break;
+        default:
+            break;
+    }
+}
+
+__STATIC_INLINE void nrf_qspi_cinstr_transfer_start(NRF_QSPI_Type *                p_reg,
+                                                    const nrf_qspi_cinstr_conf_t * p_config)
+{
+    p_reg->CINSTRCONF = (((uint32_t)p_config->opcode    << QSPI_CINSTRCONF_OPCODE_Pos) |
+                         ((uint32_t)p_config->length    << QSPI_CINSTRCONF_LENGTH_Pos) |
+                         ((uint32_t)p_config->io2_level << QSPI_CINSTRCONF_LIO2_Pos) |
+                         ((uint32_t)p_config->io3_level << QSPI_CINSTRCONF_LIO3_Pos) |
+                         ((uint32_t)p_config->wipwait   << QSPI_CINSTRCONF_WIPWAIT_Pos) |
+                         ((uint32_t)p_config->wren      << QSPI_CINSTRCONF_WREN_Pos));
+}
+
+#endif // SUPPRESS_INLINE_IMPLEMENTATION
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // NRF_QSPI_H__
+
+/** @} */

nRF5_SDK_11.0.0_89a8197/components/drivers_nrf/hal/nrf_rng.h

@@ -1,15 +1,42 @@
-/* Copyright (c) 2014 Nordic Semiconductor. All Rights Reserved.
+/**
+ * Copyright (c) 2014 - 2017, Nordic Semiconductor ASA
  * 
- * The information contained herein is property of Nordic Semiconductor ASA.
+ * All rights reserved.
- * Terms and conditions of usage are described in detail in NORDIC
- * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
  * 
- * Licensees are granted free, non-transferable use of the information. NO
+ * Redistribution and use in source and binary forms, with or without modification,
- * WARRANTY of ANY KIND is provided. This heading must NOT be removed from
+ * are permitted provided that the following conditions are met:
- * the file.
+ * 
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ *    list of conditions and the following disclaimer.
+ * 
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ *    Semiconductor ASA integrated circuit in a product or a software update for
+ *    such product, must reproduce the above copyright notice, this list of
+ *    conditions and the following disclaimer in the documentation and/or other
+ *    materials provided with the distribution.
+ * 
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ *    contributors may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ * 
+ * 4. This software, with or without modification, must only be used with a
+ *    Nordic Semiconductor ASA integrated circuit.
+ * 
+ * 5. Any software provided in binary form under this license must not be reverse
+ *    engineered, decompiled, modified and/or disassembled.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  * 
  */
-
 /**
  * @file
  * @brief RNG HAL API.
@@ -29,6 +56,10 @@
 #include <stdbool.h>
 #include "nrf.h"
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 #define NRF_RNG_TASK_SET    (1UL)
 #define NRF_RNG_EVENT_CLEAR (0UL)
 /**
@@ -73,20 +104,14 @@ typedef enum
  *
  * @param[in]  rng_int_mask              Mask of interrupts.
  */
-__STATIC_INLINE void nrf_rng_int_enable(uint32_t rng_int_mask)
+__STATIC_INLINE void nrf_rng_int_enable(uint32_t rng_int_mask);
-{
-    NRF_RNG->INTENSET = rng_int_mask;
-}
 
 /**
  * @brief Function for disabling interrupts.
  *
  * @param[in]  rng_int_mask              Mask of interrupts.
  */
-__STATIC_INLINE void nrf_rng_int_disable(uint32_t rng_int_mask)
+__STATIC_INLINE void nrf_rng_int_disable(uint32_t rng_int_mask);
-{
-    NRF_RNG->INTENCLR = rng_int_mask;
-}
 
 /**
  * @brief Function for getting the state of a specific interrupt.
@@ -96,10 +121,7 @@ __STATIC_INLINE void nrf_rng_int_disable(uint32_t rng_int_mask)
  * @retval     true                   If the interrupt is not enabled.
  * @retval     false                  If the interrupt is enabled.
  */
-__STATIC_INLINE bool nrf_rng_int_get(nrf_rng_int_mask_t rng_int_mask)
+__STATIC_INLINE bool nrf_rng_int_get(nrf_rng_int_mask_t rng_int_mask);
-{
-    return (bool)(NRF_RNG->INTENCLR & rng_int_mask);
-}
 
 /**
  * @brief Function for getting the address of a specific task.
@@ -108,20 +130,14 @@ __STATIC_INLINE bool nrf_rng_int_get(nrf_rng_int_mask_t rng_int_mask)
  *
  * @param[in]  rng_task              Task.
  */
-__STATIC_INLINE uint32_t * nrf_rng_task_address_get(nrf_rng_task_t rng_task)
+__STATIC_INLINE uint32_t * nrf_rng_task_address_get(nrf_rng_task_t rng_task);
-{
-    return (uint32_t *)((uint8_t *)NRF_RNG + rng_task);
-}
 
 /**
  * @brief Function for setting a specific task.
  *
  * @param[in]  rng_task              Task.
  */
-__STATIC_INLINE void nrf_rng_task_trigger(nrf_rng_task_t rng_task)
+__STATIC_INLINE void nrf_rng_task_trigger(nrf_rng_task_t rng_task);
-{
-    *((volatile uint32_t *)((uint8_t *)NRF_RNG + rng_task)) = NRF_RNG_TASK_SET;
-}
 
 /**
  * @brief Function for getting address of a specific event.
@@ -130,20 +146,14 @@ __STATIC_INLINE void nrf_rng_task_trigger(nrf_rng_task_t rng_task)
  *
  * @param[in]  rng_event              Event.
  */
-__STATIC_INLINE uint32_t * nrf_rng_event_address_get(nrf_rng_event_t rng_event)
+__STATIC_INLINE uint32_t * nrf_rng_event_address_get(nrf_rng_event_t rng_event);
-{
-    return (uint32_t *)((uint8_t *)NRF_RNG + rng_event);
-}
 
 /**
  * @brief Function for clearing a specific event.
  *
  * @param[in]  rng_event              Event.
  */
-__STATIC_INLINE void nrf_rng_event_clear(nrf_rng_event_t rng_event)
+__STATIC_INLINE void nrf_rng_event_clear(nrf_rng_event_t rng_event);
-{
-    *((volatile uint32_t *)((uint8_t *)NRF_RNG + rng_event)) = NRF_RNG_EVENT_CLEAR;
-}
 
 /**
  * @brief Function for getting the state of a specific event.
@@ -153,10 +163,7 @@ __STATIC_INLINE void nrf_rng_event_clear(nrf_rng_event_t rng_event)
  * @retval     true               If the event is not set.
  * @retval     false              If the event is set.
  */
-__STATIC_INLINE bool nrf_rng_event_get(nrf_rng_event_t rng_event)
+__STATIC_INLINE bool nrf_rng_event_get(nrf_rng_event_t rng_event);
-{
-    return (bool)*((volatile uint32_t *)((uint8_t *)NRF_RNG + rng_event));
-}
 
 /**
  * @brief Function for setting shortcuts.
@@ -164,10 +171,7 @@ __STATIC_INLINE bool nrf_rng_event_get(nrf_rng_event_t rng_event)
  * @param[in]  rng_short_mask              Mask of shortcuts.
  *
  */
-__STATIC_INLINE void nrf_rng_shorts_enable(uint32_t rng_short_mask)
+__STATIC_INLINE void nrf_rng_shorts_enable(uint32_t rng_short_mask);
-{
-     NRF_RNG->SHORTS |= rng_short_mask;
-}
 
 /**
  * @brief Function for clearing shortcuts.
@@ -175,37 +179,104 @@ __STATIC_INLINE void nrf_rng_shorts_enable(uint32_t rng_short_mask)
  * @param[in]  rng_short_mask              Mask of shortcuts.
  *
  */
-__STATIC_INLINE void nrf_rng_shorts_disable(uint32_t rng_short_mask)
+__STATIC_INLINE void nrf_rng_shorts_disable(uint32_t rng_short_mask);
-{
-     NRF_RNG->SHORTS &= ~rng_short_mask;
-}
 
 /**
  * @brief Function for getting the previously generated random value.
  *
  * @return     Previously generated random value.
  */
+__STATIC_INLINE uint8_t nrf_rng_random_value_get(void);
+
+/**
+ * @brief Function for enabling digital error correction.
+ */
+__STATIC_INLINE void nrf_rng_error_correction_enable(void);
+
+/**
+ * @brief Function for disabling digital error correction.
+ */
+__STATIC_INLINE void nrf_rng_error_correction_disable(void);
+
+/**
+ *@}
+ **/
+
+#ifndef SUPPRESS_INLINE_IMPLEMENTATION
+
+__STATIC_INLINE void nrf_rng_int_enable(uint32_t rng_int_mask)
+{
+    NRF_RNG->INTENSET = rng_int_mask;
+}
+
+__STATIC_INLINE void nrf_rng_int_disable(uint32_t rng_int_mask)
+{
+    NRF_RNG->INTENCLR = rng_int_mask;
+}
+
+__STATIC_INLINE bool nrf_rng_int_get(nrf_rng_int_mask_t rng_int_mask)
+{
+    return (bool)(NRF_RNG->INTENCLR & rng_int_mask);
+}
+
+__STATIC_INLINE uint32_t * nrf_rng_task_address_get(nrf_rng_task_t rng_task)
+{
+    return (uint32_t *)((uint8_t *)NRF_RNG + rng_task);
+}
+
+__STATIC_INLINE void nrf_rng_task_trigger(nrf_rng_task_t rng_task)
+{
+    *((volatile uint32_t *)((uint8_t *)NRF_RNG + rng_task)) = NRF_RNG_TASK_SET;
+}
+
+__STATIC_INLINE uint32_t * nrf_rng_event_address_get(nrf_rng_event_t rng_event)
+{
+    return (uint32_t *)((uint8_t *)NRF_RNG + rng_event);
+}
+
+__STATIC_INLINE void nrf_rng_event_clear(nrf_rng_event_t rng_event)
+{
+    *((volatile uint32_t *)((uint8_t *)NRF_RNG + rng_event)) = NRF_RNG_EVENT_CLEAR;
+#if __CORTEX_M == 0x04
+    volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)NRF_RNG + rng_event));
+    (void)dummy;
+#endif
+}
+
+__STATIC_INLINE bool nrf_rng_event_get(nrf_rng_event_t rng_event)
+{
+    return (bool) * ((volatile uint32_t *)((uint8_t *)NRF_RNG + rng_event));
+}
+
+__STATIC_INLINE void nrf_rng_shorts_enable(uint32_t rng_short_mask)
+{
+     NRF_RNG->SHORTS |= rng_short_mask;
+}
+
+__STATIC_INLINE void nrf_rng_shorts_disable(uint32_t rng_short_mask)
+{
+     NRF_RNG->SHORTS &= ~rng_short_mask;
+}
+
 __STATIC_INLINE uint8_t nrf_rng_random_value_get(void)
 {
     return (uint8_t)(NRF_RNG->VALUE & RNG_VALUE_VALUE_Msk);
 }
 
-/**
- * @brief Function for enabling digital error correction.
- */
 __STATIC_INLINE void nrf_rng_error_correction_enable(void)
 {
     NRF_RNG->CONFIG |= RNG_CONFIG_DERCEN_Msk;
 }
 
-/**
- * @brief Function for disabling digital error correction.
- */
 __STATIC_INLINE void nrf_rng_error_correction_disable(void)
 {
     NRF_RNG->CONFIG &= ~RNG_CONFIG_DERCEN_Msk;
 }
-/**
+
- *@}
+#endif
- **/
+
+#ifdef __cplusplus
+}
+#endif
+
 #endif /* NRF_RNG_H__ */

nRF5_SDK_11.0.0_89a8197/components/drivers_nrf/hal/nrf_rtc.h

@@ -1,15 +1,42 @@
-/* Copyright (c) 2014 Nordic Semiconductor. All Rights Reserved.
+/**
+ * Copyright (c) 2014 - 2017, Nordic Semiconductor ASA
  * 
- * The information contained herein is property of Nordic Semiconductor ASA.
+ * All rights reserved.
- * Terms and conditions of usage are described in detail in NORDIC
- * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
  * 
- * Licensees are granted free, non-transferable use of the information. NO
+ * Redistribution and use in source and binary forms, with or without modification,
- * WARRANTY of ANY KIND is provided. This heading must NOT be removed from
+ * are permitted provided that the following conditions are met:
- * the file.
+ * 
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ *    list of conditions and the following disclaimer.
+ * 
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ *    Semiconductor ASA integrated circuit in a product or a software update for
+ *    such product, must reproduce the above copyright notice, this list of
+ *    conditions and the following disclaimer in the documentation and/or other
+ *    materials provided with the distribution.
+ * 
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ *    contributors may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ * 
+ * 4. This software, with or without modification, must only be used with a
+ *    Nordic Semiconductor ASA integrated circuit.
+ * 
+ * 5. Any software provided in binary form under this license must not be reverse
+ *    engineered, decompiled, modified and/or disassembled.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  * 
  */
-
 /**
  * @file
  * @brief RTC HAL API.
@@ -30,24 +57,31 @@
 #include <stdbool.h>
 #include "nrf.h"
 #include "nrf_assert.h"
+#include "nrf_peripherals.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
 
 /**
  * @brief Macro for getting the number of compare channels available
  *        in a given RTC instance.
  */
-#ifdef NRF51
+
-    #define NRF_RTC_CC_CHANNEL_COUNT(id)  4
+#define NRF_RTC_CC_CHANNEL_COUNT(id) CONCAT_3(RTC, id, _CC_NUM)
-#else
-    #define NRF_RTC_CC_CHANNEL_COUNT(id)  ((id) == 0 ? 3 : 4)
-#endif
 
 #define RTC_INPUT_FREQ 32768 /**< Input frequency of the RTC instance. */
 
-/**< Macro for wrapping values to RTC capacity. */
+/**
-#define RTC_WRAP(val) (val & RTC_COUNTER_COUNTER_Msk)
+ * @brief Macro for converting expected frequency to prescaler setting.
+ */
+#define RTC_FREQ_TO_PRESCALER(FREQ) (uint16_t)(((RTC_INPUT_FREQ) / (FREQ)) - 1)
 
-#define RTC_CHANNEL_INT_MASK(ch)    ((uint32_t)NRF_RTC_INT_COMPARE0_MASK << ch)
+/**< Macro for wrapping values to RTC capacity. */
-#define RTC_CHANNEL_EVENT_ADDR(ch)  (nrf_rtc_event_t)(NRF_RTC_EVENT_COMPARE_0 + ch*sizeof(uint32_t))
+#define RTC_WRAP(val) ((val) & RTC_COUNTER_COUNTER_Msk)
+
+#define RTC_CHANNEL_INT_MASK(ch)    ((uint32_t)(NRF_RTC_INT_COMPARE0_MASK) << (ch))
+#define RTC_CHANNEL_EVENT_ADDR(ch)  (nrf_rtc_event_t)((NRF_RTC_EVENT_COMPARE_0) + (ch) * sizeof(uint32_t))
 /**
  * @enum nrf_rtc_task_t
  * @brief RTC tasks.
@@ -94,7 +128,7 @@ typedef enum
 
 /**@brief Function for setting a compare value for a channel.
  *
- * @param[in]  p_rtc         Pointer to the instance register structure.
+ * @param[in]  p_rtc         Pointer to the peripheral registers structure.
  * @param[in]  ch            Channel.
  * @param[in]  cc_val        Compare value to set.
  */
@@ -102,7 +136,7 @@ __STATIC_INLINE  void nrf_rtc_cc_set(NRF_RTC_Type * p_rtc, uint32_t ch, uint32_t
 
 /**@brief Function for returning the compare value for a channel.
  *
- * @param[in]  p_rtc         Pointer to the instance register structure.
+ * @param[in]  p_rtc         Pointer to the peripheral registers structure.
  * @param[in]  ch            Channel.
  *
  * @return                   COMPARE[ch] value.
@@ -111,21 +145,21 @@ __STATIC_INLINE  uint32_t nrf_rtc_cc_get(NRF_RTC_Type * p_rtc, uint32_t ch);
 
 /**@brief Function for enabling interrupts.
  *
- * @param[in]  p_rtc         Pointer to the instance register structure.
+ * @param[in]  p_rtc         Pointer to the peripheral registers structure.
  * @param[in]  mask          Interrupt mask to be enabled.
  */
 __STATIC_INLINE void nrf_rtc_int_enable(NRF_RTC_Type * p_rtc, uint32_t mask);
 
 /**@brief Function for disabling interrupts.
  *
- * @param[in]  p_rtc         Pointer to the instance register structure.
+ * @param[in]  p_rtc         Pointer to the peripheral registers structure.
  * @param[in]  mask          Interrupt mask to be disabled.
  */
 __STATIC_INLINE void nrf_rtc_int_disable(NRF_RTC_Type * p_rtc, uint32_t mask);
 
 /**@brief Function for checking if interrupts are enabled.
  *
- * @param[in]  p_rtc         Pointer to the instance register structure.
+ * @param[in]  p_rtc         Pointer to the peripheral registers structure.
  * @param[in]  mask          Mask of interrupt flags to check.
  *
  * @return                   Mask with enabled interrupts.
@@ -134,7 +168,7 @@ __STATIC_INLINE uint32_t nrf_rtc_int_is_enabled(NRF_RTC_Type * p_rtc, uint32_t m
 
 /**@brief Function for returning the status of currently enabled interrupts.
  *
- * @param[in]  p_rtc         Pointer to the instance register structure.
+ * @param[in]  p_rtc         Pointer to the peripheral registers structure.
  *
  * @return                   Value in INTEN register.
  */
@@ -142,7 +176,7 @@ __STATIC_INLINE uint32_t nrf_rtc_int_get(NRF_RTC_Type * p_rtc);
 
 /**@brief Function for checking if an event is pending.
  *
- * @param[in]  p_rtc         Pointer to the instance register structure.
+ * @param[in]  p_rtc         Pointer to the peripheral registers structure.
  * @param[in]  event         Address of the event.
  *
  * @return                   Mask of pending events.
@@ -151,14 +185,14 @@ __STATIC_INLINE uint32_t nrf_rtc_event_pending(NRF_RTC_Type * p_rtc, nrf_rtc_eve
 
 /**@brief Function for clearing an event.
  *
- * @param[in]  p_rtc         Pointer to the instance register structure.
+ * @param[in]  p_rtc         Pointer to the peripheral registers structure.
  * @param[in]  event         Event to clear.
  */
 __STATIC_INLINE void nrf_rtc_event_clear(NRF_RTC_Type * p_rtc, nrf_rtc_event_t event);
 
 /**@brief Function for returning a counter value.
  *
- * @param[in]  p_rtc         Pointer to the instance register structure.
+ * @param[in]  p_rtc         Pointer to the peripheral registers structure.
  *
  * @return                   Counter value.
  */
@@ -166,14 +200,14 @@ __STATIC_INLINE uint32_t nrf_rtc_counter_get(NRF_RTC_Type * p_rtc);
 
 /**@brief Function for setting a prescaler value.
  *
- * @param[in]  p_rtc         Pointer to the instance register structure.
+ * @param[in]  p_rtc         Pointer to the peripheral registers structure.
  * @param[in]  val           Value to set the prescaler to.
  */
 __STATIC_INLINE void nrf_rtc_prescaler_set(NRF_RTC_Type * p_rtc, uint32_t val);
 
 /**@brief Function for returning the address of an event.
  *
- * @param[in]  p_rtc         Pointer to the instance register structure.
+ * @param[in]  p_rtc         Pointer to the peripheral registers structure.
  * @param[in]  event         Requested event.
  *
  * @return     Address of the requested event register.
@@ -182,7 +216,7 @@ __STATIC_INLINE uint32_t nrf_rtc_event_address_get(NRF_RTC_Type * p_rtc, nrf_rtc
 
 /**@brief Function for returning the address of a task.
  *
- * @param[in]  p_rtc         Pointer to the instance register structure.
+ * @param[in]  p_rtc         Pointer to the peripheral registers structure.
  * @param[in]  task          Requested task.
  *
  * @return     Address of the requested task register.
@@ -191,21 +225,21 @@ __STATIC_INLINE uint32_t nrf_rtc_task_address_get(NRF_RTC_Type * p_rtc, nrf_rtc_
 
 /**@brief Function for starting a task.
  *
- * @param[in]  p_rtc         Pointer to the instance register structure.
+ * @param[in]  p_rtc         Pointer to the peripheral registers structure.
  * @param[in]  task          Requested task.
  */
 __STATIC_INLINE void nrf_rtc_task_trigger(NRF_RTC_Type * p_rtc, nrf_rtc_task_t task);
 
 /**@brief Function for enabling events.
  *
- * @param[in]  p_rtc         Pointer to the instance register structure.
+ * @param[in]  p_rtc         Pointer to the peripheral registers structure.
  * @param[in]  mask          Mask of event flags to enable.
  */
 __STATIC_INLINE void nrf_rtc_event_enable(NRF_RTC_Type * p_rtc, uint32_t mask);
 
 /**@brief Function for disabling an event.
  *
- * @param[in]  p_rtc         Pointer to the instance register structure.
+ * @param[in]  p_rtc         Pointer to the peripheral registers structure.
  * @param[in]  event         Requested event.
  */
 __STATIC_INLINE void nrf_rtc_event_disable(NRF_RTC_Type * p_rtc, uint32_t event);
@@ -301,4 +335,9 @@ __STATIC_INLINE void nrf_rtc_event_disable(NRF_RTC_Type * p_rtc, uint32_t mask)
 }
 #endif
 
+
+#ifdef __cplusplus
+}
+#endif
+
 #endif  /* NRF_RTC_H */

nRF5_SDK_11.0.0_89a8197/components/drivers_nrf/hal/nrf_saadc.c

@@ -1,20 +1,48 @@
-/* Copyright (c) 2015 Nordic Semiconductor. All Rights Reserved.
+/**
+ * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
  * 
- * The information contained herein is property of Nordic Semiconductor ASA.
+ * All rights reserved.
- * Terms and conditions of usage are described in detail in NORDIC
- * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
  * 
- * Licensees are granted free, non-transferable use of the information. NO
+ * Redistribution and use in source and binary forms, with or without modification,
- * WARRANTY of ANY KIND is provided. This heading must NOT be removed from
+ * are permitted provided that the following conditions are met:
- * the file.
+ * 
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ *    list of conditions and the following disclaimer.
+ * 
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ *    Semiconductor ASA integrated circuit in a product or a software update for
+ *    such product, must reproduce the above copyright notice, this list of
+ *    conditions and the following disclaimer in the documentation and/or other
+ *    materials provided with the distribution.
+ * 
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ *    contributors may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ * 
+ * 4. This software, with or without modification, must only be used with a
+ *    Nordic Semiconductor ASA integrated circuit.
+ * 
+ * 5. Any software provided in binary form under this license must not be reverse
+ *    engineered, decompiled, modified and/or disassembled.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  * 
  */
-
 /**
  * @file
  * @brief SAADC HAL implementation
  */
-
+#include "sdk_config.h"
+#if SAADC_ENABLED
 #include "nrf_saadc.h"
 
 void nrf_saadc_channel_init(uint8_t channel, nrf_saadc_channel_config_t const * const config)
@@ -25,7 +53,10 @@ void nrf_saadc_channel_init(uint8_t channel, nrf_saadc_channel_config_t const *
             | ((config->gain       << SAADC_CH_CONFIG_GAIN_Pos)   & SAADC_CH_CONFIG_GAIN_Msk)
             | ((config->reference  << SAADC_CH_CONFIG_REFSEL_Pos) & SAADC_CH_CONFIG_REFSEL_Msk)
             | ((config->acq_time   << SAADC_CH_CONFIG_TACQ_Pos)   & SAADC_CH_CONFIG_TACQ_Msk)
-            | ((config->mode       << SAADC_CH_CONFIG_MODE_Pos)   & SAADC_CH_CONFIG_MODE_Msk);
+            | ((config->mode       << SAADC_CH_CONFIG_MODE_Pos)   & SAADC_CH_CONFIG_MODE_Msk)
+            | ((config->burst      << SAADC_CH_CONFIG_BURST_Pos)  & SAADC_CH_CONFIG_BURST_Msk);
     nrf_saadc_channel_input_set(channel, config->pin_p, config->pin_n);
     return;
 }
+#endif //SAADC_ENABLED
+

nRF5_SDK_11.0.0_89a8197/components/drivers_nrf/hal/nrf_saadc.h

@@ -1,16 +1,42 @@
-/* Copyright (c) 2015 Nordic Semiconductor. All Rights Reserved.
+/**
+ * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
  * 
- * The information contained herein is property of Nordic Semiconductor ASA.
+ * All rights reserved.
- * Terms and conditions of usage are described in detail in NORDIC
- * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
  * 
- * Licensees are granted free, non-transferable use of the information. NO
+ * Redistribution and use in source and binary forms, with or without modification,
- * WARRANTY of ANY KIND is provided. This heading must NOT be removed from
+ * are permitted provided that the following conditions are met:
- * the file.
+ * 
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ *    list of conditions and the following disclaimer.
+ * 
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ *    Semiconductor ASA integrated circuit in a product or a software update for
+ *    such product, must reproduce the above copyright notice, this list of
+ *    conditions and the following disclaimer in the documentation and/or other
+ *    materials provided with the distribution.
+ * 
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ *    contributors may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ * 
+ * 4. This software, with or without modification, must only be used with a
+ *    Nordic Semiconductor ASA integrated circuit.
+ * 
+ * 5. Any software provided in binary form under this license must not be reverse
+ *    engineered, decompiled, modified and/or disassembled.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  * 
  */
-
-
 #ifndef NRF_SAADC_H_
 #define NRF_SAADC_H_
 
@@ -27,6 +53,10 @@
 #include "nrf.h"
 #include "nrf_assert.h"
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 #define NRF_SAADC_CHANNEL_COUNT 8
 
 /**
@@ -138,6 +168,16 @@ typedef enum
 } nrf_saadc_mode_t;
 
 
+/**
+ * @brief Analog-to-digital converter channel burst mode.
+ */
+typedef enum
+{
+    NRF_SAADC_BURST_DISABLED = SAADC_CH_CONFIG_BURST_Disabled, ///< Burst mode is disabled (normal operation).
+    NRF_SAADC_BURST_ENABLED  = SAADC_CH_CONFIG_BURST_Enabled   ///< Burst mode is enabled. SAADC takes 2^OVERSAMPLE number of samples as fast as it can, and sends the average to Data RAM.
+} nrf_saadc_burst_t;
+
+
 /**
  * @brief Analog-to-digital converter tasks.
  */
@@ -157,6 +197,8 @@ typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */
 {
     NRF_SAADC_EVENT_STARTED       = offsetof(NRF_SAADC_Type, EVENTS_STARTED),       ///< The ADC has started.
     NRF_SAADC_EVENT_END           = offsetof(NRF_SAADC_Type, EVENTS_END),           ///< The ADC has filled up the result buffer.
+    NRF_SAADC_EVENT_DONE          = offsetof(NRF_SAADC_Type, EVENTS_DONE),          ///< A conversion task has been completed.
+    NRF_SAADC_EVENT_RESULTDONE    = offsetof(NRF_SAADC_Type, EVENTS_RESULTDONE),    ///< A result is ready to get transferred to RAM.
     NRF_SAADC_EVENT_CALIBRATEDONE = offsetof(NRF_SAADC_Type, EVENTS_CALIBRATEDONE), ///< Calibration is complete.
     NRF_SAADC_EVENT_STOPPED       = offsetof(NRF_SAADC_Type, EVENTS_STOPPED),       ///< The ADC has stopped.
     NRF_SAADC_EVENT_CH0_LIMITH    = offsetof(NRF_SAADC_Type, EVENTS_CH[0].LIMITH),  ///< Last result is equal or above CH[0].LIMIT.HIGH.
@@ -185,6 +227,9 @@ typedef enum
 {
     NRF_SAADC_INT_STARTED       = SAADC_INTENSET_STARTED_Msk,       ///< Interrupt on EVENTS_STARTED event.
     NRF_SAADC_INT_END           = SAADC_INTENSET_END_Msk,           ///< Interrupt on EVENTS_END event.
+    NRF_SAADC_INT_DONE          = SAADC_INTENSET_DONE_Msk,          ///< Interrupt on EVENTS_DONE event.
+    NRF_SAADC_INT_RESULTDONE    = SAADC_INTENSET_RESULTDONE_Msk,    ///< Interrupt on EVENTS_RESULTDONE event.
+    NRF_SAADC_INT_CALIBRATEDONE = SAADC_INTENSET_CALIBRATEDONE_Msk, ///< Interrupt on EVENTS_CALIBRATEDONE event.
     NRF_SAADC_INT_STOPPED       = SAADC_INTENSET_STOPPED_Msk,       ///< Interrupt on EVENTS_STOPPED event.
     NRF_SAADC_INT_CH0LIMITH     = SAADC_INTENSET_CH0LIMITH_Msk,     ///< Interrupt on EVENTS_CH[0].LIMITH event.
     NRF_SAADC_INT_CH0LIMITL     = SAADC_INTENSET_CH0LIMITL_Msk,     ///< Interrupt on EVENTS_CH[0].LIMITL event.
@@ -242,6 +287,7 @@ typedef struct
     nrf_saadc_reference_t reference;
     nrf_saadc_acqtime_t   acq_time;
     nrf_saadc_mode_t      mode;
+    nrf_saadc_burst_t     burst;
     nrf_saadc_input_t     pin_p;
     nrf_saadc_input_t     pin_n;
 } nrf_saadc_channel_config_t;
@@ -292,6 +338,10 @@ __STATIC_INLINE bool nrf_saadc_event_check(nrf_saadc_event_t saadc_event)
 __STATIC_INLINE void nrf_saadc_event_clear(nrf_saadc_event_t saadc_event)
 {
     *((volatile uint32_t *)((uint8_t *)NRF_SAADC + (uint32_t)saadc_event)) = 0x0UL;
+#if __CORTEX_M == 0x04
+    volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)NRF_SAADC + (uint32_t)saadc_event));
+    (void)dummy;
+#endif
 }
 
 
@@ -302,9 +352,9 @@ __STATIC_INLINE void nrf_saadc_event_clear(nrf_saadc_event_t saadc_event)
  *
  * @return Address of the specified SAADC event.
  */
-__STATIC_INLINE volatile uint32_t * nrf_saadc_event_address_get(nrf_saadc_event_t saadc_event)
+__STATIC_INLINE uint32_t  nrf_saadc_event_address_get(nrf_saadc_event_t saadc_event)
 {
-    return (volatile uint32_t *)((uint8_t *)NRF_SAADC + (uint32_t)saadc_event);
+    return (uint32_t )((uint8_t *)NRF_SAADC + (uint32_t)saadc_event);
 }
 
 
@@ -551,4 +601,9 @@ void nrf_saadc_channel_init(uint8_t channel, nrf_saadc_channel_config_t const *
  *@}
  **/
 
+
+#ifdef __cplusplus
+}
+#endif
+
 #endif /* NRF_SAADC_H_ */

nRF5_SDK_11.0.0_89a8197/components/drivers_nrf/hal/nrf_spi.h

@@ -1,19 +1,46 @@
-/* Copyright (c) 2015 Nordic Semiconductor. All Rights Reserved.
+/**
+ * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
  * 
- * The information contained herein is property of Nordic Semiconductor ASA.
+ * All rights reserved.
- * Terms and conditions of usage are described in detail in NORDIC
- * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
  * 
- * Licensees are granted free, non-transferable use of the information. NO
+ * Redistribution and use in source and binary forms, with or without modification,
- * WARRANTY of ANY KIND is provided. This heading must NOT be removed from
+ * are permitted provided that the following conditions are met:
- * the file.
+ * 
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ *    list of conditions and the following disclaimer.
+ * 
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ *    Semiconductor ASA integrated circuit in a product or a software update for
+ *    such product, must reproduce the above copyright notice, this list of
+ *    conditions and the following disclaimer in the documentation and/or other
+ *    materials provided with the distribution.
+ * 
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ *    contributors may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ * 
+ * 4. This software, with or without modification, must only be used with a
+ *    Nordic Semiconductor ASA integrated circuit.
+ * 
+ * 5. Any software provided in binary form under this license must not be reverse
+ *    engineered, decompiled, modified and/or disassembled.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  * 
  */
-
 /**
  * @defgroup nrf_spi_hal SPI HAL
  * @{
- * @ingroup nrf_spi_master
+ * @ingroup nrf_spi
  *
  * @brief Hardware access layer for accessing the SPI peripheral.
  */
@@ -26,6 +53,11 @@
 #include <stdint.h>
 
 #include "nrf.h"
+#include "nrf_peripherals.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
 
 
 /**
@@ -94,78 +126,78 @@ typedef enum
 /**
  * @brief Function for clearing a specific SPI event.
  *
- * @param[in] p_spi     SPI instance.
+ * @param[in] p_reg     Pointer to the peripheral registers structure.
  * @param[in] spi_event Event to clear.
  */
-__STATIC_INLINE void nrf_spi_event_clear(NRF_SPI_Type * p_spi,
+__STATIC_INLINE void nrf_spi_event_clear(NRF_SPI_Type * p_reg,
                                          nrf_spi_event_t spi_event);
 
 /**
  * @brief Function for checking the state of a specific SPI event.
  *
- * @param[in] p_spi     SPI instance.
+ * @param[in] p_reg     Pointer to the peripheral registers structure.
  * @param[in] spi_event Event to check.
  *
  * @retval true  If the event is set.
  * @retval false If the event is not set.
  */
-__STATIC_INLINE bool nrf_spi_event_check(NRF_SPI_Type * p_spi,
+__STATIC_INLINE bool nrf_spi_event_check(NRF_SPI_Type * p_reg,
                                          nrf_spi_event_t spi_event);
 
 /**
  * @brief Function for getting the address of a specific SPI event register.
  *
- * @param[in] p_spi     SPI instance.
+ * @param[in] p_reg     Pointer to the peripheral registers structure.
  * @param[in] spi_event Requested event.
  *
  * @return Address of the specified event register.
  */
-__STATIC_INLINE uint32_t * nrf_spi_event_address_get(NRF_SPI_Type  * p_spi,
+__STATIC_INLINE uint32_t * nrf_spi_event_address_get(NRF_SPI_Type  * p_reg,
                                                      nrf_spi_event_t spi_event);
 
 /**
  * @brief Function for enabling specified interrupts.
  *
- * @param[in] p_spi         SPI instance.
+ * @param[in] p_reg         Pointer to the peripheral registers structure.
  * @param[in] spi_int_mask  Interrupts to enable.
  */
-__STATIC_INLINE void nrf_spi_int_enable(NRF_SPI_Type * p_spi,
+__STATIC_INLINE void nrf_spi_int_enable(NRF_SPI_Type * p_reg,
                                         uint32_t spi_int_mask);
 
 /**
  * @brief Function for disabling specified interrupts.
  *
- * @param[in] p_spi         SPI instance.
+ * @param[in] p_reg         Pointer to the peripheral registers structure.
  * @param[in] spi_int_mask  Interrupts to disable.
  */
-__STATIC_INLINE void nrf_spi_int_disable(NRF_SPI_Type * p_spi,
+__STATIC_INLINE void nrf_spi_int_disable(NRF_SPI_Type * p_reg,
                                          uint32_t spi_int_mask);
 
 /**
  * @brief Function for retrieving the state of a given interrupt.
  *
- * @param[in] p_spi   SPI instance.
+ * @param[in] p_reg   Pointer to the peripheral registers structure.
  * @param[in] spi_int Interrupt to check.
  *
  * @retval true  If the interrupt is enabled.
  * @retval false If the interrupt is not enabled.
  */
-__STATIC_INLINE bool nrf_spi_int_enable_check(NRF_SPI_Type * p_spi,
+__STATIC_INLINE bool nrf_spi_int_enable_check(NRF_SPI_Type * p_reg,
                                               nrf_spi_int_mask_t spi_int);
 
 /**
  * @brief Function for enabling the SPI peripheral.
  *
- * @param[in] p_spi SPI instance.
+ * @param[in] p_reg Pointer to the peripheral registers structure.
  */
-__STATIC_INLINE void nrf_spi_enable(NRF_SPI_Type * p_spi);
+__STATIC_INLINE void nrf_spi_enable(NRF_SPI_Type * p_reg);
 
 /**
  * @brief Function for disabling the SPI peripheral.
  *
- * @param[in] p_spi SPI instance.
+ * @param[in] p_reg Pointer to the peripheral registers structure.
  */
-__STATIC_INLINE void nrf_spi_disable(NRF_SPI_Type * p_spi);
+__STATIC_INLINE void nrf_spi_disable(NRF_SPI_Type * p_reg);
 
 /**
  * @brief Function for configuring SPI pins.
@@ -173,12 +205,12 @@ __STATIC_INLINE void nrf_spi_disable(NRF_SPI_Type * p_spi);
  * If a given signal is not needed, pass the @ref NRF_SPI_PIN_NOT_CONNECTED
  * value instead of its pin number.
  *
- * @param[in] p_spi     SPI instance.
+ * @param[in] p_reg     Pointer to the peripheral registers structure.
  * @param[in] sck_pin   SCK pin number.
  * @param[in] mosi_pin  MOSI pin number.
  * @param[in] miso_pin  MISO pin number.
  */
-__STATIC_INLINE void nrf_spi_pins_set(NRF_SPI_Type * p_spi,
+__STATIC_INLINE void nrf_spi_pins_set(NRF_SPI_Type * p_reg,
                                       uint32_t sck_pin,
                                       uint32_t mosi_pin,
                                       uint32_t miso_pin);
@@ -186,116 +218,120 @@ __STATIC_INLINE void nrf_spi_pins_set(NRF_SPI_Type * p_spi,
 /**
  * @brief Function for writing data to the SPI transmitter register.
  *
- * @param[in] p_spi SPI instance.
+ * @param[in] p_reg Pointer to the peripheral registers structure.
  * @param[in] data  TX data to send.
  */
-__STATIC_INLINE void nrf_spi_txd_set(NRF_SPI_Type * p_spi, uint8_t data);
+__STATIC_INLINE void nrf_spi_txd_set(NRF_SPI_Type * p_reg, uint8_t data);
 
 /**
  * @brief Function for reading data from the SPI receiver register.
  *
- * @param[in] p_spi SPI instance.
+ * @param[in] p_reg Pointer to the peripheral registers structure.
  *
  * @return RX data received.
  */
-__STATIC_INLINE uint8_t nrf_spi_rxd_get(NRF_SPI_Type * p_spi);
+__STATIC_INLINE uint8_t nrf_spi_rxd_get(NRF_SPI_Type * p_reg);
 
 /**
  * @brief Function for setting the SPI master data rate.
  *
- * @param[in] p_spi     SPI instance.
+ * @param[in] p_reg     Pointer to the peripheral registers structure.
  * @param[in] frequency SPI frequency.
  */
-__STATIC_INLINE void nrf_spi_frequency_set(NRF_SPI_Type * p_spi,
+__STATIC_INLINE void nrf_spi_frequency_set(NRF_SPI_Type * p_reg,
                                            nrf_spi_frequency_t frequency);
 
 /**
  * @brief Function for setting the SPI configuration.
  *
- * @param[in] p_spi         SPI instance.
+ * @param[in] p_reg         Pointer to the peripheral registers structure.
  * @param[in] spi_mode      SPI mode.
  * @param[in] spi_bit_order SPI bit order.
  */
-__STATIC_INLINE void nrf_spi_configure(NRF_SPI_Type * p_spi,
+__STATIC_INLINE void nrf_spi_configure(NRF_SPI_Type * p_reg,
                                        nrf_spi_mode_t spi_mode,
                                        nrf_spi_bit_order_t spi_bit_order);
 
 
 #ifndef SUPPRESS_INLINE_IMPLEMENTATION
 
-__STATIC_INLINE void nrf_spi_event_clear(NRF_SPI_Type * p_spi,
+__STATIC_INLINE void nrf_spi_event_clear(NRF_SPI_Type * p_reg,
                                          nrf_spi_event_t spi_event)
 {
-    *((volatile uint32_t *)((uint8_t *)p_spi + (uint32_t)spi_event)) = 0x0UL;
+    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)spi_event)) = 0x0UL;
+#if __CORTEX_M == 0x04
+    volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)spi_event));
+    (void)dummy;
+#endif
 }
 
-__STATIC_INLINE bool nrf_spi_event_check(NRF_SPI_Type * p_spi,
+__STATIC_INLINE bool nrf_spi_event_check(NRF_SPI_Type * p_reg,
                                          nrf_spi_event_t spi_event)
 {
-    return (bool)*(volatile uint32_t *)((uint8_t *)p_spi + (uint32_t)spi_event);
+    return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)spi_event);
 }
 
-__STATIC_INLINE uint32_t * nrf_spi_event_address_get(NRF_SPI_Type * p_spi,
+__STATIC_INLINE uint32_t * nrf_spi_event_address_get(NRF_SPI_Type * p_reg,
                                                      nrf_spi_event_t spi_event)
 {
-    return (uint32_t *)((uint8_t *)p_spi + (uint32_t)spi_event);
+    return (uint32_t *)((uint8_t *)p_reg + (uint32_t)spi_event);
 }
 
-__STATIC_INLINE void nrf_spi_int_enable(NRF_SPI_Type * p_spi,
+__STATIC_INLINE void nrf_spi_int_enable(NRF_SPI_Type * p_reg,
                                         uint32_t spi_int_mask)
 {
-    p_spi->INTENSET = spi_int_mask;
+    p_reg->INTENSET = spi_int_mask;
 }
 
-__STATIC_INLINE void nrf_spi_int_disable(NRF_SPI_Type * p_spi,
+__STATIC_INLINE void nrf_spi_int_disable(NRF_SPI_Type * p_reg,
                                          uint32_t spi_int_mask)
 {
-    p_spi->INTENCLR = spi_int_mask;
+    p_reg->INTENCLR = spi_int_mask;
 }
 
-__STATIC_INLINE bool nrf_spi_int_enable_check(NRF_SPI_Type * p_spi,
+__STATIC_INLINE bool nrf_spi_int_enable_check(NRF_SPI_Type * p_reg,
                                               nrf_spi_int_mask_t spi_int)
 {
-    return (bool)(p_spi->INTENSET & spi_int);
+    return (bool)(p_reg->INTENSET & spi_int);
 }
 
-__STATIC_INLINE void nrf_spi_enable(NRF_SPI_Type * p_spi)
+__STATIC_INLINE void nrf_spi_enable(NRF_SPI_Type * p_reg)
 {
-    p_spi->ENABLE = (SPI_ENABLE_ENABLE_Enabled << SPI_ENABLE_ENABLE_Pos);
+    p_reg->ENABLE = (SPI_ENABLE_ENABLE_Enabled << SPI_ENABLE_ENABLE_Pos);
 }
 
-__STATIC_INLINE void nrf_spi_disable(NRF_SPI_Type * p_spi)
+__STATIC_INLINE void nrf_spi_disable(NRF_SPI_Type * p_reg)
 {
-    p_spi->ENABLE = (SPI_ENABLE_ENABLE_Disabled << SPI_ENABLE_ENABLE_Pos);
+    p_reg->ENABLE = (SPI_ENABLE_ENABLE_Disabled << SPI_ENABLE_ENABLE_Pos);
 }
 
-__STATIC_INLINE void nrf_spi_pins_set(NRF_SPI_Type * p_spi,
+__STATIC_INLINE void nrf_spi_pins_set(NRF_SPI_Type * p_reg,
                                       uint32_t sck_pin,
                                       uint32_t mosi_pin,
                                       uint32_t miso_pin)
 {
-    p_spi->PSELSCK  = sck_pin;
+    p_reg->PSELSCK  = sck_pin;
-    p_spi->PSELMOSI = mosi_pin;
+    p_reg->PSELMOSI = mosi_pin;
-    p_spi->PSELMISO = miso_pin;
+    p_reg->PSELMISO = miso_pin;
 }
 
-__STATIC_INLINE void nrf_spi_txd_set(NRF_SPI_Type * p_spi, uint8_t data)
+__STATIC_INLINE void nrf_spi_txd_set(NRF_SPI_Type * p_reg, uint8_t data)
 {
-    p_spi->TXD = data;
+    p_reg->TXD = data;
 }
 
-__STATIC_INLINE uint8_t nrf_spi_rxd_get(NRF_SPI_Type * p_spi)
+__STATIC_INLINE uint8_t nrf_spi_rxd_get(NRF_SPI_Type * p_reg)
 {
-    return p_spi->RXD;
+    return p_reg->RXD;
 }
 
-__STATIC_INLINE void nrf_spi_frequency_set(NRF_SPI_Type * p_spi,
+__STATIC_INLINE void nrf_spi_frequency_set(NRF_SPI_Type * p_reg,
                                            nrf_spi_frequency_t frequency)
 {
-    p_spi->FREQUENCY = frequency;
+    p_reg->FREQUENCY = frequency;
 }
 
-__STATIC_INLINE void nrf_spi_configure(NRF_SPI_Type * p_spi,
+__STATIC_INLINE void nrf_spi_configure(NRF_SPI_Type * p_reg,
                                        nrf_spi_mode_t spi_mode,
                                        nrf_spi_bit_order_t spi_bit_order)
 {
@@ -324,11 +360,16 @@ __STATIC_INLINE void nrf_spi_configure(NRF_SPI_Type * p_spi,
                   (SPI_CONFIG_CPHA_Trailing   << SPI_CONFIG_CPHA_Pos);
         break;
     }
-    p_spi->CONFIG = config;
+    p_reg->CONFIG = config;
 }
 
 #endif // SUPPRESS_INLINE_IMPLEMENTATION
 
+
+#ifdef __cplusplus
+}
+#endif
+
 #endif // NRF_SPI_H__
 
 /** @} */

nRF5_SDK_11.0.0_89a8197/components/drivers_nrf/hal/nrf_spim.h

@@ -1,19 +1,46 @@
-/* Copyright (c) 2015 Nordic Semiconductor. All Rights Reserved.
+/**
+ * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
  * 
- * The information contained herein is property of Nordic Semiconductor ASA.
+ * All rights reserved.
- * Terms and conditions of usage are described in detail in NORDIC
- * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
  * 
- * Licensees are granted free, non-transferable use of the information. NO
+ * Redistribution and use in source and binary forms, with or without modification,
- * WARRANTY of ANY KIND is provided. This heading must NOT be removed from
+ * are permitted provided that the following conditions are met:
- * the file.
+ * 
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ *    list of conditions and the following disclaimer.
+ * 
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ *    Semiconductor ASA integrated circuit in a product or a software update for
+ *    such product, must reproduce the above copyright notice, this list of
+ *    conditions and the following disclaimer in the documentation and/or other
+ *    materials provided with the distribution.
+ * 
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ *    contributors may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ * 
+ * 4. This software, with or without modification, must only be used with a
+ *    Nordic Semiconductor ASA integrated circuit.
+ * 
+ * 5. Any software provided in binary form under this license must not be reverse
+ *    engineered, decompiled, modified and/or disassembled.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  * 
  */
-
 /**
  * @defgroup nrf_spim_hal SPIM HAL
  * @{
- * @ingroup nrf_spi_master
+ * @ingroup nrf_spi
  *
  * @brief Hardware access layer for accessing the SPIM peripheral.
  */
@@ -26,6 +53,11 @@
 #include <stdint.h>
 
 #include "nrf.h"
+#include "nrf_peripherals.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
 
 
 /**
@@ -57,15 +89,12 @@ typedef enum
     /*lint -save -e30*/
     NRF_SPIM_EVENT_STOPPED = offsetof(NRF_SPIM_Type, EVENTS_STOPPED), ///< SPI transaction has stopped.
     NRF_SPIM_EVENT_ENDRX   = offsetof(NRF_SPIM_Type, EVENTS_ENDRX),   ///< End of RXD buffer reached.
-#ifdef NRF52
     NRF_SPIM_EVENT_END     = offsetof(NRF_SPIM_Type, EVENTS_END),     ///< End of RXD buffer and TXD buffer reached.
-#endif
     NRF_SPIM_EVENT_ENDTX   = offsetof(NRF_SPIM_Type, EVENTS_ENDTX),   ///< End of TXD buffer reached.
     NRF_SPIM_EVENT_STARTED = offsetof(NRF_SPIM_Type, EVENTS_STARTED)  ///< Transaction started.
     /*lint -restore*/
 } nrf_spim_event_t;
 
-#ifdef NRF52
 /**
  * @brief SPIM shortcuts.
  */
@@ -73,7 +102,6 @@ typedef enum
 {
     NRF_SPIM_SHORT_END_START_MASK = SPIM_SHORTS_END_START_Msk ///< Shortcut between END event and START task.
 } nrf_spim_short_mask_t;
-#endif
 
 /**
  * @brief SPIM interrupts.
@@ -82,9 +110,7 @@ typedef enum
 {
     NRF_SPIM_INT_STOPPED_MASK = SPIM_INTENSET_STOPPED_Msk, ///< Interrupt on STOPPED event.
     NRF_SPIM_INT_ENDRX_MASK   = SPIM_INTENSET_ENDRX_Msk,   ///< Interrupt on ENDRX event.
-#ifdef NRF52
     NRF_SPIM_INT_END_MASK     = SPIM_INTENSET_END_Msk,     ///< Interrupt on END event.
-#endif
     NRF_SPIM_INT_ENDTX_MASK   = SPIM_INTENSET_ENDTX_Msk,   ///< Interrupt on ENDTX event.
     NRF_SPIM_INT_STARTED_MASK = SPIM_INTENSET_STARTED_Msk  ///< Interrupt on STARTED event.
 } nrf_spim_int_mask_t;
@@ -102,7 +128,16 @@ typedef enum
     NRF_SPIM_FREQ_4M   = SPIM_FREQUENCY_FREQUENCY_M4,     ///< 4 Mbps.
     // [conversion to 'int' needed to prevent compilers from complaining
     //  that the provided value (0x80000000UL) is out of range of "int"]
-    NRF_SPIM_FREQ_8M   = (int)SPIM_FREQUENCY_FREQUENCY_M8 ///< 8 Mbps.
+    NRF_SPIM_FREQ_8M   = (int)SPIM_FREQUENCY_FREQUENCY_M8,///< 8 Mbps.
+#ifndef SPI_PRESENT
+    NRF_SPI_FREQ_125K =  NRF_SPIM_FREQ_125K,
+    NRF_SPI_FREQ_250K =  NRF_SPIM_FREQ_250K,
+    NRF_SPI_FREQ_500K =  NRF_SPIM_FREQ_500K,
+    NRF_SPI_FREQ_1M   =  NRF_SPIM_FREQ_1M,
+    NRF_SPI_FREQ_2M   =  NRF_SPIM_FREQ_2M,
+    NRF_SPI_FREQ_4M   =  NRF_SPIM_FREQ_4M,
+    NRF_SPI_FREQ_8M   =  NRF_SPIM_FREQ_8M,
+#endif
 } nrf_spim_frequency_t;
 
 /**
@@ -113,7 +148,13 @@ typedef enum
     NRF_SPIM_MODE_0, ///< SCK active high, sample on leading edge of clock.
     NRF_SPIM_MODE_1, ///< SCK active high, sample on trailing edge of clock.
     NRF_SPIM_MODE_2, ///< SCK active low, sample on leading edge of clock.
-    NRF_SPIM_MODE_3  ///< SCK active low, sample on trailing edge of clock.
+    NRF_SPIM_MODE_3, ///< SCK active low, sample on trailing edge of clock.
+#ifndef SPI_PRESENT
+    NRF_SPI_MODE_0 = NRF_SPIM_MODE_0,
+    NRF_SPI_MODE_1 = NRF_SPIM_MODE_1,
+    NRF_SPI_MODE_2 = NRF_SPIM_MODE_2,
+    NRF_SPI_MODE_3 = NRF_SPIM_MODE_3,
+#endif
 } nrf_spim_mode_t;
 
 /**
@@ -122,130 +163,133 @@ typedef enum
 typedef enum
 {
     NRF_SPIM_BIT_ORDER_MSB_FIRST = SPIM_CONFIG_ORDER_MsbFirst, ///< Most significant bit shifted out first.
-    NRF_SPIM_BIT_ORDER_LSB_FIRST = SPIM_CONFIG_ORDER_LsbFirst  ///< Least significant bit shifted out first.
+    NRF_SPIM_BIT_ORDER_LSB_FIRST = SPIM_CONFIG_ORDER_LsbFirst, ///< Least significant bit shifted out first.
+#ifndef SPI_PRESENT
+    NRF_SPI_BIT_ORDER_MSB_FIRST  = NRF_SPIM_BIT_ORDER_MSB_FIRST,
+    NRF_SPI_BIT_ORDER_LSB_FIRST  = NRF_SPIM_BIT_ORDER_LSB_FIRST,
+#endif
 } nrf_spim_bit_order_t;
 
 
 /**
  * @brief Function for activating a specific SPIM task.
  *
- * @param[in] p_spim    SPIM instance.
+ * @param[in] p_reg     Pointer to the peripheral registers structure.
  * @param[in] spim_task Task to activate.
  */
-__STATIC_INLINE void nrf_spim_task_trigger(NRF_SPIM_Type * p_spim,
+__STATIC_INLINE void nrf_spim_task_trigger(NRF_SPIM_Type * p_reg,
                                            nrf_spim_task_t spim_task);
 
 /**
  * @brief Function for getting the address of a specific SPIM task register.
  *
- * @param[in] p_spim    SPIM instance.
+ * @param[in] p_reg     Pointer to the peripheral registers structure.
  * @param[in] spim_task Requested task.
  *
  * @return Address of the specified task register.
  */
-__STATIC_INLINE uint32_t nrf_spim_task_address_get(NRF_SPIM_Type * p_spim,
+__STATIC_INLINE uint32_t nrf_spim_task_address_get(NRF_SPIM_Type * p_reg,
                                                    nrf_spim_task_t spim_task);
 
 /**
  * @brief Function for clearing a specific SPIM event.
  *
- * @param[in] p_spim     SPIM instance.
+ * @param[in] p_reg      Pointer to the peripheral registers structure.
  * @param[in] spim_event Event to clear.
  */
-__STATIC_INLINE void nrf_spim_event_clear(NRF_SPIM_Type * p_spim,
+__STATIC_INLINE void nrf_spim_event_clear(NRF_SPIM_Type * p_reg,
                                           nrf_spim_event_t spim_event);
 
 /**
  * @brief Function for checking the state of a specific SPIM event.
  *
- * @param[in] p_spim     SPIM instance.
+ * @param[in] p_reg      Pointer to the peripheral registers structure.
  * @param[in] spim_event Event to check.
  *
  * @retval true  If the event is set.
  * @retval false If the event is not set.
  */
-__STATIC_INLINE bool nrf_spim_event_check(NRF_SPIM_Type * p_spim,
+__STATIC_INLINE bool nrf_spim_event_check(NRF_SPIM_Type * p_reg,
                                           nrf_spim_event_t spim_event);
 
 /**
  * @brief Function for getting the address of a specific SPIM event register.
  *
- * @param[in] p_spim     SPIM instance.
+ * @param[in] p_reg      Pointer to the peripheral registers structure.
  * @param[in] spim_event Requested event.
  *
  * @return Address of the specified event register.
  */
-__STATIC_INLINE uint32_t nrf_spim_event_address_get(NRF_SPIM_Type  * p_spim,
+__STATIC_INLINE uint32_t nrf_spim_event_address_get(NRF_SPIM_Type  * p_reg,
                                                     nrf_spim_event_t spim_event);
-#ifdef NRF52
 /**
  * @brief Function for enabling specified shortcuts.
  *
- * @param[in] p_spim           SPIM instance.
+ * @param[in] p_reg            Pointer to the peripheral registers structure.
  * @param[in] spim_shorts_mask Shortcuts to enable.
  */
-__STATIC_INLINE void nrf_spim_shorts_enable(NRF_SPIM_Type * p_spim,
+__STATIC_INLINE void nrf_spim_shorts_enable(NRF_SPIM_Type * p_reg,
                                             uint32_t spim_shorts_mask);
 
 /**
  * @brief Function for disabling specified shortcuts.
  *
- * @param[in] p_spim           SPIM instance.
+ * @param[in] p_reg            Pointer to the peripheral registers structure.
  * @param[in] spim_shorts_mask Shortcuts to disable.
  */
-__STATIC_INLINE void nrf_spim_shorts_disable(NRF_SPIM_Type * p_spim,
+__STATIC_INLINE void nrf_spim_shorts_disable(NRF_SPIM_Type * p_reg,
                                              uint32_t spim_shorts_mask);
 
 /**
  * @brief Function for getting shorts setting.
  *
- * @param[in] p_spim           SPIM instance.
+ * @param[in] p_reg           Pointer to the peripheral registers structure.
  */
-__STATIC_INLINE uint32_t nrf_spim_shorts_get(NRF_SPIM_Type * p_spim);
+__STATIC_INLINE uint32_t nrf_spim_shorts_get(NRF_SPIM_Type * p_reg);
-#endif
+
 /**
  * @brief Function for enabling specified interrupts.
  *
- * @param[in] p_spim        SPIM instance.
+ * @param[in] p_reg        Pointer to the peripheral registers structure.
  * @param[in] spim_int_mask Interrupts to enable.
  */
-__STATIC_INLINE void nrf_spim_int_enable(NRF_SPIM_Type * p_spim,
+__STATIC_INLINE void nrf_spim_int_enable(NRF_SPIM_Type * p_reg,
                                          uint32_t spim_int_mask);
 
 /**
  * @brief Function for disabling specified interrupts.
  *
- * @param[in] p_spim        SPIM instance.
+ * @param[in] p_reg        Pointer to the peripheral registers structure.
  * @param[in] spim_int_mask Interrupts to disable.
  */
-__STATIC_INLINE void nrf_spim_int_disable(NRF_SPIM_Type * p_spim,
+__STATIC_INLINE void nrf_spim_int_disable(NRF_SPIM_Type * p_reg,
                                           uint32_t spim_int_mask);
 
 /**
  * @brief Function for retrieving the state of a given interrupt.
  *
- * @param[in] p_spim   SPIM instance.
+ * @param[in] p_reg   Pointer to the peripheral registers structure.
  * @param[in] spim_int Interrupt to check.
  *
  * @retval true  If the interrupt is enabled.
  * @retval false If the interrupt is not enabled.
  */
-__STATIC_INLINE bool nrf_spim_int_enable_check(NRF_SPIM_Type * p_spim,
+__STATIC_INLINE bool nrf_spim_int_enable_check(NRF_SPIM_Type * p_reg,
                                                nrf_spim_int_mask_t spim_int);
 
 /**
  * @brief Function for enabling the SPIM peripheral.
  *
- * @param[in] p_spim SPIM instance.
+ * @param[in] p_reg Pointer to the peripheral registers structure.
  */
-__STATIC_INLINE void nrf_spim_enable(NRF_SPIM_Type * p_spim);
+__STATIC_INLINE void nrf_spim_enable(NRF_SPIM_Type * p_reg);
 
 /**
  * @brief Function for disabling the SPIM peripheral.
  *
- * @param[in] p_spim SPIM instance.
+ * @param[in] p_reg Pointer to the peripheral registers structure.
  */
-__STATIC_INLINE void nrf_spim_disable(NRF_SPIM_Type * p_spim);
+__STATIC_INLINE void nrf_spim_disable(NRF_SPIM_Type * p_reg);
 
 /**
  * @brief Function for configuring SPIM pins.
@@ -253,12 +297,12 @@ __STATIC_INLINE void nrf_spim_disable(NRF_SPIM_Type * p_spim);
  * If a given signal is not needed, pass the @ref NRF_SPIM_PIN_NOT_CONNECTED
  * value instead of its pin number.
  *
- * @param[in] p_spim    SPIM instance.
+ * @param[in] p_reg    Pointer to the peripheral registers structure.
  * @param[in] sck_pin   SCK pin number.
  * @param[in] mosi_pin  MOSI pin number.
  * @param[in] miso_pin  MISO pin number.
  */
-__STATIC_INLINE void nrf_spim_pins_set(NRF_SPIM_Type * p_spim,
+__STATIC_INLINE void nrf_spim_pins_set(NRF_SPIM_Type * p_reg,
                                        uint32_t sck_pin,
                                        uint32_t mosi_pin,
                                        uint32_t miso_pin);
@@ -266,195 +310,197 @@ __STATIC_INLINE void nrf_spim_pins_set(NRF_SPIM_Type * p_spim,
 /**
  * @brief Function for setting the SPI master data rate.
  *
- * @param[in] p_spim    SPIM instance.
+ * @param[in] p_reg    Pointer to the peripheral registers structure.
  * @param[in] frequency SPI frequency.
  */
-__STATIC_INLINE void nrf_spim_frequency_set(NRF_SPIM_Type * p_spim,
+__STATIC_INLINE void nrf_spim_frequency_set(NRF_SPIM_Type * p_reg,
                                             nrf_spim_frequency_t frequency);
 
 /**
  * @brief Function for setting the transmit buffer.
  *
- * @param[in]  p_spim   SPIM instance.
+ * @param[in]  p_reg   Pointer to the peripheral registers structure.
  * @param[in]  p_buffer Pointer to the buffer with data to send.
  * @param[in]  length   Maximum number of data bytes to transmit.
  */
-__STATIC_INLINE void nrf_spim_tx_buffer_set(NRF_SPIM_Type * p_spim,
+__STATIC_INLINE void nrf_spim_tx_buffer_set(NRF_SPIM_Type * p_reg,
                                             uint8_t const * p_buffer,
                                             uint8_t         length);
 
 /**
  * @brief Function for setting the receive buffer.
  *
- * @param[in] p_spim   SPIM instance.
+ * @param[in] p_reg   Pointer to the peripheral registers structure.
  * @param[in] p_buffer Pointer to the buffer for received data.
  * @param[in] length   Maximum number of data bytes to receive.
  */
-__STATIC_INLINE void nrf_spim_rx_buffer_set(NRF_SPIM_Type * p_spim,
+__STATIC_INLINE void nrf_spim_rx_buffer_set(NRF_SPIM_Type * p_reg,
                                             uint8_t * p_buffer,
                                             uint8_t   length);
 
 /**
  * @brief Function for setting the SPI configuration.
  *
- * @param[in] p_spim        SPIM instance.
+ * @param[in] p_reg        Pointer to the peripheral registers structure.
  * @param[in] spi_mode      SPI mode.
  * @param[in] spi_bit_order SPI bit order.
  */
-__STATIC_INLINE void nrf_spim_configure(NRF_SPIM_Type * p_spim,
+__STATIC_INLINE void nrf_spim_configure(NRF_SPIM_Type * p_reg,
                                         nrf_spim_mode_t spi_mode,
                                         nrf_spim_bit_order_t spi_bit_order);
 
 /**
  * @brief Function for setting the over-read character.
  *
- * @param[in] p_spim SPIM instance.
+ * @param[in] p_reg Pointer to the peripheral registers structure.
  * @param[in] orc    Over-read character that is clocked out in case of
  *                   an over-read of the TXD buffer.
  */
-__STATIC_INLINE void nrf_spim_orc_set(NRF_SPIM_Type * p_spim,
+__STATIC_INLINE void nrf_spim_orc_set(NRF_SPIM_Type * p_reg,
                                       uint8_t orc);
 
-#ifdef NRF52
 /**
  * @brief Function for enabling the TX list feature.
  *
- * @param[in] p_spim SPIM instance.
+ * @param[in] p_reg Pointer to the peripheral registers structure.
  */
-__STATIC_INLINE void nrf_spim_tx_list_enable(NRF_SPIM_Type * p_spim);
+__STATIC_INLINE void nrf_spim_tx_list_enable(NRF_SPIM_Type * p_reg);
 
 /**
  * @brief Function for disabling the TX list feature.
  *
- * @param[in] p_spim SPIM instance.
+ * @param[in] p_reg Pointer to the peripheral registers structure.
  */
-__STATIC_INLINE void nrf_spim_tx_list_disable(NRF_SPIM_Type * p_spim);
+__STATIC_INLINE void nrf_spim_tx_list_disable(NRF_SPIM_Type * p_reg);
 
 /**
  * @brief Function for enabling the RX list feature.
  *
- * @param[in] p_spim SPIM instance.
+ * @param[in] p_reg Pointer to the peripheral registers structure.
  */
-__STATIC_INLINE void nrf_spim_rx_list_enable(NRF_SPIM_Type * p_spim);
+__STATIC_INLINE void nrf_spim_rx_list_enable(NRF_SPIM_Type * p_reg);
 
 /**
  * @brief Function for disabling the RX list feature.
  *
- * @param[in] p_spim SPIM instance.
+ * @param[in] p_reg Pointer to the peripheral registers structure.
  */
-__STATIC_INLINE void nrf_spim_rx_list_disable(NRF_SPIM_Type * p_spim);
+__STATIC_INLINE void nrf_spim_rx_list_disable(NRF_SPIM_Type * p_reg);
-#endif
+
 #ifndef SUPPRESS_INLINE_IMPLEMENTATION
 
-__STATIC_INLINE void nrf_spim_task_trigger(NRF_SPIM_Type * p_spim,
+__STATIC_INLINE void nrf_spim_task_trigger(NRF_SPIM_Type * p_reg,
                                            nrf_spim_task_t spim_task)
 {
-    *((volatile uint32_t *)((uint8_t *)p_spim + (uint32_t)spim_task)) = 0x1UL;
+    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)spim_task)) = 0x1UL;
 }
 
-__STATIC_INLINE uint32_t nrf_spim_task_address_get(NRF_SPIM_Type * p_spim,
+__STATIC_INLINE uint32_t nrf_spim_task_address_get(NRF_SPIM_Type * p_reg,
                                                    nrf_spim_task_t spim_task)
 {
-    return (uint32_t)((uint8_t *)p_spim + (uint32_t)spim_task);
+    return (uint32_t)((uint8_t *)p_reg + (uint32_t)spim_task);
 }
 
-__STATIC_INLINE void nrf_spim_event_clear(NRF_SPIM_Type * p_spim,
+__STATIC_INLINE void nrf_spim_event_clear(NRF_SPIM_Type * p_reg,
                                           nrf_spim_event_t spim_event)
 {
-    *((volatile uint32_t *)((uint8_t *)p_spim + (uint32_t)spim_event)) = 0x0UL;
+    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)spim_event)) = 0x0UL;
-}
+#if __CORTEX_M == 0x04
-
+    volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)spim_event));
-__STATIC_INLINE bool nrf_spim_event_check(NRF_SPIM_Type * p_spim,
+    (void)dummy;
-                                          nrf_spim_event_t spim_event)
-{
-    return (bool)*(volatile uint32_t *)((uint8_t *)p_spim + (uint32_t)spim_event);
-}
-
-__STATIC_INLINE uint32_t nrf_spim_event_address_get(NRF_SPIM_Type * p_spim,
-                                                    nrf_spim_event_t spim_event)
-{
-    return (uint32_t)((uint8_t *)p_spim + (uint32_t)spim_event);
-}
-
-#ifdef NRF52
-__STATIC_INLINE void nrf_spim_shorts_enable(NRF_SPIM_Type * p_spim,
-                                            uint32_t spim_shorts_mask)
-{
-    p_spim->SHORTS |= spim_shorts_mask;
-}
-
-__STATIC_INLINE void nrf_spim_shorts_disable(NRF_SPIM_Type * p_spim,
-                                             uint32_t spim_shorts_mask)
-{
-    p_spim->SHORTS &= ~(spim_shorts_mask);
-}
-
-__STATIC_INLINE uint32_t nrf_spim_shorts_get(NRF_SPIM_Type * p_spim)
-{
-    return p_spim->SHORTS;
-}
 #endif
-__STATIC_INLINE void nrf_spim_int_enable(NRF_SPIM_Type * p_spim,
-                                         uint32_t spim_int_mask)
-{
-    p_spim->INTENSET = spim_int_mask;
 }
 
-__STATIC_INLINE void nrf_spim_int_disable(NRF_SPIM_Type * p_spim,
+__STATIC_INLINE bool nrf_spim_event_check(NRF_SPIM_Type * p_reg,
-                                          uint32_t spim_int_mask)
+                                          nrf_spim_event_t spim_event)
 {
-    p_spim->INTENCLR = spim_int_mask;
+    return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)spim_event);
 }
 
-__STATIC_INLINE bool nrf_spim_int_enable_check(NRF_SPIM_Type * p_spim,
+__STATIC_INLINE uint32_t nrf_spim_event_address_get(NRF_SPIM_Type * p_reg,
+                                                    nrf_spim_event_t spim_event)
+{
+    return (uint32_t)((uint8_t *)p_reg + (uint32_t)spim_event);
+}
+
+__STATIC_INLINE void nrf_spim_shorts_enable(NRF_SPIM_Type * p_reg,
+                                            uint32_t spim_shorts_mask)
+{
+    p_reg->SHORTS |= spim_shorts_mask;
+}
+
+__STATIC_INLINE void nrf_spim_shorts_disable(NRF_SPIM_Type * p_reg,
+                                             uint32_t spim_shorts_mask)
+{
+    p_reg->SHORTS &= ~(spim_shorts_mask);
+}
+
+__STATIC_INLINE uint32_t nrf_spim_shorts_get(NRF_SPIM_Type * p_reg)
+{
+    return p_reg->SHORTS;
+}
+
+__STATIC_INLINE void nrf_spim_int_enable(NRF_SPIM_Type * p_reg,
+                                         uint32_t spim_int_mask)
+{
+    p_reg->INTENSET = spim_int_mask;
+}
+
+__STATIC_INLINE void nrf_spim_int_disable(NRF_SPIM_Type * p_reg,
+                                          uint32_t spim_int_mask)
+{
+    p_reg->INTENCLR = spim_int_mask;
+}
+
+__STATIC_INLINE bool nrf_spim_int_enable_check(NRF_SPIM_Type * p_reg,
                                                nrf_spim_int_mask_t spim_int)
 {
-    return (bool)(p_spim->INTENSET & spim_int);
+    return (bool)(p_reg->INTENSET & spim_int);
 }
 
-__STATIC_INLINE void nrf_spim_enable(NRF_SPIM_Type * p_spim)
+__STATIC_INLINE void nrf_spim_enable(NRF_SPIM_Type * p_reg)
 {
-    p_spim->ENABLE = (SPIM_ENABLE_ENABLE_Enabled << SPIM_ENABLE_ENABLE_Pos);
+    p_reg->ENABLE = (SPIM_ENABLE_ENABLE_Enabled << SPIM_ENABLE_ENABLE_Pos);
 }
 
-__STATIC_INLINE void nrf_spim_disable(NRF_SPIM_Type * p_spim)
+__STATIC_INLINE void nrf_spim_disable(NRF_SPIM_Type * p_reg)
 {
-    p_spim->ENABLE = (SPIM_ENABLE_ENABLE_Disabled << SPIM_ENABLE_ENABLE_Pos);
+    p_reg->ENABLE = (SPIM_ENABLE_ENABLE_Disabled << SPIM_ENABLE_ENABLE_Pos);
 }
 
-__STATIC_INLINE void nrf_spim_pins_set(NRF_SPIM_Type * p_spim,
+__STATIC_INLINE void nrf_spim_pins_set(NRF_SPIM_Type * p_reg,
                                        uint32_t sck_pin,
                                        uint32_t mosi_pin,
                                        uint32_t miso_pin)
 {
-    p_spim->PSEL.SCK  = sck_pin;
+    p_reg->PSEL.SCK  = sck_pin;
-    p_spim->PSEL.MOSI = mosi_pin;
+    p_reg->PSEL.MOSI = mosi_pin;
-    p_spim->PSEL.MISO = miso_pin;
+    p_reg->PSEL.MISO = miso_pin;
 }
 
-__STATIC_INLINE void nrf_spim_frequency_set(NRF_SPIM_Type * p_spim,
+__STATIC_INLINE void nrf_spim_frequency_set(NRF_SPIM_Type * p_reg,
                                             nrf_spim_frequency_t frequency)
 {
-    p_spim->FREQUENCY = frequency;
+    p_reg->FREQUENCY = frequency;
 }
 
-__STATIC_INLINE void nrf_spim_tx_buffer_set(NRF_SPIM_Type * p_spim,
+__STATIC_INLINE void nrf_spim_tx_buffer_set(NRF_SPIM_Type * p_reg,
                                             uint8_t const * p_buffer,
                                             uint8_t         length)
 {
-    p_spim->TXD.PTR    = (uint32_t)p_buffer;
+    p_reg->TXD.PTR    = (uint32_t)p_buffer;
-    p_spim->TXD.MAXCNT = length;
+    p_reg->TXD.MAXCNT = length;
 }
 
-__STATIC_INLINE void nrf_spim_rx_buffer_set(NRF_SPIM_Type * p_spim,
+__STATIC_INLINE void nrf_spim_rx_buffer_set(NRF_SPIM_Type * p_reg,
                                             uint8_t * p_buffer,
                                             uint8_t   length)
 {
-    p_spim->RXD.PTR    = (uint32_t)p_buffer;
+    p_reg->RXD.PTR    = (uint32_t)p_buffer;
-    p_spim->RXD.MAXCNT = length;
+    p_reg->RXD.MAXCNT = length;
 }
 
-__STATIC_INLINE void nrf_spim_configure(NRF_SPIM_Type * p_spim,
+__STATIC_INLINE void nrf_spim_configure(NRF_SPIM_Type * p_reg,
                                         nrf_spim_mode_t spi_mode,
                                         nrf_spim_bit_order_t spi_bit_order)
 {
@@ -483,37 +529,42 @@ __STATIC_INLINE void nrf_spim_configure(NRF_SPIM_Type * p_spim,
                   (SPIM_CONFIG_CPHA_Trailing   << SPIM_CONFIG_CPHA_Pos);
         break;
     }
-    p_spim->CONFIG = config;
+    p_reg->CONFIG = config;
 }
 
-__STATIC_INLINE void nrf_spim_orc_set(NRF_SPIM_Type * p_spim,
+__STATIC_INLINE void nrf_spim_orc_set(NRF_SPIM_Type * p_reg,
                                       uint8_t orc)
 {
-    p_spim->ORC = orc;
+    p_reg->ORC = orc;
 }
 
-#ifdef NRF52
+
-__STATIC_INLINE void nrf_spim_tx_list_enable(NRF_SPIM_Type * p_spim)
+__STATIC_INLINE void nrf_spim_tx_list_enable(NRF_SPIM_Type * p_reg)
 {
-    p_spim->TXD.LIST = 1;
+    p_reg->TXD.LIST = 1;
 }
 
-__STATIC_INLINE void nrf_spim_tx_list_disable(NRF_SPIM_Type * p_spim)
+__STATIC_INLINE void nrf_spim_tx_list_disable(NRF_SPIM_Type * p_reg)
 {
-    p_spim->TXD.LIST = 0;
+    p_reg->TXD.LIST = 0;
 }
 
-__STATIC_INLINE void nrf_spim_rx_list_enable(NRF_SPIM_Type * p_spim)
+__STATIC_INLINE void nrf_spim_rx_list_enable(NRF_SPIM_Type * p_reg)
 {
-    p_spim->RXD.LIST = 1;
+    p_reg->RXD.LIST = 1;
 }
 
-__STATIC_INLINE void nrf_spim_rx_list_disable(NRF_SPIM_Type * p_spim)
+__STATIC_INLINE void nrf_spim_rx_list_disable(NRF_SPIM_Type * p_reg)
 {
-    p_spim->RXD.LIST = 0;
+    p_reg->RXD.LIST = 0;
+}
+
+#endif // SUPPRESS_INLINE_IMPLEMENTATION
+
+
+#ifdef __cplusplus
 }
 #endif
-#endif // SUPPRESS_INLINE_IMPLEMENTATION
 
 #endif // NRF_SPIM_H__
 

nRF5_SDK_11.0.0_89a8197/components/drivers_nrf/hal/nrf_spis.h

@@ -1,15 +1,42 @@
-/* Copyright (c) 2015 Nordic Semiconductor. All Rights Reserved.
+/**
+ * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
  * 
- * The information contained herein is property of Nordic Semiconductor ASA.
+ * All rights reserved.
- * Terms and conditions of usage are described in detail in NORDIC
- * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
  * 
- * Licensees are granted free, non-transferable use of the information. NO
+ * Redistribution and use in source and binary forms, with or without modification,
- * WARRANTY of ANY KIND is provided. This heading must NOT be removed from
+ * are permitted provided that the following conditions are met:
- * the file.
+ * 
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ *    list of conditions and the following disclaimer.
+ * 
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ *    Semiconductor ASA integrated circuit in a product or a software update for
+ *    such product, must reproduce the above copyright notice, this list of
+ *    conditions and the following disclaimer in the documentation and/or other
+ *    materials provided with the distribution.
+ * 
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ *    contributors may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ * 
+ * 4. This software, with or without modification, must only be used with a
+ *    Nordic Semiconductor ASA integrated circuit.
+ * 
+ * 5. Any software provided in binary form under this license must not be reverse
+ *    engineered, decompiled, modified and/or disassembled.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  * 
  */
-
 /**
  * @defgroup nrf_spis_hal SPIS HAL
  * @{
@@ -26,6 +53,11 @@
 #include <stdint.h>
 
 #include "nrf.h"
+#include "nrf_peripherals.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
 
 
 /**
@@ -118,134 +150,134 @@ typedef enum
 /**
  * @brief Function for activating a specific SPIS task.
  *
- * @param[in] p_spis    SPIS instance.
+ * @param[in] p_reg     Pointer to the peripheral registers structure.
  * @param[in] spis_task Task to activate.
  */
-__STATIC_INLINE void nrf_spis_task_trigger(NRF_SPIS_Type * p_spis,
+__STATIC_INLINE void nrf_spis_task_trigger(NRF_SPIS_Type * p_reg,
                                            nrf_spis_task_t spis_task);
 
 /**
  * @brief Function for getting the address of a specific SPIS task register.
  *
- * @param[in] p_spis    SPIS instance.
+ * @param[in] p_reg     Pointer to the peripheral registers structure.
  * @param[in] spis_task Requested task.
  *
  * @return Address of the specified task register.
  */
-__STATIC_INLINE uint32_t nrf_spis_task_address_get(NRF_SPIS_Type const * p_spis,
+__STATIC_INLINE uint32_t nrf_spis_task_address_get(NRF_SPIS_Type const * p_reg,
                                                    nrf_spis_task_t spis_task);
 
 /**
  * @brief Function for clearing a specific SPIS event.
  *
- * @param[in] p_spis     SPIS instance.
+ * @param[in] p_reg      Pointer to the peripheral registers structure.
  * @param[in] spis_event Event to clear.
  */
-__STATIC_INLINE void nrf_spis_event_clear(NRF_SPIS_Type * p_spis,
+__STATIC_INLINE void nrf_spis_event_clear(NRF_SPIS_Type * p_reg,
                                           nrf_spis_event_t spis_event);
 
 /**
  * @brief Function for checking the state of a specific SPIS event.
  *
- * @param[in] p_spis     SPIS instance.
+ * @param[in] p_reg      Pointer to the peripheral registers structure.
  * @param[in] spis_event Event to check.
  *
  * @retval true  If the event is set.
  * @retval false If the event is not set.
  */
-__STATIC_INLINE bool nrf_spis_event_check(NRF_SPIS_Type const * p_spis,
+__STATIC_INLINE bool nrf_spis_event_check(NRF_SPIS_Type const * p_reg,
                                           nrf_spis_event_t spis_event);
 
 /**
  * @brief Function for getting the address of a specific SPIS event register.
  *
- * @param[in] p_spis     SPIS instance.
+ * @param[in] p_reg      Pointer to the peripheral registers structure.
  * @param[in] spis_event Requested event.
  *
  * @return Address of the specified event register.
  */
-__STATIC_INLINE uint32_t nrf_spis_event_address_get(NRF_SPIS_Type const * p_spis,
+__STATIC_INLINE uint32_t nrf_spis_event_address_get(NRF_SPIS_Type const * p_reg,
                                                     nrf_spis_event_t spis_event);
 
 /**
  * @brief Function for enabling specified shortcuts.
  *
- * @param[in] p_spis           SPIS instance.
+ * @param[in] p_reg            Pointer to the peripheral registers structure.
  * @param[in] spis_shorts_mask Shortcuts to enable.
  */
-__STATIC_INLINE void nrf_spis_shorts_enable(NRF_SPIS_Type * p_spis,
+__STATIC_INLINE void nrf_spis_shorts_enable(NRF_SPIS_Type * p_reg,
                                             uint32_t spis_shorts_mask);
 
 /**
  * @brief Function for disabling specified shortcuts.
  *
- * @param[in] p_spis           SPIS instance.
+ * @param[in] p_reg            Pointer to the peripheral registers structure.
  * @param[in] spis_shorts_mask Shortcuts to disable.
  */
-__STATIC_INLINE void nrf_spis_shorts_disable(NRF_SPIS_Type * p_spis,
+__STATIC_INLINE void nrf_spis_shorts_disable(NRF_SPIS_Type * p_reg,
                                              uint32_t spis_shorts_mask);
 
 /**
  * @brief Function for enabling specified interrupts.
  *
- * @param[in] p_spis        SPIS instance.
+ * @param[in] p_reg         Pointer to the peripheral registers structure.
  * @param[in] spis_int_mask Interrupts to enable.
  */
-__STATIC_INLINE void nrf_spis_int_enable(NRF_SPIS_Type * p_spis,
+__STATIC_INLINE void nrf_spis_int_enable(NRF_SPIS_Type * p_reg,
                                          uint32_t spis_int_mask);
 
 /**
  * @brief Function for disabling specified interrupts.
  *
- * @param[in] p_spis        SPIS instance.
+ * @param[in] p_reg         Pointer to the peripheral registers structure.
  * @param[in] spis_int_mask Interrupts to disable.
  */
-__STATIC_INLINE void nrf_spis_int_disable(NRF_SPIS_Type * p_spis,
+__STATIC_INLINE void nrf_spis_int_disable(NRF_SPIS_Type * p_reg,
                                           uint32_t spis_int_mask);
 
 /**
  * @brief Function for retrieving the state of a given interrupt.
  *
- * @param[in] p_spis   SPIS instance.
+ * @param[in] p_reg    Pointer to the peripheral registers structure.
  * @param[in] spis_int Interrupt to check.
  *
  * @retval true  If the interrupt is enabled.
  * @retval false If the interrupt is not enabled.
  */
-__STATIC_INLINE bool nrf_spis_int_enable_check(NRF_SPIS_Type const * p_spis,
+__STATIC_INLINE bool nrf_spis_int_enable_check(NRF_SPIS_Type const * p_reg,
                                                nrf_spis_int_mask_t spis_int);
 
 /**
  * @brief Function for enabling the SPIS peripheral.
  *
- * @param[in] p_spis SPIS instance.
+ * @param[in] p_reg  Pointer to the peripheral registers structure.
  */
-__STATIC_INLINE void nrf_spis_enable(NRF_SPIS_Type * p_spis);
+__STATIC_INLINE void nrf_spis_enable(NRF_SPIS_Type * p_reg);
 
 /**
  * @brief Function for disabling the SPIS peripheral.
  *
- * @param[in] p_spis SPIS instance.
+ * @param[in] p_reg  Pointer to the peripheral registers structure.
  */
-__STATIC_INLINE void nrf_spis_disable(NRF_SPIS_Type * p_spis);
+__STATIC_INLINE void nrf_spis_disable(NRF_SPIS_Type * p_reg);
 
 /**
  * @brief Function for retrieving the SPIS semaphore status.
  *
- * @param[in] p_spis SPIS instance.
+ * @param[in] p_reg  Pointer to the peripheral registers structure.
  *
  * @returns Current semaphore status.
  */
-__STATIC_INLINE nrf_spis_semstat_t nrf_spis_semaphore_status_get(NRF_SPIS_Type * p_spis);
+__STATIC_INLINE nrf_spis_semstat_t nrf_spis_semaphore_status_get(NRF_SPIS_Type * p_reg);
 
 /**
  * @brief Function for retrieving the SPIS status.
  *
- * @param[in] p_spis SPIS instance.
+ * @param[in] p_reg  Pointer to the peripheral registers structure.
  *
  * @returns Current SPIS status.
  */
-__STATIC_INLINE nrf_spis_status_mask_t nrf_spis_status_get(NRF_SPIS_Type * p_spis);
+__STATIC_INLINE nrf_spis_status_mask_t nrf_spis_status_get(NRF_SPIS_Type * p_reg);
 
 /**
  * @brief Function for configuring SPIS pins.
@@ -253,13 +285,13 @@ __STATIC_INLINE nrf_spis_status_mask_t nrf_spis_status_get(NRF_SPIS_Type * p_spi
  * If a given signal is not needed, pass the @ref NRF_SPIS_PIN_NOT_CONNECTED
  * value instead of its pin number.
  *
- * @param[in] p_spis    SPIS instance.
+ * @param[in] p_reg     Pointer to the peripheral registers structure.
  * @param[in] sck_pin   SCK pin number.
  * @param[in] mosi_pin  MOSI pin number.
  * @param[in] miso_pin  MISO pin number.
  * @param[in] csn_pin   CSN pin number.
  */
-__STATIC_INLINE void nrf_spis_pins_set(NRF_SPIS_Type * p_spis,
+__STATIC_INLINE void nrf_spis_pins_set(NRF_SPIS_Type * p_reg,
                                        uint32_t sck_pin,
                                        uint32_t mosi_pin,
                                        uint32_t miso_pin,
@@ -268,22 +300,22 @@ __STATIC_INLINE void nrf_spis_pins_set(NRF_SPIS_Type * p_spis,
 /**
  * @brief Function for setting the transmit buffer.
  *
- * @param[in]  p_spis   SPIS instance.
+ * @param[in]  p_reg    Pointer to the peripheral registers structure.
  * @param[in]  p_buffer Pointer to the buffer that contains the data to send.
  * @param[in]  length   Maximum number of data bytes to transmit.
  */
-__STATIC_INLINE void nrf_spis_tx_buffer_set(NRF_SPIS_Type * p_spis,
+__STATIC_INLINE void nrf_spis_tx_buffer_set(NRF_SPIS_Type * p_reg,
                                             uint8_t const * p_buffer,
                                             uint8_t         length);
 
 /**
  * @brief Function for setting the receive buffer.
  *
- * @param[in] p_spis   SPIS instance.
+ * @param[in] p_reg    Pointer to the peripheral registers structure.
  * @param[in] p_buffer Pointer to the buffer for received data.
  * @param[in] length   Maximum number of data bytes to receive.
  */
-__STATIC_INLINE void nrf_spis_rx_buffer_set(NRF_SPIS_Type * p_spis,
+__STATIC_INLINE void nrf_spis_rx_buffer_set(NRF_SPIS_Type * p_reg,
                                             uint8_t * p_buffer,
                                             uint8_t   length);
 
@@ -291,176 +323,180 @@ __STATIC_INLINE void nrf_spis_rx_buffer_set(NRF_SPIS_Type * p_spis,
  * @brief Function for getting the number of bytes transmitted
  *        in the last granted transaction.
  *
- * @param[in]  p_spis   SPIS instance.
+ * @param[in]  p_reg    Pointer to the peripheral registers structure.
  *
  * @returns Number of bytes transmitted.
  */
-__STATIC_INLINE uint8_t nrf_spis_tx_amount_get(NRF_SPIS_Type const * p_spis);
+__STATIC_INLINE uint8_t nrf_spis_tx_amount_get(NRF_SPIS_Type const * p_reg);
 
 /**
  * @brief Function for getting the number of bytes received
  *        in the last granted transaction.
  *
- * @param[in]  p_spis   SPIS instance.
+ * @param[in]  p_reg    Pointer to the peripheral registers structure.
  *
  * @returns Number of bytes received.
  */
-__STATIC_INLINE uint8_t nrf_spis_rx_amount_get(NRF_SPIS_Type const * p_spis);
+__STATIC_INLINE uint8_t nrf_spis_rx_amount_get(NRF_SPIS_Type const * p_reg);
 
 /**
  * @brief Function for setting the SPI configuration.
  *
- * @param[in] p_spis        SPIS instance.
+ * @param[in] p_reg         Pointer to the peripheral registers structure.
  * @param[in] spi_mode      SPI mode.
  * @param[in] spi_bit_order SPI bit order.
  */
-__STATIC_INLINE void nrf_spis_configure(NRF_SPIS_Type * p_spis,
+__STATIC_INLINE void nrf_spis_configure(NRF_SPIS_Type * p_reg,
                                         nrf_spis_mode_t spi_mode,
                                         nrf_spis_bit_order_t spi_bit_order);
 
 /**
  * @brief Function for setting the default character.
  *
- * @param[in] p_spis SPIS instance.
+ * @param[in] p_reg  Pointer to the peripheral registers structure.
  * @param[in] def    Default character that is clocked out in case of
  *                   an overflow of the RXD buffer.
  */
-__STATIC_INLINE void nrf_spis_def_set(NRF_SPIS_Type * p_spis,
+__STATIC_INLINE void nrf_spis_def_set(NRF_SPIS_Type * p_reg,
                                       uint8_t def);
 
 /**
  * @brief Function for setting the over-read character.
  *
- * @param[in] p_spis SPIS instance.
+ * @param[in] p_reg  Pointer to the peripheral registers structure.
  * @param[in] orc    Over-read character that is clocked out in case of
  *                   an over-read of the TXD buffer.
  */
-__STATIC_INLINE void nrf_spis_orc_set(NRF_SPIS_Type * p_spis,
+__STATIC_INLINE void nrf_spis_orc_set(NRF_SPIS_Type * p_reg,
                                       uint8_t orc);
 
 
 #ifndef SUPPRESS_INLINE_IMPLEMENTATION
 
-__STATIC_INLINE void nrf_spis_task_trigger(NRF_SPIS_Type * p_spis,
+__STATIC_INLINE void nrf_spis_task_trigger(NRF_SPIS_Type * p_reg,
                                            nrf_spis_task_t spis_task)
 {
-    *((volatile uint32_t *)((uint8_t *)p_spis + (uint32_t)spis_task)) = 0x1UL;
+    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)spis_task)) = 0x1UL;
 }
 
-__STATIC_INLINE uint32_t nrf_spis_task_address_get(NRF_SPIS_Type const * p_spis,
+__STATIC_INLINE uint32_t nrf_spis_task_address_get(NRF_SPIS_Type const * p_reg,
                                                    nrf_spis_task_t spis_task)
 {
-    return (uint32_t)p_spis + (uint32_t)spis_task;
+    return (uint32_t)p_reg + (uint32_t)spis_task;
 }
 
-__STATIC_INLINE void nrf_spis_event_clear(NRF_SPIS_Type *  p_spis,
+__STATIC_INLINE void nrf_spis_event_clear(NRF_SPIS_Type *  p_reg,
                                           nrf_spis_event_t spis_event)
 {
-    *((volatile uint32_t *)((uint8_t *)p_spis + (uint32_t)spis_event)) = 0x0UL;
+    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)spis_event)) = 0x0UL;
+#if __CORTEX_M == 0x04
+    volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)spis_event));
+    (void)dummy;
+#endif
 }
 
-__STATIC_INLINE bool nrf_spis_event_check(NRF_SPIS_Type const * p_spis,
+__STATIC_INLINE bool nrf_spis_event_check(NRF_SPIS_Type const * p_reg,
                                           nrf_spis_event_t spis_event)
 {
-    return (bool)*(volatile uint32_t *)((uint8_t *)p_spis + (uint32_t)spis_event);
+    return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)spis_event);
 }
 
-__STATIC_INLINE uint32_t nrf_spis_event_address_get(NRF_SPIS_Type const * p_spis,
+__STATIC_INLINE uint32_t nrf_spis_event_address_get(NRF_SPIS_Type const * p_reg,
                                                     nrf_spis_event_t spis_event)
 {
-    return (uint32_t)p_spis + (uint32_t)spis_event;
+    return (uint32_t)p_reg + (uint32_t)spis_event;
 }
 
-__STATIC_INLINE void nrf_spis_shorts_enable(NRF_SPIS_Type * p_spis,
+__STATIC_INLINE void nrf_spis_shorts_enable(NRF_SPIS_Type * p_reg,
                                             uint32_t spis_shorts_mask)
 {
-    p_spis->SHORTS |= spis_shorts_mask;
+    p_reg->SHORTS |= spis_shorts_mask;
 }
 
-__STATIC_INLINE void nrf_spis_shorts_disable(NRF_SPIS_Type * p_spis,
+__STATIC_INLINE void nrf_spis_shorts_disable(NRF_SPIS_Type * p_reg,
                                              uint32_t spis_shorts_mask)
 {
-    p_spis->SHORTS &= ~(spis_shorts_mask);
+    p_reg->SHORTS &= ~(spis_shorts_mask);
 }
 
-__STATIC_INLINE void nrf_spis_int_enable(NRF_SPIS_Type * p_spis,
+__STATIC_INLINE void nrf_spis_int_enable(NRF_SPIS_Type * p_reg,
                                          uint32_t spis_int_mask)
 {
-    p_spis->INTENSET = spis_int_mask;
+    p_reg->INTENSET = spis_int_mask;
 }
 
-__STATIC_INLINE void nrf_spis_int_disable(NRF_SPIS_Type * p_spis,
+__STATIC_INLINE void nrf_spis_int_disable(NRF_SPIS_Type * p_reg,
                                           uint32_t spis_int_mask)
 {
-    p_spis->INTENCLR = spis_int_mask;
+    p_reg->INTENCLR = spis_int_mask;
 }
 
-__STATIC_INLINE bool nrf_spis_int_enable_check(NRF_SPIS_Type const * p_spis,
+__STATIC_INLINE bool nrf_spis_int_enable_check(NRF_SPIS_Type const * p_reg,
                                                nrf_spis_int_mask_t spis_int)
 {
-    return (bool)(p_spis->INTENSET & spis_int);
+    return (bool)(p_reg->INTENSET & spis_int);
 }
 
-__STATIC_INLINE void nrf_spis_enable(NRF_SPIS_Type * p_spis)
+__STATIC_INLINE void nrf_spis_enable(NRF_SPIS_Type * p_reg)
 {
-    p_spis->ENABLE = (SPIS_ENABLE_ENABLE_Enabled << SPIS_ENABLE_ENABLE_Pos);
+    p_reg->ENABLE = (SPIS_ENABLE_ENABLE_Enabled << SPIS_ENABLE_ENABLE_Pos);
 }
 
-__STATIC_INLINE void nrf_spis_disable(NRF_SPIS_Type * p_spis)
+__STATIC_INLINE void nrf_spis_disable(NRF_SPIS_Type * p_reg)
 {
-    p_spis->ENABLE = (SPIS_ENABLE_ENABLE_Disabled << SPIS_ENABLE_ENABLE_Pos);
+    p_reg->ENABLE = (SPIS_ENABLE_ENABLE_Disabled << SPIS_ENABLE_ENABLE_Pos);
 }
 
-__STATIC_INLINE nrf_spis_semstat_t nrf_spis_semaphore_status_get(NRF_SPIS_Type * p_spis)
+__STATIC_INLINE nrf_spis_semstat_t nrf_spis_semaphore_status_get(NRF_SPIS_Type * p_reg)
 {
-    return (nrf_spis_semstat_t) ((p_spis->SEMSTAT & SPIS_SEMSTAT_SEMSTAT_Msk) 
+    return (nrf_spis_semstat_t) ((p_reg->SEMSTAT & SPIS_SEMSTAT_SEMSTAT_Msk)
                                  >> SPIS_SEMSTAT_SEMSTAT_Pos);
 }
 
-__STATIC_INLINE nrf_spis_status_mask_t nrf_spis_status_get(NRF_SPIS_Type * p_spis)
+__STATIC_INLINE nrf_spis_status_mask_t nrf_spis_status_get(NRF_SPIS_Type * p_reg)
 {
-    return (nrf_spis_status_mask_t) p_spis->STATUS;
+    return (nrf_spis_status_mask_t) p_reg->STATUS;
 }
 
-__STATIC_INLINE void nrf_spis_pins_set(NRF_SPIS_Type * p_spis,
+__STATIC_INLINE void nrf_spis_pins_set(NRF_SPIS_Type * p_reg,
                                        uint32_t sck_pin,
                                        uint32_t mosi_pin,
                                        uint32_t miso_pin,
                                        uint32_t csn_pin)
 {
-    p_spis->PSELSCK  = sck_pin;
+    p_reg->PSELSCK  = sck_pin;
-    p_spis->PSELMOSI = mosi_pin;
+    p_reg->PSELMOSI = mosi_pin;
-    p_spis->PSELMISO = miso_pin;
+    p_reg->PSELMISO = miso_pin;
-    p_spis->PSELCSN  = csn_pin;
+    p_reg->PSELCSN  = csn_pin;
 }
 
-__STATIC_INLINE void nrf_spis_tx_buffer_set(NRF_SPIS_Type * p_spis,
+__STATIC_INLINE void nrf_spis_tx_buffer_set(NRF_SPIS_Type * p_reg,
                                             uint8_t const * p_buffer,
                                             uint8_t         length)
 {
-    p_spis->TXDPTR = (uint32_t)p_buffer;
+    p_reg->TXDPTR = (uint32_t)p_buffer;
-    p_spis->MAXTX  = length;
+    p_reg->MAXTX  = length;
 }
 
-__STATIC_INLINE void nrf_spis_rx_buffer_set(NRF_SPIS_Type * p_spis,
+__STATIC_INLINE void nrf_spis_rx_buffer_set(NRF_SPIS_Type * p_reg,
                                             uint8_t * p_buffer,
                                             uint8_t   length)
 {
-    p_spis->RXDPTR = (uint32_t)p_buffer;
+    p_reg->RXDPTR = (uint32_t)p_buffer;
-    p_spis->MAXRX  = length;
+    p_reg->MAXRX  = length;
 }
 
-__STATIC_INLINE uint8_t nrf_spis_tx_amount_get(NRF_SPIS_Type const * p_spis)
+__STATIC_INLINE uint8_t nrf_spis_tx_amount_get(NRF_SPIS_Type const * p_reg)
 {
-    return (uint8_t) p_spis->AMOUNTRX;
+    return (uint8_t) p_reg->AMOUNTTX;
 }
 
-__STATIC_INLINE uint8_t nrf_spis_rx_amount_get(NRF_SPIS_Type const * p_spis)
+__STATIC_INLINE uint8_t nrf_spis_rx_amount_get(NRF_SPIS_Type const * p_reg)
 {
-    return (uint8_t) p_spis->AMOUNTTX;
+    return (uint8_t) p_reg->AMOUNTRX;
 }
 
-__STATIC_INLINE void nrf_spis_configure(NRF_SPIS_Type * p_spis,
+__STATIC_INLINE void nrf_spis_configure(NRF_SPIS_Type * p_reg,
                                         nrf_spis_mode_t spi_mode,
                                         nrf_spis_bit_order_t spi_bit_order)
 {
@@ -490,23 +526,28 @@ __STATIC_INLINE void nrf_spis_configure(NRF_SPIS_Type * p_spis,
                   (SPIS_CONFIG_CPHA_Trailing   << SPIS_CONFIG_CPHA_Pos);
         break;
     }
-    p_spis->CONFIG = config;
+    p_reg->CONFIG = config;
 }
 
-__STATIC_INLINE void nrf_spis_orc_set(NRF_SPIS_Type * p_spis,
+__STATIC_INLINE void nrf_spis_orc_set(NRF_SPIS_Type * p_reg,
                                       uint8_t orc)
 {
-    p_spis->ORC = orc;
+    p_reg->ORC = orc;
 }
 
-__STATIC_INLINE void nrf_spis_def_set(NRF_SPIS_Type * p_spis,
+__STATIC_INLINE void nrf_spis_def_set(NRF_SPIS_Type * p_reg,
                                       uint8_t def)
 {
-    p_spis->DEF = def;
+    p_reg->DEF = def;
 }
 
 #endif // SUPPRESS_INLINE_IMPLEMENTATION
 
+
+#ifdef __cplusplus
+}
+#endif
+
 #endif // NRF_SPIS_H__
 
 /** @} */

nRF5_SDK_11.0.0_89a8197/components/drivers_nrf/hal/nrf_systick.h

@@ -0,0 +1,184 @@
+/**
+ * Copyright (c) 2016 - 2017, Nordic Semiconductor ASA
+ * 
+ * All rights reserved.
+ * 
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ * 
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ *    list of conditions and the following disclaimer.
+ * 
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ *    Semiconductor ASA integrated circuit in a product or a software update for
+ *    such product, must reproduce the above copyright notice, this list of
+ *    conditions and the following disclaimer in the documentation and/or other
+ *    materials provided with the distribution.
+ * 
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ *    contributors may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ * 
+ * 4. This software, with or without modification, must only be used with a
+ *    Nordic Semiconductor ASA integrated circuit.
+ * 
+ * 5. Any software provided in binary form under this license must not be reverse
+ *    engineered, decompiled, modified and/or disassembled.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ */
+#ifndef NRF_SYSTICK_H__
+#define NRF_SYSTICK_H__
+
+#include "nrf.h"
+#include <stdint.h>
+#include <stddef.h>
+#include <stdbool.h>
+
+/**
+ * @defgroup nrf_systick_hal SYSTICK HAL
+ * @{
+ * @ingroup nrf_systick
+ *
+ * @brief Hardware access layer for accessing the SYSTICK peripheral.
+ *
+ * SYSTICK is ARM peripheral, not Nordic design.
+ * It means that it has no Nordic-typical interface with Tasks and Events.
+ *
+ * Its usage is limited here to implement simple delays.
+ * Also keep in mind that this timer would be stopped when CPU is sleeping
+ * (WFE/WFI instruction is successfully executed).
+ */
+
+/**
+ * @brief Mask of usable bits in the SysTick value
+ */
+#define NRF_SYSTICK_VAL_MASK SysTick_VAL_CURRENT_Msk
+
+/**
+ * @brief Flags used by SysTick configuration.
+ *
+ * @sa nrf_systick_csr_set
+ * @sa nrf_systick_csr_get
+ */
+typedef enum {
+    NRF_SYSTICK_CSR_COUNTFLAG_MASK  = SysTick_CTRL_COUNTFLAG_Msk,       /**< Status flag: Returns 1 if timer counted to 0 since the last read of this register. */
+
+    NRF_SYSTICK_CSR_CLKSOURCE_MASK  = SysTick_CTRL_CLKSOURCE_Msk,       /**< Configuration bit: Select the SysTick clock source. */
+    NRF_SYSTICK_CSR_CLKSOURCE_REF   = 0U << SysTick_CTRL_CLKSOURCE_Pos, /**< Configuration value: Select reference clock. */
+    NRF_SYSTICK_CSR_CLKSOURCE_CPU   = 1U << SysTick_CTRL_CLKSOURCE_Pos, /**< Configuration value: Select CPU clock. */
+
+    NRF_SYSTICK_CSR_TICKINT_MASK    = SysTick_CTRL_TICKINT_Msk,         /**< Configuration bit: Enables SysTick exception request. */
+    NRF_SYSTICK_CSR_TICKINT_ENABLE  = 1U << SysTick_CTRL_TICKINT_Pos,   /**< Configuration value: Counting down to zero does not assert the SysTick exception request. */
+    NRF_SYSTICK_CSR_TICKINT_DISABLE = 0U << SysTick_CTRL_TICKINT_Pos,   /**< Configuration value: Counting down to zero to asserts the SysTick exception request. */
+
+    NRF_SYSTICK_CSR_ENABLE_MASK     = SysTick_CTRL_ENABLE_Msk,          /**< Configuration bit: Enable the SysTick timer. */
+    NRF_SYSTICK_CSR_ENABLE          = 1U << SysTick_CTRL_ENABLE_Pos,    /**< Configuration value: Counter enabled. */
+    NRF_SYSTICK_CSR_DISABLE         = 0U << SysTick_CTRL_ENABLE_Pos     /**< Configuration value: Counter disabled. */
+} nrf_systick_csr_flags_t;
+
+/**
+ * @brief Get Configuration and Status Register
+ *
+ * @return Values composed by @ref nrf_systick_csr_flags_t.
+ * @note The @ref NRF_SYSTICK_CSR_COUNTFLAG_MASK value is cleared when CSR register is read.
+ */
+__STATIC_INLINE uint32_t nrf_systick_csr_get(void);
+
+/**
+ * @brief Set Configuration and Status Register
+ *
+ * @param[in] val The value composed from @ref nrf_systick_csr_flags_t.
+ */
+__STATIC_INLINE void nrf_systick_csr_set(uint32_t val);
+
+/**
+ * @brief Get the current reload value.
+ *
+ * @return The reload register value.
+ */
+__STATIC_INLINE uint32_t nrf_systick_load_get(void);
+
+/**
+ * @brief Configure the reload value.
+ *
+ * @param[in] val The value to set in the reload register.
+ */
+__STATIC_INLINE void nrf_systick_load_set(uint32_t val);
+
+/**
+ * @brief Read the SysTick current value
+ *
+ * @return The current SysTick value
+ * @sa NRF_SYSTICK_VAL_MASK
+ */
+__STATIC_INLINE uint32_t nrf_systick_val_get(void);
+
+/**
+ * @brief Clear the SysTick current value
+ *
+ * @note The SysTick does not allow setting current value.
+ *       Any write to VAL register would clear the timer.
+ */
+__STATIC_INLINE void nrf_systick_val_clear(void);
+
+/**
+ * @brief Read the calibration register
+ *
+ * @return The calibration register value
+ */
+__STATIC_INLINE uint32_t nrf_systick_calib_get(void);
+
+
+
+#ifndef SUPPRESS_INLINE_IMPLEMENTATION
+
+__STATIC_INLINE uint32_t nrf_systick_csr_get(void)
+{
+    return SysTick->CTRL;
+}
+
+__STATIC_INLINE void nrf_systick_csr_set(uint32_t val)
+{
+    SysTick->CTRL = val;
+}
+
+__STATIC_INLINE uint32_t nrf_systick_load_get(void)
+{
+    return SysTick->LOAD;
+}
+
+__STATIC_INLINE void nrf_systick_load_set(uint32_t val)
+{
+    SysTick->LOAD = val;
+}
+
+__STATIC_INLINE uint32_t nrf_systick_val_get(void)
+{
+    return SysTick->VAL;
+}
+
+__STATIC_INLINE void nrf_systick_val_clear(void)
+{
+    SysTick->VAL = 0;
+}
+
+__STATIC_INLINE uint32_t nrf_systick_calib_get(void)
+{
+    return SysTick->CALIB;
+}
+
+#endif /* SUPPRESS_INLINE_IMPLEMENTATION */
+
+/** @} */
+#endif /* NRF_SYSTICK_H__ */

nRF5_SDK_11.0.0_89a8197/components/drivers_nrf/hal/nrf_temp.h

@@ -1,20 +1,51 @@
-/* Copyright (c) 2012 Nordic Semiconductor. All Rights Reserved.
+/**
+ * Copyright (c) 2012 - 2017, Nordic Semiconductor ASA
  * 
- * The information contained herein is property of Nordic Semiconductor ASA.
+ * All rights reserved.
- * Terms and conditions of usage are described in detail in NORDIC
- * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
  * 
- * Licensees are granted free, non-transferable use of the information. NO
+ * Redistribution and use in source and binary forms, with or without modification,
- * WARRANTY of ANY KIND is provided. This heading must NOT be removed from
+ * are permitted provided that the following conditions are met:
- * the file.
+ * 
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ *    list of conditions and the following disclaimer.
+ * 
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ *    Semiconductor ASA integrated circuit in a product or a software update for
+ *    such product, must reproduce the above copyright notice, this list of
+ *    conditions and the following disclaimer in the documentation and/or other
+ *    materials provided with the distribution.
+ * 
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ *    contributors may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ * 
+ * 4. This software, with or without modification, must only be used with a
+ *    Nordic Semiconductor ASA integrated circuit.
+ * 
+ * 5. Any software provided in binary form under this license must not be reverse
+ *    engineered, decompiled, modified and/or disassembled.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  * 
  */
-
 #ifndef NRF_TEMP_H__
 #define NRF_TEMP_H__
 
 #include "nrf.h"
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 /**
 * @defgroup nrf_temperature TEMP (temperature) abstraction
 * @{
@@ -52,4 +83,9 @@ static __INLINE int32_t nrf_temp_read(void)
 
 /** @} */
 
+
+#ifdef __cplusplus
+}
+#endif
+
 #endif

nRF5_SDK_11.0.0_89a8197/components/drivers_nrf/hal/nrf_timer.h

@@ -1,15 +1,42 @@
-/* Copyright (c) 2014 Nordic Semiconductor. All Rights Reserved.
+/**
+ * Copyright (c) 2014 - 2017, Nordic Semiconductor ASA
  * 
- * The information contained herein is property of Nordic Semiconductor ASA.
+ * All rights reserved.
- * Terms and conditions of usage are described in detail in NORDIC
- * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
  * 
- * Licensees are granted free, non-transferable use of the information. NO
+ * Redistribution and use in source and binary forms, with or without modification,
- * WARRANTY of ANY KIND is provided. This heading must NOT be removed from
+ * are permitted provided that the following conditions are met:
- * the file.
+ * 
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ *    list of conditions and the following disclaimer.
+ * 
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ *    Semiconductor ASA integrated circuit in a product or a software update for
+ *    such product, must reproduce the above copyright notice, this list of
+ *    conditions and the following disclaimer in the documentation and/or other
+ *    materials provided with the distribution.
+ * 
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ *    contributors may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ * 
+ * 4. This software, with or without modification, must only be used with a
+ *    Nordic Semiconductor ASA integrated circuit.
+ * 
+ * 5. Any software provided in binary form under this license must not be reverse
+ *    engineered, decompiled, modified and/or disassembled.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  * 
  */
-
 /**
  * @defgroup nrf_timer_hal Timer HAL
  * @{
@@ -25,37 +52,55 @@
 #include <stdbool.h>
 #include <stdint.h>
 
+#include "nrf_peripherals.h"
 #include "nrf.h"
 #include "nrf_assert.h"
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 
 /**
  * @brief Macro for validating the correctness of the BIT_WIDTH setting.
  */
-#ifdef NRF51
+
-    /**
+#define TIMER_MAX_SIZE(id) CONCAT_3(TIMER, id, _MAX_SIZE)
-     * In the nRF51 Series, timer instance 0 supports all available bit widths.
+
-     * The other two instances support only 8 and 16 bits.
+#define TIMER_BIT_WIDTH_MAX(id, bit_width) \
-     */
+    (TIMER_MAX_SIZE(id) == 8   ? (bit_width == NRF_TIMER_BIT_WIDTH_8)  :  \
-    #define NRF_TIMER_IS_BIT_WIDTH_VALID(p_timer, bit_width) \
+    (TIMER_MAX_SIZE(id) == 16  ? (bit_width == NRF_TIMER_BIT_WIDTH_8)  || \
-        ((p_timer == NRF_TIMER0) || (bit_width <= NRF_TIMER_BIT_WIDTH_16))
+                                 (bit_width == NRF_TIMER_BIT_WIDTH_16)  : \
+    (TIMER_MAX_SIZE(id) == 24  ? (bit_width == NRF_TIMER_BIT_WIDTH_8)  || \
+                                 (bit_width == NRF_TIMER_BIT_WIDTH_16) || \
+                                 (bit_width == NRF_TIMER_BIT_WIDTH_24) :  \
+    (TIMER_MAX_SIZE(id) == 32  ? (bit_width == NRF_TIMER_BIT_WIDTH_8)  || \
+                                 (bit_width == NRF_TIMER_BIT_WIDTH_16) || \
+                                 (bit_width == NRF_TIMER_BIT_WIDTH_24) || \
+                                 (bit_width == NRF_TIMER_BIT_WIDTH_32) :  \
+    false))))
+
+#if TIMER_COUNT > 3
+#define NRF_TIMER_IS_BIT_WIDTH_VALID(p_reg, bit_width) (                \
+       ((p_reg == NRF_TIMER0) && (TIMER_BIT_WIDTH_MAX(0, bit_width)))   \
+    || ((p_reg == NRF_TIMER1) && (TIMER_BIT_WIDTH_MAX(1, bit_width)))   \
+    || ((p_reg == NRF_TIMER2) && (TIMER_BIT_WIDTH_MAX(2, bit_width)))   \
+    || ((p_reg == NRF_TIMER3) && (TIMER_BIT_WIDTH_MAX(3, bit_width)))   \
+    || ((p_reg == NRF_TIMER4) && (TIMER_BIT_WIDTH_MAX(4, bit_width))) )
+
 #else
-    /**
+#define NRF_TIMER_IS_BIT_WIDTH_VALID(p_reg, bit_width) (             \
-     * In the nRF52 Series, all timer instances support all available bit widths.
+       ((p_reg == NRF_TIMER0) && TIMER_BIT_WIDTH_MAX(0, bit_width))  \
-     */
+    || ((p_reg == NRF_TIMER1) && TIMER_BIT_WIDTH_MAX(1, bit_width))  \
-    #define NRF_TIMER_IS_BIT_WIDTH_VALID(p_timer, bit_width) true
+    || ((p_reg == NRF_TIMER2) && TIMER_BIT_WIDTH_MAX(2, bit_width)) )
+
 #endif
 
 /**
  * @brief Macro for getting the number of capture/compare channels available
  *        in a given timer instance.
  */
-#ifdef NRF51
+#define NRF_TIMER_CC_CHANNEL_COUNT(id)  CONCAT_3(TIMER, id, _CC_NUM)
-    #define NRF_TIMER_CC_CHANNEL_COUNT(id)  4
-#else
-    #define NRF_TIMER_CC_CHANNEL_COUNT(id)  ((id) <= 2 ? 4 : 6)
-#endif
-
 
 /**
  * @brief Timer tasks.
@@ -72,7 +117,7 @@ typedef enum
     NRF_TIMER_TASK_CAPTURE1 = offsetof(NRF_TIMER_Type, TASKS_CAPTURE[1]), ///< Task for capturing the timer value on channel 1.
     NRF_TIMER_TASK_CAPTURE2 = offsetof(NRF_TIMER_Type, TASKS_CAPTURE[2]), ///< Task for capturing the timer value on channel 2.
     NRF_TIMER_TASK_CAPTURE3 = offsetof(NRF_TIMER_Type, TASKS_CAPTURE[3]), ///< Task for capturing the timer value on channel 3.
-#ifdef NRF52
+#if (TIMER_COUNT > 3) || defined(__SDK_DOXYGEN__)
     NRF_TIMER_TASK_CAPTURE4 = offsetof(NRF_TIMER_Type, TASKS_CAPTURE[4]), ///< Task for capturing the timer value on channel 4.
     NRF_TIMER_TASK_CAPTURE5 = offsetof(NRF_TIMER_Type, TASKS_CAPTURE[5]), ///< Task for capturing the timer value on channel 5.
 #endif
@@ -89,7 +134,7 @@ typedef enum
     NRF_TIMER_EVENT_COMPARE1 = offsetof(NRF_TIMER_Type, EVENTS_COMPARE[1]), ///< Event from compare channel 1.
     NRF_TIMER_EVENT_COMPARE2 = offsetof(NRF_TIMER_Type, EVENTS_COMPARE[2]), ///< Event from compare channel 2.
     NRF_TIMER_EVENT_COMPARE3 = offsetof(NRF_TIMER_Type, EVENTS_COMPARE[3]), ///< Event from compare channel 3.
-#ifdef NRF52
+#if (TIMER_COUNT > 3) || defined(__SDK_DOXYGEN__)
     NRF_TIMER_EVENT_COMPARE4 = offsetof(NRF_TIMER_Type, EVENTS_COMPARE[4]), ///< Event from compare channel 4.
     NRF_TIMER_EVENT_COMPARE5 = offsetof(NRF_TIMER_Type, EVENTS_COMPARE[5]), ///< Event from compare channel 5.
 #endif
@@ -105,7 +150,7 @@ typedef enum
     NRF_TIMER_SHORT_COMPARE1_STOP_MASK = TIMER_SHORTS_COMPARE1_STOP_Msk,   ///< Shortcut for stopping the timer based on compare 1.
     NRF_TIMER_SHORT_COMPARE2_STOP_MASK = TIMER_SHORTS_COMPARE2_STOP_Msk,   ///< Shortcut for stopping the timer based on compare 2.
     NRF_TIMER_SHORT_COMPARE3_STOP_MASK = TIMER_SHORTS_COMPARE3_STOP_Msk,   ///< Shortcut for stopping the timer based on compare 3.
-#ifdef NRF52
+#if (TIMER_COUNT > 3) || defined(__SDK_DOXYGEN__)
     NRF_TIMER_SHORT_COMPARE4_STOP_MASK = TIMER_SHORTS_COMPARE4_STOP_Msk,   ///< Shortcut for stopping the timer based on compare 4.
     NRF_TIMER_SHORT_COMPARE5_STOP_MASK = TIMER_SHORTS_COMPARE5_STOP_Msk,   ///< Shortcut for stopping the timer based on compare 5.
 #endif
@@ -113,7 +158,7 @@ typedef enum
     NRF_TIMER_SHORT_COMPARE1_CLEAR_MASK = TIMER_SHORTS_COMPARE1_CLEAR_Msk, ///< Shortcut for clearing the timer based on compare 1.
     NRF_TIMER_SHORT_COMPARE2_CLEAR_MASK = TIMER_SHORTS_COMPARE2_CLEAR_Msk, ///< Shortcut for clearing the timer based on compare 2.
     NRF_TIMER_SHORT_COMPARE3_CLEAR_MASK = TIMER_SHORTS_COMPARE3_CLEAR_Msk, ///< Shortcut for clearing the timer based on compare 3.
-#ifdef NRF52
+#if (TIMER_COUNT > 3) || defined(__SDK_DOXYGEN__)
     NRF_TIMER_SHORT_COMPARE4_CLEAR_MASK = TIMER_SHORTS_COMPARE4_CLEAR_Msk, ///< Shortcut for clearing the timer based on compare 4.
     NRF_TIMER_SHORT_COMPARE5_CLEAR_MASK = TIMER_SHORTS_COMPARE5_CLEAR_Msk, ///< Shortcut for clearing the timer based on compare 5.
 #endif
@@ -126,7 +171,7 @@ typedef enum
 {
     NRF_TIMER_MODE_TIMER             = TIMER_MODE_MODE_Timer,           ///< Timer mode: timer.
     NRF_TIMER_MODE_COUNTER           = TIMER_MODE_MODE_Counter,         ///< Timer mode: counter.
-#ifdef NRF52
+#if defined(TIMER_MODE_MODE_LowPowerCounter) || defined(__SDK_DOXYGEN__)
     NRF_TIMER_MODE_LOW_POWER_COUNTER = TIMER_MODE_MODE_LowPowerCounter, ///< Timer mode: low-power counter.
 #endif
 } nrf_timer_mode_t;
@@ -168,7 +213,7 @@ typedef enum
     NRF_TIMER_CC_CHANNEL1,     ///< Timer capture/compare channel 1.
     NRF_TIMER_CC_CHANNEL2,     ///< Timer capture/compare channel 2.
     NRF_TIMER_CC_CHANNEL3,     ///< Timer capture/compare channel 3.
-#ifdef NRF52
+#if (TIMER_COUNT > 3) || defined(__SDK_DOXYGEN__)
     NRF_TIMER_CC_CHANNEL4,     ///< Timer capture/compare channel 4.
     NRF_TIMER_CC_CHANNEL5,     ///< Timer capture/compare channel 5.
 #endif
@@ -183,7 +228,7 @@ typedef enum
     NRF_TIMER_INT_COMPARE1_MASK = TIMER_INTENSET_COMPARE1_Msk, ///< Timer interrupt from compare event on channel 1.
     NRF_TIMER_INT_COMPARE2_MASK = TIMER_INTENSET_COMPARE2_Msk, ///< Timer interrupt from compare event on channel 2.
     NRF_TIMER_INT_COMPARE3_MASK = TIMER_INTENSET_COMPARE3_Msk, ///< Timer interrupt from compare event on channel 3.
-#ifdef NRF52
+#if (TIMER_COUNT > 3) || defined(__SDK_DOXYGEN__)
     NRF_TIMER_INT_COMPARE4_MASK = TIMER_INTENSET_COMPARE4_Msk, ///< Timer interrupt from compare event on channel 4.
     NRF_TIMER_INT_COMPARE5_MASK = TIMER_INTENSET_COMPARE5_Msk, ///< Timer interrupt from compare event on channel 5.
 #endif
@@ -193,177 +238,177 @@ typedef enum
 /**
  * @brief Function for activating a specific timer task.
  *
- * @param[in] p_timer Timer instance.
+ * @param[in] p_reg   Pointer to the peripheral registers structure.
  * @param[in] task    Task to activate.
  */
-__STATIC_INLINE void nrf_timer_task_trigger(NRF_TIMER_Type * p_timer,
+__STATIC_INLINE void nrf_timer_task_trigger(NRF_TIMER_Type * p_reg,
                                             nrf_timer_task_t task);
 
 /**
  * @brief Function for getting the address of a specific timer task register.
  *
- * @param[in] p_timer Timer instance.
+ * @param[in] p_reg   Pointer to the peripheral registers structure.
  * @param[in] task    Requested task.
  *
  * @return Address of the specified task register.
  */
-__STATIC_INLINE uint32_t * nrf_timer_task_address_get(NRF_TIMER_Type * p_timer,
+__STATIC_INLINE uint32_t * nrf_timer_task_address_get(NRF_TIMER_Type * p_reg,
                                                       nrf_timer_task_t task);
 
 /**
  * @brief Function for clearing a specific timer event.
  *
- * @param[in] p_timer Timer instance.
+ * @param[in] p_reg   Pointer to the peripheral registers structure.
  * @param[in] event   Event to clear.
  */
-__STATIC_INLINE void nrf_timer_event_clear(NRF_TIMER_Type * p_timer,
+__STATIC_INLINE void nrf_timer_event_clear(NRF_TIMER_Type * p_reg,
                                            nrf_timer_event_t event);
 
 /**
  * @brief Function for checking the state of a specific timer event.
  *
- * @param[in] p_timer Timer instance.
+ * @param[in] p_reg   Pointer to the peripheral registers structure.
  * @param[in] event   Event to check.
  *
  * @retval true  If the event is set.
  * @retval false If the event is not set.
  */
-__STATIC_INLINE bool nrf_timer_event_check(NRF_TIMER_Type * p_timer,
+__STATIC_INLINE bool nrf_timer_event_check(NRF_TIMER_Type * p_reg,
                                            nrf_timer_event_t event);
 
 /**
  * @brief Function for getting the address of a specific timer event register.
  *
- * @param[in] p_timer Timer instance.
+ * @param[in] p_reg   Pointer to the peripheral registers structure.
  * @param[in] event   Requested event.
  *
  * @return Address of the specified event register.
  */
-__STATIC_INLINE uint32_t * nrf_timer_event_address_get(NRF_TIMER_Type * p_timer,
+__STATIC_INLINE uint32_t * nrf_timer_event_address_get(NRF_TIMER_Type * p_reg,
                                                        nrf_timer_event_t event);
 
 /**
  * @brief Function for enabling specified shortcuts.
  *
- * @param[in] p_timer           Timer instance.
+ * @param[in] p_reg             Pointer to the peripheral registers structure.
  * @param[in] timer_shorts_mask Shortcuts to enable.
  */
-__STATIC_INLINE void nrf_timer_shorts_enable(NRF_TIMER_Type * p_timer,
+__STATIC_INLINE void nrf_timer_shorts_enable(NRF_TIMER_Type * p_reg,
                                              uint32_t timer_shorts_mask);
 
 /**
  * @brief Function for disabling specified shortcuts.
  *
- * @param[in] p_timer           Timer instance.
+ * @param[in] p_reg             Pointer to the peripheral registers structure.
  * @param[in] timer_shorts_mask Shortcuts to disable.
  */
-__STATIC_INLINE void nrf_timer_shorts_disable(NRF_TIMER_Type * p_timer,
+__STATIC_INLINE void nrf_timer_shorts_disable(NRF_TIMER_Type * p_reg,
                                               uint32_t timer_shorts_mask);
 
 /**
  * @brief Function for enabling specified interrupts.
  *
- * @param[in] p_timer        Timer instance.
+ * @param[in] p_reg          Pointer to the peripheral registers structure.
  * @param[in] timer_int_mask Interrupts to enable.
  */
-__STATIC_INLINE void nrf_timer_int_enable(NRF_TIMER_Type * p_timer,
+__STATIC_INLINE void nrf_timer_int_enable(NRF_TIMER_Type * p_reg,
                                           uint32_t timer_int_mask);
 
 /**
  * @brief Function for disabling specified interrupts.
  *
- * @param[in] p_timer        Timer instance.
+ * @param[in] p_reg          Pointer to the peripheral registers structure.
  * @param[in] timer_int_mask Interrupts to disable.
  */
-__STATIC_INLINE void nrf_timer_int_disable(NRF_TIMER_Type * p_timer,
+__STATIC_INLINE void nrf_timer_int_disable(NRF_TIMER_Type * p_reg,
                                            uint32_t timer_int_mask);
 
 /**
  * @brief Function for retrieving the state of a given interrupt.
  *
- * @param[in] p_timer   Timer instance.
+ * @param[in] p_reg     Pointer to the peripheral registers structure.
  * @param[in] timer_int Interrupt to check.
  *
  * @retval true  If the interrupt is enabled.
  * @retval false If the interrupt is not enabled.
  */
-__STATIC_INLINE bool nrf_timer_int_enable_check(NRF_TIMER_Type * p_timer,
+__STATIC_INLINE bool nrf_timer_int_enable_check(NRF_TIMER_Type * p_reg,
                                                 uint32_t timer_int);
 
 /**
  * @brief Function for setting the timer mode.
  *
- * @param[in] p_timer Timer instance.
+ * @param[in] p_reg   Pointer to the peripheral registers structure.
  * @param[in] mode    Timer mode.
  */
-__STATIC_INLINE void nrf_timer_mode_set(NRF_TIMER_Type * p_timer,
+__STATIC_INLINE void nrf_timer_mode_set(NRF_TIMER_Type * p_reg,
                                         nrf_timer_mode_t mode);
 
 /**
  * @brief Function for retrieving the timer mode.
  *
- * @param[in] p_timer Timer instance.
+ * @param[in] p_reg Pointer to the peripheral registers structure.
  *
  * @return Timer mode.
  */
-__STATIC_INLINE nrf_timer_mode_t nrf_timer_mode_get(NRF_TIMER_Type * p_timer);
+__STATIC_INLINE nrf_timer_mode_t nrf_timer_mode_get(NRF_TIMER_Type * p_reg);
 
 /**
  * @brief Function for setting the timer bit width.
  *
- * @param[in] p_timer   Timer instance.
+ * @param[in] p_reg     Pointer to the peripheral registers structure.
  * @param[in] bit_width Timer bit width.
  */
-__STATIC_INLINE void nrf_timer_bit_width_set(NRF_TIMER_Type * p_timer,
+__STATIC_INLINE void nrf_timer_bit_width_set(NRF_TIMER_Type * p_reg,
                                              nrf_timer_bit_width_t bit_width);
 
 /**
  * @brief Function for retrieving the timer bit width.
  *
- * @param[in] p_timer Timer instance.
+ * @param[in] p_reg Pointer to the peripheral registers structure.
  *
  * @return Timer bit width.
  */
-__STATIC_INLINE nrf_timer_bit_width_t nrf_timer_bit_width_get(NRF_TIMER_Type * p_timer);
+__STATIC_INLINE nrf_timer_bit_width_t nrf_timer_bit_width_get(NRF_TIMER_Type * p_reg);
 
 /**
  * @brief Function for setting the timer frequency.
  *
- * @param[in] p_timer   Timer instance.
+ * @param[in] p_reg     Pointer to the peripheral registers structure.
  * @param[in] frequency Timer frequency.
  */
-__STATIC_INLINE void nrf_timer_frequency_set(NRF_TIMER_Type * p_timer,
+__STATIC_INLINE void nrf_timer_frequency_set(NRF_TIMER_Type * p_reg,
                                              nrf_timer_frequency_t frequency);
 
 /**
  * @brief Function for retrieving the timer frequency.
  *
- * @param[in] p_timer Timer instance.
+ * @param[in] p_reg Pointer to the peripheral registers structure.
  *
  * @return Timer frequency.
  */
-__STATIC_INLINE nrf_timer_frequency_t nrf_timer_frequency_get(NRF_TIMER_Type * p_timer);
+__STATIC_INLINE nrf_timer_frequency_t nrf_timer_frequency_get(NRF_TIMER_Type * p_reg);
 
 /**
  * @brief Function for writing the capture/compare register for a specified channel.
  *
- * @param[in] p_timer    Timer instance.
+ * @param[in] p_reg      Pointer to the peripheral registers structure.
  * @param[in] cc_channel Requested capture/compare channel.
  * @param[in] cc_value   Value to write to the capture/compare register.
  */
-__STATIC_INLINE void nrf_timer_cc_write(NRF_TIMER_Type * p_timer,
+__STATIC_INLINE void nrf_timer_cc_write(NRF_TIMER_Type * p_reg,
                                         nrf_timer_cc_channel_t cc_channel,
                                         uint32_t               cc_value);
 
 /**
  * @brief Function for retrieving the capture/compare value for a specified channel.
  *
- * @param[in] p_timer    Timer instance.
+ * @param[in] p_reg      Pointer to the peripheral registers structure.
  * @param[in] cc_channel Requested capture/compare channel.
  *
  * @return Value from the requested capture/compare register.
  */
-__STATIC_INLINE uint32_t nrf_timer_cc_read(NRF_TIMER_Type * p_timer,
+__STATIC_INLINE uint32_t nrf_timer_cc_read(NRF_TIMER_Type * p_reg,
                                            nrf_timer_cc_channel_t cc_channel);
 
 /**
@@ -420,115 +465,119 @@ __STATIC_INLINE uint32_t nrf_timer_ms_to_ticks(uint32_t time_ms,
 
 #ifndef SUPPRESS_INLINE_IMPLEMENTATION
 
-__STATIC_INLINE void nrf_timer_task_trigger(NRF_TIMER_Type * p_timer,
+__STATIC_INLINE void nrf_timer_task_trigger(NRF_TIMER_Type * p_reg,
                                             nrf_timer_task_t task)
 {
-    *((volatile uint32_t *)((uint8_t *)p_timer + (uint32_t)task)) = 0x1UL;
+    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)task)) = 0x1UL;
 }
 
-__STATIC_INLINE uint32_t * nrf_timer_task_address_get(NRF_TIMER_Type * p_timer,
+__STATIC_INLINE uint32_t * nrf_timer_task_address_get(NRF_TIMER_Type * p_reg,
                                                       nrf_timer_task_t task)
 {
-    return (uint32_t *)((uint8_t *)p_timer + (uint32_t)task);
+    return (uint32_t *)((uint8_t *)p_reg + (uint32_t)task);
 }
 
-__STATIC_INLINE void nrf_timer_event_clear(NRF_TIMER_Type * p_timer,
+__STATIC_INLINE void nrf_timer_event_clear(NRF_TIMER_Type * p_reg,
                                            nrf_timer_event_t event)
 {
-    *((volatile uint32_t *)((uint8_t *)p_timer + (uint32_t)event)) = 0x0UL;
+    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL;
+#if __CORTEX_M == 0x04
+    volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event));
+    (void)dummy;
+#endif
 }
 
-__STATIC_INLINE bool nrf_timer_event_check(NRF_TIMER_Type * p_timer,
+__STATIC_INLINE bool nrf_timer_event_check(NRF_TIMER_Type * p_reg,
                                            nrf_timer_event_t event)
 {
-    return (bool)*(volatile uint32_t *)((uint8_t *)p_timer + (uint32_t)event);
+    return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event);
 }
 
-__STATIC_INLINE uint32_t * nrf_timer_event_address_get(NRF_TIMER_Type * p_timer,
+__STATIC_INLINE uint32_t * nrf_timer_event_address_get(NRF_TIMER_Type * p_reg,
                                                        nrf_timer_event_t event)
 {
-    return (uint32_t *)((uint8_t *)p_timer + (uint32_t)event);
+    return (uint32_t *)((uint8_t *)p_reg + (uint32_t)event);
 }
 
-__STATIC_INLINE void nrf_timer_shorts_enable(NRF_TIMER_Type * p_timer,
+__STATIC_INLINE void nrf_timer_shorts_enable(NRF_TIMER_Type * p_reg,
                                              uint32_t timer_shorts_mask)
 {
-    p_timer->SHORTS |= timer_shorts_mask;
+    p_reg->SHORTS |= timer_shorts_mask;
 }
 
-__STATIC_INLINE void nrf_timer_shorts_disable(NRF_TIMER_Type * p_timer,
+__STATIC_INLINE void nrf_timer_shorts_disable(NRF_TIMER_Type * p_reg,
                                               uint32_t timer_shorts_mask)
 {
-    p_timer->SHORTS &= ~(timer_shorts_mask);
+    p_reg->SHORTS &= ~(timer_shorts_mask);
 }
 
-__STATIC_INLINE void nrf_timer_int_enable(NRF_TIMER_Type * p_timer,
+__STATIC_INLINE void nrf_timer_int_enable(NRF_TIMER_Type * p_reg,
                                           uint32_t timer_int_mask)
 {
-    p_timer->INTENSET = timer_int_mask;
+    p_reg->INTENSET = timer_int_mask;
 }
 
-__STATIC_INLINE void nrf_timer_int_disable(NRF_TIMER_Type * p_timer,
+__STATIC_INLINE void nrf_timer_int_disable(NRF_TIMER_Type * p_reg,
                                            uint32_t timer_int_mask)
 {
-    p_timer->INTENCLR = timer_int_mask;
+    p_reg->INTENCLR = timer_int_mask;
 }
 
-__STATIC_INLINE bool nrf_timer_int_enable_check(NRF_TIMER_Type * p_timer,
+__STATIC_INLINE bool nrf_timer_int_enable_check(NRF_TIMER_Type * p_reg,
                                                 uint32_t timer_int)
 {
-    return (bool)(p_timer->INTENSET & timer_int);
+    return (bool)(p_reg->INTENSET & timer_int);
 }
 
-__STATIC_INLINE void nrf_timer_mode_set(NRF_TIMER_Type * p_timer,
+__STATIC_INLINE void nrf_timer_mode_set(NRF_TIMER_Type * p_reg,
                                         nrf_timer_mode_t mode)
 {
-    p_timer->MODE = (p_timer->MODE & ~TIMER_MODE_MODE_Msk) |
+    p_reg->MODE = (p_reg->MODE & ~TIMER_MODE_MODE_Msk) |
                     ((mode << TIMER_MODE_MODE_Pos) & TIMER_MODE_MODE_Msk);
 }
 
-__STATIC_INLINE nrf_timer_mode_t nrf_timer_mode_get(NRF_TIMER_Type * p_timer)
+__STATIC_INLINE nrf_timer_mode_t nrf_timer_mode_get(NRF_TIMER_Type * p_reg)
 {
-    return (nrf_timer_mode_t)(p_timer->MODE);
+    return (nrf_timer_mode_t)(p_reg->MODE);
 }
 
-__STATIC_INLINE void nrf_timer_bit_width_set(NRF_TIMER_Type * p_timer,
+__STATIC_INLINE void nrf_timer_bit_width_set(NRF_TIMER_Type * p_reg,
                                              nrf_timer_bit_width_t bit_width)
 {
-    p_timer->BITMODE = (p_timer->BITMODE & ~TIMER_BITMODE_BITMODE_Msk) |
+    p_reg->BITMODE = (p_reg->BITMODE & ~TIMER_BITMODE_BITMODE_Msk) |
                        ((bit_width << TIMER_BITMODE_BITMODE_Pos) &
                             TIMER_BITMODE_BITMODE_Msk);
 }
 
-__STATIC_INLINE nrf_timer_bit_width_t nrf_timer_bit_width_get(NRF_TIMER_Type * p_timer)
+__STATIC_INLINE nrf_timer_bit_width_t nrf_timer_bit_width_get(NRF_TIMER_Type * p_reg)
 {
-    return (nrf_timer_bit_width_t)(p_timer->BITMODE);
+    return (nrf_timer_bit_width_t)(p_reg->BITMODE);
 }
 
-__STATIC_INLINE void nrf_timer_frequency_set(NRF_TIMER_Type * p_timer,
+__STATIC_INLINE void nrf_timer_frequency_set(NRF_TIMER_Type * p_reg,
                                              nrf_timer_frequency_t frequency)
 {
-    p_timer->PRESCALER = (p_timer->PRESCALER & ~TIMER_PRESCALER_PRESCALER_Msk) |
+    p_reg->PRESCALER = (p_reg->PRESCALER & ~TIMER_PRESCALER_PRESCALER_Msk) |
                          ((frequency << TIMER_PRESCALER_PRESCALER_Pos) &
                               TIMER_PRESCALER_PRESCALER_Msk);
 }
 
-__STATIC_INLINE nrf_timer_frequency_t nrf_timer_frequency_get(NRF_TIMER_Type * p_timer)
+__STATIC_INLINE nrf_timer_frequency_t nrf_timer_frequency_get(NRF_TIMER_Type * p_reg)
 {
-    return (nrf_timer_frequency_t)(p_timer->PRESCALER);
+    return (nrf_timer_frequency_t)(p_reg->PRESCALER);
 }
 
-__STATIC_INLINE void nrf_timer_cc_write(NRF_TIMER_Type * p_timer,
+__STATIC_INLINE void nrf_timer_cc_write(NRF_TIMER_Type * p_reg,
                                         nrf_timer_cc_channel_t cc_channel,
                                         uint32_t               cc_value)
 {
-    p_timer->CC[cc_channel] = cc_value;
+    p_reg->CC[cc_channel] = cc_value;
 }
 
-__STATIC_INLINE uint32_t nrf_timer_cc_read(NRF_TIMER_Type * p_timer,
+__STATIC_INLINE uint32_t nrf_timer_cc_read(NRF_TIMER_Type * p_reg,
                                            nrf_timer_cc_channel_t cc_channel)
 {
-    return (uint32_t)p_timer->CC[cc_channel];
+    return (uint32_t)p_reg->CC[cc_channel];
 }
 
 __STATIC_INLINE nrf_timer_task_t nrf_timer_capture_task_get(uint32_t channel)
@@ -571,6 +620,11 @@ __STATIC_INLINE uint32_t nrf_timer_ms_to_ticks(uint32_t time_ms,
 
 #endif // SUPPRESS_INLINE_IMPLEMENTATION
 
+
+#ifdef __cplusplus
+}
+#endif
+
 #endif // NRF_TIMER_H__
 
 /** @} */

nRF5_SDK_11.0.0_89a8197/components/drivers_nrf/hal/nrf_twi.h

@@ -1,22 +1,49 @@
-/* Copyright (c) 2015 Nordic Semiconductor. All Rights Reserved.
+/**
+ * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
  * 
- * The information contained herein is property of Nordic Semiconductor ASA.
+ * All rights reserved.
- * Terms and conditions of usage are described in detail in NORDIC
- * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
  * 
- * Licensees are granted free, non-transferable use of the information. NO
+ * Redistribution and use in source and binary forms, with or without modification,
- * WARRANTY of ANY KIND is provided. This heading must NOT be removed from
+ * are permitted provided that the following conditions are met:
- * the file.
+ * 
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ *    list of conditions and the following disclaimer.
+ * 
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ *    Semiconductor ASA integrated circuit in a product or a software update for
+ *    such product, must reproduce the above copyright notice, this list of
+ *    conditions and the following disclaimer in the documentation and/or other
+ *    materials provided with the distribution.
+ * 
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ *    contributors may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ * 
+ * 4. This software, with or without modification, must only be used with a
+ *    Nordic Semiconductor ASA integrated circuit.
+ * 
+ * 5. Any software provided in binary form under this license must not be reverse
+ *    engineered, decompiled, modified and/or disassembled.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  * 
  */
-
 #ifndef NRF_TWI_H__
 #define NRF_TWI_H__
 
 /**
  * @defgroup nrf_twi_hal TWI HAL
  * @{
- * @ingroup nrf_twi_master
+ * @ingroup nrf_twi
  *
  * @brief Hardware access layer for managing the TWI peripheral.
  */
@@ -25,8 +52,13 @@
 #include <stddef.h>
 #include <stdbool.h>
 
+#include "nrf_peripherals.h"
 #include "nrf.h"
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 /**
  * @brief TWI tasks.
  */
@@ -104,136 +136,136 @@ typedef enum
 /**
  * @brief Function for activating a specific TWI task.
  *
- * @param[in] p_twi TWI instance.
+ * @param[in] p_reg Pointer to the peripheral registers structure.
  * @param[in] task  Task to activate.
  */
-__STATIC_INLINE void nrf_twi_task_trigger(NRF_TWI_Type * p_twi,
+__STATIC_INLINE void nrf_twi_task_trigger(NRF_TWI_Type * p_reg,
                                           nrf_twi_task_t task);
 
 /**
  * @brief Function for getting the address of a specific TWI task register.
  *
- * @param[in] p_twi TWI instance.
+ * @param[in] p_reg Pointer to the peripheral registers structure.
  * @param[in] task  Requested task.
  *
  * @return Address of the specified task register.
  */
-__STATIC_INLINE uint32_t * nrf_twi_task_address_get(NRF_TWI_Type * p_twi,
+__STATIC_INLINE uint32_t * nrf_twi_task_address_get(NRF_TWI_Type * p_reg,
                                                     nrf_twi_task_t task);
 
 /**
  * @brief Function for clearing a specific TWI event.
  *
- * @param[in] p_twi TWI instance.
+ * @param[in] p_reg Pointer to the peripheral registers structure.
  * @param[in] event Event to clear.
  */
-__STATIC_INLINE void nrf_twi_event_clear(NRF_TWI_Type * p_twi,
+__STATIC_INLINE void nrf_twi_event_clear(NRF_TWI_Type * p_reg,
                                          nrf_twi_event_t event);
 
 /**
  * @brief Function for checking the state of a specific event.
  *
- * @param[in] p_twi TWI instance.
+ * @param[in] p_reg Pointer to the peripheral registers structure.
  * @param[in] event Event to check.
  *
  * @retval true If the event is set.
  * @retval false If the event is not set.
  */
-__STATIC_INLINE bool nrf_twi_event_check(NRF_TWI_Type  * p_twi,
+__STATIC_INLINE bool nrf_twi_event_check(NRF_TWI_Type  * p_reg,
                                          nrf_twi_event_t event);
 
 /**
  * @brief Function for getting the address of a specific TWI event register.
  *
- * @param[in] p_twi TWI instance.
+ * @param[in] p_reg Pointer to the peripheral registers structure.
  * @param[in] event Requested event.
  *
  * @return Address of the specified event register.
  */
-__STATIC_INLINE uint32_t * nrf_twi_event_address_get(NRF_TWI_Type  * p_twi,
+__STATIC_INLINE uint32_t * nrf_twi_event_address_get(NRF_TWI_Type  * p_reg,
                                                      nrf_twi_event_t event);
 
 /**
  * @brief Function for enabling specified shortcuts.
  *
- * @param[in] p_twi       TWI instance.
+ * @param[in] p_reg       Pointer to the peripheral registers structure.
  * @param[in] shorts_mask Shortcuts to enable.
  */
-__STATIC_INLINE void nrf_twi_shorts_enable(NRF_TWI_Type * p_twi,
+__STATIC_INLINE void nrf_twi_shorts_enable(NRF_TWI_Type * p_reg,
                                            uint32_t shorts_mask);
 
 /**
  * @brief Function for disabling specified shortcuts.
  *
- * @param[in] p_twi       TWI instance.
+ * @param[in] p_reg       Pointer to the peripheral registers structure.
  * @param[in] shorts_mask Shortcuts to disable.
  */
-__STATIC_INLINE void nrf_twi_shorts_disable(NRF_TWI_Type * p_twi,
+__STATIC_INLINE void nrf_twi_shorts_disable(NRF_TWI_Type * p_reg,
                                             uint32_t shorts_mask);
 
 /**
  * @brief Function for enabling specified interrupts.
  *
- * @param[in] p_twi    TWI instance.
+ * @param[in] p_reg    Pointer to the peripheral registers structure.
  * @param[in] int_mask Interrupts to enable.
  */
-__STATIC_INLINE void nrf_twi_int_enable(NRF_TWI_Type * p_twi,
+__STATIC_INLINE void nrf_twi_int_enable(NRF_TWI_Type * p_reg,
                                         uint32_t int_mask);
 
 /**
  * @brief Function for disabling specified interrupts.
  *
- * @param[in] p_twi   TWI instance.
+ * @param[in] p_reg    Pointer to the peripheral registers structure.
  * @param[in] int_mask Interrupts to disable.
  */
-__STATIC_INLINE void nrf_twi_int_disable(NRF_TWI_Type * p_twi,
+__STATIC_INLINE void nrf_twi_int_disable(NRF_TWI_Type * p_reg,
                                          uint32_t int_mask);
 
 /**
  * @brief Function for retrieving the state of a given interrupt.
  *
- * @param[in] p_twi    TWI instance.
+ * @param[in] p_reg    Pointer to the peripheral registers structure.
  * @param[in] int_mask Interrupt to check.
  *
  * @retval true  If the interrupt is enabled.
  * @retval false If the interrupt is not enabled.
  */
-__STATIC_INLINE bool nrf_twi_int_enable_check(NRF_TWI_Type * p_twi,
+__STATIC_INLINE bool nrf_twi_int_enable_check(NRF_TWI_Type * p_reg,
                                               nrf_twi_int_mask_t int_mask);
 
 /**
  * @brief Function for enabling the TWI peripheral.
  *
- * @param[in] p_twi TWI instance.
+ * @param[in] p_reg Pointer to the peripheral registers structure.
  */
-__STATIC_INLINE void nrf_twi_enable(NRF_TWI_Type * p_twi);
+__STATIC_INLINE void nrf_twi_enable(NRF_TWI_Type * p_reg);
 
 /**
  * @brief Function for disabling the TWI peripheral.
  *
- * @param[in] p_twi TWI instance.
+ * @param[in] p_reg Pointer to the peripheral registers structure.
  */
-__STATIC_INLINE void nrf_twi_disable(NRF_TWI_Type * p_twi);
+__STATIC_INLINE void nrf_twi_disable(NRF_TWI_Type * p_reg);
 
 /**
  * @brief Function for configuring TWI pins.
  *
  *
- * @param[in] p_twi   TWI instance.
+ * @param[in] p_reg   Pointer to the peripheral registers structure.
  * @param[in] scl_pin SCL pin number.
  * @param[in] sda_pin SDA pin number.
  */
-__STATIC_INLINE void nrf_twi_pins_set(NRF_TWI_Type * p_twi,
+__STATIC_INLINE void nrf_twi_pins_set(NRF_TWI_Type * p_reg,
                                       uint32_t scl_pin,
                                       uint32_t sda_pin);
 
 /**
  * @brief Function for setting the TWI master clock frequency.
  *
- * @param[in] p_twi     TWI instance.
+ * @param[in] p_reg     Pointer to the peripheral registers structure.
  * @param[in] frequency TWI frequency.
  */
-__STATIC_INLINE void nrf_twi_frequency_set(NRF_TWI_Type * p_twi,
+__STATIC_INLINE void nrf_twi_frequency_set(NRF_TWI_Type * p_reg,
                                            nrf_twi_frequency_t frequency);
 
 /**
@@ -241,38 +273,38 @@ __STATIC_INLINE void nrf_twi_frequency_set(NRF_TWI_Type * p_twi,
  *
  * The error flags are cleared after reading.
  *
- * @param[in] p_twi TWI instance.
+ * @param[in] p_reg Pointer to the peripheral registers structure.
  *
  * @return Mask with error source flags.
  */
-__STATIC_INLINE uint32_t nrf_twi_errorsrc_get_and_clear(NRF_TWI_Type * p_twi);
+__STATIC_INLINE uint32_t nrf_twi_errorsrc_get_and_clear(NRF_TWI_Type * p_reg);
 
 /**
  * @brief Function for setting the address to be used in TWI transfers.
  *
- * @param[in] p_twi   TWI instance.
+ * @param[in] p_reg   Pointer to the peripheral registers structure.
  * @param[in] address Address to be used in transfers.
  */
-__STATIC_INLINE void nrf_twi_address_set(NRF_TWI_Type * p_twi, uint8_t address);
+__STATIC_INLINE void nrf_twi_address_set(NRF_TWI_Type * p_reg, uint8_t address);
 
 /**
  * @brief Function for reading data received by TWI.
  *
- * @param[in] p_twi TWI instance.
+ * @param[in] p_reg Pointer to the peripheral registers structure.
  *
  * @return Received data.
  */
-__STATIC_INLINE uint8_t nrf_twi_rxd_get(NRF_TWI_Type * p_twi);
+__STATIC_INLINE uint8_t nrf_twi_rxd_get(NRF_TWI_Type * p_reg);
 
 /**
  * @brief Function for writing data to be transmitted by TWI.
  *
- * @param[in] p_twi TWI instance.
+ * @param[in] p_reg Pointer to the peripheral registers structure.
  * @param[in] data  Data to be transmitted.
  */
-__STATIC_INLINE void nrf_twi_txd_set(NRF_TWI_Type * p_twi, uint8_t data);
+__STATIC_INLINE void nrf_twi_txd_set(NRF_TWI_Type * p_reg, uint8_t data);
 
-__STATIC_INLINE void nrf_twi_shorts_set(NRF_TWI_Type * p_twi,
+__STATIC_INLINE void nrf_twi_shorts_set(NRF_TWI_Type * p_reg,
                                         uint32_t shorts_mask);
 
 /**
@@ -282,121 +314,139 @@ __STATIC_INLINE void nrf_twi_shorts_set(NRF_TWI_Type * p_twi,
 
 #ifndef SUPPRESS_INLINE_IMPLEMENTATION
 
-__STATIC_INLINE void nrf_twi_task_trigger(NRF_TWI_Type * p_twi,
+__STATIC_INLINE void nrf_twi_task_trigger(NRF_TWI_Type * p_reg,
                                           nrf_twi_task_t task)
 {
-    *((volatile uint32_t *)((uint8_t *)p_twi + (uint32_t)task)) = 0x1UL;
+    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)task)) = 0x1UL;
 }
 
-__STATIC_INLINE uint32_t * nrf_twi_task_address_get(NRF_TWI_Type * p_twi,
+__STATIC_INLINE uint32_t * nrf_twi_task_address_get(NRF_TWI_Type * p_reg,
                                                     nrf_twi_task_t task)
 {
-    return (uint32_t *)((uint8_t *)p_twi + (uint32_t)task);
+    return (uint32_t *)((uint8_t *)p_reg + (uint32_t)task);
 }
 
-__STATIC_INLINE void nrf_twi_event_clear(NRF_TWI_Type  * p_twi,
+__STATIC_INLINE void nrf_twi_event_clear(NRF_TWI_Type  * p_reg,
                                          nrf_twi_event_t event)
 {
-    *((volatile uint32_t *)((uint8_t *)p_twi + (uint32_t)event)) = 0x0UL;
+    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL;
+#if __CORTEX_M == 0x04
+    volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event));
+    (void)dummy;
+#endif
 }
 
-__STATIC_INLINE bool nrf_twi_event_check(NRF_TWI_Type  * p_twi,
+__STATIC_INLINE bool nrf_twi_event_check(NRF_TWI_Type  * p_reg,
                                          nrf_twi_event_t event)
 {
-    return (bool)*(volatile uint32_t *)((uint8_t *)p_twi + (uint32_t)event);
+    return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event);
 }
 
-__STATIC_INLINE uint32_t * nrf_twi_event_address_get(NRF_TWI_Type  * p_twi,
+__STATIC_INLINE uint32_t * nrf_twi_event_address_get(NRF_TWI_Type  * p_reg,
                                                      nrf_twi_event_t event)
 {
-    return (uint32_t *)((uint8_t *)p_twi + (uint32_t)event);
+    return (uint32_t *)((uint8_t *)p_reg + (uint32_t)event);
 }
 
-__STATIC_INLINE void nrf_twi_shorts_enable(NRF_TWI_Type * p_twi,
+__STATIC_INLINE void nrf_twi_shorts_enable(NRF_TWI_Type * p_reg,
                                            uint32_t shorts_mask)
 {
-    p_twi->SHORTS |= shorts_mask;
+    p_reg->SHORTS |= shorts_mask;
 }
 
-__STATIC_INLINE void nrf_twi_shorts_disable(NRF_TWI_Type * p_twi,
+__STATIC_INLINE void nrf_twi_shorts_disable(NRF_TWI_Type * p_reg,
                                             uint32_t shorts_mask)
 {
-    p_twi->SHORTS &= ~(shorts_mask);
+    p_reg->SHORTS &= ~(shorts_mask);
 }
 
-__STATIC_INLINE void nrf_twi_int_enable(NRF_TWI_Type * p_twi,
+__STATIC_INLINE void nrf_twi_int_enable(NRF_TWI_Type * p_reg,
                                         uint32_t int_mask)
 {
-    p_twi->INTENSET = int_mask;
+    p_reg->INTENSET = int_mask;
 }
 
-__STATIC_INLINE void nrf_twi_int_disable(NRF_TWI_Type * p_twi,
+__STATIC_INLINE void nrf_twi_int_disable(NRF_TWI_Type * p_reg,
                                          uint32_t int_mask)
 {
-    p_twi->INTENCLR = int_mask;
+    p_reg->INTENCLR = int_mask;
 }
 
-__STATIC_INLINE bool nrf_twi_int_enable_check(NRF_TWI_Type * p_twi,
+__STATIC_INLINE bool nrf_twi_int_enable_check(NRF_TWI_Type * p_reg,
                                               nrf_twi_int_mask_t int_mask)
 {
-    return (bool)(p_twi->INTENSET & int_mask);
+    return (bool)(p_reg->INTENSET & int_mask);
 }
 
-__STATIC_INLINE void nrf_twi_enable(NRF_TWI_Type * p_twi)
+__STATIC_INLINE void nrf_twi_enable(NRF_TWI_Type * p_reg)
 {
-    p_twi->ENABLE = (TWI_ENABLE_ENABLE_Enabled << TWI_ENABLE_ENABLE_Pos);
+    p_reg->ENABLE = (TWI_ENABLE_ENABLE_Enabled << TWI_ENABLE_ENABLE_Pos);
 }
 
-__STATIC_INLINE void nrf_twi_disable(NRF_TWI_Type * p_twi)
+__STATIC_INLINE void nrf_twi_disable(NRF_TWI_Type * p_reg)
 {
-    p_twi->ENABLE = (TWI_ENABLE_ENABLE_Disabled << TWI_ENABLE_ENABLE_Pos);
+    p_reg->ENABLE = (TWI_ENABLE_ENABLE_Disabled << TWI_ENABLE_ENABLE_Pos);
 }
 
-__STATIC_INLINE void nrf_twi_pins_set(NRF_TWI_Type * p_twi,
+__STATIC_INLINE void nrf_twi_pins_set(NRF_TWI_Type * p_reg,
                                       uint32_t scl_pin,
                                       uint32_t sda_pin)
 {
-    p_twi->PSELSCL = scl_pin;
+#if defined(TWI_PSEL_SCL_CONNECT_Pos)
-    p_twi->PSELSDA = sda_pin;
+    p_reg->PSEL.SCL = scl_pin;
+#else
+    p_reg->PSELSCL = scl_pin;
+#endif
+
+#if defined(TWI_PSEL_SDA_CONNECT_Pos)
+    p_reg->PSEL.SDA = sda_pin;
+#else
+    p_reg->PSELSDA = sda_pin;
+#endif
 }
 
-__STATIC_INLINE void nrf_twi_frequency_set(NRF_TWI_Type * p_twi,
+__STATIC_INLINE void nrf_twi_frequency_set(NRF_TWI_Type * p_reg,
                                            nrf_twi_frequency_t frequency)
 {
-    p_twi->FREQUENCY = frequency;
+    p_reg->FREQUENCY = frequency;
 }
 
-__STATIC_INLINE uint32_t nrf_twi_errorsrc_get_and_clear(NRF_TWI_Type * p_twi)
+__STATIC_INLINE uint32_t nrf_twi_errorsrc_get_and_clear(NRF_TWI_Type * p_reg)
 {
-    uint32_t error_source = p_twi->ERRORSRC;
+    uint32_t error_source = p_reg->ERRORSRC;
 
     // [error flags are cleared by writing '1' on their position]
-    p_twi->ERRORSRC = error_source;
+    p_reg->ERRORSRC = error_source;
 
     return error_source;
 }
 
-__STATIC_INLINE void nrf_twi_address_set(NRF_TWI_Type * p_twi, uint8_t address)
+__STATIC_INLINE void nrf_twi_address_set(NRF_TWI_Type * p_reg, uint8_t address)
 {
-    p_twi->ADDRESS = address;
+    p_reg->ADDRESS = address;
 }
 
-__STATIC_INLINE uint8_t nrf_twi_rxd_get(NRF_TWI_Type * p_twi)
+__STATIC_INLINE uint8_t nrf_twi_rxd_get(NRF_TWI_Type * p_reg)
 {
-    return (uint8_t)p_twi->RXD;
+    return (uint8_t)p_reg->RXD;
 }
 
-__STATIC_INLINE void nrf_twi_txd_set(NRF_TWI_Type * p_twi, uint8_t data)
+__STATIC_INLINE void nrf_twi_txd_set(NRF_TWI_Type * p_reg, uint8_t data)
 {
-    p_twi->TXD = data;
+    p_reg->TXD = data;
 }
 
-__STATIC_INLINE void nrf_twi_shorts_set(NRF_TWI_Type * p_twi,
+__STATIC_INLINE void nrf_twi_shorts_set(NRF_TWI_Type * p_reg,
                                         uint32_t shorts_mask)
 {
-    p_twi->SHORTS = shorts_mask;
+    p_reg->SHORTS = shorts_mask;
 }
 
 #endif // SUPPRESS_INLINE_IMPLEMENTATION
 
+
+#ifdef __cplusplus
+}
+#endif
+
 #endif // NRF_TWI_H__

nRF5_SDK_11.0.0_89a8197/components/drivers_nrf/hal/nrf_twim.h

@@ -1,22 +1,49 @@
-/* Copyright (c) 2015 Nordic Semiconductor. All Rights Reserved.
+/**
+ * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
  * 
- * The information contained herein is property of Nordic Semiconductor ASA.
+ * All rights reserved.
- * Terms and conditions of usage are described in detail in NORDIC
- * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
  * 
- * Licensees are granted free, non-transferable use of the information. NO
+ * Redistribution and use in source and binary forms, with or without modification,
- * WARRANTY of ANY KIND is provided. This heading must NOT be removed from
+ * are permitted provided that the following conditions are met:
- * the file.
+ * 
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ *    list of conditions and the following disclaimer.
+ * 
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ *    Semiconductor ASA integrated circuit in a product or a software update for
+ *    such product, must reproduce the above copyright notice, this list of
+ *    conditions and the following disclaimer in the documentation and/or other
+ *    materials provided with the distribution.
+ * 
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ *    contributors may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ * 
+ * 4. This software, with or without modification, must only be used with a
+ *    Nordic Semiconductor ASA integrated circuit.
+ * 
+ * 5. Any software provided in binary form under this license must not be reverse
+ *    engineered, decompiled, modified and/or disassembled.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  * 
  */
-
 #ifndef NRF_TWIM_H__
 #define NRF_TWIM_H__
 
 /**
  * @defgroup nrf_twim_hal TWIM HAL
  * @{
- * @ingroup nrf_twi_master
+ * @ingroup nrf_twi
  *
  * @brief Hardware access layer for managing the TWIM peripheral.
  */
@@ -27,6 +54,10 @@
 
 #include "nrf.h"
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 /**
  * @brief TWIM tasks.
  */
@@ -90,7 +121,12 @@ typedef enum
 {
     NRF_TWIM_FREQ_100K = TWIM_FREQUENCY_FREQUENCY_K100, ///< 100 kbps.
     NRF_TWIM_FREQ_250K = TWIM_FREQUENCY_FREQUENCY_K250, ///< 250 kbps.
-    NRF_TWIM_FREQ_400K = TWIM_FREQUENCY_FREQUENCY_K400  ///< 400 kbps.
+    NRF_TWIM_FREQ_400K = TWIM_FREQUENCY_FREQUENCY_K400, ///< 400 kbps.
+#ifndef TWI_PRESENT
+    NRF_TWI_FREQ_100K = NRF_TWIM_FREQ_100K,
+    NRF_TWI_FREQ_250K = NRF_TWIM_FREQ_250K,
+    NRF_TWI_FREQ_400K = NRF_TWIM_FREQ_400K,
+#endif
 } nrf_twim_frequency_t;
 
 /**
@@ -99,143 +135,147 @@ typedef enum
 typedef enum
 {
     NRF_TWIM_ERROR_ADDRESS_NACK = TWIM_ERRORSRC_ANACK_Msk, ///< NACK received after sending the address.
-    NRF_TWIM_ERROR_DATA_NACK    = TWIM_ERRORSRC_DNACK_Msk  ///< NACK received after sending a data byte.
+    NRF_TWIM_ERROR_DATA_NACK    = TWIM_ERRORSRC_DNACK_Msk, ///< NACK received after sending a data byte.
+#ifndef TWI_PRESENT
+    NRF_TWI_ERROR_ADDRESS_NACK = NRF_TWIM_ERROR_ADDRESS_NACK,
+    NRF_TWI_ERROR_DATA_NACK    = NRF_TWIM_ERROR_DATA_NACK,
+#endif
 } nrf_twim_error_t;
 
 
 /**
  * @brief Function for activating a specific TWIM task.
  *
- * @param[in] p_twim TWIM instance.
+ * @param[in] p_reg Pointer to the peripheral registers structure.
  * @param[in] task   Task to activate.
  */
-__STATIC_INLINE void nrf_twim_task_trigger(NRF_TWIM_Type * p_twim,
+__STATIC_INLINE void nrf_twim_task_trigger(NRF_TWIM_Type * p_reg,
                                            nrf_twim_task_t task);
 
 /**
  * @brief Function for getting the address of a specific TWIM task register.
  *
- * @param[in] p_twim TWIM instance.
+ * @param[in] p_reg Pointer to the peripheral registers structure.
  * @param[in] task   Requested task.
  *
  * @return Address of the specified task register.
  */
-__STATIC_INLINE uint32_t * nrf_twim_task_address_get(NRF_TWIM_Type * p_twim,
+__STATIC_INLINE uint32_t * nrf_twim_task_address_get(NRF_TWIM_Type * p_reg,
                                                      nrf_twim_task_t task);
 
 /**
  * @brief Function for clearing a specific TWIM event.
  *
- * @param[in] p_twim TWIM instance.
+ * @param[in] p_reg Pointer to the peripheral registers structure.
  * @param[in] event  Event to clear.
  */
-__STATIC_INLINE void nrf_twim_event_clear(NRF_TWIM_Type * p_twim,
+__STATIC_INLINE void nrf_twim_event_clear(NRF_TWIM_Type * p_reg,
                                           nrf_twim_event_t event);
 
 /**
  * @brief Function for checking the state of a specific TWIM event.
  *
- * @param[in] p_twim TWIM instance.
+ * @param[in] p_reg Pointer to the peripheral registers structure.
  * @param[in] event  Event to check.
  *
  * @retval true  If the event is set.
  * @retval false If the event is not set.
  */
-__STATIC_INLINE bool nrf_twim_event_check(NRF_TWIM_Type * p_twim,
+__STATIC_INLINE bool nrf_twim_event_check(NRF_TWIM_Type * p_reg,
                                           nrf_twim_event_t event);
 
 /**
  * @brief Function for getting the address of a specific TWIM event register.
  *
- * @param[in] p_twim TWIM instance.
+ * @param[in] p_reg Pointer to the peripheral registers structure.
  * @param[in] event  Requested event.
  *
  * @return Address of the specified event register.
  */
-__STATIC_INLINE uint32_t * nrf_twim_event_address_get(NRF_TWIM_Type  * p_twim,
+__STATIC_INLINE uint32_t * nrf_twim_event_address_get(NRF_TWIM_Type  * p_reg,
                                                       nrf_twim_event_t event);
 
 /**
  * @brief Function for enabling specified shortcuts.
  *
- * @param[in] p_twim      TWIM instance.
+ * @param[in] p_reg      Pointer to the peripheral registers structure.
  * @param[in] shorts_mask Shortcuts to enable.
  */
-__STATIC_INLINE void nrf_twim_shorts_enable(NRF_TWIM_Type * p_twim,
+__STATIC_INLINE void nrf_twim_shorts_enable(NRF_TWIM_Type * p_reg,
                                             uint32_t shorts_mask);
 
 /**
  * @brief Function for disabling specified shortcuts.
  *
- * @param[in] p_twim      TWIM instance.
+ * @param[in] p_reg      Pointer to the peripheral registers structure.
  * @param[in] shorts_mask Shortcuts to disable.
  */
-__STATIC_INLINE void nrf_twim_shorts_disable(NRF_TWIM_Type * p_twim,
+__STATIC_INLINE void nrf_twim_shorts_disable(NRF_TWIM_Type * p_reg,
                                              uint32_t shorts_mask);
 
 /**
  * @brief Function for enabling specified interrupts.
  *
- * @param[in] p_twim   TWIM instance.
+ * @param[in] p_reg   Pointer to the peripheral registers structure.
  * @param[in] int_mask Interrupts to enable.
  */
-__STATIC_INLINE void nrf_twim_int_enable(NRF_TWIM_Type * p_twim,
+__STATIC_INLINE void nrf_twim_int_enable(NRF_TWIM_Type * p_reg,
                                          uint32_t int_mask);
 
 /**
  * @brief Function for disabling specified interrupts.
  *
- * @param[in] p_twim   TWIM instance.
+ * @param[in] p_reg   Pointer to the peripheral registers structure.
  * @param[in] int_mask Interrupts to disable.
  */
-__STATIC_INLINE void nrf_twim_int_disable(NRF_TWIM_Type * p_twim,
+__STATIC_INLINE void nrf_twim_int_disable(NRF_TWIM_Type * p_reg,
                                           uint32_t int_mask);
 
 /**
  * @brief Function for checking the state of a given interrupt.
  *
- * @param[in] p_twim   TWIM instance.
+ * @param[in] p_reg   Pointer to the peripheral registers structure.
  * @param[in] int_mask Interrupt to check.
  *
  * @retval true  If the interrupt is enabled.
  * @retval false If the interrupt is not enabled.
  */
-__STATIC_INLINE bool nrf_twim_int_enable_check(NRF_TWIM_Type * p_twim,
+__STATIC_INLINE bool nrf_twim_int_enable_check(NRF_TWIM_Type * p_reg,
                                                nrf_twim_int_mask_t int_mask);
 
 /**
  * @brief Function for enabling the TWIM peripheral.
  *
- * @param[in] p_twim TWIM instance.
+ * @param[in] p_reg Pointer to the peripheral registers structure.
  */
-__STATIC_INLINE void nrf_twim_enable(NRF_TWIM_Type * p_twim);
+__STATIC_INLINE void nrf_twim_enable(NRF_TWIM_Type * p_reg);
 
 /**
  * @brief Function for disabling the TWIM peripheral.
  *
- * @param[in] p_twim TWIM instance.
+ * @param[in] p_reg Pointer to the peripheral registers structure.
  */
-__STATIC_INLINE void nrf_twim_disable(NRF_TWIM_Type * p_twim);
+__STATIC_INLINE void nrf_twim_disable(NRF_TWIM_Type * p_reg);
 
 /**
  * @brief Function for configuring TWI pins.
  *
  *
- * @param[in] p_twim  TWIM instance.
+ * @param[in] p_reg  Pointer to the peripheral registers structure.
  * @param[in] scl_pin SCL pin number.
  * @param[in] sda_pin SDA pin number.
  */
-__STATIC_INLINE void nrf_twim_pins_set(NRF_TWIM_Type * p_twim,
+__STATIC_INLINE void nrf_twim_pins_set(NRF_TWIM_Type * p_reg,
                                        uint32_t scl_pin,
                                        uint32_t sda_pin);
 
 /**
  * @brief Function for setting the TWI master clock frequency.
  *
- * @param[in] p_twim    TWIM instance.
+ * @param[in] p_reg    Pointer to the peripheral registers structure.
  * @param[in] frequency TWI frequency.
  */
-__STATIC_INLINE void nrf_twim_frequency_set(NRF_TWIM_Type * p_twim,
+__STATIC_INLINE void nrf_twim_frequency_set(NRF_TWIM_Type * p_reg,
                                             nrf_twim_frequency_t frequency);
 
 /**
@@ -243,77 +283,77 @@ __STATIC_INLINE void nrf_twim_frequency_set(NRF_TWIM_Type * p_twim,
  *
  * The error flags are cleared after reading.
  *
- * @param[in] p_twim TWIM instance.
+ * @param[in] p_reg Pointer to the peripheral registers structure.
  *
  * @return Mask with error source flags.
  */
-__STATIC_INLINE uint32_t nrf_twim_errorsrc_get_and_clear(NRF_TWIM_Type * p_twim);
+__STATIC_INLINE uint32_t nrf_twim_errorsrc_get_and_clear(NRF_TWIM_Type * p_reg);
 
 /**
  * @brief Function for setting the address to be used in TWI transfers.
  *
- * @param[in] p_twim  TWIM instance.
+ * @param[in] p_reg  Pointer to the peripheral registers structure.
  * @param[in] address Address to be used in transfers.
  */
-__STATIC_INLINE void nrf_twim_address_set(NRF_TWIM_Type * p_twim,
+__STATIC_INLINE void nrf_twim_address_set(NRF_TWIM_Type * p_reg,
                                           uint8_t address);
 
 /**
  * @brief Function for setting the transmit buffer.
  *
- * @param[in]  p_twim   TWIM instance.
+ * @param[in]  p_reg   Pointer to the peripheral registers structure.
  * @param[in]  p_buffer Pointer to the buffer with data to send.
  * @param[in]  length   Maximum number of data bytes to transmit.
  */
-__STATIC_INLINE void nrf_twim_tx_buffer_set(NRF_TWIM_Type * p_twim,
+__STATIC_INLINE void nrf_twim_tx_buffer_set(NRF_TWIM_Type * p_reg,
                                             uint8_t const * p_buffer,
                                             uint8_t         length);
 
 /**
  * @brief Function for setting the receive buffer.
  *
- * @param[in] p_twim   TWIM instance.
+ * @param[in] p_reg   Pointer to the peripheral registers structure.
  * @param[in] p_buffer Pointer to the buffer for received data.
  * @param[in] length   Maximum number of data bytes to receive.
  */
-__STATIC_INLINE void nrf_twim_rx_buffer_set(NRF_TWIM_Type * p_twim,
+__STATIC_INLINE void nrf_twim_rx_buffer_set(NRF_TWIM_Type * p_reg,
                                             uint8_t * p_buffer,
                                             uint8_t   length);
 
-__STATIC_INLINE void nrf_twim_shorts_set(NRF_TWIM_Type * p_twim,
+__STATIC_INLINE void nrf_twim_shorts_set(NRF_TWIM_Type * p_reg,
                                          uint32_t shorts_mask);
 
-__STATIC_INLINE uint32_t nrf_twim_txd_amount_get(NRF_TWIM_Type * p_twim);
+__STATIC_INLINE uint32_t nrf_twim_txd_amount_get(NRF_TWIM_Type * p_reg);
 
-__STATIC_INLINE uint32_t nrf_twim_rxd_amount_get(NRF_TWIM_Type * p_twim);
+__STATIC_INLINE uint32_t nrf_twim_rxd_amount_get(NRF_TWIM_Type * p_reg);
 
 /**
  * @brief Function for enabling the TX list feature.
  *
- * @param[in] p_twim TWIM instance.
+ * @param[in] p_reg Pointer to the peripheral registers structure.
  */
-__STATIC_INLINE void nrf_twim_tx_list_enable(NRF_TWIM_Type * p_twim);
+__STATIC_INLINE void nrf_twim_tx_list_enable(NRF_TWIM_Type * p_reg);
 
 /**
  * @brief Function for disabling the TX list feature.
  *
- * @param[in] p_twim TWIM instance.
+ * @param[in] p_reg Pointer to the peripheral registers structure.
  */
-__STATIC_INLINE void nrf_twim_tx_list_disable(NRF_TWIM_Type * p_twim);
+__STATIC_INLINE void nrf_twim_tx_list_disable(NRF_TWIM_Type * p_reg);
 
 /**
  * @brief Function for enabling the RX list feature.
  *
- * @param[in] p_twim TWIM instance.
+ * @param[in] p_reg Pointer to the peripheral registers structure.
  */
-__STATIC_INLINE void nrf_twim_rx_list_enable(NRF_TWIM_Type * p_twim);
+__STATIC_INLINE void nrf_twim_rx_list_enable(NRF_TWIM_Type * p_reg);
 
 /**
  * @brief Function for disabling the RX list feature.
  *
- * @param[in] p_twim TWIM instance.
+ * @param[in] p_reg Pointer to the peripheral registers structure.
  */
-__STATIC_INLINE void nrf_twim_rx_list_disable(NRF_TWIM_Type * p_twim);
+__STATIC_INLINE void nrf_twim_rx_list_disable(NRF_TWIM_Type * p_reg);
 
 /**
  * @}
@@ -322,157 +362,166 @@ __STATIC_INLINE void nrf_twim_rx_list_disable(NRF_TWIM_Type * p_twim);
 
 #ifndef SUPPRESS_INLINE_IMPLEMENTATION
 
-__STATIC_INLINE void nrf_twim_task_trigger(NRF_TWIM_Type * p_twim,
+__STATIC_INLINE void nrf_twim_task_trigger(NRF_TWIM_Type * p_reg,
                                            nrf_twim_task_t task)
 {
-    *((volatile uint32_t *)((uint8_t *)p_twim + (uint32_t)task)) = 0x1UL;
+    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)task)) = 0x1UL;
 }
 
-__STATIC_INLINE uint32_t * nrf_twim_task_address_get(NRF_TWIM_Type * p_twim,
+__STATIC_INLINE uint32_t * nrf_twim_task_address_get(NRF_TWIM_Type * p_reg,
                                                      nrf_twim_task_t task)
 {
-    return (uint32_t *)((uint8_t *)p_twim + (uint32_t)task);
+    return (uint32_t *)((uint8_t *)p_reg + (uint32_t)task);
 }
 
-__STATIC_INLINE void nrf_twim_event_clear(NRF_TWIM_Type * p_twim,
+__STATIC_INLINE void nrf_twim_event_clear(NRF_TWIM_Type * p_reg,
                                           nrf_twim_event_t event)
 {
-    *((volatile uint32_t *)((uint8_t *)p_twim + (uint32_t)event)) = 0x0UL;
+    *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL;
+#if __CORTEX_M == 0x04
+    volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event));
+    (void)dummy;
+#endif
 }
 
-__STATIC_INLINE bool nrf_twim_event_check(NRF_TWIM_Type * p_twim,
+__STATIC_INLINE bool nrf_twim_event_check(NRF_TWIM_Type * p_reg,
                                           nrf_twim_event_t event)
 {
-    return (bool)*(volatile uint32_t *)((uint8_t *)p_twim + (uint32_t)event);
+    return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event);
 }
 
-__STATIC_INLINE uint32_t * nrf_twim_event_address_get(NRF_TWIM_Type  * p_twim,
+__STATIC_INLINE uint32_t * nrf_twim_event_address_get(NRF_TWIM_Type  * p_reg,
                                                       nrf_twim_event_t event)
 {
-    return (uint32_t *)((uint8_t *)p_twim + (uint32_t)event);
+    return (uint32_t *)((uint8_t *)p_reg + (uint32_t)event);
 }
 
-__STATIC_INLINE void nrf_twim_shorts_enable(NRF_TWIM_Type * p_twim,
+__STATIC_INLINE void nrf_twim_shorts_enable(NRF_TWIM_Type * p_reg,
                                             uint32_t shorts_mask)
 {
-    p_twim->SHORTS |= shorts_mask;
+    p_reg->SHORTS |= shorts_mask;
 }
 
-__STATIC_INLINE void nrf_twim_shorts_disable(NRF_TWIM_Type * p_twim,
+__STATIC_INLINE void nrf_twim_shorts_disable(NRF_TWIM_Type * p_reg,
                                              uint32_t shorts_mask)
 {
-    p_twim->SHORTS &= ~(shorts_mask);
+    p_reg->SHORTS &= ~(shorts_mask);
 }
 
-__STATIC_INLINE void nrf_twim_int_enable(NRF_TWIM_Type * p_twim,
+__STATIC_INLINE void nrf_twim_int_enable(NRF_TWIM_Type * p_reg,
                                          uint32_t int_mask)
 {
-    p_twim->INTENSET = int_mask;
+    p_reg->INTENSET = int_mask;
 }
 
-__STATIC_INLINE void nrf_twim_int_disable(NRF_TWIM_Type * p_twim,
+__STATIC_INLINE void nrf_twim_int_disable(NRF_TWIM_Type * p_reg,
                                           uint32_t int_mask)
 {
-    p_twim->INTENCLR = int_mask;
+    p_reg->INTENCLR = int_mask;
 }
 
-__STATIC_INLINE bool nrf_twim_int_enable_check(NRF_TWIM_Type * p_twim,
+__STATIC_INLINE bool nrf_twim_int_enable_check(NRF_TWIM_Type * p_reg,
                                                nrf_twim_int_mask_t int_mask)
 {
-    return (bool)(p_twim->INTENSET & int_mask);
+    return (bool)(p_reg->INTENSET & int_mask);
 }
 
-__STATIC_INLINE void nrf_twim_enable(NRF_TWIM_Type * p_twim)
+__STATIC_INLINE void nrf_twim_enable(NRF_TWIM_Type * p_reg)
 {
-    p_twim->ENABLE = (TWIM_ENABLE_ENABLE_Enabled << TWIM_ENABLE_ENABLE_Pos);
+    p_reg->ENABLE = (TWIM_ENABLE_ENABLE_Enabled << TWIM_ENABLE_ENABLE_Pos);
 }
 
-__STATIC_INLINE void nrf_twim_disable(NRF_TWIM_Type * p_twim)
+__STATIC_INLINE void nrf_twim_disable(NRF_TWIM_Type * p_reg)
 {
-    p_twim->ENABLE = (TWIM_ENABLE_ENABLE_Disabled << TWIM_ENABLE_ENABLE_Pos);
+    p_reg->ENABLE = (TWIM_ENABLE_ENABLE_Disabled << TWIM_ENABLE_ENABLE_Pos);
 }
 
-__STATIC_INLINE void nrf_twim_pins_set(NRF_TWIM_Type * p_twim,
+__STATIC_INLINE void nrf_twim_pins_set(NRF_TWIM_Type * p_reg,
                                        uint32_t scl_pin,
                                        uint32_t sda_pin)
 {
-    p_twim->PSEL.SCL = scl_pin;
+    p_reg->PSEL.SCL = scl_pin;
-    p_twim->PSEL.SDA = sda_pin;
+    p_reg->PSEL.SDA = sda_pin;
 }
 
-__STATIC_INLINE void nrf_twim_frequency_set(NRF_TWIM_Type * p_twim,
+__STATIC_INLINE void nrf_twim_frequency_set(NRF_TWIM_Type * p_reg,
                                             nrf_twim_frequency_t frequency)
 {
-    p_twim->FREQUENCY = frequency;
+    p_reg->FREQUENCY = frequency;
 }
 
-__STATIC_INLINE uint32_t nrf_twim_errorsrc_get_and_clear(NRF_TWIM_Type * p_twim)
+__STATIC_INLINE uint32_t nrf_twim_errorsrc_get_and_clear(NRF_TWIM_Type * p_reg)
 {
-    uint32_t error_source = p_twim->ERRORSRC;
+    uint32_t error_source = p_reg->ERRORSRC;
 
     // [error flags are cleared by writing '1' on their position]
-    p_twim->ERRORSRC = error_source;
+    p_reg->ERRORSRC = error_source;
 
     return error_source;
 }
 
-__STATIC_INLINE void nrf_twim_address_set(NRF_TWIM_Type * p_twim,
+__STATIC_INLINE void nrf_twim_address_set(NRF_TWIM_Type * p_reg,
                                           uint8_t address)
 {
-    p_twim->ADDRESS = address;
+    p_reg->ADDRESS = address;
 }
 
-__STATIC_INLINE void nrf_twim_tx_buffer_set(NRF_TWIM_Type * p_twim,
+__STATIC_INLINE void nrf_twim_tx_buffer_set(NRF_TWIM_Type * p_reg,
                                             uint8_t const * p_buffer,
                                             uint8_t         length)
 {
-    p_twim->TXD.PTR    = (uint32_t)p_buffer;
+    p_reg->TXD.PTR    = (uint32_t)p_buffer;
-    p_twim->TXD.MAXCNT = length;
+    p_reg->TXD.MAXCNT = length;
 }
 
-__STATIC_INLINE void nrf_twim_rx_buffer_set(NRF_TWIM_Type * p_twim,
+__STATIC_INLINE void nrf_twim_rx_buffer_set(NRF_TWIM_Type * p_reg,
                                             uint8_t * p_buffer,
                                             uint8_t   length)
 {
-    p_twim->RXD.PTR    = (uint32_t)p_buffer;
+    p_reg->RXD.PTR    = (uint32_t)p_buffer;
-    p_twim->RXD.MAXCNT = length;
+    p_reg->RXD.MAXCNT = length;
 }
 
-__STATIC_INLINE void nrf_twim_shorts_set(NRF_TWIM_Type * p_twim,
+__STATIC_INLINE void nrf_twim_shorts_set(NRF_TWIM_Type * p_reg,
                                          uint32_t shorts_mask)
 {
-    p_twim->SHORTS = shorts_mask;
+    p_reg->SHORTS = shorts_mask;
 }
 
-__STATIC_INLINE uint32_t nrf_twim_txd_amount_get(NRF_TWIM_Type * p_twim)
+__STATIC_INLINE uint32_t nrf_twim_txd_amount_get(NRF_TWIM_Type * p_reg)
 {
-    return p_twim->TXD.AMOUNT;
+    return p_reg->TXD.AMOUNT;
 }
 
-__STATIC_INLINE uint32_t nrf_twim_rxd_amount_get(NRF_TWIM_Type * p_twim)
+__STATIC_INLINE uint32_t nrf_twim_rxd_amount_get(NRF_TWIM_Type * p_reg)
 {
-    return p_twim->RXD.AMOUNT;
+    return p_reg->RXD.AMOUNT;
 }
 
-__STATIC_INLINE void nrf_twim_tx_list_enable(NRF_TWIM_Type * p_twim)
+__STATIC_INLINE void nrf_twim_tx_list_enable(NRF_TWIM_Type * p_reg)
 {
-    p_twim->TXD.LIST = 1;
+    p_reg->TXD.LIST = 1;
 }
 
-__STATIC_INLINE void nrf_twim_tx_list_disable(NRF_TWIM_Type * p_twim)
+__STATIC_INLINE void nrf_twim_tx_list_disable(NRF_TWIM_Type * p_reg)
 {
-    p_twim->TXD.LIST = 0;
+    p_reg->TXD.LIST = 0;
 }
 
-__STATIC_INLINE void nrf_twim_rx_list_enable(NRF_TWIM_Type * p_twim)
+__STATIC_INLINE void nrf_twim_rx_list_enable(NRF_TWIM_Type * p_reg)
 {
-    p_twim->RXD.LIST = 1;
+    p_reg->RXD.LIST = 1;
 }
 
-__STATIC_INLINE void nrf_twim_rx_list_disable(NRF_TWIM_Type * p_twim)
+__STATIC_INLINE void nrf_twim_rx_list_disable(NRF_TWIM_Type * p_reg)
 {
-    p_twim->RXD.LIST = 0;
+    p_reg->RXD.LIST = 0;
 }
 #endif // SUPPRESS_INLINE_IMPLEMENTATION
 
+
+#ifdef __cplusplus
+}
+#endif
+
 #endif // NRF_TWIM_H__

nRF5_SDK_11.0.0_89a8197/components/drivers_nrf/hal/nrf_twis.h

@@ -1,15 +1,42 @@
-/* Copyright (c) 2015 Nordic Semiconductor. All Rights Reserved.
+/**
+ * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
  * 
- * The information contained herein is property of Nordic Semiconductor ASA.
+ * All rights reserved.
- * Terms and conditions of usage are described in detail in NORDIC
- * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
  * 
- * Licensees are granted free, non-transferable use of the information. NO
+ * Redistribution and use in source and binary forms, with or without modification,
- * WARRANTY of ANY KIND is provided. This heading must NOT be removed from
+ * are permitted provided that the following conditions are met:
- * the file.
+ * 
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ *    list of conditions and the following disclaimer.
+ * 
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ *    Semiconductor ASA integrated circuit in a product or a software update for
+ *    such product, must reproduce the above copyright notice, this list of
+ *    conditions and the following disclaimer in the documentation and/or other
+ *    materials provided with the distribution.
+ * 
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ *    contributors may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ * 
+ * 4. This software, with or without modification, must only be used with a
+ *    Nordic Semiconductor ASA integrated circuit.
+ * 
+ * 5. Any software provided in binary form under this license must not be reverse
+ *    engineered, decompiled, modified and/or disassembled.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  * 
  */
-
 /**
  * @ingroup nrf_twis
  * @defgroup nrf_twis_hal TWIS HAL
@@ -22,21 +49,22 @@
 #define NRF_TWIS_H__
 
 #include "nrf.h"
-#include "nrf_drv_config.h"
+#include "sdk_config.h"
 #include <stdint.h>
 #include <stddef.h>
 #include <stdbool.h>
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 /**
  * @brief TWIS tasks
  */
 typedef enum
 {
     /*lint -save -e30*/
-#ifndef NRF52_PAN_30 /* STOP task is not functional in MPW3 (PAN-30) */
-    /* Stop task is not working properly for first release */
     NRF_TWIS_TASK_STOP      = offsetof(NRF_TWIS_Type, TASKS_STOP),      /**< Stop TWIS transaction */
-#endif
     NRF_TWIS_TASK_SUSPEND   = offsetof(NRF_TWIS_Type, TASKS_SUSPEND),   /**< Suspend TWIS transaction */
     NRF_TWIS_TASK_RESUME    = offsetof(NRF_TWIS_Type, TASKS_RESUME),    /**< Resume TWIS transaction */
     NRF_TWIS_TASK_PREPARERX = offsetof(NRF_TWIS_Type, TASKS_PREPARERX), /**< Prepare the TWIS slave to respond to a write command */
@@ -87,15 +115,8 @@ typedef enum
 typedef enum
 {
     NRF_TWIS_ERROR_OVERFLOW  = TWIS_ERRORSRC_OVERFLOW_Msk, /**< RX buffer overflow detected, and prevented */
-#ifdef NRF52_PAN_29
-    /* Patched version of bit positions in ERRORSRC register (PAN-29) */
-    NRF_TWIS_ERROR_DATA_NACK = 1U << 1,                    /**< NACK sent after receiving a data byte */
-    NRF_TWIS_ERROR_OVERREAD  = 1U << 2                     /**< TX buffer over-read detected, and prevented */
-#else
-    /* Code that meets current documentation */
     NRF_TWIS_ERROR_DATA_NACK = TWIS_ERRORSRC_DNACK_Msk,    /**< NACK sent after receiving a data byte */
     NRF_TWIS_ERROR_OVERREAD  = TWIS_ERRORSRC_OVERREAD_Msk  /**< TX buffer over-read detected, and prevented */
-#endif
 } nrf_twis_error_t;
 
 /**
@@ -134,43 +155,43 @@ typedef uint8_t nrf_twis_address_t;
 /**
  * @brief Function for activating a specific TWIS task.
  *
- * @param[in] p_twis TWIS instance.
+ * @param[in] p_reg Pointer to the peripheral registers structure.
  * @param     task   Task.
  */
-__STATIC_INLINE void nrf_twis_task_trigger(NRF_TWIS_Type * const p_twis, nrf_twis_task_t task);
+__STATIC_INLINE void nrf_twis_task_trigger(NRF_TWIS_Type * const p_reg, nrf_twis_task_t task);
 
 /**
  * @brief Function for returning the address of a specific TWIS task register.
  *
- * @param[in]  p_twis TWIS instance.
+ * @param[in]  p_reg Pointer to the peripheral registers structure.
  * @param      task   Task.
  *
  * @return Task address.
  */
 __STATIC_INLINE uint32_t nrf_twis_task_address_get(
-        NRF_TWIS_Type const * const p_twis,
+        NRF_TWIS_Type const * const p_reg,
         nrf_twis_task_t      task);
 
 /**
  * @brief Function for clearing a specific event.
  *
- * @param[in] p_twis TWIS instance.
+ * @param[in] p_reg Pointer to the peripheral registers structure.
  * @param     event  Event.
  */
 __STATIC_INLINE void nrf_twis_event_clear(
-        NRF_TWIS_Type     * const p_twis,
+        NRF_TWIS_Type     * const p_reg,
         nrf_twis_event_t   event);
 /**
  * @brief Function for returning the state of a specific event.
  *
- * @param[in] p_twis TWIS instance.
+ * @param[in] p_reg Pointer to the peripheral registers structure.
  * @param     event  Event.
  *
  * @retval true If the event is set.
  * @retval false If the event is not set.
  */
 __STATIC_INLINE bool nrf_twis_event_check(
-        NRF_TWIS_Type const * const p_twis,
+        NRF_TWIS_Type const * const p_reg,
         nrf_twis_event_t     event);
 
 
@@ -178,132 +199,132 @@ __STATIC_INLINE bool nrf_twis_event_check(
  * @brief Function for getting and clearing the state of specific event
  *
  * This function checks the state of the event and clears it.
- * @param[in,out] p_twis TWIS instance
+ * @param[in,out] p_reg Pointer to the peripheral registers structure.
  * @param         event Event.
  *
  * @retval true If the event was set.
  * @retval false If the event was not set.
  */
 __STATIC_INLINE bool nrf_twis_event_get_and_clear(
-        NRF_TWIS_Type    * const p_twis,
+        NRF_TWIS_Type    * const p_reg,
         nrf_twis_event_t   event);
 
 
 /**
  * @brief Function for returning the address of a specific TWIS event register.
  *
- * @param[in] p_twis TWIS instance.
+ * @param[in] p_reg Pointer to the peripheral registers structure.
  * @param     event  Event.
  *
  * @return Address.
  */
 __STATIC_INLINE uint32_t nrf_twis_event_address_get(
-        NRF_TWIS_Type const * const p_twis,
+        NRF_TWIS_Type const * const p_reg,
         nrf_twis_event_t     event);
 
 /**
  * @brief Function for setting a shortcut.
  *
- * @param[in] p_twis     TWIS instance.
+ * @param[in] p_reg     Pointer to the peripheral registers structure.
  * @param     short_mask Shortcuts mask.
  */
-__STATIC_INLINE void nrf_twis_shorts_enable(NRF_TWIS_Type * const p_twis, uint32_t short_mask);
+__STATIC_INLINE void nrf_twis_shorts_enable(NRF_TWIS_Type * const p_reg, uint32_t short_mask);
 
 /**
  * @brief Function for clearing shortcuts.
  *
- * @param[in] p_twis     TWIS instance.
+ * @param[in] p_reg     Pointer to the peripheral registers structure.
  * @param     short_mask Shortcuts mask.
  */
-__STATIC_INLINE void nrf_twis_shorts_disable(NRF_TWIS_Type * const p_twis, uint32_t short_mask);
+__STATIC_INLINE void nrf_twis_shorts_disable(NRF_TWIS_Type * const p_reg, uint32_t short_mask);
 
 /**
  * @brief Get the shorts mask
  *
  * Function returns shorts register.
- * @param[in] p_twis     TWIS instance.
+ * @param[in] p_reg     Pointer to the peripheral registers structure.
  * @return Flags of currently enabled shortcuts
  */
-__STATIC_INLINE uint32_t nrf_twis_shorts_get(NRF_TWIS_Type * const p_twis);
+__STATIC_INLINE uint32_t nrf_twis_shorts_get(NRF_TWIS_Type * const p_reg);
 
 /**
  * @brief Function for enabling selected interrupts.
  *
- * @param[in] p_twis   TWIS instance.
+ * @param[in] p_reg   Pointer to the peripheral registers structure.
  * @param     int_mask Interrupts mask.
  */
-__STATIC_INLINE void nrf_twis_int_enable(NRF_TWIS_Type * const p_twis, uint32_t int_mask);
+__STATIC_INLINE void nrf_twis_int_enable(NRF_TWIS_Type * const p_reg, uint32_t int_mask);
 
 /**
  * @brief Function for retrieving the state of selected interrupts.
  *
- * @param[in] p_twis   TWIS instance.
+ * @param[in] p_reg   Pointer to the peripheral registers structure.
  * @param     int_mask Interrupts mask.
  *
  * @retval true If any of selected interrupts is enabled.
  * @retval false If none of selected interrupts is enabled.
  */
-__STATIC_INLINE bool nrf_twis_int_enable_check(NRF_TWIS_Type const * const p_twis, uint32_t int_mask);
+__STATIC_INLINE bool nrf_twis_int_enable_check(NRF_TWIS_Type const * const p_reg, uint32_t int_mask);
 
 /**
  * @brief Function for disabling selected interrupts.
  *
- * @param[in] p_twis   TWIS instance.
+ * @param[in] p_reg   Pointer to the peripheral registers structure.
  * @param     int_mask Interrupts mask.
  */
-__STATIC_INLINE void nrf_twis_int_disable(NRF_TWIS_Type * const p_twis, uint32_t int_mask);
+__STATIC_INLINE void nrf_twis_int_disable(NRF_TWIS_Type * const p_reg, uint32_t int_mask);
 
 /**
  * @brief Function for retrieving and clearing the TWIS error source.
  *
  * @attention Error sources are cleared after read.
- * @param[in] p_twis TWIS instance
+ * @param[in] p_reg Pointer to the peripheral registers structure.
  * @return Error source mask with values from @ref nrf_twis_error_t.
  */
-__STATIC_INLINE uint32_t nrf_twis_error_source_get_and_clear(NRF_TWIS_Type * const p_twis);
+__STATIC_INLINE uint32_t nrf_twis_error_source_get_and_clear(NRF_TWIS_Type * const p_reg);
 
 /**
  * @brief Get information which of addresses matched
  *
  * Function returns index in the address table
  * that points to the address that already matched.
- * @param[in] p_twis TWIS instance
+ * @param[in] p_reg Pointer to the peripheral registers structure.
  * @return Index of matched address
  */
-__STATIC_INLINE uint_fast8_t nrf_twis_match_get(NRF_TWIS_Type const * p_twis);
+__STATIC_INLINE uint_fast8_t nrf_twis_match_get(NRF_TWIS_Type const * p_reg);
 
 /**
  * @brief Function for enabling TWIS.
  *
- * @param[in] p_twis TWIS instance.
+ * @param[in] p_reg Pointer to the peripheral registers structure.
  */
-__STATIC_INLINE void nrf_twis_enable(NRF_TWIS_Type * const p_twis);
+__STATIC_INLINE void nrf_twis_enable(NRF_TWIS_Type * const p_reg);
 
 /**
  * @brief Function for disabling TWIS.
  *
- * @param[in] p_twis TWIS instance.
+ * @param[in] p_reg Pointer to the peripheral registers structure.
  */
-__STATIC_INLINE void nrf_twis_disable(NRF_TWIS_Type * const p_twis);
+__STATIC_INLINE void nrf_twis_disable(NRF_TWIS_Type * const p_reg);
 
 /**
  * @brief Function for configuring TWIS pins.
  *
- * @param[in] p_twis TWIS instance.
+ * @param[in] p_reg Pointer to the peripheral registers structure.
  * @param scl SCL pin number.
  * @param sda SDA pin number.
  */
-__STATIC_INLINE void nrf_twis_pins_set(NRF_TWIS_Type * const p_twis, uint32_t scl, uint32_t sda);
+__STATIC_INLINE void nrf_twis_pins_set(NRF_TWIS_Type * const p_reg, uint32_t scl, uint32_t sda);
 
 /**
  * @brief Function for setting the receive buffer.
  *
- * @param[in] p_twis TWIS instance.
+ * @param[in] p_reg Pointer to the peripheral registers structure.
  * @param     p_buf  Pointer to the buffer for received data.
  * @param     length Maximum number of data bytes to receive.
  */
 __STATIC_INLINE void nrf_twis_rx_buffer_set(
-        NRF_TWIS_Type     * const p_twis,
+        NRF_TWIS_Type     * const p_reg,
         uint8_t           * p_buf,
         nrf_twis_amount_t   length);
 
@@ -311,32 +332,32 @@ __STATIC_INLINE void nrf_twis_rx_buffer_set(
  * @brief Function that prepares TWIS for receiving
  *
  * This function sets receive buffer and then sets NRF_TWIS_TASK_PREPARERX task.
- * @param[in] p_twis TWIS instance.
+ * @param[in] p_reg Pointer to the peripheral registers structure.
  * @param     p_buf  Pointer to the buffer for received data.
  * @param     length Maximum number of data bytes to receive.
  */
 __STATIC_INLINE void nrf_twis_rx_prepare(
-        NRF_TWIS_Type     * const p_twis,
+        NRF_TWIS_Type     * const p_reg,
         uint8_t           * p_buf,
         nrf_twis_amount_t   length);
 
 /**
  * @brief Function for getting number of bytes received in the last transaction.
  *
- * @param[in] p_twis TWIS instance.
+ * @param[in] p_reg TWIS instance.
  * @return Amount of bytes received.
  * */
-__STATIC_INLINE nrf_twis_amount_t nrf_twis_rx_amount_get(NRF_TWIS_Type const * const p_twis);
+__STATIC_INLINE nrf_twis_amount_t nrf_twis_rx_amount_get(NRF_TWIS_Type const * const p_reg);
 
 /**
  * @brief Function for setting the transmit buffer.
  *
- * @param[in] p_twis TWIS instance.
+ * @param[in] p_reg Pointer to the peripheral registers structure.
  * @param     p_buf  Pointer to the buffer with data to send.
  * @param     length Maximum number of data bytes to transmit.
  */
 __STATIC_INLINE void nrf_twis_tx_buffer_set(
-        NRF_TWIS_Type     * const p_twis,
+        NRF_TWIS_Type     * const p_reg,
         uint8_t const     * p_buf,
         nrf_twis_amount_t   length);
 
@@ -344,35 +365,35 @@ __STATIC_INLINE void nrf_twis_tx_buffer_set(
  * @brief Function that prepares TWIS for transmitting
  *
  * This function sets transmit buffer and then sets NRF_TWIS_TASK_PREPARETX task.
- * @param[in] p_twis TWIS instance.
+ * @param[in] p_reg Pointer to the peripheral registers structure.
  * @param     p_buf  Pointer to the buffer with data to send.
  * @param     length Maximum number of data bytes to transmit.
  */
 __STATIC_INLINE void nrf_twis_tx_prepare(
-        NRF_TWIS_Type     * const p_twis,
+        NRF_TWIS_Type     * const p_reg,
         uint8_t const     * p_buf,
         nrf_twis_amount_t   length);
 
 /**
  * @brief Function for getting number of bytes transmitted in the last transaction.
  *
- * @param[in] p_twis TWIS instance.
+ * @param[in] p_reg Pointer to the peripheral registers structure.
  * @return Amount of bytes transmitted.
  */
-__STATIC_INLINE nrf_twis_amount_t nrf_twis_tx_amount_get(NRF_TWIS_Type const * const p_twis);
+__STATIC_INLINE nrf_twis_amount_t nrf_twis_tx_amount_get(NRF_TWIS_Type const * const p_reg);
 
 /**
  * @brief Function for setting slave address
  *
  * Function sets the selected address for this TWI interface.
- * @param[in] p_twis TWIS instance.
+ * @param[in] p_reg Pointer to the peripheral registers structure.
  * @param     n Index of address to set
  * @param     addr Addres to set
  * @sa nrf_twis_config_address_set
  * @sa nrf_twis_config_address_get
  */
 __STATIC_INLINE void nrf_twis_address_set(
-        NRF_TWIS_Type      * const p_twis,
+        NRF_TWIS_Type      * const p_reg,
         uint_fast8_t         n,
         nrf_twis_address_t   addr);
 
@@ -380,54 +401,54 @@ __STATIC_INLINE void nrf_twis_address_set(
  * @brief Function for retrieving configured slave address
  *
  * Function gets the selected address for this TWI interface.
- * @param[in] p_twis TWIS instance.
+ * @param[in] p_reg Pointer to the peripheral registers structure.
  * @param n   Index of address to get
  */
 __STATIC_INLINE nrf_twis_address_t nrf_twis_address_get(
-        NRF_TWIS_Type const * const p_twis,
+        NRF_TWIS_Type const * const p_reg,
         uint_fast8_t          n);
 
 /**
  * @brief Function for setting the device address configuration.
  *
- * @param[in] p_twis    TWIS instance.
+ * @param[in] p_reg    Pointer to the peripheral registers structure.
  * @param     addr_mask Mask of address indexes of what device should answer to.
  *
  * @sa nrf_twis_address_set
  */
 __STATIC_INLINE void nrf_twis_config_address_set(
-        NRF_TWIS_Type              * const p_twis,
+        NRF_TWIS_Type              * const p_reg,
         nrf_twis_config_addr_mask_t        addr_mask);
 
 /**
  * @brief Function for retrieving the device address configuration.
  *
- * @param[in] p_twis TWIS instance.
+ * @param[in] p_reg Pointer to the peripheral registers structure.
  *
  * @return Mask of address indexes of what device should answer to.
  */
 __STATIC_INLINE nrf_twis_config_addr_mask_t nrf_twis_config_address_get(
-        NRF_TWIS_Type const * const p_twis);
+        NRF_TWIS_Type const * const p_reg);
 
 /**
  * @brief Function for setting the over-read character.
  *
- * @param[in] p_twis TWIS instance.
+ * @param[in] p_reg    Pointer to the peripheral registers structure.
  * @param[in] orc       Over-read character. Character clocked out in case of
  *                      over-read of the TXD buffer.
  */
 __STATIC_INLINE void nrf_twis_orc_set(
-        NRF_TWIS_Type * const p_twis,
+        NRF_TWIS_Type * const p_reg,
         uint8_t         orc);
 
 /**
  * @brief Function for setting the over-read character.
  *
- * @param[in] p_twis TWIS instance.
+ * @param[in] p_reg Pointer to the peripheral registers structure.
  *
  * @return Over-read character configured for selected instance.
  */
-__STATIC_INLINE uint8_t nrf_twis_orc_get(NRF_TWIS_Type const * const p_twis);
+__STATIC_INLINE uint8_t nrf_twis_orc_get(NRF_TWIS_Type const * const p_reg);
 
 
 /** @} */ /*  End of nrf_twis_hal */
@@ -442,30 +463,30 @@ __STATIC_INLINE uint8_t nrf_twis_orc_get(NRF_TWIS_Type const * const p_twis);
  * @internal
  * @brief Internal function for getting task/event register address
  *
- * @param[in] p_twis TWIS instance.
+ * @param[in] p_reg Pointer to the peripheral registers structure.
  * @oaram     offset Offset of the register from the instance beginning
  *
  * @attention offset has to be modulo 4 value. In other case we can get hardware fault.
  * @return Pointer to the register
  */
-__STATIC_INLINE volatile uint32_t* nrf_twis_getRegPtr(NRF_TWIS_Type * const p_twis, uint32_t offset)
+__STATIC_INLINE volatile uint32_t* nrf_twis_getRegPtr(NRF_TWIS_Type * const p_reg, uint32_t offset)
 {
-    return (volatile uint32_t*)((uint8_t *)p_twis + (uint32_t)offset);
+    return (volatile uint32_t*)((uint8_t *)p_reg + (uint32_t)offset);
 }
 
 /**
  * @internal
  * @brief Internal function for getting task/event register address - constant version
  *
- * @param[in] p_twis TWIS instance.
+ * @param[in] p_reg Pointer to the peripheral registers structure.
  * @oaram     offset Offset of the register from the instance beginning
  *
  * @attention offset has to be modulo 4 value. In other case we can get hardware fault.
  * @return Pointer to the register
  */
-__STATIC_INLINE volatile const uint32_t* nrf_twis_getRegPtr_c(NRF_TWIS_Type const * const p_twis, uint32_t offset)
+__STATIC_INLINE volatile const uint32_t* nrf_twis_getRegPtr_c(NRF_TWIS_Type const * const p_reg, uint32_t offset)
 {
-    return (volatile const uint32_t*)((uint8_t *)p_twis + (uint32_t)offset);
+    return (volatile const uint32_t*)((uint8_t *)p_reg + (uint32_t)offset);
 }
 
 
@@ -474,203 +495,212 @@ __STATIC_INLINE volatile const uint32_t* nrf_twis_getRegPtr_c(NRF_TWIS_Type cons
  */
 
 
-void nrf_twis_task_trigger(NRF_TWIS_Type * const p_twis, nrf_twis_task_t task)
+void nrf_twis_task_trigger(NRF_TWIS_Type * const p_reg, nrf_twis_task_t task)
 {
-    *(nrf_twis_getRegPtr(p_twis, (uint32_t)task)) = 1UL;
+    *(nrf_twis_getRegPtr(p_reg, (uint32_t)task)) = 1UL;
 }
 
 uint32_t nrf_twis_task_address_get(
-        NRF_TWIS_Type const * const p_twis,
+        NRF_TWIS_Type const * const p_reg,
         nrf_twis_task_t       task)
 {
-    return (uint32_t)nrf_twis_getRegPtr_c(p_twis, (uint32_t)task);
+    return (uint32_t)nrf_twis_getRegPtr_c(p_reg, (uint32_t)task);
 }
 
 void nrf_twis_event_clear(
-        NRF_TWIS_Type     * const p_twis,
+        NRF_TWIS_Type     * const p_reg,
         nrf_twis_event_t    event)
 {
-    *(nrf_twis_getRegPtr(p_twis, (uint32_t)event)) = 0UL;
+    *(nrf_twis_getRegPtr(p_reg, (uint32_t)event)) = 0UL;
+#if __CORTEX_M == 0x04
+    volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event));
+    (void)dummy;
+#endif
 }
 
 bool nrf_twis_event_check(
-        NRF_TWIS_Type const * const p_twis,
+        NRF_TWIS_Type const * const p_reg,
         nrf_twis_event_t      event)
 {
-    return (bool)*nrf_twis_getRegPtr_c(p_twis, (uint32_t)event);
+    return (bool)*nrf_twis_getRegPtr_c(p_reg, (uint32_t)event);
 }
 
 bool nrf_twis_event_get_and_clear(
-        NRF_TWIS_Type    * const p_twis,
+        NRF_TWIS_Type    * const p_reg,
         nrf_twis_event_t   event)
 {
-    bool ret = nrf_twis_event_check(p_twis, event);
+    bool ret = nrf_twis_event_check(p_reg, event);
     if (ret)
     {
-        nrf_twis_event_clear(p_twis, event);
+        nrf_twis_event_clear(p_reg, event);
     }
     return ret;
 }
 
 uint32_t nrf_twis_event_address_get(
-        NRF_TWIS_Type const * const p_twis,
+        NRF_TWIS_Type const * const p_reg,
         nrf_twis_event_t      event)
 {
-    return (uint32_t)nrf_twis_getRegPtr_c(p_twis, (uint32_t)event);
+    return (uint32_t)nrf_twis_getRegPtr_c(p_reg, (uint32_t)event);
 }
 
-void nrf_twis_shorts_enable(NRF_TWIS_Type * const p_twis, uint32_t short_mask)
+void nrf_twis_shorts_enable(NRF_TWIS_Type * const p_reg, uint32_t short_mask)
 {
-    p_twis->SHORTS |= short_mask;
+    p_reg->SHORTS |= short_mask;
 }
 
-void nrf_twis_shorts_disable(NRF_TWIS_Type * const p_twis, uint32_t short_mask)
+void nrf_twis_shorts_disable(NRF_TWIS_Type * const p_reg, uint32_t short_mask)
 {
     if (~0U == short_mask)
     {
         /* Optimized version for "disable all" */
-        p_twis->SHORTS = 0;
+        p_reg->SHORTS = 0;
     }
     else
     {
-        p_twis->SHORTS &= ~short_mask;
+        p_reg->SHORTS &= ~short_mask;
     }
 }
 
-uint32_t nrf_twis_shorts_get(NRF_TWIS_Type * const p_twis)
+uint32_t nrf_twis_shorts_get(NRF_TWIS_Type * const p_reg)
 {
-    return p_twis->SHORTS;
+    return p_reg->SHORTS;
 }
 
-void nrf_twis_int_enable(NRF_TWIS_Type * const p_twis, uint32_t int_mask)
+void nrf_twis_int_enable(NRF_TWIS_Type * const p_reg, uint32_t int_mask)
 {
-    p_twis->INTENSET = int_mask;
+    p_reg->INTENSET = int_mask;
 }
 
-bool nrf_twis_int_enable_check(NRF_TWIS_Type const * const p_twis, uint32_t int_mask)
+bool nrf_twis_int_enable_check(NRF_TWIS_Type const * const p_reg, uint32_t int_mask)
 {
-    return (bool)(p_twis->INTENSET & int_mask);
+    return (bool)(p_reg->INTENSET & int_mask);
 }
 
-void nrf_twis_int_disable(NRF_TWIS_Type * const p_twis, uint32_t int_mask)
+void nrf_twis_int_disable(NRF_TWIS_Type * const p_reg, uint32_t int_mask)
 {
-    p_twis->INTENCLR = int_mask;
+    p_reg->INTENCLR = int_mask;
 }
 
-uint32_t nrf_twis_error_source_get_and_clear(NRF_TWIS_Type * const p_twis)
+uint32_t nrf_twis_error_source_get_and_clear(NRF_TWIS_Type * const p_reg)
 {
-    uint32_t ret = p_twis->ERRORSRC;
+    uint32_t ret = p_reg->ERRORSRC;
-    p_twis->ERRORSRC = ret;
+    p_reg->ERRORSRC = ret;
     return ret;
 }
 
-uint_fast8_t nrf_twis_match_get(NRF_TWIS_Type const * p_twis)
+uint_fast8_t nrf_twis_match_get(NRF_TWIS_Type const * p_reg)
 {
-    return (uint_fast8_t)p_twis->MATCH;
+    return (uint_fast8_t)p_reg->MATCH;
 }
 
-void nrf_twis_enable(NRF_TWIS_Type * const p_twis)
+void nrf_twis_enable(NRF_TWIS_Type * const p_reg)
 {
-    p_twis->ENABLE = (TWIS_ENABLE_ENABLE_Enabled << TWIS_ENABLE_ENABLE_Pos);
+    p_reg->ENABLE = (TWIS_ENABLE_ENABLE_Enabled << TWIS_ENABLE_ENABLE_Pos);
 }
 
-void nrf_twis_disable(NRF_TWIS_Type * const p_twis)
+void nrf_twis_disable(NRF_TWIS_Type * const p_reg)
 {
-    p_twis->ENABLE = (TWIS_ENABLE_ENABLE_Disabled << TWIS_ENABLE_ENABLE_Pos);
+    p_reg->ENABLE = (TWIS_ENABLE_ENABLE_Disabled << TWIS_ENABLE_ENABLE_Pos);
 }
 
-void nrf_twis_pins_set(NRF_TWIS_Type * const p_twis, uint32_t scl, uint32_t sda)
+void nrf_twis_pins_set(NRF_TWIS_Type * const p_reg, uint32_t scl, uint32_t sda)
 {
-    p_twis->PSEL.SCL = scl;
+    p_reg->PSEL.SCL = scl;
-    p_twis->PSEL.SDA = sda;
+    p_reg->PSEL.SDA = sda;
 }
 
 void nrf_twis_rx_buffer_set(
-        NRF_TWIS_Type     * const p_twis,
+        NRF_TWIS_Type     * const p_reg,
         uint8_t           * p_buf,
         nrf_twis_amount_t   length)
 {
-    p_twis->RXD.PTR    = (uint32_t)p_buf;
+    p_reg->RXD.PTR    = (uint32_t)p_buf;
-    p_twis->RXD.MAXCNT = length;
+    p_reg->RXD.MAXCNT = length;
 }
 
 __STATIC_INLINE void nrf_twis_rx_prepare(
-        NRF_TWIS_Type     * const p_twis,
+        NRF_TWIS_Type     * const p_reg,
         uint8_t           * p_buf,
         nrf_twis_amount_t   length)
 {
-    nrf_twis_rx_buffer_set(p_twis, p_buf, length);
+    nrf_twis_rx_buffer_set(p_reg, p_buf, length);
-    nrf_twis_task_trigger(p_twis, NRF_TWIS_TASK_PREPARERX);
+    nrf_twis_task_trigger(p_reg, NRF_TWIS_TASK_PREPARERX);
 }
 
-nrf_twis_amount_t nrf_twis_rx_amount_get(NRF_TWIS_Type const * const p_twis)
+nrf_twis_amount_t nrf_twis_rx_amount_get(NRF_TWIS_Type const * const p_reg)
 {
-    return (nrf_twis_amount_t)p_twis->RXD.AMOUNT;
+    return (nrf_twis_amount_t)p_reg->RXD.AMOUNT;
 }
 
 void nrf_twis_tx_buffer_set(
-        NRF_TWIS_Type     * const p_twis,
+        NRF_TWIS_Type     * const p_reg,
         uint8_t const     * p_buf,
         nrf_twis_amount_t   length)
 {
-    p_twis->TXD.PTR    = (uint32_t)p_buf;
+    p_reg->TXD.PTR    = (uint32_t)p_buf;
-    p_twis->TXD.MAXCNT = length;
+    p_reg->TXD.MAXCNT = length;
 }
 
 __STATIC_INLINE void nrf_twis_tx_prepare(
-        NRF_TWIS_Type     * const p_twis,
+        NRF_TWIS_Type     * const p_reg,
         uint8_t const     * p_buf,
         nrf_twis_amount_t   length)
 {
-    nrf_twis_tx_buffer_set(p_twis, p_buf, length);
+    nrf_twis_tx_buffer_set(p_reg, p_buf, length);
-    nrf_twis_task_trigger(p_twis, NRF_TWIS_TASK_PREPARETX);
+    nrf_twis_task_trigger(p_reg, NRF_TWIS_TASK_PREPARETX);
 }
 
-nrf_twis_amount_t nrf_twis_tx_amount_get(NRF_TWIS_Type const * const p_twis)
+nrf_twis_amount_t nrf_twis_tx_amount_get(NRF_TWIS_Type const * const p_reg)
 {
-    return (nrf_twis_amount_t)p_twis->TXD.AMOUNT;
+    return (nrf_twis_amount_t)p_reg->TXD.AMOUNT;
 }
 
 void nrf_twis_address_set(
-        NRF_TWIS_Type      * const p_twis,
+        NRF_TWIS_Type      * const p_reg,
         uint_fast8_t         n,
         nrf_twis_address_t   addr)
 {
-    p_twis->ADDRESS[n] = addr;
+    p_reg->ADDRESS[n] = addr;
 }
 
 nrf_twis_address_t nrf_twis_address_get(
-        NRF_TWIS_Type const * const p_twis,
+        NRF_TWIS_Type const * const p_reg,
         uint_fast8_t          n)
 {
-    return (nrf_twis_address_t)p_twis->ADDRESS[n];
+    return (nrf_twis_address_t)p_reg->ADDRESS[n];
 }
 void nrf_twis_config_address_set(
-        NRF_TWIS_Type              * const p_twis,
+        NRF_TWIS_Type              * const p_reg,
         nrf_twis_config_addr_mask_t        addr_mask)
 {
     /* This is the only configuration in TWIS - just write it without masking */
-    p_twis->CONFIG = addr_mask;
+    p_reg->CONFIG = addr_mask;
 }
 
-nrf_twis_config_addr_mask_t nrf_twis_config_address_get(NRF_TWIS_Type const * const p_twis)
+nrf_twis_config_addr_mask_t nrf_twis_config_address_get(NRF_TWIS_Type const * const p_reg)
 {
-    return (nrf_twis_config_addr_mask_t)(p_twis->CONFIG & TWIS_ADDRESS_ADDRESS_Msk);
+    return (nrf_twis_config_addr_mask_t)(p_reg->CONFIG & TWIS_ADDRESS_ADDRESS_Msk);
 }
 
 void nrf_twis_orc_set(
-        NRF_TWIS_Type * const p_twis,
+        NRF_TWIS_Type * const p_reg,
         uint8_t         orc)
 {
-    p_twis->ORC = orc;
+    p_reg->ORC = orc;
 }
 
-uint8_t nrf_twis_orc_get(NRF_TWIS_Type const * const p_twis)
+uint8_t nrf_twis_orc_get(NRF_TWIS_Type const * const p_reg)
 {
-    return (uint8_t)p_twis->ORC;
+    return (uint8_t)p_reg->ORC;
 }
 
 #endif /* SUPPRESS_INLINE_IMPLEMENTATION */
 
+
+#ifdef __cplusplus
+}
+#endif
+
 #endif /* NRF_TWIS_H__ */
 

nRF5_SDK_11.0.0_89a8197/components/drivers_nrf/hal/nrf_uart.h

@@ -1,22 +1,58 @@
-/* Copyright (c) 2015 Nordic Semiconductor. All Rights Reserved.
+/**
+ * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
  * 
- * The information contained herein is property of Nordic Semiconductor ASA.
+ * All rights reserved.
- * Terms and conditions of usage are described in detail in NORDIC
- * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
  * 
- * Licensees are granted free, non-transferable use of the information. NO
+ * Redistribution and use in source and binary forms, with or without modification,
- * WARRANTY of ANY KIND is provided. This heading must NOT be removed from
+ * are permitted provided that the following conditions are met:
- * the file.
+ * 
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ *    list of conditions and the following disclaimer.
+ * 
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ *    Semiconductor ASA integrated circuit in a product or a software update for
+ *    such product, must reproduce the above copyright notice, this list of
+ *    conditions and the following disclaimer in the documentation and/or other
+ *    materials provided with the distribution.
+ * 
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ *    contributors may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ * 
+ * 4. This software, with or without modification, must only be used with a
+ *    Nordic Semiconductor ASA integrated circuit.
+ * 
+ * 5. Any software provided in binary form under this license must not be reverse
+ *    engineered, decompiled, modified and/or disassembled.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  * 
  */
 #ifndef NRF_UART_H__
 #define NRF_UART_H__
 
 #include "nrf.h"
+#include "nrf_peripherals.h"
 #include <stdint.h>
 #include <stddef.h>
 #include <stdbool.h>
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+//Temporary defining legacy UART for instance 1
+#define NRF_UART1 (NRF_UART_Type *)NRF_UARTE1
+
 /**
  * @defgroup nrf_uart_hal UART HAL
  * @{
@@ -80,7 +116,7 @@ typedef enum
  */
 typedef enum
 {
-#ifdef NRF52
+#ifdef UARTE_PRESENT
     NRF_UART_BAUDRATE_1200   =  UARTE_BAUDRATE_BAUDRATE_Baud1200, /**< 1200 baud. */
     NRF_UART_BAUDRATE_2400   =  UARTE_BAUDRATE_BAUDRATE_Baud2400, /**< 2400 baud. */
     NRF_UART_BAUDRATE_4800   =  UARTE_BAUDRATE_BAUDRATE_Baud4800, /**< 4800 baud. */
@@ -152,7 +188,7 @@ typedef enum
 /**
  * @brief Function for clearing a specific UART event.
  *
- * @param[in] p_reg  UART instance.
+ * @param[in] p_reg  Pointer to the peripheral registers structure.
  * @param[in] event  Event to clear.
  */
 __STATIC_INLINE void nrf_uart_event_clear(NRF_UART_Type * p_reg, nrf_uart_event_t event);
@@ -160,7 +196,7 @@ __STATIC_INLINE void nrf_uart_event_clear(NRF_UART_Type * p_reg, nrf_uart_event_
 /**
  * @brief Function for checking the state of a specific UART event.
  *
- * @param[in] p_reg  UART instance.
+ * @param[in] p_reg  Pointer to the peripheral registers structure.
  * @param[in] event  Event to check.
  *
  * @retval True if event is set, False otherwise.
@@ -170,7 +206,7 @@ __STATIC_INLINE bool nrf_uart_event_check(NRF_UART_Type * p_reg, nrf_uart_event_
 /**
  * @brief Function for returning the address of a specific UART event register.
  *
- * @param[in] p_reg  UART instance.
+ * @param[in] p_reg  Pointer to the peripheral registers structure.
  * @param[in] event  Desired event.
  *
  * @retval Address of specified event register.
@@ -181,7 +217,7 @@ __STATIC_INLINE uint32_t nrf_uart_event_address_get(NRF_UART_Type  * p_reg,
 /**
  * @brief Function for enabling a specific interrupt.
  *
- * @param p_reg     Instance.
+ * @param p_reg    Pointer to the peripheral registers structure.
  * @param int_mask Interrupts to enable.
  */
 __STATIC_INLINE void nrf_uart_int_enable(NRF_UART_Type * p_reg, uint32_t int_mask);
@@ -189,7 +225,7 @@ __STATIC_INLINE void nrf_uart_int_enable(NRF_UART_Type * p_reg, uint32_t int_mas
 /**
  * @brief Function for retrieving the state of a given interrupt.
  *
- * @param p_reg     Instance.
+ * @param p_reg     Pointer to the peripheral registers structure.
  * @param int_mask  Mask of interrupt to check.
  *
  * @retval true  If the interrupt is enabled.
@@ -200,7 +236,7 @@ __STATIC_INLINE bool nrf_uart_int_enable_check(NRF_UART_Type * p_reg, uint32_t i
 /**
  * @brief Function for disabling specific interrupts.
  *
- * @param p_reg    Instance.
+ * @param p_reg    Pointer to the peripheral registers structure.
  * @param int_mask Interrupts to disable.
  */
 __STATIC_INLINE void nrf_uart_int_disable(NRF_UART_Type * p_reg, uint32_t int_mask);
@@ -208,7 +244,7 @@ __STATIC_INLINE void nrf_uart_int_disable(NRF_UART_Type * p_reg, uint32_t int_ma
 /**
  * @brief Function for getting error source mask. Function is clearing error source flags after reading.
  *
- * @param p_reg    Instance.
+ * @param p_reg    Pointer to the peripheral registers structure.
  * @return         Mask with error source flags.
  */
 __STATIC_INLINE uint32_t nrf_uart_errorsrc_get_and_clear(NRF_UART_Type * p_reg);
@@ -216,21 +252,21 @@ __STATIC_INLINE uint32_t nrf_uart_errorsrc_get_and_clear(NRF_UART_Type * p_reg);
 /**
  * @brief Function for enabling UART.
  *
- * @param p_reg    Instance.
+ * @param p_reg    Pointer to the peripheral registers structure.
  */
 __STATIC_INLINE void nrf_uart_enable(NRF_UART_Type * p_reg);
 
 /**
  * @brief Function for disabling UART.
  *
- * @param p_reg    Instance.
+ * @param p_reg    Pointer to the peripheral registers structure.
  */
 __STATIC_INLINE void nrf_uart_disable(NRF_UART_Type * p_reg);
 
 /**
  * @brief Function for configuring TX/RX pins.
  *
- * @param p_reg    Instance.
+ * @param p_reg    Pointer to the peripheral registers structure.
  * @param pseltxd  TXD pin number.
  * @param pselrxd  RXD pin number.
  */
@@ -239,35 +275,35 @@ __STATIC_INLINE void nrf_uart_txrx_pins_set(NRF_UART_Type * p_reg, uint32_t psel
 /**
  * @brief Function for disconnecting TX/RX pins.
  *
- * @param p_reg    Instance.
+ * @param p_reg    Pointer to the peripheral registers structure.
  */
 __STATIC_INLINE void nrf_uart_txrx_pins_disconnect(NRF_UART_Type * p_reg);
 
 /**
  * @brief Function for getting TX pin.
  *
- * @param p_reg    Instance.
+ * @param p_reg    Pointer to the peripheral registers structure.
  */
 __STATIC_INLINE uint32_t nrf_uart_tx_pin_get(NRF_UART_Type * p_reg);
 
 /**
  * @brief Function for getting RX pin.
  *
- * @param p_reg    Instance.
+ * @param p_reg    Pointer to the peripheral registers structure.
  */
 __STATIC_INLINE uint32_t nrf_uart_rx_pin_get(NRF_UART_Type * p_reg);
 
 /**
  * @brief Function for getting RTS pin.
  *
- * @param p_reg    Instance.
+ * @param p_reg    Pointer to the peripheral registers structure.
  */
 __STATIC_INLINE uint32_t nrf_uart_rts_pin_get(NRF_UART_Type * p_reg);
 
 /**
  * @brief Function for getting CTS pin.
  *
- * @param p_reg    Instance.
+ * @param p_reg    Pointer to the peripheral registers structure.
  */
 __STATIC_INLINE uint32_t nrf_uart_cts_pin_get(NRF_UART_Type * p_reg);
 
@@ -275,7 +311,7 @@ __STATIC_INLINE uint32_t nrf_uart_cts_pin_get(NRF_UART_Type * p_reg);
 /**
  * @brief Function for configuring flow control pins.
  *
- * @param p_reg    Instance.
+ * @param p_reg    Pointer to the peripheral registers structure.
  * @param pselrts  RTS pin number.
  * @param pselcts  CTS pin number.
  */
@@ -286,14 +322,14 @@ __STATIC_INLINE void nrf_uart_hwfc_pins_set(NRF_UART_Type * p_reg,
 /**
  * @brief Function for disconnecting flow control pins.
  *
- * @param p_reg    Instance.
+ * @param p_reg    Pointer to the peripheral registers structure.
  */
 __STATIC_INLINE void nrf_uart_hwfc_pins_disconnect(NRF_UART_Type * p_reg);
 
 /**
  * @brief Function for reading RX data.
  *
- * @param p_reg    Instance.
+ * @param p_reg    Pointer to the peripheral registers structure.
  * @return         Received byte.
  */
 __STATIC_INLINE uint8_t nrf_uart_rxd_get(NRF_UART_Type * p_reg);
@@ -301,7 +337,7 @@ __STATIC_INLINE uint8_t nrf_uart_rxd_get(NRF_UART_Type * p_reg);
 /**
  * @brief Function for setting Tx data.
  *
- * @param p_reg    Instance.
+ * @param p_reg    Pointer to the peripheral registers structure.
  * @param txd      Byte.
  */
 __STATIC_INLINE void nrf_uart_txd_set(NRF_UART_Type * p_reg, uint8_t txd);
@@ -309,7 +345,7 @@ __STATIC_INLINE void nrf_uart_txd_set(NRF_UART_Type * p_reg, uint8_t txd);
 /**
  * @brief Function for starting an UART task.
  *
- * @param p_reg    Instance.
+ * @param p_reg    Pointer to the peripheral registers structure.
  * @param task     Task.
  */
 __STATIC_INLINE void nrf_uart_task_trigger(NRF_UART_Type * p_reg, nrf_uart_task_t task);
@@ -317,7 +353,7 @@ __STATIC_INLINE void nrf_uart_task_trigger(NRF_UART_Type * p_reg, nrf_uart_task_
 /**
  * @brief Function for returning the address of a specific task register.
  *
- * @param p_reg Instance.
+ * @param p_reg Pointer to the peripheral registers structure.
  * @param task  Task.
  *
  * @return      Task address.
@@ -327,7 +363,7 @@ __STATIC_INLINE uint32_t nrf_uart_task_address_get(NRF_UART_Type * p_reg, nrf_ua
 /**
  * @brief Function for configuring UART.
  *
- * @param p_reg  Instance.
+ * @param p_reg  Pointer to the peripheral registers structure.
  * @param hwfc   Hardware flow control. Enabled if true.
  * @param parity Parity. Included if true.
  */
@@ -338,7 +374,7 @@ __STATIC_INLINE void nrf_uart_configure(NRF_UART_Type   * p_reg,
 /**
  * @brief Function for setting UART baudrate.
  *
- * @param p_reg    Instance.
+ * @param p_reg    Pointer to the peripheral registers structure.
  * @param baudrate Baudrate.
  */
 __STATIC_INLINE void nrf_uart_baudrate_set(NRF_UART_Type   * p_reg, nrf_uart_baudrate_t baudrate);
@@ -347,6 +383,10 @@ __STATIC_INLINE void nrf_uart_baudrate_set(NRF_UART_Type   * p_reg, nrf_uart_bau
 __STATIC_INLINE void nrf_uart_event_clear(NRF_UART_Type * p_reg, nrf_uart_event_t event)
 {
     *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL;
+#if __CORTEX_M == 0x04
+    volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event));
+    (void)dummy;
+#endif
 
 }
 
@@ -395,8 +435,16 @@ __STATIC_INLINE void nrf_uart_disable(NRF_UART_Type * p_reg)
 
 __STATIC_INLINE void nrf_uart_txrx_pins_set(NRF_UART_Type * p_reg, uint32_t pseltxd, uint32_t pselrxd)
 {
-    p_reg->PSELTXD = pseltxd;
+#if defined(UART_PSEL_RXD_CONNECT_Pos)
+    p_reg->PSEL.RXD = pselrxd;
+#else
     p_reg->PSELRXD = pselrxd;
+#endif
+#if defined(UART_PSEL_TXD_CONNECT_Pos)
+    p_reg->PSEL.TXD = pseltxd;
+#else
+    p_reg->PSELTXD = pseltxd;
+#endif
 }
 
 __STATIC_INLINE void nrf_uart_txrx_pins_disconnect(NRF_UART_Type * p_reg)
@@ -406,28 +454,53 @@ __STATIC_INLINE void nrf_uart_txrx_pins_disconnect(NRF_UART_Type * p_reg)
 
 __STATIC_INLINE uint32_t nrf_uart_tx_pin_get(NRF_UART_Type * p_reg)
 {
+#if defined(UART_PSEL_TXD_CONNECT_Pos)
+    return p_reg->PSEL.TXD;
+#else
     return p_reg->PSELTXD;
+#endif
 }
 
 __STATIC_INLINE uint32_t nrf_uart_rx_pin_get(NRF_UART_Type * p_reg)
 {
+#if defined(UART_PSEL_RXD_CONNECT_Pos)
+    return p_reg->PSEL.RXD;
+#else
     return p_reg->PSELRXD;
+#endif
 }
 
 __STATIC_INLINE uint32_t nrf_uart_rts_pin_get(NRF_UART_Type * p_reg)
 {
+#if defined(UART_PSEL_RTS_CONNECT_Pos)
+    return p_reg->PSEL.RTS;
+#else
     return p_reg->PSELRTS;
+#endif
 }
 
 __STATIC_INLINE uint32_t nrf_uart_cts_pin_get(NRF_UART_Type * p_reg)
 {
+#if defined(UART_PSEL_RTS_CONNECT_Pos)
+    return p_reg->PSEL.CTS;
+#else
     return p_reg->PSELCTS;
+#endif
 }
 
 __STATIC_INLINE void nrf_uart_hwfc_pins_set(NRF_UART_Type * p_reg, uint32_t pselrts, uint32_t pselcts)
 {
+#if defined(UART_PSEL_RTS_CONNECT_Pos)
+    p_reg->PSEL.RTS = pselrts;
+#else
     p_reg->PSELRTS = pselrts;
+#endif
+
+#if defined(UART_PSEL_RTS_CONNECT_Pos)
+    p_reg->PSEL.CTS = pselcts;
+#else
     p_reg->PSELCTS = pselcts;
+#endif
 }
 
 __STATIC_INLINE void nrf_uart_hwfc_pins_disconnect(NRF_UART_Type * p_reg)
@@ -468,4 +541,9 @@ __STATIC_INLINE void nrf_uart_baudrate_set(NRF_UART_Type   * p_reg, nrf_uart_bau
 }
 #endif //SUPPRESS_INLINE_IMPLEMENTATION
 /** @} */
+
+#ifdef __cplusplus
+}
+#endif
+
 #endif //NRF_UART_H__

nRF5_SDK_11.0.0_89a8197/components/drivers_nrf/hal/nrf_uarte.h

@@ -1,22 +1,55 @@
-/* Copyright (c) 2015 Nordic Semiconductor. All Rights Reserved.
+/**
+ * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
  * 
- * The information contained herein is property of Nordic Semiconductor ASA.
+ * All rights reserved.
- * Terms and conditions of usage are described in detail in NORDIC
- * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
  * 
- * Licensees are granted free, non-transferable use of the information. NO
+ * Redistribution and use in source and binary forms, with or without modification,
- * WARRANTY of ANY KIND is provided. This heading must NOT be removed from
+ * are permitted provided that the following conditions are met:
- * the file.
+ * 
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ *    list of conditions and the following disclaimer.
+ * 
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ *    Semiconductor ASA integrated circuit in a product or a software update for
+ *    such product, must reproduce the above copyright notice, this list of
+ *    conditions and the following disclaimer in the documentation and/or other
+ *    materials provided with the distribution.
+ * 
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ *    contributors may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ * 
+ * 4. This software, with or without modification, must only be used with a
+ *    Nordic Semiconductor ASA integrated circuit.
+ * 
+ * 5. Any software provided in binary form under this license must not be reverse
+ *    engineered, decompiled, modified and/or disassembled.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  * 
  */
 #ifndef NRF_UARTE_H__
 #define NRF_UARTE_H__
 
 #include "nrf.h"
+#include "nrf_peripherals.h"
 #include <stdint.h>
 #include <stddef.h>
 #include <stdbool.h>
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 #define NRF_UARTE_PSEL_DISCONNECTED 0xFFFFFFFF
 
 /**
@@ -110,6 +143,24 @@ typedef enum
     NRF_UARTE_BAUDRATE_460800 =  UARTE_BAUDRATE_BAUDRATE_Baud460800, ///< 460800 baud.
     NRF_UARTE_BAUDRATE_921600 =  UARTE_BAUDRATE_BAUDRATE_Baud921600, ///< 921600 baud.
     NRF_UARTE_BAUDRATE_1000000 =  UARTE_BAUDRATE_BAUDRATE_Baud1M,    ///< 1000000 baud.
+#ifndef UART_PRESENT
+    NRF_UART_BAUDRATE_1200    = NRF_UARTE_BAUDRATE_1200,
+    NRF_UART_BAUDRATE_2400    = NRF_UARTE_BAUDRATE_2400,
+    NRF_UART_BAUDRATE_4800    = NRF_UARTE_BAUDRATE_4800,
+    NRF_UART_BAUDRATE_9600    = NRF_UARTE_BAUDRATE_9600,
+    NRF_UART_BAUDRATE_14400   = NRF_UARTE_BAUDRATE_14400,
+    NRF_UART_BAUDRATE_19200   = NRF_UARTE_BAUDRATE_19200,
+    NRF_UART_BAUDRATE_28800   = NRF_UARTE_BAUDRATE_28800,
+    NRF_UART_BAUDRATE_38400   = NRF_UARTE_BAUDRATE_38400,
+    NRF_UART_BAUDRATE_57600   = NRF_UARTE_BAUDRATE_57600,
+    NRF_UART_BAUDRATE_76800   = NRF_UARTE_BAUDRATE_76800,
+    NRF_UART_BAUDRATE_115200  = NRF_UARTE_BAUDRATE_115200,
+    NRF_UART_BAUDRATE_230400  = NRF_UARTE_BAUDRATE_230400,
+    NRF_UART_BAUDRATE_250000  = NRF_UARTE_BAUDRATE_250000,
+    NRF_UART_BAUDRATE_460800  = NRF_UARTE_BAUDRATE_460800,
+    NRF_UART_BAUDRATE_921600  = NRF_UARTE_BAUDRATE_921600,
+    NRF_UART_BAUDRATE_1000000 = NRF_UARTE_BAUDRATE_1000000,
+#endif
 } nrf_uarte_baudrate_t;
 
 /**
@@ -122,6 +173,12 @@ typedef enum
     NRF_UARTE_ERROR_PARITY_MASK  = UARTE_ERRORSRC_PARITY_Msk,    ///< Parity error.
     NRF_UARTE_ERROR_FRAMING_MASK = UARTE_ERRORSRC_FRAMING_Msk,   ///< Framing error.
     NRF_UARTE_ERROR_BREAK_MASK   = UARTE_ERRORSRC_BREAK_Msk,     ///< Break error.
+#ifndef UART_PRESENT
+    NRF_UART_ERROR_OVERRUN_MASK =  NRF_UARTE_ERROR_OVERRUN_MASK,
+    NRF_UART_ERROR_PARITY_MASK  =  NRF_UARTE_ERROR_PARITY_MASK,
+    NRF_UART_ERROR_FRAMING_MASK =  NRF_UARTE_ERROR_FRAMING_MASK,
+    NRF_UART_ERROR_BREAK_MASK   =  NRF_UARTE_ERROR_BREAK_MASK,
+#endif
 } nrf_uarte_error_mask_t;
 
 /**
@@ -132,6 +189,10 @@ typedef enum
 {
     NRF_UARTE_PARITY_EXCLUDED = UARTE_CONFIG_PARITY_Excluded << UARTE_CONFIG_PARITY_Pos, ///< Parity excluded.
     NRF_UARTE_PARITY_INCLUDED = UARTE_CONFIG_PARITY_Included << UARTE_CONFIG_PARITY_Pos, ///< Parity included.
+#ifndef UART_PRESENT
+    NRF_UART_PARITY_EXCLUDED = NRF_UARTE_PARITY_EXCLUDED,
+    NRF_UART_PARITY_INCLUDED = NRF_UARTE_PARITY_INCLUDED,
+#endif
 } nrf_uarte_parity_t;
 
 /**
@@ -142,13 +203,17 @@ typedef enum
 {
     NRF_UARTE_HWFC_DISABLED = UARTE_CONFIG_HWFC_Disabled << UARTE_CONFIG_HWFC_Pos, ///< HW flow control disabled.
     NRF_UARTE_HWFC_ENABLED  = UARTE_CONFIG_HWFC_Enabled  << UARTE_CONFIG_HWFC_Pos, ///< HW flow control enabled.
+#ifndef UART_PRESENT
+    NRF_UART_HWFC_DISABLED =  NRF_UARTE_HWFC_DISABLED,
+    NRF_UART_HWFC_ENABLED  =  NRF_UARTE_HWFC_ENABLED,
+#endif
 } nrf_uarte_hwfc_t;
 
 
 /**
  * @brief Function for clearing a specific UARTE event.
  *
- * @param[in] p_reg  UARTE instance.
+ * @param[in] p_reg  Pointer to the peripheral registers structure.
  * @param[in] event  Event to clear.
  */
 __STATIC_INLINE void nrf_uarte_event_clear(NRF_UARTE_Type * p_reg, nrf_uarte_event_t event);
@@ -156,7 +221,7 @@ __STATIC_INLINE void nrf_uarte_event_clear(NRF_UARTE_Type * p_reg, nrf_uarte_eve
 /**
  * @brief Function for checking the state of a specific UARTE event.
  *
- * @param[in] p_reg  UARTE instance.
+ * @param[in] p_reg  Pointer to the peripheral registers structure.
  * @param[in] event  Event to check.
  *
  * @retval True if event is set, False otherwise.
@@ -166,7 +231,7 @@ __STATIC_INLINE bool nrf_uarte_event_check(NRF_UARTE_Type * p_reg, nrf_uarte_eve
 /**
  * @brief Function for returning the address of a specific UARTE event register.
  *
- * @param[in] p_reg  UARTE instance.
+ * @param[in] p_reg  Pointer to the peripheral registers structure.
  * @param[in] event  Desired event.
  *
  * @retval Address of specified event register.
@@ -177,7 +242,7 @@ __STATIC_INLINE uint32_t nrf_uarte_event_address_get(NRF_UARTE_Type  * p_reg,
 /**
  * @brief Function for enabling UARTE shortcuts.
  *
- * @param p_reg       UARTE instance.
+ * @param p_reg       Pointer to the peripheral registers structure.
  * @param shorts_mask Shortcuts to enable.
  */
 __STATIC_INLINE void nrf_uarte_shorts_enable(NRF_UARTE_Type * p_reg, uint32_t shorts_mask);
@@ -185,7 +250,7 @@ __STATIC_INLINE void nrf_uarte_shorts_enable(NRF_UARTE_Type * p_reg, uint32_t sh
 /**
  * @brief Function for disabling UARTE shortcuts.
  *
- * @param p_reg       UARTE instance.
+ * @param p_reg       Pointer to the peripheral registers structure.
  * @param shorts_mask Shortcuts to disable.
  */
 __STATIC_INLINE void nrf_uarte_shorts_disable(NRF_UARTE_Type * p_reg, uint32_t shorts_mask);
@@ -193,7 +258,7 @@ __STATIC_INLINE void nrf_uarte_shorts_disable(NRF_UARTE_Type * p_reg, uint32_t s
 /**
  * @brief Function for enabling UARTE interrupts.
  *
- * @param p_reg     Instance.
+ * @param p_reg     Pointer to the peripheral registers structure.
  * @param int_mask  Interrupts to enable.
  */
 __STATIC_INLINE void nrf_uarte_int_enable(NRF_UARTE_Type * p_reg, uint32_t int_mask);
@@ -201,7 +266,7 @@ __STATIC_INLINE void nrf_uarte_int_enable(NRF_UARTE_Type * p_reg, uint32_t int_m
 /**
  * @brief Function for retrieving the state of a given interrupt.
  *
- * @param p_reg     Instance.
+ * @param p_reg     Pointer to the peripheral registers structure.
  * @param int_mask  Mask of interrupt to check.
  *
  * @retval true  If the interrupt is enabled.
@@ -220,7 +285,7 @@ __STATIC_INLINE void nrf_uarte_int_disable(NRF_UARTE_Type * p_reg, uint32_t int_
 /**
  * @brief Function for getting error source mask. Function is clearing error source flags after reading.
  *
- * @param p_reg    Instance.
+ * @param p_reg    Pointer to the peripheral registers structure.
  * @return         Mask with error source flags.
  */
 __STATIC_INLINE uint32_t nrf_uarte_errorsrc_get_and_clear(NRF_UARTE_Type * p_reg);
@@ -228,21 +293,21 @@ __STATIC_INLINE uint32_t nrf_uarte_errorsrc_get_and_clear(NRF_UARTE_Type * p_reg
 /**
  * @brief Function for enabling UARTE.
  *
- * @param p_reg    Instance.
+ * @param p_reg    Pointer to the peripheral registers structure.
  */
 __STATIC_INLINE void nrf_uarte_enable(NRF_UARTE_Type * p_reg);
 
 /**
  * @brief Function for disabling UARTE.
  *
- * @param p_reg    Instance.
+ * @param p_reg    Pointer to the peripheral registers structure.
  */
 __STATIC_INLINE void nrf_uarte_disable(NRF_UARTE_Type * p_reg);
 
 /**
  * @brief Function for configuring TX/RX pins.
  *
- * @param p_reg    Instance.
+ * @param p_reg    Pointer to the peripheral registers structure.
  * @param pseltxd  TXD pin number.
  * @param pselrxd  RXD pin number.
  */
@@ -251,35 +316,35 @@ __STATIC_INLINE void nrf_uarte_txrx_pins_set(NRF_UARTE_Type * p_reg, uint32_t ps
 /**
  * @brief Function for disconnecting TX/RX pins.
  *
- * @param p_reg    Instance.
+ * @param p_reg    Pointer to the peripheral registers structure.
  */
 __STATIC_INLINE void nrf_uarte_txrx_pins_disconnect(NRF_UARTE_Type * p_reg);
 
 /**
  * @brief Function for getting TX pin.
  *
- * @param p_reg    Instance.
+ * @param p_reg    Pointer to the peripheral registers structure.
  */
 __STATIC_INLINE uint32_t nrf_uarte_tx_pin_get(NRF_UARTE_Type * p_reg);
 
 /**
  * @brief Function for getting RX pin.
  *
- * @param p_reg    Instance.
+ * @param p_reg    Pointer to the peripheral registers structure.
  */
 __STATIC_INLINE uint32_t nrf_uarte_rx_pin_get(NRF_UARTE_Type * p_reg);
 
 /**
  * @brief Function for getting RTS pin.
  *
- * @param p_reg    Instance.
+ * @param p_reg    Pointer to the peripheral registers structure.
  */
 __STATIC_INLINE uint32_t nrf_uarte_rts_pin_get(NRF_UARTE_Type * p_reg);
 
 /**
  * @brief Function for getting CTS pin.
  *
- * @param p_reg    Instance.
+ * @param p_reg    Pointer to the peripheral registers structure.
  */
 __STATIC_INLINE uint32_t nrf_uarte_cts_pin_get(NRF_UARTE_Type * p_reg);
 
@@ -287,7 +352,7 @@ __STATIC_INLINE uint32_t nrf_uarte_cts_pin_get(NRF_UARTE_Type * p_reg);
 /**
  * @brief Function for configuring flow control pins.
  *
- * @param p_reg    Instance.
+ * @param p_reg    Pointer to the peripheral registers structure.
  * @param pselrts  RTS pin number.
  * @param pselcts  CTS pin number.
  */
@@ -298,14 +363,14 @@ __STATIC_INLINE void nrf_uarte_hwfc_pins_set(NRF_UARTE_Type * p_reg,
 /**
  * @brief Function for disconnecting flow control pins.
  *
- * @param p_reg    Instance.
+ * @param p_reg    Pointer to the peripheral registers structure.
  */
 __STATIC_INLINE void nrf_uarte_hwfc_pins_disconnect(NRF_UARTE_Type * p_reg);
 
 /**
  * @brief Function for starting an UARTE task.
  *
- * @param p_reg    Instance.
+ * @param p_reg    Pointer to the peripheral registers structure.
  * @param task     Task.
  */
 __STATIC_INLINE void nrf_uarte_task_trigger(NRF_UARTE_Type * p_reg, nrf_uarte_task_t task);
@@ -313,7 +378,7 @@ __STATIC_INLINE void nrf_uarte_task_trigger(NRF_UARTE_Type * p_reg, nrf_uarte_ta
 /**
  * @brief Function for returning the address of a specific task register.
  *
- * @param p_reg Instance.
+ * @param p_reg Pointer to the peripheral registers structure.
  * @param task  Task.
  *
  * @return      Task address.
@@ -323,7 +388,7 @@ __STATIC_INLINE uint32_t nrf_uarte_task_address_get(NRF_UARTE_Type * p_reg, nrf_
 /**
  * @brief Function for configuring UARTE.
  *
- * @param p_reg  Instance.
+ * @param p_reg  Pointer to the peripheral registers structure.
  * @param hwfc   Hardware flow control. Enabled if true.
  * @param parity Parity. Included if true.
  */
@@ -363,7 +428,7 @@ __STATIC_INLINE uint32_t nrf_uarte_tx_amount_get(NRF_UARTE_Type * p_reg);
 /**
  * @brief Function for setting the receive buffer.
  *
- * @param[in] p_reg     Instance.
+ * @param[in] p_reg     Pointer to the peripheral registers structure.
  * @param[in] p_buffer  Pointer to the buffer for received data.
  * @param[in] length    Maximum number of data bytes to receive.
  */
@@ -374,7 +439,7 @@ __STATIC_INLINE void nrf_uarte_rx_buffer_set(NRF_UARTE_Type * p_reg,
 /**
  * @brief Function for getting number of bytes received in the last transaction.
  *
- * @param[in] p_reg     Instance.
+ * @param[in] p_reg     Pointer to the peripheral registers structure.
  *
  * @retval Amount of bytes received.
  */
@@ -384,6 +449,10 @@ __STATIC_INLINE uint32_t nrf_uarte_rx_amount_get(NRF_UARTE_Type * p_reg);
 __STATIC_INLINE void nrf_uarte_event_clear(NRF_UARTE_Type * p_reg, nrf_uarte_event_t event)
 {
     *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL;
+#if __CORTEX_M == 0x04
+    volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event));
+    (void)dummy;
+#endif
 
 }
 
@@ -531,4 +600,10 @@ __STATIC_INLINE uint32_t nrf_uarte_rx_amount_get(NRF_UARTE_Type * p_reg)
 }
 #endif //SUPPRESS_INLINE_IMPLEMENTATION
 /** @} */
+
+#ifdef __cplusplus
+}
+#endif
+
 #endif //NRF_UARTE_H__
+

nRF5_SDK_11.0.0_89a8197/components/drivers_nrf/hal/nrf_wdt.h

@@ -1,15 +1,42 @@
-/* Copyright (c) 2015 Nordic Semiconductor. All Rights Reserved.
+/**
+ * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
  * 
- * The information contained herein is property of Nordic Semiconductor ASA.
+ * All rights reserved.
- * Terms and conditions of usage are described in detail in NORDIC
- * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
  * 
- * Licensees are granted free, non-transferable use of the information. NO
+ * Redistribution and use in source and binary forms, with or without modification,
- * WARRANTY of ANY KIND is provided. This heading must NOT be removed from
+ * are permitted provided that the following conditions are met:
- * the file.
+ * 
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ *    list of conditions and the following disclaimer.
+ * 
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ *    Semiconductor ASA integrated circuit in a product or a software update for
+ *    such product, must reproduce the above copyright notice, this list of
+ *    conditions and the following disclaimer in the documentation and/or other
+ *    materials provided with the distribution.
+ * 
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ *    contributors may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ * 
+ * 4. This software, with or without modification, must only be used with a
+ *    Nordic Semiconductor ASA integrated circuit.
+ * 
+ * 5. Any software provided in binary form under this license must not be reverse
+ *    engineered, decompiled, modified and/or disassembled.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  * 
  */
-
 /**
  * @defgroup nrf_wdt_hal WDT HAL
  * @{
@@ -27,6 +54,10 @@
 
 #include "nrf.h"
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 #define NRF_WDT_CHANNEL_NUMBER 0x8UL
 #define NRF_WDT_RR_VALUE       0x6E524635UL /* Fixed value, shouldn't be modified.*/
 
@@ -122,6 +153,10 @@ __STATIC_INLINE void nrf_wdt_task_trigger(nrf_wdt_task_t task)
 __STATIC_INLINE void nrf_wdt_event_clear(nrf_wdt_event_t event)
 {
     *((volatile uint32_t *)((uint8_t *)NRF_WDT + (uint32_t)event)) = NRF_WDT_EVENT_CLEAR;
+#if __CORTEX_M == 0x04
+    volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)NRF_WDT + (uint32_t)event));
+    (void)dummy;
+#endif
 }
 
 
@@ -294,6 +329,11 @@ __STATIC_INLINE void nrf_wdt_reload_request_set(nrf_wdt_rr_register_t rr_registe
 }
 
 
+
+#ifdef __cplusplus
+}
+#endif
+
 #endif
 
 /** @} */

nRF5_SDK_11.0.0_89a8197/components/drivers_nrf/pstorage/pstorage_raw.c

@@ -41,7 +41,7 @@
 
 #ifdef NRF51
 #define SOC_MAX_WRITE_SIZE          1024    /**< Maximum write size allowed for a single call to \ref sd_flash_write as specified in the SoC API on the nRF51. */
-#elif NRF52
+#elif defined(NRF52832_XXAA) || defined(NRF52840_XXAA)
 #define SOC_MAX_WRITE_SIZE          4096    /**< Maximum write size allowed for a single call to \ref sd_flash_write as specified in the SoC API on the nRF52. */
 #else
 #error No target defined

nRF5_SDK_11.0.0_89a8197/components/drivers_nrf/timer/nrf_drv_timer.c

@@ -1,23 +1,61 @@
-/* Copyright (c) 2015 Nordic Semiconductor. All Rights Reserved.
+/**
+ * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
  * 
- * The information contained herein is property of Nordic Semiconductor ASA.
+ * All rights reserved.
- * Terms and conditions of usage are described in detail in NORDIC
- * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
  * 
- * Licensees are granted free, non-transferable use of the information. NO
+ * Redistribution and use in source and binary forms, with or without modification,
- * WARRANTY of ANY KIND is provided. This heading must NOT be removed from
+ * are permitted provided that the following conditions are met:
- * the file.
+ * 
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ *    list of conditions and the following disclaimer.
+ * 
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ *    Semiconductor ASA integrated circuit in a product or a software update for
+ *    such product, must reproduce the above copyright notice, this list of
+ *    conditions and the following disclaimer in the documentation and/or other
+ *    materials provided with the distribution.
+ * 
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ *    contributors may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ * 
+ * 4. This software, with or without modification, must only be used with a
+ *    Nordic Semiconductor ASA integrated circuit.
+ * 
+ * 5. Any software provided in binary form under this license must not be reverse
+ *    engineered, decompiled, modified and/or disassembled.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  * 
  */
-
+#include "sdk_common.h"
+#if NRF_MODULE_ENABLED(TIMER)
+#define ENABLED_TIMER_COUNT (TIMER0_ENABLED+TIMER1_ENABLED+TIMER2_ENABLED+TIMER3_ENABLED+TIMER4_ENABLED)
+#if ENABLED_TIMER_COUNT
 #include "nrf_drv_timer.h"
 #include "nrf_drv_common.h"
 #include "app_util_platform.h"
 
-#if (TIMER_COUNT == 0)
+#define NRF_LOG_MODULE_NAME timer
-    #error "No TIMER instances enabled in the driver configuration file."
-#endif
 
+#if TIMER_CONFIG_LOG_ENABLED
+#define NRF_LOG_LEVEL       TIMER_CONFIG_LOG_LEVEL
+#define NRF_LOG_INFO_COLOR  TIMER_CONFIG_INFO_COLOR
+#define NRF_LOG_DEBUG_COLOR TIMER_CONFIG_DEBUG_COLOR
+#else //TIMER_CONFIG_LOG_ENABLED
+#define NRF_LOG_LEVEL       0
+#endif //TIMER_CONFIG_LOG_ENABLED
+#include "nrf_log.h"
+NRF_LOG_MODULE_REGISTER();
 
 /**@brief Timer control block. */
 typedef struct
@@ -27,52 +65,53 @@ typedef struct
     nrf_drv_state_t           state;
 } timer_control_block_t;
 
-static timer_control_block_t m_cb[TIMER_COUNT];
+static timer_control_block_t m_cb[ENABLED_TIMER_COUNT];
-
-static const nrf_drv_timer_config_t m_default_config[TIMER_COUNT] = {
-#if TIMER0_ENABLED
-    NRF_DRV_TIMER_DEFAULT_CONFIG(0),
-#endif
-#if TIMER1_ENABLED
-    NRF_DRV_TIMER_DEFAULT_CONFIG(1),
-#endif
-#if TIMER2_ENABLED
-    NRF_DRV_TIMER_DEFAULT_CONFIG(2),
-#endif
-#if TIMER3_ENABLED
-    NRF_DRV_TIMER_DEFAULT_CONFIG(3),
-#endif
-#if TIMER4_ENABLED
-    NRF_DRV_TIMER_DEFAULT_CONFIG(4),
-#endif
-};
-
 
 ret_code_t nrf_drv_timer_init(nrf_drv_timer_t const * const p_instance,
                               nrf_drv_timer_config_t const * p_config,
                               nrf_timer_event_handler_t timer_event_handler)
 {
     timer_control_block_t * p_cb = &m_cb[p_instance->instance_id];
-
+    ASSERT(((p_instance->p_reg == NRF_TIMER0) && TIMER0_ENABLED) || (p_instance->p_reg != NRF_TIMER0));
+    ASSERT(((p_instance->p_reg == NRF_TIMER1) && TIMER1_ENABLED) || (p_instance->p_reg != NRF_TIMER1));
+    ASSERT(((p_instance->p_reg == NRF_TIMER2) && TIMER2_ENABLED) || (p_instance->p_reg != NRF_TIMER2));
+#if defined (NRF_TIMER3)
+    ASSERT(((p_instance->p_reg == NRF_TIMER3) && TIMER3_ENABLED) || (p_instance->p_reg != NRF_TIMER3));
+#endif
+#if defined (NRF_TIMER4)
+    ASSERT(((p_instance->p_reg == NRF_TIMER4) && TIMER4_ENABLED) || (p_instance->p_reg != NRF_TIMER4));
+#endif
 #ifdef SOFTDEVICE_PRESENT
     ASSERT(p_instance->p_reg != NRF_TIMER0);
 #endif
-    ASSERT(NRF_TIMER_IS_BIT_WIDTH_VALID(p_instance->p_reg, p_config->bit_width));
+    ASSERT(p_config);
+
+    ret_code_t err_code;
 
     if (p_cb->state != NRF_DRV_STATE_UNINITIALIZED)
     {
-        return NRF_ERROR_INVALID_STATE;
+        err_code = NRF_ERROR_INVALID_STATE;
+        NRF_LOG_WARNING("Function: %s, error code: %s.", (uint32_t)__func__, (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code));
+        return err_code;
     }
 
     if (timer_event_handler == NULL)
     {
-        return NRF_ERROR_INVALID_PARAM;
+        err_code = NRF_ERROR_INVALID_PARAM;
+        NRF_LOG_WARNING("Function: %s, error code: %s.", (uint32_t)__func__, (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code));
+        return err_code;
     }
 
-    if (p_config == NULL)
+    /* Warning 685: Relational operator '<=' always evaluates to 'true'"
-    {
+     * Warning in NRF_TIMER_IS_BIT_WIDTH_VALID macro. Macro validate timers resolution.
-        p_config = &m_default_config[p_instance->instance_id];
+     * Not necessary in nRF52 based systems. Obligatory in nRF51 based systems.
-    }
+     */
+
+    /*lint -save -e685 */
+
+    ASSERT(NRF_TIMER_IS_BIT_WIDTH_VALID(p_instance->p_reg, p_config->bit_width));
+
+    //lint -restore
 
     p_cb->handler = timer_event_handler;
     p_cb->context = p_config->p_context;
@@ -93,7 +132,9 @@ ret_code_t nrf_drv_timer_init(nrf_drv_timer_t const * const p_instance,
 
     p_cb->state = NRF_DRV_STATE_INITIALIZED;
 
-    return NRF_SUCCESS;
+    err_code = NRF_SUCCESS;
+    NRF_LOG_INFO("Function: %s, error code: %s.", (uint32_t)__func__, (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code));
+    return err_code;
 }
 
 void nrf_drv_timer_uninit(nrf_drv_timer_t const * const p_instance)
@@ -105,9 +146,13 @@ void nrf_drv_timer_uninit(nrf_drv_timer_t const * const p_instance)
     nrf_timer_int_disable(p_instance->p_reg, DISABLE_ALL);
     #undef DISABLE_ALL
 
+    if (m_cb[p_instance->instance_id].state == NRF_DRV_STATE_POWERED_ON)
+    {
         nrf_drv_timer_disable(p_instance);
+    }
 
     m_cb[p_instance->instance_id].state = NRF_DRV_STATE_UNINITIALIZED;
+    NRF_LOG_INFO("Uninitialized instance: %d.", p_instance->instance_id);
 }
 
 void nrf_drv_timer_enable(nrf_drv_timer_t const * const p_instance)
@@ -115,6 +160,7 @@ void nrf_drv_timer_enable(nrf_drv_timer_t const * const p_instance)
     ASSERT(m_cb[p_instance->instance_id].state == NRF_DRV_STATE_INITIALIZED);
     nrf_timer_task_trigger(p_instance->p_reg, NRF_TIMER_TASK_START);
     m_cb[p_instance->instance_id].state = NRF_DRV_STATE_POWERED_ON;
+    NRF_LOG_INFO("Enabled instance: %d.", p_instance->instance_id);
 }
 
 void nrf_drv_timer_disable(nrf_drv_timer_t const * const p_instance)
@@ -122,18 +168,21 @@ void nrf_drv_timer_disable(nrf_drv_timer_t const * const p_instance)
     ASSERT(m_cb[p_instance->instance_id].state == NRF_DRV_STATE_POWERED_ON);
     nrf_timer_task_trigger(p_instance->p_reg, NRF_TIMER_TASK_SHUTDOWN);
     m_cb[p_instance->instance_id].state = NRF_DRV_STATE_INITIALIZED;
+    NRF_LOG_INFO("Disabled instance: %d.", p_instance->instance_id);
 }
 
 void nrf_drv_timer_resume(nrf_drv_timer_t const * const p_instance)
 {
     ASSERT(m_cb[p_instance->instance_id].state == NRF_DRV_STATE_POWERED_ON);
     nrf_timer_task_trigger(p_instance->p_reg, NRF_TIMER_TASK_START);
+    NRF_LOG_INFO("Resumed instance: %d.", p_instance->instance_id);
 }
 
 void nrf_drv_timer_pause(nrf_drv_timer_t const * const p_instance)
 {
     ASSERT(m_cb[p_instance->instance_id].state == NRF_DRV_STATE_POWERED_ON);
     nrf_timer_task_trigger(p_instance->p_reg, NRF_TIMER_TASK_STOP);
+    NRF_LOG_INFO("Paused instance: %d.", p_instance->instance_id);
 }
 
 void nrf_drv_timer_clear(nrf_drv_timer_t const * const p_instance)
@@ -153,7 +202,7 @@ void nrf_drv_timer_increment(nrf_drv_timer_t const * const p_instance)
 uint32_t nrf_drv_timer_capture(nrf_drv_timer_t const * const p_instance,
                                nrf_timer_cc_channel_t cc_channel)
 {
-    ASSERT(m_cb[p_instance->instance_id].state == NRF_DRV_STATE_POWERED_ON);
+    ASSERT(m_cb[p_instance->instance_id].state != NRF_DRV_STATE_UNINITIALIZED);
     ASSERT(cc_channel < p_instance->cc_channel_count);
 
     nrf_timer_task_trigger(p_instance->p_reg,
@@ -178,6 +227,7 @@ void nrf_drv_timer_compare(nrf_drv_timer_t const * const p_instance,
     }
 
     nrf_timer_cc_write(p_instance->p_reg, cc_channel, cc_value);
+    NRF_LOG_INFO("Timer id: %d, capture value set: %d, channel: %d.", p_instance->instance_id, cc_value, cc_channel);
 }
 
 void nrf_drv_timer_extended_compare(nrf_drv_timer_t const * const p_instance,
@@ -196,6 +246,7 @@ void nrf_drv_timer_extended_compare(nrf_drv_timer_t const * const p_instance,
                                 cc_channel,
                                 cc_value,
                                 enable_int);
+    NRF_LOG_INFO("Timer id: %d, capture value set: %d, channel: %d.", p_instance->instance_id, cc_value, cc_channel);
 }
 
 void nrf_drv_timer_compare_int_enable(nrf_drv_timer_t const * const p_instance,
@@ -234,12 +285,13 @@ static void irq_handler(NRF_TIMER_Type * p_reg,
             nrf_timer_int_enable_check(p_reg, int_mask))
         {
             nrf_timer_event_clear(p_reg, event);
+            NRF_LOG_DEBUG("Compare event, channel: %d.", i);
             p_cb->handler(event, p_cb->context);
         }
     }
 }
 
-#if TIMER0_ENABLED
+#if NRF_MODULE_ENABLED(TIMER0)
 void TIMER0_IRQHandler(void)
 {
     irq_handler(NRF_TIMER0, &m_cb[TIMER0_INSTANCE_INDEX],
@@ -247,7 +299,7 @@ void TIMER0_IRQHandler(void)
 }
 #endif
 
-#if TIMER1_ENABLED
+#if NRF_MODULE_ENABLED(TIMER1)
 void TIMER1_IRQHandler(void)
 {
     irq_handler(NRF_TIMER1, &m_cb[TIMER1_INSTANCE_INDEX],
@@ -255,7 +307,7 @@ void TIMER1_IRQHandler(void)
 }
 #endif
 
-#if TIMER2_ENABLED
+#if NRF_MODULE_ENABLED(TIMER2)
 void TIMER2_IRQHandler(void)
 {
     irq_handler(NRF_TIMER2, &m_cb[TIMER2_INSTANCE_INDEX],
@@ -263,18 +315,25 @@ void TIMER2_IRQHandler(void)
 }
 #endif
 
-#if TIMER3_ENABLED
+#if defined (NRF_TIMER3)
+#if NRF_MODULE_ENABLED(TIMER3)
 void TIMER3_IRQHandler(void)
 {
     irq_handler(NRF_TIMER3, &m_cb[TIMER3_INSTANCE_INDEX],
         NRF_TIMER_CC_CHANNEL_COUNT(3));
 }
 #endif
+#endif
 
-#if TIMER4_ENABLED
+#if defined (NRF_TIMER4)
+#if NRF_MODULE_ENABLED(TIMER4)
 void TIMER4_IRQHandler(void)
 {
     irq_handler(NRF_TIMER4, &m_cb[TIMER4_INSTANCE_INDEX],
         NRF_TIMER_CC_CHANNEL_COUNT(4));
 }
 #endif
+#endif
+
+#endif // ENABLED_TIMER_COUNT
+#endif // NRF_MODULE_ENABLED(TIMER)

nRF5_SDK_11.0.0_89a8197/components/drivers_nrf/timer/nrf_drv_timer.h

@@ -1,15 +1,42 @@
-/* Copyright (c) 2015 Nordic Semiconductor. All Rights Reserved.
+/**
+ * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
  * 
- * The information contained herein is property of Nordic Semiconductor ASA.
+ * All rights reserved.
- * Terms and conditions of usage are described in detail in NORDIC
- * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
  * 
- * Licensees are granted free, non-transferable use of the information. NO
+ * Redistribution and use in source and binary forms, with or without modification,
- * WARRANTY of ANY KIND is provided. This heading must NOT be removed from
+ * are permitted provided that the following conditions are met:
- * the file.
+ * 
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ *    list of conditions and the following disclaimer.
+ * 
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ *    Semiconductor ASA integrated circuit in a product or a software update for
+ *    such product, must reproduce the above copyright notice, this list of
+ *    conditions and the following disclaimer in the documentation and/or other
+ *    materials provided with the distribution.
+ * 
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ *    contributors may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ * 
+ * 4. This software, with or without modification, must only be used with a
+ *    Nordic Semiconductor ASA integrated circuit.
+ * 
+ * 5. Any software provided in binary form under this license must not be reverse
+ *    engineered, decompiled, modified and/or disassembled.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  * 
  */
-
 /**@file
  * @addtogroup nrf_timer Timer HAL and driver
  * @ingroup    nrf_drivers
@@ -17,7 +44,7 @@
  * @details    The timer HAL provides basic APIs for accessing the registers
  *             of the timer. The timer driver provides APIs on a higher level.
  *
- * @defgroup   lib_driver_timer Timer driver
+ * @defgroup   nrf_drv_timer Timer driver
  * @{
  * @ingroup    nrf_timer
  * @brief      Multi-instance timer driver.
@@ -27,11 +54,15 @@
 #define NRF_DRV_TIMER_H__
 
 #include "nordic_common.h"
-#include "nrf_drv_config.h"
+#include "sdk_config.h"
 #include "nrf_timer.h"
 #include "sdk_errors.h"
 #include "nrf_assert.h"
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 /**
  * @brief Timer driver instance data structure.
  */
@@ -42,6 +73,14 @@ typedef struct
     uint8_t          cc_channel_count; ///< Number of capture/compare channels.
 } nrf_drv_timer_t;
 
+#define ENABLED_TIMER_COUNT (TIMER0_ENABLED+TIMER1_ENABLED+TIMER2_ENABLED+TIMER3_ENABLED+TIMER4_ENABLED)
+
+#define TIMER0_INSTANCE_INDEX 0
+#define TIMER1_INSTANCE_INDEX TIMER0_INSTANCE_INDEX+TIMER0_ENABLED
+#define TIMER2_INSTANCE_INDEX TIMER1_INSTANCE_INDEX+TIMER1_ENABLED
+#define TIMER3_INSTANCE_INDEX TIMER2_INSTANCE_INDEX+TIMER2_ENABLED
+#define TIMER4_INSTANCE_INDEX TIMER3_INSTANCE_INDEX+TIMER3_ENABLED
+
 /**
  * @brief Macro for creating a timer driver instance.
  */
@@ -64,20 +103,15 @@ typedef struct
     void *                p_context;          ///< Context passed to interrupt handler.
 } nrf_drv_timer_config_t;
 
-#define TIMER_CONFIG_FREQUENCY(id)    CONCAT_3(TIMER, id, _CONFIG_FREQUENCY)
-#define TIMER_CONFIG_MODE(id)         CONCAT_3(TIMER, id, _CONFIG_MODE)
-#define TIMER_CONFIG_BIT_WIDTH(id)    CONCAT_3(TIMER, id, _CONFIG_BIT_WIDTH)
-#define TIMER_CONFIG_IRQ_PRIORITY(id) CONCAT_3(TIMER, id, _CONFIG_IRQ_PRIORITY)
-
 /**
  * @brief Timer driver instance default configuration.
  */
-#define NRF_DRV_TIMER_DEFAULT_CONFIG(id) \
+#define NRF_DRV_TIMER_DEFAULT_CONFIG \
 {                                                                               \
-    .frequency          = TIMER_CONFIG_FREQUENCY(id),                        \
+    .frequency          = (nrf_timer_frequency_t)TIMER_DEFAULT_CONFIG_FREQUENCY,\
-    .mode               = (nrf_timer_mode_t)TIMER_CONFIG_MODE(id),           \
+    .mode               = (nrf_timer_mode_t)TIMER_DEFAULT_CONFIG_MODE,          \
-    .bit_width          = (nrf_timer_bit_width_t)TIMER_CONFIG_BIT_WIDTH(id), \
+    .bit_width          = (nrf_timer_bit_width_t)TIMER_DEFAULT_CONFIG_BIT_WIDTH,\
-    .interrupt_priority = TIMER_CONFIG_IRQ_PRIORITY(id),                     \
+    .interrupt_priority = TIMER_DEFAULT_CONFIG_IRQ_PRIORITY,                    \
     .p_context          = NULL                                                  \
 }
 
@@ -96,9 +130,8 @@ typedef void (* nrf_timer_event_handler_t)(nrf_timer_event_t event_type,
 /**
  * @brief Function for initializing the timer.
  *
- * @param[in] p_instance          Timer instance.
+ * @param[in] p_instance          Pointer to the driver instance structure.
- * @param[in] p_config            Initial configuration.
+ * @param[in] p_config            Initial configuration. Must not be NULL.
- *                                If NULL, the default configuration is used.
  * @param[in] timer_event_handler Event handler provided by the user.
  *                                Must not be NULL.
  *
@@ -113,14 +146,14 @@ ret_code_t nrf_drv_timer_init(nrf_drv_timer_t const * const p_instance,
 /**
  * @brief Function for uninitializing the timer.
  *
- * @param[in] p_instance Timer instance.
+ * @param[in] p_instance Pointer to the driver instance structure.
  */
 void nrf_drv_timer_uninit(nrf_drv_timer_t const * const p_instance);
 
 /**
  * @brief Function for turning on the timer.
  *
- * @param[in] p_instance Timer instance.
+ * @param[in] p_instance Pointer to the driver instance structure.
  */
 void nrf_drv_timer_enable(nrf_drv_timer_t const * const p_instance);
 
@@ -130,42 +163,42 @@ void nrf_drv_timer_enable(nrf_drv_timer_t const * const p_instance);
  * Note that the timer will allow to enter the lowest possible SYSTEM_ON state
  * only after this function is called.
  *
- * @param[in] p_instance Timer instance.
+ * @param[in] p_instance Pointer to the driver instance structure.
  */
 void nrf_drv_timer_disable(nrf_drv_timer_t const * const p_instance);
 
 /**
  * @brief Function for pausing the timer.
  *
- * @param[in] p_instance Timer instance.
+ * @param[in] p_instance Pointer to the driver instance structure.
  */
 void nrf_drv_timer_pause(nrf_drv_timer_t const * const p_instance);
 
 /**
  * @brief Function for resuming the timer.
  *
- * @param[in] p_instance Timer instance.
+ * @param[in] p_instance Pointer to the driver instance structure.
  */
 void nrf_drv_timer_resume(nrf_drv_timer_t const * const p_instance);
 
 /**
  * @brief Function for clearing the timer.
  *
- * @param[in] p_instance Timer instance.
+ * @param[in] p_instance Pointer to the driver instance structure.
  */
 void nrf_drv_timer_clear(nrf_drv_timer_t const * const p_instance);
 
 /**
  * @brief Function for incrementing the timer.
  *
- * @param[in] p_instance Timer instance.
+ * @param[in] p_instance Pointer to the driver instance structure.
  */
 void nrf_drv_timer_increment(nrf_drv_timer_t const * const p_instance);
 
 /**
  * @brief Function for returning the address of a specific timer task.
  *
- * @param[in] p_instance Timer instance.
+ * @param[in] p_instance Pointer to the driver instance structure.
  * @param[in] timer_task Timer task.
  *
  * @return Task address.
@@ -177,7 +210,7 @@ __STATIC_INLINE uint32_t nrf_drv_timer_task_address_get(
 /**
  * @brief Function for returning the address of a specific timer capture task.
  *
- * @param[in] p_instance Timer instance.
+ * @param[in] p_instance Pointer to the driver instance structure.
  * @param[in] channel    Capture channel number.
  *
  * @return Task address.
@@ -189,7 +222,7 @@ __STATIC_INLINE uint32_t nrf_drv_timer_capture_task_address_get(
 /**
  * @brief Function for returning the address of a specific timer event.
  *
- * @param[in] p_instance  Timer instance.
+ * @param[in] p_instance  Pointer to the driver instance structure.
  * @param[in] timer_event Timer event.
  *
  * @return Event address.
@@ -201,7 +234,7 @@ __STATIC_INLINE uint32_t nrf_drv_timer_event_address_get(
 /**
  * @brief Function for returning the address of a specific timer compare event.
  *
- * @param[in] p_instance Timer instance.
+ * @param[in] p_instance Pointer to the driver instance structure.
  * @param[in] channel    Compare channel number.
  *
  * @return Event address.
@@ -213,7 +246,7 @@ __STATIC_INLINE uint32_t nrf_drv_timer_compare_event_address_get(
 /**
  * @brief Function for capturing the timer value.
  *
- * @param[in] p_instance Timer instance.
+ * @param[in] p_instance Pointer to the driver instance structure.
  * @param[in] cc_channel Capture channel number.
  *
  * @return Captured value.
@@ -226,7 +259,7 @@ uint32_t nrf_drv_timer_capture(nrf_drv_timer_t const * const p_instance,
  *
  * Use this function to read channel values when PPI is used for capturing.
  *
- * @param[in] p_instance Timer instance.
+ * @param[in] p_instance Pointer to the driver instance structure.
  * @param[in] cc_channel Capture channel number.
  *
  * @return Captured value.
@@ -238,7 +271,7 @@ __STATIC_INLINE uint32_t nrf_drv_timer_capture_get(
 /**
  * @brief Function for setting the timer channel in compare mode.
  *
- * @param[in] p_instance Timer instance.
+ * @param[in] p_instance Pointer to the driver instance structure.
  * @param[in] cc_channel Compare channel number.
  * @param[in] cc_value   Compare value.
  * @param[in] enable_int Enable or disable the interrupt for the compare channel.
@@ -251,7 +284,7 @@ void nrf_drv_timer_compare(nrf_drv_timer_t const * const p_instance,
 /**
  * @brief Function for setting the timer channel in extended compare mode.
  *
- * @param[in] p_instance       Timer instance.
+ * @param[in] p_instance       Pointer to the driver instance structure.
  * @param[in] cc_channel       Compare channel number.
  * @param[in] cc_value         Compare value.
  * @param[in] timer_short_mask Shortcut between the compare event on the channel
@@ -268,7 +301,7 @@ void nrf_drv_timer_extended_compare(nrf_drv_timer_t const * const p_instance,
 /**
  * @brief Function for converting time in microseconds to timer ticks.
  *
- * @param[in] p_instance Timer instance.
+ * @param[in] p_instance Pointer to the driver instance structure.
  * @param[in] time_us    Time in microseconds.
  *
  * @return Number of ticks.
@@ -280,7 +313,7 @@ __STATIC_INLINE uint32_t nrf_drv_timer_us_to_ticks(
 /**
  * @brief Function for converting time in milliseconds to timer ticks.
  *
- * @param[in] p_instance Timer instance.
+ * @param[in] p_instance Pointer to the driver instance structure.
  * @param[in] time_ms    Time in milliseconds.
  *
  * @return Number of ticks.
@@ -292,7 +325,7 @@ __STATIC_INLINE uint32_t nrf_drv_timer_ms_to_ticks(
 /**
  * @brief Function for enabling timer compare interrupt.
  *
- * @param[in] p_instance Timer instance.
+ * @param[in] p_instance Pointer to the driver instance structure.
  * @param[in] channel    Compare channel.
  */
 void nrf_drv_timer_compare_int_enable(nrf_drv_timer_t const * const p_instance,
@@ -301,7 +334,7 @@ void nrf_drv_timer_compare_int_enable(nrf_drv_timer_t const * const p_instance,
 /**
  * @brief Function for disabling timer compare interrupt.
  *
- * @param[in] p_instance Timer instance.
+ * @param[in] p_instance Pointer to the driver instance structure.
  * @param[in] channel    Compare channel.
  */
 void nrf_drv_timer_compare_int_disable(nrf_drv_timer_t const * const p_instance,
@@ -367,6 +400,11 @@ __STATIC_INLINE uint32_t nrf_drv_timer_ms_to_ticks(
 
 #endif // SUPPRESS_INLINE_IMPLEMENTATION
 
+
+#ifdef __cplusplus
+}
+#endif
+
 #endif // NRF_DRV_TIMER_H__
 
 /** @} */

nRF5_SDK_11.0.0_89a8197/components/drivers_nrf/uart/nrf_drv_uart.h

@@ -1,15 +1,42 @@
-/* Copyright (c) 2015 Nordic Semiconductor. All Rights Reserved.
+/**
+ * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
  * 
- * The information contained herein is property of Nordic Semiconductor ASA.
+ * All rights reserved.
- * Terms and conditions of usage are described in detail in NORDIC
- * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
  * 
- * Licensees are granted free, non-transferable use of the information. NO
+ * Redistribution and use in source and binary forms, with or without modification,
- * WARRANTY of ANY KIND is provided. This heading must NOT be removed from
+ * are permitted provided that the following conditions are met:
- * the file.
+ * 
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ *    list of conditions and the following disclaimer.
+ * 
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ *    Semiconductor ASA integrated circuit in a product or a software update for
+ *    such product, must reproduce the above copyright notice, this list of
+ *    conditions and the following disclaimer in the documentation and/or other
+ *    materials provided with the distribution.
+ * 
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ *    contributors may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ * 
+ * 4. This software, with or without modification, must only be used with a
+ *    Nordic Semiconductor ASA integrated circuit.
+ * 
+ * 5. Any software provided in binary form under this license must not be reverse
+ *    engineered, decompiled, modified and/or disassembled.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  * 
  */
-
 /**@file
  * @addtogroup nrf_uart UART driver and HAL
  * @ingroup nrf_drivers
@@ -26,13 +53,107 @@
 #ifndef NRF_DRV_UART_H
 #define NRF_DRV_UART_H
 
+#include "nrf_peripherals.h"
+
+#ifdef UART_PRESENT
 #include "nrf_uart.h"
-#ifdef NRF52
+#endif
+
+#ifdef UARTE_PRESENT
 #include "nrf_uarte.h"
 #endif
 
 #include "sdk_errors.h"
-#include "nrf_drv_config.h"
+#include "sdk_config.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifndef UART1_ENABLED
+#define UART1_ENABLED 0
+#endif
+
+#ifndef UART0_ENABLED
+#define UART0_ENABLED 0
+#endif
+
+#define UART0_INSTANCE_INDEX 0
+#define UART1_INSTANCE_INDEX UART0_ENABLED
+#define UART_ENABLED_COUNT UART0_ENABLED + UART1_ENABLED
+
+#if defined(UARTE_PRESENT) && defined(UART_PRESENT)
+    #define NRF_DRV_UART_PERIPHERAL(id)           \
+        (CONCAT_3(UART, id, _CONFIG_USE_EASY_DMA) == 1 ? \
+            (void *)CONCAT_2(NRF_UARTE, id)       \
+          : (void *)CONCAT_2(NRF_UART, id))
+#elif defined(UART_PRESENT)
+    #define NRF_DRV_UART_PERIPHERAL(id)  (void *)CONCAT_2(NRF_UART, id)
+#else //UARTE_PRESENT !UART_PRESENT
+    #define NRF_DRV_UART_PERIPHERAL(id)  (void *)CONCAT_2(NRF_UARTE, id)
+#endif
+
+// This set of macros makes it possible to exclude parts of code, when one type
+// of supported peripherals is not used.
+
+#if defined(UARTE_PRESENT) && defined(UART_PRESENT)
+
+#if (UART_EASY_DMA_SUPPORT == 1)
+#define UARTE_IN_USE
+#endif
+
+#if (UART_LEGACY_SUPPORT == 1)
+#define UART_IN_USE
+#endif
+
+#if (UART_ENABLED == 1) && ((!defined(UARTE_IN_USE) && !defined(UART_IN_USE)) || ((UART_EASY_DMA_SUPPORT == 0) && (UART_LEGACY_SUPPORT == 0)))
+#error "Illegal settings in uart module!"
+#endif
+
+#elif defined(UART_PRESENT)
+#define UART_IN_USE
+#elif defined(UARTE_PRESENT)
+#define UARTE_IN_USE
+#endif
+
+#if defined(UARTE_PRESENT) && !defined(UART_PRESENT)
+typedef nrf_uarte_hwfc_t       nrf_uart_hwfc_t;
+typedef nrf_uarte_parity_t     nrf_uart_parity_t;
+typedef nrf_uarte_baudrate_t   nrf_uart_baudrate_t;
+typedef nrf_uarte_error_mask_t nrf_uart_error_mask_t;
+typedef nrf_uarte_task_t       nrf_uart_task_t;
+typedef nrf_uarte_event_t      nrf_uart_event_t;
+#ifndef NRF_UART_PSEL_DISCONNECTED
+#define NRF_UART_PSEL_DISCONNECTED 0xFFFFFFFF
+#endif
+#endif
+
+/**
+ * @brief Structure for the UART driver instance.
+ */
+typedef struct
+{
+    union
+    {
+#if (defined(UARTE_IN_USE))
+    NRF_UARTE_Type * p_uarte; ///< Pointer to a structure with UARTE registers.
+#endif
+#if (defined(UART_IN_USE) || (UART_ENABLED == 0))
+    NRF_UART_Type * p_uart;   ///< Pointer to a structure with UART registers.
+#endif
+    void * p_reg;
+    } reg;
+    uint8_t drv_inst_idx;     ///< Driver instance index.
+} nrf_drv_uart_t;
+
+/**
+ * @brief Macro for creating an UART driver instance.
+ */
+#define NRF_DRV_UART_INSTANCE(id)                            \
+{                                                            \
+    .reg          = {NRF_DRV_UART_PERIPHERAL(id)},           \
+    .drv_inst_idx = CONCAT_3(UART, id, _INSTANCE_INDEX),\
+}
 
 /**
  * @brief Types of UART driver events.
@@ -56,45 +177,45 @@ typedef struct
     nrf_uart_parity_t   parity;             ///< Parity configuration.
     nrf_uart_baudrate_t baudrate;           ///< Baudrate.
     uint8_t             interrupt_priority; ///< Interrupt priority.
-#ifdef NRF52
+#ifdef UARTE_PRESENT
     bool                use_easy_dma;
 #endif
 } nrf_drv_uart_config_t;
 
 /**@brief UART default configuration. */
-#ifdef NRF52
+#ifdef UARTE_PRESENT
 #if !UART_LEGACY_SUPPORT
 #define DEFAULT_CONFIG_USE_EASY_DMA true
 #elif !UART_EASY_DMA_SUPPORT
 #define DEFAULT_CONFIG_USE_EASY_DMA false
 #else
-#define DEFAULT_CONFIG_USE_EASY_DMA UART0_CONFIG_USE_EASY_DMA
+#define DEFAULT_CONFIG_USE_EASY_DMA UART0_USE_EASY_DMA
 #endif
 #define NRF_DRV_UART_DEFAULT_CONFIG                                                   \
     {                                                                                 \
-        .pseltxd            = UART0_CONFIG_PSEL_TXD,                                  \
+        .pseltxd            = NRF_UART_PSEL_DISCONNECTED,                             \
-        .pselrxd            = UART0_CONFIG_PSEL_RXD,                                  \
+        .pselrxd            = NRF_UART_PSEL_DISCONNECTED,                             \
-        .pselcts            = UART0_CONFIG_PSEL_CTS,                                  \
+        .pselcts            = NRF_UART_PSEL_DISCONNECTED,                             \
-        .pselrts            = UART0_CONFIG_PSEL_RTS,                                  \
+        .pselrts            = NRF_UART_PSEL_DISCONNECTED,                             \
         .p_context          = NULL,                                                   \
-        .hwfc               = UART0_CONFIG_HWFC,                                      \
+        .hwfc               = (nrf_uart_hwfc_t)UART_DEFAULT_CONFIG_HWFC,              \
-        .parity             = UART0_CONFIG_PARITY,                                    \
+        .parity             = (nrf_uart_parity_t)UART_DEFAULT_CONFIG_PARITY,          \
-        .baudrate           = UART0_CONFIG_BAUDRATE,                                  \
+        .baudrate           = (nrf_uart_baudrate_t)UART_DEFAULT_CONFIG_BAUDRATE,      \
-        .interrupt_priority = UART0_CONFIG_IRQ_PRIORITY,                              \
+        .interrupt_priority = UART_DEFAULT_CONFIG_IRQ_PRIORITY,                       \
-        .use_easy_dma       = DEFAULT_CONFIG_USE_EASY_DMA                             \
+        .use_easy_dma       = true                                                    \
     }
 #else
 #define NRF_DRV_UART_DEFAULT_CONFIG                                                   \
     {                                                                                 \
-        .pseltxd            = UART0_CONFIG_PSEL_TXD,                                  \
+        .pseltxd            = NRF_UART_PSEL_DISCONNECTED,                             \
-        .pselrxd            = UART0_CONFIG_PSEL_RXD,                                  \
+        .pselrxd            = NRF_UART_PSEL_DISCONNECTED,                             \
-        .pselcts            = UART0_CONFIG_PSEL_CTS,                                  \
+        .pselcts            = NRF_UART_PSEL_DISCONNECTED,                             \
-        .pselrts            = UART0_CONFIG_PSEL_RTS,                                  \
+        .pselrts            = NRF_UART_PSEL_DISCONNECTED,                             \
         .p_context          = NULL,                                                   \
-        .hwfc               = UART0_CONFIG_HWFC,                                      \
+        .hwfc               = (nrf_uart_hwfc_t)UART_DEFAULT_CONFIG_HWFC,              \
-        .parity             = UART0_CONFIG_PARITY,                                    \
+        .parity             = (nrf_uart_parity_t)UART_DEFAULT_CONFIG_PARITY,          \
-        .baudrate           = UART0_CONFIG_BAUDRATE,                                  \
+        .baudrate           = (nrf_uart_baudrate_t)UART_DEFAULT_CONFIG_BAUDRATE,      \
-        .interrupt_priority = UART0_CONFIG_IRQ_PRIORITY                               \
+        .interrupt_priority = UART_DEFAULT_CONFIG_IRQ_PRIORITY,                       \
     }
 #endif
 
@@ -137,38 +258,45 @@ typedef void (*nrf_uart_event_handler_t)(nrf_drv_uart_event_t * p_event, void *
  *
  * This function configures and enables UART. After this function GPIO pins are controlled by UART.
  *
- * @param[in] p_config       Initial configuration. Default configuration used if NULL.
+ * @param[in] p_instance    Pointer to the driver instance structure.
+ * @param[in] p_config      Initial configuration.
  * @param[in] event_handler Event handler provided by the user. If not provided driver works in
  *                          blocking mode.
  *
  * @retval    NRF_SUCCESS             If initialization was successful.
  * @retval    NRF_ERROR_INVALID_STATE If driver is already initialized.
  */
-ret_code_t nrf_drv_uart_init(nrf_drv_uart_config_t const * p_config,
+ret_code_t nrf_drv_uart_init(nrf_drv_uart_t const *        p_instance,
+                             nrf_drv_uart_config_t const * p_config,
                              nrf_uart_event_handler_t      event_handler);
 
 /**
  * @brief Function for uninitializing  the UART driver.
+ * @param[in] p_instance Pointer to the driver instance structure.
  */
-void nrf_drv_uart_uninit(void);
+void nrf_drv_uart_uninit(nrf_drv_uart_t const * p_instance);
 
 /**
  * @brief Function for getting the address of a specific UART task.
  *
+ * @param[in] p_instance Pointer to the driver instance structure.
  * @param[in] task       Task.
  *
  * @return    Task address.
  */
-__STATIC_INLINE uint32_t nrf_drv_uart_task_address_get(nrf_uart_task_t task);
+__STATIC_INLINE uint32_t nrf_drv_uart_task_address_get(nrf_drv_uart_t const * p_instance,
+                                                       nrf_uart_task_t task);
 
 /**
  * @brief Function for getting the address of a specific UART event.
  *
+ * @param[in] p_instance Pointer to the driver instance structure.
  * @param[in] event      Event.
  *
  * @return    Event address.
  */
-__STATIC_INLINE uint32_t nrf_drv_uart_event_address_get(nrf_uart_event_t event);
+__STATIC_INLINE uint32_t nrf_drv_uart_event_address_get(nrf_drv_uart_t const * p_instance,
+                                                        nrf_uart_event_t event);
 
 /**
  * @brief Function for sending data over UART.
@@ -183,6 +311,7 @@ __STATIC_INLINE uint32_t nrf_drv_uart_event_address_get(nrf_uart_event_t event);
  *       are placed in the Data RAM region. If they are not and UARTE instance is
  *       used, this function will fail with error code NRF_ERROR_INVALID_ADDR.
  *
+ * @param[in] p_instance Pointer to the driver instance structure.
  * @param[in] p_data     Pointer to data.
  * @param[in] length     Number of bytes to send.
  *
@@ -192,15 +321,18 @@ __STATIC_INLINE uint32_t nrf_drv_uart_event_address_get(nrf_uart_event_t event);
  *                                   (blocking mode only, also see @ref nrf_drv_uart_rx_disable).
  * @retval    NRF_ERROR_INVALID_ADDR If p_data does not point to RAM buffer (UARTE only).
  */
-ret_code_t nrf_drv_uart_tx(uint8_t const * const p_data, uint8_t length);
+ret_code_t nrf_drv_uart_tx(nrf_drv_uart_t const * p_instance,
+                           uint8_t const * const p_data, uint8_t length);
 
 /**
  * @brief Function for checking if UART is currently transmitting.
  *
+ * @param[in] p_instance Pointer to the driver instance structure.
+ *
  * @retval true  If UART is transmitting.
  * @retval false If UART is not transmitting.
  */
-bool nrf_drv_uart_tx_in_progress(void);
+bool nrf_drv_uart_tx_in_progress(nrf_drv_uart_t const * p_instance);
 
 /**
  * @brief Function for aborting any ongoing transmission.
@@ -208,8 +340,10 @@ bool nrf_drv_uart_tx_in_progress(void);
  *       contain number of bytes sent until abort was called. If Easy DMA is not used event will be
  *       called from the function context. If Easy DMA is used it will be called from UART interrupt
  *       context.
+ *
+ * @param[in] p_instance Pointer to the driver instance structure.
  */
-void nrf_drv_uart_tx_abort(void);
+void nrf_drv_uart_tx_abort(nrf_drv_uart_t const * p_instance);
 
 /**
  * @brief Function for receiving data over UART.
@@ -225,8 +359,10 @@ void nrf_drv_uart_tx_abort(void);
  * receiving data continuously.
  *
  * @note Peripherals using EasyDMA (i.e. UARTE) require that the transfer buffers
- *       are placed in the Data RAM region. If they are not and UARTE instance is
+ *       are placed in the Data RAM region. If they are not and UARTE driver instance
- *       used, this function will fail with error code NRF_ERROR_INVALID_ADDR.
+ *       is used, this function will fail with error code NRF_ERROR_INVALID_ADDR.
+ *
+ * @param[in] p_instance Pointer to the driver instance structure.
  * @param[in] p_data     Pointer to data.
  * @param[in] length     Number of bytes to receive.
  *
@@ -239,55 +375,91 @@ void nrf_drv_uart_tx_abort(void);
  * @retval    NRF_ERROR_INTERNAL If UART peripheral reported an error.
  * @retval    NRF_ERROR_INVALID_ADDR If p_data does not point to RAM buffer (UARTE only).
  */
-ret_code_t nrf_drv_uart_rx(uint8_t * p_data, uint8_t length);
+ret_code_t nrf_drv_uart_rx(nrf_drv_uart_t const * p_instance,
+                           uint8_t * p_data, uint8_t length);
+
+
 
 /**
- * @brief Function for enabling receiver.
+ * @brief Function for testing the receiver state in blocking mode.
  *
- * UART has 6 byte long RX FIFO and it will be used to store incoming data. If user will not call
+ * @param[in] p_instance Pointer to the driver instance structure.
- * UART receive function before FIFO is filled, overrun error will encounter. Enabling receiver
+ *
- * without specifying RX buffer is supported only in UART mode (without Easy DMA). Receiver must be
+ * @retval true  If the receiver has at least one byte of data to get.
- * explicitly closed by the user @sa nrf_drv_uart_rx_disable. Function asserts if mode is wrong.
+ * @retval false If the receiver is empty.
  */
-void nrf_drv_uart_rx_enable(void);
+bool nrf_drv_uart_rx_ready(nrf_drv_uart_t const * p_instance);
 
 /**
- * @brief Function for disabling receiver.
+ * @brief Function for enabling the receiver.
  *
- * Function must be called to close the receiver after it has been explicitly enabled by
+ * UART has a 6-byte-long RX FIFO and it is used to store incoming data. If a user does not call the
- * @sa nrf_drv_uart_rx_enable. Feature is supported only in UART mode (without Easy DMA). Function
+ * UART receive function before the FIFO is filled, an overrun error will appear. Enabling the receiver
+ * without specifying an RX buffer is supported only in UART mode (without Easy DMA). The receiver must be
+ * explicitly closed by the user @sa nrf_drv_uart_rx_disable. This function asserts if the mode is wrong.
+ *
+ * @param[in] p_instance Pointer to the driver instance structure.
+ */
+void nrf_drv_uart_rx_enable(nrf_drv_uart_t const * p_instance);
+
+/**
+ * @brief Function for disabling the receiver.
+ *
+ * This function must be called to close the receiver after it has been explicitly enabled by
+ * @sa nrf_drv_uart_rx_enable. The feature is supported only in UART mode (without Easy DMA). The function
  * asserts if mode is wrong.
+ *
+ * @param[in] p_instance Pointer to the driver instance structure.
  */
-void nrf_drv_uart_rx_disable(void);
+void nrf_drv_uart_rx_disable(nrf_drv_uart_t const * p_instance);
 
 /**
  * @brief Function for aborting any ongoing reception.
- * @note @ref NRF_DRV_UART_EVT_RX_DONE event will be generated in non-blocking mode. Event will
+ * @note @ref NRF_DRV_UART_EVT_RX_DONE event will be generated in non-blocking mode. The event will
- *       contain number of bytes received until abort was called. If Easy DMA is not used event will be
+ *       contain the number of bytes received until abort was called. The event is called from UART interrupt
- *       called from the function context. If Easy DMA is used it will be called from UART interrupt
  *       context.
+ *
+ * @param[in] p_instance Pointer to the driver instance structure.
  */
-void nrf_drv_uart_rx_abort(void);
+void nrf_drv_uart_rx_abort(nrf_drv_uart_t const * p_instance);
 
 /**
  * @brief Function for reading error source mask. Mask contains values from @ref nrf_uart_error_mask_t.
- * @note Function should be used in blocking mode only. In case of non-blocking mode error event is
+ * @note Function should be used in blocking mode only. In case of non-blocking mode, an error event is
  *       generated. Function clears error sources after reading.
  *
+ * @param[in] p_instance Pointer to the driver instance structure.
+ *
  * @retval    Mask of reported errors.
  */
-uint32_t nrf_drv_uart_errorsrc_get(void);
+uint32_t nrf_drv_uart_errorsrc_get(nrf_drv_uart_t const * p_instance);
+
 
 #ifndef SUPPRESS_INLINE_IMPLEMENTATION
-__STATIC_INLINE uint32_t nrf_drv_uart_task_address_get(nrf_uart_task_t task)
+__STATIC_INLINE uint32_t nrf_drv_uart_task_address_get(nrf_drv_uart_t const * p_instance,
+                                                       nrf_uart_task_t task)
 {
-    return nrf_uart_task_address_get(NRF_UART0, task);
+#ifdef UART_IN_USE
+    return nrf_uart_task_address_get(p_instance->reg.p_uart, task);
+#else
+    return nrf_uarte_task_address_get(p_instance->reg.p_uarte, (nrf_uarte_task_t)task);
+#endif
 }
 
-__STATIC_INLINE uint32_t nrf_drv_uart_event_address_get(nrf_uart_event_t event)
+__STATIC_INLINE uint32_t nrf_drv_uart_event_address_get(nrf_drv_uart_t const * p_instance,
+                                                        nrf_uart_event_t event)
 {
-    return nrf_uart_event_address_get(NRF_UART0, event);
+#ifdef UART_IN_USE
+    return nrf_uart_event_address_get(p_instance->reg.p_uart, event);
+#else
+    return nrf_uarte_event_address_get(p_instance->reg.p_uarte, (nrf_uarte_event_t)event);
+#endif
 }
 #endif //SUPPRESS_INLINE_IMPLEMENTATION
+
+#ifdef __cplusplus
+}
+#endif
+
 #endif //NRF_DRV_UART_H
 /** @} */

nRF5_SDK_11.0.0_89a8197/components/drivers_nrf/wdt/nrf_drv_wdt.c

@@ -1,15 +1,44 @@
-/* Copyright (c) 2015 Nordic Semiconductor. All Rights Reserved.
+/**
+ * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
  * 
- * The information contained herein is property of Nordic Semiconductor ASA.
+ * All rights reserved.
- * Terms and conditions of usage are described in detail in NORDIC
- * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
  * 
- * Licensees are granted free, non-transferable use of the information. NO
+ * Redistribution and use in source and binary forms, with or without modification,
- * WARRANTY of ANY KIND is provided. This heading must NOT be removed from
+ * are permitted provided that the following conditions are met:
- * the file.
+ * 
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ *    list of conditions and the following disclaimer.
+ * 
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ *    Semiconductor ASA integrated circuit in a product or a software update for
+ *    such product, must reproduce the above copyright notice, this list of
+ *    conditions and the following disclaimer in the documentation and/or other
+ *    materials provided with the distribution.
+ * 
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ *    contributors may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ * 
+ * 4. This software, with or without modification, must only be used with a
+ *    Nordic Semiconductor ASA integrated circuit.
+ * 
+ * 5. Any software provided in binary form under this license must not be reverse
+ *    engineered, decompiled, modified and/or disassembled.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  * 
  */
-
+#include "sdk_common.h"
+#if NRF_MODULE_ENABLED(WDT)
 #include "nrf_drv_wdt.h"
 #include "nrf_drv_common.h"
 #include "nrf_error.h"
@@ -19,6 +48,19 @@
 #include <stdbool.h>
 #include <stdint.h>
 
+#define NRF_LOG_MODULE_NAME wdt
+
+#if WDT_CONFIG_LOG_ENABLED
+#define NRF_LOG_LEVEL       WDT_CONFIG_LOG_LEVEL
+#define NRF_LOG_INFO_COLOR  WDT_CONFIG_INFO_COLOR
+#define NRF_LOG_DEBUG_COLOR WDT_CONFIG_DEBUG_COLOR
+#else //WDT_CONFIG_LOG_ENABLED
+#define NRF_LOG_LEVEL       0
+#endif //WDT_CONFIG_LOG_ENABLED
+#include "nrf_log.h"
+NRF_LOG_MODULE_REGISTER();
+
+
 /**@brief WDT event handler. */
 static nrf_wdt_event_handler_t m_wdt_event_handler;
 
@@ -45,6 +87,7 @@ ret_code_t nrf_drv_wdt_init(nrf_drv_wdt_config_t const * p_config,
                             nrf_wdt_event_handler_t     wdt_event_handler)
 {
     ASSERT(wdt_event_handler != NULL);
+    ret_code_t err_code;
     m_wdt_event_handler = wdt_event_handler;
 
     if (m_state == NRF_DRV_STATE_UNINITIALIZED)
@@ -53,7 +96,9 @@ ret_code_t nrf_drv_wdt_init(nrf_drv_wdt_config_t const * p_config,
     }
     else
     {
-        return NRF_ERROR_INVALID_STATE; // WDT already initialized
+        err_code = NRF_ERROR_INVALID_STATE;
+        NRF_LOG_WARNING("Function: %s, error code: %s.", (uint32_t)__func__, (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code));
+        return err_code;
     }
 
     if (p_config == NULL)
@@ -62,11 +107,18 @@ ret_code_t nrf_drv_wdt_init(nrf_drv_wdt_config_t const * p_config,
     }
 
     nrf_wdt_behaviour_set(p_config->behaviour);
-    nrf_wdt_reload_value_set((p_config->reload_value * 32768) / 1000);
+
+    if ((((uint64_t) p_config->reload_value * 32768) / 1000) > UINT32_MAX) // Check for overflow
+    {
+        return NRF_ERROR_INVALID_PARAM;
+    }
+    nrf_wdt_reload_value_set(((uint64_t) p_config->reload_value * 32768) / 1000);
 
     nrf_drv_common_irq_enable(WDT_IRQn, p_config->interrupt_priority);
 
-    return NRF_SUCCESS;
+    err_code = NRF_SUCCESS;
+    NRF_LOG_INFO("Function: %s, error code: %s.", (uint32_t)__func__, (uint32_t)NRF_LOG_ERROR_STRING_GET(err_code));
+    return err_code;
 }
 
 
@@ -77,6 +129,7 @@ void nrf_drv_wdt_enable(void)
     nrf_wdt_int_enable(NRF_WDT_INT_TIMEOUT_MASK);
     nrf_wdt_task_trigger(NRF_WDT_TASK_START);
     m_state = NRF_DRV_STATE_POWERED_ON;
+    NRF_LOG_INFO("Enabled.");
 }
 
 
@@ -108,6 +161,7 @@ ret_code_t nrf_drv_wdt_channel_alloc(nrf_drv_wdt_channel_id * p_channel_id)
         result = NRF_ERROR_NO_MEM;
     }
     CRITICAL_REGION_EXIT();
+    NRF_LOG_INFO("Function: %s, error code: %s.", (uint32_t)__func__, (uint32_t)NRF_LOG_ERROR_STRING_GET(result));
     return result;
 }
 
@@ -116,3 +170,4 @@ void nrf_drv_wdt_channel_feed(nrf_drv_wdt_channel_id channel_id)
     ASSERT(m_state == NRF_DRV_STATE_POWERED_ON);
     nrf_wdt_reload_request_set(channel_id);
 }
+#endif //NRF_MODULE_ENABLED(WDT)

nRF5_SDK_11.0.0_89a8197/components/drivers_nrf/wdt/nrf_drv_wdt.h

@@ -1,22 +1,49 @@
-/* Copyright (c) 2014 Nordic Semiconductor. All Rights Reserved.
+/**
+ * Copyright (c) 2014 - 2017, Nordic Semiconductor ASA
  * 
- * The information contained herein is property of Nordic Semiconductor ASA.
+ * All rights reserved.
- * Terms and conditions of usage are described in detail in NORDIC
- * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
  * 
- * Licensees are granted free, non-transferable use of the information. NO
+ * Redistribution and use in source and binary forms, with or without modification,
- * WARRANTY of ANY KIND is provided. This heading must NOT be removed from
+ * are permitted provided that the following conditions are met:
- * the file.
+ * 
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ *    list of conditions and the following disclaimer.
+ * 
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ *    Semiconductor ASA integrated circuit in a product or a software update for
+ *    such product, must reproduce the above copyright notice, this list of
+ *    conditions and the following disclaimer in the documentation and/or other
+ *    materials provided with the distribution.
+ * 
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ *    contributors may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ * 
+ * 4. This software, with or without modification, must only be used with a
+ *    Nordic Semiconductor ASA integrated circuit.
+ * 
+ * 5. Any software provided in binary form under this license must not be reverse
+ *    engineered, decompiled, modified and/or disassembled.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  * 
  */
-
 /**@file
  * @addtogroup nrf_wdt WDT HAL and driver
  * @ingroup nrf_drivers
  * @brief Watchdog timer (WDT) APIs.
  * @details The WDT HAL provides basic APIs for accessing the registers of the watchdog timer.
  * The WDT driver provides APIs on a higher level.
- * @defgroup lib_driver_wdt WDT driver
+ * @defgroup nrf_drv_wdt WDT driver
  * @{
  * @ingroup  nrf_wdt
  *
@@ -30,7 +57,11 @@
 #include <stdint.h>
 #include "sdk_errors.h"
 #include "nrf_wdt.h"
-#include "nrf_drv_config.h"
+#include "sdk_config.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
 
 /**@brief Struct for WDT initialization. */
 typedef struct
@@ -48,7 +79,7 @@ typedef nrf_wdt_rr_register_t nrf_drv_wdt_channel_id;
 
 #define NRF_DRV_WDT_DEAFULT_CONFIG                                       \
     {                                                                    \
-        .behaviour          = WDT_CONFIG_BEHAVIOUR,    \
+        .behaviour          = (nrf_wdt_behaviour_t)WDT_CONFIG_BEHAVIOUR, \
         .reload_value       = WDT_CONFIG_RELOAD_VALUE,                   \
         .interrupt_priority = WDT_CONFIG_IRQ_PRIORITY,                   \
     }
@@ -60,7 +91,7 @@ typedef nrf_wdt_rr_register_t nrf_drv_wdt_channel_id;
  *
  * @note Function asserts if wdt_event_handler is NULL.
  *
- * @return    NRF_SUCCESS on success, NRF_ERROR_INVALID_STATE if module ws already initialized.
+ * @return    NRF_SUCCESS on success, otherwise an error code.
  */
 ret_code_t nrf_drv_wdt_init(nrf_drv_wdt_config_t const * p_config,
                             nrf_wdt_event_handler_t     wdt_event_handler);
@@ -119,6 +150,11 @@ __STATIC_INLINE uint32_t nrf_drv_wdt_ppi_event_addr(nrf_wdt_event_t event)
 {
     return nrf_wdt_event_address_get(event);
 }
+
+#ifdef __cplusplus
+}
+#endif
+
 #endif
 
 /** @} */

nRF5_SDK_11.0.0_89a8197/components/libraries/bootloader_dfu/bootloader.c

@@ -33,7 +33,7 @@
 
 #define IRQ_ENABLED            0x01                    /**< Field identifying if an interrupt is enabled. */
 
-#ifdef NRF52
+#if defined(NRF52832_XXAA) || defined(NRF52840_XXAA)
 #define MAX_NUMBER_INTERRUPTS  39
 #else
 #define MAX_NUMBER_INTERRUPTS  32                                       /**< Maximum number of interrupts available. */

nRF5_SDK_11.0.0_89a8197/components/libraries/bootloader_dfu/bootloader_settings.c

@@ -31,7 +31,7 @@ __root    const uint32_t m_uicr_bootloader_start_address @ NRF_UICR_BOOT_START_A
 
 #endif
 
-#if defined ( NRF52 )
+#if defined(NRF52832_XXAA) || defined(NRF52840_XXAA)
 #if defined ( __CC_ARM )
 
 uint8_t m_mbr_params_page[CODE_PAGE_SIZE]   __attribute__((at(BOOTLOADER_MBR_PARAMS_PAGE_ADDRESS))) __attribute__((used));          /**< This variable reserves a codepage for mbr parameters, to ensure the compiler doesn't locate any code or variables at his location. */
@@ -50,7 +50,7 @@ __no_init uint8_t m_mbr_params_page[CODE_PAGE_SIZE]     @ BOOTLOADER_MBR_PARAMS_
 __root    const uint32_t m_uicr_mbr_params_page_address @ NRF_UICR_MBR_PARAMS_PAGE_ADDRESS = BOOTLOADER_MBR_PARAMS_PAGE_ADDRESS;    /**< This variable ensures that the linker script will write the bootloader start address to the UICR register. This value will be written in the HEX file and thus written to UICR when the bootloader is flashed into the chip. */
 
 #endif
-#endif //defined ( NRF52 )
+#endif // defined(NRF52832_XXAA) || defined(NRF52840_XXAA)
 
 
 void bootloader_util_settings_get(const bootloader_settings_t ** pp_bootloader_settings)

nRF5_SDK_11.0.0_89a8197/components/libraries/bootloader_dfu/dfu_transport_ble.c

@@ -705,6 +705,12 @@ static void advertising_start(void)
         // Initialize advertising parameters (used when starting advertising).
         memset(&m_adv_params, 0, sizeof(m_adv_params));
 
+        m_adv_params.properties.connectable = 1;
+        m_adv_params.properties.scannable   = 1;
+
+        m_adv_params.properties.legacy_pdu  = 1;
+        m_adv_params.properties.tx_power    = 1;
+
         if (m_ble_peer_data_valid)
         {
             ble_gap_irk_t empty_irk = {{0}};
@@ -712,11 +718,11 @@ static void advertising_start(void)
             if (memcmp(m_ble_peer_data.irk.irk, empty_irk.irk, sizeof(empty_irk.irk)) == 0)
             {
                 advertising_init(BLE_GAP_ADV_FLAGS_LE_ONLY_LIMITED_DISC_MODE);
-                m_adv_params.type        = BLE_GAP_ADV_TYPE_ADV_DIRECT_IND;
+                m_adv_params.properties.directed = 1;
                 m_adv_params.p_peer_addr         = &m_ble_peer_data.addr;
                 m_adv_params.fp                  = BLE_GAP_ADV_FP_ANY;
                 m_adv_params.interval            = 0;
-                m_adv_params.timeout     = 0;
+                m_adv_params.duration            = 0;
             }
             else
             {
@@ -734,24 +740,24 @@ static void advertising_start(void)
                 APP_ERROR_CHECK(err_code);
 
                 advertising_init(BLE_GAP_ADV_FLAG_BR_EDR_NOT_SUPPORTED);
-                m_adv_params.type        = BLE_GAP_ADV_TYPE_ADV_IND;
+                m_adv_params.properties.directed = 0;
                 m_adv_params.fp                  = BLE_GAP_ADV_FP_FILTER_CONNREQ;
                 m_adv_params.interval            = APP_ADV_INTERVAL;
-                m_adv_params.timeout     = APP_ADV_TIMEOUT_IN_SECONDS;
+                m_adv_params.duration            = APP_ADV_TIMEOUT_IN_SECONDS;
 
             }
         }
         else
         {
             advertising_init(BLE_GAP_ADV_FLAGS_LE_ONLY_GENERAL_DISC_MODE);
-            m_adv_params.type        = BLE_GAP_ADV_TYPE_ADV_IND;
+            m_adv_params.properties.directed = 0;
             m_adv_params.p_peer_addr         = NULL;
             m_adv_params.fp                  = BLE_GAP_ADV_FP_ANY;
             m_adv_params.interval            = APP_ADV_INTERVAL;
-            m_adv_params.timeout     = APP_ADV_TIMEOUT_IN_SECONDS;
+            m_adv_params.duration            = APP_ADV_TIMEOUT_IN_SECONDS;
         }
 
-        err_code = sd_ble_gap_adv_start(&m_adv_params, BLE_CONN_CFG_HIGH_BANDWIDTH);
+        err_code = sd_ble_gap_adv_start(BLE_GAP_ADV_SET_HANDLE_DEFAULT, &m_adv_params, BLE_CONN_CFG_HIGH_BANDWIDTH);
         APP_ERROR_CHECK(err_code);
 
 //        led_on(ADVERTISING_LED_PIN_NO);
@@ -769,7 +775,7 @@ static void advertising_stop(void)
     {
         uint32_t err_code;
 
-        err_code = sd_ble_gap_adv_stop();
+        err_code = sd_ble_gap_adv_stop(BLE_GAP_ADV_SET_HANDLE_DEFAULT);
         APP_ERROR_CHECK(err_code);
 
 //        led_off(ADVERTISING_LED_PIN_NO);
@@ -1123,7 +1129,7 @@ uint32_t dfu_transport_ble_update_start(void)
     conn_params_init();
     sec_params_init();
 
-    sd_ble_gap_tx_power_set(4); // maximum power
+    sd_ble_gap_tx_power_set(BLE_GAP_TX_POWER_ROLE_ADV, 0, 4); // maximum power
     advertising_start();
 
     return NRF_SUCCESS;

nRF5_SDK_11.0.0_89a8197/components/libraries/bootloader_dfu/dfu_types.h

@@ -31,7 +31,7 @@
 
 #define NRF_UICR_BOOT_START_ADDRESS         (NRF_UICR_BASE + 0x14)      /**< Register where the bootloader start address is stored in the UICR register. */
 
-#if defined(NRF52)                                                  
+#if defined(NRF52832_XXAA) || defined(NRF52840_XXAA)
 #define NRF_UICR_MBR_PARAMS_PAGE_ADDRESS    (NRF_UICR_BASE + 0x18)      /**< Register where the mbr params page is stored in the UICR register. (Only in use in nRF52 MBR).*/
 #endif                                                              
 
@@ -56,7 +56,7 @@
 
 
         
-#elif defined(NRF52)
+#elif defined(NRF52832_XXAA)
         
 #define BOOTLOADER_REGION_START             0x00074000                  /**< This field should correspond to start address of the bootloader, found in UICR.RESERVED, 0x10001014, register. This value is used for sanity check, so the bootloader will fail immediately if this value differs from runtime value. The value is used to determine max application size for updating. */
 #define BOOTLOADER_SETTINGS_ADDRESS         0x0007F000                  /**< The field specifies the page location of the bootloader settings address. */
@@ -64,6 +64,14 @@
         
 #define CODE_PAGE_SIZE                      0x1000                      /**< Size of a flash codepage. Used for size of the reserved flash space in the bootloader region. Will be runtime checked against NRF_UICR->CODEPAGESIZE to ensure the region is correct. */
 
+#elif  defined(NRF52840_XXAA)
+
+#define BOOTLOADER_REGION_START             0x000F4000                  /**< This field should correspond to start address of the bootloader, found in UICR.RESERVED, 0x10001014, register. This value is used for sanity check, so the bootloader will fail immediately if this value differs from runtime value. The value is used to determine max application size for updating. */
+#define BOOTLOADER_SETTINGS_ADDRESS         0x000FF000                  /**< The field specifies the page location of the bootloader settings address. */
+#define BOOTLOADER_MBR_PARAMS_PAGE_ADDRESS  0x000FE000                  /**< The field specifies the page location of the mbr params page address. */
+
+#define CODE_PAGE_SIZE                      0x1000                      /**< Size of a flash codepage. Used for size of the reserved flash space in the bootloader region. Will be runtime checked against NRF_UICR->CODEPAGESIZE to ensure the region is correct. */
+
 #else
 
 #error No target defined

nRF5_SDK_11.0.0_89a8197/components/libraries/crc16/crc16.c

@@ -1,15 +1,44 @@
-/* Copyright (c) 2013 Nordic Semiconductor. All Rights Reserved.
+/**
+ * Copyright (c) 2013 - 2017, Nordic Semiconductor ASA
  * 
- * The information contained herein is property of Nordic Semiconductor ASA.
+ * All rights reserved.
- * Terms and conditions of usage are described in detail in NORDIC
- * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
  * 
- * Licensees are granted free, non-transferable use of the information. NO
+ * Redistribution and use in source and binary forms, with or without modification,
- * WARRANTY of ANY KIND is provided. This heading must NOT be removed from
+ * are permitted provided that the following conditions are met:
- * the file.
+ * 
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ *    list of conditions and the following disclaimer.
+ * 
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ *    Semiconductor ASA integrated circuit in a product or a software update for
+ *    such product, must reproduce the above copyright notice, this list of
+ *    conditions and the following disclaimer in the documentation and/or other
+ *    materials provided with the distribution.
+ * 
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ *    contributors may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ * 
+ * 4. This software, with or without modification, must only be used with a
+ *    Nordic Semiconductor ASA integrated circuit.
+ * 
+ * 5. Any software provided in binary form under this license must not be reverse
+ *    engineered, decompiled, modified and/or disassembled.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  * 
  */
-
+#include "sdk_common.h"
+#if NRF_MODULE_ENABLED(CRC16)
 #include "crc16.h"
 
 #include <stdlib.h>
@@ -29,3 +58,4 @@ uint16_t crc16_compute(uint8_t const * p_data, uint32_t size, uint16_t const * p
 
     return crc;
 }
+#endif //NRF_MODULE_ENABLED(CRC16)

nRF5_SDK_11.0.0_89a8197/components/libraries/crc16/crc16.h

@@ -1,18 +1,45 @@
-/* Copyright (c) 2013 Nordic Semiconductor. All Rights Reserved.
+/**
+ * Copyright (c) 2013 - 2017, Nordic Semiconductor ASA
  * 
- * The information contained herein is property of Nordic Semiconductor ASA.
+ * All rights reserved.
- * Terms and conditions of usage are described in detail in NORDIC
- * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
  * 
- * Licensees are granted free, non-transferable use of the information. NO
+ * Redistribution and use in source and binary forms, with or without modification,
- * WARRANTY of ANY KIND is provided. This heading must NOT be removed from
+ * are permitted provided that the following conditions are met:
- * the file.
+ * 
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ *    list of conditions and the following disclaimer.
+ * 
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ *    Semiconductor ASA integrated circuit in a product or a software update for
+ *    such product, must reproduce the above copyright notice, this list of
+ *    conditions and the following disclaimer in the documentation and/or other
+ *    materials provided with the distribution.
+ * 
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ *    contributors may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ * 
+ * 4. This software, with or without modification, must only be used with a
+ *    Nordic Semiconductor ASA integrated circuit.
+ * 
+ * 5. Any software provided in binary form under this license must not be reverse
+ *    engineered, decompiled, modified and/or disassembled.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  * 
  */
- 
 /** @file
  *
- * @defgroup crc_compute CRC compute
+ * @defgroup crc16 CRC16 compute
  * @{
  * @ingroup hci_transport
  *
@@ -25,6 +52,10 @@
 
 #include <stdint.h>
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 /**@brief Function for calculating CRC-16 in blocks.
  *
  * Feed each consecutive data block into this function, along with the current value of p_crc as
@@ -39,6 +70,11 @@
  */
 uint16_t crc16_compute(uint8_t const * p_data, uint32_t size, uint16_t const * p_crc);
 
+
+#ifdef __cplusplus
+}
+#endif
+
 #endif // CRC16_H__
 
 /** @} */

nRF5_SDK_11.0.0_89a8197/components/libraries/fifo/app_fifo.c

@@ -1,18 +1,45 @@
-/* Copyright (c) 2013 Nordic Semiconductor. All Rights Reserved.
+/**
+ * Copyright (c) 2013 - 2017, Nordic Semiconductor ASA
  * 
- * The information contained herein is property of Nordic Semiconductor ASA.
+ * All rights reserved.
- * Terms and conditions of usage are described in detail in NORDIC
- * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
  * 
- * Licensees are granted free, non-transferable use of the information. NO
+ * Redistribution and use in source and binary forms, with or without modification,
- * WARRANTY of ANY KIND is provided. This heading must NOT be removed from
+ * are permitted provided that the following conditions are met:
- * the file.
+ * 
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ *    list of conditions and the following disclaimer.
+ * 
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ *    Semiconductor ASA integrated circuit in a product or a software update for
+ *    such product, must reproduce the above copyright notice, this list of
+ *    conditions and the following disclaimer in the documentation and/or other
+ *    materials provided with the distribution.
+ * 
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ *    contributors may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ * 
+ * 4. This software, with or without modification, must only be used with a
+ *    Nordic Semiconductor ASA integrated circuit.
+ * 
+ * 5. Any software provided in binary form under this license must not be reverse
+ *    engineered, decompiled, modified and/or disassembled.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  * 
  */
-
-#include "app_fifo.h"
 #include "sdk_common.h"
-#include "nordic_common.h"
+#if NRF_MODULE_ENABLED(APP_FIFO)
+#include "app_fifo.h"
 
 static __INLINE uint32_t fifo_length(app_fifo_t * p_fifo)
 {
@@ -21,7 +48,7 @@ static __INLINE uint32_t fifo_length(app_fifo_t * p_fifo)
 }
 
 
-#define FIFO_LENGTH fifo_length(p_fifo)  /**< Macro for calculating the FIFO length. */
+#define FIFO_LENGTH() fifo_length(p_fifo)  /**< Macro for calculating the FIFO length. */
 
 
 /**@brief Put one byte to the FIFO. */
@@ -72,7 +99,7 @@ uint32_t app_fifo_init(app_fifo_t * p_fifo, uint8_t * p_buf, uint16_t buf_size)
 
 uint32_t app_fifo_put(app_fifo_t * p_fifo, uint8_t byte)
 {
-    if (FIFO_LENGTH <= p_fifo->buf_size_mask)
+    if (FIFO_LENGTH() <= p_fifo->buf_size_mask)
     {
         fifo_put(p_fifo, byte);
         return NRF_SUCCESS;
@@ -84,7 +111,7 @@ uint32_t app_fifo_put(app_fifo_t * p_fifo, uint8_t byte)
 
 uint32_t app_fifo_get(app_fifo_t * p_fifo, uint8_t * p_byte)
 {
-    if (FIFO_LENGTH != 0)
+    if (FIFO_LENGTH() != 0)
     {
         fifo_get(p_fifo, p_byte);
         return NRF_SUCCESS;
@@ -97,7 +124,7 @@ uint32_t app_fifo_get(app_fifo_t * p_fifo, uint8_t * p_byte)
 
 uint32_t app_fifo_peek(app_fifo_t * p_fifo, uint16_t index, uint8_t * p_byte)
 {
-    if (FIFO_LENGTH > index)
+    if (FIFO_LENGTH() > index)
     {
         fifo_peek(p_fifo, index, p_byte);
         return NRF_SUCCESS;
@@ -184,3 +211,4 @@ uint32_t app_fifo_write(app_fifo_t * p_fifo, uint8_t const * p_byte_array, uint3
 
     return NRF_SUCCESS;
 }
+#endif //NRF_MODULE_ENABLED(APP_FIFO)

nRF5_SDK_11.0.0_89a8197/components/libraries/fifo/app_fifo.h

@@ -1,15 +1,42 @@
-/* Copyright (c) 2013 Nordic Semiconductor. All Rights Reserved.
+/**
+ * Copyright (c) 2013 - 2017, Nordic Semiconductor ASA
  * 
- * The information contained herein is property of Nordic Semiconductor ASA.
+ * All rights reserved.
- * Terms and conditions of usage are described in detail in NORDIC
- * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
  * 
- * Licensees are granted free, non-transferable use of the information. NO
+ * Redistribution and use in source and binary forms, with or without modification,
- * WARRANTY of ANY KIND is provided. This heading must NOT be removed from
+ * are permitted provided that the following conditions are met:
- * the file.
+ * 
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ *    list of conditions and the following disclaimer.
+ * 
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ *    Semiconductor ASA integrated circuit in a product or a software update for
+ *    such product, must reproduce the above copyright notice, this list of
+ *    conditions and the following disclaimer in the documentation and/or other
+ *    materials provided with the distribution.
+ * 
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ *    contributors may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ * 
+ * 4. This software, with or without modification, must only be used with a
+ *    Nordic Semiconductor ASA integrated circuit.
+ * 
+ * 5. Any software provided in binary form under this license must not be reverse
+ *    engineered, decompiled, modified and/or disassembled.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  * 
  */
-
 /**@file
  *
  * @defgroup app_fifo FIFO implementation
@@ -25,6 +52,10 @@
 #include <stdint.h>
 #include <stdlib.h>
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 /**@brief   A FIFO instance structure.
  * @details Keeps track of which bytes to read and write next.
  *          Also, it keeps the information about which memory is allocated for the buffer
@@ -140,6 +171,11 @@ uint32_t app_fifo_read(app_fifo_t * p_fifo, uint8_t * p_byte_array, uint32_t * p
  */
 uint32_t app_fifo_write(app_fifo_t * p_fifo, uint8_t const * p_byte_array, uint32_t * p_size);
 
+
+#ifdef __cplusplus
+}
+#endif
+
 #endif // APP_FIFO_H__
 
 /** @} */

nRF5_SDK_11.0.0_89a8197/components/libraries/timer/app_timer.c

@@ -40,7 +40,7 @@ STATIC_ASSERT(RTC1_IRQ_PRI == SWI_IRQ_PRI);
 #ifdef NRF51
 #define SWI_IRQn SWI0_IRQn
 #define SWI_IRQHandler SWI0_IRQHandler
-#elif defined NRF52
+#elif defined(NRF52832_XXAA) || defined(NRF52840_XXAA)
 #define SWI_IRQn SWI0_EGU0_IRQn
 #define SWI_IRQHandler SWI0_EGU0_IRQHandler
 #endif

nRF5_SDK_11.0.0_89a8197/components/libraries/timer/app_timer.h

@@ -279,7 +279,7 @@ uint32_t app_timer_cnt_diff_compute(uint32_t   ticks_to,
  *
  * @return Maximum number of events in queue observed so far.
  */
-uint16_t app_timer_op_queue_utilization_get(void);
+uint8_t app_timer_op_queue_utilization_get(void);
 #endif
 
 #endif // APP_TIMER_H__

nRF5_SDK_11.0.0_89a8197/components/libraries/uart/app_uart.c

@@ -1,33 +1,62 @@
-/* Copyright (c) 2015 Nordic Semiconductor. All Rights Reserved.
+/**
+ * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
  * 
- * The information contained herein is property of Nordic Semiconductor ASA.
+ * All rights reserved.
- * Terms and conditions of usage are described in detail in NORDIC
- * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
  * 
- * Licensees are granted free, non-transferable use of the information. NO
+ * Redistribution and use in source and binary forms, with or without modification,
- * WARRANTY of ANY KIND is provided. This heading must NOT be removed from
+ * are permitted provided that the following conditions are met:
- * the file.
+ * 
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ *    list of conditions and the following disclaimer.
+ * 
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ *    Semiconductor ASA integrated circuit in a product or a software update for
+ *    such product, must reproduce the above copyright notice, this list of
+ *    conditions and the following disclaimer in the documentation and/or other
+ *    materials provided with the distribution.
+ * 
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ *    contributors may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ * 
+ * 4. This software, with or without modification, must only be used with a
+ *    Nordic Semiconductor ASA integrated circuit.
+ * 
+ * 5. Any software provided in binary form under this license must not be reverse
+ *    engineered, decompiled, modified and/or disassembled.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  * 
  */
-
+#include "sdk_common.h"
+#if NRF_MODULE_ENABLED(APP_UART)
 #include "app_uart.h"
 #include "nrf_drv_uart.h"
 #include "nrf_assert.h"
-#include "sdk_common.h"
 
 static uint8_t tx_buffer[1];
 static uint8_t rx_buffer[1];
 static volatile bool rx_done;
 static app_uart_event_handler_t   m_event_handler;            /**< Event handler function. */
+static nrf_drv_uart_t app_uart_inst = NRF_DRV_UART_INSTANCE(APP_UART_DRIVER_INSTANCE);
 
-void uart_event_handler(nrf_drv_uart_event_t * p_event, void* p_context)
+static void uart_event_handler(nrf_drv_uart_event_t * p_event, void* p_context)
 {
     if (p_event->type == NRF_DRV_UART_EVT_RX_DONE)
     {
         app_uart_evt_t app_uart_event;
         app_uart_event.evt_type   = APP_UART_DATA;
         app_uart_event.data.value = p_event->data.rxtx.p_data[0];
-        (void)nrf_drv_uart_rx(rx_buffer,1);
+        (void)nrf_drv_uart_rx(&app_uart_inst, rx_buffer, 1);
         rx_done = true;
         m_event_handler(&app_uart_event);
     }
@@ -36,7 +65,7 @@ void uart_event_handler(nrf_drv_uart_event_t * p_event, void* p_context)
         app_uart_evt_t app_uart_event;
         app_uart_event.evt_type                 = APP_UART_COMMUNICATION_ERROR;
         app_uart_event.data.error_communication = p_event->data.error.error_mask;
-        (void)nrf_drv_uart_rx(rx_buffer,1);
+        (void)nrf_drv_uart_rx(&app_uart_inst, rx_buffer, 1);
         m_event_handler(&app_uart_event);
     }
     else if (p_event->type == NRF_DRV_UART_EVT_TX_DONE)
@@ -69,21 +98,25 @@ uint32_t app_uart_init(const app_uart_comm_params_t * p_comm_params,
 
     rx_done = false;
 
-    if (p_comm_params->flow_control == APP_UART_FLOW_CONTROL_LOW_POWER)
+    uint32_t err_code = nrf_drv_uart_init(&app_uart_inst, &config, uart_event_handler);
-    {
-        return NRF_ERROR_NOT_SUPPORTED;
-    }
-
-    uint32_t err_code = nrf_drv_uart_init(&config, uart_event_handler);
     VERIFY_SUCCESS(err_code);
 
-#ifdef NRF52
+    // Turn on receiver if RX pin is connected
+    if (p_comm_params->rx_pin_no != UART_PIN_DISCONNECTED)
+    {
+#ifdef UARTE_PRESENT
         if (!config.use_easy_dma)
 #endif
         {
-        nrf_drv_uart_rx_enable();
+            nrf_drv_uart_rx_enable(&app_uart_inst);
+        }
+
+        return nrf_drv_uart_rx(&app_uart_inst, rx_buffer,1);
+    }
+    else
+    {
+        return NRF_SUCCESS;
     }
-    return nrf_drv_uart_rx(rx_buffer,1);
 }
 
 
@@ -94,6 +127,7 @@ uint32_t app_uart_get(uint8_t * p_byte)
     if (rx_done)
     {
         *p_byte = rx_buffer[0];
+        rx_done = false;
     }
     else
     {
@@ -105,7 +139,7 @@ uint32_t app_uart_get(uint8_t * p_byte)
 uint32_t app_uart_put(uint8_t byte)
 {
     tx_buffer[0] = byte;
-    ret_code_t ret =  nrf_drv_uart_tx(tx_buffer,1);
+    ret_code_t ret =  nrf_drv_uart_tx(&app_uart_inst, tx_buffer, 1);
     if (NRF_ERROR_BUSY == ret)
     {
         return NRF_ERROR_NO_MEM;
@@ -127,6 +161,7 @@ uint32_t app_uart_flush(void)
 
 uint32_t app_uart_close(void)
 {
-    nrf_drv_uart_uninit();
+    nrf_drv_uart_uninit(&app_uart_inst);
     return NRF_SUCCESS;
 }
+#endif //NRF_MODULE_ENABLED(APP_UART)

nRF5_SDK_11.0.0_89a8197/components/libraries/uart/app_uart.h

@@ -1,15 +1,42 @@
-/* Copyright (c) 2013 Nordic Semiconductor. All Rights Reserved.
+/**
+ * Copyright (c) 2013 - 2017, Nordic Semiconductor ASA
  * 
- * The information contained herein is property of Nordic Semiconductor ASA.
+ * All rights reserved.
- * Terms and conditions of usage are described in detail in NORDIC
- * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
  * 
- * Licensees are granted free, non-transferable use of the information. NO
+ * Redistribution and use in source and binary forms, with or without modification,
- * WARRANTY of ANY KIND is provided. This heading must NOT be removed from
+ * are permitted provided that the following conditions are met:
- * the file.
+ * 
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ *    list of conditions and the following disclaimer.
+ * 
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ *    Semiconductor ASA integrated circuit in a product or a software update for
+ *    such product, must reproduce the above copyright notice, this list of
+ *    conditions and the following disclaimer in the documentation and/or other
+ *    materials provided with the distribution.
+ * 
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ *    contributors may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ * 
+ * 4. This software, with or without modification, must only be used with a
+ *    Nordic Semiconductor ASA integrated circuit.
+ * 
+ * 5. Any software provided in binary form under this license must not be reverse
+ *    engineered, decompiled, modified and/or disassembled.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  * 
  */
-
 /**@file
  *
  * @defgroup app_uart UART module
@@ -26,6 +53,10 @@
 #include <stdbool.h>
 #include "app_util_platform.h"
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 #define  UART_PIN_DISCONNECTED 0xFFFFFFFF /**< Value indicating that no pin is connected to this UART register. */
 
 /**@brief UART Flow Control modes for the peripheral.
@@ -34,17 +65,16 @@ typedef enum
 {
     APP_UART_FLOW_CONTROL_DISABLED, /**< UART Hw Flow Control is disabled. */
     APP_UART_FLOW_CONTROL_ENABLED,  /**< Standard UART Hw Flow Control is enabled. */
-    APP_UART_FLOW_CONTROL_LOW_POWER /**< Specialized UART Hw Flow Control is used. The Low Power setting allows the \nRFXX to Power Off the UART module when CTS is in-active, and re-enabling the UART when the CTS signal becomes active. This allows the \nRFXX to safe power by only using the UART module when it is needed by the remote site. */
 } app_uart_flow_control_t;
 
 /**@brief UART communication structure holding configuration settings for the peripheral.
  */
 typedef struct
 {
-    uint8_t                 rx_pin_no;    /**< RX pin number. */
+    uint32_t                rx_pin_no;    /**< RX pin number. */
-    uint8_t                 tx_pin_no;    /**< TX pin number. */
+    uint32_t                tx_pin_no;    /**< TX pin number. */
-    uint8_t                 rts_pin_no;   /**< RTS pin number, only used if flow control is enabled. */
+    uint32_t                rts_pin_no;   /**< RTS pin number, only used if flow control is enabled. */
-    uint8_t                 cts_pin_no;   /**< CTS pin number, only used if flow control is enabled. */
+    uint32_t                cts_pin_no;   /**< CTS pin number, only used if flow control is enabled. */
     app_uart_flow_control_t flow_control; /**< Flow control setting, if flow control is used, the system will use low power UART mode, based on CTS signal. */
     bool                    use_parity;   /**< Even parity if TRUE, no parity if FALSE. */
     uint32_t                baud_rate;    /**< Baud rate configuration. */
@@ -222,6 +252,11 @@ uint32_t app_uart_flush(void);
 uint32_t app_uart_close(void);
 
 
+
+#ifdef __cplusplus
+}
+#endif
+
 #endif //APP_UART_H__
 
 /** @} */

nRF5_SDK_11.0.0_89a8197/components/libraries/uart/app_uart_fifo.c

@@ -1,20 +1,50 @@
-/* Copyright (c) 2015 Nordic Semiconductor. All Rights Reserved.
+/**
+ * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
  * 
- * The information contained herein is property of Nordic Semiconductor ASA.
+ * All rights reserved.
- * Terms and conditions of usage are described in detail in NORDIC
- * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
  * 
- * Licensees are granted free, non-transferable use of the information. NO
+ * Redistribution and use in source and binary forms, with or without modification,
- * WARRANTY of ANY KIND is provided. This heading must NOT be removed from
+ * are permitted provided that the following conditions are met:
- * the file.
+ * 
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ *    list of conditions and the following disclaimer.
+ * 
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ *    Semiconductor ASA integrated circuit in a product or a software update for
+ *    such product, must reproduce the above copyright notice, this list of
+ *    conditions and the following disclaimer in the documentation and/or other
+ *    materials provided with the distribution.
+ * 
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ *    contributors may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ * 
+ * 4. This software, with or without modification, must only be used with a
+ *    Nordic Semiconductor ASA integrated circuit.
+ * 
+ * 5. Any software provided in binary form under this license must not be reverse
+ *    engineered, decompiled, modified and/or disassembled.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  * 
  */
-
+#include "sdk_common.h"
+#if NRF_MODULE_ENABLED(APP_UART)
 #include "app_uart.h"
 #include "app_fifo.h"
 #include "nrf_drv_uart.h"
 #include "nrf_assert.h"
-#include "sdk_common.h"
+
+static nrf_drv_uart_t app_uart_inst = NRF_DRV_UART_INSTANCE(APP_UART_DRIVER_INSTANCE);
 
 static __INLINE uint32_t fifo_length(app_fifo_t * const fifo)
 {
@@ -28,6 +58,7 @@ static __INLINE uint32_t fifo_length(app_fifo_t * const fifo)
 static app_uart_event_handler_t   m_event_handler;            /**< Event handler function. */
 static uint8_t tx_buffer[1];
 static uint8_t rx_buffer[1];
+static bool m_rx_ovf;
 
 static app_fifo_t                  m_rx_fifo;                               /**< RX FIFO buffer for storing data received on the UART until the application fetches them using app_uart_get(). */
 static app_fifo_t                  m_tx_fifo;                               /**< TX FIFO buffer for storing data to be transmitted on the UART when TXD is ready. Data is put to the buffer on using app_uart_put(). */
@@ -35,55 +66,66 @@ static app_fifo_t                  m_tx_fifo;                               /**<
 static void uart_event_handler(nrf_drv_uart_event_t * p_event, void* p_context)
 {
     app_uart_evt_t app_uart_event;
+    uint32_t err_code;
 
-    if (p_event->type == NRF_DRV_UART_EVT_RX_DONE)
+    switch (p_event->type)
     {
-        // Write received byte to FIFO
+        case NRF_DRV_UART_EVT_RX_DONE:
-        uint32_t err_code = app_fifo_put(&m_rx_fifo, p_event->data.rxtx.p_data[0]);
+            // Write received byte to FIFO.
+            err_code = app_fifo_put(&m_rx_fifo, p_event->data.rxtx.p_data[0]);
             if (err_code != NRF_SUCCESS)
             {
                 app_uart_event.evt_type          = APP_UART_FIFO_ERROR;
                 app_uart_event.data.error_code   = err_code;
                 m_event_handler(&app_uart_event);
             }
-        // Notify that new data is available if this was first byte put in the buffer.
+            // Notify that there are data available.
-        else if (FIFO_LENGTH(m_rx_fifo) == 1)
+            else if (FIFO_LENGTH(m_rx_fifo) != 0)
             {
                 app_uart_event.evt_type = APP_UART_DATA_READY;
                 m_event_handler(&app_uart_event);
             }
-        else
+
-        {
+            // Start new RX if size in buffer.
-            // Do nothing, only send event if first byte was added or overflow in FIFO occurred.
-        }
             if (FIFO_LENGTH(m_rx_fifo) <= m_rx_fifo.buf_size_mask)
             {
-            (void)nrf_drv_uart_rx(rx_buffer, 1);
+                (void)nrf_drv_uart_rx(&app_uart_inst, rx_buffer, 1);
             }
-    }
+            else
-    else if (p_event->type == NRF_DRV_UART_EVT_ERROR)
             {
+                // Overflow in RX FIFO.
+                m_rx_ovf = true;
+            }
+
+            break;
+
+        case NRF_DRV_UART_EVT_ERROR:
             app_uart_event.evt_type                 = APP_UART_COMMUNICATION_ERROR;
             app_uart_event.data.error_communication = p_event->data.error.error_mask;
-        (void)nrf_drv_uart_rx(rx_buffer, 1);
+            (void)nrf_drv_uart_rx(&app_uart_inst, rx_buffer, 1);
             m_event_handler(&app_uart_event);
-    }
+            break;
-    else if (p_event->type == NRF_DRV_UART_EVT_TX_DONE)
+
-    {
+        case NRF_DRV_UART_EVT_TX_DONE:
             // Get next byte from FIFO.
             if (app_fifo_get(&m_tx_fifo, tx_buffer) == NRF_SUCCESS)
             {
-            (void)nrf_drv_uart_tx(tx_buffer, 1);
+                (void)nrf_drv_uart_tx(&app_uart_inst, tx_buffer, 1);
             }
-        if (FIFO_LENGTH(m_tx_fifo) == 0)
+            else
             {
                 // Last byte from FIFO transmitted, notify the application.
                 app_uart_event.evt_type = APP_UART_TX_EMPTY;
                 m_event_handler(&app_uart_event);
             }
+            break;
+
+        default:
+            break;
     }
 }
 
+
 uint32_t app_uart_init(const app_uart_comm_params_t * p_comm_params,
                              app_uart_buffers_t *     p_buffers,
                              app_uart_event_handler_t event_handler,
@@ -117,17 +159,28 @@ uint32_t app_uart_init(const app_uart_comm_params_t * p_comm_params,
     config.pselrxd = p_comm_params->rx_pin_no;
     config.pseltxd = p_comm_params->tx_pin_no;
 
-    err_code = nrf_drv_uart_init(&config, uart_event_handler);
+    err_code = nrf_drv_uart_init(&app_uart_inst, &config, uart_event_handler);
     VERIFY_SUCCESS(err_code);
+    m_rx_ovf = false;
 
-#ifdef NRF52
+    // Turn on receiver if RX pin is connected
+    if (p_comm_params->rx_pin_no != UART_PIN_DISCONNECTED)
+    {
+#ifdef UARTE_PRESENT
         if (!config.use_easy_dma)
 #endif
         {
-        nrf_drv_uart_rx_enable();
+            nrf_drv_uart_rx_enable(&app_uart_inst);
         }
-    return nrf_drv_uart_rx(rx_buffer,1);
+
+        return nrf_drv_uart_rx(&app_uart_inst, rx_buffer,1);
     }
+    else
+    {
+        return NRF_SUCCESS;
+    }
+}
+
 
 uint32_t app_uart_flush(void)
 {
@@ -142,25 +195,31 @@ uint32_t app_uart_flush(void)
     return NRF_SUCCESS;
 }
 
+
 uint32_t app_uart_get(uint8_t * p_byte)
 {
     ASSERT(p_byte);
+    bool rx_ovf = m_rx_ovf;
+
+    ret_code_t err_code =  app_fifo_get(&m_rx_fifo, p_byte);
+
     // If FIFO was full new request to receive one byte was not scheduled. Must be done here.
-    if (FIFO_LENGTH(m_rx_fifo) == m_rx_fifo.buf_size_mask)
+    if (rx_ovf)
     {
-        uint32_t err_code = nrf_drv_uart_rx(rx_buffer,1);
+        m_rx_ovf = false;
-        if (err_code != NRF_SUCCESS)
+        uint32_t uart_err_code = nrf_drv_uart_rx(&app_uart_inst, rx_buffer, 1);
-        {
+
-            return NRF_ERROR_NOT_FOUND;
+        // RX resume should never fail.
+        APP_ERROR_CHECK(uart_err_code);
     }
+
+    return err_code;
 }
-    return app_fifo_get(&m_rx_fifo, p_byte);
+
-}
 
 uint32_t app_uart_put(uint8_t byte)
 {
     uint32_t err_code;
-
     err_code = app_fifo_put(&m_tx_fifo, byte);
     if (err_code == NRF_SUCCESS)
     {
@@ -168,7 +227,7 @@ uint32_t app_uart_put(uint8_t byte)
         // (in 'uart_event_handler') when all preceding bytes are transmitted.
         // But if UART is not transmitting anything at the moment, we must start
         // a new transmission here.
-        if (!nrf_drv_uart_tx_in_progress())
+        if (!nrf_drv_uart_tx_in_progress(&app_uart_inst))
         {
             // This operation should be almost always successful, since we've
             // just added a byte to FIFO, but if some bigger delay occurred
@@ -176,16 +235,17 @@ uint32_t app_uart_put(uint8_t byte)
             // that time, FIFO might be empty already.
             if (app_fifo_get(&m_tx_fifo, tx_buffer) == NRF_SUCCESS)
             {
-                err_code = nrf_drv_uart_tx(tx_buffer, 1);
+                err_code = nrf_drv_uart_tx(&app_uart_inst, tx_buffer, 1);
             }
         }
     }
-
     return err_code;
 }
 
+
 uint32_t app_uart_close(void)
 {
-    nrf_drv_uart_uninit();
+    nrf_drv_uart_uninit(&app_uart_inst);
     return NRF_SUCCESS;
 }
+#endif //NRF_MODULE_ENABLED(APP_UART)

nRF5_SDK_11.0.0_89a8197/components/libraries/uart/retarget.c

@@ -1,36 +1,72 @@
-/* Copyright (c) 2014 Nordic Semiconductor. All Rights Reserved.
+/**
+ * Copyright (c) 2014 - 2017, Nordic Semiconductor ASA
  * 
- * The information contained herein is property of Nordic Semiconductor ASA.
+ * All rights reserved.
- * Terms and conditions of usage are described in detail in NORDIC
- * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
  * 
- * Licensees are granted free, non-transferable use of the information. NO
+ * Redistribution and use in source and binary forms, with or without modification,
- * WARRANTY of ANY KIND is provided. This heading must NOT be removed from
+ * are permitted provided that the following conditions are met:
- * the file.
+ * 
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ *    list of conditions and the following disclaimer.
+ * 
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ *    Semiconductor ASA integrated circuit in a product or a software update for
+ *    such product, must reproduce the above copyright notice, this list of
+ *    conditions and the following disclaimer in the documentation and/or other
+ *    materials provided with the distribution.
+ * 
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ *    contributors may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ * 
+ * 4. This software, with or without modification, must only be used with a
+ *    Nordic Semiconductor ASA integrated circuit.
+ * 
+ * 5. Any software provided in binary form under this license must not be reverse
+ *    engineered, decompiled, modified and/or disassembled.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  * 
  */
-
+#include "sdk_common.h"
+/** @file
+ *
+ * @defgroup retarget Retarget layer for stdio functions
+ * @{
+ * @ingroup app_common
+ * @} */
+#if NRF_MODULE_ENABLED(RETARGET)
 #if !defined(NRF_LOG_USES_RTT) || NRF_LOG_USES_RTT != 1
 #if !defined(HAS_SIMPLE_UART_RETARGET)
 
+
 #include <stdio.h>
 #include <stdint.h>
 #include "app_uart.h"
-#include "nordic_common.h"
 #include "nrf_error.h"
 
-#if !defined(__ICCARM__)
-struct __FILE 
-{
-    int handle;
-};
-#endif
 
+#if defined(__CC_ARM)
+
+// This part is taken from MDK-ARM template file and is required here to prevent
+// linker from selecting libraries functions that use semihosting and failing
+// because of multiple definitions of fgetc() and fputc().
+// Refer to: http://www.keil.com/support/man/docs/gsac/gsac_retargetcortex.htm
+// -- BEGIN --
+struct __FILE { int handle; /* Add whatever you need here */ };
 FILE __stdout;
 FILE __stdin;
+// --- END ---
 
-
-#if defined(__CC_ARM) ||  defined(__ICCARM__)
 int fgetc(FILE * p_file)
 {
     uint8_t input;
@@ -41,7 +77,6 @@ int fgetc(FILE * p_file)
     return input;
 }
 
-
 int fputc(int ch, FILE * p_file)
 {
     UNUSED_PARAMETER(p_file);
@@ -50,8 +85,27 @@ int fputc(int ch, FILE * p_file)
     return ch;
 }
 
-#elif defined(__GNUC__)
+#elif defined(__GNUC__) && defined(__SES_ARM)
 
+int __getchar(FILE * p_file)
+{
+    uint8_t input;
+    while (app_uart_get(&input) == NRF_ERROR_NOT_FOUND)
+    {
+        // No implementation needed.
+    }
+    return input;
+}
+
+int __putchar(int ch, FILE * p_file)
+{
+    UNUSED_PARAMETER(p_file);
+
+    UNUSED_VARIABLE(app_uart_put((uint8_t)ch));
+    return ch;
+}
+
+#elif defined(__GNUC__) && !defined(__SES_ARM)
 
 int _write(int file, const char * p_char, int len)
 {
@@ -67,7 +121,6 @@ int _write(int file, const char * p_char, int len)
     return len;
 }
 
-
 int _read(int file, char * p_char, int len)
 {
     UNUSED_PARAMETER(file);
@@ -78,24 +131,46 @@ int _read(int file, char * p_char, int len)
 
     return 1;
 }
-#endif
+#elif defined(__ICCARM__)
 
-#if defined(__ICCARM__)
+size_t __write(int handle, const unsigned char * buffer, size_t size)
-
-__ATTRIBUTES size_t __write(int file, const unsigned char * p_char, size_t len)
 {
     int i;
-
+    UNUSED_PARAMETER(handle);
-    UNUSED_PARAMETER(file);
+    for (i = 0; i < size; i++)
-
-    for (i = 0; i < len; i++)
     {
-        UNUSED_VARIABLE(app_uart_put(*p_char++));
+        UNUSED_VARIABLE(app_uart_put(*buffer++));
+    }
+    return size;
 }
 
-    return len;
+size_t __read(int handle, unsigned char * buffer, size_t size)
+{
+    UNUSED_PARAMETER(handle);
+    UNUSED_PARAMETER(size);
+    while (app_uart_get((uint8_t *)buffer) == NRF_ERROR_NOT_FOUND)
+    {
+        // No implementation needed.
+    }
+
+    return 1;
+}
+
+long __lseek(int handle, long offset, int whence)
+{
+    return -1;
+}
+int __close(int handle)
+{
+    return 0;
+}
+int remove(const char * filename)
+{
+    return 0;
 }
 
 #endif
+
 #endif // !defined(HAS_SIMPLE_UART_RETARGET)
 #endif // NRF_LOG_USES_RTT != 1
+#endif //NRF_MODULE_ENABLED(RETARGET)

nRF5_SDK_11.0.0_89a8197/components/libraries/util/app_error.c

@@ -1,15 +1,42 @@
-/* Copyright (c) 2014 Nordic Semiconductor. All Rights Reserved.
+/**
+ * Copyright (c) 2014 - 2017, Nordic Semiconductor ASA
  * 
- * The information contained herein is property of Nordic Semiconductor ASA.
+ * All rights reserved.
- * Terms and conditions of usage are described in detail in NORDIC
- * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
  * 
- * Licensees are granted free, non-transferable use of the information. NO
+ * Redistribution and use in source and binary forms, with or without modification,
- * WARRANTY of ANY KIND is provided. This heading must NOT be removed from
+ * are permitted provided that the following conditions are met:
- * the file.
+ * 
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ *    list of conditions and the following disclaimer.
+ * 
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ *    Semiconductor ASA integrated circuit in a product or a software update for
+ *    such product, must reproduce the above copyright notice, this list of
+ *    conditions and the following disclaimer in the documentation and/or other
+ *    materials provided with the distribution.
+ * 
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ *    contributors may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ * 
+ * 4. This software, with or without modification, must only be used with a
+ *    Nordic Semiconductor ASA integrated circuit.
+ * 
+ * 5. Any software provided in binary form under this license must not be reverse
+ *    engineered, decompiled, modified and/or disassembled.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  * 
  */
-
 /** @file
  *
  * @defgroup app_error Common application error handler
@@ -24,14 +51,6 @@
 #include "app_error.h"
 #include "nordic_common.h"
 #include "sdk_errors.h"
-#include "nrf_log.h"
-
-#ifdef DEBUG
-#include "bsp.h"
-#endif
-
-
-
 /**@brief Function for error handling, which is called when an error has occurred.
  *
  * @warning This handler is an example only and does not fit a final product. You need to analyze
@@ -65,6 +84,7 @@ void app_error_handler_bare(ret_code_t error_code)
         .p_file_name = NULL,
         .err_code    = error_code,
     };
+
     app_error_fault_handler(NRF_FAULT_ID_SDK_ERROR, 0, (uint32_t)(&error_info));
 
     UNUSED_VARIABLE(error_info);
@@ -115,7 +135,6 @@ void app_error_save_and_stop(uint32_t id, uint32_t pc, uint32_t info)
 
     // If printing is disrupted, remove the irq calls, or set the loop variable to 0 in the debugger.
     __disable_irq();
-
     while (loop);
 
     __enable_irq();

nRF5_SDK_11.0.0_89a8197/components/libraries/util/app_error.h

@@ -1,15 +1,42 @@
-/* Copyright (c) 2013 Nordic Semiconductor. All Rights Reserved.
+/**
+ * Copyright (c) 2013 - 2017, Nordic Semiconductor ASA
  * 
- * The information contained herein is property of Nordic Semiconductor ASA.
+ * All rights reserved.
- * Terms and conditions of usage are described in detail in NORDIC
- * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
  * 
- * Licensees are granted free, non-transferable use of the information. NO
+ * Redistribution and use in source and binary forms, with or without modification,
- * WARRANTY of ANY KIND is provided. This heading must NOT be removed from
+ * are permitted provided that the following conditions are met:
- * the file.
+ * 
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ *    list of conditions and the following disclaimer.
+ * 
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ *    Semiconductor ASA integrated circuit in a product or a software update for
+ *    such product, must reproduce the above copyright notice, this list of
+ *    conditions and the following disclaimer in the documentation and/or other
+ *    materials provided with the distribution.
+ * 
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ *    contributors may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ * 
+ * 4. This software, with or without modification, must only be used with a
+ *    Nordic Semiconductor ASA integrated circuit.
+ * 
+ * 5. Any software provided in binary form under this license must not be reverse
+ *    engineered, decompiled, modified and/or disassembled.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  * 
  */
-
 /** @file
  *
  * @defgroup app_error Common application error handler
@@ -22,14 +49,23 @@
 #ifndef APP_ERROR_H__
 #define APP_ERROR_H__
 
+
 #include <stdint.h>
 #include <stdio.h>
 #include <stdbool.h>
 #include "nrf.h"
 #include "sdk_errors.h"
 #include "nordic_common.h"
-#include "nrf_log.h"
 #include "app_error_weak.h"
+#ifdef ANT_STACK_SUPPORT_REQD
+#include "ant_error.h"
+#endif // ANT_STACK_SUPPORT_REQD
+
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
 
 #define NRF_FAULT_ID_SDK_RANGE_START 0x00004000 /**< The start of the range of error IDs defined in the SDK. */
 
@@ -80,76 +116,6 @@ void app_error_handler_bare(ret_code_t error_code);
  */
 void app_error_save_and_stop(uint32_t id, uint32_t pc, uint32_t info);
 
-/**@brief       Function for printing all error info (using nrf_log).
- *
- * @details     Nrf_log library must be initialized using NRF_LOG_INIT macro before calling
- *              this function.
- *
- * @param[in] id    Fault identifier. See @ref NRF_FAULT_IDS.
- * @param[in] pc    The program counter of the instruction that triggered the fault, or 0 if
- *                  unavailable.
- * @param[in] info  Optional additional information regarding the fault. Refer to each fault
- *                  identifier for details.
- */
-static __INLINE void app_error_log(uint32_t id, uint32_t pc, uint32_t info)
-{
-    switch (id)
-    {
-        case NRF_FAULT_ID_SDK_ASSERT:
-            NRF_LOG(NRF_LOG_COLOR_RED "\n*** ASSERTION FAILED ***\n");
-            if (((assert_info_t *)(info))->p_file_name)
-            {
-                NRF_LOG_PRINTF(NRF_LOG_COLOR_WHITE "Line Number: %u\n", (unsigned int) ((assert_info_t *)(info))->line_num);
-                NRF_LOG_PRINTF("File Name:   %s\n", ((assert_info_t *)(info))->p_file_name);
-            }
-            NRF_LOG_PRINTF(NRF_LOG_COLOR_DEFAULT "\n");
-            break;
-
-        case NRF_FAULT_ID_SDK_ERROR:
-            NRF_LOG(NRF_LOG_COLOR_RED "\n*** APPLICATION ERROR *** \n" NRF_LOG_COLOR_WHITE);
-            if (((error_info_t *)(info))->p_file_name)
-            {
-                NRF_LOG_PRINTF("Line Number: %u\n", (unsigned int) ((error_info_t *)(info))->line_num);
-                NRF_LOG_PRINTF("File Name:   %s\n", ((error_info_t *)(info))->p_file_name);
-            }
-            NRF_LOG_PRINTF("Error Code:  0x%X\n" NRF_LOG_COLOR_DEFAULT "\n", (unsigned int) ((error_info_t *)(info))->err_code);
-            break;
-    }
-}
-
-/**@brief       Function for printing all error info (using printf).
- *
- * @param[in] id    Fault identifier. See @ref NRF_FAULT_IDS.
- * @param[in] pc    The program counter of the instruction that triggered the fault, or 0 if
- *                  unavailable.
- * @param[in] info  Optional additional information regarding the fault. Refer to each fault
- *                  identifier for details.
- */
-//lint -save -e438
-static __INLINE void app_error_print(uint32_t id, uint32_t pc, uint32_t info)
-{
-    unsigned int tmp = id;
-    printf("app_error_print():\r\n");
-    printf("Fault identifier:  0x%X\r\n", tmp);
-    printf("Program counter:   0x%X\r\n", tmp = pc);
-    printf("Fault information: 0x%X\r\n", tmp = info);
-
-    switch (id)
-    {
-        case NRF_FAULT_ID_SDK_ASSERT:
-            printf("Line Number: %u\r\n", tmp = ((assert_info_t *)(info))->line_num);
-            printf("File Name:   %s\r\n",       ((assert_info_t *)(info))->p_file_name);
-            break;
-
-        case NRF_FAULT_ID_SDK_ERROR:
-            printf("Line Number: %u\r\n",   tmp = ((error_info_t *)(info))->line_num);
-            printf("File Name:   %s\r\n",         ((error_info_t *)(info))->p_file_name);
-            printf("Error Code:  0x%X\r\n", tmp = ((error_info_t *)(info))->err_code);
-            break;
-    }
-}
-//lint -restore
-
 
 /**@brief Macro for calling error handler function.
  *
@@ -196,6 +162,11 @@ static __INLINE void app_error_print(uint32_t id, uint32_t pc, uint32_t info)
         }                                                     \
     } while (0)
 
+
+#ifdef __cplusplus
+}
+#endif
+
 #endif // APP_ERROR_H__
 
 /** @} */

nRF5_SDK_11.0.0_89a8197/components/libraries/util/app_util.h

@@ -1,15 +1,42 @@
-/* Copyright (c) 2012 Nordic Semiconductor. All Rights Reserved.
+/**
+ * Copyright (c) 2012 - 2017, Nordic Semiconductor ASA
  * 
- * The information contained herein is property of Nordic Semiconductor ASA.
+ * All rights reserved.
- * Terms and conditions of usage are described in detail in NORDIC
- * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
  * 
- * Licensees are granted free, non-transferable use of the information. NO
+ * Redistribution and use in source and binary forms, with or without modification,
- * WARRANTY of ANY KIND is provided. This heading must NOT be removed from
+ * are permitted provided that the following conditions are met:
- * the file.
+ * 
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ *    list of conditions and the following disclaimer.
+ * 
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ *    Semiconductor ASA integrated circuit in a product or a software update for
+ *    such product, must reproduce the above copyright notice, this list of
+ *    conditions and the following disclaimer in the documentation and/or other
+ *    materials provided with the distribution.
+ * 
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ *    contributors may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ * 
+ * 4. This software, with or without modification, must only be used with a
+ *    Nordic Semiconductor ASA integrated circuit.
+ * 
+ * 5. Any software provided in binary form under this license must not be reverse
+ *    engineered, decompiled, modified and/or disassembled.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  * 
  */
-
 /** @file
  *
  * @defgroup app_util Utility Functions and Definitions
@@ -24,11 +51,17 @@
 
 #include <stdint.h>
 #include <stdbool.h>
+#include <stddef.h>
 #include "compiler_abstraction.h"
+#include "nordic_common.h"
 #include "nrf.h"
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 //lint -save -e27 -e10 -e19
-#if defined ( __CC_ARM )
+#if defined ( __CC_ARM ) && !defined (__LINT__)
 extern char STACK$$Base;
 extern char STACK$$Length;
 #define STACK_BASE    &STACK$$Base
@@ -54,6 +87,13 @@ enum
 };
 
 
+/*Segger embedded studio originally has offsetof macro which cannot be used in macros (like STATIC_ASSERT).
+  This redefinition is to allow using that. */
+#if defined(__SES_ARM) && defined(__GNUC__)
+#undef offsetof
+#define offsetof(TYPE, MEMBER) __builtin_offsetof (TYPE, MEMBER)
+#endif
+
 /**@brief Implementation specific macro for delayed macro expansion used in string concatenation
 *
 * @param[in]   lhs   Left hand side in concatenation
@@ -72,46 +112,52 @@ enum
 #define STRING_CONCATENATE(lhs, rhs) STRING_CONCATENATE_IMPL(lhs, rhs)
 
 
-// Disable lint-warnings/errors for STATIC_ASSERT
+#ifndef __LINT__
-//lint --emacro(10,STATIC_ASSERT)
-//lint --emacro(18,STATIC_ASSERT)
-//lint --emacro(19,STATIC_ASSERT)
-//lint --emacro(30,STATIC_ASSERT)
-//lint --emacro(37,STATIC_ASSERT)
-//lint --emacro(42,STATIC_ASSERT)
-//lint --emacro(26,STATIC_ASSERT)
-//lint --emacro(102,STATIC_ASSERT)
-//lint --emacro(533,STATIC_ASSERT)
-//lint --emacro(534,STATIC_ASSERT)
-//lint --emacro(132,STATIC_ASSERT)
-//lint --emacro(414,STATIC_ASSERT)
-//lint --emacro(578,STATIC_ASSERT)
-//lint --emacro(628,STATIC_ASSERT)
-//lint --emacro(648,STATIC_ASSERT)
-//lint --emacro(830,STATIC_ASSERT)
 
+#ifdef __GNUC__
+#define STATIC_ASSERT_SIMPLE(EXPR)      _Static_assert(EXPR, "unspecified message")
+#define STATIC_ASSERT_MSG(EXPR, MSG)    _Static_assert(EXPR, MSG)
+#endif
 
-/**@brief Macro for doing static (i.e. compile time) assertion.
+#ifdef __CC_ARM
-*
+#define STATIC_ASSERT_SIMPLE(EXPR)      extern char (*_do_assert(void)) [sizeof(char[1 - 2*!(EXPR)])]
-* @note If the EXPR isn't resolvable, then the error message won't be shown.
+#define STATIC_ASSERT_MSG(EXPR, MSG)    extern char (*_do_assert(void)) [sizeof(char[1 - 2*!(EXPR)])]
-*
+#endif
-* @note The output of STATIC_ASSERT will be different across different compilers.
-*
-* @param[in] EXPR Constant expression to be verified.
-*/
-#if defined ( __COUNTER__ )
 
-#define STATIC_ASSERT(EXPR) \
+#ifdef __ICCARM__
-    ;enum { STRING_CONCATENATE(static_assert_, __COUNTER__) = 1/(!!(EXPR)) }
+#define STATIC_ASSERT_SIMPLE(EXPR)      static_assert(EXPR, "unspecified message")
+#define STATIC_ASSERT_MSG(EXPR, MSG)    static_assert(EXPR, MSG)
+#endif
 
-#else
+#else // __LINT__
 
-#define STATIC_ASSERT(EXPR) \
+#define STATIC_ASSERT_SIMPLE(EXPR)      extern char (*_ignore(void))
-    ;enum { STRING_CONCATENATE(assert_line_, __LINE__) = 1/(!!(EXPR)) }
+#define STATIC_ASSERT_MSG(EXPR, MSG)    extern char (*_ignore(void))
 
 #endif
 
 
+#define _SELECT_ASSERT_FUNC(x, EXPR, MSG, ASSERT_MACRO, ...) ASSERT_MACRO
+
+/**
+ * @brief   Static (i.e. compile time) assert macro.
+ *
+ * @note The output of STATIC_ASSERT can be different across compilers.
+ *
+ * Usage:
+ * STATIC_ASSERT(expression);
+ * STATIC_ASSERT(expression, message);
+ *
+ * @hideinitializer
+ */
+//lint -save -esym(???, STATIC_ASSERT)
+#define STATIC_ASSERT(...)                                                                          \
+    _SELECT_ASSERT_FUNC(x, ##__VA_ARGS__,                                                           \
+                        STATIC_ASSERT_MSG(__VA_ARGS__),                                             \
+                        STATIC_ASSERT_SIMPLE(__VA_ARGS__))
+//lint -restore
+
+
 /**@brief Implementation details for NUM_VAR_ARGS */
 #define NUM_VA_ARGS_IMPL(                              \
     _0, _1, _2, _3, _4, _5, _6, _7, _8, _9, _10,       \
@@ -137,6 +183,32 @@ enum
     20, 19, 18, 17, 16, 15, 14, 13, 12, 11,                         \
     10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0)
 
+/**@brief Implementation details for NUM_VAR_ARGS */
+#define NUM_VA_ARGS_LESS_1_IMPL(                       \
+    _ignored,                                          \
+    _0, _1, _2, _3, _4, _5, _6, _7, _8, _9, _10,       \
+    _11, _12, _13, _14, _15, _16, _17, _18, _19, _20,  \
+    _21, _22, _23, _24, _25, _26, _27, _28, _29, _30,  \
+    _31, _32, _33, _34, _35, _36, _37, _38, _39, _40,  \
+    _41, _42, _43, _44, _45, _46, _47, _48, _49, _50,  \
+    _51, _52, _53, _54, _55, _56, _57, _58, _59, _60,  \
+    _61, _62, N, ...) N
+
+/**@brief Macro to get the number of arguments in a call variadic macro call.
+ * First argument is not counted.
+ *
+ * param[in]    ...     List of arguments
+ *
+ * @retval  Number of variadic arguments in the argument list
+ */
+#define NUM_VA_ARGS_LESS_1(...) NUM_VA_ARGS_LESS_1_IMPL(__VA_ARGS__, 63, 62, 61,  \
+    60, 59, 58, 57, 56, 55, 54, 53, 52, 51,                         \
+    50, 49, 48, 47, 46, 45, 44, 43, 42, 41,                         \
+    40, 39, 38, 37, 36, 35, 34, 33, 32, 31,                         \
+    30, 29, 28, 27, 26, 25, 24, 23, 22, 21,                         \
+    20, 19, 18, 17, 16, 15, 14, 13, 12, 11,                         \
+    10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0, ~)
+
 
 /**@brief type for holding an encoded (i.e. little endian) 16 bit unsigned integer. */
 typedef uint8_t uint16_le_t[2];
@@ -227,6 +299,509 @@ typedef struct
  */
 #define ALIGN_NUM(alignment, number) ((number - 1) + alignment - ((number - 1) % alignment))
 
+/**@brief Macro for getting first of 2 parameters.
+ *
+ * @param[in] a1    First parameter.
+ * @param[in] a2    Second parameter.
+ */
+#define GET_ARG_1(a1, a2) a1
+
+/**@brief Macro for getting second of 2 parameters.
+ *
+ * @param[in] a1    First parameter.
+ * @param[in] a2    Second parameter.
+ */
+#define GET_ARG_2(a1, a2) a2
+
+
+/**@brief Container of macro (borrowed from Linux kernel).
+ *
+ * This macro returns parent structure address basing on child member address.
+ *
+ * @param ptr       Address of child type.
+ * @param type      Type of parent structure.
+ * @param member    Name of child field in parent structure.
+ *
+ * @return Parent structure address.
+ * */
+#define CONTAINER_OF(ptr, type, member)                 \
+        (type *)((char *)ptr - offsetof(type, member))
+
+
+/**
+ * @brief Define Bit-field mask
+ *
+ * Macro that defined the mask with selected number of bits set, starting from
+ * provided bit number.
+ *
+ * @param[in] bcnt Number of bits in the bit-field
+ * @param[in] boff Lowest bit number
+ */
+#define BF_MASK(bcnt, boff) ( ((1U << (bcnt)) - 1U) << (boff) )
+
+/**
+ * @brief Get bit-field
+ *
+ * Macro that extracts selected bit-field from provided value
+ *
+ * @param[in] val  Value from witch selected bit-field would be extracted
+ * @param[in] bcnt Number of bits in the bit-field
+ * @param[in] boff Lowest bit number
+ *
+ * @return Value of the selected bits
+ */
+#define BF_GET(val, bcnt, boff) ( ( (val) & BF_MASK((bcnt), (boff)) ) >> (boff) )
+
+/**
+ * @brief Create bit-field value
+ *
+ * Value is masked and shifted to match given bit-field
+ *
+ * @param[in] val  Value to set on bit-field
+ * @param[in] bcnt Number of bits for bit-field
+ * @param[in] boff Offset of bit-field
+ *
+ * @return Value positioned of given bit-field.
+ */
+#define BF_VAL(val, bcnt, boff) ( (((uint32_t)(val)) << (boff)) & BF_MASK(bcnt, boff) )
+
+/**
+ * @name Configuration of complex bit-field
+ *
+ * @sa BF_CX
+ * @{
+ */
+/** @brief Position of bit count in complex bit-field value */
+#define BF_CX_BCNT_POS  0U
+/** @brief Mask of bit count in complex bit-field value */
+#define BF_CX_BCNT_MASK (0xffU << BF_CX_BCNT_POS)
+/** @brief Position of bit position in complex bit-field value */
+#define BF_CX_BOFF_POS  8U
+/** @brief Mask of bit position in complex bit-field value */
+#define BF_CX_BOFF_MASK (0xffU << BF_CX_BOFF_POS)
+/** @} */
+
+/**
+ * @brief Define complex bit-field
+ *
+ * Complex bit-field would contain its position and size in one number.
+ * @sa BF_CX_MASK
+ * @sa BF_CX_POS
+ * @sa BF_CX_GET
+ *
+ * @param[in] bcnt Number of bits in the bit-field
+ * @param[in] boff Lowest bit number
+ *
+ * @return The single number that describes the bit-field completely.
+ */
+#define BF_CX(bcnt, boff) ( ((((uint32_t)(bcnt)) << BF_CX_BCNT_POS) & BF_CX_BCNT_MASK) | ((((uint32_t)(boff)) << BF_CX_BOFF_POS) & BF_CX_BOFF_MASK) )
+
+/**
+ * @brief Get number of bits in bit-field
+ *
+ * @sa BF_CX
+ *
+ * @param bf_cx Complex bit-field
+ *
+ * @return Number of bits in given bit-field
+ */
+#define BF_CX_BCNT(bf_cx) ( ((bf_cx) & BF_CX_BCNT_MASK) >> BF_CX_BCNT_POS )
+
+/**
+ * @brief Get lowest bit number in the field
+ *
+ * @sa BF_CX
+ *
+ * @param[in] bf_cx Complex bit-field
+ *
+ * @return Lowest bit number in given bit-field
+ */
+#define BF_CX_BOFF(bf_cx) ( ((bf_cx) & BF_CX_BOFF_MASK) >> BF_CX_BOFF_POS )
+
+/**
+ * @brief Get bit mask of the selected field
+ *
+ * @sa BF_CX
+ *
+ * @param[in] bf_cx Complex bit-field
+ *
+ * @return Mask of given bit-field
+ */
+#define BF_CX_MASK(bf_cx) BF_MASK(BF_CX_BCNT(bf_cx), BF_CX_BOFF(bf_cx))
+
+/**
+ * @brief Get bit-field
+ *
+ * Macro that extracts selected bit-field from provided value.
+ * Bit-field is given as a complex value.
+ *
+ * @sa BF_CX
+ * @sa BF_GET
+ *
+ * @param[in] val   Value from witch selected bit-field would be extracted
+ * @param[in] bf_cx Complex bit-field
+ *
+ * @return Value of the selected bits.
+ */
+#define BF_CX_GET(val, bf_cx) BF_GET(val, BF_CX_BCNT(bf_cx), BF_CX_BOFF(bf_cx))
+
+/**
+ * @brief Create bit-field value
+ *
+ * Value is masked and shifted to match given bit-field.
+ *
+ * @param[in] val  Value to set on bit-field
+ * @param[in] bf_cx Complex bit-field
+ *
+ * @return Value positioned of given bit-field.
+ */
+#define BF_CX_VAL(val, bf_cx) BF_VAL(val, BF_CX_BCNT(bf_cx), BF_CX_BOFF(bf_cx))
+
+/**
+ * @brief Extracting data from the brackets
+ *
+ * This macro get rid of brackets around the argument.
+ * It can be used to pass multiple arguments in logical one argument to a macro.
+ * Call it with arguments inside brackets:
+ * @code
+ * #define ARGUMENTS (a, b, c)
+ * BRACKET_EXTRACT(ARGUMENTS)
+ * @endcode
+ * It would produce:
+ * @code
+ * a, b, c
+ * @endcode
+ *
+ * @param a Argument with anything inside brackets
+ * @return Anything that appears inside the brackets of the argument
+ *
+ * @note
+ * The argument of the macro have to be inside brackets.
+ * In other case the compilation would fail.
+ */
+#define BRACKET_EXTRACT(a)  BRACKET_EXTRACT_(a)
+#define BRACKET_EXTRACT_(a) BRACKET_EXTRACT__ a
+#define BRACKET_EXTRACT__(...) __VA_ARGS__
+
+
+/**
+ * @brief Check if number of parameters is more than 1
+ *
+ * @param ... Arguments to count
+ *
+ * @return 0 If argument count is <= 1
+ * @return 1 If argument count is > 1
+ *
+ * @sa NUM_VA_ARGS
+ * @sa NUM_IS_MORE_THAN_1
+ */
+#define NUM_VA_ARGS_IS_MORE_THAN_1(...) NUM_IS_MORE_THAN_1(NUM_VA_ARGS(__VA_ARGS__))
+
+/**
+ * @brief Check if given numeric value is bigger than 1
+ *
+ * This macro accepts numeric value, that may be the result of argument expansion.
+ * This numeric value is then converted to 0 if it is lover than 1 or to 1 if
+ * its value is higher than 1.
+ * The generated result can be used to glue it into other macro mnemonic name.
+ *
+ * @param N Numeric value to check
+ *
+ * @return 0 If argument is <= 1
+ * @return 1 If argument is > 1
+ *
+ * @note Any existing definition of a form NUM_IS_MORE_THAN_1_PROBE_[N] can
+ *       broke the result of this macro
+ */
+#define NUM_IS_MORE_THAN_1(N) NUM_IS_MORE_THAN_1_(N)
+#define NUM_IS_MORE_THAN_1_(N)  NUM_IS_MORE_THAN_1_PROBE_(NUM_IS_MORE_THAN_1_PROBE_ ## N, 1)
+#define NUM_IS_MORE_THAN_1_PROBE_(...) GET_VA_ARG_1(GET_ARGS_AFTER_1(__VA_ARGS__))
+#define NUM_IS_MORE_THAN_1_PROBE_0 ~, 0
+#define NUM_IS_MORE_THAN_1_PROBE_1 ~, 0
+
+/**
+ * @brief Get the first argument
+ *
+ * @param ... Arguments to select
+ *
+ * @return First argument or empty if no arguments are provided
+ */
+#define GET_VA_ARG_1(...) GET_VA_ARG_1_(__VA_ARGS__, ) // Make sure that also for 1 argument it works
+#define GET_VA_ARG_1_(a1, ...) a1
+
+/**
+ * @brief Get all the arguments but the first one
+ *
+ * @param ... Arguments to select
+ *
+ * @return All arguments after the first one or empty if less than 2 arguments are provided
+ */
+#define GET_ARGS_AFTER_1(...) GET_ARGS_AFTER_1_(__VA_ARGS__, ) // Make sure that also for 1 argument it works
+#define GET_ARGS_AFTER_1_(a1, ...) __VA_ARGS__
+
+/**
+ * @brief Size of a field in declared structure
+ *
+ * Macro that returns the size of the structure field.
+ * @param struct_type Variable type to get the field size from
+ * @param field Field name to analyze. It can be even field inside field (field.somethingelse.and_another).
+ *
+ * @return Size of the field
+ */
+#define FIELD_SIZE(struct_type, field) sizeof(((struct struct_type*)NULL)->field)
+
+/**
+ * @brief Number of elements in field array in declared structure
+ *
+ * Macro that returns number of elementy in structure field.
+ * @param struct_type Variable type to get the field size from
+ * @param field Field name to analyze.
+ *
+ * @return Number of elements in field array
+ *
+ * @sa FIELD_SIZE
+ */
+#define FIELD_ARRAY_SIZE(struct_type, field) (FIELD_SIZE(struct_type, field) / FIELD_SIZE(struct_type, field[0]))
+
+/**
+ * @brief Mapping macro
+ *
+ * Macro that process all arguments using given macro
+ *
+ * @param ... Macro name to be used for argument processing followed by arguments to process.
+ *            Macro should have following form: MACRO(argument)
+ *
+ * @return All arguments processed by given macro
+ */
+#define MACRO_MAP(...) MACRO_MAP_(__VA_ARGS__)
+#define MACRO_MAP_(...) MACRO_MAP_N(NUM_VA_ARGS_LESS_1(__VA_ARGS__), __VA_ARGS__) // To make sure it works also for 2 arguments in total
+
+/**
+ * @brief Mapping macro, recursive version
+ *
+ *  Can be used in @ref MACRO_MAP macro
+ */
+#define MACRO_MAP_REC(...) MACRO_MAP_REC_(__VA_ARGS__)
+#define MACRO_MAP_REC_(...) MACRO_MAP_REC_N(NUM_VA_ARGS_LESS_1(__VA_ARGS__), __VA_ARGS__) // To make sure it works also for 2 arguments in total
+/**
+ * @brief Mapping N arguments macro
+ *
+ * Macro similar to @ref MACRO_MAP but maps exact number of arguments.
+ * If there is more arguments given, the rest would be ignored.
+ *
+ * @param N   Number of arguments to map
+ * @param ... Macro name to be used for argument processing followed by arguments to process.
+ *            Macro should have following form: MACRO(argument)
+ *
+ * @return Selected number of arguments processed by given macro
+ */
+#define MACRO_MAP_N(N, ...) MACRO_MAP_N_(N, __VA_ARGS__)
+#define MACRO_MAP_N_(N, ...) CONCAT_2(MACRO_MAP_, N)(__VA_ARGS__, )
+
+/**
+ * @brief Mapping N arguments macro, recursive version
+ *
+ *  Can be used in @ref MACRO_MAP_N macro
+ */
+#define MACRO_MAP_REC_N(N, ...) MACRO_MAP_REC_N_(N, __VA_ARGS__)
+#define MACRO_MAP_REC_N_(N, ...) CONCAT_2(MACRO_MAP_REC_, N)(__VA_ARGS__, )
+
+#define MACRO_MAP_0(           ...)
+#define MACRO_MAP_1( macro, a, ...) macro(a)
+#define MACRO_MAP_2( macro, a, ...) macro(a) MACRO_MAP_1 (macro, __VA_ARGS__, )
+#define MACRO_MAP_3( macro, a, ...) macro(a) MACRO_MAP_2 (macro, __VA_ARGS__, )
+#define MACRO_MAP_4( macro, a, ...) macro(a) MACRO_MAP_3 (macro, __VA_ARGS__, )
+#define MACRO_MAP_5( macro, a, ...) macro(a) MACRO_MAP_4 (macro, __VA_ARGS__, )
+#define MACRO_MAP_6( macro, a, ...) macro(a) MACRO_MAP_5 (macro, __VA_ARGS__, )
+#define MACRO_MAP_7( macro, a, ...) macro(a) MACRO_MAP_6 (macro, __VA_ARGS__, )
+#define MACRO_MAP_8( macro, a, ...) macro(a) MACRO_MAP_7 (macro, __VA_ARGS__, )
+#define MACRO_MAP_9( macro, a, ...) macro(a) MACRO_MAP_8 (macro, __VA_ARGS__, )
+#define MACRO_MAP_10(macro, a, ...) macro(a) MACRO_MAP_9 (macro, __VA_ARGS__, )
+#define MACRO_MAP_11(macro, a, ...) macro(a) MACRO_MAP_10(macro, __VA_ARGS__, )
+#define MACRO_MAP_12(macro, a, ...) macro(a) MACRO_MAP_11(macro, __VA_ARGS__, )
+#define MACRO_MAP_13(macro, a, ...) macro(a) MACRO_MAP_12(macro, __VA_ARGS__, )
+#define MACRO_MAP_14(macro, a, ...) macro(a) MACRO_MAP_13(macro, __VA_ARGS__, )
+#define MACRO_MAP_15(macro, a, ...) macro(a) MACRO_MAP_14(macro, __VA_ARGS__, )
+
+#define MACRO_MAP_REC_0(           ...)
+#define MACRO_MAP_REC_1( macro, a, ...) macro(a)
+#define MACRO_MAP_REC_2( macro, a, ...) macro(a) MACRO_MAP_REC_1 (macro, __VA_ARGS__, )
+#define MACRO_MAP_REC_3( macro, a, ...) macro(a) MACRO_MAP_REC_2 (macro, __VA_ARGS__, )
+#define MACRO_MAP_REC_4( macro, a, ...) macro(a) MACRO_MAP_REC_3 (macro, __VA_ARGS__, )
+#define MACRO_MAP_REC_5( macro, a, ...) macro(a) MACRO_MAP_REC_4 (macro, __VA_ARGS__, )
+#define MACRO_MAP_REC_6( macro, a, ...) macro(a) MACRO_MAP_REC_5 (macro, __VA_ARGS__, )
+#define MACRO_MAP_REC_7( macro, a, ...) macro(a) MACRO_MAP_REC_6 (macro, __VA_ARGS__, )
+#define MACRO_MAP_REC_8( macro, a, ...) macro(a) MACRO_MAP_REC_7 (macro, __VA_ARGS__, )
+#define MACRO_MAP_REC_9( macro, a, ...) macro(a) MACRO_MAP_REC_8 (macro, __VA_ARGS__, )
+#define MACRO_MAP_REC_10(macro, a, ...) macro(a) MACRO_MAP_REC_9 (macro, __VA_ARGS__, )
+#define MACRO_MAP_REC_11(macro, a, ...) macro(a) MACRO_MAP_REC_10(macro, __VA_ARGS__, )
+#define MACRO_MAP_REC_12(macro, a, ...) macro(a) MACRO_MAP_REC_11(macro, __VA_ARGS__, )
+#define MACRO_MAP_REC_13(macro, a, ...) macro(a) MACRO_MAP_REC_12(macro, __VA_ARGS__, )
+#define MACRO_MAP_REC_14(macro, a, ...) macro(a) MACRO_MAP_REC_13(macro, __VA_ARGS__, )
+#define MACRO_MAP_REC_15(macro, a, ...) macro(a) MACRO_MAP_REC_14(macro, __VA_ARGS__, )
+
+/**
+ * @brief Mapping macro with current index
+ *
+ * Basically macro similar to @ref MACRO_MAP, but the processing function would get an argument
+ * and current argument index (beginning from 0).
+ *
+ * @param ... Macro name to be used for argument processing followed by arguments to process.
+ *            Macro should have following form: MACRO(argument, index)
+ * @return All arguments processed by given macro
+ */
+#define MACRO_MAP_FOR(...) MACRO_MAP_FOR_(__VA_ARGS__)
+#define MACRO_MAP_FOR_N_LIST 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15
+#define MACRO_MAP_FOR_(...) MACRO_MAP_FOR_N(NUM_VA_ARGS_LESS_1(__VA_ARGS__), __VA_ARGS__)
+
+/**
+ * @brief Mapping N arguments macro with current index
+ *
+ * Macro is similar to @ref MACRO_MAP_FOR but maps exact number of arguments.
+ * If there is more arguments given, the rest would be ignored.
+ *
+ * @param N   Number of arguments to map
+ * @param ... Macro name to be used for argument processing followed by arguments to process.
+ *            Macro should have following form: MACRO(argument, index)
+ *
+ * @return Selected number of arguments processed by given macro
+ */
+#define MACRO_MAP_FOR_N(N, ...) MACRO_MAP_FOR_N_(N, __VA_ARGS__)
+#define MACRO_MAP_FOR_N_(N, ...) CONCAT_2(MACRO_MAP_FOR_, N)((MACRO_MAP_FOR_N_LIST), __VA_ARGS__, )
+
+#define MACRO_MAP_FOR_0( n_list,           ...)
+#define MACRO_MAP_FOR_1( n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)))
+#define MACRO_MAP_FOR_2( n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_1 ((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, )
+#define MACRO_MAP_FOR_3( n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_2 ((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, )
+#define MACRO_MAP_FOR_4( n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_3 ((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, )
+#define MACRO_MAP_FOR_5( n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_4 ((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, )
+#define MACRO_MAP_FOR_6( n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_5 ((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, )
+#define MACRO_MAP_FOR_7( n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_6 ((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, )
+#define MACRO_MAP_FOR_8( n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_7 ((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, )
+#define MACRO_MAP_FOR_9( n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_8 ((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, )
+#define MACRO_MAP_FOR_10(n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_9 ((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, )
+#define MACRO_MAP_FOR_11(n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_10((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, )
+#define MACRO_MAP_FOR_12(n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_11((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, )
+#define MACRO_MAP_FOR_13(n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_12((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, )
+#define MACRO_MAP_FOR_14(n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_13((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, )
+#define MACRO_MAP_FOR_15(n_list, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list))) MACRO_MAP_FOR_14((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__, )
+
+
+/**
+ * @brief Mapping macro with current index and parameter
+ *
+ * Version of @ref MACRO_MAP_FOR that passes also the same parameter to all macros.
+ *
+ * @param param Parameter that would be passed to each macro call during mapping.
+ * @param ...   Macro name to be used for argument processing followed by arguments to process.
+ *              Macro should have following form: MACRO(argument, index, param)
+ *
+ * @return All arguments processed by given macro
+ */
+#define MACRO_MAP_FOR_PARAM(param, ...) MACRO_MAP_FOR_PARAM_(param, __VA_ARGS__)
+#define MACRO_MAP_FOR_PARAM_(param, ...) MACRO_MAP_FOR_PARAM_N(NUM_VA_ARGS_LESS_1(__VA_ARGS__), param, __VA_ARGS__)
+
+/**
+ * @brief Mapping N arguments macro with with current index and parameter
+ *
+ * @param N     Number of arguments to map
+ * @param param Parameter that would be passed to each macro call during mapping.
+ * @param ...   Macro name to be used for argument processing followed by arguments to process.
+ *              Macro should have following form: MACRO(argument, index, param)
+ *
+ * @return All arguments processed by given macro
+ */
+#define MACRO_MAP_FOR_PARAM_N(N, param, ...) MACRO_MAP_FOR_PARAM_N_(N, param, __VA_ARGS__)
+#define MACRO_MAP_FOR_PARAM_N_(N, param, ...) CONCAT_2(MACRO_MAP_FOR_PARAM_, N)((MACRO_MAP_FOR_N_LIST), param, __VA_ARGS__, )
+
+
+#define MACRO_MAP_FOR_PARAM_0( n_list, param, ...)
+#define MACRO_MAP_FOR_PARAM_1( n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param)
+#define MACRO_MAP_FOR_PARAM_2( n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_1 ((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, )
+#define MACRO_MAP_FOR_PARAM_3( n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_2 ((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, )
+#define MACRO_MAP_FOR_PARAM_4( n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_3 ((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, )
+#define MACRO_MAP_FOR_PARAM_5( n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_4 ((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, )
+#define MACRO_MAP_FOR_PARAM_6( n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_5 ((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, )
+#define MACRO_MAP_FOR_PARAM_7( n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_6 ((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, )
+#define MACRO_MAP_FOR_PARAM_8( n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_7 ((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, )
+#define MACRO_MAP_FOR_PARAM_9( n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_8 ((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, )
+#define MACRO_MAP_FOR_PARAM_10(n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_9 ((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, )
+#define MACRO_MAP_FOR_PARAM_11(n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_10((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, )
+#define MACRO_MAP_FOR_PARAM_12(n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_11((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, )
+#define MACRO_MAP_FOR_PARAM_13(n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_12((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, )
+#define MACRO_MAP_FOR_PARAM_14(n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_13((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, )
+#define MACRO_MAP_FOR_PARAM_15(n_list, param, macro, a, ...) macro(a, GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), param) MACRO_MAP_FOR_PARAM_14((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), param, macro, __VA_ARGS__, )
+
+
+/**
+ * @brief Repeating macro.
+ *
+ * @param count Count of repeats.
+ * @param macro Macro must have the following form: MACRO(arguments).
+ * @param ...   Arguments passed to the macro.
+ *
+ * @return All arguments processed by the given macro.
+ */
+#define MACRO_REPEAT(count, macro, ...)     MACRO_REPEAT_(count, macro, __VA_ARGS__)
+#define MACRO_REPEAT_(count, macro, ...)    CONCAT_2(MACRO_REPEAT_, count)(macro, __VA_ARGS__)
+
+#define MACRO_REPEAT_0(macro, ...)
+#define MACRO_REPEAT_1(macro, ...)  macro(__VA_ARGS__) MACRO_REPEAT_0(macro, __VA_ARGS__)
+#define MACRO_REPEAT_2(macro, ...)  macro(__VA_ARGS__) MACRO_REPEAT_1(macro, __VA_ARGS__)
+#define MACRO_REPEAT_3(macro, ...)  macro(__VA_ARGS__) MACRO_REPEAT_2(macro, __VA_ARGS__)
+#define MACRO_REPEAT_4(macro, ...)  macro(__VA_ARGS__) MACRO_REPEAT_3(macro, __VA_ARGS__)
+#define MACRO_REPEAT_5(macro, ...)  macro(__VA_ARGS__) MACRO_REPEAT_4(macro, __VA_ARGS__)
+#define MACRO_REPEAT_6(macro, ...)  macro(__VA_ARGS__) MACRO_REPEAT_5(macro, __VA_ARGS__)
+#define MACRO_REPEAT_7(macro, ...)  macro(__VA_ARGS__) MACRO_REPEAT_6(macro, __VA_ARGS__)
+#define MACRO_REPEAT_8(macro, ...)  macro(__VA_ARGS__) MACRO_REPEAT_7(macro, __VA_ARGS__)
+#define MACRO_REPEAT_9(macro, ...)  macro(__VA_ARGS__) MACRO_REPEAT_8(macro, __VA_ARGS__)
+#define MACRO_REPEAT_10(macro, ...) macro(__VA_ARGS__) MACRO_REPEAT_9(macro, __VA_ARGS__)
+#define MACRO_REPEAT_11(macro, ...) macro(__VA_ARGS__) MACRO_REPEAT_10(macro, __VA_ARGS__)
+#define MACRO_REPEAT_12(macro, ...) macro(__VA_ARGS__) MACRO_REPEAT_11(macro, __VA_ARGS__)
+#define MACRO_REPEAT_13(macro, ...) macro(__VA_ARGS__) MACRO_REPEAT_12(macro, __VA_ARGS__)
+#define MACRO_REPEAT_14(macro, ...) macro(__VA_ARGS__) MACRO_REPEAT_13(macro, __VA_ARGS__)
+#define MACRO_REPEAT_15(macro, ...) macro(__VA_ARGS__) MACRO_REPEAT_14(macro, __VA_ARGS__)
+
+
+/**
+ * @brief Repeating macro with current index.
+ *
+ * Macro similar to @ref MACRO_REPEAT but the processing function gets the arguments
+ * and the current argument index (beginning from 0).
+
+ * @param count Count of repeats.
+ * @param macro Macro must have the following form: MACRO(index, arguments).
+ * @param ...   Arguments passed to the macro.
+ *
+ * @return All arguments processed by the given macro.
+ */
+#define MACRO_REPEAT_FOR(count, macro, ...)     MACRO_REPEAT_FOR_(count, macro, __VA_ARGS__)
+#define MACRO_REPEAT_FOR_(count, macro, ...)    CONCAT_2(MACRO_REPEAT_FOR_, count)((MACRO_MAP_FOR_N_LIST), macro, __VA_ARGS__)
+
+#define MACRO_REPEAT_FOR_0(n_list, macro, ...)
+#define MACRO_REPEAT_FOR_1(n_list, macro, ...)  macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_0((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__)
+#define MACRO_REPEAT_FOR_2(n_list, macro, ...)  macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_1((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__)
+#define MACRO_REPEAT_FOR_3(n_list, macro, ...)  macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_2((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__)
+#define MACRO_REPEAT_FOR_4(n_list, macro, ...)  macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_3((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__)
+#define MACRO_REPEAT_FOR_5(n_list, macro, ...)  macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_4((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__)
+#define MACRO_REPEAT_FOR_6(n_list, macro, ...)  macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_5((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__)
+#define MACRO_REPEAT_FOR_7(n_list, macro, ...)  macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_6((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__)
+#define MACRO_REPEAT_FOR_8(n_list, macro, ...)  macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_7((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__)
+#define MACRO_REPEAT_FOR_9(n_list, macro, ...)  macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_8((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__)
+#define MACRO_REPEAT_FOR_10(n_list, macro, ...) macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_9((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__)
+#define MACRO_REPEAT_FOR_11(n_list, macro, ...) macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_10((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__)
+#define MACRO_REPEAT_FOR_12(n_list, macro, ...) macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_11((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__)
+#define MACRO_REPEAT_FOR_13(n_list, macro, ...) macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_12((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__)
+#define MACRO_REPEAT_FOR_14(n_list, macro, ...) macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_13((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__)
+#define MACRO_REPEAT_FOR_15(n_list, macro, ...) macro(GET_VA_ARG_1(BRACKET_EXTRACT(n_list)), __VA_ARGS__) MACRO_REPEAT_FOR_14((GET_ARGS_AFTER_1(BRACKET_EXTRACT(n_list))), macro, __VA_ARGS__)
+
+/**@brief Adding curly brace to the macro parameter.
+ *
+ * Useful in array of structures initialization.
+ *
+ * @param p Parameter to put into the curly brace. */
+#define PARAM_CBRACE(p) { p },
+
 
 /**@brief Function for changing the value unit.
  *
@@ -369,6 +944,22 @@ static __INLINE uint32_t uint32_big_decode(const uint8_t * p_encoded_data)
              (((uint32_t)((uint8_t *)p_encoded_data)[3]) << 0) );
 }
 
+/**
+ * @brief Function for encoding an uint16 value in big-endian format.
+ *
+ * @param[in]   value            Value to be encoded.
+ * @param[out]  p_encoded_data   Buffer where the encoded data will be written.
+ *
+ * @return      Number of bytes written.
+ */
+static __INLINE uint8_t uint16_big_encode(uint16_t value, uint8_t * p_encoded_data)
+{
+    p_encoded_data[0] = (uint8_t) (value >> 8);
+    p_encoded_data[1] = (uint8_t) (value & 0xFF);
+
+    return sizeof(uint16_t);
+}
+
 /**@brief Function for encoding a uint32 value in big-endian format.
  *
  * @param[in]   value            Value to be encoded.
@@ -378,14 +969,7 @@ static __INLINE uint32_t uint32_big_decode(const uint8_t * p_encoded_data)
  */
 static __INLINE uint8_t uint32_big_encode(uint32_t value, uint8_t * p_encoded_data)
 {
-#ifdef NRF51
-    p_encoded_data[0] = (uint8_t) ((value & 0xFF000000) >> 24);
-    p_encoded_data[1] = (uint8_t) ((value & 0x00FF0000) >> 16);
-    p_encoded_data[2] = (uint8_t) ((value & 0x0000FF00) >> 8);
-    p_encoded_data[3] = (uint8_t) ((value & 0x000000FF) >> 0);
-#elif NRF52
     *(uint32_t *)p_encoded_data = __REV(value);
-#endif
     return sizeof(uint32_t);
 }
 
@@ -488,6 +1072,11 @@ static __INLINE bool is_address_from_stack(void * ptr)
     }
 }
 
+
+#ifdef __cplusplus
+}
+#endif
+
 #endif // APP_UTIL_H__
 
 /** @} */

nRF5_SDK_11.0.0_89a8197/components/libraries/util/app_util_bds.h

@@ -1,15 +1,42 @@
-/* Copyright (c) 2012 Nordic Semiconductor. All Rights Reserved.
+/**
+ * Copyright (c) 2012 - 2017, Nordic Semiconductor ASA
  * 
- * The information contained herein is property of Nordic Semiconductor ASA.
+ * All rights reserved.
- * Terms and conditions of usage are described in detail in NORDIC
- * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
  * 
- * Licensees are granted free, non-transferable use of the information. NO
+ * Redistribution and use in source and binary forms, with or without modification,
- * WARRANTY of ANY KIND is provided. This heading must NOT be removed from
+ * are permitted provided that the following conditions are met:
- * the file.
+ * 
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ *    list of conditions and the following disclaimer.
+ * 
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ *    Semiconductor ASA integrated circuit in a product or a software update for
+ *    such product, must reproduce the above copyright notice, this list of
+ *    conditions and the following disclaimer in the documentation and/or other
+ *    materials provided with the distribution.
+ * 
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ *    contributors may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ * 
+ * 4. This software, with or without modification, must only be used with a
+ *    Nordic Semiconductor ASA integrated circuit.
+ * 
+ * 5. Any software provided in binary form under this license must not be reverse
+ *    engineered, decompiled, modified and/or disassembled.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  * 
  */
-
 /** @file
  *
  * @defgroup app_util Utility Functions and Definitions
@@ -30,6 +57,10 @@
 #include "ble_srv_common.h"
 #include "nordic_common.h"
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 typedef uint8_t nibble_t;
 typedef uint32_t uint24_t;
 typedef uint64_t uint40_t;
@@ -408,6 +439,11 @@ static __INLINE uint8_t bds_ble_date_time_decode(const uint8_t   len,
     return pos;
 }
 
+
+#ifdef __cplusplus
+}
+#endif
+
 #endif // APP_UTIL_BDS_H__
 
 /** @} */

nRF5_SDK_11.0.0_89a8197/components/libraries/util/app_util_platform.c

@@ -1,17 +1,49 @@
-/* Copyright (c) 2014 Nordic Semiconductor. All Rights Reserved.
+/**
+ * Copyright (c) 2014 - 2017, Nordic Semiconductor ASA
  * 
- * The information contained herein is property of Nordic Semiconductor ASA.
+ * All rights reserved.
- * Terms and conditions of usage are described in detail in NORDIC
- * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
  * 
- * Licensees are granted free, non-transferable use of the information. NO
+ * Redistribution and use in source and binary forms, with or without modification,
- * WARRANTY of ANY KIND is provided. This heading must NOT be removed from
+ * are permitted provided that the following conditions are met:
- * the file.
+ * 
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ *    list of conditions and the following disclaimer.
+ * 
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ *    Semiconductor ASA integrated circuit in a product or a software update for
+ *    such product, must reproduce the above copyright notice, this list of
+ *    conditions and the following disclaimer in the documentation and/or other
+ *    materials provided with the distribution.
+ * 
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ *    contributors may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ * 
+ * 4. This software, with or without modification, must only be used with a
+ *    Nordic Semiconductor ASA integrated circuit.
+ * 
+ * 5. Any software provided in binary form under this license must not be reverse
+ *    engineered, decompiled, modified and/or disassembled.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  * 
  */
-
 #include "app_util_platform.h"
 
+#ifdef SOFTDEVICE_PRESENT
+/* Global nvic state instance, required by nrf_nvic.h */
+nrf_nvic_state_t nrf_nvic_state;
+#endif
+
 static uint32_t m_in_critical_region = 0;
 
 void app_util_disable_irq(void)
@@ -31,7 +63,7 @@ void app_util_enable_irq(void)
 
 void app_util_critical_region_enter(uint8_t *p_nested)
 {
-#ifdef NRF52
+#if __CORTEX_M == (0x04U)
     ASSERT(APP_LEVEL_PRIVILEGED == privilege_level_get())
 #endif
 
@@ -45,7 +77,7 @@ void app_util_critical_region_enter(uint8_t *p_nested)
 
 void app_util_critical_region_exit(uint8_t nested)
 {
-#ifdef NRF52
+#if __CORTEX_M == (0x04U)
     ASSERT(APP_LEVEL_PRIVILEGED == privilege_level_get())
 #endif
 
@@ -58,3 +90,38 @@ void app_util_critical_region_exit(uint8_t nested)
 }
 
 
+uint8_t privilege_level_get(void)
+{
+#if __CORTEX_M == (0x00U) || defined(_WIN32) || defined(__unix) || defined(__APPLE__)
+    /* the Cortex-M0 has no concept of privilege */
+    return APP_LEVEL_PRIVILEGED;
+#elif __CORTEX_M == (0x04U)
+    uint32_t isr_vector_num = __get_IPSR() & IPSR_ISR_Msk ;
+    if (0 == isr_vector_num)
+    {
+        /* Thread Mode, check nPRIV */
+        int32_t control = __get_CONTROL();
+        return control & CONTROL_nPRIV_Msk ? APP_LEVEL_UNPRIVILEGED : APP_LEVEL_PRIVILEGED;
+    }
+    else
+    {
+        /* Handler Mode, always privileged */
+        return APP_LEVEL_PRIVILEGED;
+    }
+#endif
+}
+
+
+uint8_t current_int_priority_get(void)
+{
+    uint32_t isr_vector_num = __get_IPSR() & IPSR_ISR_Msk ;
+    if (isr_vector_num > 0)
+    {
+        int32_t irq_type = ((int32_t)isr_vector_num - EXTERNAL_INT_VECTOR_OFFSET);
+        return (NVIC_GetPriority((IRQn_Type)irq_type) & 0xFF);
+    }
+    else
+    {
+        return APP_IRQ_PRIORITY_THREAD;
+    }
+}

nRF5_SDK_11.0.0_89a8197/components/libraries/util/app_util_platform.h

@@ -1,15 +1,42 @@
-/* Copyright (c) 2014 Nordic Semiconductor. All Rights Reserved.
+/**
+ * Copyright (c) 2014 - 2017, Nordic Semiconductor ASA
  * 
- * The information contained herein is property of Nordic Semiconductor ASA.
+ * All rights reserved.
- * Terms and conditions of usage are described in detail in NORDIC
- * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
  * 
- * Licensees are granted free, non-transferable use of the information. NO
+ * Redistribution and use in source and binary forms, with or without modification,
- * WARRANTY of ANY KIND is provided. This heading must NOT be removed from
+ * are permitted provided that the following conditions are met:
- * the file.
+ * 
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ *    list of conditions and the following disclaimer.
+ * 
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ *    Semiconductor ASA integrated circuit in a product or a software update for
+ *    such product, must reproduce the above copyright notice, this list of
+ *    conditions and the following disclaimer in the documentation and/or other
+ *    materials provided with the distribution.
+ * 
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ *    contributors may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ * 
+ * 4. This software, with or without modification, must only be used with a
+ *    Nordic Semiconductor ASA integrated circuit.
+ * 
+ * 5. Any software provided in binary form under this license must not be reverse
+ *    engineered, decompiled, modified and/or disassembled.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  * 
  */
-
 /**@file
  *
  * @defgroup app_util_platform Utility Functions and Definitions (Platform)
@@ -32,7 +59,11 @@
 #include "nrf_assert.h"
 #include "app_error.h"
 
-#if defined(NRF51)
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if __CORTEX_M == (0x00U)
 #define _PRIO_SD_HIGH       0
 #define _PRIO_APP_HIGH      1
 #define _PRIO_APP_MID       1
@@ -40,7 +71,7 @@
 #define _PRIO_APP_LOW       3
 #define _PRIO_APP_LOWEST    3
 #define _PRIO_THREAD        4
-#elif defined(NRF52)
+#elif __CORTEX_M == (0x04U)
 #define _PRIO_SD_HIGH       0
 #define _PRIO_SD_MID        1
 #define _PRIO_APP_HIGH      2
@@ -54,10 +85,12 @@
     #error "No platform defined"
 #endif
 
+
+//lint -save -e113 -e452
 /**@brief The interrupt priorities available to the application while the SoftDevice is active. */
 typedef enum
 {
-#ifdef SOFTDEVICE_PRESENT
+#ifndef SOFTDEVICE_PRESENT
     APP_IRQ_PRIORITY_HIGHEST = _PRIO_SD_HIGH,
 #else
     APP_IRQ_PRIORITY_HIGHEST = _PRIO_APP_HIGH,
@@ -72,6 +105,8 @@ typedef enum
     APP_IRQ_PRIORITY_LOWEST  = _PRIO_APP_LOWEST,
     APP_IRQ_PRIORITY_THREAD  = _PRIO_THREAD     /**< "Interrupt level" when running in Thread Mode. */
 } app_irq_priority_t;
+//lint -restore
+
 
 /*@brief The privilege levels available to applications in Thread Mode */
 typedef enum
@@ -84,7 +119,41 @@ typedef enum
 #define EXTERNAL_INT_VECTOR_OFFSET 16
 /**@endcond */
 
+/**@brief Macro for setting a breakpoint.
+ */
+#if defined(__GNUC__)
+#define NRF_BREAKPOINT __builtin_trap()
+#else
+#define NRF_BREAKPOINT __BKPT(0)
+#endif
+
+/** @brief Macro for setting a breakpoint.
+ *
+ * If it is possible to detect debugger presence then it is set only in that case.
+ *
+ */
+#if __CORTEX_M == 0x04
+#define NRF_BREAKPOINT_COND do {                            \
+    /* C_DEBUGEN == 1 -> Debugger Connected */              \
+    if (CoreDebug->DHCSR & CoreDebug_DHCSR_C_DEBUGEN_Msk)   \
+    {                                                       \
+       /* Generate breakpoint if debugger is connected */   \
+            NRF_BREAKPOINT;                                 \
+    } \
+    }while (0)
+#else
+#define NRF_BREAKPOINT_COND NRF_BREAKPOINT
+#endif // __CORTEX_M == 0x04
+
+#if defined ( __CC_ARM )
 #define PACKED(TYPE) __packed TYPE
+#define PACKED_STRUCT PACKED(struct)
+#elif defined   ( __GNUC__ )
+#define PACKED __attribute__((packed))
+#define PACKED_STRUCT struct PACKED
+#elif defined (__ICCARM__)
+#define PACKED_STRUCT __packed struct
+#endif
 
 void app_util_critical_region_enter (uint8_t *p_nested);
 void app_util_critical_region_exit (uint8_t nested);
@@ -152,6 +221,13 @@ void app_util_critical_region_exit (uint8_t nested);
     // For GCC anonymous unions are enabled by default.
 #endif
 
+/**@brief Macro for adding pragma directive only for GCC.
+ */
+#ifdef __GNUC__
+#define GCC_PRAGMA(v)            _Pragma(v)
+#else
+#define GCC_PRAGMA(v)
+#endif
 
 /* Workaround for Keil 4 */
 #ifndef CONTROL_nPRIV_Msk
@@ -165,19 +241,8 @@ void app_util_critical_region_exit (uint8_t nested);
  * @retval   APP_IRQ_PRIORITY_LOW     We are running in Application Low interrupt level.
  * @retval   APP_IRQ_PRIORITY_THREAD  We are running in Thread Mode.
  */
-static __INLINE uint8_t current_int_priority_get(void)
+uint8_t current_int_priority_get(void);
-{
+
-    uint32_t isr_vector_num = __get_IPSR() & IPSR_ISR_Msk ;
-    if (isr_vector_num > 0)
-    {
-        int32_t irq_type = ((int32_t)isr_vector_num - EXTERNAL_INT_VECTOR_OFFSET);
-        return (NVIC_GetPriority((IRQn_Type)irq_type) & 0xFF);
-    }
-    else
-    {
-        return APP_IRQ_PRIORITY_THREAD;
-    }
-}
 
 /**@brief Function for finding out the current privilege level.
  *
@@ -185,26 +250,12 @@ static __INLINE uint8_t current_int_priority_get(void)
  * @retval   APP_LEVEL_UNPRIVILEGED    We are running in unprivileged level.
  * @retval   APP_LEVEL_PRIVILEGED    We are running in privileged level.
  */
-static __INLINE uint8_t privilege_level_get(void)
+uint8_t privilege_level_get(void);
-{
+
-#if defined(NRF51)
+
-    /* the Cortex-M0 has no concept of privilege */
+#ifdef __cplusplus
-    return APP_LEVEL_PRIVILEGED;
-#elif defined(NRF52)
-    uint32_t isr_vector_num = __get_IPSR() & IPSR_ISR_Msk ;
-    if (0 == isr_vector_num)
-    {
-        /* Thread Mode, check nPRIV */
-        int32_t control = __get_CONTROL();
-        return control & CONTROL_nPRIV_Msk ? APP_LEVEL_UNPRIVILEGED : APP_LEVEL_PRIVILEGED;
-    }
-    else
-    {
-        /* Handler Mode, always privileged */
-        return APP_LEVEL_PRIVILEGED;
 }
 #endif
-}
 
 #endif // APP_UTIL_PLATFORM_H__
 

nRF5_SDK_11.0.0_89a8197/components/libraries/util/common.h

@@ -1,38 +0,0 @@
- /* Copyright (c) 2009 Nordic Semiconductor. All Rights Reserved.
- *
- * The information contained herein is property of Nordic Semiconductor ASA.
- * Terms and conditions of usage are described in detail in NORDIC
- * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
- *
- * Licensees are granted free, non-transferable use of the information. NO
- * WARRANTY of ANY KIND is provided. This heading must NOT be removed from
- * the file.
- *
- */
-
-#ifndef COMMON_H
-#define COMMON_H
-
-/*lint ++flb "Enter library region" */
-
-#include <stdbool.h>
-#include <stdint.h>
-
-/* @file
-* @brief Common header file for generic macros and definitions
- *
- */
-
-/*
- * GPIO glue macros, this can be used to define a pin number in source/header file and use that macro for pin
- * configuration using this expansion.
- * example:
- * #define RESET_PIN    8
- * NRF_GPIO->PINCNF(RESET_PIN) = XXX  ;  // Expanded NRF_GPIO->PIN_CNF[8] = XXX
- */
-#define PINX_GLUE(x, y, z)       x##y##_##z            /*!< first level glue for pin macros */
-#define PINCNF(p)                PINX_GLUE(PIN,p,CNF)  /*!< gpio configure pin number 'p' */
-#define PINOUT(p)                PINX_GLUE(PIN,p,OUT)  /*!< gpio out pin number 'p' */
-
-/*lint --flb "Leave library region" */
-#endif

nRF5_SDK_11.0.0_89a8197/components/libraries/util/nordic_common.h

@@ -1,14 +1,42 @@
-/* Copyright (c) 2008 Nordic Semiconductor. All Rights Reserved.
+/**
+ * Copyright (c) 2008 - 2017, Nordic Semiconductor ASA
  * 
- * The information contained herein is property of Nordic Semiconductor ASA.
+ * All rights reserved.
- * Terms and conditions of usage are described in detail in NORDIC
+ * 
- * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ * 
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ *    list of conditions and the following disclaimer.
+ * 
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ *    Semiconductor ASA integrated circuit in a product or a software update for
+ *    such product, must reproduce the above copyright notice, this list of
+ *    conditions and the following disclaimer in the documentation and/or other
+ *    materials provided with the distribution.
+ * 
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ *    contributors may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ * 
+ * 4. This software, with or without modification, must only be used with a
+ *    Nordic Semiconductor ASA integrated circuit.
+ * 
+ * 5. Any software provided in binary form under this license must not be reverse
+ *    engineered, decompiled, modified and/or disassembled.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  * 
- * Licensees are granted free, non-transferable use of the information. NO
- * WARRANTY of ANY KIND is provided. This heading must NOT be removed from
- * the file.
  */
-
 /** @file
  * @brief Common defines and macros for firmware developed by Nordic Semiconductor.
  */
@@ -16,8 +44,40 @@
 #ifndef NORDIC_COMMON_H__
 #define NORDIC_COMMON_H__
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Check if selected module is enabled
+ *
+ * This is save function for driver enable checking.
+ * Correct from Lint point of view (not using default of undefined value).
+ *
+ * Usage:
+ * @code
+   #if NRF_MODULE_ENABLED(UART)
+   ...
+   #endif
+ * @endcode
+ *
+ * @param module The module name.
+ *
+ * @retval 1 The macro <module>_ENABLE is defined and is non-zero.
+ * @retval 0 The macro <module>_ENABLE is not defined or it equals zero.
+ *
+ * @note
+ * This macro intentionally does not implement second expansion level.
+ * The name of the module to be checked has to be given directly as a parameter.
+ * And given parameter would be connected with @c _ENABLED postfix directly
+ * without evaluating its value.
+ */
+//lint -emacro(491,NRF_MODULE_ENABLED) // Suppers warning 491 "non-standard use of 'defined' preprocessor operator"
+#define NRF_MODULE_ENABLED(module) \
+    ((defined(module ## _ENABLED) && (module ## _ENABLED)) ? 1 : 0)
+
 /** The upper 8 bits of a 32 bit value */
-//lint -emacro(572,MSB) // Suppress warning 572 "Excessive shift value"
+//lint -emacro(572,MSB_32) // Suppress warning 572 "Excessive shift value"
 #define MSB_32(a) (((a) & 0xFF000000) >> 24)
 /** The lower 8 bits (of a 32 bit value) */
 #define LSB_32(a) ((a) & 0x000000FF)
@@ -35,12 +95,51 @@
 /*lint -emacro(506, MAX) */ /* Suppress "Constant value Boolean */
 #define MAX(a, b) ((a) < (b) ? (b) : (a))
 
-/** Concatenates two parameters. Useful as a second level of indirection,
+/**@brief Concatenates two parameters.
- *  when a parameter can be macro itself. */
+ *
-#define CONCAT_2(p1, p2)      p1##p2
+ * It realizes two level expansion to make it sure that all the parameters
-/** Concatenates three parameters. Useful as a second level of indirection,
+ * are actually expanded before gluing them together.
- *  when a parameter can be macro itself. */
+ *
-#define CONCAT_3(p1, p2, p3)  p1##p2##p3
+ * @param p1 First parameter to concatenating
+ * @param p2 Second parameter to concatenating
+ *
+ * @return Two parameters glued together.
+ *         They have to create correct C mnemonic in other case
+ *         preprocessor error would be generated.
+ *
+ * @sa CONCAT_3
+ */
+#define CONCAT_2(p1, p2)      CONCAT_2_(p1, p2)
+/** Auxiliary macro used by @ref CONCAT_2 */
+#define CONCAT_2_(p1, p2)     p1##p2
+
+/**@brief Concatenates three parameters.
+ *
+ * It realizes two level expansion to make it sure that all the parameters
+ * are actually expanded before gluing them together.
+ *
+ * @param p1 First parameter to concatenating
+ * @param p2 Second parameter to concatenating
+ * @param p3 Third parameter to concatenating
+ *
+ * @return Three parameters glued together.
+ *         They have to create correct C mnemonic in other case
+ *         preprocessor error would be generated.
+ *
+ * @sa CONCAT_2
+ */
+#define CONCAT_3(p1, p2, p3)  CONCAT_3_(p1, p2, p3)
+/** Auxiliary macro used by @ref CONCAT_3 */
+#define CONCAT_3_(p1, p2, p3) p1##p2##p3
+
+#define STRINGIFY_(val) #val
+/** Converts a macro argument into a character constant.
+ */
+#define STRINGIFY(val)  STRINGIFY_(val)
+
+/** Counts number of elements inside the array
+ */
+#define ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0]))
 
 /**@brief Set a bit in the uint32 word.
  *
@@ -55,7 +154,7 @@
  * @param[in] W   Word whose bit is to be cleared.
  * @param[in] B   Bit number in the word to be cleared.
  */
-#define CLR_BIT(W, B) ((W) &= (~((uint32_t)1 << (B))))
+#define CLR_BIT(W, B) ((W) &= (~(uint32_t)(1U << (B))))
 
 
 /**@brief Checks if a bit is set.
@@ -105,4 +204,8 @@
 #define UNUSED_PARAMETER(X) UNUSED_VARIABLE(X)
 #define UNUSED_RETURN_VALUE(X) UNUSED_VARIABLE(X)
 
+#ifdef __cplusplus
+}
+#endif
+
 #endif // NORDIC_COMMON_H__

nRF5_SDK_11.0.0_89a8197/components/libraries/util/nrf_assert.c

@@ -1,20 +1,47 @@
-/* Copyright (c) 2006 Nordic Semiconductor. All Rights Reserved.
+/**
+ * Copyright (c) 2006 - 2017, Nordic Semiconductor ASA
  * 
- * The information contained herein is property of Nordic Semiconductor ASA.
+ * All rights reserved.
- * Terms and conditions of usage are described in detail in NORDIC
- * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
  * 
- * Licensees are granted free, non-transferable use of the information. NO
+ * Redistribution and use in source and binary forms, with or without modification,
- * WARRANTY of ANY KIND is provided. This heading must NOT be removed from
+ * are permitted provided that the following conditions are met:
- * the file.
+ * 
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ *    list of conditions and the following disclaimer.
+ * 
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ *    Semiconductor ASA integrated circuit in a product or a software update for
+ *    such product, must reproduce the above copyright notice, this list of
+ *    conditions and the following disclaimer in the documentation and/or other
+ *    materials provided with the distribution.
+ * 
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ *    contributors may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ * 
+ * 4. This software, with or without modification, must only be used with a
+ *    Nordic Semiconductor ASA integrated circuit.
+ * 
+ * 5. Any software provided in binary form under this license must not be reverse
+ *    engineered, decompiled, modified and/or disassembled.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  * 
  */
 #include "nrf_assert.h"
 #include "app_error.h"
 #include "nordic_common.h"
 
-#if defined(DEBUG_NRF)
+__WEAK void assert_nrf_callback(uint16_t line_num, const uint8_t * file_name)
-void assert_nrf_callback(uint16_t line_num, const uint8_t * file_name)
 {
     assert_info_t assert_info =
     {
@@ -25,4 +52,3 @@ void assert_nrf_callback(uint16_t line_num, const uint8_t * file_name)
 
     UNUSED_VARIABLE(assert_info);
 }
-#endif /* DEBUG_NRF */

nRF5_SDK_11.0.0_89a8197/components/libraries/util/nrf_assert.h

@@ -1,12 +1,42 @@
-/*
+/**
- * Copyright (c) 2006 Nordic Semiconductor. All Rights Reserved.
+ * Copyright (c) 2006 - 2017, Nordic Semiconductor ASA
  * 
- * The information contained herein is confidential property of Nordic Semiconductor. The use,
+ * All rights reserved.
- * copying, transfer or disclosure of such information is prohibited except by express written
+ * 
- * agreement with Nordic Semiconductor.
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ * 
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ *    list of conditions and the following disclaimer.
+ * 
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ *    Semiconductor ASA integrated circuit in a product or a software update for
+ *    such product, must reproduce the above copyright notice, this list of
+ *    conditions and the following disclaimer in the documentation and/or other
+ *    materials provided with the distribution.
+ * 
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ *    contributors may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ * 
+ * 4. This software, with or without modification, must only be used with a
+ *    Nordic Semiconductor ASA integrated circuit.
+ * 
+ * 5. Any software provided in binary form under this license must not be reverse
+ *    engineered, decompiled, modified and/or disassembled.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  * 
  */
-
 /** @file
  * @brief Utilities for verifying program logic
  */
@@ -18,7 +48,9 @@
 #include "nrf.h"
 #include "app_error.h"
 
-#if defined(DEBUG_NRF) || defined(DEBUG_NRF_USER)
+#ifdef __cplusplus
+extern "C" {
+#endif
 
 /** @brief Function for handling assertions.
  *
@@ -26,6 +58,10 @@
  * @note
  * This function is called when an assertion has triggered.
  *
+ * @note
+ * This function is deprecated and will be removed in future releases.
+ * Use app_error_fault_handler instead.
+ *
  *
  * @post
  * All hardware is put into an idle non-emitting state (in particular the radio is highly
@@ -36,7 +72,17 @@
  * @param line_num The line number where the assertion is called
  * @param file_name Pointer to the file name
  */
+//lint -save -esym(14, assert_nrf_callback)
 void assert_nrf_callback(uint16_t line_num, const uint8_t *file_name);
+//lint -restore
+
+#if (defined(DEBUG_NRF) || defined(DEBUG_NRF_USER))
+#define NRF_ASSERT_PRESENT 1
+#else
+#define NRF_ASSERT_PRESENT 0
+#endif
+
+//#if defined(DEBUG_NRF) || defined(DEBUG_NRF_USER)
 
 /*lint -emacro(506, ASSERT) */ /* Suppress "Constant value Boolean */
 /*lint -emacro(774, ASSERT) */ /* Suppress "Boolean within 'if' always evaluates to True" */ \
@@ -44,17 +90,34 @@ void assert_nrf_callback(uint16_t line_num, const uint8_t *file_name);
 /** @brief Function for checking intended for production code.
  *
  * Check passes if "expr" evaluates to true. */
+
+#ifdef _lint
 #define ASSERT(expr)                                                          \
 if (expr)                                                                     \
 {                                                                             \
 }                                                                             \
 else                                                                          \
 {                                                                             \
-    assert_nrf_callback((uint16_t)__LINE__, (uint8_t *)__FILE__);             \
+    while (1);                                                                \
 }
-#else
+#else //_lint
-#define ASSERT(expr) //!< Assert empty when disabled
+#define ASSERT(expr)                                                          \
-__WEAK void assert_nrf_callback(uint16_t line_num, const uint8_t *file_name);
+if (NRF_ASSERT_PRESENT)                                                       \
-#endif /* defined(DEBUG_NRF) || defined(DEBUG_NRF_USER) */
+{                                                                             \
+    if (expr)                                                                 \
+    {                                                                         \
+    }                                                                         \
+    else                                                                      \
+    {                                                                         \
+        assert_nrf_callback((uint16_t)__LINE__, (uint8_t *)__FILE__);         \
+    }                                                                         \
+}
+
+#endif
+
+
+#ifdef __cplusplus
+}
+#endif
 
 #endif /* NRF_ASSERT_H_ */

nRF5_SDK_11.0.0_89a8197/components/libraries/util/nrf_bitmask.h

@@ -0,0 +1,147 @@
+/**
+ * Copyright (c) 2006 - 2017, Nordic Semiconductor ASA
+ * 
+ * All rights reserved.
+ * 
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ * 
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ *    list of conditions and the following disclaimer.
+ * 
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ *    Semiconductor ASA integrated circuit in a product or a software update for
+ *    such product, must reproduce the above copyright notice, this list of
+ *    conditions and the following disclaimer in the documentation and/or other
+ *    materials provided with the distribution.
+ * 
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ *    contributors may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ * 
+ * 4. This software, with or without modification, must only be used with a
+ *    Nordic Semiconductor ASA integrated circuit.
+ * 
+ * 5. Any software provided in binary form under this license must not be reverse
+ *    engineered, decompiled, modified and/or disassembled.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ */
+#ifndef NRF_BITMASK_H
+#define NRF_BITMASK_H
+
+#include "compiler_abstraction.h"
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define BITMASK_BYTE_GET(abs_bit) ((abs_bit)/8)
+#define BITMASK_RELBIT_GET(abs_bit) ((abs_bit) & 0x00000007)
+
+/**
+ * Function for checking if bit in the multi-byte bit mask is set.
+ *
+ * @param bit    Bit index.
+ * @param p_mask A pointer to mask with bit fields.
+ *
+ * @return 0 if bit is not set, positive value otherwise.
+ */
+__STATIC_INLINE uint32_t nrf_bitmask_bit_is_set(uint32_t bit, void const * p_mask)
+{
+    uint8_t const * p_mask8 = (uint8_t const *)p_mask;
+    uint32_t byte_idx = BITMASK_BYTE_GET(bit);
+    bit = BITMASK_RELBIT_GET(bit);
+    return (1 << bit) & p_mask8[byte_idx];
+}
+
+/**
+ * Function for setting a bit in the multi-byte bit mask.
+ *
+ * @param bit    Bit index.
+ * @param p_mask A pointer to mask with bit fields.
+ */
+__STATIC_INLINE void nrf_bitmask_bit_set(uint32_t bit, void * p_mask)
+{
+    uint8_t * p_mask8 = (uint8_t *)p_mask;
+    uint32_t byte_idx = BITMASK_BYTE_GET(bit);
+    bit = BITMASK_RELBIT_GET(bit);
+    p_mask8[byte_idx] |= (1 << bit);
+}
+
+/**
+ * Function for clearing a bit in the multi-byte bit mask.
+ *
+ * @param bit    Bit index.
+ * @param p_mask A pointer to mask with bit fields.
+ */
+__STATIC_INLINE void nrf_bitmask_bit_clear(uint32_t bit, void * p_mask)
+{
+    uint8_t * p_mask8 = (uint8_t *)p_mask;
+    uint32_t byte_idx = BITMASK_BYTE_GET(bit);
+    bit = BITMASK_RELBIT_GET(bit);
+    p_mask8[byte_idx] &= ~(1 << bit);
+}
+
+/**
+ * Function for performing bitwise OR operation on two multi-byte bit masks.
+ *
+ * @param p_mask1    A pointer to the first bit mask.
+ * @param p_mask2    A pointer to the second bit mask.
+ * @param p_mask_out A pointer to the output bit mask.
+ * @param length     Length of output mask in bytes.
+ */
+__STATIC_INLINE void nrf_bitmask_masks_or(void const *   p_mask1,
+                                          void const *   p_mask2,
+                                          void *         p_out_mask,
+                                          uint32_t       length)
+{
+    uint8_t const * p_mask8_1 = (uint8_t const *)p_mask1;
+    uint8_t const * p_mask8_2 = (uint8_t const *)p_mask2;
+    uint8_t * p_mask8_out = (uint8_t *)p_out_mask;
+    uint32_t i;
+    for (i = 0; i < length; i++)
+    {
+        p_mask8_out[i] = p_mask8_1[i] | p_mask8_2[i];
+    }
+}
+
+/**
+ * Function for performing bitwise AND operation on two multi-byte bit masks.
+ *
+ * @param p_mask1    A pointer to the first bit mask.
+ * @param p_mask2    A pointer to the second bit mask.
+ * @param p_mask_out A pointer to the output bit mask.
+ * @param length     Length of output mask in bytes.
+ */
+__STATIC_INLINE void nrf_bitmask_masks_and(void const *   p_mask1,
+                                           void const *   p_mask2,
+                                           void *         p_out_mask,
+                                           uint32_t       length)
+{
+    uint8_t const * p_mask8_1 = (uint8_t const *)p_mask1;
+    uint8_t const * p_mask8_2 = (uint8_t const *)p_mask2;
+    uint8_t * p_mask8_out = (uint8_t *)p_out_mask;
+    uint32_t i;
+    for (i = 0; i < length; i++)
+    {
+        p_mask8_out[i] = p_mask8_1[i] & p_mask8_2[i];
+    }
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif //NRF_BITMASK_H

nRF5_SDK_11.0.0_89a8197/components/libraries/util/nrf_log.h

@@ -7,6 +7,22 @@
 #include <stdarg.h>
 #include <app_util.h>
 
+#define NRF_LOG_MODULE_REGISTER()
+
+#define NRF_LOG_ERROR(...)
+#define NRF_LOG_WARNING(...)
+#define NRF_LOG_INFO(...)
+#define NRF_LOG_DEBUG(...)
+#define NRF_LOG_RAW_INFO(...)
+#define NRF_LOG_HEXDUMP_ERROR(p_data, len)
+#define NRF_LOG_HEXDUMP_WARNING(p_data, len)
+#define NRF_LOG_HEXDUMP_INFO(p_data, len)
+#define NRF_LOG_HEXDUMP_DEBUG(p_data, len)
+#define NRF_LOG_RAW_HEXDUMP_INFO(p_data, len)
+#define NRF_LOG_GETCHAR()
+#define NRF_LOG_PUSH(_str)
+
+
 #ifndef NRF_LOG_USES_RTT
 #define NRF_LOG_USES_RTT 0
 #endif

nRF5_SDK_11.0.0_89a8197/components/libraries/util/sdk_common.h

@@ -1,21 +1,48 @@
-/* Copyright (c) 2013 Nordic Semiconductor. All Rights Reserved.
+/**
+ * Copyright (c) 2013 - 2017, Nordic Semiconductor ASA
  * 
- * The information contained herein is property of Nordic Semiconductor ASA.
+ * All rights reserved.
- * Terms and conditions of usage are described in detail in NORDIC
- * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
  * 
- * Licensees are granted free, non-transferable use of the information. NO
+ * Redistribution and use in source and binary forms, with or without modification,
- * WARRANTY of ANY KIND is provided. This heading must NOT be removed from
+ * are permitted provided that the following conditions are met:
- * the file.
+ * 
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ *    list of conditions and the following disclaimer.
+ * 
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ *    Semiconductor ASA integrated circuit in a product or a software update for
+ *    such product, must reproduce the above copyright notice, this list of
+ *    conditions and the following disclaimer in the documentation and/or other
+ *    materials provided with the distribution.
+ * 
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ *    contributors may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ * 
+ * 4. This software, with or without modification, must only be used with a
+ *    Nordic Semiconductor ASA integrated circuit.
+ * 
+ * 5. Any software provided in binary form under this license must not be reverse
+ *    engineered, decompiled, modified and/or disassembled.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  * 
  */
-
 /** @cond */
 /**@file
  *
  * @ingroup experimental_api
  * @defgroup sdk_common SDK Common Header
- * @breif All common headers needed for SDK examples will be included here so that application
+ * @brief All common headers needed for SDK examples will be included here so that application
  *       developer does not have to include headers on him/herself.
  * @{
  */
@@ -26,149 +53,25 @@
 #include <stdint.h>
 #include <stdbool.h>
 #include <string.h>
+#include "sdk_config.h"
 #include "nordic_common.h"
 #include "compiler_abstraction.h"
 #include "sdk_os.h"
 #include "sdk_errors.h"
 #include "app_util.h"
+#include "sdk_macros.h"
 
-/**@brief Macro for verifying that the module is initialized. It will cause the function to return
+#ifdef __cplusplus
- *        if not.
+extern "C" {
- *
+#endif
- * @param[in] param  The variable to check if is NULL.
- */
-#ifndef DISABLE_PARAM_CHECK
-#define VERIFY_PARAM_NOT_NULL(param)                \
-do                                                  \
-{                                                   \
-    if (param == NULL)                              \
-    {                                               \
-        return NRF_ERROR_NULL;                      \
-    }                                               \
-} while(0)
-#else
-#define VERIFY_PARAM_NOT_NULL()
-#endif /* DISABLE_PARAM_CHECK */
 
 
-/**@brief Macro for verifying that the module is initialized. It will cause the function to return
- *        if not.
- *
- * @param[in] param  The variable to check if is NULL.
- */
-#ifndef DISABLE_PARAM_CHECK
-#define VERIFY_PARAM_NOT_NULL_VOID(param)           \
-do                                                  \
-{                                                   \
-    if (param == NULL)                              \
-    {                                               \
-        return;                                     \
-    }                                               \
-} while(0)
-#else
-#define VERIFY_PARAM_NOT_NULL_VOID()
-#endif /* DISABLE_PARAM_CHECK */
-
-
-/**@brief Macro for verifying that a function returned NRF_SUCCESS. Will return the err code
- * if not.
- *
- * @param[in] err_code The error code to check.
- */
-#ifndef DISABLE_PARAM_CHECK
-#define VERIFY_SUCCESS(err_code)            \
-do                                          \
-{                                           \
-    if (err_code != NRF_SUCCESS)            \
-    {                                       \
-        return err_code;                    \
-    }                                       \
-} while(0)
-#else
-#define VERIFY_SUCCESS()
-#endif /* DISABLE_PARAM_CHECK */
-
-
-/**@brief Macro for verifying that a function returned NRF_SUCCESS. Will return if not.
- *
- * @param[in] err_code The error code to check.
- */
-#ifndef DISABLE_PARAM_CHECK
-#define VERIFY_SUCCESS_VOID(err_code)       \
-do                                          \
-{                                           \
-    if (err_code != NRF_SUCCESS)            \
-    {                                       \
-        return;                             \
-    }                                       \
-} while(0)
-#else
-#define VERIFY_SUCCESS_VOID()
-#endif /* DISABLE_PARAM_CHECK */
-
-
-/**@brief Macro for verifying statement to be true. Will return err_code if not.
-*
-* @param[in]   statement   Statement to test.
-* @param[in]   err_code     Error value to return if test was invalid.
-*
-* @retval      err_code if test fails.
-*/
-#define VERIFY_TRUE(statement, err_code)    \
-do                                          \
-{                                           \
-    if (!(statement))                       \
-    {                                       \
-        return err_code;                    \
-    }                                       \
-} while(0)
-
-
-/**@brief Macro for verifying statement to be true. Will return if not.
-*
-* @param[in]   statement   Statement to test.
-*/
-#define VERIFY_TRUE_VOID(statement)         \
-do                                          \
-{                                           \
-    if (!(statement))                       \
-    {                                       \
-        return;                             \
-    }                                       \
-} while(0)
-
-
-/**@brief Macro for verifying statement to be false. Will return err_code if not.
-*
-* @param[in]   statement   Statement to test.
-* @param[in]   err_code     Error value to return if test was invalid.
-*
-* @retval      err_code if test fails.
-*/
-#define VERIFY_FALSE(statement, err_code)   \
-do                                          \
-{                                           \
-    if ((statement))                        \
-    {                                       \
-        return err_code;                    \
-    }                                       \
-} while(0)
-
-
-/**@brief Macro for verifying statement to be false. Will return if not.
-*
-* @param[in]   statement    Statement to test.
-*/
-#define VERIFY_FALSE_VOID(statement)        \
-do                                          \
-{                                           \
-    if ((statement))                        \
-    {                                       \
-        return;                             \
-    }                                       \
-} while(0)
-
 /** @} */
 /** @endcond */
+
+#ifdef __cplusplus
+}
+#endif
+
 #endif // SDK_COMMON_H__
 

nRF5_SDK_11.0.0_89a8197/components/libraries/util/sdk_errors.h

@@ -1,15 +1,42 @@
-/* Copyright (c) 2013 Nordic Semiconductor. All Rights Reserved.
+/**
+ * Copyright (c) 2013 - 2017, Nordic Semiconductor ASA
  * 
- * The information contained herein is property of Nordic Semiconductor ASA.
+ * All rights reserved.
- * Terms and conditions of usage are described in detail in NORDIC
- * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
  * 
- * Licensees are granted free, non-transferable use of the information. NO
+ * Redistribution and use in source and binary forms, with or without modification,
- * WARRANTY of ANY KIND is provided. This heading must NOT be removed from
+ * are permitted provided that the following conditions are met:
- * the file.
+ * 
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ *    list of conditions and the following disclaimer.
+ * 
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ *    Semiconductor ASA integrated circuit in a product or a software update for
+ *    such product, must reproduce the above copyright notice, this list of
+ *    conditions and the following disclaimer in the documentation and/or other
+ *    materials provided with the distribution.
+ * 
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ *    contributors may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ * 
+ * 4. This software, with or without modification, must only be used with a
+ *    Nordic Semiconductor ASA integrated circuit.
+ * 
+ * 5. Any software provided in binary form under this license must not be reverse
+ *    engineered, decompiled, modified and/or disassembled.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  * 
  */
-
 /**@file
  *
  * @defgroup sdk_error SDK Error codes
@@ -44,58 +71,78 @@
 
 #include <stdint.h>
 #include "nrf_error.h"
+#include "sdk_config.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
 
 /**
  * @defgroup sdk_err_base Base defined for SDK Modules
  * @{
  */
-#define SDK_ERROR_BASE         (NRF_ERROR_BASE_NUM + 0x8000)   /**< Base value defined for SDK module identifiers. */
+#define NRF_ERROR_SDK_ERROR_BASE         (NRF_ERROR_BASE_NUM + 0x8000)   /**< Base value defined for SDK module identifiers. */
-#define SDK_COMMON_ERROR_BASE  (NRF_ERROR_BASE_NUM + 0x0080)   /**< Base error value to be used for SDK error values. */
+#define NRF_ERROR_SDK_COMMON_ERROR_BASE  (NRF_ERROR_BASE_NUM + 0x0080)   /**< Base error value to be used for SDK error values. */
-/* @} */
+/** @} */
 
 /**
  * @defgroup sdk_module_codes Codes reserved as identification for module where the error occurred.
  * @{
  */
-#define DEVICE_MANAGER_ERR_BASE   (0x8000)
+#define NRF_ERROR_MEMORY_MANAGER_ERR_BASE   (0x8100)
-#define MEMORY_MANAGER_ERR_BASE   (0x8100)
+#define NRF_ERROR_PERIPH_DRIVERS_ERR_BASE   (0x8200)
-/* @} */
+#define NRF_ERROR_GAZELLE_ERR_BASE          (0x8300)
+#define NRF_ERROR_BLE_IPSP_ERR_BASE         (0x8400)
+/** @} */
 
 
 /**
  * @defgroup sdk_iot_errors Codes reserved as identification for IoT errors.
  * @{
  */
-#define IOT_ERR_BASE_START        (0xA000)
+#define NRF_ERROR_IOT_ERR_BASE_START        (0xA000)
-#define IOT_ERR_BASE_STOP         (0xAFFF)
+#define NRF_ERROR_IOT_ERR_BASE_STOP         (0xAFFF)
-/* @} */
+/** @} */
 
 
 /**
  * @defgroup sdk_common_errors Codes reserved as identification for common errors.
  * @{
  */
-#define MODULE_NOT_INITIALZED      (SDK_COMMON_ERROR_BASE + 0x0000)
+#define NRF_ERROR_MODULE_NOT_INITIALZED      (NRF_ERROR_SDK_COMMON_ERROR_BASE + 0x0000)
-#define MUTEX_INIT_FAILED          (SDK_COMMON_ERROR_BASE + 0x0001)
+#define NRF_ERROR_MUTEX_INIT_FAILED          (NRF_ERROR_SDK_COMMON_ERROR_BASE + 0x0001)
-#define MUTEX_LOCK_FAILED          (SDK_COMMON_ERROR_BASE + 0x0002)
+#define NRF_ERROR_MUTEX_LOCK_FAILED          (NRF_ERROR_SDK_COMMON_ERROR_BASE + 0x0002)
-#define MUTEX_UNLOCK_FAILED        (SDK_COMMON_ERROR_BASE + 0x0003)
+#define NRF_ERROR_MUTEX_UNLOCK_FAILED        (NRF_ERROR_SDK_COMMON_ERROR_BASE + 0x0003)
-#define MUTEX_COND_INIT_FAILED     (SDK_COMMON_ERROR_BASE + 0x0004)
+#define NRF_ERROR_MUTEX_COND_INIT_FAILED     (NRF_ERROR_SDK_COMMON_ERROR_BASE + 0x0004)
-#define MODULE_ALREADY_INITIALIZED (SDK_COMMON_ERROR_BASE + 0x0005)
+#define NRF_ERROR_MODULE_ALREADY_INITIALIZED (NRF_ERROR_SDK_COMMON_ERROR_BASE + 0x0005)
-#define API_NOT_IMPLEMENTED        (SDK_COMMON_ERROR_BASE + 0x0010)
+#define NRF_ERROR_STORAGE_FULL               (NRF_ERROR_SDK_COMMON_ERROR_BASE + 0x0006)
-#define FEATURE_NOT_ENABLED        (SDK_COMMON_ERROR_BASE + 0x0011)
+#define NRF_ERROR_API_NOT_IMPLEMENTED        (NRF_ERROR_SDK_COMMON_ERROR_BASE + 0x0010)
-/* @} */
+#define NRF_ERROR_FEATURE_NOT_ENABLED        (NRF_ERROR_SDK_COMMON_ERROR_BASE + 0x0011)
+/** @} */
 
 
 /**
- * @defgroup dm_specific_errors Error / status codes specific to device manager.
+ * @defgroup drv_specific_errors Error / status codes specific to drivers.
  * @{
  */
-#define DM_NO_APP_CONTEXT                (DEVICE_MANAGER_ERR_BASE + 0x0040)
+#define NRF_ERROR_DRV_TWI_ERR_OVERRUN        (NRF_ERROR_PERIPH_DRIVERS_ERR_BASE + 0x0000)
-#define DM_SERVICE_CONTEXT_NOT_APPLIED   (DEVICE_MANAGER_ERR_BASE + 0x0041)
+#define NRF_ERROR_DRV_TWI_ERR_ANACK          (NRF_ERROR_PERIPH_DRIVERS_ERR_BASE + 0x0001)
-#define DM_CONTEXT_INFO_LOST             (DEVICE_MANAGER_ERR_BASE + 0x0042)
+#define NRF_ERROR_DRV_TWI_ERR_DNACK          (NRF_ERROR_PERIPH_DRIVERS_ERR_BASE + 0x0002)
-#define DM_DEVICE_CONTEXT_FULL           (DEVICE_MANAGER_ERR_BASE + 0x0043)
+/** @} */
+
+
+/**
+ * @defgroup ble_ipsp_errors IPSP codes
+ * @brief Error and status codes specific to IPSP.
+ * @{
+ */
+#define NRF_ERROR_BLE_IPSP_RX_PKT_TRUNCATED       (NRF_ERROR_BLE_IPSP_ERR_BASE + 0x0000)
+#define NRF_ERROR_BLE_IPSP_CHANNEL_ALREADY_EXISTS (NRF_ERROR_BLE_IPSP_ERR_BASE + 0x0001)
+#define NRF_ERROR_BLE_IPSP_LINK_DISCONNECTED      (NRF_ERROR_BLE_IPSP_ERR_BASE + 0x0002)
+#define NRF_ERROR_BLE_IPSP_PEER_REJECTED          (NRF_ERROR_BLE_IPSP_ERR_BASE + 0x0003)
 /* @} */
 
+
 /**
  * @brief API Result.
  *
@@ -108,8 +155,12 @@
  *          an indicative of whether the procedure has been requested successfully.
  */
 typedef uint32_t ret_code_t;
+
 /** @} */
 /** @} */
 
+#ifdef __cplusplus
+}
+#endif
+
 #endif // SDK_ERRORS_H__
-

nRF5_SDK_11.0.0_89a8197/components/libraries/util/sdk_macros.h

@@ -1,72 +1,191 @@
-/* Copyright (c) 2013 Nordic Semiconductor. All Rights Reserved.
+/**
+ * Copyright (c) 2013 - 2017, Nordic Semiconductor ASA
  * 
- * The information contained herein is property of Nordic Semiconductor ASA.
+ * All rights reserved.
- * Terms and conditions of usage are described in detail in NORDIC
- * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
  * 
- * Licensees are granted free, non-transferable use of the information. NO
+ * Redistribution and use in source and binary forms, with or without modification,
- * WARRANTY of ANY KIND is provided. This heading must NOT be removed from
+ * are permitted provided that the following conditions are met:
- * the file.
+ * 
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ *    list of conditions and the following disclaimer.
+ * 
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ *    Semiconductor ASA integrated circuit in a product or a software update for
+ *    such product, must reproduce the above copyright notice, this list of
+ *    conditions and the following disclaimer in the documentation and/or other
+ *    materials provided with the distribution.
+ * 
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ *    contributors may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ * 
+ * 4. This software, with or without modification, must only be used with a
+ *    Nordic Semiconductor ASA integrated circuit.
+ * 
+ * 5. Any software provided in binary form under this license must not be reverse
+ *    engineered, decompiled, modified and/or disassembled.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  * 
  */
-
-/** @cond */
 /**@file
  *
- * @ingroup sdk_util
+
  * @defgroup sdk_common_macros SDK Common Header
- * @breif Macros for parameter checking and similar tasks
+ * @ingroup app_common
+ * @brief Macros for parameter checking and similar tasks
  * @{
  */
 
 #ifndef SDK_MACROS_H__
 #define SDK_MACROS_H__
 
-/**@brief Macro for verifying that the module is initialized. It will cause the function to return
+#ifdef __cplusplus
- *        @ref NRF_ERROR_INVALID_STATE if not.
+extern "C" {
+#endif
+
+
+/**@brief Macro for verifying statement to be true. It will cause the exterior function to return
+ *        err_code if the statement is not true.
+ *
+ * @param[in]   statement   Statement to test.
+ * @param[in]   err_code    Error value to return if test was invalid.
+ *
+ * @retval      nothing, but will cause the exterior function to return @p err_code if @p statement
+ *              is false.
+ */
+#define VERIFY_TRUE(statement, err_code)    \
+do                                          \
+{                                           \
+    if (!(statement))                       \
+    {                                       \
+        return err_code;                    \
+    }                                       \
+} while (0)
+
+
+/**@brief Macro for verifying statement to be true. It will cause the exterior function to return
+ *        if the statement is not true.
+ *
+ * @param[in]   statement   Statement to test.
+ */
+#define VERIFY_TRUE_VOID(statement) VERIFY_TRUE((statement), )
+
+
+/**@brief Macro for verifying statement to be false. It will cause the exterior function to return
+ *        err_code if the statement is not false.
+ *
+ * @param[in]   statement   Statement to test.
+ * @param[in]   err_code    Error value to return if test was invalid.
+ *
+ * @retval      nothing, but will cause the exterior function to return @p err_code if @p statement
+ *              is true.
+ */
+#define VERIFY_FALSE(statement, err_code)   \
+do                                          \
+{                                           \
+    if ((statement))                        \
+    {                                       \
+        return err_code;                    \
+    }                                       \
+} while (0)
+
+
+/**@brief Macro for verifying statement to be false. It will cause the exterior function to return
+ *        if the statement is not false.
+ *
+ * @param[in]   statement    Statement to test.
+ */
+#define VERIFY_FALSE_VOID(statement) VERIFY_FALSE((statement), )
+
+
+/**@brief Macro for verifying that a function returned NRF_SUCCESS. It will cause the exterior
+ *        function to return err_code if the err_code is not @ref NRF_SUCCESS.
+ *
+ * @param[in] err_code The error code to check.
+ */
+#ifdef DISABLE_PARAM_CHECK
+#define VERIFY_SUCCESS()
+#else
+#define VERIFY_SUCCESS(err_code) VERIFY_TRUE((err_code) == NRF_SUCCESS, (err_code))
+#endif /* DISABLE_PARAM_CHECK */
+
+
+/**@brief Macro for verifying that a function returned NRF_SUCCESS. It will cause the exterior
+ *        function to return if the err_code is not @ref NRF_SUCCESS.
+ *
+ * @param[in] err_code The error code to check.
+ */
+#ifdef DISABLE_PARAM_CHECK
+#define VERIFY_SUCCESS_VOID()
+#else
+#define VERIFY_SUCCESS_VOID(err_code) VERIFY_TRUE_VOID((err_code) == NRF_SUCCESS)
+#endif /* DISABLE_PARAM_CHECK */
+
+
+/**@brief Macro for verifying that the module is initialized. It will cause the exterior function to
+ *        return @ref NRF_ERROR_INVALID_STATE if not.
+ *
+ * @note MODULE_INITIALIZED must be defined in each module using this macro. MODULE_INITIALIZED
+ *       should be true if the module is initialized, false if not.
  */
 #ifdef DISABLE_PARAM_CHECK
 #define VERIFY_MODULE_INITIALIZED()
 #else
-#ifdef MODULE_INITIALIZED
+#define VERIFY_MODULE_INITIALIZED() VERIFY_TRUE((MODULE_INITIALIZED), NRF_ERROR_INVALID_STATE)
-#define VERIFY_MODULE_INITIALIZED()                 \
-do                                          \
-{                                           \
-    if (!MODULE_INITIALIZED)                \
-    {                                       \
-        return NRF_ERROR_INVALID_STATE;     \
-    }                                       \
-} while(0)
-#else
-#define VERIFY_MODULE_INITIALIZED()
-#endif /* MODULE_INITIALIZED  */
 #endif /* DISABLE_PARAM_CHECK */
 
 
-/**@brief Macro for verifying that the module is initialized. It will cause the function to return
+/**@brief Macro for verifying that the module is initialized. It will cause the exterior function to
- *        if not.
+ *        return if not.
+ *
+ * @note MODULE_INITIALIZED must be defined in each module using this macro. MODULE_INITIALIZED
+ *       should be true if the module is initialized, false if not.
  */
 #ifdef DISABLE_PARAM_CHECK
 #define VERIFY_MODULE_INITIALIZED_VOID()
 #else
-#ifdef MODULE_INITIALIZED
+#define VERIFY_MODULE_INITIALIZED_VOID() VERIFY_TRUE_VOID((MODULE_INITIALIZED))
-#define VERIFY_MODULE_INITIALIZED_VOID()            \
-do                                                  \
-{                                                   \
-    if (!MODULE_INITIALIZED)                        \
-    {                                               \
-        return;                                     \
-    }                                               \
-} while(0)
-#else
-#define VERIFY_MODULE_INITIALIZED_VOID()
-#endif /* MODULE_INITIALIZED  */
 #endif /* DISABLE_PARAM_CHECK */
 
 
+/**@brief Macro for verifying that the module is initialized. It will cause the exterior function to
+ *        return if not.
+ *
+ * @param[in] param  The variable to check if is NULL.
+ */
+#ifdef DISABLE_PARAM_CHECK
+#define VERIFY_PARAM_NOT_NULL()
+#else
+#define VERIFY_PARAM_NOT_NULL(param) VERIFY_FALSE(((param) == NULL), NRF_ERROR_NULL)
+#endif /* DISABLE_PARAM_CHECK */
 
 
+/**@brief Macro for verifying that the module is initialized. It will cause the exterior function to
+ *        return if not.
+ *
+ * @param[in] param  The variable to check if is NULL.
+ */
+#ifdef DISABLE_PARAM_CHECK
+#define VERIFY_PARAM_NOT_NULL_VOID()
+#else
+#define VERIFY_PARAM_NOT_NULL_VOID(param) VERIFY_FALSE_VOID(((param) == NULL))
+#endif /* DISABLE_PARAM_CHECK */
+
 /** @} */
-/** @endcond */
+
+#ifdef __cplusplus
+}
+#endif
+
 #endif // SDK_MACROS_H__
 

nRF5_SDK_11.0.0_89a8197/components/libraries/util/sdk_mapped_flags.c

@@ -1,15 +1,42 @@
-/* Copyright (c) 2015 Nordic Semiconductor. All Rights Reserved.
+/**
+ * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
  * 
- * The information contained herein is property of Nordic Semiconductor ASA.
+ * All rights reserved.
- * Terms and conditions of usage are described in detail in NORDIC
- * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
  * 
- * Licensees are granted free, non-transferable use of the information. NO
+ * Redistribution and use in source and binary forms, with or without modification,
- * WARRANTY of ANY KIND is provided. This heading must NOT be removed from
+ * are permitted provided that the following conditions are met:
- * the file.
+ * 
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ *    list of conditions and the following disclaimer.
+ * 
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ *    Semiconductor ASA integrated circuit in a product or a software update for
+ *    such product, must reproduce the above copyright notice, this list of
+ *    conditions and the following disclaimer in the documentation and/or other
+ *    materials provided with the distribution.
+ * 
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ *    contributors may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ * 
+ * 4. This software, with or without modification, must only be used with a
+ *    Nordic Semiconductor ASA integrated circuit.
+ * 
+ * 5. Any software provided in binary form under this license must not be reverse
+ *    engineered, decompiled, modified and/or disassembled.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  * 
  */
-
 #include "sdk_mapped_flags.h"
 #include <stdint.h>
 #include <stdbool.h>
@@ -17,6 +44,11 @@
 #include "compiler_abstraction.h"
 
 
+// Test whether the flag collection type is large enough to hold all the flags. If this fails,
+// reduce SDK_MAPPED_FLAGS_N_KEYS or increase the size of sdk_mapped_flags_t.
+STATIC_ASSERT((sizeof(sdk_mapped_flags_t) * SDK_MAPPED_FLAGS_N_KEYS_PER_BYTE) >= SDK_MAPPED_FLAGS_N_KEYS);
+
+
 /**@brief Function for setting the state of a flag to true.
  *
  * @note This function does not check whether the index is valid.
@@ -109,6 +141,33 @@ void sdk_mapped_flags_bulk_update_by_key(uint16_t           * p_keys,
 }
 
 
+bool sdk_mapped_flags_get_by_key_w_idx(uint16_t         * p_keys,
+                                       sdk_mapped_flags_t flags,
+                                       uint16_t           key,
+                                       uint8_t          * p_index)
+{
+    if (p_keys != NULL)
+    {
+        for (uint32_t i = 0; i < SDK_MAPPED_FLAGS_N_KEYS; i++)
+        {
+            if (p_keys[i] == key)
+            {
+                if (p_index != NULL)
+                {
+                    *p_index = i;
+                }
+                return sdk_mapped_flags_get_by_index(flags, i);
+            }
+        }
+    }
+    if (p_index != NULL)
+    {
+        *p_index = SDK_MAPPED_FLAGS_N_KEYS;
+    }
+    return false;
+}
+
+
 bool sdk_mapped_flags_get_by_key(uint16_t * p_keys, sdk_mapped_flags_t flags, uint16_t key)
 {
     if (p_keys != NULL)

nRF5_SDK_11.0.0_89a8197/components/libraries/util/sdk_mapped_flags.h

@@ -1,15 +1,42 @@
-/* Copyright (c) 2015 Nordic Semiconductor. All Rights Reserved.
+/**
+ * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
  * 
- * The information contained herein is property of Nordic Semiconductor ASA.
+ * All rights reserved.
- * Terms and conditions of usage are described in detail in NORDIC
- * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
  * 
- * Licensees are granted free, non-transferable use of the information. NO
+ * Redistribution and use in source and binary forms, with or without modification,
- * WARRANTY of ANY KIND is provided. This heading must NOT be removed from
+ * are permitted provided that the following conditions are met:
- * the file.
+ * 
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ *    list of conditions and the following disclaimer.
+ * 
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ *    Semiconductor ASA integrated circuit in a product or a software update for
+ *    such product, must reproduce the above copyright notice, this list of
+ *    conditions and the following disclaimer in the documentation and/or other
+ *    materials provided with the distribution.
+ * 
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ *    contributors may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ * 
+ * 4. This software, with or without modification, must only be used with a
+ *    Nordic Semiconductor ASA integrated circuit.
+ * 
+ * 5. Any software provided in binary form under this license must not be reverse
+ *    engineered, decompiled, modified and/or disassembled.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  * 
  */
-
 #ifndef SDK_MAPPED_FLAGS_H__
 #define SDK_MAPPED_FLAGS_H__
 
@@ -18,6 +45,10 @@
 #include "app_util.h"
 #include "compiler_abstraction.h"
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 /**
  * @file
  * @defgroup sdk_mapped_flags Mapped flags
@@ -37,17 +68,11 @@
  *
  */
 
-#define SDK_MAPPED_FLAGS_N_KEYS          8       /**< The number of keys to keep flags for. This is also the number of flags in a flag collection. If changing this value, you might also need change the width of the sdk_mapped_flags_t type. */
+#define SDK_MAPPED_FLAGS_N_KEYS          32      /**< The number of keys to keep flags for. This is also the number of flags in a flag collection. If changing this value, you might also need change the width of the sdk_mapped_flags_t type. */
 #define SDK_MAPPED_FLAGS_N_KEYS_PER_BYTE 8       /**< The number of flags that fit in one byte. */
 #define SDK_MAPPED_FLAGS_INVALID_INDEX   0xFFFF  /**< A flag index guaranteed to be invalid. */
 
-typedef uint8_t sdk_mapped_flags_t; /**< The bitmap to hold flags. Each flag is one bit, and each bit represents the flag state associated with one key. */
+typedef uint32_t sdk_mapped_flags_t; /**< The bitmap to hold flags. Each flag is one bit, and each bit represents the flag state associated with one key. */
-
-
-// Test whether the flag collection type is large enough to hold all the flags. If this fails,
-// reduce SDK_MAPPED_FLAGS_N_KEYS or increase the size of sdk_mapped_flags_t.
-STATIC_ASSERT((
-    sizeof(sdk_mapped_flags_t)*SDK_MAPPED_FLAGS_N_KEYS_PER_BYTE) >= SDK_MAPPED_FLAGS_N_KEYS);
 
 
 /**@brief Type used to present a subset of the registered keys.
@@ -114,6 +139,22 @@ void sdk_mapped_flags_bulk_update_by_key(uint16_t           * p_keys,
 bool sdk_mapped_flags_get_by_key(uint16_t * p_keys, sdk_mapped_flags_t flags, uint16_t key);
 
 
+/**@brief Function for getting the state of a specific flag.
+ *
+ * @param[in]  p_keys   The list of associated keys (assumed to have a length of
+ *                      @ref SDK_MAPPED_FLAGS_N_KEYS).
+ * @param[in]  flags    The flag collection from which to read.
+ * @param[in]  key      The key for which to get the flag.
+ * @param[out] p_index  If not NULL, the index of the key.
+ *
+ * @return  The state of the flag.
+ */
+bool sdk_mapped_flags_get_by_key_w_idx(uint16_t         * p_keys,
+                                       sdk_mapped_flags_t flags,
+                                       uint16_t           key,
+                                       uint8_t          * p_index);
+
+
 /**@brief Function for getting a list of all keys that have a specific flag set to true.
  *
  * @param[in]  p_keys  The list of associated keys (assumed to have a length of
@@ -150,4 +191,9 @@ static __INLINE bool sdk_mapped_flags_any_set(sdk_mapped_flags_t flags)
 
 /** @} */
 
+
+#ifdef __cplusplus
+}
+#endif
+
 #endif /* SDK_MAPPED_FLAGS_H__ */

nRF5_SDK_11.0.0_89a8197/components/libraries/util/sdk_os.h

@@ -1,15 +1,42 @@
-/* Copyright (c) 2013 Nordic Semiconductor. All Rights Reserved.
+/**
+ * Copyright (c) 2013 - 2017, Nordic Semiconductor ASA
  * 
- * The information contained herein is property of Nordic Semiconductor ASA.
+ * All rights reserved.
- * Terms and conditions of usage are described in detail in NORDIC
- * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
  * 
- * Licensees are granted free, non-transferable use of the information. NO
+ * Redistribution and use in source and binary forms, with or without modification,
- * WARRANTY of ANY KIND is provided. This heading must NOT be removed from
+ * are permitted provided that the following conditions are met:
- * the file.
+ * 
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ *    list of conditions and the following disclaimer.
+ * 
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ *    Semiconductor ASA integrated circuit in a product or a software update for
+ *    such product, must reproduce the above copyright notice, this list of
+ *    conditions and the following disclaimer in the documentation and/or other
+ *    materials provided with the distribution.
+ * 
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ *    contributors may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ * 
+ * 4. This software, with or without modification, must only be used with a
+ *    Nordic Semiconductor ASA integrated circuit.
+ * 
+ * 5. Any software provided in binary form under this license must not be reverse
+ *    engineered, decompiled, modified and/or disassembled.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  * 
  */
-
 /** @cond */
 /**@file
  *
@@ -25,6 +52,10 @@
 #ifndef SDK_OS_H__
 #define SDK_OS_H__
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 #define SDK_MUTEX_DEFINE(X)
 #define SDK_MUTEX_INIT(X)
 #define SDK_MUTEX_LOCK(X)
@@ -36,5 +67,10 @@
 
 /** @} */
 /** @endcond */
+
+#ifdef __cplusplus
+}
+#endif
+
 #endif // SDK_OS_H__
 

nRF5_SDK_11.0.0_89a8197/components/libraries/util/sdk_resources.h

@@ -1,14 +1,42 @@
-/* Copyright (c) 2015 Nordic Semiconductor. All Rights Reserved.
+/**
+ * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
  * 
- * The information contained herein is property of Nordic Semiconductor ASA.
+ * All rights reserved.
- * Terms and conditions of usage are described in detail in NORDIC
+ * 
- * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ * 
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ *    list of conditions and the following disclaimer.
+ * 
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ *    Semiconductor ASA integrated circuit in a product or a software update for
+ *    such product, must reproduce the above copyright notice, this list of
+ *    conditions and the following disclaimer in the documentation and/or other
+ *    materials provided with the distribution.
+ * 
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ *    contributors may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ * 
+ * 4. This software, with or without modification, must only be used with a
+ *    Nordic Semiconductor ASA integrated circuit.
+ * 
+ * 5. Any software provided in binary form under this license must not be reverse
+ *    engineered, decompiled, modified and/or disassembled.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  * 
- * Licensees are granted free, non-transferable use of the information. NO
- * WARRANTY of ANY KIND is provided. This heading must NOT be removed from
- * the file.
  */
-
 /** @file
  * @brief Definition file for resource usage by SoftDevice, ESB and Gazell.
  */
@@ -16,6 +44,10 @@
 #ifndef APP_RESOURCES_H__
 #define APP_RESOURCES_H__
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 #ifdef SOFTDEVICE_PRESENT
     #include "nrf_sd_def.h"
 #else
@@ -47,4 +79,8 @@
 #define NRF_SWI_USED          (SD_SWI_USED | GZLL_SWI_USED | ESB_SWI_USED)
 #define NRF_TIMERS_USED       (SD_TIMERS_USED | GZLL_TIMERS_USED | ESB_TIMERS_USED)
 
+#ifdef __cplusplus
+}
+#endif
+
 #endif // APP_RESOURCES_H__

nRF5_SDK_11.0.0_89a8197/components/toolchain/gcc/gcc_startup_nrf52840.S

@@ -0,0 +1,410 @@
+/*
+ 
+Copyright (c) 2009-2017 ARM Limited. All rights reserved.
+
+    SPDX-License-Identifier: Apache-2.0
+
+Licensed under the Apache License, Version 2.0 (the License); you may
+not use this file except in compliance with the License.
+You may obtain a copy of the License at
+
+    www.apache.org/licenses/LICENSE-2.0
+
+Unless required by applicable law or agreed to in writing, software
+distributed under the License is distributed on an AS IS BASIS, WITHOUT
+WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+See the License for the specific language governing permissions and
+limitations under the License.
+
+NOTICE: This file has been modified by Nordic Semiconductor ASA.
+
+*/
+
+    .syntax unified
+    .arch armv7e-m
+
+#ifdef __STARTUP_CONFIG
+#include "startup_config.h"
+#ifndef __STARTUP_CONFIG_STACK_ALIGNEMENT
+#define __STARTUP_CONFIG_STACK_ALIGNEMENT 3
+#endif
+#endif
+
+    .section .stack
+#if defined(__STARTUP_CONFIG)
+    .align __STARTUP_CONFIG_STACK_ALIGNEMENT
+    .equ    Stack_Size, __STARTUP_CONFIG_STACK_SIZE
+#elif defined(__STACK_SIZE)
+    .align 3
+    .equ    Stack_Size, __STACK_SIZE
+#else
+    .align 3
+    .equ    Stack_Size, 8192
+#endif
+    .globl __StackTop
+    .globl __StackLimit
+__StackLimit:
+    .space Stack_Size
+    .size __StackLimit, . - __StackLimit
+__StackTop:
+    .size __StackTop, . - __StackTop
+
+    .section .heap
+    .align 3
+#if defined(__STARTUP_CONFIG)
+    .equ Heap_Size, __STARTUP_CONFIG_HEAP_SIZE
+#elif defined(__HEAP_SIZE)
+    .equ Heap_Size, __HEAP_SIZE
+#else
+    .equ    Heap_Size, 8192
+#endif
+    .globl __HeapBase
+    .globl __HeapLimit
+__HeapBase:
+    .if Heap_Size
+    .space Heap_Size
+    .endif
+    .size __HeapBase, . - __HeapBase
+__HeapLimit:
+    .size __HeapLimit, . - __HeapLimit
+
+    .section .isr_vector
+    .align 2
+    .globl __isr_vector
+__isr_vector:
+    .long   __StackTop                  /* Top of Stack */
+    .long   Reset_Handler
+    .long   NMI_Handler
+    .long   HardFault_Handler
+    .long   MemoryManagement_Handler
+    .long   BusFault_Handler
+    .long   UsageFault_Handler
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   SVC_Handler
+    .long   DebugMon_Handler
+    .long   0                           /*Reserved */
+    .long   PendSV_Handler
+    .long   SysTick_Handler
+
+  /* External Interrupts */
+    .long   POWER_CLOCK_IRQHandler
+    .long   RADIO_IRQHandler
+    .long   UARTE0_UART0_IRQHandler
+    .long   SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler
+    .long   SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler
+    .long   NFCT_IRQHandler
+    .long   GPIOTE_IRQHandler
+    .long   SAADC_IRQHandler
+    .long   TIMER0_IRQHandler
+    .long   TIMER1_IRQHandler
+    .long   TIMER2_IRQHandler
+    .long   RTC0_IRQHandler
+    .long   TEMP_IRQHandler
+    .long   RNG_IRQHandler
+    .long   ECB_IRQHandler
+    .long   CCM_AAR_IRQHandler
+    .long   WDT_IRQHandler
+    .long   RTC1_IRQHandler
+    .long   QDEC_IRQHandler
+    .long   COMP_LPCOMP_IRQHandler
+    .long   SWI0_EGU0_IRQHandler
+    .long   SWI1_EGU1_IRQHandler
+    .long   SWI2_EGU2_IRQHandler
+    .long   SWI3_EGU3_IRQHandler
+    .long   SWI4_EGU4_IRQHandler
+    .long   SWI5_EGU5_IRQHandler
+    .long   TIMER3_IRQHandler
+    .long   TIMER4_IRQHandler
+    .long   PWM0_IRQHandler
+    .long   PDM_IRQHandler
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   MWU_IRQHandler
+    .long   PWM1_IRQHandler
+    .long   PWM2_IRQHandler
+    .long   SPIM2_SPIS2_SPI2_IRQHandler
+    .long   RTC2_IRQHandler
+    .long   I2S_IRQHandler
+    .long   FPU_IRQHandler
+    .long   USBD_IRQHandler
+    .long   UARTE1_IRQHandler
+    .long   QSPI_IRQHandler
+    .long   CRYPTOCELL_IRQHandler
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   PWM3_IRQHandler
+    .long   0                           /*Reserved */
+    .long   SPIM3_IRQHandler
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+    .long   0                           /*Reserved */
+
+    .size __isr_vector, . - __isr_vector
+
+/* Reset Handler */
+
+
+    .text
+    .thumb
+    .thumb_func
+    .align 1
+    .globl Reset_Handler
+    .type Reset_Handler, %function
+Reset_Handler:
+
+
+/* Loop to copy data from read only memory to RAM.
+ * The ranges of copy from/to are specified by following symbols:
+ *      __etext: LMA of start of the section to copy from. Usually end of text
+ *      __data_start__: VMA of start of the section to copy to.
+ *      __bss_start__: VMA of end of the section to copy to. Normally __data_end__ is used, but by using __bss_start__
+ *                    the user can add their own initialized data section before BSS section with the INTERT AFTER command.
+ *
+ * All addresses must be aligned to 4 bytes boundary.
+ */
+    ldr r1, =__etext
+    ldr r2, =__data_start__
+    ldr r3, =__bss_start__
+
+    subs r3, r2
+    ble .L_loop1_done
+
+.L_loop1:
+    subs r3, #4
+    ldr r0, [r1,r3]
+    str r0, [r2,r3]
+    bgt .L_loop1
+
+.L_loop1_done:
+
+/* This part of work usually is done in C library startup code. Otherwise,
+ * define __STARTUP_CLEAR_BSS to enable it in this startup. This section
+ * clears the RAM where BSS data is located.
+ *
+ * The BSS section is specified by following symbols
+ *    __bss_start__: start of the BSS section.
+ *    __bss_end__: end of the BSS section.
+ *
+ * All addresses must be aligned to 4 bytes boundary.
+ */
+#ifdef __STARTUP_CLEAR_BSS
+    ldr r1, =__bss_start__
+    ldr r2, =__bss_end__
+
+    movs r0, 0
+
+    subs r2, r1
+    ble .L_loop3_done
+
+.L_loop3:
+    subs r2, #4
+    str r0, [r1, r2]
+    bgt .L_loop3
+
+.L_loop3_done:
+#endif /* __STARTUP_CLEAR_BSS */
+
+/* Execute SystemInit function. */
+    bl SystemInit
+
+/* Call _start function provided by libraries.
+ * If those libraries are not accessible, define __START as your entry point.
+ */
+#ifndef __START
+#define __START _start
+#endif
+    bl __START
+
+    .pool
+    .size   Reset_Handler,.-Reset_Handler
+
+    .section ".text"
+
+
+/* Dummy Exception Handlers (infinite loops which can be modified) */
+
+    .weak   NMI_Handler
+    .type   NMI_Handler, %function
+NMI_Handler:
+    b       .
+    .size   NMI_Handler, . - NMI_Handler
+
+
+    .weak   HardFault_Handler
+    .type   HardFault_Handler, %function
+HardFault_Handler:
+    b       .
+    .size   HardFault_Handler, . - HardFault_Handler
+
+
+    .weak   MemoryManagement_Handler
+    .type   MemoryManagement_Handler, %function
+MemoryManagement_Handler:
+    b       .
+    .size   MemoryManagement_Handler, . - MemoryManagement_Handler
+
+
+    .weak   BusFault_Handler
+    .type   BusFault_Handler, %function
+BusFault_Handler:
+    b       .
+    .size   BusFault_Handler, . - BusFault_Handler
+
+
+    .weak   UsageFault_Handler
+    .type   UsageFault_Handler, %function
+UsageFault_Handler:
+    b       .
+    .size   UsageFault_Handler, . - UsageFault_Handler
+
+
+    .weak   SVC_Handler
+    .type   SVC_Handler, %function
+SVC_Handler:
+    b       .
+    .size   SVC_Handler, . - SVC_Handler
+
+
+    .weak   DebugMon_Handler
+    .type   DebugMon_Handler, %function
+DebugMon_Handler:
+    b       .
+    .size   DebugMon_Handler, . - DebugMon_Handler
+
+
+    .weak   PendSV_Handler
+    .type   PendSV_Handler, %function
+PendSV_Handler:
+    b       .
+    .size   PendSV_Handler, . - PendSV_Handler
+
+
+    .weak   SysTick_Handler
+    .type   SysTick_Handler, %function
+SysTick_Handler:
+    b       .
+    .size   SysTick_Handler, . - SysTick_Handler
+
+
+/* IRQ Handlers */
+
+    .globl  Default_Handler
+    .type   Default_Handler, %function
+Default_Handler:
+    b       .
+    .size   Default_Handler, . - Default_Handler
+
+    .macro  IRQ handler
+    .weak   \handler
+    .set    \handler, Default_Handler
+    .endm
+
+    IRQ  POWER_CLOCK_IRQHandler
+    IRQ  RADIO_IRQHandler
+    IRQ  UARTE0_UART0_IRQHandler
+    IRQ  SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler
+    IRQ  SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler
+    IRQ  NFCT_IRQHandler
+    IRQ  GPIOTE_IRQHandler
+    IRQ  SAADC_IRQHandler
+    IRQ  TIMER0_IRQHandler
+    IRQ  TIMER1_IRQHandler
+    IRQ  TIMER2_IRQHandler
+    IRQ  RTC0_IRQHandler
+    IRQ  TEMP_IRQHandler
+    IRQ  RNG_IRQHandler
+    IRQ  ECB_IRQHandler
+    IRQ  CCM_AAR_IRQHandler
+    IRQ  WDT_IRQHandler
+    IRQ  RTC1_IRQHandler
+    IRQ  QDEC_IRQHandler
+    IRQ  COMP_LPCOMP_IRQHandler
+    IRQ  SWI0_EGU0_IRQHandler
+    IRQ  SWI1_EGU1_IRQHandler
+    IRQ  SWI2_EGU2_IRQHandler
+    IRQ  SWI3_EGU3_IRQHandler
+    IRQ  SWI4_EGU4_IRQHandler
+    IRQ  SWI5_EGU5_IRQHandler
+    IRQ  TIMER3_IRQHandler
+    IRQ  TIMER4_IRQHandler
+    IRQ  PWM0_IRQHandler
+    IRQ  PDM_IRQHandler
+    IRQ  MWU_IRQHandler
+    IRQ  PWM1_IRQHandler
+    IRQ  PWM2_IRQHandler
+    IRQ  SPIM2_SPIS2_SPI2_IRQHandler
+    IRQ  RTC2_IRQHandler
+    IRQ  I2S_IRQHandler
+    IRQ  FPU_IRQHandler
+    IRQ  USBD_IRQHandler
+    IRQ  UARTE1_IRQHandler
+    IRQ  QSPI_IRQHandler
+    IRQ  CRYPTOCELL_IRQHandler
+    IRQ  PWM3_IRQHandler
+    IRQ  SPIM3_IRQHandler
+
+  .end

nRF5_SDK_11.0.0_89a8197/components/toolchain/system_nrf52840.c

@@ -0,0 +1,256 @@
+/*
+
+Copyright (c) 2009-2017 ARM Limited. All rights reserved.
+
+    SPDX-License-Identifier: Apache-2.0
+
+Licensed under the Apache License, Version 2.0 (the License); you may
+not use this file except in compliance with the License.
+You may obtain a copy of the License at
+
+    www.apache.org/licenses/LICENSE-2.0
+
+Unless required by applicable law or agreed to in writing, software
+distributed under the License is distributed on an AS IS BASIS, WITHOUT
+WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+See the License for the specific language governing permissions and
+limitations under the License.
+
+NOTICE: This file has been modified by Nordic Semiconductor ASA.
+
+*/
+
+/* NOTE: Template files (including this one) are application specific and therefore expected to
+   be copied into the application project folder prior to its use! */
+   
+#include <stdint.h>
+#include <stdbool.h>
+#include "nrf.h"
+#include "system_nrf52840.h"
+
+/*lint ++flb "Enter library region" */
+
+#define __SYSTEM_CLOCK_64M      (64000000UL)
+
+static bool errata_36(void);
+static bool errata_66(void);
+static bool errata_98(void);
+static bool errata_103(void);
+static bool errata_115(void);
+static bool errata_120(void);
+static bool errata_136(void);
+
+
+#if defined ( __CC_ARM )
+    uint32_t SystemCoreClock __attribute__((used)) = __SYSTEM_CLOCK_64M;
+#elif defined ( __ICCARM__ )
+    __root uint32_t SystemCoreClock = __SYSTEM_CLOCK_64M;
+#elif defined ( __GNUC__ )
+    uint32_t SystemCoreClock __attribute__((used)) = __SYSTEM_CLOCK_64M;
+#endif
+
+void SystemCoreClockUpdate(void)
+{
+    SystemCoreClock = __SYSTEM_CLOCK_64M;
+}
+
+void SystemInit(void)
+{
+    /* Enable SWO trace functionality. If ENABLE_SWO is not defined, SWO pin will be used as GPIO (see Product
+       Specification to see which one). */
+    #if defined (ENABLE_SWO)
+        CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk;
+        NRF_CLOCK->TRACECONFIG |= CLOCK_TRACECONFIG_TRACEMUX_Serial << CLOCK_TRACECONFIG_TRACEMUX_Pos;
+        NRF_P1->PIN_CNF[0] = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
+    #endif
+
+    /* Enable Trace functionality. If ENABLE_TRACE is not defined, TRACE pins will be used as GPIOs (see Product
+       Specification to see which ones). */
+    #if defined (ENABLE_TRACE)
+        CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk;
+        NRF_CLOCK->TRACECONFIG |= CLOCK_TRACECONFIG_TRACEMUX_Parallel << CLOCK_TRACECONFIG_TRACEMUX_Pos;
+        NRF_P0->PIN_CNF[7]  = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
+        NRF_P1->PIN_CNF[0]  = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
+        NRF_P0->PIN_CNF[12] = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
+        NRF_P0->PIN_CNF[11] = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
+        NRF_P1->PIN_CNF[9]  = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
+    #endif
+    
+    /* Workaround for Errata 36 "CLOCK: Some registers are not reset when expected" found at the Errata document
+       for your device located at https://infocenter.nordicsemi.com/  */
+    if (errata_36()){
+        NRF_CLOCK->EVENTS_DONE = 0;
+        NRF_CLOCK->EVENTS_CTTO = 0;
+        NRF_CLOCK->CTIV = 0;
+    }
+    
+    /* Workaround for Errata 66 "TEMP: Linearity specification not met with default settings" found at the Errata document
+       for your device located at https://infocenter.nordicsemi.com/  */
+    if (errata_66()){
+        NRF_TEMP->A0 = NRF_FICR->TEMP.A0;
+        NRF_TEMP->A1 = NRF_FICR->TEMP.A1;
+        NRF_TEMP->A2 = NRF_FICR->TEMP.A2;
+        NRF_TEMP->A3 = NRF_FICR->TEMP.A3;
+        NRF_TEMP->A4 = NRF_FICR->TEMP.A4;
+        NRF_TEMP->A5 = NRF_FICR->TEMP.A5;
+        NRF_TEMP->B0 = NRF_FICR->TEMP.B0;
+        NRF_TEMP->B1 = NRF_FICR->TEMP.B1;
+        NRF_TEMP->B2 = NRF_FICR->TEMP.B2;
+        NRF_TEMP->B3 = NRF_FICR->TEMP.B3;
+        NRF_TEMP->B4 = NRF_FICR->TEMP.B4;
+        NRF_TEMP->B5 = NRF_FICR->TEMP.B5;
+        NRF_TEMP->T0 = NRF_FICR->TEMP.T0;
+        NRF_TEMP->T1 = NRF_FICR->TEMP.T1;
+        NRF_TEMP->T2 = NRF_FICR->TEMP.T2;
+        NRF_TEMP->T3 = NRF_FICR->TEMP.T3;
+        NRF_TEMP->T4 = NRF_FICR->TEMP.T4;
+    }
+    
+    /* Workaround for Errata 98 "NFCT: Not able to communicate with the peer" found at the Errata document
+       for your device located at https://infocenter.nordicsemi.com/  */
+    if (errata_98()){
+        *(volatile uint32_t *)0x4000568Cul = 0x00038148ul;
+    }
+    
+    /* Workaround for Errata 103 "CCM: Wrong reset value of CCM MAXPACKETSIZE" found at the Errata document
+       for your device located at https://infocenter.nordicsemi.com/  */
+    if (errata_103()){
+        NRF_CCM->MAXPACKETSIZE = 0xFBul;
+    }
+    
+    /* Workaround for Errata 115 "RAM: RAM content cannot be trusted upon waking up from System ON Idle or System OFF mode" found at the Errata document
+       for your device located at https://infocenter.nordicsemi.com/  */
+    if (errata_115()){
+        *(volatile uint32_t *)0x40000EE4 = (*(volatile uint32_t *)0x40000EE4 & 0xFFFFFFF0) | (*(uint32_t *)0x10000258 & 0x0000000F);
+    }
+    
+    /* Workaround for Errata 120 "QSPI: Data read or written is corrupted" found at the Errata document
+       for your device located at https://infocenter.nordicsemi.com/  */
+    if (errata_120()){
+        *(volatile uint32_t *)0x40029640ul = 0x200ul;
+    }
+    
+    /* Workaround for Errata 136 "System: Bits in RESETREAS are set when they should not be" found at the Errata document
+       for your device located at https://infocenter.nordicsemi.com/  */
+    if (errata_136()){
+        if (NRF_POWER->RESETREAS & POWER_RESETREAS_RESETPIN_Msk){
+            NRF_POWER->RESETREAS =  ~POWER_RESETREAS_RESETPIN_Msk;
+        }
+    }
+    
+    /* Enable the FPU if the compiler used floating point unit instructions. __FPU_USED is a MACRO defined by the
+     * compiler. Since the FPU consumes energy, remember to disable FPU use in the compiler if floating point unit
+     * operations are not used in your code. */
+    #if (__FPU_USED == 1)
+        SCB->CPACR |= (3UL << 20) | (3UL << 22);
+        __DSB();
+        __ISB();
+    #endif
+
+    /* Configure NFCT pins as GPIOs if NFCT is not to be used in your code. If CONFIG_NFCT_PINS_AS_GPIOS is not defined,
+       two GPIOs (see Product Specification to see which ones) will be reserved for NFC and will not be available as
+       normal GPIOs. */
+    #if defined (CONFIG_NFCT_PINS_AS_GPIOS)
+        if ((NRF_UICR->NFCPINS & UICR_NFCPINS_PROTECT_Msk) == (UICR_NFCPINS_PROTECT_NFC << UICR_NFCPINS_PROTECT_Pos)){
+            NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Wen << NVMC_CONFIG_WEN_Pos;
+            while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
+            NRF_UICR->NFCPINS &= ~UICR_NFCPINS_PROTECT_Msk;
+            while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
+            NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Ren << NVMC_CONFIG_WEN_Pos;
+            while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
+            NVIC_SystemReset();
+        }
+    #endif
+
+    /* Configure GPIO pads as pPin Reset pin if Pin Reset capabilities desired. If CONFIG_GPIO_AS_PINRESET is not
+      defined, pin reset will not be available. One GPIO (see Product Specification to see which one) will then be
+      reserved for PinReset and not available as normal GPIO. */
+    #if defined (CONFIG_GPIO_AS_PINRESET)
+        if (((NRF_UICR->PSELRESET[0] & UICR_PSELRESET_CONNECT_Msk) != (UICR_PSELRESET_CONNECT_Connected << UICR_PSELRESET_CONNECT_Pos)) ||
+            ((NRF_UICR->PSELRESET[1] & UICR_PSELRESET_CONNECT_Msk) != (UICR_PSELRESET_CONNECT_Connected << UICR_PSELRESET_CONNECT_Pos))){
+            NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Wen << NVMC_CONFIG_WEN_Pos;
+            while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
+            NRF_UICR->PSELRESET[0] = 18;
+            while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
+            NRF_UICR->PSELRESET[1] = 18;
+            while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
+            NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Ren << NVMC_CONFIG_WEN_Pos;
+            while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
+            NVIC_SystemReset();
+        }
+    #endif
+
+    SystemCoreClockUpdate();
+}
+
+
+static bool errata_36(void)
+{
+    if ((*(uint32_t *)0x10000130ul == 0x8ul) && (*(uint32_t *)0x10000134ul == 0x0ul)){
+        return true;
+    }
+    
+    return false;
+}
+
+
+static bool errata_66(void)
+{
+    if ((*(uint32_t *)0x10000130ul == 0x8ul) && (*(uint32_t *)0x10000134ul == 0x0ul)){
+        return true;
+    }
+    
+    return false;
+}
+
+
+static bool errata_98(void)
+{
+    if ((*(uint32_t *)0x10000130ul == 0x8ul) && (*(uint32_t *)0x10000134ul == 0x0ul)){
+        return true;
+    }
+    
+    return false;
+}
+
+
+static bool errata_103(void)
+{
+    if ((*(uint32_t *)0x10000130ul == 0x8ul) && (*(uint32_t *)0x10000134ul == 0x0ul)){
+        return true;
+    }
+    
+    return false;
+}
+
+
+static bool errata_115(void)
+{
+    if ((*(uint32_t *)0x10000130ul == 0x8ul) && (*(uint32_t *)0x10000134ul == 0x0ul)){
+        return true;
+    }
+    
+    return false;
+}
+
+
+static bool errata_120(void)
+{
+    if ((*(uint32_t *)0x10000130ul == 0x8ul) && (*(uint32_t *)0x10000134ul == 0x0ul)){
+        return true;
+    }
+    
+    return false;
+}
+
+
+static bool errata_136(void)
+{
+    if ((*(uint32_t *)0x10000130ul == 0x8ul) && (*(uint32_t *)0x10000134ul == 0x0ul)){
+        return true;
+    }
+    
+    return false;
+}
+
+/*lint --flb "Leave library region" */

nRF5_SDK_11.0.0_89a8197/components/toolchain/system_nrf52840.h

@@ -0,0 +1,61 @@
+/*
+
+Copyright (c) 2009-2017 ARM Limited. All rights reserved.
+
+    SPDX-License-Identifier: Apache-2.0
+
+Licensed under the Apache License, Version 2.0 (the License); you may
+not use this file except in compliance with the License.
+You may obtain a copy of the License at
+
+    www.apache.org/licenses/LICENSE-2.0
+
+Unless required by applicable law or agreed to in writing, software
+distributed under the License is distributed on an AS IS BASIS, WITHOUT
+WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+See the License for the specific language governing permissions and
+limitations under the License.
+
+NOTICE: This file has been modified by Nordic Semiconductor ASA.
+
+*/
+
+#ifndef SYSTEM_NRF52840_H
+#define SYSTEM_NRF52840_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+
+
+extern uint32_t SystemCoreClock;    /*!< System Clock Frequency (Core Clock)  */
+
+/**
+ * Initialize the system
+ *
+ * @param  none
+ * @return none
+ *
+ * @brief  Setup the microcontroller system.
+ *         Initialize the System and update the SystemCoreClock variable.
+ */
+extern void SystemInit (void);
+
+/**
+ * Update SystemCoreClock variable
+ *
+ * @param  none
+ * @return none
+ *
+ * @brief  Updates the SystemCoreClock with current core Clock 
+ *         retrieved from cpu registers.
+ */
+extern void SystemCoreClockUpdate (void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* SYSTEM_NRF52840_H */

softdevice/common/softdevice_handler/softdevice_handler.c

@@ -22,7 +22,7 @@
 #include "nrf.h"
 #include "nrf_log.h"
 #include "sdk_common.h"
-#include "nrf_drv_config.h"
+#include "sdk_config.h"
 #if CLOCK_ENABLED
 #include "nrf_drv_clock.h"
 #endif
@@ -392,7 +392,7 @@ static inline uint32_t ram_total_size_get(void)
     uint32_t total_ram_size = size_ram_blocks;
     total_ram_size = total_ram_size*(NRF_FICR->NUMRAMBLOCK);
     return total_ram_size;
-#elif defined (NRF52)
+#elif defined(NRF52832_XXAA) || defined(NRF52840_XXAA)
     return RAM_TOTAL_SIZE;
 #endif /* NRF51 */
 }

src/main.c

@@ -106,7 +106,7 @@ enum { BLE_CONN_CFG_HIGH_BANDWIDTH = 1 };
 
 // Adafruit for factory reset
 #define APPDATA_ADDR_START                  (BOOTLOADER_REGION_START-DFU_APP_DATA_RESERVED)
-STATIC_ASSERT( APPDATA_ADDR_START == 0x6D000);
+STATIC_ASSERT( APPDATA_ADDR_START == 0xED000);
 
 void adafruit_factory_reset(void);
 volatile bool _freset_erased_complete = false;

src/make_common.mk

@@ -104,7 +104,6 @@ C_SOURCE_FILES += $(SDK_PATH)/libraries/hci/hci_transport.c
 C_SOURCE_FILES += $(SDK_PATH)/libraries/util/nrf_assert.c
 C_SOURCE_FILES += $(SDK_PATH)/libraries/uart/app_uart.c
 
-C_SOURCE_FILES += $(SDK_PATH)/drivers_nrf/delay/nrf_delay.c
 C_SOURCE_FILES += $(SDK_PATH)/drivers_nrf/common/nrf_drv_common.c
 C_SOURCE_FILES += $(SDK_PATH)/drivers_nrf/uart/nrf_drv_uart.c
 
@@ -115,7 +114,7 @@ C_SOURCE_FILES += $(SDK_PATH)/ble/ble_services/ble_dfu/ble_dfu.c
 C_SOURCE_FILES += $(SDK_PATH)/ble/ble_services/ble_dis/ble_dis.c
 
 C_SOURCE_FILES += $(SDK_PATH)/drivers_nrf/pstorage/pstorage_raw.c
-C_SOURCE_FILES += $(SDK_PATH)/toolchain/system_nrf52.c
+C_SOURCE_FILES += $(SDK_PATH)/toolchain/system_nrf52840.c
 
 C_SOURCE_FILES += ../../softdevice/common/softdevice_handler/softdevice_handler.c
 C_SOURCE_FILES += ../../softdevice/common/softdevice_handler/softdevice_handler_appsh.c
@@ -125,7 +124,7 @@ C_SOURCE_FILES += ../../softdevice/common/softdevice_handler/softdevice_handler_
 #******************************************************************************
 # Assembly Files
 #******************************************************************************
-ASM_SOURCE_FILES  = $(SDK_PATH)/toolchain/gcc/gcc_startup_nrf52.S
+ASM_SOURCE_FILES  = $(SDK_PATH)/toolchain/gcc/gcc_startup_nrf52840.S
 
 #******************************************************************************
 # INCLUDE PATH

src/nrf_drv_config.h

@@ -1,464 +0,0 @@
-/* Copyright (c) 2015 Nordic Semiconductor. All Rights Reserved.
- *
- * The information contained herein is property of Nordic Semiconductor ASA.
- * Terms and conditions of usage are described in detail in NORDIC
- * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
- *
- * Licensees are granted free, non-transferable use of the information. NO
- * WARRANTY of ANY KIND is provided. This heading must NOT be removed from
- * the file.
- *
- */
-
-#ifndef NRF_DRV_CONFIG_H
-#define NRF_DRV_CONFIG_H
-
-/**
- * Provide a non-zero value here in applications that need to use several
- * peripherals with the same ID that are sharing certain resources
- * (for example, SPI0 and TWI0). Obviously, such peripherals cannot be used
- * simultaneously. Therefore, this definition allows to initialize the driver
- * for another peripheral from a given group only after the previously used one
- * is uninitialized. Normally, this is not possible, because interrupt handlers
- * are implemented in individual drivers.
- * This functionality requires a more complicated interrupt handling and driver
- * initialization, hence it is not always desirable to use it.
- */
-#define PERIPHERAL_RESOURCE_SHARING_ENABLED  0
-
-/* CLOCK */
-#define CLOCK_ENABLED 0
-
-#if (CLOCK_ENABLED == 1)
-#define CLOCK_CONFIG_XTAL_FREQ          NRF_CLOCK_XTALFREQ_Default
-#define CLOCK_CONFIG_LF_SRC             NRF_CLOCK_LFCLK_Xtal
-#define CLOCK_CONFIG_IRQ_PRIORITY       APP_IRQ_PRIORITY_LOW
-#endif
-
-/* GPIOTE */
-#define GPIOTE_ENABLED 0
-
-#if (GPIOTE_ENABLED == 1)
-#define GPIOTE_CONFIG_USE_SWI_EGU false
-#define GPIOTE_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
-#define GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS 1
-#endif
-
-/* TIMER */
-#define TIMER0_ENABLED 0
-
-#if (TIMER0_ENABLED == 1)
-#define TIMER0_CONFIG_FREQUENCY    NRF_TIMER_FREQ_16MHz
-#define TIMER0_CONFIG_MODE         TIMER_MODE_MODE_Timer
-#define TIMER0_CONFIG_BIT_WIDTH    TIMER_BITMODE_BITMODE_32Bit
-#define TIMER0_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
-
-#define TIMER0_INSTANCE_INDEX      0
-#endif
-
-#define TIMER1_ENABLED 0
-
-#if (TIMER1_ENABLED == 1)
-#define TIMER1_CONFIG_FREQUENCY    NRF_TIMER_FREQ_16MHz
-#define TIMER1_CONFIG_MODE         TIMER_MODE_MODE_Timer
-#define TIMER1_CONFIG_BIT_WIDTH    TIMER_BITMODE_BITMODE_16Bit
-#define TIMER1_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
-
-#define TIMER1_INSTANCE_INDEX      (TIMER0_ENABLED)
-#endif
- 
-#define TIMER2_ENABLED 0
-
-#if (TIMER2_ENABLED == 1)
-#define TIMER2_CONFIG_FREQUENCY    NRF_TIMER_FREQ_16MHz
-#define TIMER2_CONFIG_MODE         TIMER_MODE_MODE_Timer
-#define TIMER2_CONFIG_BIT_WIDTH    TIMER_BITMODE_BITMODE_16Bit
-#define TIMER2_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
-
-#define TIMER2_INSTANCE_INDEX      (TIMER1_ENABLED+TIMER0_ENABLED)
-#endif
-
-#define TIMER3_ENABLED 0
-
-#if (TIMER3_ENABLED == 1)
-#define TIMER3_CONFIG_FREQUENCY    NRF_TIMER_FREQ_16MHz
-#define TIMER3_CONFIG_MODE         TIMER_MODE_MODE_Timer
-#define TIMER3_CONFIG_BIT_WIDTH    TIMER_BITMODE_BITMODE_16Bit
-#define TIMER3_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
-
-#define TIMER3_INSTANCE_INDEX      (TIMER2_ENABLED+TIMER1_ENABLED+TIMER0_ENABLED)
-#endif
-
-#define TIMER4_ENABLED 0
-
-#if (TIMER4_ENABLED == 1)
-#define TIMER4_CONFIG_FREQUENCY    NRF_TIMER_FREQ_16MHz
-#define TIMER4_CONFIG_MODE         TIMER_MODE_MODE_Timer
-#define TIMER4_CONFIG_BIT_WIDTH    TIMER_BITMODE_BITMODE_16Bit
-#define TIMER4_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
-
-#define TIMER4_INSTANCE_INDEX      (TIMER3_ENABLED+TIMER2_ENABLED+TIMER1_ENABLED+TIMER0_ENABLED)
-#endif
-
-
-#define TIMER_COUNT (TIMER0_ENABLED + TIMER1_ENABLED + TIMER2_ENABLED + TIMER3_ENABLED + TIMER4_ENABLED)
-
-/* RTC */
-#define RTC0_ENABLED 0
-
-#if (RTC0_ENABLED == 1)
-#define RTC0_CONFIG_FREQUENCY    32678
-#define RTC0_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
-#define RTC0_CONFIG_RELIABLE     false
-
-#define RTC0_INSTANCE_INDEX      0
-#endif
-
-#define RTC1_ENABLED 0
-
-#if (RTC1_ENABLED == 1)
-#define RTC1_CONFIG_FREQUENCY    32768
-#define RTC1_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
-#define RTC1_CONFIG_RELIABLE     false
-
-#define RTC1_INSTANCE_INDEX      (RTC0_ENABLED)
-#endif
-
-#define RTC2_ENABLED 0
-
-#if (RTC2_ENABLED == 1)
-#define RTC2_CONFIG_FREQUENCY    32768
-#define RTC2_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
-#define RTC2_CONFIG_RELIABLE     false
-
-#define RTC2_INSTANCE_INDEX      (RTC0_ENABLED+RTC1_ENABLED)
-#endif
-
-
-#define RTC_COUNT                (RTC0_ENABLED+RTC1_ENABLED+RTC2_ENABLED)
-
-#define NRF_MAXIMUM_LATENCY_US 2000
-
-/* RNG */
-#define RNG_ENABLED 0
-
-#if (RNG_ENABLED == 1)
-#define RNG_CONFIG_ERROR_CORRECTION true
-#define RNG_CONFIG_POOL_SIZE        8
-#define RNG_CONFIG_IRQ_PRIORITY     APP_IRQ_PRIORITY_LOW
-#endif
-
-/* PWM */
-
-#define PWM0_ENABLED 0
-
-#if (PWM0_ENABLED == 1)
-#define PWM0_CONFIG_OUT0_PIN        2
-#define PWM0_CONFIG_OUT1_PIN        3
-#define PWM0_CONFIG_OUT2_PIN        4
-#define PWM0_CONFIG_OUT3_PIN        5
-#define PWM0_CONFIG_IRQ_PRIORITY    APP_IRQ_PRIORITY_LOW
-#define PWM0_CONFIG_BASE_CLOCK      NRF_PWM_CLK_1MHz
-#define PWM0_CONFIG_COUNT_MODE      NRF_PWM_MODE_UP
-#define PWM0_CONFIG_TOP_VALUE       1000
-#define PWM0_CONFIG_LOAD_MODE       NRF_PWM_LOAD_COMMON
-#define PWM0_CONFIG_STEP_MODE       NRF_PWM_STEP_AUTO
-
-#define PWM0_INSTANCE_INDEX 0
-#endif
-
-#define PWM1_ENABLED 0
-
-#if (PWM1_ENABLED == 1)
-#define PWM1_CONFIG_OUT0_PIN        2
-#define PWM1_CONFIG_OUT1_PIN        3
-#define PWM1_CONFIG_OUT2_PIN        4
-#define PWM1_CONFIG_OUT3_PIN        5
-#define PWM1_CONFIG_IRQ_PRIORITY    APP_IRQ_PRIORITY_LOW
-#define PWM1_CONFIG_BASE_CLOCK      NRF_PWM_CLK_1MHz
-#define PWM1_CONFIG_COUNT_MODE      NRF_PWM_MODE_UP
-#define PWM1_CONFIG_TOP_VALUE       1000
-#define PWM1_CONFIG_LOAD_MODE       NRF_PWM_LOAD_COMMON
-#define PWM1_CONFIG_STEP_MODE       NRF_PWM_STEP_AUTO
-
-#define PWM1_INSTANCE_INDEX (PWM0_ENABLED)
-#endif
-
-#define PWM2_ENABLED 0
-
-#if (PWM2_ENABLED == 1)
-#define PWM2_CONFIG_OUT0_PIN        2
-#define PWM2_CONFIG_OUT1_PIN        3
-#define PWM2_CONFIG_OUT2_PIN        4
-#define PWM2_CONFIG_OUT3_PIN        5
-#define PWM2_CONFIG_IRQ_PRIORITY    APP_IRQ_PRIORITY_LOW
-#define PWM2_CONFIG_BASE_CLOCK      NRF_PWM_CLK_1MHz
-#define PWM2_CONFIG_COUNT_MODE      NRF_PWM_MODE_UP
-#define PWM2_CONFIG_TOP_VALUE       1000
-#define PWM2_CONFIG_LOAD_MODE       NRF_PWM_LOAD_COMMON
-#define PWM2_CONFIG_STEP_MODE       NRF_PWM_STEP_AUTO
-
-#define PWM2_INSTANCE_INDEX (PWM0_ENABLED + PWM1_ENABLED)
-#endif
-
-#define PWM_COUNT   (PWM0_ENABLED + PWM1_ENABLED + PWM2_ENABLED)
-
-/* SPI */
-#define SPI0_ENABLED 0
-
-#if (SPI0_ENABLED == 1)
-#define SPI0_USE_EASY_DMA 0
-
-#define SPI0_CONFIG_SCK_PIN         2
-#define SPI0_CONFIG_MOSI_PIN        3
-#define SPI0_CONFIG_MISO_PIN        4
-#define SPI0_CONFIG_IRQ_PRIORITY    APP_IRQ_PRIORITY_LOW
-
-#define SPI0_INSTANCE_INDEX 0
-#endif
-
-#define SPI1_ENABLED 0
-
-#if (SPI1_ENABLED == 1)
-#define SPI1_USE_EASY_DMA 0
-
-#define SPI1_CONFIG_SCK_PIN         2
-#define SPI1_CONFIG_MOSI_PIN        3
-#define SPI1_CONFIG_MISO_PIN        4
-#define SPI1_CONFIG_IRQ_PRIORITY    APP_IRQ_PRIORITY_LOW
-
-#define SPI1_INSTANCE_INDEX (SPI0_ENABLED)
-#endif
-
-#define SPI2_ENABLED 0
-
-#if (SPI2_ENABLED == 1)
-#define SPI2_USE_EASY_DMA 0
-
-#define SPI2_CONFIG_SCK_PIN         2
-#define SPI2_CONFIG_MOSI_PIN        3
-#define SPI2_CONFIG_MISO_PIN        4
-#define SPI2_CONFIG_IRQ_PRIORITY    APP_IRQ_PRIORITY_LOW
-
-#define SPI2_INSTANCE_INDEX (SPI0_ENABLED + SPI1_ENABLED)
-#endif
-
-#define SPI_COUNT   (SPI0_ENABLED + SPI1_ENABLED + SPI2_ENABLED)
-
-/* SPIS */
-#define SPIS0_ENABLED 0
-
-#if (SPIS0_ENABLED == 1)
-#define SPIS0_CONFIG_SCK_PIN         2
-#define SPIS0_CONFIG_MOSI_PIN        3
-#define SPIS0_CONFIG_MISO_PIN        4
-#define SPIS0_CONFIG_IRQ_PRIORITY    APP_IRQ_PRIORITY_LOW
-
-#define SPIS0_INSTANCE_INDEX 0
-#endif
-
-#define SPIS1_ENABLED 0
-
-#if (SPIS1_ENABLED == 1)
-#define SPIS1_CONFIG_SCK_PIN         2
-#define SPIS1_CONFIG_MOSI_PIN        3
-#define SPIS1_CONFIG_MISO_PIN        4
-#define SPIS1_CONFIG_IRQ_PRIORITY    APP_IRQ_PRIORITY_LOW
-
-#define SPIS1_INSTANCE_INDEX SPIS0_ENABLED
-#endif
-
-#define SPIS2_ENABLED 0
-
-#if (SPIS2_ENABLED == 1)
-#define SPIS2_CONFIG_SCK_PIN         2
-#define SPIS2_CONFIG_MOSI_PIN        3
-#define SPIS2_CONFIG_MISO_PIN        4
-#define SPIS2_CONFIG_IRQ_PRIORITY    APP_IRQ_PRIORITY_LOW
-
-#define SPIS2_INSTANCE_INDEX (SPIS0_ENABLED + SPIS1_ENABLED)
-#endif
-
-#define SPIS_COUNT   (SPIS0_ENABLED + SPIS1_ENABLED + SPIS2_ENABLED)
-
-/* UART */
-#define UART0_ENABLED 1
-
-#if (UART0_ENABLED == 1)
-#define UART0_CONFIG_HWFC         NRF_UART_HWFC_DISABLED
-#define UART0_CONFIG_PARITY       NRF_UART_PARITY_EXCLUDED
-#define UART0_CONFIG_BAUDRATE     NRF_UART_BAUDRATE_115200
-#define UART0_CONFIG_PSEL_TXD 6
-#define UART0_CONFIG_PSEL_RXD 8
-#define UART0_CONFIG_PSEL_CTS 7
-#define UART0_CONFIG_PSEL_RTS 5
-#define UART0_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
-#ifdef NRF52
-#define UART0_CONFIG_USE_EASY_DMA false
-//Compile time flag
-#define UART_EASY_DMA_SUPPORT     1
-#define UART_LEGACY_SUPPORT       1
-#endif //NRF52
-#endif
-
-#define TWI0_ENABLED 0
-
-#if (TWI0_ENABLED == 1)
-#define TWI0_USE_EASY_DMA 0
-
-#define TWI0_CONFIG_FREQUENCY    NRF_TWI_FREQ_100K
-#define TWI0_CONFIG_SCL          0
-#define TWI0_CONFIG_SDA          1
-#define TWI0_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
-
-#define TWI0_INSTANCE_INDEX      0
-#endif
-
-#define TWI1_ENABLED 0
-
-#if (TWI1_ENABLED == 1)
-#define TWI1_USE_EASY_DMA 0
-
-#define TWI1_CONFIG_FREQUENCY    NRF_TWI_FREQ_100K
-#define TWI1_CONFIG_SCL          0
-#define TWI1_CONFIG_SDA          1
-#define TWI1_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
-
-#define TWI1_INSTANCE_INDEX      (TWI0_ENABLED)
-#endif
-
-#define TWI_COUNT                (TWI0_ENABLED + TWI1_ENABLED)
-
-/* TWIS */
-#define TWIS0_ENABLED 0
-
-#if (TWIS0_ENABLED == 1)
-    #define TWIS0_CONFIG_ADDR0        0
-    #define TWIS0_CONFIG_ADDR1        0 /* 0: Disabled */
-    #define TWIS0_CONFIG_SCL          0
-    #define TWIS0_CONFIG_SDA          1
-    #define TWIS0_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
-
-    #define TWIS0_INSTANCE_INDEX      0
-#endif
-
-#define TWIS1_ENABLED 0
-
-#if (TWIS1_ENABLED ==  1)
-    #define TWIS1_CONFIG_ADDR0        0
-    #define TWIS1_CONFIG_ADDR1        0 /* 0: Disabled */
-    #define TWIS1_CONFIG_SCL          0
-    #define TWIS1_CONFIG_SDA          1
-    #define TWIS1_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
-
-    #define TWIS1_INSTANCE_INDEX      (TWIS0_ENABLED)
-#endif
-
-#define TWIS_COUNT (TWIS0_ENABLED + TWIS1_ENABLED)
-/* For more documentation see nrf_drv_twis.h file */
-#define TWIS_ASSUME_INIT_AFTER_RESET_ONLY 0
-/* For more documentation see nrf_drv_twis.h file */
-#define TWIS_NO_SYNC_MODE 0
-
-/* QDEC */
-#define QDEC_ENABLED 0
-
-#if (QDEC_ENABLED == 1)
-#define QDEC_CONFIG_REPORTPER    NRF_QDEC_REPORTPER_10
-#define QDEC_CONFIG_SAMPLEPER    NRF_QDEC_SAMPLEPER_16384us
-#define QDEC_CONFIG_PIO_A        1
-#define QDEC_CONFIG_PIO_B        2
-#define QDEC_CONFIG_PIO_LED      3
-#define QDEC_CONFIG_LEDPRE       511
-#define QDEC_CONFIG_LEDPOL       NRF_QDEC_LEPOL_ACTIVE_HIGH
-#define QDEC_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
-#define QDEC_CONFIG_DBFEN        false
-#define QDEC_CONFIG_SAMPLE_INTEN false
-#endif
-
-/* ADC */
-#define ADC_ENABLED 0
-
-#if (ADC_ENABLED == 1)
-#define ADC_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
-#endif
-
-
-/* SAADC */
-#define SAADC_ENABLED 0
-
-#if (SAADC_ENABLED == 1)
-#define SAADC_CONFIG_RESOLUTION      NRF_SAADC_RESOLUTION_10BIT
-#define SAADC_CONFIG_OVERSAMPLE      NRF_SAADC_OVERSAMPLE_DISABLED
-#define SAADC_CONFIG_IRQ_PRIORITY    APP_IRQ_PRIORITY_LOW
-#endif
-
-/* PDM */
-#define PDM_ENABLED 0
-
-#if (PDM_ENABLED == 1)
-#define PDM_CONFIG_MODE            NRF_PDM_MODE_MONO
-#define PDM_CONFIG_EDGE            NRF_PDM_EDGE_LEFTFALLING
-#define PDM_CONFIG_CLOCK_FREQ      NRF_PDM_FREQ_1032K
-#define PDM_CONFIG_IRQ_PRIORITY    APP_IRQ_PRIORITY_LOW
-#endif
-
-/* COMP */
-#define COMP_ENABLED 0
-
-#if (COMP_ENABLED == 1)
-#define COMP_CONFIG_REF     		NRF_COMP_REF_Int1V8
-#define COMP_CONFIG_MAIN_MODE		NRF_COMP_MAIN_MODE_SE
-#define COMP_CONFIG_SPEED_MODE		NRF_COMP_SP_MODE_High
-#define COMP_CONFIG_HYST			NRF_COMP_HYST_NoHyst
-#define COMP_CONFIG_ISOURCE			NRF_COMP_ISOURCE_Off
-#define COMP_CONFIG_IRQ_PRIORITY 	APP_IRQ_PRIORITY_LOW
-#define COMP_CONFIG_INPUT        	NRF_COMP_INPUT_0
-#endif
-
-/* LPCOMP */
-#define LPCOMP_ENABLED 0
-
-#if (LPCOMP_ENABLED == 1)
-#define LPCOMP_CONFIG_REFERENCE    NRF_LPCOMP_REF_SUPPLY_4_8
-#define LPCOMP_CONFIG_DETECTION    NRF_LPCOMP_DETECT_DOWN
-#define LPCOMP_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
-#define LPCOMP_CONFIG_INPUT        NRF_LPCOMP_INPUT_0
-#endif
-
-/* WDT */
-#define WDT_ENABLED 0
-
-#if (WDT_ENABLED == 1)
-#define WDT_CONFIG_BEHAVIOUR     NRF_WDT_BEHAVIOUR_RUN_SLEEP
-#define WDT_CONFIG_RELOAD_VALUE  2000
-#define WDT_CONFIG_IRQ_PRIORITY  APP_IRQ_PRIORITY_HIGH
-#endif
-
-/* SWI EGU */
-#ifdef NRF52
-    #define EGU_ENABLED 0
-#endif
-
-/* I2S */
-#define I2S_ENABLED 0
-
-#if (I2S_ENABLED == 1)
-#define I2S_CONFIG_SCK_PIN      22
-#define I2S_CONFIG_LRCK_PIN     23
-#define I2S_CONFIG_MCK_PIN      NRF_DRV_I2S_PIN_NOT_USED
-#define I2S_CONFIG_SDOUT_PIN    24
-#define I2S_CONFIG_SDIN_PIN     25
-#define I2S_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_HIGH
-#define I2S_CONFIG_MASTER       NRF_I2S_MODE_MASTER
-#define I2S_CONFIG_FORMAT       NRF_I2S_FORMAT_I2S
-#define I2S_CONFIG_ALIGN        NRF_I2S_ALIGN_LEFT
-#define I2S_CONFIG_SWIDTH       NRF_I2S_SWIDTH_16BIT
-#define I2S_CONFIG_CHANNELS     NRF_I2S_CHANNELS_STEREO
-#define I2S_CONFIG_MCK_SETUP    NRF_I2S_MCK_32MDIV8
-#define I2S_CONFIG_RATIO        NRF_I2S_RATIO_256X
-#endif
-
-#include "nrf_drv_config_validation.h"
-
-#endif // NRF_DRV_CONFIG_H