282 lines
7.5 KiB
Rust
282 lines
7.5 KiB
Rust
#[doc = r" Value read from the register"]
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pub struct R {
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bits: u32,
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}
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#[doc = r" Value to write to the register"]
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pub struct W {
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bits: u32,
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}
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impl super::CLKDIV4 {
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#[doc = r" Modifies the contents of the register"]
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#[inline]
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pub fn modify<F>(&self, f: F)
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where
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for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
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{
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let bits = self.register.get();
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let r = R { bits: bits };
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let mut w = W { bits: bits };
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f(&r, &mut w);
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self.register.set(w.bits);
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}
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#[doc = r" Reads the contents of the register"]
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#[inline]
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pub fn read(&self) -> R {
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R { bits: self.register.get() }
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}
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#[doc = r" Writes to the register"]
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#[inline]
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pub fn write<F>(&self, f: F)
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where
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F: FnOnce(&mut W) -> &mut W,
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{
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let mut w = W::reset_value();
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f(&mut w);
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self.register.set(w.bits);
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}
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#[doc = r" Writes the reset value to the register"]
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#[inline]
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pub fn reset(&self) {
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self.write(|w| w)
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}
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}
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#[doc = r" Value of the field"]
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pub struct TRACEFRACR {
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bits: bool,
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}
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impl TRACEFRACR {
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#[doc = r" Value of the field as raw bits"]
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#[inline]
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pub fn bit(&self) -> bool {
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self.bits
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}
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#[doc = r" Returns `true` if the bit is clear (0)"]
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#[inline]
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pub fn bit_is_clear(&self) -> bool {
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!self.bit()
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}
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#[doc = r" Returns `true` if the bit is set (1)"]
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#[inline]
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pub fn bit_is_set(&self) -> bool {
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self.bit()
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}
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}
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#[doc = r" Value of the field"]
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pub struct TRACEDIVR {
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bits: u8,
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}
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impl TRACEDIVR {
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#[doc = r" Value of the field as raw bits"]
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#[inline]
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pub fn bits(&self) -> u8 {
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self.bits
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}
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}
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#[doc = "Possible values of the field `TRACEDIVEN`"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum TRACEDIVENR {
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#[doc = "Debug trace divider disabled"]
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_0,
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#[doc = "Debug trace divider enabled"]
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_1,
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}
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impl TRACEDIVENR {
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#[doc = r" Returns `true` if the bit is clear (0)"]
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#[inline]
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pub fn bit_is_clear(&self) -> bool {
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!self.bit()
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}
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#[doc = r" Returns `true` if the bit is set (1)"]
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#[inline]
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pub fn bit_is_set(&self) -> bool {
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self.bit()
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}
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#[doc = r" Value of the field as raw bits"]
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#[inline]
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pub fn bit(&self) -> bool {
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match *self {
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TRACEDIVENR::_0 => false,
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TRACEDIVENR::_1 => true,
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}
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}
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#[allow(missing_docs)]
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#[doc(hidden)]
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#[inline]
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pub fn _from(value: bool) -> TRACEDIVENR {
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match value {
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false => TRACEDIVENR::_0,
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true => TRACEDIVENR::_1,
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}
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}
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#[doc = "Checks if the value of the field is `_0`"]
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#[inline]
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pub fn is_0(&self) -> bool {
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*self == TRACEDIVENR::_0
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}
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#[doc = "Checks if the value of the field is `_1`"]
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#[inline]
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pub fn is_1(&self) -> bool {
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*self == TRACEDIVENR::_1
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}
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}
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#[doc = r" Proxy"]
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pub struct _TRACEFRACW<'a> {
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w: &'a mut W,
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}
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impl<'a> _TRACEFRACW<'a> {
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#[doc = r" Sets the field bit"]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r" Clears the field bit"]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r" Writes raw bits to the field"]
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#[inline]
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pub fn bit(self, value: bool) -> &'a mut W {
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const MASK: bool = true;
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const OFFSET: u8 = 0;
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self.w.bits &= !((MASK as u32) << OFFSET);
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self.w.bits |= ((value & MASK) as u32) << OFFSET;
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self.w
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}
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}
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#[doc = r" Proxy"]
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pub struct _TRACEDIVW<'a> {
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w: &'a mut W,
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}
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impl<'a> _TRACEDIVW<'a> {
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#[doc = r" Writes raw bits to the field"]
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#[inline]
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pub unsafe fn bits(self, value: u8) -> &'a mut W {
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const MASK: u8 = 7;
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const OFFSET: u8 = 1;
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self.w.bits &= !((MASK as u32) << OFFSET);
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self.w.bits |= ((value & MASK) as u32) << OFFSET;
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self.w
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}
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}
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#[doc = "Values that can be written to the field `TRACEDIVEN`"]
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pub enum TRACEDIVENW {
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#[doc = "Debug trace divider disabled"]
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_0,
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#[doc = "Debug trace divider enabled"]
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_1,
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}
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impl TRACEDIVENW {
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#[allow(missing_docs)]
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#[doc(hidden)]
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#[inline]
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pub fn _bits(&self) -> bool {
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match *self {
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TRACEDIVENW::_0 => false,
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TRACEDIVENW::_1 => true,
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}
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}
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}
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#[doc = r" Proxy"]
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pub struct _TRACEDIVENW<'a> {
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w: &'a mut W,
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}
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impl<'a> _TRACEDIVENW<'a> {
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#[doc = r" Writes `variant` to the field"]
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#[inline]
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pub fn variant(self, variant: TRACEDIVENW) -> &'a mut W {
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{
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self.bit(variant._bits())
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}
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}
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#[doc = "Debug trace divider disabled"]
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#[inline]
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pub fn _0(self) -> &'a mut W {
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self.variant(TRACEDIVENW::_0)
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}
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#[doc = "Debug trace divider enabled"]
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#[inline]
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pub fn _1(self) -> &'a mut W {
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self.variant(TRACEDIVENW::_1)
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}
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#[doc = r" Sets the field bit"]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r" Clears the field bit"]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r" Writes raw bits to the field"]
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#[inline]
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pub fn bit(self, value: bool) -> &'a mut W {
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const MASK: bool = true;
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const OFFSET: u8 = 28;
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self.w.bits &= !((MASK as u32) << OFFSET);
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self.w.bits |= ((value & MASK) as u32) << OFFSET;
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self.w
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}
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}
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impl R {
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#[doc = r" Value of the register as raw bits"]
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#[inline]
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pub fn bits(&self) -> u32 {
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self.bits
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}
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#[doc = "Bit 0 - Trace Clock Divider fraction To configure TRACEDIV and TRACEFRAC, you must first clear TRACEDIVEN to disable the trace clock divide function."]
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#[inline]
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pub fn tracefrac(&self) -> TRACEFRACR {
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let bits = {
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const MASK: bool = true;
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const OFFSET: u8 = 0;
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((self.bits >> OFFSET) & MASK as u32) != 0
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};
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TRACEFRACR { bits }
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}
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#[doc = "Bits 1:3 - Trace Clock Divider value To configure TRACEDIV, you must first disable TRACEDIVEN, then enable it after setting TRACEDIV."]
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#[inline]
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pub fn tracediv(&self) -> TRACEDIVR {
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let bits = {
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const MASK: u8 = 7;
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const OFFSET: u8 = 1;
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((self.bits >> OFFSET) & MASK as u32) as u8
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};
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TRACEDIVR { bits }
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}
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#[doc = "Bit 28 - Debug Trace Divider control"]
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#[inline]
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pub fn tracediven(&self) -> TRACEDIVENR {
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TRACEDIVENR::_from({
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const MASK: bool = true;
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const OFFSET: u8 = 28;
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((self.bits >> OFFSET) & MASK as u32) != 0
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})
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}
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}
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impl W {
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#[doc = r" Reset value of the register"]
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#[inline]
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pub fn reset_value() -> W {
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W { bits: 268435456 }
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}
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#[doc = r" Writes raw bits to the register"]
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#[inline]
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pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
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self.bits = bits;
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self
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}
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#[doc = "Bit 0 - Trace Clock Divider fraction To configure TRACEDIV and TRACEFRAC, you must first clear TRACEDIVEN to disable the trace clock divide function."]
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#[inline]
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pub fn tracefrac(&mut self) -> _TRACEFRACW {
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_TRACEFRACW { w: self }
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}
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#[doc = "Bits 1:3 - Trace Clock Divider value To configure TRACEDIV, you must first disable TRACEDIVEN, then enable it after setting TRACEDIV."]
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#[inline]
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pub fn tracediv(&mut self) -> _TRACEDIVW {
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_TRACEDIVW { w: self }
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}
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#[doc = "Bit 28 - Debug Trace Divider control"]
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#[inline]
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pub fn tracediven(&mut self) -> _TRACEDIVENW {
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_TRACEDIVENW { w: self }
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}
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}
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