889 lines
24 KiB
Rust
889 lines
24 KiB
Rust
#[doc = r" Value read from the register"]
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pub struct R {
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bits: u32,
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}
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#[doc = r" Value to write to the register"]
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pub struct W {
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bits: u32,
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}
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impl super::QDCTRL {
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#[doc = r" Modifies the contents of the register"]
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#[inline]
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pub fn modify<F>(&self, f: F)
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where
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for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
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{
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let bits = self.register.get();
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let r = R { bits: bits };
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let mut w = W { bits: bits };
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f(&r, &mut w);
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self.register.set(w.bits);
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}
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#[doc = r" Reads the contents of the register"]
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#[inline]
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pub fn read(&self) -> R {
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R { bits: self.register.get() }
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}
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#[doc = r" Writes to the register"]
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#[inline]
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pub fn write<F>(&self, f: F)
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where
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F: FnOnce(&mut W) -> &mut W,
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{
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let mut w = W::reset_value();
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f(&mut w);
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self.register.set(w.bits);
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}
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#[doc = r" Writes the reset value to the register"]
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#[inline]
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pub fn reset(&self) {
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self.write(|w| w)
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}
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}
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#[doc = "Possible values of the field `QUADEN`"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum QUADENR {
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#[doc = "Quadrature Decoder mode is disabled."]
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_0,
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#[doc = "Quadrature Decoder mode is enabled."]
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_1,
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}
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impl QUADENR {
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#[doc = r" Returns `true` if the bit is clear (0)"]
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#[inline]
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pub fn bit_is_clear(&self) -> bool {
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!self.bit()
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}
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#[doc = r" Returns `true` if the bit is set (1)"]
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#[inline]
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pub fn bit_is_set(&self) -> bool {
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self.bit()
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}
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#[doc = r" Value of the field as raw bits"]
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#[inline]
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pub fn bit(&self) -> bool {
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match *self {
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QUADENR::_0 => false,
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QUADENR::_1 => true,
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}
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}
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#[allow(missing_docs)]
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#[doc(hidden)]
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#[inline]
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pub fn _from(value: bool) -> QUADENR {
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match value {
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false => QUADENR::_0,
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true => QUADENR::_1,
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}
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}
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#[doc = "Checks if the value of the field is `_0`"]
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#[inline]
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pub fn is_0(&self) -> bool {
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*self == QUADENR::_0
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}
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#[doc = "Checks if the value of the field is `_1`"]
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#[inline]
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pub fn is_1(&self) -> bool {
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*self == QUADENR::_1
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}
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}
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#[doc = "Possible values of the field `TOFDIR`"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum TOFDIRR {
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#[doc = "TOF bit was set on the bottom of counting. There was an FTM counter decrement and FTM counter changes from its minimum value (CNTIN register) to its maximum value (MOD register)."]
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_0,
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#[doc = "TOF bit was set on the top of counting. There was an FTM counter increment and FTM counter changes from its maximum value (MOD register) to its minimum value (CNTIN register)."]
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_1,
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}
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impl TOFDIRR {
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#[doc = r" Returns `true` if the bit is clear (0)"]
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#[inline]
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pub fn bit_is_clear(&self) -> bool {
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!self.bit()
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}
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#[doc = r" Returns `true` if the bit is set (1)"]
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#[inline]
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pub fn bit_is_set(&self) -> bool {
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self.bit()
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}
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#[doc = r" Value of the field as raw bits"]
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#[inline]
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pub fn bit(&self) -> bool {
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match *self {
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TOFDIRR::_0 => false,
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TOFDIRR::_1 => true,
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}
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}
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#[allow(missing_docs)]
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#[doc(hidden)]
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#[inline]
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pub fn _from(value: bool) -> TOFDIRR {
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match value {
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false => TOFDIRR::_0,
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true => TOFDIRR::_1,
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}
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}
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#[doc = "Checks if the value of the field is `_0`"]
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#[inline]
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pub fn is_0(&self) -> bool {
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*self == TOFDIRR::_0
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}
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#[doc = "Checks if the value of the field is `_1`"]
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#[inline]
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pub fn is_1(&self) -> bool {
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*self == TOFDIRR::_1
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}
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}
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#[doc = "Possible values of the field `QUADIR`"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum QUADIRR {
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#[doc = "Counting direction is decreasing (FTM counter decrement)."]
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_0,
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#[doc = "Counting direction is increasing (FTM counter increment)."]
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_1,
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}
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impl QUADIRR {
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#[doc = r" Returns `true` if the bit is clear (0)"]
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#[inline]
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pub fn bit_is_clear(&self) -> bool {
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!self.bit()
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}
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#[doc = r" Returns `true` if the bit is set (1)"]
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#[inline]
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pub fn bit_is_set(&self) -> bool {
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self.bit()
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}
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#[doc = r" Value of the field as raw bits"]
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#[inline]
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pub fn bit(&self) -> bool {
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match *self {
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QUADIRR::_0 => false,
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QUADIRR::_1 => true,
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}
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}
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#[allow(missing_docs)]
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#[doc(hidden)]
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#[inline]
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pub fn _from(value: bool) -> QUADIRR {
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match value {
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false => QUADIRR::_0,
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true => QUADIRR::_1,
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}
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}
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#[doc = "Checks if the value of the field is `_0`"]
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#[inline]
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pub fn is_0(&self) -> bool {
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*self == QUADIRR::_0
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}
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#[doc = "Checks if the value of the field is `_1`"]
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#[inline]
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pub fn is_1(&self) -> bool {
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*self == QUADIRR::_1
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}
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}
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#[doc = "Possible values of the field `QUADMODE`"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum QUADMODER {
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#[doc = "Phase A and phase B encoding mode."]
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_0,
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#[doc = "Count and direction encoding mode."]
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_1,
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}
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impl QUADMODER {
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#[doc = r" Returns `true` if the bit is clear (0)"]
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#[inline]
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pub fn bit_is_clear(&self) -> bool {
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!self.bit()
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}
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#[doc = r" Returns `true` if the bit is set (1)"]
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#[inline]
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pub fn bit_is_set(&self) -> bool {
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self.bit()
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}
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#[doc = r" Value of the field as raw bits"]
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#[inline]
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pub fn bit(&self) -> bool {
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match *self {
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QUADMODER::_0 => false,
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QUADMODER::_1 => true,
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}
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}
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#[allow(missing_docs)]
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#[doc(hidden)]
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#[inline]
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pub fn _from(value: bool) -> QUADMODER {
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match value {
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false => QUADMODER::_0,
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true => QUADMODER::_1,
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}
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}
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#[doc = "Checks if the value of the field is `_0`"]
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#[inline]
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pub fn is_0(&self) -> bool {
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*self == QUADMODER::_0
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}
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#[doc = "Checks if the value of the field is `_1`"]
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#[inline]
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pub fn is_1(&self) -> bool {
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*self == QUADMODER::_1
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}
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}
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#[doc = "Possible values of the field `PHBPOL`"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum PHBPOLR {
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#[doc = "Normal polarity. Phase B input signal is not inverted before identifying the rising and falling edges of this signal."]
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_0,
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#[doc = "Inverted polarity. Phase B input signal is inverted before identifying the rising and falling edges of this signal."]
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_1,
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}
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impl PHBPOLR {
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#[doc = r" Returns `true` if the bit is clear (0)"]
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#[inline]
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pub fn bit_is_clear(&self) -> bool {
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!self.bit()
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}
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#[doc = r" Returns `true` if the bit is set (1)"]
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#[inline]
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pub fn bit_is_set(&self) -> bool {
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self.bit()
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}
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#[doc = r" Value of the field as raw bits"]
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#[inline]
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pub fn bit(&self) -> bool {
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match *self {
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PHBPOLR::_0 => false,
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PHBPOLR::_1 => true,
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}
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}
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#[allow(missing_docs)]
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#[doc(hidden)]
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#[inline]
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pub fn _from(value: bool) -> PHBPOLR {
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match value {
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false => PHBPOLR::_0,
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true => PHBPOLR::_1,
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}
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}
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#[doc = "Checks if the value of the field is `_0`"]
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#[inline]
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pub fn is_0(&self) -> bool {
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*self == PHBPOLR::_0
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}
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#[doc = "Checks if the value of the field is `_1`"]
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#[inline]
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pub fn is_1(&self) -> bool {
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*self == PHBPOLR::_1
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}
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}
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#[doc = "Possible values of the field `PHAPOL`"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum PHAPOLR {
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#[doc = "Normal polarity. Phase A input signal is not inverted before identifying the rising and falling edges of this signal."]
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_0,
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#[doc = "Inverted polarity. Phase A input signal is inverted before identifying the rising and falling edges of this signal."]
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_1,
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}
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impl PHAPOLR {
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#[doc = r" Returns `true` if the bit is clear (0)"]
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#[inline]
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pub fn bit_is_clear(&self) -> bool {
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!self.bit()
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}
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#[doc = r" Returns `true` if the bit is set (1)"]
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#[inline]
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pub fn bit_is_set(&self) -> bool {
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self.bit()
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}
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#[doc = r" Value of the field as raw bits"]
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#[inline]
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pub fn bit(&self) -> bool {
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match *self {
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PHAPOLR::_0 => false,
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PHAPOLR::_1 => true,
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}
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}
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#[allow(missing_docs)]
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#[doc(hidden)]
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#[inline]
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pub fn _from(value: bool) -> PHAPOLR {
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match value {
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false => PHAPOLR::_0,
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true => PHAPOLR::_1,
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}
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}
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#[doc = "Checks if the value of the field is `_0`"]
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#[inline]
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pub fn is_0(&self) -> bool {
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*self == PHAPOLR::_0
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}
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#[doc = "Checks if the value of the field is `_1`"]
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#[inline]
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pub fn is_1(&self) -> bool {
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*self == PHAPOLR::_1
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}
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}
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#[doc = "Possible values of the field `PHBFLTREN`"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum PHBFLTRENR {
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#[doc = "Phase B input filter is disabled."]
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_0,
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#[doc = "Phase B input filter is enabled."]
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_1,
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}
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impl PHBFLTRENR {
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#[doc = r" Returns `true` if the bit is clear (0)"]
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#[inline]
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pub fn bit_is_clear(&self) -> bool {
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!self.bit()
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}
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#[doc = r" Returns `true` if the bit is set (1)"]
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#[inline]
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pub fn bit_is_set(&self) -> bool {
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self.bit()
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}
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#[doc = r" Value of the field as raw bits"]
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#[inline]
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pub fn bit(&self) -> bool {
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match *self {
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PHBFLTRENR::_0 => false,
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PHBFLTRENR::_1 => true,
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}
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}
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#[allow(missing_docs)]
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#[doc(hidden)]
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#[inline]
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pub fn _from(value: bool) -> PHBFLTRENR {
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match value {
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false => PHBFLTRENR::_0,
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true => PHBFLTRENR::_1,
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}
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}
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#[doc = "Checks if the value of the field is `_0`"]
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#[inline]
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pub fn is_0(&self) -> bool {
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*self == PHBFLTRENR::_0
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}
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#[doc = "Checks if the value of the field is `_1`"]
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#[inline]
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pub fn is_1(&self) -> bool {
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*self == PHBFLTRENR::_1
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}
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}
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#[doc = "Possible values of the field `PHAFLTREN`"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum PHAFLTRENR {
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#[doc = "Phase A input filter is disabled."]
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_0,
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#[doc = "Phase A input filter is enabled."]
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_1,
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}
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impl PHAFLTRENR {
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#[doc = r" Returns `true` if the bit is clear (0)"]
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#[inline]
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pub fn bit_is_clear(&self) -> bool {
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!self.bit()
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}
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#[doc = r" Returns `true` if the bit is set (1)"]
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#[inline]
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pub fn bit_is_set(&self) -> bool {
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self.bit()
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}
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#[doc = r" Value of the field as raw bits"]
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#[inline]
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pub fn bit(&self) -> bool {
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match *self {
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PHAFLTRENR::_0 => false,
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PHAFLTRENR::_1 => true,
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}
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}
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#[allow(missing_docs)]
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#[doc(hidden)]
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#[inline]
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pub fn _from(value: bool) -> PHAFLTRENR {
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match value {
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false => PHAFLTRENR::_0,
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true => PHAFLTRENR::_1,
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}
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}
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#[doc = "Checks if the value of the field is `_0`"]
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#[inline]
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pub fn is_0(&self) -> bool {
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*self == PHAFLTRENR::_0
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}
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#[doc = "Checks if the value of the field is `_1`"]
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#[inline]
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pub fn is_1(&self) -> bool {
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*self == PHAFLTRENR::_1
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}
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}
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#[doc = "Values that can be written to the field `QUADEN`"]
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pub enum QUADENW {
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#[doc = "Quadrature Decoder mode is disabled."]
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_0,
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#[doc = "Quadrature Decoder mode is enabled."]
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_1,
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}
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impl QUADENW {
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#[allow(missing_docs)]
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#[doc(hidden)]
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#[inline]
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pub fn _bits(&self) -> bool {
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match *self {
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QUADENW::_0 => false,
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QUADENW::_1 => true,
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}
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}
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}
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#[doc = r" Proxy"]
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pub struct _QUADENW<'a> {
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w: &'a mut W,
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}
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impl<'a> _QUADENW<'a> {
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#[doc = r" Writes `variant` to the field"]
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#[inline]
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pub fn variant(self, variant: QUADENW) -> &'a mut W {
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{
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self.bit(variant._bits())
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}
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}
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#[doc = "Quadrature Decoder mode is disabled."]
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#[inline]
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pub fn _0(self) -> &'a mut W {
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self.variant(QUADENW::_0)
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}
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#[doc = "Quadrature Decoder mode is enabled."]
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#[inline]
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pub fn _1(self) -> &'a mut W {
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self.variant(QUADENW::_1)
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}
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#[doc = r" Sets the field bit"]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r" Clears the field bit"]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r" Writes raw bits to the field"]
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#[inline]
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pub fn bit(self, value: bool) -> &'a mut W {
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const MASK: bool = true;
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const OFFSET: u8 = 0;
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self.w.bits &= !((MASK as u32) << OFFSET);
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self.w.bits |= ((value & MASK) as u32) << OFFSET;
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self.w
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}
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}
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#[doc = "Values that can be written to the field `QUADMODE`"]
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pub enum QUADMODEW {
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#[doc = "Phase A and phase B encoding mode."]
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_0,
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#[doc = "Count and direction encoding mode."]
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_1,
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}
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impl QUADMODEW {
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#[allow(missing_docs)]
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#[doc(hidden)]
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#[inline]
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pub fn _bits(&self) -> bool {
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match *self {
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QUADMODEW::_0 => false,
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QUADMODEW::_1 => true,
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}
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}
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}
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#[doc = r" Proxy"]
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pub struct _QUADMODEW<'a> {
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w: &'a mut W,
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}
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impl<'a> _QUADMODEW<'a> {
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#[doc = r" Writes `variant` to the field"]
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#[inline]
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pub fn variant(self, variant: QUADMODEW) -> &'a mut W {
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{
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self.bit(variant._bits())
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}
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}
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#[doc = "Phase A and phase B encoding mode."]
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#[inline]
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|
pub fn _0(self) -> &'a mut W {
|
|
self.variant(QUADMODEW::_0)
|
|
}
|
|
#[doc = "Count and direction encoding mode."]
|
|
#[inline]
|
|
pub fn _1(self) -> &'a mut W {
|
|
self.variant(QUADMODEW::_1)
|
|
}
|
|
#[doc = r" Sets the field bit"]
|
|
pub fn set_bit(self) -> &'a mut W {
|
|
self.bit(true)
|
|
}
|
|
#[doc = r" Clears the field bit"]
|
|
pub fn clear_bit(self) -> &'a mut W {
|
|
self.bit(false)
|
|
}
|
|
#[doc = r" Writes raw bits to the field"]
|
|
#[inline]
|
|
pub fn bit(self, value: bool) -> &'a mut W {
|
|
const MASK: bool = true;
|
|
const OFFSET: u8 = 3;
|
|
self.w.bits &= !((MASK as u32) << OFFSET);
|
|
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
|
self.w
|
|
}
|
|
}
|
|
#[doc = "Values that can be written to the field `PHBPOL`"]
|
|
pub enum PHBPOLW {
|
|
#[doc = "Normal polarity. Phase B input signal is not inverted before identifying the rising and falling edges of this signal."]
|
|
_0,
|
|
#[doc = "Inverted polarity. Phase B input signal is inverted before identifying the rising and falling edges of this signal."]
|
|
_1,
|
|
}
|
|
impl PHBPOLW {
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
#[inline]
|
|
pub fn _bits(&self) -> bool {
|
|
match *self {
|
|
PHBPOLW::_0 => false,
|
|
PHBPOLW::_1 => true,
|
|
}
|
|
}
|
|
}
|
|
#[doc = r" Proxy"]
|
|
pub struct _PHBPOLW<'a> {
|
|
w: &'a mut W,
|
|
}
|
|
impl<'a> _PHBPOLW<'a> {
|
|
#[doc = r" Writes `variant` to the field"]
|
|
#[inline]
|
|
pub fn variant(self, variant: PHBPOLW) -> &'a mut W {
|
|
{
|
|
self.bit(variant._bits())
|
|
}
|
|
}
|
|
#[doc = "Normal polarity. Phase B input signal is not inverted before identifying the rising and falling edges of this signal."]
|
|
#[inline]
|
|
pub fn _0(self) -> &'a mut W {
|
|
self.variant(PHBPOLW::_0)
|
|
}
|
|
#[doc = "Inverted polarity. Phase B input signal is inverted before identifying the rising and falling edges of this signal."]
|
|
#[inline]
|
|
pub fn _1(self) -> &'a mut W {
|
|
self.variant(PHBPOLW::_1)
|
|
}
|
|
#[doc = r" Sets the field bit"]
|
|
pub fn set_bit(self) -> &'a mut W {
|
|
self.bit(true)
|
|
}
|
|
#[doc = r" Clears the field bit"]
|
|
pub fn clear_bit(self) -> &'a mut W {
|
|
self.bit(false)
|
|
}
|
|
#[doc = r" Writes raw bits to the field"]
|
|
#[inline]
|
|
pub fn bit(self, value: bool) -> &'a mut W {
|
|
const MASK: bool = true;
|
|
const OFFSET: u8 = 4;
|
|
self.w.bits &= !((MASK as u32) << OFFSET);
|
|
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
|
self.w
|
|
}
|
|
}
|
|
#[doc = "Values that can be written to the field `PHAPOL`"]
|
|
pub enum PHAPOLW {
|
|
#[doc = "Normal polarity. Phase A input signal is not inverted before identifying the rising and falling edges of this signal."]
|
|
_0,
|
|
#[doc = "Inverted polarity. Phase A input signal is inverted before identifying the rising and falling edges of this signal."]
|
|
_1,
|
|
}
|
|
impl PHAPOLW {
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
#[inline]
|
|
pub fn _bits(&self) -> bool {
|
|
match *self {
|
|
PHAPOLW::_0 => false,
|
|
PHAPOLW::_1 => true,
|
|
}
|
|
}
|
|
}
|
|
#[doc = r" Proxy"]
|
|
pub struct _PHAPOLW<'a> {
|
|
w: &'a mut W,
|
|
}
|
|
impl<'a> _PHAPOLW<'a> {
|
|
#[doc = r" Writes `variant` to the field"]
|
|
#[inline]
|
|
pub fn variant(self, variant: PHAPOLW) -> &'a mut W {
|
|
{
|
|
self.bit(variant._bits())
|
|
}
|
|
}
|
|
#[doc = "Normal polarity. Phase A input signal is not inverted before identifying the rising and falling edges of this signal."]
|
|
#[inline]
|
|
pub fn _0(self) -> &'a mut W {
|
|
self.variant(PHAPOLW::_0)
|
|
}
|
|
#[doc = "Inverted polarity. Phase A input signal is inverted before identifying the rising and falling edges of this signal."]
|
|
#[inline]
|
|
pub fn _1(self) -> &'a mut W {
|
|
self.variant(PHAPOLW::_1)
|
|
}
|
|
#[doc = r" Sets the field bit"]
|
|
pub fn set_bit(self) -> &'a mut W {
|
|
self.bit(true)
|
|
}
|
|
#[doc = r" Clears the field bit"]
|
|
pub fn clear_bit(self) -> &'a mut W {
|
|
self.bit(false)
|
|
}
|
|
#[doc = r" Writes raw bits to the field"]
|
|
#[inline]
|
|
pub fn bit(self, value: bool) -> &'a mut W {
|
|
const MASK: bool = true;
|
|
const OFFSET: u8 = 5;
|
|
self.w.bits &= !((MASK as u32) << OFFSET);
|
|
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
|
self.w
|
|
}
|
|
}
|
|
#[doc = "Values that can be written to the field `PHBFLTREN`"]
|
|
pub enum PHBFLTRENW {
|
|
#[doc = "Phase B input filter is disabled."]
|
|
_0,
|
|
#[doc = "Phase B input filter is enabled."]
|
|
_1,
|
|
}
|
|
impl PHBFLTRENW {
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
#[inline]
|
|
pub fn _bits(&self) -> bool {
|
|
match *self {
|
|
PHBFLTRENW::_0 => false,
|
|
PHBFLTRENW::_1 => true,
|
|
}
|
|
}
|
|
}
|
|
#[doc = r" Proxy"]
|
|
pub struct _PHBFLTRENW<'a> {
|
|
w: &'a mut W,
|
|
}
|
|
impl<'a> _PHBFLTRENW<'a> {
|
|
#[doc = r" Writes `variant` to the field"]
|
|
#[inline]
|
|
pub fn variant(self, variant: PHBFLTRENW) -> &'a mut W {
|
|
{
|
|
self.bit(variant._bits())
|
|
}
|
|
}
|
|
#[doc = "Phase B input filter is disabled."]
|
|
#[inline]
|
|
pub fn _0(self) -> &'a mut W {
|
|
self.variant(PHBFLTRENW::_0)
|
|
}
|
|
#[doc = "Phase B input filter is enabled."]
|
|
#[inline]
|
|
pub fn _1(self) -> &'a mut W {
|
|
self.variant(PHBFLTRENW::_1)
|
|
}
|
|
#[doc = r" Sets the field bit"]
|
|
pub fn set_bit(self) -> &'a mut W {
|
|
self.bit(true)
|
|
}
|
|
#[doc = r" Clears the field bit"]
|
|
pub fn clear_bit(self) -> &'a mut W {
|
|
self.bit(false)
|
|
}
|
|
#[doc = r" Writes raw bits to the field"]
|
|
#[inline]
|
|
pub fn bit(self, value: bool) -> &'a mut W {
|
|
const MASK: bool = true;
|
|
const OFFSET: u8 = 6;
|
|
self.w.bits &= !((MASK as u32) << OFFSET);
|
|
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
|
self.w
|
|
}
|
|
}
|
|
#[doc = "Values that can be written to the field `PHAFLTREN`"]
|
|
pub enum PHAFLTRENW {
|
|
#[doc = "Phase A input filter is disabled."]
|
|
_0,
|
|
#[doc = "Phase A input filter is enabled."]
|
|
_1,
|
|
}
|
|
impl PHAFLTRENW {
|
|
#[allow(missing_docs)]
|
|
#[doc(hidden)]
|
|
#[inline]
|
|
pub fn _bits(&self) -> bool {
|
|
match *self {
|
|
PHAFLTRENW::_0 => false,
|
|
PHAFLTRENW::_1 => true,
|
|
}
|
|
}
|
|
}
|
|
#[doc = r" Proxy"]
|
|
pub struct _PHAFLTRENW<'a> {
|
|
w: &'a mut W,
|
|
}
|
|
impl<'a> _PHAFLTRENW<'a> {
|
|
#[doc = r" Writes `variant` to the field"]
|
|
#[inline]
|
|
pub fn variant(self, variant: PHAFLTRENW) -> &'a mut W {
|
|
{
|
|
self.bit(variant._bits())
|
|
}
|
|
}
|
|
#[doc = "Phase A input filter is disabled."]
|
|
#[inline]
|
|
pub fn _0(self) -> &'a mut W {
|
|
self.variant(PHAFLTRENW::_0)
|
|
}
|
|
#[doc = "Phase A input filter is enabled."]
|
|
#[inline]
|
|
pub fn _1(self) -> &'a mut W {
|
|
self.variant(PHAFLTRENW::_1)
|
|
}
|
|
#[doc = r" Sets the field bit"]
|
|
pub fn set_bit(self) -> &'a mut W {
|
|
self.bit(true)
|
|
}
|
|
#[doc = r" Clears the field bit"]
|
|
pub fn clear_bit(self) -> &'a mut W {
|
|
self.bit(false)
|
|
}
|
|
#[doc = r" Writes raw bits to the field"]
|
|
#[inline]
|
|
pub fn bit(self, value: bool) -> &'a mut W {
|
|
const MASK: bool = true;
|
|
const OFFSET: u8 = 7;
|
|
self.w.bits &= !((MASK as u32) << OFFSET);
|
|
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
|
self.w
|
|
}
|
|
}
|
|
impl R {
|
|
#[doc = r" Value of the register as raw bits"]
|
|
#[inline]
|
|
pub fn bits(&self) -> u32 {
|
|
self.bits
|
|
}
|
|
#[doc = "Bit 0 - Quadrature Decoder Mode Enable"]
|
|
#[inline]
|
|
pub fn quaden(&self) -> QUADENR {
|
|
QUADENR::_from({
|
|
const MASK: bool = true;
|
|
const OFFSET: u8 = 0;
|
|
((self.bits >> OFFSET) & MASK as u32) != 0
|
|
})
|
|
}
|
|
#[doc = "Bit 1 - Timer Overflow Direction In Quadrature Decoder Mode"]
|
|
#[inline]
|
|
pub fn tofdir(&self) -> TOFDIRR {
|
|
TOFDIRR::_from({
|
|
const MASK: bool = true;
|
|
const OFFSET: u8 = 1;
|
|
((self.bits >> OFFSET) & MASK as u32) != 0
|
|
})
|
|
}
|
|
#[doc = "Bit 2 - FTM Counter Direction In Quadrature Decoder Mode"]
|
|
#[inline]
|
|
pub fn quadir(&self) -> QUADIRR {
|
|
QUADIRR::_from({
|
|
const MASK: bool = true;
|
|
const OFFSET: u8 = 2;
|
|
((self.bits >> OFFSET) & MASK as u32) != 0
|
|
})
|
|
}
|
|
#[doc = "Bit 3 - Quadrature Decoder Mode"]
|
|
#[inline]
|
|
pub fn quadmode(&self) -> QUADMODER {
|
|
QUADMODER::_from({
|
|
const MASK: bool = true;
|
|
const OFFSET: u8 = 3;
|
|
((self.bits >> OFFSET) & MASK as u32) != 0
|
|
})
|
|
}
|
|
#[doc = "Bit 4 - Phase B Input Polarity"]
|
|
#[inline]
|
|
pub fn phbpol(&self) -> PHBPOLR {
|
|
PHBPOLR::_from({
|
|
const MASK: bool = true;
|
|
const OFFSET: u8 = 4;
|
|
((self.bits >> OFFSET) & MASK as u32) != 0
|
|
})
|
|
}
|
|
#[doc = "Bit 5 - Phase A Input Polarity"]
|
|
#[inline]
|
|
pub fn phapol(&self) -> PHAPOLR {
|
|
PHAPOLR::_from({
|
|
const MASK: bool = true;
|
|
const OFFSET: u8 = 5;
|
|
((self.bits >> OFFSET) & MASK as u32) != 0
|
|
})
|
|
}
|
|
#[doc = "Bit 6 - Phase B Input Filter Enable"]
|
|
#[inline]
|
|
pub fn phbfltren(&self) -> PHBFLTRENR {
|
|
PHBFLTRENR::_from({
|
|
const MASK: bool = true;
|
|
const OFFSET: u8 = 6;
|
|
((self.bits >> OFFSET) & MASK as u32) != 0
|
|
})
|
|
}
|
|
#[doc = "Bit 7 - Phase A Input Filter Enable"]
|
|
#[inline]
|
|
pub fn phafltren(&self) -> PHAFLTRENR {
|
|
PHAFLTRENR::_from({
|
|
const MASK: bool = true;
|
|
const OFFSET: u8 = 7;
|
|
((self.bits >> OFFSET) & MASK as u32) != 0
|
|
})
|
|
}
|
|
}
|
|
impl W {
|
|
#[doc = r" Reset value of the register"]
|
|
#[inline]
|
|
pub fn reset_value() -> W {
|
|
W { bits: 0 }
|
|
}
|
|
#[doc = r" Writes raw bits to the register"]
|
|
#[inline]
|
|
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
|
self.bits = bits;
|
|
self
|
|
}
|
|
#[doc = "Bit 0 - Quadrature Decoder Mode Enable"]
|
|
#[inline]
|
|
pub fn quaden(&mut self) -> _QUADENW {
|
|
_QUADENW { w: self }
|
|
}
|
|
#[doc = "Bit 3 - Quadrature Decoder Mode"]
|
|
#[inline]
|
|
pub fn quadmode(&mut self) -> _QUADMODEW {
|
|
_QUADMODEW { w: self }
|
|
}
|
|
#[doc = "Bit 4 - Phase B Input Polarity"]
|
|
#[inline]
|
|
pub fn phbpol(&mut self) -> _PHBPOLW {
|
|
_PHBPOLW { w: self }
|
|
}
|
|
#[doc = "Bit 5 - Phase A Input Polarity"]
|
|
#[inline]
|
|
pub fn phapol(&mut self) -> _PHAPOLW {
|
|
_PHAPOLW { w: self }
|
|
}
|
|
#[doc = "Bit 6 - Phase B Input Filter Enable"]
|
|
#[inline]
|
|
pub fn phbfltren(&mut self) -> _PHBFLTRENW {
|
|
_PHBFLTRENW { w: self }
|
|
}
|
|
#[doc = "Bit 7 - Phase A Input Filter Enable"]
|
|
#[inline]
|
|
pub fn phafltren(&mut self) -> _PHAFLTRENW {
|
|
_PHAFLTRENW { w: self }
|
|
}
|
|
}
|