382 lines
9.6 KiB
Rust
382 lines
9.6 KiB
Rust
#[doc = r" Value read from the register"]
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pub struct R {
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bits: u32,
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}
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#[doc = r" Value to write to the register"]
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pub struct W {
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bits: u32,
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}
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impl super::CONF {
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#[doc = r" Modifies the contents of the register"]
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#[inline]
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pub fn modify<F>(&self, f: F)
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where
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for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
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{
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let bits = self.register.get();
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let r = R { bits: bits };
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let mut w = W { bits: bits };
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f(&r, &mut w);
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self.register.set(w.bits);
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}
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#[doc = r" Reads the contents of the register"]
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#[inline]
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pub fn read(&self) -> R {
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R { bits: self.register.get() }
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}
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#[doc = r" Writes to the register"]
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#[inline]
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pub fn write<F>(&self, f: F)
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where
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F: FnOnce(&mut W) -> &mut W,
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{
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let mut w = W::reset_value();
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f(&mut w);
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self.register.set(w.bits);
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}
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#[doc = r" Writes the reset value to the register"]
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#[inline]
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pub fn reset(&self) {
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self.write(|w| w)
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}
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}
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#[doc = r" Value of the field"]
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pub struct LDFQR {
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bits: u8,
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}
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impl LDFQR {
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#[doc = r" Value of the field as raw bits"]
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#[inline]
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pub fn bits(&self) -> u8 {
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self.bits
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}
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}
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#[doc = r" Value of the field"]
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pub struct BDMMODER {
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bits: u8,
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}
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impl BDMMODER {
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#[doc = r" Value of the field as raw bits"]
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#[inline]
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pub fn bits(&self) -> u8 {
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self.bits
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}
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}
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#[doc = r" Value of the field"]
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pub struct GTBEENR {
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bits: bool,
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}
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impl GTBEENR {
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#[doc = r" Value of the field as raw bits"]
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#[inline]
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pub fn bit(&self) -> bool {
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self.bits
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}
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#[doc = r" Returns `true` if the bit is clear (0)"]
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#[inline]
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pub fn bit_is_clear(&self) -> bool {
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!self.bit()
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}
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#[doc = r" Returns `true` if the bit is set (1)"]
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#[inline]
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pub fn bit_is_set(&self) -> bool {
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self.bit()
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}
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}
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#[doc = r" Value of the field"]
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pub struct GTBEOUTR {
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bits: bool,
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}
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impl GTBEOUTR {
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#[doc = r" Value of the field as raw bits"]
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#[inline]
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pub fn bit(&self) -> bool {
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self.bits
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}
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#[doc = r" Returns `true` if the bit is clear (0)"]
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#[inline]
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pub fn bit_is_clear(&self) -> bool {
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!self.bit()
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}
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#[doc = r" Returns `true` if the bit is set (1)"]
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#[inline]
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pub fn bit_is_set(&self) -> bool {
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self.bit()
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}
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}
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#[doc = "Possible values of the field `ITRIGR`"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum ITRIGRR {
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#[doc = "Initialization trigger is generated on counter wrap events."]
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_0,
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#[doc = "Initialization trigger is generated when a reload point is reached."]
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_1,
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}
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impl ITRIGRR {
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#[doc = r" Returns `true` if the bit is clear (0)"]
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#[inline]
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pub fn bit_is_clear(&self) -> bool {
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!self.bit()
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}
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#[doc = r" Returns `true` if the bit is set (1)"]
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#[inline]
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pub fn bit_is_set(&self) -> bool {
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self.bit()
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}
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#[doc = r" Value of the field as raw bits"]
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#[inline]
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pub fn bit(&self) -> bool {
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match *self {
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ITRIGRR::_0 => false,
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ITRIGRR::_1 => true,
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}
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}
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#[allow(missing_docs)]
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#[doc(hidden)]
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#[inline]
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pub fn _from(value: bool) -> ITRIGRR {
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match value {
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false => ITRIGRR::_0,
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true => ITRIGRR::_1,
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}
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}
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#[doc = "Checks if the value of the field is `_0`"]
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#[inline]
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pub fn is_0(&self) -> bool {
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*self == ITRIGRR::_0
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}
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#[doc = "Checks if the value of the field is `_1`"]
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#[inline]
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pub fn is_1(&self) -> bool {
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*self == ITRIGRR::_1
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}
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}
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#[doc = r" Proxy"]
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pub struct _LDFQW<'a> {
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w: &'a mut W,
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}
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impl<'a> _LDFQW<'a> {
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#[doc = r" Writes raw bits to the field"]
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#[inline]
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pub unsafe fn bits(self, value: u8) -> &'a mut W {
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const MASK: u8 = 31;
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const OFFSET: u8 = 0;
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self.w.bits &= !((MASK as u32) << OFFSET);
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self.w.bits |= ((value & MASK) as u32) << OFFSET;
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self.w
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}
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}
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#[doc = r" Proxy"]
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pub struct _BDMMODEW<'a> {
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w: &'a mut W,
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}
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impl<'a> _BDMMODEW<'a> {
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#[doc = r" Writes raw bits to the field"]
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#[inline]
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pub unsafe fn bits(self, value: u8) -> &'a mut W {
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const MASK: u8 = 3;
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const OFFSET: u8 = 6;
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self.w.bits &= !((MASK as u32) << OFFSET);
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self.w.bits |= ((value & MASK) as u32) << OFFSET;
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self.w
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}
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}
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#[doc = r" Proxy"]
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pub struct _GTBEENW<'a> {
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w: &'a mut W,
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}
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impl<'a> _GTBEENW<'a> {
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#[doc = r" Sets the field bit"]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r" Clears the field bit"]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r" Writes raw bits to the field"]
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#[inline]
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pub fn bit(self, value: bool) -> &'a mut W {
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const MASK: bool = true;
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const OFFSET: u8 = 9;
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self.w.bits &= !((MASK as u32) << OFFSET);
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self.w.bits |= ((value & MASK) as u32) << OFFSET;
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self.w
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}
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}
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#[doc = r" Proxy"]
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pub struct _GTBEOUTW<'a> {
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w: &'a mut W,
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}
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impl<'a> _GTBEOUTW<'a> {
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#[doc = r" Sets the field bit"]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r" Clears the field bit"]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r" Writes raw bits to the field"]
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#[inline]
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pub fn bit(self, value: bool) -> &'a mut W {
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const MASK: bool = true;
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const OFFSET: u8 = 10;
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self.w.bits &= !((MASK as u32) << OFFSET);
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self.w.bits |= ((value & MASK) as u32) << OFFSET;
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self.w
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}
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}
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#[doc = "Values that can be written to the field `ITRIGR`"]
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pub enum ITRIGRW {
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#[doc = "Initialization trigger is generated on counter wrap events."]
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_0,
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#[doc = "Initialization trigger is generated when a reload point is reached."]
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_1,
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}
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impl ITRIGRW {
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#[allow(missing_docs)]
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#[doc(hidden)]
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#[inline]
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pub fn _bits(&self) -> bool {
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match *self {
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ITRIGRW::_0 => false,
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ITRIGRW::_1 => true,
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}
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}
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}
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#[doc = r" Proxy"]
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pub struct _ITRIGRW<'a> {
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w: &'a mut W,
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}
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impl<'a> _ITRIGRW<'a> {
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#[doc = r" Writes `variant` to the field"]
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#[inline]
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pub fn variant(self, variant: ITRIGRW) -> &'a mut W {
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{
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self.bit(variant._bits())
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}
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}
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#[doc = "Initialization trigger is generated on counter wrap events."]
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#[inline]
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pub fn _0(self) -> &'a mut W {
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self.variant(ITRIGRW::_0)
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}
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#[doc = "Initialization trigger is generated when a reload point is reached."]
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#[inline]
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pub fn _1(self) -> &'a mut W {
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self.variant(ITRIGRW::_1)
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}
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#[doc = r" Sets the field bit"]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r" Clears the field bit"]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r" Writes raw bits to the field"]
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#[inline]
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pub fn bit(self, value: bool) -> &'a mut W {
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const MASK: bool = true;
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const OFFSET: u8 = 11;
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self.w.bits &= !((MASK as u32) << OFFSET);
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self.w.bits |= ((value & MASK) as u32) << OFFSET;
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self.w
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}
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}
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impl R {
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#[doc = r" Value of the register as raw bits"]
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#[inline]
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pub fn bits(&self) -> u32 {
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self.bits
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}
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#[doc = "Bits 0:4 - Frequency of the Reload Opportunities"]
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#[inline]
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pub fn ldfq(&self) -> LDFQR {
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let bits = {
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const MASK: u8 = 31;
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const OFFSET: u8 = 0;
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((self.bits >> OFFSET) & MASK as u32) as u8
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};
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LDFQR { bits }
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}
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#[doc = "Bits 6:7 - Debug Mode"]
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#[inline]
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pub fn bdmmode(&self) -> BDMMODER {
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let bits = {
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const MASK: u8 = 3;
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const OFFSET: u8 = 6;
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((self.bits >> OFFSET) & MASK as u32) as u8
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};
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BDMMODER { bits }
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}
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#[doc = "Bit 9 - Global Time Base Enable"]
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#[inline]
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pub fn gtbeen(&self) -> GTBEENR {
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let bits = {
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const MASK: bool = true;
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const OFFSET: u8 = 9;
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((self.bits >> OFFSET) & MASK as u32) != 0
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};
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GTBEENR { bits }
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}
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#[doc = "Bit 10 - Global Time Base Output"]
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#[inline]
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pub fn gtbeout(&self) -> GTBEOUTR {
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let bits = {
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const MASK: bool = true;
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const OFFSET: u8 = 10;
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((self.bits >> OFFSET) & MASK as u32) != 0
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};
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GTBEOUTR { bits }
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}
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#[doc = "Bit 11 - Initialization trigger on Reload Point"]
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#[inline]
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pub fn itrigr(&self) -> ITRIGRR {
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ITRIGRR::_from({
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const MASK: bool = true;
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const OFFSET: u8 = 11;
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((self.bits >> OFFSET) & MASK as u32) != 0
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})
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}
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}
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impl W {
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#[doc = r" Reset value of the register"]
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#[inline]
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pub fn reset_value() -> W {
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W { bits: 0 }
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}
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#[doc = r" Writes raw bits to the register"]
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#[inline]
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pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
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self.bits = bits;
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self
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}
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#[doc = "Bits 0:4 - Frequency of the Reload Opportunities"]
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#[inline]
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pub fn ldfq(&mut self) -> _LDFQW {
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_LDFQW { w: self }
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}
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#[doc = "Bits 6:7 - Debug Mode"]
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#[inline]
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pub fn bdmmode(&mut self) -> _BDMMODEW {
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_BDMMODEW { w: self }
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}
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#[doc = "Bit 9 - Global Time Base Enable"]
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#[inline]
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pub fn gtbeen(&mut self) -> _GTBEENW {
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_GTBEENW { w: self }
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}
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#[doc = "Bit 10 - Global Time Base Output"]
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#[inline]
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pub fn gtbeout(&mut self) -> _GTBEOUTW {
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_GTBEOUTW { w: self }
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}
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#[doc = "Bit 11 - Initialization trigger on Reload Point"]
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#[inline]
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pub fn itrigr(&mut self) -> _ITRIGRW {
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_ITRIGRW { w: self }
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}
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}
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