132 lines
3.8 KiB
Rust
132 lines
3.8 KiB
Rust
#[doc = r" Register block"]
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#[repr(C)]
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pub struct RegisterBlock {
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_reserved0: [u8; 4usize],
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#[doc = "0x04 - Chip Control register"]
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pub chipctl: CHIPCTL,
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_reserved1: [u8; 4usize],
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#[doc = "0x0c - FTM Option Register 0"]
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pub ftmopt0: FTMOPT0,
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#[doc = "0x10 - LPO Clock Select Register"]
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pub lpoclks: LPOCLKS,
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_reserved2: [u8; 4usize],
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#[doc = "0x18 - ADC Options Register"]
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pub adcopt: ADCOPT,
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#[doc = "0x1c - FTM Option Register 1"]
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pub ftmopt1: FTMOPT1,
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#[doc = "0x20 - Miscellaneous control register 0"]
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pub misctrl0: MISCTRL0,
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#[doc = "0x24 - System Device Identification Register"]
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pub sdid: SDID,
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_reserved3: [u8; 24usize],
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#[doc = "0x40 - Platform Clock Gating Control Register"]
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pub platcgc: PLATCGC,
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_reserved4: [u8; 8usize],
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#[doc = "0x4c - Flash Configuration Register 1"]
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pub fcfg1: FCFG1,
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_reserved5: [u8; 4usize],
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#[doc = "0x54 - Unique Identification Register High"]
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pub uidh: UIDH,
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#[doc = "0x58 - Unique Identification Register Mid-High"]
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pub uidmh: UIDMH,
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#[doc = "0x5c - Unique Identification Register Mid Low"]
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pub uidml: UIDML,
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#[doc = "0x60 - Unique Identification Register Low"]
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pub uidl: UIDL,
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_reserved6: [u8; 4usize],
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#[doc = "0x68 - System Clock Divider Register 4"]
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pub clkdiv4: CLKDIV4,
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#[doc = "0x6c - Miscellaneous Control register 1"]
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pub misctrl1: MISCTRL1,
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}
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#[doc = "Chip Control register"]
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pub struct CHIPCTL {
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register: ::vcell::VolatileCell<u32>,
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}
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#[doc = "Chip Control register"]
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pub mod chipctl;
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#[doc = "FTM Option Register 0"]
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pub struct FTMOPT0 {
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register: ::vcell::VolatileCell<u32>,
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}
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#[doc = "FTM Option Register 0"]
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pub mod ftmopt0;
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#[doc = "LPO Clock Select Register"]
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pub struct LPOCLKS {
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register: ::vcell::VolatileCell<u32>,
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}
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#[doc = "LPO Clock Select Register"]
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pub mod lpoclks;
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#[doc = "ADC Options Register"]
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pub struct ADCOPT {
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register: ::vcell::VolatileCell<u32>,
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}
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#[doc = "ADC Options Register"]
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pub mod adcopt;
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#[doc = "FTM Option Register 1"]
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pub struct FTMOPT1 {
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register: ::vcell::VolatileCell<u32>,
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}
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#[doc = "FTM Option Register 1"]
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pub mod ftmopt1;
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#[doc = "Miscellaneous control register 0"]
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pub struct MISCTRL0 {
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register: ::vcell::VolatileCell<u32>,
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}
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#[doc = "Miscellaneous control register 0"]
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pub mod misctrl0;
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#[doc = "System Device Identification Register"]
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pub struct SDID {
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register: ::vcell::VolatileCell<u32>,
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}
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#[doc = "System Device Identification Register"]
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pub mod sdid;
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#[doc = "Platform Clock Gating Control Register"]
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pub struct PLATCGC {
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register: ::vcell::VolatileCell<u32>,
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}
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#[doc = "Platform Clock Gating Control Register"]
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pub mod platcgc;
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#[doc = "Flash Configuration Register 1"]
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pub struct FCFG1 {
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register: ::vcell::VolatileCell<u32>,
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}
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#[doc = "Flash Configuration Register 1"]
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pub mod fcfg1;
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#[doc = "Unique Identification Register High"]
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pub struct UIDH {
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register: ::vcell::VolatileCell<u32>,
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}
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#[doc = "Unique Identification Register High"]
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pub mod uidh;
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#[doc = "Unique Identification Register Mid-High"]
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pub struct UIDMH {
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register: ::vcell::VolatileCell<u32>,
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}
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#[doc = "Unique Identification Register Mid-High"]
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pub mod uidmh;
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#[doc = "Unique Identification Register Mid Low"]
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pub struct UIDML {
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register: ::vcell::VolatileCell<u32>,
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}
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#[doc = "Unique Identification Register Mid Low"]
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pub mod uidml;
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#[doc = "Unique Identification Register Low"]
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pub struct UIDL {
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register: ::vcell::VolatileCell<u32>,
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}
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#[doc = "Unique Identification Register Low"]
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pub mod uidl;
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#[doc = "System Clock Divider Register 4"]
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pub struct CLKDIV4 {
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register: ::vcell::VolatileCell<u32>,
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}
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#[doc = "System Clock Divider Register 4"]
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pub mod clkdiv4;
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#[doc = "Miscellaneous Control register 1"]
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pub struct MISCTRL1 {
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register: ::vcell::VolatileCell<u32>,
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}
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#[doc = "Miscellaneous Control register 1"]
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pub mod misctrl1;
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