634 lines
16 KiB
Rust
634 lines
16 KiB
Rust
#[doc = r" Value read from the register"]
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pub struct R {
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bits: u32,
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}
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#[doc = r" Value to write to the register"]
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pub struct W {
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bits: u32,
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}
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impl super::FIRCCSR {
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#[doc = r" Modifies the contents of the register"]
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#[inline]
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pub fn modify<F>(&self, f: F)
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where
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for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
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{
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let bits = self.register.get();
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let r = R { bits: bits };
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let mut w = W { bits: bits };
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f(&r, &mut w);
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self.register.set(w.bits);
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}
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#[doc = r" Reads the contents of the register"]
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#[inline]
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pub fn read(&self) -> R {
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R {
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bits: self.register.get(),
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}
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}
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#[doc = r" Writes to the register"]
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#[inline]
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pub fn write<F>(&self, f: F)
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where
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F: FnOnce(&mut W) -> &mut W,
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{
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let mut w = W::reset_value();
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f(&mut w);
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self.register.set(w.bits);
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}
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#[doc = r" Writes the reset value to the register"]
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#[inline]
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pub fn reset(&self) {
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self.write(|w| w)
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}
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}
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#[doc = "Possible values of the field `FIRCEN`"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum FIRCENR {
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#[doc = "Fast IRC is disabled"] _0,
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#[doc = "Fast IRC is enabled"] _1,
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}
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impl FIRCENR {
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#[doc = r" Returns `true` if the bit is clear (0)"]
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#[inline]
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pub fn bit_is_clear(&self) -> bool {
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!self.bit()
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}
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#[doc = r" Returns `true` if the bit is set (1)"]
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#[inline]
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pub fn bit_is_set(&self) -> bool {
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self.bit()
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}
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#[doc = r" Value of the field as raw bits"]
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#[inline]
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pub fn bit(&self) -> bool {
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match *self {
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FIRCENR::_0 => false,
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FIRCENR::_1 => true,
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}
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}
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#[allow(missing_docs)]
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#[doc(hidden)]
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#[inline]
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pub fn _from(value: bool) -> FIRCENR {
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match value {
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false => FIRCENR::_0,
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true => FIRCENR::_1,
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}
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}
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#[doc = "Checks if the value of the field is `_0`"]
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#[inline]
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pub fn is_0(&self) -> bool {
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*self == FIRCENR::_0
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}
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#[doc = "Checks if the value of the field is `_1`"]
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#[inline]
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pub fn is_1(&self) -> bool {
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*self == FIRCENR::_1
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}
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}
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#[doc = "Possible values of the field `FIRCREGOFF`"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum FIRCREGOFFR {
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#[doc = "Fast IRC Regulator is enabled."] _0,
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#[doc = "Fast IRC Regulator is disabled."] _1,
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}
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impl FIRCREGOFFR {
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#[doc = r" Returns `true` if the bit is clear (0)"]
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#[inline]
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pub fn bit_is_clear(&self) -> bool {
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!self.bit()
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}
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#[doc = r" Returns `true` if the bit is set (1)"]
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#[inline]
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pub fn bit_is_set(&self) -> bool {
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self.bit()
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}
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#[doc = r" Value of the field as raw bits"]
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#[inline]
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pub fn bit(&self) -> bool {
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match *self {
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FIRCREGOFFR::_0 => false,
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FIRCREGOFFR::_1 => true,
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}
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}
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#[allow(missing_docs)]
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#[doc(hidden)]
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#[inline]
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pub fn _from(value: bool) -> FIRCREGOFFR {
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match value {
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false => FIRCREGOFFR::_0,
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true => FIRCREGOFFR::_1,
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}
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}
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#[doc = "Checks if the value of the field is `_0`"]
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#[inline]
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pub fn is_0(&self) -> bool {
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*self == FIRCREGOFFR::_0
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}
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#[doc = "Checks if the value of the field is `_1`"]
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#[inline]
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pub fn is_1(&self) -> bool {
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*self == FIRCREGOFFR::_1
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}
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}
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#[doc = "Possible values of the field `LK`"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum LKR {
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#[doc = "Control Status Register can be written."] _0,
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#[doc = "Control Status Register cannot be written."] _1,
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}
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impl LKR {
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#[doc = r" Returns `true` if the bit is clear (0)"]
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#[inline]
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pub fn bit_is_clear(&self) -> bool {
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!self.bit()
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}
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#[doc = r" Returns `true` if the bit is set (1)"]
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#[inline]
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pub fn bit_is_set(&self) -> bool {
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self.bit()
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}
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#[doc = r" Value of the field as raw bits"]
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#[inline]
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pub fn bit(&self) -> bool {
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match *self {
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LKR::_0 => false,
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LKR::_1 => true,
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}
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}
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#[allow(missing_docs)]
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#[doc(hidden)]
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#[inline]
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pub fn _from(value: bool) -> LKR {
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match value {
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false => LKR::_0,
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true => LKR::_1,
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}
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}
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#[doc = "Checks if the value of the field is `_0`"]
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#[inline]
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pub fn is_0(&self) -> bool {
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*self == LKR::_0
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}
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#[doc = "Checks if the value of the field is `_1`"]
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#[inline]
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pub fn is_1(&self) -> bool {
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*self == LKR::_1
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}
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}
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#[doc = "Possible values of the field `FIRCVLD`"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum FIRCVLDR {
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#[doc = "Fast IRC is not enabled or clock is not valid."] _0,
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#[doc = "Fast IRC is enabled and output clock is valid. The clock is valid once there is an output clock from the FIRC analog."]
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_1,
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}
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impl FIRCVLDR {
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#[doc = r" Returns `true` if the bit is clear (0)"]
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#[inline]
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pub fn bit_is_clear(&self) -> bool {
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!self.bit()
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}
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#[doc = r" Returns `true` if the bit is set (1)"]
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#[inline]
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pub fn bit_is_set(&self) -> bool {
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self.bit()
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}
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#[doc = r" Value of the field as raw bits"]
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#[inline]
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pub fn bit(&self) -> bool {
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match *self {
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FIRCVLDR::_0 => false,
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FIRCVLDR::_1 => true,
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}
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}
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#[allow(missing_docs)]
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#[doc(hidden)]
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#[inline]
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pub fn _from(value: bool) -> FIRCVLDR {
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match value {
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false => FIRCVLDR::_0,
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true => FIRCVLDR::_1,
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}
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}
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#[doc = "Checks if the value of the field is `_0`"]
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#[inline]
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pub fn is_0(&self) -> bool {
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*self == FIRCVLDR::_0
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}
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#[doc = "Checks if the value of the field is `_1`"]
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#[inline]
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pub fn is_1(&self) -> bool {
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*self == FIRCVLDR::_1
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}
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}
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#[doc = "Possible values of the field `FIRCSEL`"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum FIRCSELR {
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#[doc = "Fast IRC is not the system clock source"] _0,
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#[doc = "Fast IRC is the system clock source"] _1,
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}
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impl FIRCSELR {
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#[doc = r" Returns `true` if the bit is clear (0)"]
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#[inline]
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pub fn bit_is_clear(&self) -> bool {
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!self.bit()
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}
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#[doc = r" Returns `true` if the bit is set (1)"]
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#[inline]
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pub fn bit_is_set(&self) -> bool {
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self.bit()
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}
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#[doc = r" Value of the field as raw bits"]
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#[inline]
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pub fn bit(&self) -> bool {
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match *self {
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FIRCSELR::_0 => false,
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FIRCSELR::_1 => true,
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}
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}
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#[allow(missing_docs)]
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#[doc(hidden)]
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#[inline]
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pub fn _from(value: bool) -> FIRCSELR {
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match value {
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false => FIRCSELR::_0,
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true => FIRCSELR::_1,
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}
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}
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#[doc = "Checks if the value of the field is `_0`"]
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#[inline]
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pub fn is_0(&self) -> bool {
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*self == FIRCSELR::_0
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}
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#[doc = "Checks if the value of the field is `_1`"]
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#[inline]
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pub fn is_1(&self) -> bool {
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*self == FIRCSELR::_1
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}
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}
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#[doc = "Possible values of the field `FIRCERR`"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum FIRCERRR {
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#[doc = "Error not detected with the Fast IRC trimming."] _0,
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#[doc = "Error detected with the Fast IRC trimming."] _1,
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}
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impl FIRCERRR {
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#[doc = r" Returns `true` if the bit is clear (0)"]
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#[inline]
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pub fn bit_is_clear(&self) -> bool {
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!self.bit()
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}
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#[doc = r" Returns `true` if the bit is set (1)"]
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#[inline]
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pub fn bit_is_set(&self) -> bool {
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self.bit()
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}
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#[doc = r" Value of the field as raw bits"]
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#[inline]
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pub fn bit(&self) -> bool {
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match *self {
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FIRCERRR::_0 => false,
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FIRCERRR::_1 => true,
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}
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}
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#[allow(missing_docs)]
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#[doc(hidden)]
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#[inline]
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pub fn _from(value: bool) -> FIRCERRR {
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match value {
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false => FIRCERRR::_0,
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true => FIRCERRR::_1,
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}
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}
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#[doc = "Checks if the value of the field is `_0`"]
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#[inline]
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pub fn is_0(&self) -> bool {
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*self == FIRCERRR::_0
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}
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#[doc = "Checks if the value of the field is `_1`"]
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#[inline]
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pub fn is_1(&self) -> bool {
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*self == FIRCERRR::_1
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}
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}
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#[doc = "Values that can be written to the field `FIRCEN`"]
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pub enum FIRCENW {
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#[doc = "Fast IRC is disabled"] _0,
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#[doc = "Fast IRC is enabled"] _1,
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}
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impl FIRCENW {
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#[allow(missing_docs)]
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#[doc(hidden)]
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#[inline]
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pub fn _bits(&self) -> bool {
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match *self {
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FIRCENW::_0 => false,
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FIRCENW::_1 => true,
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}
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}
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}
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#[doc = r" Proxy"]
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pub struct _FIRCENW<'a> {
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w: &'a mut W,
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}
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impl<'a> _FIRCENW<'a> {
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#[doc = r" Writes `variant` to the field"]
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#[inline]
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pub fn variant(self, variant: FIRCENW) -> &'a mut W {
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{
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self.bit(variant._bits())
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}
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}
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#[doc = "Fast IRC is disabled"]
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#[inline]
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pub fn _0(self) -> &'a mut W {
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self.variant(FIRCENW::_0)
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}
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#[doc = "Fast IRC is enabled"]
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#[inline]
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pub fn _1(self) -> &'a mut W {
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self.variant(FIRCENW::_1)
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}
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#[doc = r" Sets the field bit"]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r" Clears the field bit"]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r" Writes raw bits to the field"]
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#[inline]
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pub fn bit(self, value: bool) -> &'a mut W {
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const MASK: bool = true;
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const OFFSET: u8 = 0;
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self.w.bits &= !((MASK as u32) << OFFSET);
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self.w.bits |= ((value & MASK) as u32) << OFFSET;
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self.w
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}
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}
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#[doc = "Values that can be written to the field `FIRCREGOFF`"]
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pub enum FIRCREGOFFW {
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#[doc = "Fast IRC Regulator is enabled."] _0,
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#[doc = "Fast IRC Regulator is disabled."] _1,
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}
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impl FIRCREGOFFW {
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#[allow(missing_docs)]
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#[doc(hidden)]
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#[inline]
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pub fn _bits(&self) -> bool {
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match *self {
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FIRCREGOFFW::_0 => false,
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FIRCREGOFFW::_1 => true,
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}
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}
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}
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#[doc = r" Proxy"]
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pub struct _FIRCREGOFFW<'a> {
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w: &'a mut W,
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}
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impl<'a> _FIRCREGOFFW<'a> {
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#[doc = r" Writes `variant` to the field"]
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#[inline]
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pub fn variant(self, variant: FIRCREGOFFW) -> &'a mut W {
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{
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self.bit(variant._bits())
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}
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}
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#[doc = "Fast IRC Regulator is enabled."]
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#[inline]
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pub fn _0(self) -> &'a mut W {
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self.variant(FIRCREGOFFW::_0)
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}
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#[doc = "Fast IRC Regulator is disabled."]
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#[inline]
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pub fn _1(self) -> &'a mut W {
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self.variant(FIRCREGOFFW::_1)
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}
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#[doc = r" Sets the field bit"]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r" Clears the field bit"]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r" Writes raw bits to the field"]
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#[inline]
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pub fn bit(self, value: bool) -> &'a mut W {
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const MASK: bool = true;
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const OFFSET: u8 = 3;
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self.w.bits &= !((MASK as u32) << OFFSET);
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self.w.bits |= ((value & MASK) as u32) << OFFSET;
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self.w
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}
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}
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#[doc = "Values that can be written to the field `LK`"]
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pub enum LKW {
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#[doc = "Control Status Register can be written."] _0,
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#[doc = "Control Status Register cannot be written."] _1,
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}
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impl LKW {
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#[allow(missing_docs)]
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#[doc(hidden)]
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#[inline]
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pub fn _bits(&self) -> bool {
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match *self {
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LKW::_0 => false,
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LKW::_1 => true,
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}
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}
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}
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#[doc = r" Proxy"]
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pub struct _LKW<'a> {
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w: &'a mut W,
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}
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impl<'a> _LKW<'a> {
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#[doc = r" Writes `variant` to the field"]
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#[inline]
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pub fn variant(self, variant: LKW) -> &'a mut W {
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{
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self.bit(variant._bits())
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}
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}
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#[doc = "Control Status Register can be written."]
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#[inline]
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pub fn _0(self) -> &'a mut W {
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self.variant(LKW::_0)
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}
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#[doc = "Control Status Register cannot be written."]
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#[inline]
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pub fn _1(self) -> &'a mut W {
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self.variant(LKW::_1)
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}
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#[doc = r" Sets the field bit"]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r" Clears the field bit"]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r" Writes raw bits to the field"]
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#[inline]
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pub fn bit(self, value: bool) -> &'a mut W {
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const MASK: bool = true;
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const OFFSET: u8 = 23;
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self.w.bits &= !((MASK as u32) << OFFSET);
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self.w.bits |= ((value & MASK) as u32) << OFFSET;
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self.w
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}
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}
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#[doc = "Values that can be written to the field `FIRCERR`"]
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pub enum FIRCERRW {
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#[doc = "Error not detected with the Fast IRC trimming."] _0,
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#[doc = "Error detected with the Fast IRC trimming."] _1,
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}
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impl FIRCERRW {
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#[allow(missing_docs)]
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#[doc(hidden)]
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#[inline]
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pub fn _bits(&self) -> bool {
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match *self {
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FIRCERRW::_0 => false,
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FIRCERRW::_1 => true,
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}
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}
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}
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#[doc = r" Proxy"]
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pub struct _FIRCERRW<'a> {
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w: &'a mut W,
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}
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impl<'a> _FIRCERRW<'a> {
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#[doc = r" Writes `variant` to the field"]
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#[inline]
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|
pub fn variant(self, variant: FIRCERRW) -> &'a mut W {
|
|
{
|
|
self.bit(variant._bits())
|
|
}
|
|
}
|
|
#[doc = "Error not detected with the Fast IRC trimming."]
|
|
#[inline]
|
|
pub fn _0(self) -> &'a mut W {
|
|
self.variant(FIRCERRW::_0)
|
|
}
|
|
#[doc = "Error detected with the Fast IRC trimming."]
|
|
#[inline]
|
|
pub fn _1(self) -> &'a mut W {
|
|
self.variant(FIRCERRW::_1)
|
|
}
|
|
#[doc = r" Sets the field bit"]
|
|
pub fn set_bit(self) -> &'a mut W {
|
|
self.bit(true)
|
|
}
|
|
#[doc = r" Clears the field bit"]
|
|
pub fn clear_bit(self) -> &'a mut W {
|
|
self.bit(false)
|
|
}
|
|
#[doc = r" Writes raw bits to the field"]
|
|
#[inline]
|
|
pub fn bit(self, value: bool) -> &'a mut W {
|
|
const MASK: bool = true;
|
|
const OFFSET: u8 = 26;
|
|
self.w.bits &= !((MASK as u32) << OFFSET);
|
|
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
|
self.w
|
|
}
|
|
}
|
|
impl R {
|
|
#[doc = r" Value of the register as raw bits"]
|
|
#[inline]
|
|
pub fn bits(&self) -> u32 {
|
|
self.bits
|
|
}
|
|
#[doc = "Bit 0 - Fast IRC Enable"]
|
|
#[inline]
|
|
pub fn fircen(&self) -> FIRCENR {
|
|
FIRCENR::_from({
|
|
const MASK: bool = true;
|
|
const OFFSET: u8 = 0;
|
|
((self.bits >> OFFSET) & MASK as u32) != 0
|
|
})
|
|
}
|
|
#[doc = "Bit 3 - Fast IRC Regulator Enable"]
|
|
#[inline]
|
|
pub fn fircregoff(&self) -> FIRCREGOFFR {
|
|
FIRCREGOFFR::_from({
|
|
const MASK: bool = true;
|
|
const OFFSET: u8 = 3;
|
|
((self.bits >> OFFSET) & MASK as u32) != 0
|
|
})
|
|
}
|
|
#[doc = "Bit 23 - Lock Register"]
|
|
#[inline]
|
|
pub fn lk(&self) -> LKR {
|
|
LKR::_from({
|
|
const MASK: bool = true;
|
|
const OFFSET: u8 = 23;
|
|
((self.bits >> OFFSET) & MASK as u32) != 0
|
|
})
|
|
}
|
|
#[doc = "Bit 24 - Fast IRC Valid status"]
|
|
#[inline]
|
|
pub fn fircvld(&self) -> FIRCVLDR {
|
|
FIRCVLDR::_from({
|
|
const MASK: bool = true;
|
|
const OFFSET: u8 = 24;
|
|
((self.bits >> OFFSET) & MASK as u32) != 0
|
|
})
|
|
}
|
|
#[doc = "Bit 25 - Fast IRC Selected status"]
|
|
#[inline]
|
|
pub fn fircsel(&self) -> FIRCSELR {
|
|
FIRCSELR::_from({
|
|
const MASK: bool = true;
|
|
const OFFSET: u8 = 25;
|
|
((self.bits >> OFFSET) & MASK as u32) != 0
|
|
})
|
|
}
|
|
#[doc = "Bit 26 - Fast IRC Clock Error"]
|
|
#[inline]
|
|
pub fn fircerr(&self) -> FIRCERRR {
|
|
FIRCERRR::_from({
|
|
const MASK: bool = true;
|
|
const OFFSET: u8 = 26;
|
|
((self.bits >> OFFSET) & MASK as u32) != 0
|
|
})
|
|
}
|
|
}
|
|
impl W {
|
|
#[doc = r" Reset value of the register"]
|
|
#[inline]
|
|
pub fn reset_value() -> W {
|
|
W { bits: 50331649 }
|
|
}
|
|
#[doc = r" Writes raw bits to the register"]
|
|
#[inline]
|
|
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
|
self.bits = bits;
|
|
self
|
|
}
|
|
#[doc = "Bit 0 - Fast IRC Enable"]
|
|
#[inline]
|
|
pub fn fircen(&mut self) -> _FIRCENW {
|
|
_FIRCENW { w: self }
|
|
}
|
|
#[doc = "Bit 3 - Fast IRC Regulator Enable"]
|
|
#[inline]
|
|
pub fn fircregoff(&mut self) -> _FIRCREGOFFW {
|
|
_FIRCREGOFFW { w: self }
|
|
}
|
|
#[doc = "Bit 23 - Lock Register"]
|
|
#[inline]
|
|
pub fn lk(&mut self) -> _LKW {
|
|
_LKW { w: self }
|
|
}
|
|
#[doc = "Bit 26 - Fast IRC Clock Error"]
|
|
#[inline]
|
|
pub fn fircerr(&mut self) -> _FIRCERRW {
|
|
_FIRCERRW { w: self }
|
|
}
|
|
}
|