Regenerate crate with svd2rust v0.14.0
This commit is contained in:
@ -31,9 +31,9 @@ impl<'a> _CDNEW<'a> {
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}
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#[doc = "Values that can be written to the field `CADN`"]
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pub enum CADNW {
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#[doc = "Clears only the TCDn_CSR[DONE] bit specified in the CDNE field"]
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#[doc = "Clears only the TCDn_CSR\\[DONE\\] bit specified in the CDNE field"]
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_0,
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#[doc = "Clears all bits in TCDn_CSR[DONE]"]
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#[doc = "Clears all bits in TCDn_CSR\\[DONE\\]"]
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_1,
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}
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impl CADNW {
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@ -59,12 +59,12 @@ impl<'a> _CADNW<'a> {
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self.bit(variant._bits())
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}
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}
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#[doc = "Clears only the TCDn_CSR[DONE] bit specified in the CDNE field"]
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#[doc = "Clears only the TCDn_CSR\\[DONE\\] bit specified in the CDNE field"]
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#[inline]
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pub fn _0(self) -> &'a mut W {
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self.variant(CADNW::_0)
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}
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#[doc = "Clears all bits in TCDn_CSR[DONE]"]
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#[doc = "Clears all bits in TCDn_CSR\\[DONE\\]"]
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#[inline]
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pub fn _1(self) -> &'a mut W {
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self.variant(CADNW::_1)
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@ -22,9 +22,7 @@ impl super::CR {
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#[doc = r" Reads the contents of the register"]
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#[inline]
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pub fn read(&self) -> R {
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R {
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bits: self.register.get(),
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}
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R { bits: self.register.get() }
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}
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#[doc = r" Writes to the register"]
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#[inline]
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@ -22,9 +22,7 @@ impl super::DCHPRI0 {
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#[doc = r" Reads the contents of the register"]
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#[inline]
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pub fn read(&self) -> R {
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R {
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bits: self.register.get(),
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}
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R { bits: self.register.get() }
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}
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#[doc = r" Writes to the register"]
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#[inline]
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@ -22,9 +22,7 @@ impl super::DCHPRI1 {
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#[doc = r" Reads the contents of the register"]
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#[inline]
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pub fn read(&self) -> R {
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R {
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bits: self.register.get(),
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}
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R { bits: self.register.get() }
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}
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#[doc = r" Writes to the register"]
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#[inline]
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@ -22,9 +22,7 @@ impl super::DCHPRI10 {
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#[doc = r" Reads the contents of the register"]
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#[inline]
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pub fn read(&self) -> R {
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R {
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bits: self.register.get(),
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}
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R { bits: self.register.get() }
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}
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#[doc = r" Writes to the register"]
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#[inline]
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@ -22,9 +22,7 @@ impl super::DCHPRI11 {
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#[doc = r" Reads the contents of the register"]
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#[inline]
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pub fn read(&self) -> R {
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R {
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bits: self.register.get(),
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}
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R { bits: self.register.get() }
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}
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#[doc = r" Writes to the register"]
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#[inline]
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@ -22,9 +22,7 @@ impl super::DCHPRI12 {
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#[doc = r" Reads the contents of the register"]
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#[inline]
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pub fn read(&self) -> R {
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R {
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bits: self.register.get(),
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}
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R { bits: self.register.get() }
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}
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#[doc = r" Writes to the register"]
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#[inline]
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@ -22,9 +22,7 @@ impl super::DCHPRI13 {
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#[doc = r" Reads the contents of the register"]
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#[inline]
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pub fn read(&self) -> R {
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R {
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bits: self.register.get(),
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}
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R { bits: self.register.get() }
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}
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#[doc = r" Writes to the register"]
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#[inline]
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@ -22,9 +22,7 @@ impl super::DCHPRI14 {
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#[doc = r" Reads the contents of the register"]
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#[inline]
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pub fn read(&self) -> R {
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R {
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bits: self.register.get(),
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}
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R { bits: self.register.get() }
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}
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#[doc = r" Writes to the register"]
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#[inline]
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@ -22,9 +22,7 @@ impl super::DCHPRI15 {
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#[doc = r" Reads the contents of the register"]
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#[inline]
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pub fn read(&self) -> R {
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R {
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bits: self.register.get(),
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}
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R { bits: self.register.get() }
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}
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#[doc = r" Writes to the register"]
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#[inline]
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@ -22,9 +22,7 @@ impl super::DCHPRI2 {
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#[doc = r" Reads the contents of the register"]
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#[inline]
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pub fn read(&self) -> R {
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R {
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bits: self.register.get(),
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}
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R { bits: self.register.get() }
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}
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#[doc = r" Writes to the register"]
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#[inline]
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@ -22,9 +22,7 @@ impl super::DCHPRI3 {
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#[doc = r" Reads the contents of the register"]
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#[inline]
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pub fn read(&self) -> R {
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R {
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bits: self.register.get(),
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}
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R { bits: self.register.get() }
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}
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#[doc = r" Writes to the register"]
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#[inline]
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@ -22,9 +22,7 @@ impl super::DCHPRI4 {
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#[doc = r" Reads the contents of the register"]
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#[inline]
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pub fn read(&self) -> R {
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R {
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bits: self.register.get(),
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}
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R { bits: self.register.get() }
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}
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#[doc = r" Writes to the register"]
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#[inline]
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@ -22,9 +22,7 @@ impl super::DCHPRI5 {
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#[doc = r" Reads the contents of the register"]
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#[inline]
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pub fn read(&self) -> R {
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R {
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bits: self.register.get(),
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}
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R { bits: self.register.get() }
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}
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#[doc = r" Writes to the register"]
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#[inline]
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@ -22,9 +22,7 @@ impl super::DCHPRI6 {
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#[doc = r" Reads the contents of the register"]
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#[inline]
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pub fn read(&self) -> R {
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R {
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bits: self.register.get(),
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}
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R { bits: self.register.get() }
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}
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#[doc = r" Writes to the register"]
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#[inline]
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@ -22,9 +22,7 @@ impl super::DCHPRI7 {
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#[doc = r" Reads the contents of the register"]
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#[inline]
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pub fn read(&self) -> R {
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R {
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bits: self.register.get(),
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}
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R { bits: self.register.get() }
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}
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#[doc = r" Writes to the register"]
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#[inline]
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@ -22,9 +22,7 @@ impl super::DCHPRI8 {
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#[doc = r" Reads the contents of the register"]
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#[inline]
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pub fn read(&self) -> R {
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R {
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bits: self.register.get(),
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}
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R { bits: self.register.get() }
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}
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#[doc = r" Writes to the register"]
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#[inline]
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@ -22,9 +22,7 @@ impl super::DCHPRI9 {
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#[doc = r" Reads the contents of the register"]
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#[inline]
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pub fn read(&self) -> R {
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R {
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bits: self.register.get(),
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}
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R { bits: self.register.get() }
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}
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#[doc = r" Writes to the register"]
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#[inline]
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@ -22,9 +22,7 @@ impl super::EARS {
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#[doc = r" Reads the contents of the register"]
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#[inline]
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pub fn read(&self) -> R {
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R {
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bits: self.register.get(),
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}
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R { bits: self.register.get() }
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}
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#[doc = r" Writes to the register"]
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#[inline]
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@ -22,9 +22,7 @@ impl super::EEI {
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#[doc = r" Reads the contents of the register"]
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#[inline]
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pub fn read(&self) -> R {
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R {
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bits: self.register.get(),
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}
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R { bits: self.register.get() }
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}
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#[doc = r" Writes to the register"]
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#[inline]
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@ -22,9 +22,7 @@ impl super::ERQ {
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#[doc = r" Reads the contents of the register"]
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#[inline]
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pub fn read(&self) -> R {
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R {
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bits: self.register.get(),
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}
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R { bits: self.register.get() }
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}
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#[doc = r" Writes to the register"]
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#[inline]
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@ -22,9 +22,7 @@ impl super::ERR {
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#[doc = r" Reads the contents of the register"]
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#[inline]
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pub fn read(&self) -> R {
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R {
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bits: self.register.get(),
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}
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R { bits: self.register.get() }
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}
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#[doc = r" Writes to the register"]
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#[inline]
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@ -6,9 +6,7 @@ impl super::ES {
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#[doc = r" Reads the contents of the register"]
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#[inline]
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pub fn read(&self) -> R {
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R {
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bits: self.register.get(),
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}
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R { bits: self.register.get() }
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}
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}
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#[doc = "Possible values of the field `DBE`"]
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@ -110,7 +108,7 @@ impl SBER {
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pub enum SGER {
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#[doc = "No scatter/gather configuration error"]
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_0,
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#[doc = "The last recorded error was a configuration error detected in the TCDn_DLASTSGA field. This field is checked at the beginning of a scatter/gather operation after major loop completion if TCDn_CSR[ESG] is enabled. TCDn_DLASTSGA is not on a 32 byte boundary."]
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#[doc = "The last recorded error was a configuration error detected in the TCDn_DLASTSGA field. This field is checked at the beginning of a scatter/gather operation after major loop completion if TCDn_CSR\\[ESG\\] is enabled. TCDn_DLASTSGA is not on a 32 byte boundary."]
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_1,
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}
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impl SGER {
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@ -199,7 +197,7 @@ impl NCER {
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pub enum DOER {
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#[doc = "No destination offset configuration error"]
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_0,
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#[doc = "The last recorded error was a configuration error detected in the TCDn_DOFF field. TCDn_DOFF is inconsistent with TCDn_ATTR[DSIZE]."]
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#[doc = "The last recorded error was a configuration error detected in the TCDn_DOFF field. TCDn_DOFF is inconsistent with TCDn_ATTR\\[DSIZE\\]."]
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_1,
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}
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impl DOER {
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@ -246,7 +244,7 @@ impl DOER {
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pub enum DAER {
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#[doc = "No destination address configuration error"]
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_0,
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#[doc = "The last recorded error was a configuration error detected in the TCDn_DADDR field. TCDn_DADDR is inconsistent with TCDn_ATTR[DSIZE]."]
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#[doc = "The last recorded error was a configuration error detected in the TCDn_DADDR field. TCDn_DADDR is inconsistent with TCDn_ATTR\\[DSIZE\\]."]
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_1,
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}
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impl DAER {
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@ -293,7 +291,7 @@ impl DAER {
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pub enum SOER {
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#[doc = "No source offset configuration error"]
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_0,
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#[doc = "The last recorded error was a configuration error detected in the TCDn_SOFF field. TCDn_SOFF is inconsistent with TCDn_ATTR[SSIZE]."]
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#[doc = "The last recorded error was a configuration error detected in the TCDn_SOFF field. TCDn_SOFF is inconsistent with TCDn_ATTR\\[SSIZE\\]."]
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_1,
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}
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impl SOER {
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@ -340,7 +338,7 @@ impl SOER {
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pub enum SAER {
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#[doc = "No source address configuration error."]
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_0,
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#[doc = "The last recorded error was a configuration error detected in the TCDn_SADDR field. TCDn_SADDR is inconsistent with TCDn_ATTR[SSIZE]."]
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#[doc = "The last recorded error was a configuration error detected in the TCDn_SADDR field. TCDn_SADDR is inconsistent with TCDn_ATTR\\[SSIZE\\]."]
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_1,
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}
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impl SAER {
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@ -6,9 +6,7 @@ impl super::HRS {
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#[doc = r" Reads the contents of the register"]
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#[inline]
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pub fn read(&self) -> R {
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R {
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bits: self.register.get(),
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}
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R { bits: self.register.get() }
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}
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}
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#[doc = "Possible values of the field `HRS0`"]
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@ -22,9 +22,7 @@ impl super::INT {
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#[doc = r" Reads the contents of the register"]
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#[inline]
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pub fn read(&self) -> R {
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R {
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bits: self.register.get(),
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}
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R { bits: self.register.get() }
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}
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#[doc = r" Writes to the register"]
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#[inline]
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2061
src/dma/mod.rs
2061
src/dma/mod.rs
File diff suppressed because it is too large
Load Diff
@ -31,9 +31,9 @@ impl<'a> _SSRTW<'a> {
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}
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#[doc = "Values that can be written to the field `SAST`"]
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pub enum SASTW {
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#[doc = "Set only the TCDn_CSR[START] bit specified in the SSRT field"]
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#[doc = "Set only the TCDn_CSR\\[START\\] bit specified in the SSRT field"]
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_0,
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#[doc = "Set all bits in TCDn_CSR[START]"]
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#[doc = "Set all bits in TCDn_CSR\\[START\\]"]
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_1,
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}
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impl SASTW {
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@ -59,12 +59,12 @@ impl<'a> _SASTW<'a> {
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self.bit(variant._bits())
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}
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}
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#[doc = "Set only the TCDn_CSR[START] bit specified in the SSRT field"]
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#[doc = "Set only the TCDn_CSR\\[START\\] bit specified in the SSRT field"]
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#[inline]
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pub fn _0(self) -> &'a mut W {
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self.variant(SASTW::_0)
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}
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#[doc = "Set all bits in TCDn_CSR[START]"]
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#[doc = "Set all bits in TCDn_CSR\\[START\\]"]
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#[inline]
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pub fn _1(self) -> &'a mut W {
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self.variant(SASTW::_1)
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@ -22,9 +22,7 @@ impl super::TCD0_ATTR {
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#[doc = r" Reads the contents of the register"]
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#[inline]
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pub fn read(&self) -> R {
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R {
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bits: self.register.get(),
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}
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R { bits: self.register.get() }
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}
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#[doc = r" Writes to the register"]
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#[inline]
|
@ -22,9 +22,7 @@ impl super::TCD0_BITER_ELINKNO {
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#[doc = r" Reads the contents of the register"]
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#[inline]
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pub fn read(&self) -> R {
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R {
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bits: self.register.get(),
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}
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R { bits: self.register.get() }
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}
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#[doc = r" Writes to the register"]
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#[inline]
|
@ -22,9 +22,7 @@ impl super::TCD0_BITER_ELINKYES {
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#[doc = r" Reads the contents of the register"]
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#[inline]
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pub fn read(&self) -> R {
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R {
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bits: self.register.get(),
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}
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R { bits: self.register.get() }
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}
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#[doc = r" Writes to the register"]
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#[inline]
|
@ -22,9 +22,7 @@ impl super::TCD0_CITER_ELINKNO {
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#[doc = r" Reads the contents of the register"]
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#[inline]
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pub fn read(&self) -> R {
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R {
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bits: self.register.get(),
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}
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R { bits: self.register.get() }
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}
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#[doc = r" Writes to the register"]
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#[inline]
|
@ -22,9 +22,7 @@ impl super::TCD0_CITER_ELINKYES {
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#[doc = r" Reads the contents of the register"]
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#[inline]
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pub fn read(&self) -> R {
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R {
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bits: self.register.get(),
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}
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R { bits: self.register.get() }
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}
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#[doc = r" Writes to the register"]
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#[inline]
|
@ -22,9 +22,7 @@ impl super::TCD0_CSR {
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#[doc = r" Reads the contents of the register"]
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#[inline]
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pub fn read(&self) -> R {
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R {
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bits: self.register.get(),
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}
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R { bits: self.register.get() }
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}
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#[doc = r" Writes to the register"]
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#[inline]
|
@ -22,9 +22,7 @@ impl super::TCD0_DADDR {
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#[doc = r" Reads the contents of the register"]
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#[inline]
|
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pub fn read(&self) -> R {
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R {
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bits: self.register.get(),
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}
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R { bits: self.register.get() }
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}
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#[doc = r" Writes to the register"]
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#[inline]
|
@ -22,9 +22,7 @@ impl super::TCD0_DLASTSGA {
|
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#[doc = r" Reads the contents of the register"]
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#[inline]
|
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pub fn read(&self) -> R {
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R {
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bits: self.register.get(),
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}
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R { bits: self.register.get() }
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}
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#[doc = r" Writes to the register"]
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#[inline]
|
@ -22,9 +22,7 @@ impl super::TCD0_DOFF {
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
@ -22,9 +22,7 @@ impl super::TCD0_NBYTES_MLNO {
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
@ -22,9 +22,7 @@ impl super::TCD0_NBYTES_MLOFFNO {
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
@ -22,9 +22,7 @@ impl super::TCD0_NBYTES_MLOFFYES {
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
@ -22,9 +22,7 @@ impl super::TCD0_SADDR {
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
@ -22,9 +22,7 @@ impl super::TCD0_SLAST {
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
@ -22,9 +22,7 @@ impl super::TCD0_SOFF {
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
@ -22,9 +22,7 @@ impl super::TCD10_ATTR {
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
@ -22,9 +22,7 @@ impl super::TCD10_BITER_ELINKNO {
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
@ -22,9 +22,7 @@ impl super::TCD10_BITER_ELINKYES {
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
@ -22,9 +22,7 @@ impl super::TCD10_CITER_ELINKNO {
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
@ -22,9 +22,7 @@ impl super::TCD10_CITER_ELINKYES {
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
@ -22,9 +22,7 @@ impl super::TCD10_CSR {
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
@ -22,9 +22,7 @@ impl super::TCD10_DADDR {
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
@ -22,9 +22,7 @@ impl super::TCD10_DLASTSGA {
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
@ -22,9 +22,7 @@ impl super::TCD10_DOFF {
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
@ -22,9 +22,7 @@ impl super::TCD10_NBYTES_MLNO {
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
@ -22,9 +22,7 @@ impl super::TCD10_NBYTES_MLOFFNO {
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
@ -22,9 +22,7 @@ impl super::TCD10_NBYTES_MLOFFYES {
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
@ -22,9 +22,7 @@ impl super::TCD10_SADDR {
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
@ -22,9 +22,7 @@ impl super::TCD10_SLAST {
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
@ -22,9 +22,7 @@ impl super::TCD10_SOFF {
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
@ -22,9 +22,7 @@ impl super::TCD11_ATTR {
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
@ -22,9 +22,7 @@ impl super::TCD11_BITER_ELINKNO {
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
@ -22,9 +22,7 @@ impl super::TCD11_BITER_ELINKYES {
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
@ -22,9 +22,7 @@ impl super::TCD11_CITER_ELINKNO {
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
@ -22,9 +22,7 @@ impl super::TCD11_CITER_ELINKYES {
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
@ -22,9 +22,7 @@ impl super::TCD11_CSR {
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
@ -22,9 +22,7 @@ impl super::TCD11_DADDR {
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
@ -22,9 +22,7 @@ impl super::TCD11_DLASTSGA {
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
@ -22,9 +22,7 @@ impl super::TCD11_DOFF {
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
@ -22,9 +22,7 @@ impl super::TCD11_NBYTES_MLNO {
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
@ -22,9 +22,7 @@ impl super::TCD11_NBYTES_MLOFFNO {
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
@ -22,9 +22,7 @@ impl super::TCD11_NBYTES_MLOFFYES {
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
@ -22,9 +22,7 @@ impl super::TCD11_SADDR {
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
@ -22,9 +22,7 @@ impl super::TCD11_SLAST {
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
@ -22,9 +22,7 @@ impl super::TCD11_SOFF {
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
@ -22,9 +22,7 @@ impl super::TCD12_ATTR {
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
@ -22,9 +22,7 @@ impl super::TCD12_BITER_ELINKNO {
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
@ -22,9 +22,7 @@ impl super::TCD12_BITER_ELINKYES {
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
@ -22,9 +22,7 @@ impl super::TCD12_CITER_ELINKNO {
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
@ -22,9 +22,7 @@ impl super::TCD12_CITER_ELINKYES {
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
@ -22,9 +22,7 @@ impl super::TCD12_CSR {
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
@ -22,9 +22,7 @@ impl super::TCD12_DADDR {
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
@ -22,9 +22,7 @@ impl super::TCD12_DLASTSGA {
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
@ -22,9 +22,7 @@ impl super::TCD12_DOFF {
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
@ -22,9 +22,7 @@ impl super::TCD12_NBYTES_MLNO {
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
@ -22,9 +22,7 @@ impl super::TCD12_NBYTES_MLOFFNO {
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
@ -22,9 +22,7 @@ impl super::TCD12_NBYTES_MLOFFYES {
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
@ -22,9 +22,7 @@ impl super::TCD12_SADDR {
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
@ -22,9 +22,7 @@ impl super::TCD12_SLAST {
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
@ -22,9 +22,7 @@ impl super::TCD12_SOFF {
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
@ -22,9 +22,7 @@ impl super::TCD13_ATTR {
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
@ -22,9 +22,7 @@ impl super::TCD13_BITER_ELINKNO {
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
@ -22,9 +22,7 @@ impl super::TCD13_BITER_ELINKYES {
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
@ -22,9 +22,7 @@ impl super::TCD13_CITER_ELINKNO {
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
@ -22,9 +22,7 @@ impl super::TCD13_CITER_ELINKYES {
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
@ -22,9 +22,7 @@ impl super::TCD13_CSR {
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
@ -22,9 +22,7 @@ impl super::TCD13_DADDR {
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user