Ran with svd2rust 0.12.0
This commit is contained in:
Kjetil Kjeka
@ -100,8 +100,10 @@ impl EPRESDIVR {
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#[doc = "Possible values of the field `BTF`"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum BTFR {
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#[doc = "Extended bit time definitions disabled."] _0,
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#[doc = "Extended bit time definitions enabled."] _1,
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#[doc = "Extended bit time definitions disabled."]
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_0,
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#[doc = "Extended bit time definitions enabled."]
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_1,
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}
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impl BTFR {
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#[doc = r" Returns `true` if the bit is clear (0)"]
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@ -219,8 +221,10 @@ impl<'a> _EPRESDIVW<'a> {
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}
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#[doc = "Values that can be written to the field `BTF`"]
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pub enum BTFW {
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#[doc = "Extended bit time definitions disabled."] _0,
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#[doc = "Extended bit time definitions enabled."] _1,
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#[doc = "Extended bit time definitions disabled."]
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_0,
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#[doc = "Extended bit time definitions enabled."]
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_1,
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}
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impl BTFW {
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#[allow(missing_docs)]
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@ -56,8 +56,10 @@ impl PROPSEGR {
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#[doc = "Possible values of the field `LOM`"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum LOMR {
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#[doc = "Listen-Only mode is deactivated."] _0,
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#[doc = "FlexCAN module operates in Listen-Only mode."] _1,
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#[doc = "Listen-Only mode is deactivated."]
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_0,
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#[doc = "FlexCAN module operates in Listen-Only mode."]
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_1,
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}
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impl LOMR {
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#[doc = r" Returns `true` if the bit is clear (0)"]
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@ -101,8 +103,10 @@ impl LOMR {
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#[doc = "Possible values of the field `LBUF`"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum LBUFR {
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#[doc = "Buffer with highest priority is transmitted first."] _0,
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#[doc = "Lowest number buffer is transmitted first."] _1,
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#[doc = "Buffer with highest priority is transmitted first."]
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_0,
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#[doc = "Lowest number buffer is transmitted first."]
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_1,
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}
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impl LBUFR {
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#[doc = r" Returns `true` if the bit is clear (0)"]
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@ -146,8 +150,10 @@ impl LBUFR {
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#[doc = "Possible values of the field `TSYN`"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum TSYNR {
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#[doc = "Timer Sync feature disabled"] _0,
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#[doc = "Timer Sync feature enabled"] _1,
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#[doc = "Timer Sync feature disabled"]
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_0,
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#[doc = "Timer Sync feature enabled"]
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_1,
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}
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impl TSYNR {
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#[doc = r" Returns `true` if the bit is clear (0)"]
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@ -191,8 +197,10 @@ impl TSYNR {
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#[doc = "Possible values of the field `BOFFREC`"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum BOFFRECR {
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#[doc = "Automatic recovering from Bus Off state enabled."] _0,
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#[doc = "Automatic recovering from Bus Off state disabled."] _1,
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#[doc = "Automatic recovering from Bus Off state enabled."]
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_0,
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#[doc = "Automatic recovering from Bus Off state disabled."]
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_1,
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}
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impl BOFFRECR {
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#[doc = r" Returns `true` if the bit is clear (0)"]
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@ -236,7 +244,8 @@ impl BOFFRECR {
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#[doc = "Possible values of the field `SMP`"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum SMPR {
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#[doc = "Just one sample is used to determine the bit value."] _0,
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#[doc = "Just one sample is used to determine the bit value."]
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_0,
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#[doc = "Three samples are used to determine the value of the received bit: the regular one (sample point) and 2 preceding samples; a majority rule is used."]
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_1,
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}
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@ -282,8 +291,10 @@ impl SMPR {
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#[doc = "Possible values of the field `RWRNMSK`"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum RWRNMSKR {
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#[doc = "Rx Warning Interrupt disabled."] _0,
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#[doc = "Rx Warning Interrupt enabled."] _1,
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#[doc = "Rx Warning Interrupt disabled."]
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_0,
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#[doc = "Rx Warning Interrupt enabled."]
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_1,
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}
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impl RWRNMSKR {
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#[doc = r" Returns `true` if the bit is clear (0)"]
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@ -327,8 +338,10 @@ impl RWRNMSKR {
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#[doc = "Possible values of the field `TWRNMSK`"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum TWRNMSKR {
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#[doc = "Tx Warning Interrupt disabled."] _0,
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#[doc = "Tx Warning Interrupt enabled."] _1,
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#[doc = "Tx Warning Interrupt disabled."]
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_0,
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#[doc = "Tx Warning Interrupt enabled."]
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_1,
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}
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impl TWRNMSKR {
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#[doc = r" Returns `true` if the bit is clear (0)"]
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@ -372,8 +385,10 @@ impl TWRNMSKR {
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#[doc = "Possible values of the field `LPB`"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum LPBR {
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#[doc = "Loop Back disabled."] _0,
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#[doc = "Loop Back enabled."] _1,
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#[doc = "Loop Back disabled."]
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_0,
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#[doc = "Loop Back enabled."]
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_1,
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}
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impl LPBR {
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#[doc = r" Returns `true` if the bit is clear (0)"]
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@ -419,7 +434,8 @@ impl LPBR {
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pub enum CLKSRCR {
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#[doc = "The CAN engine clock source is the oscillator clock. Under this condition, the oscillator clock frequency must be lower than the bus clock."]
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_0,
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#[doc = "The CAN engine clock source is the peripheral clock."] _1,
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#[doc = "The CAN engine clock source is the peripheral clock."]
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_1,
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}
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impl CLKSRCR {
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#[doc = r" Returns `true` if the bit is clear (0)"]
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@ -463,8 +479,10 @@ impl CLKSRCR {
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#[doc = "Possible values of the field `ERRMSK`"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum ERRMSKR {
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#[doc = "Error interrupt disabled."] _0,
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#[doc = "Error interrupt enabled."] _1,
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#[doc = "Error interrupt disabled."]
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_0,
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#[doc = "Error interrupt enabled."]
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_1,
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}
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impl ERRMSKR {
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#[doc = r" Returns `true` if the bit is clear (0)"]
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@ -508,8 +526,10 @@ impl ERRMSKR {
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#[doc = "Possible values of the field `BOFFMSK`"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum BOFFMSKR {
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#[doc = "Bus Off interrupt disabled."] _0,
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#[doc = "Bus Off interrupt enabled."] _1,
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#[doc = "Bus Off interrupt disabled."]
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_0,
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#[doc = "Bus Off interrupt enabled."]
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_1,
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}
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impl BOFFMSKR {
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#[doc = r" Returns `true` if the bit is clear (0)"]
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@ -611,8 +631,10 @@ impl<'a> _PROPSEGW<'a> {
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}
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#[doc = "Values that can be written to the field `LOM`"]
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pub enum LOMW {
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#[doc = "Listen-Only mode is deactivated."] _0,
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#[doc = "FlexCAN module operates in Listen-Only mode."] _1,
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#[doc = "Listen-Only mode is deactivated."]
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_0,
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#[doc = "FlexCAN module operates in Listen-Only mode."]
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_1,
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}
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impl LOMW {
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#[allow(missing_docs)]
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@ -667,8 +689,10 @@ impl<'a> _LOMW<'a> {
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}
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#[doc = "Values that can be written to the field `LBUF`"]
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pub enum LBUFW {
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#[doc = "Buffer with highest priority is transmitted first."] _0,
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#[doc = "Lowest number buffer is transmitted first."] _1,
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#[doc = "Buffer with highest priority is transmitted first."]
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_0,
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#[doc = "Lowest number buffer is transmitted first."]
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_1,
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}
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impl LBUFW {
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#[allow(missing_docs)]
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@ -723,8 +747,10 @@ impl<'a> _LBUFW<'a> {
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}
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#[doc = "Values that can be written to the field `TSYN`"]
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pub enum TSYNW {
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#[doc = "Timer Sync feature disabled"] _0,
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#[doc = "Timer Sync feature enabled"] _1,
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#[doc = "Timer Sync feature disabled"]
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_0,
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#[doc = "Timer Sync feature enabled"]
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_1,
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}
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impl TSYNW {
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#[allow(missing_docs)]
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@ -779,8 +805,10 @@ impl<'a> _TSYNW<'a> {
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}
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#[doc = "Values that can be written to the field `BOFFREC`"]
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pub enum BOFFRECW {
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#[doc = "Automatic recovering from Bus Off state enabled."] _0,
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#[doc = "Automatic recovering from Bus Off state disabled."] _1,
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#[doc = "Automatic recovering from Bus Off state enabled."]
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_0,
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#[doc = "Automatic recovering from Bus Off state disabled."]
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_1,
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}
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impl BOFFRECW {
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#[allow(missing_docs)]
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@ -835,7 +863,8 @@ impl<'a> _BOFFRECW<'a> {
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}
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#[doc = "Values that can be written to the field `SMP`"]
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pub enum SMPW {
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#[doc = "Just one sample is used to determine the bit value."] _0,
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#[doc = "Just one sample is used to determine the bit value."]
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_0,
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#[doc = "Three samples are used to determine the value of the received bit: the regular one (sample point) and 2 preceding samples; a majority rule is used."]
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_1,
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}
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@ -892,8 +921,10 @@ impl<'a> _SMPW<'a> {
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}
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#[doc = "Values that can be written to the field `RWRNMSK`"]
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pub enum RWRNMSKW {
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#[doc = "Rx Warning Interrupt disabled."] _0,
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#[doc = "Rx Warning Interrupt enabled."] _1,
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#[doc = "Rx Warning Interrupt disabled."]
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_0,
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#[doc = "Rx Warning Interrupt enabled."]
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_1,
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}
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impl RWRNMSKW {
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#[allow(missing_docs)]
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@ -948,8 +979,10 @@ impl<'a> _RWRNMSKW<'a> {
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}
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#[doc = "Values that can be written to the field `TWRNMSK`"]
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pub enum TWRNMSKW {
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#[doc = "Tx Warning Interrupt disabled."] _0,
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#[doc = "Tx Warning Interrupt enabled."] _1,
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#[doc = "Tx Warning Interrupt disabled."]
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_0,
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#[doc = "Tx Warning Interrupt enabled."]
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_1,
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}
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impl TWRNMSKW {
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#[allow(missing_docs)]
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@ -1004,8 +1037,10 @@ impl<'a> _TWRNMSKW<'a> {
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}
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#[doc = "Values that can be written to the field `LPB`"]
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pub enum LPBW {
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#[doc = "Loop Back disabled."] _0,
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#[doc = "Loop Back enabled."] _1,
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#[doc = "Loop Back disabled."]
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_0,
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#[doc = "Loop Back enabled."]
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_1,
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}
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impl LPBW {
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#[allow(missing_docs)]
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@ -1062,7 +1097,8 @@ impl<'a> _LPBW<'a> {
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pub enum CLKSRCW {
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#[doc = "The CAN engine clock source is the oscillator clock. Under this condition, the oscillator clock frequency must be lower than the bus clock."]
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_0,
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#[doc = "The CAN engine clock source is the peripheral clock."] _1,
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#[doc = "The CAN engine clock source is the peripheral clock."]
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_1,
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}
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impl CLKSRCW {
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#[allow(missing_docs)]
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@ -1117,8 +1153,10 @@ impl<'a> _CLKSRCW<'a> {
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}
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#[doc = "Values that can be written to the field `ERRMSK`"]
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pub enum ERRMSKW {
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#[doc = "Error interrupt disabled."] _0,
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#[doc = "Error interrupt enabled."] _1,
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#[doc = "Error interrupt disabled."]
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_0,
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#[doc = "Error interrupt enabled."]
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_1,
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}
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impl ERRMSKW {
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#[allow(missing_docs)]
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@ -1173,8 +1211,10 @@ impl<'a> _ERRMSKW<'a> {
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}
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#[doc = "Values that can be written to the field `BOFFMSK`"]
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pub enum BOFFMSKW {
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#[doc = "Bus Off interrupt disabled."] _0,
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#[doc = "Bus Off interrupt enabled."] _1,
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#[doc = "Bus Off interrupt disabled."]
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_0,
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#[doc = "Bus Off interrupt enabled."]
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_1,
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}
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impl BOFFMSKW {
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#[allow(missing_docs)]
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@ -45,10 +45,14 @@ impl super::CTRL1_PN {
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#[doc = "Possible values of the field `FCS`"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum FCSR {
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#[doc = "Message ID filtering only"] _00,
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#[doc = "Message ID filtering and payload filtering"] _01,
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#[doc = "Message ID filtering occurring a specified number of times."] _10,
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#[doc = "Message ID filtering and payload filtering a specified number of times"] _11,
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#[doc = "Message ID filtering only"]
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_00,
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#[doc = "Message ID filtering and payload filtering"]
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_01,
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#[doc = "Message ID filtering occurring a specified number of times."]
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_10,
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#[doc = "Message ID filtering and payload filtering a specified number of times"]
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_11,
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}
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impl FCSR {
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#[doc = r" Value of the field as raw bits"]
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@ -97,9 +101,12 @@ impl FCSR {
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#[doc = "Possible values of the field `IDFS`"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum IDFSR {
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#[doc = "Match upon a ID contents against an exact target value"] _00,
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#[doc = "Match upon a ID value greater than or equal to a specified target value"] _01,
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#[doc = "Match upon a ID value smaller than or equal to a specified target value"] _10,
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#[doc = "Match upon a ID contents against an exact target value"]
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_00,
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#[doc = "Match upon a ID value greater than or equal to a specified target value"]
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_01,
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#[doc = "Match upon a ID value smaller than or equal to a specified target value"]
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_10,
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#[doc = "Match upon a ID value inside a range, greater than or equal to a specified lower limit and smaller than or equal a specified upper limit"]
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_11,
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}
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@ -150,9 +157,12 @@ impl IDFSR {
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#[doc = "Possible values of the field `PLFS`"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum PLFSR {
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#[doc = "Match upon a payload contents against an exact target value"] _00,
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#[doc = "Match upon a payload value greater than or equal to a specified target value"] _01,
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#[doc = "Match upon a payload value smaller than or equal to a specified target value"] _10,
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#[doc = "Match upon a payload contents against an exact target value"]
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_00,
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#[doc = "Match upon a payload value greater than or equal to a specified target value"]
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_01,
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#[doc = "Match upon a payload value smaller than or equal to a specified target value"]
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_10,
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#[doc = "Match upon a payload value inside a range, greater than or equal to a specified lower limit and smaller than or equal a specified upper limit"]
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_11,
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}
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@ -209,7 +219,8 @@ pub enum NMATCHR {
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_00000010,
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#[doc = "Received message must match the predefined filtering criteria for ID and/or PL 255 times before generating a wake up event."]
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_11111111,
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#[doc = r" Reserved"] _Reserved(u8),
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#[doc = r" Reserved"]
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_Reserved(u8),
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}
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impl NMATCHR {
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#[doc = r" Value of the field as raw bits"]
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@ -252,8 +263,10 @@ impl NMATCHR {
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#[doc = "Possible values of the field `WUMF_MSK`"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum WUMF_MSKR {
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#[doc = "Wake up match event is disabled"] _0,
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#[doc = "Wake up match event is enabled"] _1,
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#[doc = "Wake up match event is disabled"]
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_0,
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#[doc = "Wake up match event is enabled"]
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_1,
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}
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impl WUMF_MSKR {
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#[doc = r" Returns `true` if the bit is clear (0)"]
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@ -297,8 +310,10 @@ impl WUMF_MSKR {
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#[doc = "Possible values of the field `WTOF_MSK`"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum WTOF_MSKR {
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#[doc = "Timeout wake up event is disabled"] _0,
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#[doc = "Timeout wake up event is enabled"] _1,
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#[doc = "Timeout wake up event is disabled"]
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_0,
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#[doc = "Timeout wake up event is enabled"]
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_1,
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}
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impl WTOF_MSKR {
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#[doc = r" Returns `true` if the bit is clear (0)"]
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@ -341,10 +356,14 @@ impl WTOF_MSKR {
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}
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#[doc = "Values that can be written to the field `FCS`"]
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pub enum FCSW {
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#[doc = "Message ID filtering only"] _00,
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#[doc = "Message ID filtering and payload filtering"] _01,
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#[doc = "Message ID filtering occurring a specified number of times."] _10,
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#[doc = "Message ID filtering and payload filtering a specified number of times"] _11,
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#[doc = "Message ID filtering only"]
|
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_00,
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#[doc = "Message ID filtering and payload filtering"]
|
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_01,
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#[doc = "Message ID filtering occurring a specified number of times."]
|
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_10,
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#[doc = "Message ID filtering and payload filtering a specified number of times"]
|
||||
_11,
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||||
}
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impl FCSW {
|
||||
#[allow(missing_docs)]
|
||||
@ -403,9 +422,12 @@ impl<'a> _FCSW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `IDFS`"]
|
||||
pub enum IDFSW {
|
||||
#[doc = "Match upon a ID contents against an exact target value"] _00,
|
||||
#[doc = "Match upon a ID value greater than or equal to a specified target value"] _01,
|
||||
#[doc = "Match upon a ID value smaller than or equal to a specified target value"] _10,
|
||||
#[doc = "Match upon a ID contents against an exact target value"]
|
||||
_00,
|
||||
#[doc = "Match upon a ID value greater than or equal to a specified target value"]
|
||||
_01,
|
||||
#[doc = "Match upon a ID value smaller than or equal to a specified target value"]
|
||||
_10,
|
||||
#[doc = "Match upon a ID value inside a range, greater than or equal to a specified lower limit and smaller than or equal a specified upper limit"]
|
||||
_11,
|
||||
}
|
||||
@ -466,9 +488,12 @@ impl<'a> _IDFSW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `PLFS`"]
|
||||
pub enum PLFSW {
|
||||
#[doc = "Match upon a payload contents against an exact target value"] _00,
|
||||
#[doc = "Match upon a payload value greater than or equal to a specified target value"] _01,
|
||||
#[doc = "Match upon a payload value smaller than or equal to a specified target value"] _10,
|
||||
#[doc = "Match upon a payload contents against an exact target value"]
|
||||
_00,
|
||||
#[doc = "Match upon a payload value greater than or equal to a specified target value"]
|
||||
_01,
|
||||
#[doc = "Match upon a payload value smaller than or equal to a specified target value"]
|
||||
_10,
|
||||
#[doc = "Match upon a payload value inside a range, greater than or equal to a specified lower limit and smaller than or equal a specified upper limit"]
|
||||
_11,
|
||||
}
|
||||
@ -585,8 +610,10 @@ impl<'a> _NMATCHW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `WUMF_MSK`"]
|
||||
pub enum WUMF_MSKW {
|
||||
#[doc = "Wake up match event is disabled"] _0,
|
||||
#[doc = "Wake up match event is enabled"] _1,
|
||||
#[doc = "Wake up match event is disabled"]
|
||||
_0,
|
||||
#[doc = "Wake up match event is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl WUMF_MSKW {
|
||||
#[allow(missing_docs)]
|
||||
@ -641,8 +668,10 @@ impl<'a> _WUMF_MSKW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `WTOF_MSK`"]
|
||||
pub enum WTOF_MSKW {
|
||||
#[doc = "Timeout wake up event is disabled"] _0,
|
||||
#[doc = "Timeout wake up event is enabled"] _1,
|
||||
#[doc = "Timeout wake up event is disabled"]
|
||||
_0,
|
||||
#[doc = "Timeout wake up event is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl WTOF_MSKW {
|
||||
#[allow(missing_docs)]
|
||||
|
||||
@ -45,8 +45,10 @@ impl super::CTRL2 {
|
||||
#[doc = "Possible values of the field `EDFLTDIS`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum EDFLTDISR {
|
||||
#[doc = "Edge Filter is enabled."] _0,
|
||||
#[doc = "Edge Filter is disabled."] _1,
|
||||
#[doc = "Edge Filter is enabled."]
|
||||
_0,
|
||||
#[doc = "Edge Filter is disabled."]
|
||||
_1,
|
||||
}
|
||||
impl EDFLTDISR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -90,8 +92,10 @@ impl EDFLTDISR {
|
||||
#[doc = "Possible values of the field `ISOCANFDEN`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ISOCANFDENR {
|
||||
#[doc = "FlexCAN operates using the non-ISO CAN FD protocol."] _0,
|
||||
#[doc = "FlexCAN operates using the ISO CAN FD protocol (ISO 11898-1)."] _1,
|
||||
#[doc = "FlexCAN operates using the non-ISO CAN FD protocol."]
|
||||
_0,
|
||||
#[doc = "FlexCAN operates using the ISO CAN FD protocol (ISO 11898-1)."]
|
||||
_1,
|
||||
}
|
||||
impl ISOCANFDENR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -135,8 +139,10 @@ impl ISOCANFDENR {
|
||||
#[doc = "Possible values of the field `PREXCEN`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum PREXCENR {
|
||||
#[doc = "Protocol Exception is disabled."] _0,
|
||||
#[doc = "Protocol Exception is enabled."] _1,
|
||||
#[doc = "Protocol Exception is disabled."]
|
||||
_0,
|
||||
#[doc = "Protocol Exception is enabled."]
|
||||
_1,
|
||||
}
|
||||
impl PREXCENR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -274,8 +280,10 @@ impl EACENR {
|
||||
#[doc = "Possible values of the field `RRS`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum RRSR {
|
||||
#[doc = "Remote Response Frame is generated."] _0,
|
||||
#[doc = "Remote Request Frame is stored."] _1,
|
||||
#[doc = "Remote Response Frame is generated."]
|
||||
_0,
|
||||
#[doc = "Remote Request Frame is stored."]
|
||||
_1,
|
||||
}
|
||||
impl RRSR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -319,8 +327,10 @@ impl RRSR {
|
||||
#[doc = "Possible values of the field `MRP`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum MRPR {
|
||||
#[doc = "Matching starts from Rx FIFO and continues on Mailboxes."] _0,
|
||||
#[doc = "Matching starts from Mailboxes and continues on Rx FIFO."] _1,
|
||||
#[doc = "Matching starts from Rx FIFO and continues on Mailboxes."]
|
||||
_0,
|
||||
#[doc = "Matching starts from Mailboxes and continues on Rx FIFO."]
|
||||
_1,
|
||||
}
|
||||
impl MRPR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -386,8 +396,10 @@ impl RFFNR {
|
||||
#[doc = "Possible values of the field `BOFFDONEMSK`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum BOFFDONEMSKR {
|
||||
#[doc = "Bus Off Done interrupt disabled."] _0,
|
||||
#[doc = "Bus Off Done interrupt enabled."] _1,
|
||||
#[doc = "Bus Off Done interrupt disabled."]
|
||||
_0,
|
||||
#[doc = "Bus Off Done interrupt enabled."]
|
||||
_1,
|
||||
}
|
||||
impl BOFFDONEMSKR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -431,8 +443,10 @@ impl BOFFDONEMSKR {
|
||||
#[doc = "Possible values of the field `ERRMSK_FAST`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ERRMSK_FASTR {
|
||||
#[doc = "ERRINT_FAST Error interrupt disabled."] _0,
|
||||
#[doc = "ERRINT_FAST Error interrupt enabled."] _1,
|
||||
#[doc = "ERRINT_FAST Error interrupt disabled."]
|
||||
_0,
|
||||
#[doc = "ERRINT_FAST Error interrupt enabled."]
|
||||
_1,
|
||||
}
|
||||
impl ERRMSK_FASTR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -475,8 +489,10 @@ impl ERRMSK_FASTR {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `EDFLTDIS`"]
|
||||
pub enum EDFLTDISW {
|
||||
#[doc = "Edge Filter is enabled."] _0,
|
||||
#[doc = "Edge Filter is disabled."] _1,
|
||||
#[doc = "Edge Filter is enabled."]
|
||||
_0,
|
||||
#[doc = "Edge Filter is disabled."]
|
||||
_1,
|
||||
}
|
||||
impl EDFLTDISW {
|
||||
#[allow(missing_docs)]
|
||||
@ -531,8 +547,10 @@ impl<'a> _EDFLTDISW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `ISOCANFDEN`"]
|
||||
pub enum ISOCANFDENW {
|
||||
#[doc = "FlexCAN operates using the non-ISO CAN FD protocol."] _0,
|
||||
#[doc = "FlexCAN operates using the ISO CAN FD protocol (ISO 11898-1)."] _1,
|
||||
#[doc = "FlexCAN operates using the non-ISO CAN FD protocol."]
|
||||
_0,
|
||||
#[doc = "FlexCAN operates using the ISO CAN FD protocol (ISO 11898-1)."]
|
||||
_1,
|
||||
}
|
||||
impl ISOCANFDENW {
|
||||
#[allow(missing_docs)]
|
||||
@ -587,8 +605,10 @@ impl<'a> _ISOCANFDENW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `PREXCEN`"]
|
||||
pub enum PREXCENW {
|
||||
#[doc = "Protocol Exception is disabled."] _0,
|
||||
#[doc = "Protocol Exception is enabled."] _1,
|
||||
#[doc = "Protocol Exception is disabled."]
|
||||
_0,
|
||||
#[doc = "Protocol Exception is enabled."]
|
||||
_1,
|
||||
}
|
||||
impl PREXCENW {
|
||||
#[allow(missing_docs)]
|
||||
@ -759,8 +779,10 @@ impl<'a> _EACENW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `RRS`"]
|
||||
pub enum RRSW {
|
||||
#[doc = "Remote Response Frame is generated."] _0,
|
||||
#[doc = "Remote Request Frame is stored."] _1,
|
||||
#[doc = "Remote Response Frame is generated."]
|
||||
_0,
|
||||
#[doc = "Remote Request Frame is stored."]
|
||||
_1,
|
||||
}
|
||||
impl RRSW {
|
||||
#[allow(missing_docs)]
|
||||
@ -815,8 +837,10 @@ impl<'a> _RRSW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `MRP`"]
|
||||
pub enum MRPW {
|
||||
#[doc = "Matching starts from Rx FIFO and continues on Mailboxes."] _0,
|
||||
#[doc = "Matching starts from Mailboxes and continues on Rx FIFO."] _1,
|
||||
#[doc = "Matching starts from Rx FIFO and continues on Mailboxes."]
|
||||
_0,
|
||||
#[doc = "Matching starts from Mailboxes and continues on Rx FIFO."]
|
||||
_1,
|
||||
}
|
||||
impl MRPW {
|
||||
#[allow(missing_docs)]
|
||||
@ -901,8 +925,10 @@ impl<'a> _RFFNW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `BOFFDONEMSK`"]
|
||||
pub enum BOFFDONEMSKW {
|
||||
#[doc = "Bus Off Done interrupt disabled."] _0,
|
||||
#[doc = "Bus Off Done interrupt enabled."] _1,
|
||||
#[doc = "Bus Off Done interrupt disabled."]
|
||||
_0,
|
||||
#[doc = "Bus Off Done interrupt enabled."]
|
||||
_1,
|
||||
}
|
||||
impl BOFFDONEMSKW {
|
||||
#[allow(missing_docs)]
|
||||
@ -957,8 +983,10 @@ impl<'a> _BOFFDONEMSKW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `ERRMSK_FAST`"]
|
||||
pub enum ERRMSK_FASTW {
|
||||
#[doc = "ERRINT_FAST Error interrupt disabled."] _0,
|
||||
#[doc = "ERRINT_FAST Error interrupt enabled."] _1,
|
||||
#[doc = "ERRINT_FAST Error interrupt disabled."]
|
||||
_0,
|
||||
#[doc = "ERRINT_FAST Error interrupt enabled."]
|
||||
_1,
|
||||
}
|
||||
impl ERRMSK_FASTW {
|
||||
#[allow(missing_docs)]
|
||||
|
||||
@ -45,8 +45,10 @@ impl super::ESR1 {
|
||||
#[doc = "Possible values of the field `ERRINT`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ERRINTR {
|
||||
#[doc = "No such occurrence."] _0,
|
||||
#[doc = "Indicates setting of any Error Bit in the Error and Status Register."] _1,
|
||||
#[doc = "No such occurrence."]
|
||||
_0,
|
||||
#[doc = "Indicates setting of any Error Bit in the Error and Status Register."]
|
||||
_1,
|
||||
}
|
||||
impl ERRINTR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -90,8 +92,10 @@ impl ERRINTR {
|
||||
#[doc = "Possible values of the field `BOFFINT`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum BOFFINTR {
|
||||
#[doc = "No such occurrence."] _0,
|
||||
#[doc = "FlexCAN module entered Bus Off state."] _1,
|
||||
#[doc = "No such occurrence."]
|
||||
_0,
|
||||
#[doc = "FlexCAN module entered Bus Off state."]
|
||||
_1,
|
||||
}
|
||||
impl BOFFINTR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -135,8 +139,10 @@ impl BOFFINTR {
|
||||
#[doc = "Possible values of the field `RX`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum RXR {
|
||||
#[doc = "FlexCAN is not receiving a message."] _0,
|
||||
#[doc = "FlexCAN is receiving a message."] _1,
|
||||
#[doc = "FlexCAN is not receiving a message."]
|
||||
_0,
|
||||
#[doc = "FlexCAN is receiving a message."]
|
||||
_1,
|
||||
}
|
||||
impl RXR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -180,10 +186,14 @@ impl RXR {
|
||||
#[doc = "Possible values of the field `FLTCONF`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum FLTCONFR {
|
||||
#[doc = "Error Active"] _00,
|
||||
#[doc = "Error Passive"] _01,
|
||||
#[doc = "Bus Off"] _1X,
|
||||
#[doc = r" Reserved"] _Reserved(u8),
|
||||
#[doc = "Error Active"]
|
||||
_00,
|
||||
#[doc = "Error Passive"]
|
||||
_01,
|
||||
#[doc = "Bus Off"]
|
||||
_1X,
|
||||
#[doc = r" Reserved"]
|
||||
_Reserved(u8),
|
||||
}
|
||||
impl FLTCONFR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
@ -226,8 +236,10 @@ impl FLTCONFR {
|
||||
#[doc = "Possible values of the field `TX`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TXR {
|
||||
#[doc = "FlexCAN is not transmitting a message."] _0,
|
||||
#[doc = "FlexCAN is transmitting a message."] _1,
|
||||
#[doc = "FlexCAN is not transmitting a message."]
|
||||
_0,
|
||||
#[doc = "FlexCAN is transmitting a message."]
|
||||
_1,
|
||||
}
|
||||
impl TXR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -271,8 +283,10 @@ impl TXR {
|
||||
#[doc = "Possible values of the field `IDLE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum IDLER {
|
||||
#[doc = "No such occurrence."] _0,
|
||||
#[doc = "CAN bus is now IDLE."] _1,
|
||||
#[doc = "No such occurrence."]
|
||||
_0,
|
||||
#[doc = "CAN bus is now IDLE."]
|
||||
_1,
|
||||
}
|
||||
impl IDLER {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -316,8 +330,10 @@ impl IDLER {
|
||||
#[doc = "Possible values of the field `RXWRN`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum RXWRNR {
|
||||
#[doc = "No such occurrence."] _0,
|
||||
#[doc = "RXERRCNT is greater than or equal to 96."] _1,
|
||||
#[doc = "No such occurrence."]
|
||||
_0,
|
||||
#[doc = "RXERRCNT is greater than or equal to 96."]
|
||||
_1,
|
||||
}
|
||||
impl RXWRNR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -361,8 +377,10 @@ impl RXWRNR {
|
||||
#[doc = "Possible values of the field `TXWRN`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TXWRNR {
|
||||
#[doc = "No such occurrence."] _0,
|
||||
#[doc = "TXERRCNT is greater than or equal to 96."] _1,
|
||||
#[doc = "No such occurrence."]
|
||||
_0,
|
||||
#[doc = "TXERRCNT is greater than or equal to 96."]
|
||||
_1,
|
||||
}
|
||||
impl TXWRNR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -406,8 +424,10 @@ impl TXWRNR {
|
||||
#[doc = "Possible values of the field `STFERR`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum STFERRR {
|
||||
#[doc = "No such occurrence."] _0,
|
||||
#[doc = "A Stuffing Error occurred since last read of this register."] _1,
|
||||
#[doc = "No such occurrence."]
|
||||
_0,
|
||||
#[doc = "A Stuffing Error occurred since last read of this register."]
|
||||
_1,
|
||||
}
|
||||
impl STFERRR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -451,8 +471,10 @@ impl STFERRR {
|
||||
#[doc = "Possible values of the field `FRMERR`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum FRMERRR {
|
||||
#[doc = "No such occurrence."] _0,
|
||||
#[doc = "A Form Error occurred since last read of this register."] _1,
|
||||
#[doc = "No such occurrence."]
|
||||
_0,
|
||||
#[doc = "A Form Error occurred since last read of this register."]
|
||||
_1,
|
||||
}
|
||||
impl FRMERRR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -496,8 +518,10 @@ impl FRMERRR {
|
||||
#[doc = "Possible values of the field `CRCERR`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum CRCERRR {
|
||||
#[doc = "No such occurrence."] _0,
|
||||
#[doc = "A CRC error occurred since last read of this register."] _1,
|
||||
#[doc = "No such occurrence."]
|
||||
_0,
|
||||
#[doc = "A CRC error occurred since last read of this register."]
|
||||
_1,
|
||||
}
|
||||
impl CRCERRR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -541,8 +565,10 @@ impl CRCERRR {
|
||||
#[doc = "Possible values of the field `ACKERR`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ACKERRR {
|
||||
#[doc = "No such occurrence."] _0,
|
||||
#[doc = "An ACK error occurred since last read of this register."] _1,
|
||||
#[doc = "No such occurrence."]
|
||||
_0,
|
||||
#[doc = "An ACK error occurred since last read of this register."]
|
||||
_1,
|
||||
}
|
||||
impl ACKERRR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -586,8 +612,10 @@ impl ACKERRR {
|
||||
#[doc = "Possible values of the field `BIT0ERR`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum BIT0ERRR {
|
||||
#[doc = "No such occurrence."] _0,
|
||||
#[doc = "At least one bit sent as dominant is received as recessive."] _1,
|
||||
#[doc = "No such occurrence."]
|
||||
_0,
|
||||
#[doc = "At least one bit sent as dominant is received as recessive."]
|
||||
_1,
|
||||
}
|
||||
impl BIT0ERRR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -631,8 +659,10 @@ impl BIT0ERRR {
|
||||
#[doc = "Possible values of the field `BIT1ERR`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum BIT1ERRR {
|
||||
#[doc = "No such occurrence."] _0,
|
||||
#[doc = "At least one bit sent as recessive is received as dominant."] _1,
|
||||
#[doc = "No such occurrence."]
|
||||
_0,
|
||||
#[doc = "At least one bit sent as recessive is received as dominant."]
|
||||
_1,
|
||||
}
|
||||
impl BIT1ERRR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -676,7 +706,8 @@ impl BIT1ERRR {
|
||||
#[doc = "Possible values of the field `RWRNINT`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum RWRNINTR {
|
||||
#[doc = "No such occurrence."] _0,
|
||||
#[doc = "No such occurrence."]
|
||||
_0,
|
||||
#[doc = "The Rx error counter transitioned from less than 96 to greater than or equal to 96."]
|
||||
_1,
|
||||
}
|
||||
@ -722,7 +753,8 @@ impl RWRNINTR {
|
||||
#[doc = "Possible values of the field `TWRNINT`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TWRNINTR {
|
||||
#[doc = "No such occurrence."] _0,
|
||||
#[doc = "No such occurrence."]
|
||||
_0,
|
||||
#[doc = "The Tx error counter transitioned from less than 96 to greater than or equal to 96."]
|
||||
_1,
|
||||
}
|
||||
@ -768,8 +800,10 @@ impl TWRNINTR {
|
||||
#[doc = "Possible values of the field `SYNCH`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SYNCHR {
|
||||
#[doc = "FlexCAN is not synchronized to the CAN bus."] _0,
|
||||
#[doc = "FlexCAN is synchronized to the CAN bus."] _1,
|
||||
#[doc = "FlexCAN is not synchronized to the CAN bus."]
|
||||
_0,
|
||||
#[doc = "FlexCAN is synchronized to the CAN bus."]
|
||||
_1,
|
||||
}
|
||||
impl SYNCHR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -813,8 +847,10 @@ impl SYNCHR {
|
||||
#[doc = "Possible values of the field `BOFFDONEINT`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum BOFFDONEINTR {
|
||||
#[doc = "No such occurrence."] _0,
|
||||
#[doc = "FlexCAN module has completed Bus Off process."] _1,
|
||||
#[doc = "No such occurrence."]
|
||||
_0,
|
||||
#[doc = "FlexCAN module has completed Bus Off process."]
|
||||
_1,
|
||||
}
|
||||
impl BOFFDONEINTR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -858,7 +894,8 @@ impl BOFFDONEINTR {
|
||||
#[doc = "Possible values of the field `ERRINT_FAST`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ERRINT_FASTR {
|
||||
#[doc = "No such occurrence."] _0,
|
||||
#[doc = "No such occurrence."]
|
||||
_0,
|
||||
#[doc = "Indicates setting of any Error Bit detected in the Data Phase of CAN FD frames with the BRS bit set."]
|
||||
_1,
|
||||
}
|
||||
@ -904,8 +941,10 @@ impl ERRINT_FASTR {
|
||||
#[doc = "Possible values of the field `ERROVR`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ERROVRR {
|
||||
#[doc = "Overrun has not occurred."] _0,
|
||||
#[doc = "Overrun has occurred."] _1,
|
||||
#[doc = "Overrun has not occurred."]
|
||||
_0,
|
||||
#[doc = "Overrun has occurred."]
|
||||
_1,
|
||||
}
|
||||
impl ERROVRR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -949,8 +988,10 @@ impl ERROVRR {
|
||||
#[doc = "Possible values of the field `STFERR_FAST`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum STFERR_FASTR {
|
||||
#[doc = "No such occurrence."] _0,
|
||||
#[doc = "A Stuffing Error occurred since last read of this register."] _1,
|
||||
#[doc = "No such occurrence."]
|
||||
_0,
|
||||
#[doc = "A Stuffing Error occurred since last read of this register."]
|
||||
_1,
|
||||
}
|
||||
impl STFERR_FASTR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -994,8 +1035,10 @@ impl STFERR_FASTR {
|
||||
#[doc = "Possible values of the field `FRMERR_FAST`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum FRMERR_FASTR {
|
||||
#[doc = "No such occurrence."] _0,
|
||||
#[doc = "A Form Error occurred since last read of this register."] _1,
|
||||
#[doc = "No such occurrence."]
|
||||
_0,
|
||||
#[doc = "A Form Error occurred since last read of this register."]
|
||||
_1,
|
||||
}
|
||||
impl FRMERR_FASTR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -1039,8 +1082,10 @@ impl FRMERR_FASTR {
|
||||
#[doc = "Possible values of the field `CRCERR_FAST`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum CRCERR_FASTR {
|
||||
#[doc = "No such occurrence."] _0,
|
||||
#[doc = "A CRC error occurred since last read of this register."] _1,
|
||||
#[doc = "No such occurrence."]
|
||||
_0,
|
||||
#[doc = "A CRC error occurred since last read of this register."]
|
||||
_1,
|
||||
}
|
||||
impl CRCERR_FASTR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -1084,8 +1129,10 @@ impl CRCERR_FASTR {
|
||||
#[doc = "Possible values of the field `BIT0ERR_FAST`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum BIT0ERR_FASTR {
|
||||
#[doc = "No such occurrence."] _0,
|
||||
#[doc = "At least one bit sent as dominant is received as recessive."] _1,
|
||||
#[doc = "No such occurrence."]
|
||||
_0,
|
||||
#[doc = "At least one bit sent as dominant is received as recessive."]
|
||||
_1,
|
||||
}
|
||||
impl BIT0ERR_FASTR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -1129,8 +1176,10 @@ impl BIT0ERR_FASTR {
|
||||
#[doc = "Possible values of the field `BIT1ERR_FAST`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum BIT1ERR_FASTR {
|
||||
#[doc = "No such occurrence."] _0,
|
||||
#[doc = "At least one bit sent as recessive is received as dominant."] _1,
|
||||
#[doc = "No such occurrence."]
|
||||
_0,
|
||||
#[doc = "At least one bit sent as recessive is received as dominant."]
|
||||
_1,
|
||||
}
|
||||
impl BIT1ERR_FASTR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -1173,8 +1222,10 @@ impl BIT1ERR_FASTR {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `ERRINT`"]
|
||||
pub enum ERRINTW {
|
||||
#[doc = "No such occurrence."] _0,
|
||||
#[doc = "Indicates setting of any Error Bit in the Error and Status Register."] _1,
|
||||
#[doc = "No such occurrence."]
|
||||
_0,
|
||||
#[doc = "Indicates setting of any Error Bit in the Error and Status Register."]
|
||||
_1,
|
||||
}
|
||||
impl ERRINTW {
|
||||
#[allow(missing_docs)]
|
||||
@ -1229,8 +1280,10 @@ impl<'a> _ERRINTW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `BOFFINT`"]
|
||||
pub enum BOFFINTW {
|
||||
#[doc = "No such occurrence."] _0,
|
||||
#[doc = "FlexCAN module entered Bus Off state."] _1,
|
||||
#[doc = "No such occurrence."]
|
||||
_0,
|
||||
#[doc = "FlexCAN module entered Bus Off state."]
|
||||
_1,
|
||||
}
|
||||
impl BOFFINTW {
|
||||
#[allow(missing_docs)]
|
||||
@ -1285,7 +1338,8 @@ impl<'a> _BOFFINTW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `RWRNINT`"]
|
||||
pub enum RWRNINTW {
|
||||
#[doc = "No such occurrence."] _0,
|
||||
#[doc = "No such occurrence."]
|
||||
_0,
|
||||
#[doc = "The Rx error counter transitioned from less than 96 to greater than or equal to 96."]
|
||||
_1,
|
||||
}
|
||||
@ -1342,7 +1396,8 @@ impl<'a> _RWRNINTW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `TWRNINT`"]
|
||||
pub enum TWRNINTW {
|
||||
#[doc = "No such occurrence."] _0,
|
||||
#[doc = "No such occurrence."]
|
||||
_0,
|
||||
#[doc = "The Tx error counter transitioned from less than 96 to greater than or equal to 96."]
|
||||
_1,
|
||||
}
|
||||
@ -1399,8 +1454,10 @@ impl<'a> _TWRNINTW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `BOFFDONEINT`"]
|
||||
pub enum BOFFDONEINTW {
|
||||
#[doc = "No such occurrence."] _0,
|
||||
#[doc = "FlexCAN module has completed Bus Off process."] _1,
|
||||
#[doc = "No such occurrence."]
|
||||
_0,
|
||||
#[doc = "FlexCAN module has completed Bus Off process."]
|
||||
_1,
|
||||
}
|
||||
impl BOFFDONEINTW {
|
||||
#[allow(missing_docs)]
|
||||
@ -1455,7 +1512,8 @@ impl<'a> _BOFFDONEINTW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `ERRINT_FAST`"]
|
||||
pub enum ERRINT_FASTW {
|
||||
#[doc = "No such occurrence."] _0,
|
||||
#[doc = "No such occurrence."]
|
||||
_0,
|
||||
#[doc = "Indicates setting of any Error Bit detected in the Data Phase of CAN FD frames with the BRS bit set."]
|
||||
_1,
|
||||
}
|
||||
@ -1512,8 +1570,10 @@ impl<'a> _ERRINT_FASTW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `ERROVR`"]
|
||||
pub enum ERROVRW {
|
||||
#[doc = "Overrun has not occurred."] _0,
|
||||
#[doc = "Overrun has occurred."] _1,
|
||||
#[doc = "Overrun has not occurred."]
|
||||
_0,
|
||||
#[doc = "Overrun has occurred."]
|
||||
_1,
|
||||
}
|
||||
impl ERROVRW {
|
||||
#[allow(missing_docs)]
|
||||
|
||||
@ -14,7 +14,8 @@ impl super::ESR2 {
|
||||
#[doc = "Possible values of the field `IMB`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum IMBR {
|
||||
#[doc = "If ESR2[VPS] is asserted, the ESR2[LPTM] is not an inactive Mailbox."] _0,
|
||||
#[doc = "If ESR2[VPS] is asserted, the ESR2[LPTM] is not an inactive Mailbox."]
|
||||
_0,
|
||||
#[doc = "If ESR2[VPS] is asserted, there is at least one inactive Mailbox. LPTM content is the number of the first one."]
|
||||
_1,
|
||||
}
|
||||
@ -60,8 +61,10 @@ impl IMBR {
|
||||
#[doc = "Possible values of the field `VPS`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum VPSR {
|
||||
#[doc = "Contents of IMB and LPTM are invalid."] _0,
|
||||
#[doc = "Contents of IMB and LPTM are valid."] _1,
|
||||
#[doc = "Contents of IMB and LPTM are invalid."]
|
||||
_0,
|
||||
#[doc = "Contents of IMB and LPTM are valid."]
|
||||
_1,
|
||||
}
|
||||
impl VPSR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
||||
@ -67,8 +67,10 @@ impl TDCOFFR {
|
||||
#[doc = "Possible values of the field `TDCFAIL`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TDCFAILR {
|
||||
#[doc = "Measured loop delay is in range."] _0,
|
||||
#[doc = "Measured loop delay is out of range."] _1,
|
||||
#[doc = "Measured loop delay is in range."]
|
||||
_0,
|
||||
#[doc = "Measured loop delay is out of range."]
|
||||
_1,
|
||||
}
|
||||
impl TDCFAILR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -112,8 +114,10 @@ impl TDCFAILR {
|
||||
#[doc = "Possible values of the field `TDCEN`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TDCENR {
|
||||
#[doc = "TDC is disabled"] _0,
|
||||
#[doc = "TDC is enabled"] _1,
|
||||
#[doc = "TDC is disabled"]
|
||||
_0,
|
||||
#[doc = "TDC is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl TDCENR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -157,10 +161,14 @@ impl TDCENR {
|
||||
#[doc = "Possible values of the field `MBDSR0`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum MBDSR0R {
|
||||
#[doc = "Selects 8 bytes per Message Buffer."] _00,
|
||||
#[doc = "Selects 16 bytes per Message Buffer."] _01,
|
||||
#[doc = "Selects 32 bytes per Message Buffer."] _10,
|
||||
#[doc = "Selects 64 bytes per Message Buffer."] _11,
|
||||
#[doc = "Selects 8 bytes per Message Buffer."]
|
||||
_00,
|
||||
#[doc = "Selects 16 bytes per Message Buffer."]
|
||||
_01,
|
||||
#[doc = "Selects 32 bytes per Message Buffer."]
|
||||
_10,
|
||||
#[doc = "Selects 64 bytes per Message Buffer."]
|
||||
_11,
|
||||
}
|
||||
impl MBDSR0R {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
@ -209,8 +217,10 @@ impl MBDSR0R {
|
||||
#[doc = "Possible values of the field `FDRATE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum FDRATER {
|
||||
#[doc = "Transmit a frame in nominal rate. The BRS bit in the Tx MB has no effect."] _0,
|
||||
#[doc = "Transmit a frame with bit rate switching if the BRS bit in the Tx MB is recessive."] _1,
|
||||
#[doc = "Transmit a frame in nominal rate. The BRS bit in the Tx MB has no effect."]
|
||||
_0,
|
||||
#[doc = "Transmit a frame with bit rate switching if the BRS bit in the Tx MB is recessive."]
|
||||
_1,
|
||||
}
|
||||
impl FDRATER {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -268,8 +278,10 @@ impl<'a> _TDCOFFW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `TDCFAIL`"]
|
||||
pub enum TDCFAILW {
|
||||
#[doc = "Measured loop delay is in range."] _0,
|
||||
#[doc = "Measured loop delay is out of range."] _1,
|
||||
#[doc = "Measured loop delay is in range."]
|
||||
_0,
|
||||
#[doc = "Measured loop delay is out of range."]
|
||||
_1,
|
||||
}
|
||||
impl TDCFAILW {
|
||||
#[allow(missing_docs)]
|
||||
@ -324,8 +336,10 @@ impl<'a> _TDCFAILW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `TDCEN`"]
|
||||
pub enum TDCENW {
|
||||
#[doc = "TDC is disabled"] _0,
|
||||
#[doc = "TDC is enabled"] _1,
|
||||
#[doc = "TDC is disabled"]
|
||||
_0,
|
||||
#[doc = "TDC is enabled"]
|
||||
_1,
|
||||
}
|
||||
impl TDCENW {
|
||||
#[allow(missing_docs)]
|
||||
@ -380,10 +394,14 @@ impl<'a> _TDCENW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `MBDSR0`"]
|
||||
pub enum MBDSR0W {
|
||||
#[doc = "Selects 8 bytes per Message Buffer."] _00,
|
||||
#[doc = "Selects 16 bytes per Message Buffer."] _01,
|
||||
#[doc = "Selects 32 bytes per Message Buffer."] _10,
|
||||
#[doc = "Selects 64 bytes per Message Buffer."] _11,
|
||||
#[doc = "Selects 8 bytes per Message Buffer."]
|
||||
_00,
|
||||
#[doc = "Selects 16 bytes per Message Buffer."]
|
||||
_01,
|
||||
#[doc = "Selects 32 bytes per Message Buffer."]
|
||||
_10,
|
||||
#[doc = "Selects 64 bytes per Message Buffer."]
|
||||
_11,
|
||||
}
|
||||
impl MBDSR0W {
|
||||
#[allow(missing_docs)]
|
||||
@ -442,8 +460,10 @@ impl<'a> _MBDSR0W<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `FDRATE`"]
|
||||
pub enum FDRATEW {
|
||||
#[doc = "Transmit a frame in nominal rate. The BRS bit in the Tx MB has no effect."] _0,
|
||||
#[doc = "Transmit a frame with bit rate switching if the BRS bit in the Tx MB is recessive."] _1,
|
||||
#[doc = "Transmit a frame in nominal rate. The BRS bit in the Tx MB has no effect."]
|
||||
_0,
|
||||
#[doc = "Transmit a frame with bit rate switching if the BRS bit in the Tx MB is recessive."]
|
||||
_1,
|
||||
}
|
||||
impl FDRATEW {
|
||||
#[allow(missing_docs)]
|
||||
|
||||
@ -56,8 +56,10 @@ impl FLT_ID1R {
|
||||
#[doc = "Possible values of the field `FLT_RTR`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum FLT_RTRR {
|
||||
#[doc = "Reject remote frame (accept data frame)"] _0,
|
||||
#[doc = "Accept remote frame"] _1,
|
||||
#[doc = "Reject remote frame (accept data frame)"]
|
||||
_0,
|
||||
#[doc = "Accept remote frame"]
|
||||
_1,
|
||||
}
|
||||
impl FLT_RTRR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -101,8 +103,10 @@ impl FLT_RTRR {
|
||||
#[doc = "Possible values of the field `FLT_IDE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum FLT_IDER {
|
||||
#[doc = "Accept standard frame format"] _0,
|
||||
#[doc = "Accept extended frame format"] _1,
|
||||
#[doc = "Accept standard frame format"]
|
||||
_0,
|
||||
#[doc = "Accept extended frame format"]
|
||||
_1,
|
||||
}
|
||||
impl FLT_IDER {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -160,8 +164,10 @@ impl<'a> _FLT_ID1W<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `FLT_RTR`"]
|
||||
pub enum FLT_RTRW {
|
||||
#[doc = "Reject remote frame (accept data frame)"] _0,
|
||||
#[doc = "Accept remote frame"] _1,
|
||||
#[doc = "Reject remote frame (accept data frame)"]
|
||||
_0,
|
||||
#[doc = "Accept remote frame"]
|
||||
_1,
|
||||
}
|
||||
impl FLT_RTRW {
|
||||
#[allow(missing_docs)]
|
||||
@ -216,8 +222,10 @@ impl<'a> _FLT_RTRW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `FLT_IDE`"]
|
||||
pub enum FLT_IDEW {
|
||||
#[doc = "Accept standard frame format"] _0,
|
||||
#[doc = "Accept extended frame format"] _1,
|
||||
#[doc = "Accept standard frame format"]
|
||||
_0,
|
||||
#[doc = "Accept extended frame format"]
|
||||
_1,
|
||||
}
|
||||
impl FLT_IDEW {
|
||||
#[allow(missing_docs)]
|
||||
|
||||
@ -56,8 +56,10 @@ impl FLT_ID2_IDMASKR {
|
||||
#[doc = "Possible values of the field `RTR_MSK`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum RTR_MSKR {
|
||||
#[doc = "The corresponding bit in the filter is \"don't care\""] _0,
|
||||
#[doc = "The corresponding bit in the filter is checked"] _1,
|
||||
#[doc = "The corresponding bit in the filter is \"don't care\""]
|
||||
_0,
|
||||
#[doc = "The corresponding bit in the filter is checked"]
|
||||
_1,
|
||||
}
|
||||
impl RTR_MSKR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -101,8 +103,10 @@ impl RTR_MSKR {
|
||||
#[doc = "Possible values of the field `IDE_MSK`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum IDE_MSKR {
|
||||
#[doc = "The corresponding bit in the filter is \"don't care\""] _0,
|
||||
#[doc = "The corresponding bit in the filter is checked"] _1,
|
||||
#[doc = "The corresponding bit in the filter is \"don't care\""]
|
||||
_0,
|
||||
#[doc = "The corresponding bit in the filter is checked"]
|
||||
_1,
|
||||
}
|
||||
impl IDE_MSKR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -160,8 +164,10 @@ impl<'a> _FLT_ID2_IDMASKW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `RTR_MSK`"]
|
||||
pub enum RTR_MSKW {
|
||||
#[doc = "The corresponding bit in the filter is \"don't care\""] _0,
|
||||
#[doc = "The corresponding bit in the filter is checked"] _1,
|
||||
#[doc = "The corresponding bit in the filter is \"don't care\""]
|
||||
_0,
|
||||
#[doc = "The corresponding bit in the filter is checked"]
|
||||
_1,
|
||||
}
|
||||
impl RTR_MSKW {
|
||||
#[allow(missing_docs)]
|
||||
@ -216,8 +222,10 @@ impl<'a> _RTR_MSKW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `IDE_MSK`"]
|
||||
pub enum IDE_MSKW {
|
||||
#[doc = "The corresponding bit in the filter is \"don't care\""] _0,
|
||||
#[doc = "The corresponding bit in the filter is checked"] _1,
|
||||
#[doc = "The corresponding bit in the filter is \"don't care\""]
|
||||
_0,
|
||||
#[doc = "The corresponding bit in the filter is checked"]
|
||||
_1,
|
||||
}
|
||||
impl IDE_MSKW {
|
||||
#[allow(missing_docs)]
|
||||
|
||||
@ -56,11 +56,14 @@ impl MAXMBR {
|
||||
#[doc = "Possible values of the field `IDAM`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum IDAMR {
|
||||
#[doc = "Format A: One full ID (standard and extended) per ID Filter Table element."] _00,
|
||||
#[doc = "Format A: One full ID (standard and extended) per ID Filter Table element."]
|
||||
_00,
|
||||
#[doc = "Format B: Two full standard IDs or two partial 14-bit (standard and extended) IDs per ID Filter Table element."]
|
||||
_01,
|
||||
#[doc = "Format C: Four partial 8-bit Standard IDs per ID Filter Table element."] _10,
|
||||
#[doc = "Format D: All frames rejected."] _11,
|
||||
#[doc = "Format C: Four partial 8-bit Standard IDs per ID Filter Table element."]
|
||||
_10,
|
||||
#[doc = "Format D: All frames rejected."]
|
||||
_11,
|
||||
}
|
||||
impl IDAMR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
@ -156,8 +159,10 @@ impl FDENR {
|
||||
#[doc = "Possible values of the field `AEN`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum AENR {
|
||||
#[doc = "Abort disabled."] _0,
|
||||
#[doc = "Abort enabled."] _1,
|
||||
#[doc = "Abort disabled."]
|
||||
_0,
|
||||
#[doc = "Abort enabled."]
|
||||
_1,
|
||||
}
|
||||
impl AENR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -201,8 +206,10 @@ impl AENR {
|
||||
#[doc = "Possible values of the field `LPRIOEN`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum LPRIOENR {
|
||||
#[doc = "Local Priority disabled."] _0,
|
||||
#[doc = "Local Priority enabled."] _1,
|
||||
#[doc = "Local Priority disabled."]
|
||||
_0,
|
||||
#[doc = "Local Priority enabled."]
|
||||
_1,
|
||||
}
|
||||
impl LPRIOENR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -246,8 +253,10 @@ impl LPRIOENR {
|
||||
#[doc = "Possible values of the field `PNET_EN`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum PNET_ENR {
|
||||
#[doc = "Pretended Networking mode is disabled."] _0,
|
||||
#[doc = "Pretended Networking mode is enabled."] _1,
|
||||
#[doc = "Pretended Networking mode is disabled."]
|
||||
_0,
|
||||
#[doc = "Pretended Networking mode is enabled."]
|
||||
_1,
|
||||
}
|
||||
impl PNET_ENR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -291,8 +300,10 @@ impl PNET_ENR {
|
||||
#[doc = "Possible values of the field `DMA`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum DMAR {
|
||||
#[doc = "DMA feature for RX FIFO disabled."] _0,
|
||||
#[doc = "DMA feature for RX FIFO enabled."] _1,
|
||||
#[doc = "DMA feature for RX FIFO disabled."]
|
||||
_0,
|
||||
#[doc = "DMA feature for RX FIFO enabled."]
|
||||
_1,
|
||||
}
|
||||
impl DMAR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -338,7 +349,8 @@ impl DMAR {
|
||||
pub enum IRMQR {
|
||||
#[doc = "Individual Rx masking and queue feature are disabled. For backward compatibility with legacy applications, the reading of C/S word locks the MB even if it is EMPTY."]
|
||||
_0,
|
||||
#[doc = "Individual Rx masking and queue feature are enabled."] _1,
|
||||
#[doc = "Individual Rx masking and queue feature are enabled."]
|
||||
_1,
|
||||
}
|
||||
impl IRMQR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -382,8 +394,10 @@ impl IRMQR {
|
||||
#[doc = "Possible values of the field `SRXDIS`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SRXDISR {
|
||||
#[doc = "Self reception enabled."] _0,
|
||||
#[doc = "Self reception disabled."] _1,
|
||||
#[doc = "Self reception enabled."]
|
||||
_0,
|
||||
#[doc = "Self reception disabled."]
|
||||
_1,
|
||||
}
|
||||
impl SRXDISR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -427,8 +441,10 @@ impl SRXDISR {
|
||||
#[doc = "Possible values of the field `LPMACK`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum LPMACKR {
|
||||
#[doc = "FlexCAN is not in a low-power mode."] _0,
|
||||
#[doc = "FlexCAN is in a low-power mode."] _1,
|
||||
#[doc = "FlexCAN is not in a low-power mode."]
|
||||
_0,
|
||||
#[doc = "FlexCAN is in a low-power mode."]
|
||||
_1,
|
||||
}
|
||||
impl LPMACKR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -540,8 +556,10 @@ impl SUPVR {
|
||||
#[doc = "Possible values of the field `FRZACK`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum FRZACKR {
|
||||
#[doc = "FlexCAN not in Freeze mode, prescaler running."] _0,
|
||||
#[doc = "FlexCAN in Freeze mode, prescaler stopped."] _1,
|
||||
#[doc = "FlexCAN not in Freeze mode, prescaler running."]
|
||||
_0,
|
||||
#[doc = "FlexCAN in Freeze mode, prescaler stopped."]
|
||||
_1,
|
||||
}
|
||||
impl FRZACKR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -585,8 +603,10 @@ impl FRZACKR {
|
||||
#[doc = "Possible values of the field `SOFTRST`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum SOFTRSTR {
|
||||
#[doc = "No reset request."] _0,
|
||||
#[doc = "Resets the registers affected by soft reset."] _1,
|
||||
#[doc = "No reset request."]
|
||||
_0,
|
||||
#[doc = "Resets the registers affected by soft reset."]
|
||||
_1,
|
||||
}
|
||||
impl SOFTRSTR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -630,8 +650,10 @@ impl SOFTRSTR {
|
||||
#[doc = "Possible values of the field `NOTRDY`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum NOTRDYR {
|
||||
#[doc = "FlexCAN module is either in Normal mode, Listen-Only mode or Loop-Back mode."] _0,
|
||||
#[doc = r" Reserved"] _Reserved(bool),
|
||||
#[doc = "FlexCAN module is either in Normal mode, Listen-Only mode or Loop-Back mode."]
|
||||
_0,
|
||||
#[doc = r" Reserved"]
|
||||
_Reserved(bool),
|
||||
}
|
||||
impl NOTRDYR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -670,8 +692,10 @@ impl NOTRDYR {
|
||||
#[doc = "Possible values of the field `HALT`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum HALTR {
|
||||
#[doc = "No Freeze mode request."] _0,
|
||||
#[doc = "Enters Freeze mode if the FRZ bit is asserted."] _1,
|
||||
#[doc = "No Freeze mode request."]
|
||||
_0,
|
||||
#[doc = "Enters Freeze mode if the FRZ bit is asserted."]
|
||||
_1,
|
||||
}
|
||||
impl HALTR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -715,8 +739,10 @@ impl HALTR {
|
||||
#[doc = "Possible values of the field `RFEN`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum RFENR {
|
||||
#[doc = "Rx FIFO not enabled."] _0,
|
||||
#[doc = "Rx FIFO enabled."] _1,
|
||||
#[doc = "Rx FIFO not enabled."]
|
||||
_0,
|
||||
#[doc = "Rx FIFO enabled."]
|
||||
_1,
|
||||
}
|
||||
impl RFENR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -760,8 +786,10 @@ impl RFENR {
|
||||
#[doc = "Possible values of the field `FRZ`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum FRZR {
|
||||
#[doc = "Not enabled to enter Freeze mode."] _0,
|
||||
#[doc = "Enabled to enter Freeze mode."] _1,
|
||||
#[doc = "Not enabled to enter Freeze mode."]
|
||||
_0,
|
||||
#[doc = "Enabled to enter Freeze mode."]
|
||||
_1,
|
||||
}
|
||||
impl FRZR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -805,8 +833,10 @@ impl FRZR {
|
||||
#[doc = "Possible values of the field `MDIS`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum MDISR {
|
||||
#[doc = "Enable the FlexCAN module."] _0,
|
||||
#[doc = "Disable the FlexCAN module."] _1,
|
||||
#[doc = "Enable the FlexCAN module."]
|
||||
_0,
|
||||
#[doc = "Disable the FlexCAN module."]
|
||||
_1,
|
||||
}
|
||||
impl MDISR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -864,11 +894,14 @@ impl<'a> _MAXMBW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `IDAM`"]
|
||||
pub enum IDAMW {
|
||||
#[doc = "Format A: One full ID (standard and extended) per ID Filter Table element."] _00,
|
||||
#[doc = "Format A: One full ID (standard and extended) per ID Filter Table element."]
|
||||
_00,
|
||||
#[doc = "Format B: Two full standard IDs or two partial 14-bit (standard and extended) IDs per ID Filter Table element."]
|
||||
_01,
|
||||
#[doc = "Format C: Four partial 8-bit Standard IDs per ID Filter Table element."] _10,
|
||||
#[doc = "Format D: All frames rejected."] _11,
|
||||
#[doc = "Format C: Four partial 8-bit Standard IDs per ID Filter Table element."]
|
||||
_10,
|
||||
#[doc = "Format D: All frames rejected."]
|
||||
_11,
|
||||
}
|
||||
impl IDAMW {
|
||||
#[allow(missing_docs)]
|
||||
@ -985,8 +1018,10 @@ impl<'a> _FDENW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `AEN`"]
|
||||
pub enum AENW {
|
||||
#[doc = "Abort disabled."] _0,
|
||||
#[doc = "Abort enabled."] _1,
|
||||
#[doc = "Abort disabled."]
|
||||
_0,
|
||||
#[doc = "Abort enabled."]
|
||||
_1,
|
||||
}
|
||||
impl AENW {
|
||||
#[allow(missing_docs)]
|
||||
@ -1041,8 +1076,10 @@ impl<'a> _AENW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `LPRIOEN`"]
|
||||
pub enum LPRIOENW {
|
||||
#[doc = "Local Priority disabled."] _0,
|
||||
#[doc = "Local Priority enabled."] _1,
|
||||
#[doc = "Local Priority disabled."]
|
||||
_0,
|
||||
#[doc = "Local Priority enabled."]
|
||||
_1,
|
||||
}
|
||||
impl LPRIOENW {
|
||||
#[allow(missing_docs)]
|
||||
@ -1097,8 +1134,10 @@ impl<'a> _LPRIOENW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `PNET_EN`"]
|
||||
pub enum PNET_ENW {
|
||||
#[doc = "Pretended Networking mode is disabled."] _0,
|
||||
#[doc = "Pretended Networking mode is enabled."] _1,
|
||||
#[doc = "Pretended Networking mode is disabled."]
|
||||
_0,
|
||||
#[doc = "Pretended Networking mode is enabled."]
|
||||
_1,
|
||||
}
|
||||
impl PNET_ENW {
|
||||
#[allow(missing_docs)]
|
||||
@ -1153,8 +1192,10 @@ impl<'a> _PNET_ENW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `DMA`"]
|
||||
pub enum DMAW {
|
||||
#[doc = "DMA feature for RX FIFO disabled."] _0,
|
||||
#[doc = "DMA feature for RX FIFO enabled."] _1,
|
||||
#[doc = "DMA feature for RX FIFO disabled."]
|
||||
_0,
|
||||
#[doc = "DMA feature for RX FIFO enabled."]
|
||||
_1,
|
||||
}
|
||||
impl DMAW {
|
||||
#[allow(missing_docs)]
|
||||
@ -1211,7 +1252,8 @@ impl<'a> _DMAW<'a> {
|
||||
pub enum IRMQW {
|
||||
#[doc = "Individual Rx masking and queue feature are disabled. For backward compatibility with legacy applications, the reading of C/S word locks the MB even if it is EMPTY."]
|
||||
_0,
|
||||
#[doc = "Individual Rx masking and queue feature are enabled."] _1,
|
||||
#[doc = "Individual Rx masking and queue feature are enabled."]
|
||||
_1,
|
||||
}
|
||||
impl IRMQW {
|
||||
#[allow(missing_docs)]
|
||||
@ -1266,8 +1308,10 @@ impl<'a> _IRMQW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `SRXDIS`"]
|
||||
pub enum SRXDISW {
|
||||
#[doc = "Self reception enabled."] _0,
|
||||
#[doc = "Self reception disabled."] _1,
|
||||
#[doc = "Self reception enabled."]
|
||||
_0,
|
||||
#[doc = "Self reception disabled."]
|
||||
_1,
|
||||
}
|
||||
impl SRXDISW {
|
||||
#[allow(missing_docs)]
|
||||
@ -1403,8 +1447,10 @@ impl<'a> _SUPVW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `SOFTRST`"]
|
||||
pub enum SOFTRSTW {
|
||||
#[doc = "No reset request."] _0,
|
||||
#[doc = "Resets the registers affected by soft reset."] _1,
|
||||
#[doc = "No reset request."]
|
||||
_0,
|
||||
#[doc = "Resets the registers affected by soft reset."]
|
||||
_1,
|
||||
}
|
||||
impl SOFTRSTW {
|
||||
#[allow(missing_docs)]
|
||||
@ -1459,8 +1505,10 @@ impl<'a> _SOFTRSTW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `HALT`"]
|
||||
pub enum HALTW {
|
||||
#[doc = "No Freeze mode request."] _0,
|
||||
#[doc = "Enters Freeze mode if the FRZ bit is asserted."] _1,
|
||||
#[doc = "No Freeze mode request."]
|
||||
_0,
|
||||
#[doc = "Enters Freeze mode if the FRZ bit is asserted."]
|
||||
_1,
|
||||
}
|
||||
impl HALTW {
|
||||
#[allow(missing_docs)]
|
||||
@ -1515,8 +1563,10 @@ impl<'a> _HALTW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `RFEN`"]
|
||||
pub enum RFENW {
|
||||
#[doc = "Rx FIFO not enabled."] _0,
|
||||
#[doc = "Rx FIFO enabled."] _1,
|
||||
#[doc = "Rx FIFO not enabled."]
|
||||
_0,
|
||||
#[doc = "Rx FIFO enabled."]
|
||||
_1,
|
||||
}
|
||||
impl RFENW {
|
||||
#[allow(missing_docs)]
|
||||
@ -1571,8 +1621,10 @@ impl<'a> _RFENW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `FRZ`"]
|
||||
pub enum FRZW {
|
||||
#[doc = "Not enabled to enter Freeze mode."] _0,
|
||||
#[doc = "Enabled to enter Freeze mode."] _1,
|
||||
#[doc = "Not enabled to enter Freeze mode."]
|
||||
_0,
|
||||
#[doc = "Enabled to enter Freeze mode."]
|
||||
_1,
|
||||
}
|
||||
impl FRZW {
|
||||
#[allow(missing_docs)]
|
||||
@ -1627,8 +1679,10 @@ impl<'a> _FRZW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `MDIS`"]
|
||||
pub enum MDISW {
|
||||
#[doc = "Enable the FlexCAN module."] _0,
|
||||
#[doc = "Disable the FlexCAN module."] _1,
|
||||
#[doc = "Enable the FlexCAN module."]
|
||||
_0,
|
||||
#[doc = "Disable the FlexCAN module."]
|
||||
_1,
|
||||
}
|
||||
impl MDISW {
|
||||
#[allow(missing_docs)]
|
||||
|
||||
132
src/can0/mod.rs
132
src/can0/mod.rs
@ -2,38 +2,63 @@ use vcell::VolatileCell;
|
||||
#[doc = r" Register block"]
|
||||
#[repr(C)]
|
||||
pub struct RegisterBlock {
|
||||
#[doc = "0x00 - Module Configuration Register"] pub mcr: MCR,
|
||||
#[doc = "0x04 - Control 1 register"] pub ctrl1: CTRL1,
|
||||
#[doc = "0x08 - Free Running Timer"] pub timer: TIMER,
|
||||
#[doc = "0x00 - Module Configuration Register"]
|
||||
pub mcr: MCR,
|
||||
#[doc = "0x04 - Control 1 register"]
|
||||
pub ctrl1: CTRL1,
|
||||
#[doc = "0x08 - Free Running Timer"]
|
||||
pub timer: TIMER,
|
||||
_reserved0: [u8; 4usize],
|
||||
#[doc = "0x10 - Rx Mailboxes Global Mask Register"] pub rxmgmask: RXMGMASK,
|
||||
#[doc = "0x14 - Rx 14 Mask register"] pub rx14mask: RX14MASK,
|
||||
#[doc = "0x18 - Rx 15 Mask register"] pub rx15mask: RX15MASK,
|
||||
#[doc = "0x1c - Error Counter"] pub ecr: ECR,
|
||||
#[doc = "0x20 - Error and Status 1 register"] pub esr1: ESR1,
|
||||
#[doc = "0x10 - Rx Mailboxes Global Mask Register"]
|
||||
pub rxmgmask: RXMGMASK,
|
||||
#[doc = "0x14 - Rx 14 Mask register"]
|
||||
pub rx14mask: RX14MASK,
|
||||
#[doc = "0x18 - Rx 15 Mask register"]
|
||||
pub rx15mask: RX15MASK,
|
||||
#[doc = "0x1c - Error Counter"]
|
||||
pub ecr: ECR,
|
||||
#[doc = "0x20 - Error and Status 1 register"]
|
||||
pub esr1: ESR1,
|
||||
_reserved1: [u8; 4usize],
|
||||
#[doc = "0x28 - Interrupt Masks 1 register"] pub imask1: IMASK1,
|
||||
#[doc = "0x28 - Interrupt Masks 1 register"]
|
||||
pub imask1: IMASK1,
|
||||
_reserved2: [u8; 4usize],
|
||||
#[doc = "0x30 - Interrupt Flags 1 register"] pub iflag1: IFLAG1,
|
||||
#[doc = "0x34 - Control 2 register"] pub ctrl2: CTRL2,
|
||||
#[doc = "0x38 - Error and Status 2 register"] pub esr2: ESR2,
|
||||
#[doc = "0x30 - Interrupt Flags 1 register"]
|
||||
pub iflag1: IFLAG1,
|
||||
#[doc = "0x34 - Control 2 register"]
|
||||
pub ctrl2: CTRL2,
|
||||
#[doc = "0x38 - Error and Status 2 register"]
|
||||
pub esr2: ESR2,
|
||||
_reserved3: [u8; 8usize],
|
||||
#[doc = "0x44 - CRC Register"] pub crcr: CRCR,
|
||||
#[doc = "0x48 - Rx FIFO Global Mask register"] pub rxfgmask: RXFGMASK,
|
||||
#[doc = "0x4c - Rx FIFO Information Register"] pub rxfir: RXFIR,
|
||||
#[doc = "0x50 - CAN Bit Timing Register"] pub cbt: CBT,
|
||||
#[doc = "0x44 - CRC Register"]
|
||||
pub crcr: CRCR,
|
||||
#[doc = "0x48 - Rx FIFO Global Mask register"]
|
||||
pub rxfgmask: RXFGMASK,
|
||||
#[doc = "0x4c - Rx FIFO Information Register"]
|
||||
pub rxfir: RXFIR,
|
||||
#[doc = "0x50 - CAN Bit Timing Register"]
|
||||
pub cbt: CBT,
|
||||
_reserved4: [u8; 44usize],
|
||||
#[doc = "0x80 - Embedded RAM"] pub embedded_ram: [EMBEDDEDRAM; 128],
|
||||
#[doc = "0x80 - Embedded RAM"]
|
||||
pub embedded_ram: [EMBEDDEDRAM; 128],
|
||||
_reserved5: [u8; 1536usize],
|
||||
#[doc = "0x880 - Rx Individual Mask Registers"] pub rximr: [RXIMR; 16],
|
||||
#[doc = "0x880 - Rx Individual Mask Registers"]
|
||||
pub rximr: [RXIMR; 16],
|
||||
_reserved6: [u8; 576usize],
|
||||
#[doc = "0xb00 - Pretended Networking Control 1 Register"] pub ctrl1_pn: CTRL1_PN,
|
||||
#[doc = "0xb04 - Pretended Networking Control 2 Register"] pub ctrl2_pn: CTRL2_PN,
|
||||
#[doc = "0xb08 - Pretended Networking Wake Up Match Register"] pub wu_mtc: WU_MTC,
|
||||
#[doc = "0xb0c - Pretended Networking ID Filter 1 Register"] pub flt_id1: FLT_ID1,
|
||||
#[doc = "0xb10 - Pretended Networking DLC Filter Register"] pub flt_dlc: FLT_DLC,
|
||||
#[doc = "0xb14 - Pretended Networking Payload Low Filter 1 Register"] pub pl1_lo: PL1_LO,
|
||||
#[doc = "0xb18 - Pretended Networking Payload High Filter 1 Register"] pub pl1_hi: PL1_HI,
|
||||
#[doc = "0xb00 - Pretended Networking Control 1 Register"]
|
||||
pub ctrl1_pn: CTRL1_PN,
|
||||
#[doc = "0xb04 - Pretended Networking Control 2 Register"]
|
||||
pub ctrl2_pn: CTRL2_PN,
|
||||
#[doc = "0xb08 - Pretended Networking Wake Up Match Register"]
|
||||
pub wu_mtc: WU_MTC,
|
||||
#[doc = "0xb0c - Pretended Networking ID Filter 1 Register"]
|
||||
pub flt_id1: FLT_ID1,
|
||||
#[doc = "0xb10 - Pretended Networking DLC Filter Register"]
|
||||
pub flt_dlc: FLT_DLC,
|
||||
#[doc = "0xb14 - Pretended Networking Payload Low Filter 1 Register"]
|
||||
pub pl1_lo: PL1_LO,
|
||||
#[doc = "0xb18 - Pretended Networking Payload High Filter 1 Register"]
|
||||
pub pl1_hi: PL1_HI,
|
||||
#[doc = "0xb1c - Pretended Networking ID Filter 2 Register / ID Mask Register"]
|
||||
pub flt_id2_idmask: FLT_ID2_IDMASK,
|
||||
#[doc = "0xb20 - Pretended Networking Payload Low Filter 2 Register / Payload Low Mask Register"]
|
||||
@ -41,26 +66,45 @@ pub struct RegisterBlock {
|
||||
#[doc = "0xb24 - Pretended Networking Payload High Filter 2 low order bits / Payload High Mask Register"]
|
||||
pub pl2_plmask_hi: PL2_PLMASK_HI,
|
||||
_reserved7: [u8; 24usize],
|
||||
#[doc = "0xb40 - Wake Up Message Buffer Register for C/S"] pub wmb0_cs: WMB0_CS,
|
||||
#[doc = "0xb44 - Wake Up Message Buffer Register for ID"] pub wmb0_id: WMB0_ID,
|
||||
#[doc = "0xb48 - Wake Up Message Buffer Register for Data 0-3"] pub wmb0_d03: WMB0_D03,
|
||||
#[doc = "0xb4c - Wake Up Message Buffer Register Data 4-7"] pub wmb0_d47: WMB0_D47,
|
||||
#[doc = "0xb50 - Wake Up Message Buffer Register for C/S"] pub wmb1_cs: WMB1_CS,
|
||||
#[doc = "0xb54 - Wake Up Message Buffer Register for ID"] pub wmb1_id: WMB1_ID,
|
||||
#[doc = "0xb58 - Wake Up Message Buffer Register for Data 0-3"] pub wmb1_d03: WMB1_D03,
|
||||
#[doc = "0xb5c - Wake Up Message Buffer Register Data 4-7"] pub wmb1_d47: WMB1_D47,
|
||||
#[doc = "0xb60 - Wake Up Message Buffer Register for C/S"] pub wmb2_cs: WMB2_CS,
|
||||
#[doc = "0xb64 - Wake Up Message Buffer Register for ID"] pub wmb2_id: WMB2_ID,
|
||||
#[doc = "0xb68 - Wake Up Message Buffer Register for Data 0-3"] pub wmb2_d03: WMB2_D03,
|
||||
#[doc = "0xb6c - Wake Up Message Buffer Register Data 4-7"] pub wmb2_d47: WMB2_D47,
|
||||
#[doc = "0xb70 - Wake Up Message Buffer Register for C/S"] pub wmb3_cs: WMB3_CS,
|
||||
#[doc = "0xb74 - Wake Up Message Buffer Register for ID"] pub wmb3_id: WMB3_ID,
|
||||
#[doc = "0xb78 - Wake Up Message Buffer Register for Data 0-3"] pub wmb3_d03: WMB3_D03,
|
||||
#[doc = "0xb7c - Wake Up Message Buffer Register Data 4-7"] pub wmb3_d47: WMB3_D47,
|
||||
#[doc = "0xb40 - Wake Up Message Buffer Register for C/S"]
|
||||
pub wmb0_cs: WMB0_CS,
|
||||
#[doc = "0xb44 - Wake Up Message Buffer Register for ID"]
|
||||
pub wmb0_id: WMB0_ID,
|
||||
#[doc = "0xb48 - Wake Up Message Buffer Register for Data 0-3"]
|
||||
pub wmb0_d03: WMB0_D03,
|
||||
#[doc = "0xb4c - Wake Up Message Buffer Register Data 4-7"]
|
||||
pub wmb0_d47: WMB0_D47,
|
||||
#[doc = "0xb50 - Wake Up Message Buffer Register for C/S"]
|
||||
pub wmb1_cs: WMB1_CS,
|
||||
#[doc = "0xb54 - Wake Up Message Buffer Register for ID"]
|
||||
pub wmb1_id: WMB1_ID,
|
||||
#[doc = "0xb58 - Wake Up Message Buffer Register for Data 0-3"]
|
||||
pub wmb1_d03: WMB1_D03,
|
||||
#[doc = "0xb5c - Wake Up Message Buffer Register Data 4-7"]
|
||||
pub wmb1_d47: WMB1_D47,
|
||||
#[doc = "0xb60 - Wake Up Message Buffer Register for C/S"]
|
||||
pub wmb2_cs: WMB2_CS,
|
||||
#[doc = "0xb64 - Wake Up Message Buffer Register for ID"]
|
||||
pub wmb2_id: WMB2_ID,
|
||||
#[doc = "0xb68 - Wake Up Message Buffer Register for Data 0-3"]
|
||||
pub wmb2_d03: WMB2_D03,
|
||||
#[doc = "0xb6c - Wake Up Message Buffer Register Data 4-7"]
|
||||
pub wmb2_d47: WMB2_D47,
|
||||
#[doc = "0xb70 - Wake Up Message Buffer Register for C/S"]
|
||||
pub wmb3_cs: WMB3_CS,
|
||||
#[doc = "0xb74 - Wake Up Message Buffer Register for ID"]
|
||||
pub wmb3_id: WMB3_ID,
|
||||
#[doc = "0xb78 - Wake Up Message Buffer Register for Data 0-3"]
|
||||
pub wmb3_d03: WMB3_D03,
|
||||
#[doc = "0xb7c - Wake Up Message Buffer Register Data 4-7"]
|
||||
pub wmb3_d47: WMB3_D47,
|
||||
_reserved8: [u8; 128usize],
|
||||
#[doc = "0xc00 - CAN FD Control Register"] pub fdctrl: FDCTRL,
|
||||
#[doc = "0xc04 - CAN FD Bit Timing Register"] pub fdcbt: FDCBT,
|
||||
#[doc = "0xc08 - CAN FD CRC Register"] pub fdcrc: FDCRC,
|
||||
#[doc = "0xc00 - CAN FD Control Register"]
|
||||
pub fdctrl: FDCTRL,
|
||||
#[doc = "0xc04 - CAN FD Bit Timing Register"]
|
||||
pub fdcbt: FDCBT,
|
||||
#[doc = "0xc08 - CAN FD CRC Register"]
|
||||
pub fdcrc: FDCRC,
|
||||
}
|
||||
#[doc = "Module Configuration Register"]
|
||||
pub struct MCR {
|
||||
|
||||
@ -25,8 +25,10 @@ impl DLCR {
|
||||
#[doc = "Possible values of the field `RTR`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum RTRR {
|
||||
#[doc = "Frame is data one (not remote)"] _0,
|
||||
#[doc = "Frame is a remote one"] _1,
|
||||
#[doc = "Frame is data one (not remote)"]
|
||||
_0,
|
||||
#[doc = "Frame is a remote one"]
|
||||
_1,
|
||||
}
|
||||
impl RTRR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -70,8 +72,10 @@ impl RTRR {
|
||||
#[doc = "Possible values of the field `IDE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum IDER {
|
||||
#[doc = "Frame format is standard"] _0,
|
||||
#[doc = "Frame format is extended"] _1,
|
||||
#[doc = "Frame format is standard"]
|
||||
_0,
|
||||
#[doc = "Frame format is extended"]
|
||||
_1,
|
||||
}
|
||||
impl IDER {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
||||
@ -25,8 +25,10 @@ impl DLCR {
|
||||
#[doc = "Possible values of the field `RTR`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum RTRR {
|
||||
#[doc = "Frame is data one (not remote)"] _0,
|
||||
#[doc = "Frame is a remote one"] _1,
|
||||
#[doc = "Frame is data one (not remote)"]
|
||||
_0,
|
||||
#[doc = "Frame is a remote one"]
|
||||
_1,
|
||||
}
|
||||
impl RTRR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -70,8 +72,10 @@ impl RTRR {
|
||||
#[doc = "Possible values of the field `IDE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum IDER {
|
||||
#[doc = "Frame format is standard"] _0,
|
||||
#[doc = "Frame format is extended"] _1,
|
||||
#[doc = "Frame format is standard"]
|
||||
_0,
|
||||
#[doc = "Frame format is extended"]
|
||||
_1,
|
||||
}
|
||||
impl IDER {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
||||
@ -25,8 +25,10 @@ impl DLCR {
|
||||
#[doc = "Possible values of the field `RTR`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum RTRR {
|
||||
#[doc = "Frame is data one (not remote)"] _0,
|
||||
#[doc = "Frame is a remote one"] _1,
|
||||
#[doc = "Frame is data one (not remote)"]
|
||||
_0,
|
||||
#[doc = "Frame is a remote one"]
|
||||
_1,
|
||||
}
|
||||
impl RTRR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -70,8 +72,10 @@ impl RTRR {
|
||||
#[doc = "Possible values of the field `IDE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum IDER {
|
||||
#[doc = "Frame format is standard"] _0,
|
||||
#[doc = "Frame format is extended"] _1,
|
||||
#[doc = "Frame format is standard"]
|
||||
_0,
|
||||
#[doc = "Frame format is extended"]
|
||||
_1,
|
||||
}
|
||||
impl IDER {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
||||
@ -25,8 +25,10 @@ impl DLCR {
|
||||
#[doc = "Possible values of the field `RTR`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum RTRR {
|
||||
#[doc = "Frame is data one (not remote)"] _0,
|
||||
#[doc = "Frame is a remote one"] _1,
|
||||
#[doc = "Frame is data one (not remote)"]
|
||||
_0,
|
||||
#[doc = "Frame is a remote one"]
|
||||
_1,
|
||||
}
|
||||
impl RTRR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -70,8 +72,10 @@ impl RTRR {
|
||||
#[doc = "Possible values of the field `IDE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum IDER {
|
||||
#[doc = "Frame format is standard"] _0,
|
||||
#[doc = "Frame format is extended"] _1,
|
||||
#[doc = "Frame format is standard"]
|
||||
_0,
|
||||
#[doc = "Frame format is extended"]
|
||||
_1,
|
||||
}
|
||||
impl IDER {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
|
||||
@ -56,8 +56,10 @@ impl MCOUNTERR {
|
||||
#[doc = "Possible values of the field `WUMF`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WUMFR {
|
||||
#[doc = "No wake up by match event detected"] _0,
|
||||
#[doc = "Wake up by match event detected"] _1,
|
||||
#[doc = "No wake up by match event detected"]
|
||||
_0,
|
||||
#[doc = "Wake up by match event detected"]
|
||||
_1,
|
||||
}
|
||||
impl WUMFR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -101,8 +103,10 @@ impl WUMFR {
|
||||
#[doc = "Possible values of the field `WTOF`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WTOFR {
|
||||
#[doc = "No wake up by timeout event detected"] _0,
|
||||
#[doc = "Wake up by timeout event detected"] _1,
|
||||
#[doc = "No wake up by timeout event detected"]
|
||||
_0,
|
||||
#[doc = "Wake up by timeout event detected"]
|
||||
_1,
|
||||
}
|
||||
impl WTOFR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
@ -145,8 +149,10 @@ impl WTOFR {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `WUMF`"]
|
||||
pub enum WUMFW {
|
||||
#[doc = "No wake up by match event detected"] _0,
|
||||
#[doc = "Wake up by match event detected"] _1,
|
||||
#[doc = "No wake up by match event detected"]
|
||||
_0,
|
||||
#[doc = "Wake up by match event detected"]
|
||||
_1,
|
||||
}
|
||||
impl WUMFW {
|
||||
#[allow(missing_docs)]
|
||||
@ -201,8 +207,10 @@ impl<'a> _WUMFW<'a> {
|
||||
}
|
||||
#[doc = "Values that can be written to the field `WTOF`"]
|
||||
pub enum WTOFW {
|
||||
#[doc = "No wake up by timeout event detected"] _0,
|
||||
#[doc = "Wake up by timeout event detected"] _1,
|
||||
#[doc = "No wake up by timeout event detected"]
|
||||
_0,
|
||||
#[doc = "Wake up by timeout event detected"]
|
||||
_1,
|
||||
}
|
||||
impl WTOFW {
|
||||
#[allow(missing_docs)]
|
||||
|
||||
Reference in New Issue
Block a user