s32k118: rewrite everything for s32k118
Signed-off-by: Sean Cross <sean@xobs.io>
This commit is contained in:
@ -1,185 +1,131 @@
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#[doc = r" Value read from the register"]
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pub struct R {
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bits: u32,
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}
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#[doc = r" Value to write to the register"]
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pub struct W {
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bits: u32,
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}
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impl super::MTDR {
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#[doc = r" Modifies the contents of the register"]
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#[inline]
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pub fn modify<F>(&self, f: F)
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where
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for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
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{
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let bits = self.register.get();
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let r = R { bits: bits };
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let mut w = W { bits: bits };
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f(&r, &mut w);
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self.register.set(w.bits);
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}
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#[doc = r" Reads the contents of the register"]
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#[inline]
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pub fn read(&self) -> R {
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R { bits: self.register.get() }
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}
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#[doc = r" Writes to the register"]
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#[inline]
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pub fn write<F>(&self, f: F)
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where
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F: FnOnce(&mut W) -> &mut W,
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{
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let mut w = W::reset_value();
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f(&mut w);
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self.register.set(w.bits);
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}
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#[doc = r" Writes the reset value to the register"]
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#[inline]
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pub fn reset(&self) {
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self.write(|w| w)
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#[doc = "Reader of register MTDR"]
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pub type R = crate::R<u32, super::MTDR>;
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#[doc = "Writer for register MTDR"]
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pub type W = crate::W<u32, super::MTDR>;
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#[doc = "Register MTDR `reset()`'s with value 0"]
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impl crate::ResetValue for super::MTDR {
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type Type = u32;
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#[inline(always)]
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fn reset_value() -> Self::Type {
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0
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}
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}
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#[doc = r" Proxy"]
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pub struct _DATAW<'a> {
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#[doc = "Write proxy for field `DATA`"]
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pub struct DATA_W<'a> {
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w: &'a mut W,
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}
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impl<'a> _DATAW<'a> {
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#[doc = r" Writes raw bits to the field"]
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#[inline]
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impl<'a> DATA_W<'a> {
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub unsafe fn bits(self, value: u8) -> &'a mut W {
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const MASK: u8 = 255;
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const OFFSET: u8 = 0;
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self.w.bits &= !((MASK as u32) << OFFSET);
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self.w.bits |= ((value & MASK) as u32) << OFFSET;
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self.w.bits = (self.w.bits & !0xff) | ((value as u32) & 0xff);
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self.w
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}
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}
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#[doc = "Values that can be written to the field `CMD`"]
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pub enum CMDW {
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#[doc = "Transmit DATA\\[7:0\\]."]
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_000,
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#[doc = "Receive (DATA\\[7:0\\] + 1) bytes."]
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_001,
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#[doc = "Generate STOP condition."]
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_010,
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#[doc = "Receive and discard (DATA\\[7:0\\] + 1) bytes."]
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_011,
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#[doc = "Generate (repeated) START and transmit address in DATA\\[7:0\\]."]
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_100,
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#[doc = "Generate (repeated) START and transmit address in DATA\\[7:0\\]. This transfer expects a NACK to be returned."]
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_101,
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#[doc = "Generate (repeated) START and transmit address in DATA\\[7:0\\] using high speed mode."]
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_110,
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#[doc = "Generate (repeated) START and transmit address in DATA\\[7:0\\] using high speed mode. This transfer expects a NACK to be returned."]
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_111,
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#[doc = "Command Data\n\nValue on reset: 0"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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#[repr(u8)]
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pub enum CMD_AW {
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#[doc = "0: Transmit DATA\\[7:0\\]."]
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_000 = 0,
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#[doc = "1: Receive (DATA\\[7:0\\]
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+ 1) bytes."]
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_001 = 1,
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#[doc = "2: Generate STOP condition."]
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_010 = 2,
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#[doc = "3: Receive and discard (DATA\\[7:0\\]
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+ 1) bytes."]
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_011 = 3,
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#[doc = "4: Generate (repeated) START and transmit address in DATA\\[7:0\\]."]
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_100 = 4,
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#[doc = "5: Generate (repeated) START and transmit address in DATA\\[7:0\\]. This transfer expects a NACK to be returned."]
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_101 = 5,
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#[doc = "6: Generate (repeated) START and transmit address in DATA\\[7:0\\]
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using high speed mode."]
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_110 = 6,
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#[doc = "7: Generate (repeated) START and transmit address in DATA\\[7:0\\]
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using high speed mode. This transfer expects a NACK to be returned."]
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_111 = 7,
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}
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impl CMDW {
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#[allow(missing_docs)]
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#[doc(hidden)]
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#[inline]
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pub fn _bits(&self) -> u8 {
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match *self {
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CMDW::_000 => 0,
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CMDW::_001 => 1,
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CMDW::_010 => 2,
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CMDW::_011 => 3,
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CMDW::_100 => 4,
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CMDW::_101 => 5,
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CMDW::_110 => 6,
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CMDW::_111 => 7,
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}
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impl From<CMD_AW> for u8 {
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#[inline(always)]
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fn from(variant: CMD_AW) -> Self {
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variant as _
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}
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}
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#[doc = r" Proxy"]
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pub struct _CMDW<'a> {
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#[doc = "Write proxy for field `CMD`"]
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pub struct CMD_W<'a> {
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w: &'a mut W,
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}
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impl<'a> _CMDW<'a> {
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#[doc = r" Writes `variant` to the field"]
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#[inline]
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pub fn variant(self, variant: CMDW) -> &'a mut W {
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impl<'a> CMD_W<'a> {
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#[doc = r"Writes `variant` to the field"]
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#[inline(always)]
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pub fn variant(self, variant: CMD_AW) -> &'a mut W {
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{
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self.bits(variant._bits())
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self.bits(variant.into())
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}
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}
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#[doc = "Transmit DATA\\[7:0\\]."]
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#[inline]
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#[inline(always)]
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pub fn _000(self) -> &'a mut W {
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self.variant(CMDW::_000)
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self.variant(CMD_AW::_000)
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}
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#[doc = "Receive (DATA\\[7:0\\] + 1) bytes."]
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#[inline]
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#[doc = "Receive (DATA\\[7:0\\]
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+ 1) bytes."]
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#[inline(always)]
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pub fn _001(self) -> &'a mut W {
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self.variant(CMDW::_001)
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self.variant(CMD_AW::_001)
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}
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#[doc = "Generate STOP condition."]
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#[inline]
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#[inline(always)]
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pub fn _010(self) -> &'a mut W {
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self.variant(CMDW::_010)
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self.variant(CMD_AW::_010)
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}
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#[doc = "Receive and discard (DATA\\[7:0\\] + 1) bytes."]
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#[inline]
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#[doc = "Receive and discard (DATA\\[7:0\\]
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+ 1) bytes."]
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#[inline(always)]
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pub fn _011(self) -> &'a mut W {
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self.variant(CMDW::_011)
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self.variant(CMD_AW::_011)
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}
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#[doc = "Generate (repeated) START and transmit address in DATA\\[7:0\\]."]
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#[inline]
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#[inline(always)]
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pub fn _100(self) -> &'a mut W {
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self.variant(CMDW::_100)
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self.variant(CMD_AW::_100)
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}
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#[doc = "Generate (repeated) START and transmit address in DATA\\[7:0\\]. This transfer expects a NACK to be returned."]
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#[inline]
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#[inline(always)]
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pub fn _101(self) -> &'a mut W {
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self.variant(CMDW::_101)
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self.variant(CMD_AW::_101)
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}
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#[doc = "Generate (repeated) START and transmit address in DATA\\[7:0\\] using high speed mode."]
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#[inline]
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#[doc = "Generate (repeated) START and transmit address in DATA\\[7:0\\]
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using high speed mode."]
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#[inline(always)]
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pub fn _110(self) -> &'a mut W {
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self.variant(CMDW::_110)
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self.variant(CMD_AW::_110)
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}
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#[doc = "Generate (repeated) START and transmit address in DATA\\[7:0\\] using high speed mode. This transfer expects a NACK to be returned."]
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#[inline]
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#[doc = "Generate (repeated) START and transmit address in DATA\\[7:0\\]
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using high speed mode. This transfer expects a NACK to be returned."]
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#[inline(always)]
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pub fn _111(self) -> &'a mut W {
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self.variant(CMDW::_111)
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self.variant(CMD_AW::_111)
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}
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#[doc = r" Writes raw bits to the field"]
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#[inline]
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bits(self, value: u8) -> &'a mut W {
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const MASK: u8 = 7;
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const OFFSET: u8 = 8;
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self.w.bits &= !((MASK as u32) << OFFSET);
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self.w.bits |= ((value & MASK) as u32) << OFFSET;
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self.w.bits = (self.w.bits & !(0x07 << 8)) | (((value as u32) & 0x07) << 8);
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self.w
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}
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}
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impl R {
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#[doc = r" Value of the register as raw bits"]
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#[inline]
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pub fn bits(&self) -> u32 {
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self.bits
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}
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}
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impl R {}
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impl W {
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#[doc = r" Reset value of the register"]
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#[inline]
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pub fn reset_value() -> W {
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W { bits: 0 }
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}
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#[doc = r" Writes raw bits to the register"]
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#[inline]
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pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
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self.bits = bits;
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self
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}
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#[doc = "Bits 0:7 - Transmit Data"]
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#[inline]
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pub fn data(&mut self) -> _DATAW {
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_DATAW { w: self }
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#[inline(always)]
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pub fn data(&mut self) -> DATA_W {
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DATA_W { w: self }
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}
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#[doc = "Bits 8:10 - Command Data"]
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#[inline]
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pub fn cmd(&mut self) -> _CMDW {
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_CMDW { w: self }
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#[inline(always)]
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pub fn cmd(&mut self) -> CMD_W {
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CMD_W { w: self }
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}
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}
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