s32k118: rewrite everything for s32k118
Signed-off-by: Sean Cross <sean@xobs.io>
This commit is contained in:
1557
src/ftm1/c0sc.rs
1557
src/ftm1/c0sc.rs
File diff suppressed because it is too large
Load Diff
143
src/ftm1/c0v.rs
143
src/ftm1/c0v.rs
@ -1,103 +1,40 @@
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#[doc = r" Value read from the register"]
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pub struct R {
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bits: u32,
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}
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#[doc = r" Value to write to the register"]
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pub struct W {
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bits: u32,
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}
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impl super::C0V {
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#[doc = r" Modifies the contents of the register"]
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#[inline]
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pub fn modify<F>(&self, f: F)
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where
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for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
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{
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let bits = self.register.get();
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let r = R { bits: bits };
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let mut w = W { bits: bits };
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f(&r, &mut w);
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self.register.set(w.bits);
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}
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#[doc = r" Reads the contents of the register"]
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#[inline]
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pub fn read(&self) -> R {
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R { bits: self.register.get() }
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}
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#[doc = r" Writes to the register"]
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#[inline]
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pub fn write<F>(&self, f: F)
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where
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F: FnOnce(&mut W) -> &mut W,
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{
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let mut w = W::reset_value();
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f(&mut w);
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self.register.set(w.bits);
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}
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#[doc = r" Writes the reset value to the register"]
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#[inline]
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pub fn reset(&self) {
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self.write(|w| w)
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}
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}
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#[doc = r" Value of the field"]
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pub struct VALR {
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bits: u16,
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}
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impl VALR {
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#[doc = r" Value of the field as raw bits"]
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#[inline]
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pub fn bits(&self) -> u16 {
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self.bits
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}
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}
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#[doc = r" Proxy"]
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pub struct _VALW<'a> {
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w: &'a mut W,
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}
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impl<'a> _VALW<'a> {
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#[doc = r" Writes raw bits to the field"]
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#[inline]
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pub unsafe fn bits(self, value: u16) -> &'a mut W {
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const MASK: u16 = 65535;
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const OFFSET: u8 = 0;
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self.w.bits &= !((MASK as u32) << OFFSET);
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self.w.bits |= ((value & MASK) as u32) << OFFSET;
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self.w
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}
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}
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impl R {
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#[doc = r" Value of the register as raw bits"]
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#[inline]
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pub fn bits(&self) -> u32 {
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self.bits
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}
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#[doc = "Bits 0:15 - Channel Value"]
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#[inline]
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pub fn val(&self) -> VALR {
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let bits = {
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const MASK: u16 = 65535;
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const OFFSET: u8 = 0;
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((self.bits >> OFFSET) & MASK as u32) as u16
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};
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VALR { bits }
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}
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}
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impl W {
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#[doc = r" Reset value of the register"]
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#[inline]
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pub fn reset_value() -> W {
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W { bits: 0 }
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}
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#[doc = r" Writes raw bits to the register"]
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#[inline]
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pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
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self.bits = bits;
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self
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}
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#[doc = "Bits 0:15 - Channel Value"]
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#[inline]
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pub fn val(&mut self) -> _VALW {
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_VALW { w: self }
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}
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}
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#[doc = "Reader of register C0V"]
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pub type R = crate::R<u32, super::C0V>;
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#[doc = "Writer for register C0V"]
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pub type W = crate::W<u32, super::C0V>;
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#[doc = "Register C0V `reset()`'s with value 0"]
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impl crate::ResetValue for super::C0V {
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type Type = u32;
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#[inline(always)]
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fn reset_value() -> Self::Type {
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0
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}
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}
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#[doc = "Reader of field `VAL`"]
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pub type VAL_R = crate::R<u16, u16>;
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#[doc = "Write proxy for field `VAL`"]
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pub struct VAL_W<'a> {
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w: &'a mut W,
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}
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impl<'a> VAL_W<'a> {
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub unsafe fn bits(self, value: u16) -> &'a mut W {
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self.w.bits = (self.w.bits & !0xffff) | ((value as u32) & 0xffff);
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self.w
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}
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}
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impl R {
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#[doc = "Bits 0:15 - Channel Value"]
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#[inline(always)]
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pub fn val(&self) -> VAL_R {
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VAL_R::new((self.bits & 0xffff) as u16)
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}
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}
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impl W {
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#[doc = "Bits 0:15 - Channel Value"]
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#[inline(always)]
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pub fn val(&mut self) -> VAL_W {
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VAL_W { w: self }
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}
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}
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|
64
src/ftm1/c0v_mirror.rs
Normal file
64
src/ftm1/c0v_mirror.rs
Normal file
@ -0,0 +1,64 @@
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#[doc = "Reader of register C0V_MIRROR"]
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pub type R = crate::R<u32, super::C0V_MIRROR>;
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#[doc = "Writer for register C0V_MIRROR"]
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pub type W = crate::W<u32, super::C0V_MIRROR>;
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#[doc = "Register C0V_MIRROR `reset()`'s with value 0"]
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impl crate::ResetValue for super::C0V_MIRROR {
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type Type = u32;
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#[inline(always)]
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fn reset_value() -> Self::Type {
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0
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}
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}
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#[doc = "Reader of field `FRACVAL`"]
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pub type FRACVAL_R = crate::R<u8, u8>;
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#[doc = "Write proxy for field `FRACVAL`"]
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pub struct FRACVAL_W<'a> {
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w: &'a mut W,
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}
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impl<'a> FRACVAL_W<'a> {
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub unsafe fn bits(self, value: u8) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x1f << 11)) | (((value as u32) & 0x1f) << 11);
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self.w
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}
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}
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#[doc = "Reader of field `VAL`"]
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pub type VAL_R = crate::R<u16, u16>;
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#[doc = "Write proxy for field `VAL`"]
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pub struct VAL_W<'a> {
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w: &'a mut W,
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}
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impl<'a> VAL_W<'a> {
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub unsafe fn bits(self, value: u16) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0xffff << 16)) | (((value as u32) & 0xffff) << 16);
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self.w
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}
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}
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impl R {
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#[doc = "Bits 11:15 - Channel (n) Match Fractional Value"]
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#[inline(always)]
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pub fn fracval(&self) -> FRACVAL_R {
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FRACVAL_R::new(((self.bits >> 11) & 0x1f) as u8)
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}
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#[doc = "Bits 16:31 - Mirror of the Channel (n) Match Integer Value"]
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#[inline(always)]
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pub fn val(&self) -> VAL_R {
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VAL_R::new(((self.bits >> 16) & 0xffff) as u16)
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}
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}
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impl W {
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#[doc = "Bits 11:15 - Channel (n) Match Fractional Value"]
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#[inline(always)]
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pub fn fracval(&mut self) -> FRACVAL_W {
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FRACVAL_W { w: self }
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}
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#[doc = "Bits 16:31 - Mirror of the Channel (n) Match Integer Value"]
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#[inline(always)]
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pub fn val(&mut self) -> VAL_W {
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VAL_W { w: self }
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}
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}
|
1557
src/ftm1/c1sc.rs
1557
src/ftm1/c1sc.rs
File diff suppressed because it is too large
Load Diff
143
src/ftm1/c1v.rs
143
src/ftm1/c1v.rs
@ -1,103 +1,40 @@
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#[doc = r" Value read from the register"]
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pub struct R {
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bits: u32,
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}
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#[doc = r" Value to write to the register"]
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pub struct W {
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bits: u32,
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}
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impl super::C1V {
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#[doc = r" Modifies the contents of the register"]
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#[inline]
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pub fn modify<F>(&self, f: F)
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where
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for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
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{
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let bits = self.register.get();
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let r = R { bits: bits };
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let mut w = W { bits: bits };
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f(&r, &mut w);
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self.register.set(w.bits);
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}
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#[doc = r" Reads the contents of the register"]
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#[inline]
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pub fn read(&self) -> R {
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R { bits: self.register.get() }
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}
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#[doc = r" Writes to the register"]
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#[inline]
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pub fn write<F>(&self, f: F)
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where
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F: FnOnce(&mut W) -> &mut W,
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{
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let mut w = W::reset_value();
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f(&mut w);
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self.register.set(w.bits);
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}
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#[doc = r" Writes the reset value to the register"]
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#[inline]
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pub fn reset(&self) {
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self.write(|w| w)
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}
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}
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#[doc = r" Value of the field"]
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pub struct VALR {
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bits: u16,
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}
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impl VALR {
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#[doc = r" Value of the field as raw bits"]
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#[inline]
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pub fn bits(&self) -> u16 {
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self.bits
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}
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}
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#[doc = r" Proxy"]
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pub struct _VALW<'a> {
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w: &'a mut W,
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}
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impl<'a> _VALW<'a> {
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#[doc = r" Writes raw bits to the field"]
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#[inline]
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pub unsafe fn bits(self, value: u16) -> &'a mut W {
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const MASK: u16 = 65535;
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const OFFSET: u8 = 0;
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self.w.bits &= !((MASK as u32) << OFFSET);
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self.w.bits |= ((value & MASK) as u32) << OFFSET;
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self.w
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}
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}
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impl R {
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#[doc = r" Value of the register as raw bits"]
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#[inline]
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pub fn bits(&self) -> u32 {
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self.bits
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}
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#[doc = "Bits 0:15 - Channel Value"]
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#[inline]
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pub fn val(&self) -> VALR {
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let bits = {
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const MASK: u16 = 65535;
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const OFFSET: u8 = 0;
|
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((self.bits >> OFFSET) & MASK as u32) as u16
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||||
};
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VALR { bits }
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}
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}
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impl W {
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#[doc = r" Reset value of the register"]
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#[inline]
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pub fn reset_value() -> W {
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W { bits: 0 }
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}
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#[doc = r" Writes raw bits to the register"]
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#[inline]
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pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
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self.bits = bits;
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self
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}
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#[doc = "Bits 0:15 - Channel Value"]
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#[inline]
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pub fn val(&mut self) -> _VALW {
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_VALW { w: self }
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}
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}
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#[doc = "Reader of register C1V"]
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pub type R = crate::R<u32, super::C1V>;
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#[doc = "Writer for register C1V"]
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pub type W = crate::W<u32, super::C1V>;
|
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#[doc = "Register C1V `reset()`'s with value 0"]
|
||||
impl crate::ResetValue for super::C1V {
|
||||
type Type = u32;
|
||||
#[inline(always)]
|
||||
fn reset_value() -> Self::Type {
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0
|
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}
|
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}
|
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#[doc = "Reader of field `VAL`"]
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pub type VAL_R = crate::R<u16, u16>;
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#[doc = "Write proxy for field `VAL`"]
|
||||
pub struct VAL_W<'a> {
|
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w: &'a mut W,
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||||
}
|
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impl<'a> VAL_W<'a> {
|
||||
#[doc = r"Writes raw bits to the field"]
|
||||
#[inline(always)]
|
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pub unsafe fn bits(self, value: u16) -> &'a mut W {
|
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self.w.bits = (self.w.bits & !0xffff) | ((value as u32) & 0xffff);
|
||||
self.w
|
||||
}
|
||||
}
|
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impl R {
|
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#[doc = "Bits 0:15 - Channel Value"]
|
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#[inline(always)]
|
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pub fn val(&self) -> VAL_R {
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VAL_R::new((self.bits & 0xffff) as u16)
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}
|
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}
|
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impl W {
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||||
#[doc = "Bits 0:15 - Channel Value"]
|
||||
#[inline(always)]
|
||||
pub fn val(&mut self) -> VAL_W {
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VAL_W { w: self }
|
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}
|
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}
|
||||
|
64
src/ftm1/c1v_mirror.rs
Normal file
64
src/ftm1/c1v_mirror.rs
Normal file
@ -0,0 +1,64 @@
|
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#[doc = "Reader of register C1V_MIRROR"]
|
||||
pub type R = crate::R<u32, super::C1V_MIRROR>;
|
||||
#[doc = "Writer for register C1V_MIRROR"]
|
||||
pub type W = crate::W<u32, super::C1V_MIRROR>;
|
||||
#[doc = "Register C1V_MIRROR `reset()`'s with value 0"]
|
||||
impl crate::ResetValue for super::C1V_MIRROR {
|
||||
type Type = u32;
|
||||
#[inline(always)]
|
||||
fn reset_value() -> Self::Type {
|
||||
0
|
||||
}
|
||||
}
|
||||
#[doc = "Reader of field `FRACVAL`"]
|
||||
pub type FRACVAL_R = crate::R<u8, u8>;
|
||||
#[doc = "Write proxy for field `FRACVAL`"]
|
||||
pub struct FRACVAL_W<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> FRACVAL_W<'a> {
|
||||
#[doc = r"Writes raw bits to the field"]
|
||||
#[inline(always)]
|
||||
pub unsafe fn bits(self, value: u8) -> &'a mut W {
|
||||
self.w.bits = (self.w.bits & !(0x1f << 11)) | (((value as u32) & 0x1f) << 11);
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = "Reader of field `VAL`"]
|
||||
pub type VAL_R = crate::R<u16, u16>;
|
||||
#[doc = "Write proxy for field `VAL`"]
|
||||
pub struct VAL_W<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> VAL_W<'a> {
|
||||
#[doc = r"Writes raw bits to the field"]
|
||||
#[inline(always)]
|
||||
pub unsafe fn bits(self, value: u16) -> &'a mut W {
|
||||
self.w.bits = (self.w.bits & !(0xffff << 16)) | (((value as u32) & 0xffff) << 16);
|
||||
self.w
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = "Bits 11:15 - Channel (n) Match Fractional Value"]
|
||||
#[inline(always)]
|
||||
pub fn fracval(&self) -> FRACVAL_R {
|
||||
FRACVAL_R::new(((self.bits >> 11) & 0x1f) as u8)
|
||||
}
|
||||
#[doc = "Bits 16:31 - Mirror of the Channel (n) Match Integer Value"]
|
||||
#[inline(always)]
|
||||
pub fn val(&self) -> VAL_R {
|
||||
VAL_R::new(((self.bits >> 16) & 0xffff) as u16)
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = "Bits 11:15 - Channel (n) Match Fractional Value"]
|
||||
#[inline(always)]
|
||||
pub fn fracval(&mut self) -> FRACVAL_W {
|
||||
FRACVAL_W { w: self }
|
||||
}
|
||||
#[doc = "Bits 16:31 - Mirror of the Channel (n) Match Integer Value"]
|
||||
#[inline(always)]
|
||||
pub fn val(&mut self) -> VAL_W {
|
||||
VAL_W { w: self }
|
||||
}
|
||||
}
|
1557
src/ftm1/c2sc.rs
1557
src/ftm1/c2sc.rs
File diff suppressed because it is too large
Load Diff
143
src/ftm1/c2v.rs
143
src/ftm1/c2v.rs
@ -1,103 +1,40 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::C2V {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
#[doc = r" Value of the field"]
|
||||
pub struct VALR {
|
||||
bits: u16,
|
||||
}
|
||||
impl VALR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u16 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _VALW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _VALW<'a> {
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(self, value: u16) -> &'a mut W {
|
||||
const MASK: u16 = 65535;
|
||||
const OFFSET: u8 = 0;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
#[doc = "Bits 0:15 - Channel Value"]
|
||||
#[inline]
|
||||
pub fn val(&self) -> VALR {
|
||||
let bits = {
|
||||
const MASK: u16 = 65535;
|
||||
const OFFSET: u8 = 0;
|
||||
((self.bits >> OFFSET) & MASK as u32) as u16
|
||||
};
|
||||
VALR { bits }
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 0 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
#[doc = "Bits 0:15 - Channel Value"]
|
||||
#[inline]
|
||||
pub fn val(&mut self) -> _VALW {
|
||||
_VALW { w: self }
|
||||
}
|
||||
}
|
||||
#[doc = "Reader of register C2V"]
|
||||
pub type R = crate::R<u32, super::C2V>;
|
||||
#[doc = "Writer for register C2V"]
|
||||
pub type W = crate::W<u32, super::C2V>;
|
||||
#[doc = "Register C2V `reset()`'s with value 0"]
|
||||
impl crate::ResetValue for super::C2V {
|
||||
type Type = u32;
|
||||
#[inline(always)]
|
||||
fn reset_value() -> Self::Type {
|
||||
0
|
||||
}
|
||||
}
|
||||
#[doc = "Reader of field `VAL`"]
|
||||
pub type VAL_R = crate::R<u16, u16>;
|
||||
#[doc = "Write proxy for field `VAL`"]
|
||||
pub struct VAL_W<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> VAL_W<'a> {
|
||||
#[doc = r"Writes raw bits to the field"]
|
||||
#[inline(always)]
|
||||
pub unsafe fn bits(self, value: u16) -> &'a mut W {
|
||||
self.w.bits = (self.w.bits & !0xffff) | ((value as u32) & 0xffff);
|
||||
self.w
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = "Bits 0:15 - Channel Value"]
|
||||
#[inline(always)]
|
||||
pub fn val(&self) -> VAL_R {
|
||||
VAL_R::new((self.bits & 0xffff) as u16)
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = "Bits 0:15 - Channel Value"]
|
||||
#[inline(always)]
|
||||
pub fn val(&mut self) -> VAL_W {
|
||||
VAL_W { w: self }
|
||||
}
|
||||
}
|
||||
|
64
src/ftm1/c2v_mirror.rs
Normal file
64
src/ftm1/c2v_mirror.rs
Normal file
@ -0,0 +1,64 @@
|
||||
#[doc = "Reader of register C2V_MIRROR"]
|
||||
pub type R = crate::R<u32, super::C2V_MIRROR>;
|
||||
#[doc = "Writer for register C2V_MIRROR"]
|
||||
pub type W = crate::W<u32, super::C2V_MIRROR>;
|
||||
#[doc = "Register C2V_MIRROR `reset()`'s with value 0"]
|
||||
impl crate::ResetValue for super::C2V_MIRROR {
|
||||
type Type = u32;
|
||||
#[inline(always)]
|
||||
fn reset_value() -> Self::Type {
|
||||
0
|
||||
}
|
||||
}
|
||||
#[doc = "Reader of field `FRACVAL`"]
|
||||
pub type FRACVAL_R = crate::R<u8, u8>;
|
||||
#[doc = "Write proxy for field `FRACVAL`"]
|
||||
pub struct FRACVAL_W<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> FRACVAL_W<'a> {
|
||||
#[doc = r"Writes raw bits to the field"]
|
||||
#[inline(always)]
|
||||
pub unsafe fn bits(self, value: u8) -> &'a mut W {
|
||||
self.w.bits = (self.w.bits & !(0x1f << 11)) | (((value as u32) & 0x1f) << 11);
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = "Reader of field `VAL`"]
|
||||
pub type VAL_R = crate::R<u16, u16>;
|
||||
#[doc = "Write proxy for field `VAL`"]
|
||||
pub struct VAL_W<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> VAL_W<'a> {
|
||||
#[doc = r"Writes raw bits to the field"]
|
||||
#[inline(always)]
|
||||
pub unsafe fn bits(self, value: u16) -> &'a mut W {
|
||||
self.w.bits = (self.w.bits & !(0xffff << 16)) | (((value as u32) & 0xffff) << 16);
|
||||
self.w
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = "Bits 11:15 - Channel (n) Match Fractional Value"]
|
||||
#[inline(always)]
|
||||
pub fn fracval(&self) -> FRACVAL_R {
|
||||
FRACVAL_R::new(((self.bits >> 11) & 0x1f) as u8)
|
||||
}
|
||||
#[doc = "Bits 16:31 - Mirror of the Channel (n) Match Integer Value"]
|
||||
#[inline(always)]
|
||||
pub fn val(&self) -> VAL_R {
|
||||
VAL_R::new(((self.bits >> 16) & 0xffff) as u16)
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = "Bits 11:15 - Channel (n) Match Fractional Value"]
|
||||
#[inline(always)]
|
||||
pub fn fracval(&mut self) -> FRACVAL_W {
|
||||
FRACVAL_W { w: self }
|
||||
}
|
||||
#[doc = "Bits 16:31 - Mirror of the Channel (n) Match Integer Value"]
|
||||
#[inline(always)]
|
||||
pub fn val(&mut self) -> VAL_W {
|
||||
VAL_W { w: self }
|
||||
}
|
||||
}
|
1557
src/ftm1/c3sc.rs
1557
src/ftm1/c3sc.rs
File diff suppressed because it is too large
Load Diff
143
src/ftm1/c3v.rs
143
src/ftm1/c3v.rs
@ -1,103 +1,40 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::C3V {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
#[doc = r" Value of the field"]
|
||||
pub struct VALR {
|
||||
bits: u16,
|
||||
}
|
||||
impl VALR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u16 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _VALW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _VALW<'a> {
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(self, value: u16) -> &'a mut W {
|
||||
const MASK: u16 = 65535;
|
||||
const OFFSET: u8 = 0;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
#[doc = "Bits 0:15 - Channel Value"]
|
||||
#[inline]
|
||||
pub fn val(&self) -> VALR {
|
||||
let bits = {
|
||||
const MASK: u16 = 65535;
|
||||
const OFFSET: u8 = 0;
|
||||
((self.bits >> OFFSET) & MASK as u32) as u16
|
||||
};
|
||||
VALR { bits }
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 0 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
#[doc = "Bits 0:15 - Channel Value"]
|
||||
#[inline]
|
||||
pub fn val(&mut self) -> _VALW {
|
||||
_VALW { w: self }
|
||||
}
|
||||
}
|
||||
#[doc = "Reader of register C3V"]
|
||||
pub type R = crate::R<u32, super::C3V>;
|
||||
#[doc = "Writer for register C3V"]
|
||||
pub type W = crate::W<u32, super::C3V>;
|
||||
#[doc = "Register C3V `reset()`'s with value 0"]
|
||||
impl crate::ResetValue for super::C3V {
|
||||
type Type = u32;
|
||||
#[inline(always)]
|
||||
fn reset_value() -> Self::Type {
|
||||
0
|
||||
}
|
||||
}
|
||||
#[doc = "Reader of field `VAL`"]
|
||||
pub type VAL_R = crate::R<u16, u16>;
|
||||
#[doc = "Write proxy for field `VAL`"]
|
||||
pub struct VAL_W<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> VAL_W<'a> {
|
||||
#[doc = r"Writes raw bits to the field"]
|
||||
#[inline(always)]
|
||||
pub unsafe fn bits(self, value: u16) -> &'a mut W {
|
||||
self.w.bits = (self.w.bits & !0xffff) | ((value as u32) & 0xffff);
|
||||
self.w
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = "Bits 0:15 - Channel Value"]
|
||||
#[inline(always)]
|
||||
pub fn val(&self) -> VAL_R {
|
||||
VAL_R::new((self.bits & 0xffff) as u16)
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = "Bits 0:15 - Channel Value"]
|
||||
#[inline(always)]
|
||||
pub fn val(&mut self) -> VAL_W {
|
||||
VAL_W { w: self }
|
||||
}
|
||||
}
|
||||
|
64
src/ftm1/c3v_mirror.rs
Normal file
64
src/ftm1/c3v_mirror.rs
Normal file
@ -0,0 +1,64 @@
|
||||
#[doc = "Reader of register C3V_MIRROR"]
|
||||
pub type R = crate::R<u32, super::C3V_MIRROR>;
|
||||
#[doc = "Writer for register C3V_MIRROR"]
|
||||
pub type W = crate::W<u32, super::C3V_MIRROR>;
|
||||
#[doc = "Register C3V_MIRROR `reset()`'s with value 0"]
|
||||
impl crate::ResetValue for super::C3V_MIRROR {
|
||||
type Type = u32;
|
||||
#[inline(always)]
|
||||
fn reset_value() -> Self::Type {
|
||||
0
|
||||
}
|
||||
}
|
||||
#[doc = "Reader of field `FRACVAL`"]
|
||||
pub type FRACVAL_R = crate::R<u8, u8>;
|
||||
#[doc = "Write proxy for field `FRACVAL`"]
|
||||
pub struct FRACVAL_W<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> FRACVAL_W<'a> {
|
||||
#[doc = r"Writes raw bits to the field"]
|
||||
#[inline(always)]
|
||||
pub unsafe fn bits(self, value: u8) -> &'a mut W {
|
||||
self.w.bits = (self.w.bits & !(0x1f << 11)) | (((value as u32) & 0x1f) << 11);
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = "Reader of field `VAL`"]
|
||||
pub type VAL_R = crate::R<u16, u16>;
|
||||
#[doc = "Write proxy for field `VAL`"]
|
||||
pub struct VAL_W<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> VAL_W<'a> {
|
||||
#[doc = r"Writes raw bits to the field"]
|
||||
#[inline(always)]
|
||||
pub unsafe fn bits(self, value: u16) -> &'a mut W {
|
||||
self.w.bits = (self.w.bits & !(0xffff << 16)) | (((value as u32) & 0xffff) << 16);
|
||||
self.w
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = "Bits 11:15 - Channel (n) Match Fractional Value"]
|
||||
#[inline(always)]
|
||||
pub fn fracval(&self) -> FRACVAL_R {
|
||||
FRACVAL_R::new(((self.bits >> 11) & 0x1f) as u8)
|
||||
}
|
||||
#[doc = "Bits 16:31 - Mirror of the Channel (n) Match Integer Value"]
|
||||
#[inline(always)]
|
||||
pub fn val(&self) -> VAL_R {
|
||||
VAL_R::new(((self.bits >> 16) & 0xffff) as u16)
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = "Bits 11:15 - Channel (n) Match Fractional Value"]
|
||||
#[inline(always)]
|
||||
pub fn fracval(&mut self) -> FRACVAL_W {
|
||||
FRACVAL_W { w: self }
|
||||
}
|
||||
#[doc = "Bits 16:31 - Mirror of the Channel (n) Match Integer Value"]
|
||||
#[inline(always)]
|
||||
pub fn val(&mut self) -> VAL_W {
|
||||
VAL_W { w: self }
|
||||
}
|
||||
}
|
1557
src/ftm1/c4sc.rs
1557
src/ftm1/c4sc.rs
File diff suppressed because it is too large
Load Diff
143
src/ftm1/c4v.rs
143
src/ftm1/c4v.rs
@ -1,103 +1,40 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::C4V {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
#[doc = r" Value of the field"]
|
||||
pub struct VALR {
|
||||
bits: u16,
|
||||
}
|
||||
impl VALR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u16 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _VALW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _VALW<'a> {
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(self, value: u16) -> &'a mut W {
|
||||
const MASK: u16 = 65535;
|
||||
const OFFSET: u8 = 0;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
#[doc = "Bits 0:15 - Channel Value"]
|
||||
#[inline]
|
||||
pub fn val(&self) -> VALR {
|
||||
let bits = {
|
||||
const MASK: u16 = 65535;
|
||||
const OFFSET: u8 = 0;
|
||||
((self.bits >> OFFSET) & MASK as u32) as u16
|
||||
};
|
||||
VALR { bits }
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 0 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
#[doc = "Bits 0:15 - Channel Value"]
|
||||
#[inline]
|
||||
pub fn val(&mut self) -> _VALW {
|
||||
_VALW { w: self }
|
||||
}
|
||||
}
|
||||
#[doc = "Reader of register C4V"]
|
||||
pub type R = crate::R<u32, super::C4V>;
|
||||
#[doc = "Writer for register C4V"]
|
||||
pub type W = crate::W<u32, super::C4V>;
|
||||
#[doc = "Register C4V `reset()`'s with value 0"]
|
||||
impl crate::ResetValue for super::C4V {
|
||||
type Type = u32;
|
||||
#[inline(always)]
|
||||
fn reset_value() -> Self::Type {
|
||||
0
|
||||
}
|
||||
}
|
||||
#[doc = "Reader of field `VAL`"]
|
||||
pub type VAL_R = crate::R<u16, u16>;
|
||||
#[doc = "Write proxy for field `VAL`"]
|
||||
pub struct VAL_W<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> VAL_W<'a> {
|
||||
#[doc = r"Writes raw bits to the field"]
|
||||
#[inline(always)]
|
||||
pub unsafe fn bits(self, value: u16) -> &'a mut W {
|
||||
self.w.bits = (self.w.bits & !0xffff) | ((value as u32) & 0xffff);
|
||||
self.w
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = "Bits 0:15 - Channel Value"]
|
||||
#[inline(always)]
|
||||
pub fn val(&self) -> VAL_R {
|
||||
VAL_R::new((self.bits & 0xffff) as u16)
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = "Bits 0:15 - Channel Value"]
|
||||
#[inline(always)]
|
||||
pub fn val(&mut self) -> VAL_W {
|
||||
VAL_W { w: self }
|
||||
}
|
||||
}
|
||||
|
64
src/ftm1/c4v_mirror.rs
Normal file
64
src/ftm1/c4v_mirror.rs
Normal file
@ -0,0 +1,64 @@
|
||||
#[doc = "Reader of register C4V_MIRROR"]
|
||||
pub type R = crate::R<u32, super::C4V_MIRROR>;
|
||||
#[doc = "Writer for register C4V_MIRROR"]
|
||||
pub type W = crate::W<u32, super::C4V_MIRROR>;
|
||||
#[doc = "Register C4V_MIRROR `reset()`'s with value 0"]
|
||||
impl crate::ResetValue for super::C4V_MIRROR {
|
||||
type Type = u32;
|
||||
#[inline(always)]
|
||||
fn reset_value() -> Self::Type {
|
||||
0
|
||||
}
|
||||
}
|
||||
#[doc = "Reader of field `FRACVAL`"]
|
||||
pub type FRACVAL_R = crate::R<u8, u8>;
|
||||
#[doc = "Write proxy for field `FRACVAL`"]
|
||||
pub struct FRACVAL_W<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> FRACVAL_W<'a> {
|
||||
#[doc = r"Writes raw bits to the field"]
|
||||
#[inline(always)]
|
||||
pub unsafe fn bits(self, value: u8) -> &'a mut W {
|
||||
self.w.bits = (self.w.bits & !(0x1f << 11)) | (((value as u32) & 0x1f) << 11);
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = "Reader of field `VAL`"]
|
||||
pub type VAL_R = crate::R<u16, u16>;
|
||||
#[doc = "Write proxy for field `VAL`"]
|
||||
pub struct VAL_W<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> VAL_W<'a> {
|
||||
#[doc = r"Writes raw bits to the field"]
|
||||
#[inline(always)]
|
||||
pub unsafe fn bits(self, value: u16) -> &'a mut W {
|
||||
self.w.bits = (self.w.bits & !(0xffff << 16)) | (((value as u32) & 0xffff) << 16);
|
||||
self.w
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = "Bits 11:15 - Channel (n) Match Fractional Value"]
|
||||
#[inline(always)]
|
||||
pub fn fracval(&self) -> FRACVAL_R {
|
||||
FRACVAL_R::new(((self.bits >> 11) & 0x1f) as u8)
|
||||
}
|
||||
#[doc = "Bits 16:31 - Mirror of the Channel (n) Match Integer Value"]
|
||||
#[inline(always)]
|
||||
pub fn val(&self) -> VAL_R {
|
||||
VAL_R::new(((self.bits >> 16) & 0xffff) as u16)
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = "Bits 11:15 - Channel (n) Match Fractional Value"]
|
||||
#[inline(always)]
|
||||
pub fn fracval(&mut self) -> FRACVAL_W {
|
||||
FRACVAL_W { w: self }
|
||||
}
|
||||
#[doc = "Bits 16:31 - Mirror of the Channel (n) Match Integer Value"]
|
||||
#[inline(always)]
|
||||
pub fn val(&mut self) -> VAL_W {
|
||||
VAL_W { w: self }
|
||||
}
|
||||
}
|
1557
src/ftm1/c5sc.rs
1557
src/ftm1/c5sc.rs
File diff suppressed because it is too large
Load Diff
143
src/ftm1/c5v.rs
143
src/ftm1/c5v.rs
@ -1,103 +1,40 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::C5V {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
#[doc = r" Value of the field"]
|
||||
pub struct VALR {
|
||||
bits: u16,
|
||||
}
|
||||
impl VALR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u16 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _VALW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _VALW<'a> {
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(self, value: u16) -> &'a mut W {
|
||||
const MASK: u16 = 65535;
|
||||
const OFFSET: u8 = 0;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
#[doc = "Bits 0:15 - Channel Value"]
|
||||
#[inline]
|
||||
pub fn val(&self) -> VALR {
|
||||
let bits = {
|
||||
const MASK: u16 = 65535;
|
||||
const OFFSET: u8 = 0;
|
||||
((self.bits >> OFFSET) & MASK as u32) as u16
|
||||
};
|
||||
VALR { bits }
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 0 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
#[doc = "Bits 0:15 - Channel Value"]
|
||||
#[inline]
|
||||
pub fn val(&mut self) -> _VALW {
|
||||
_VALW { w: self }
|
||||
}
|
||||
}
|
||||
#[doc = "Reader of register C5V"]
|
||||
pub type R = crate::R<u32, super::C5V>;
|
||||
#[doc = "Writer for register C5V"]
|
||||
pub type W = crate::W<u32, super::C5V>;
|
||||
#[doc = "Register C5V `reset()`'s with value 0"]
|
||||
impl crate::ResetValue for super::C5V {
|
||||
type Type = u32;
|
||||
#[inline(always)]
|
||||
fn reset_value() -> Self::Type {
|
||||
0
|
||||
}
|
||||
}
|
||||
#[doc = "Reader of field `VAL`"]
|
||||
pub type VAL_R = crate::R<u16, u16>;
|
||||
#[doc = "Write proxy for field `VAL`"]
|
||||
pub struct VAL_W<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> VAL_W<'a> {
|
||||
#[doc = r"Writes raw bits to the field"]
|
||||
#[inline(always)]
|
||||
pub unsafe fn bits(self, value: u16) -> &'a mut W {
|
||||
self.w.bits = (self.w.bits & !0xffff) | ((value as u32) & 0xffff);
|
||||
self.w
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = "Bits 0:15 - Channel Value"]
|
||||
#[inline(always)]
|
||||
pub fn val(&self) -> VAL_R {
|
||||
VAL_R::new((self.bits & 0xffff) as u16)
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = "Bits 0:15 - Channel Value"]
|
||||
#[inline(always)]
|
||||
pub fn val(&mut self) -> VAL_W {
|
||||
VAL_W { w: self }
|
||||
}
|
||||
}
|
||||
|
64
src/ftm1/c5v_mirror.rs
Normal file
64
src/ftm1/c5v_mirror.rs
Normal file
@ -0,0 +1,64 @@
|
||||
#[doc = "Reader of register C5V_MIRROR"]
|
||||
pub type R = crate::R<u32, super::C5V_MIRROR>;
|
||||
#[doc = "Writer for register C5V_MIRROR"]
|
||||
pub type W = crate::W<u32, super::C5V_MIRROR>;
|
||||
#[doc = "Register C5V_MIRROR `reset()`'s with value 0"]
|
||||
impl crate::ResetValue for super::C5V_MIRROR {
|
||||
type Type = u32;
|
||||
#[inline(always)]
|
||||
fn reset_value() -> Self::Type {
|
||||
0
|
||||
}
|
||||
}
|
||||
#[doc = "Reader of field `FRACVAL`"]
|
||||
pub type FRACVAL_R = crate::R<u8, u8>;
|
||||
#[doc = "Write proxy for field `FRACVAL`"]
|
||||
pub struct FRACVAL_W<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> FRACVAL_W<'a> {
|
||||
#[doc = r"Writes raw bits to the field"]
|
||||
#[inline(always)]
|
||||
pub unsafe fn bits(self, value: u8) -> &'a mut W {
|
||||
self.w.bits = (self.w.bits & !(0x1f << 11)) | (((value as u32) & 0x1f) << 11);
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = "Reader of field `VAL`"]
|
||||
pub type VAL_R = crate::R<u16, u16>;
|
||||
#[doc = "Write proxy for field `VAL`"]
|
||||
pub struct VAL_W<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> VAL_W<'a> {
|
||||
#[doc = r"Writes raw bits to the field"]
|
||||
#[inline(always)]
|
||||
pub unsafe fn bits(self, value: u16) -> &'a mut W {
|
||||
self.w.bits = (self.w.bits & !(0xffff << 16)) | (((value as u32) & 0xffff) << 16);
|
||||
self.w
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = "Bits 11:15 - Channel (n) Match Fractional Value"]
|
||||
#[inline(always)]
|
||||
pub fn fracval(&self) -> FRACVAL_R {
|
||||
FRACVAL_R::new(((self.bits >> 11) & 0x1f) as u8)
|
||||
}
|
||||
#[doc = "Bits 16:31 - Mirror of the Channel (n) Match Integer Value"]
|
||||
#[inline(always)]
|
||||
pub fn val(&self) -> VAL_R {
|
||||
VAL_R::new(((self.bits >> 16) & 0xffff) as u16)
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = "Bits 11:15 - Channel (n) Match Fractional Value"]
|
||||
#[inline(always)]
|
||||
pub fn fracval(&mut self) -> FRACVAL_W {
|
||||
FRACVAL_W { w: self }
|
||||
}
|
||||
#[doc = "Bits 16:31 - Mirror of the Channel (n) Match Integer Value"]
|
||||
#[inline(always)]
|
||||
pub fn val(&mut self) -> VAL_W {
|
||||
VAL_W { w: self }
|
||||
}
|
||||
}
|
1557
src/ftm1/c6sc.rs
1557
src/ftm1/c6sc.rs
File diff suppressed because it is too large
Load Diff
143
src/ftm1/c6v.rs
143
src/ftm1/c6v.rs
@ -1,103 +1,40 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::C6V {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
#[doc = r" Value of the field"]
|
||||
pub struct VALR {
|
||||
bits: u16,
|
||||
}
|
||||
impl VALR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u16 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _VALW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _VALW<'a> {
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(self, value: u16) -> &'a mut W {
|
||||
const MASK: u16 = 65535;
|
||||
const OFFSET: u8 = 0;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
#[doc = "Bits 0:15 - Channel Value"]
|
||||
#[inline]
|
||||
pub fn val(&self) -> VALR {
|
||||
let bits = {
|
||||
const MASK: u16 = 65535;
|
||||
const OFFSET: u8 = 0;
|
||||
((self.bits >> OFFSET) & MASK as u32) as u16
|
||||
};
|
||||
VALR { bits }
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 0 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
#[doc = "Bits 0:15 - Channel Value"]
|
||||
#[inline]
|
||||
pub fn val(&mut self) -> _VALW {
|
||||
_VALW { w: self }
|
||||
}
|
||||
}
|
||||
#[doc = "Reader of register C6V"]
|
||||
pub type R = crate::R<u32, super::C6V>;
|
||||
#[doc = "Writer for register C6V"]
|
||||
pub type W = crate::W<u32, super::C6V>;
|
||||
#[doc = "Register C6V `reset()`'s with value 0"]
|
||||
impl crate::ResetValue for super::C6V {
|
||||
type Type = u32;
|
||||
#[inline(always)]
|
||||
fn reset_value() -> Self::Type {
|
||||
0
|
||||
}
|
||||
}
|
||||
#[doc = "Reader of field `VAL`"]
|
||||
pub type VAL_R = crate::R<u16, u16>;
|
||||
#[doc = "Write proxy for field `VAL`"]
|
||||
pub struct VAL_W<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> VAL_W<'a> {
|
||||
#[doc = r"Writes raw bits to the field"]
|
||||
#[inline(always)]
|
||||
pub unsafe fn bits(self, value: u16) -> &'a mut W {
|
||||
self.w.bits = (self.w.bits & !0xffff) | ((value as u32) & 0xffff);
|
||||
self.w
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = "Bits 0:15 - Channel Value"]
|
||||
#[inline(always)]
|
||||
pub fn val(&self) -> VAL_R {
|
||||
VAL_R::new((self.bits & 0xffff) as u16)
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = "Bits 0:15 - Channel Value"]
|
||||
#[inline(always)]
|
||||
pub fn val(&mut self) -> VAL_W {
|
||||
VAL_W { w: self }
|
||||
}
|
||||
}
|
||||
|
64
src/ftm1/c6v_mirror.rs
Normal file
64
src/ftm1/c6v_mirror.rs
Normal file
@ -0,0 +1,64 @@
|
||||
#[doc = "Reader of register C6V_MIRROR"]
|
||||
pub type R = crate::R<u32, super::C6V_MIRROR>;
|
||||
#[doc = "Writer for register C6V_MIRROR"]
|
||||
pub type W = crate::W<u32, super::C6V_MIRROR>;
|
||||
#[doc = "Register C6V_MIRROR `reset()`'s with value 0"]
|
||||
impl crate::ResetValue for super::C6V_MIRROR {
|
||||
type Type = u32;
|
||||
#[inline(always)]
|
||||
fn reset_value() -> Self::Type {
|
||||
0
|
||||
}
|
||||
}
|
||||
#[doc = "Reader of field `FRACVAL`"]
|
||||
pub type FRACVAL_R = crate::R<u8, u8>;
|
||||
#[doc = "Write proxy for field `FRACVAL`"]
|
||||
pub struct FRACVAL_W<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> FRACVAL_W<'a> {
|
||||
#[doc = r"Writes raw bits to the field"]
|
||||
#[inline(always)]
|
||||
pub unsafe fn bits(self, value: u8) -> &'a mut W {
|
||||
self.w.bits = (self.w.bits & !(0x1f << 11)) | (((value as u32) & 0x1f) << 11);
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = "Reader of field `VAL`"]
|
||||
pub type VAL_R = crate::R<u16, u16>;
|
||||
#[doc = "Write proxy for field `VAL`"]
|
||||
pub struct VAL_W<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> VAL_W<'a> {
|
||||
#[doc = r"Writes raw bits to the field"]
|
||||
#[inline(always)]
|
||||
pub unsafe fn bits(self, value: u16) -> &'a mut W {
|
||||
self.w.bits = (self.w.bits & !(0xffff << 16)) | (((value as u32) & 0xffff) << 16);
|
||||
self.w
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = "Bits 11:15 - Channel (n) Match Fractional Value"]
|
||||
#[inline(always)]
|
||||
pub fn fracval(&self) -> FRACVAL_R {
|
||||
FRACVAL_R::new(((self.bits >> 11) & 0x1f) as u8)
|
||||
}
|
||||
#[doc = "Bits 16:31 - Mirror of the Channel (n) Match Integer Value"]
|
||||
#[inline(always)]
|
||||
pub fn val(&self) -> VAL_R {
|
||||
VAL_R::new(((self.bits >> 16) & 0xffff) as u16)
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = "Bits 11:15 - Channel (n) Match Fractional Value"]
|
||||
#[inline(always)]
|
||||
pub fn fracval(&mut self) -> FRACVAL_W {
|
||||
FRACVAL_W { w: self }
|
||||
}
|
||||
#[doc = "Bits 16:31 - Mirror of the Channel (n) Match Integer Value"]
|
||||
#[inline(always)]
|
||||
pub fn val(&mut self) -> VAL_W {
|
||||
VAL_W { w: self }
|
||||
}
|
||||
}
|
1557
src/ftm1/c7sc.rs
1557
src/ftm1/c7sc.rs
File diff suppressed because it is too large
Load Diff
143
src/ftm1/c7v.rs
143
src/ftm1/c7v.rs
@ -1,103 +1,40 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::C7V {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
#[doc = r" Value of the field"]
|
||||
pub struct VALR {
|
||||
bits: u16,
|
||||
}
|
||||
impl VALR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u16 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _VALW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _VALW<'a> {
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(self, value: u16) -> &'a mut W {
|
||||
const MASK: u16 = 65535;
|
||||
const OFFSET: u8 = 0;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
#[doc = "Bits 0:15 - Channel Value"]
|
||||
#[inline]
|
||||
pub fn val(&self) -> VALR {
|
||||
let bits = {
|
||||
const MASK: u16 = 65535;
|
||||
const OFFSET: u8 = 0;
|
||||
((self.bits >> OFFSET) & MASK as u32) as u16
|
||||
};
|
||||
VALR { bits }
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 0 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
#[doc = "Bits 0:15 - Channel Value"]
|
||||
#[inline]
|
||||
pub fn val(&mut self) -> _VALW {
|
||||
_VALW { w: self }
|
||||
}
|
||||
}
|
||||
#[doc = "Reader of register C7V"]
|
||||
pub type R = crate::R<u32, super::C7V>;
|
||||
#[doc = "Writer for register C7V"]
|
||||
pub type W = crate::W<u32, super::C7V>;
|
||||
#[doc = "Register C7V `reset()`'s with value 0"]
|
||||
impl crate::ResetValue for super::C7V {
|
||||
type Type = u32;
|
||||
#[inline(always)]
|
||||
fn reset_value() -> Self::Type {
|
||||
0
|
||||
}
|
||||
}
|
||||
#[doc = "Reader of field `VAL`"]
|
||||
pub type VAL_R = crate::R<u16, u16>;
|
||||
#[doc = "Write proxy for field `VAL`"]
|
||||
pub struct VAL_W<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> VAL_W<'a> {
|
||||
#[doc = r"Writes raw bits to the field"]
|
||||
#[inline(always)]
|
||||
pub unsafe fn bits(self, value: u16) -> &'a mut W {
|
||||
self.w.bits = (self.w.bits & !0xffff) | ((value as u32) & 0xffff);
|
||||
self.w
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = "Bits 0:15 - Channel Value"]
|
||||
#[inline(always)]
|
||||
pub fn val(&self) -> VAL_R {
|
||||
VAL_R::new((self.bits & 0xffff) as u16)
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = "Bits 0:15 - Channel Value"]
|
||||
#[inline(always)]
|
||||
pub fn val(&mut self) -> VAL_W {
|
||||
VAL_W { w: self }
|
||||
}
|
||||
}
|
||||
|
64
src/ftm1/c7v_mirror.rs
Normal file
64
src/ftm1/c7v_mirror.rs
Normal file
@ -0,0 +1,64 @@
|
||||
#[doc = "Reader of register C7V_MIRROR"]
|
||||
pub type R = crate::R<u32, super::C7V_MIRROR>;
|
||||
#[doc = "Writer for register C7V_MIRROR"]
|
||||
pub type W = crate::W<u32, super::C7V_MIRROR>;
|
||||
#[doc = "Register C7V_MIRROR `reset()`'s with value 0"]
|
||||
impl crate::ResetValue for super::C7V_MIRROR {
|
||||
type Type = u32;
|
||||
#[inline(always)]
|
||||
fn reset_value() -> Self::Type {
|
||||
0
|
||||
}
|
||||
}
|
||||
#[doc = "Reader of field `FRACVAL`"]
|
||||
pub type FRACVAL_R = crate::R<u8, u8>;
|
||||
#[doc = "Write proxy for field `FRACVAL`"]
|
||||
pub struct FRACVAL_W<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> FRACVAL_W<'a> {
|
||||
#[doc = r"Writes raw bits to the field"]
|
||||
#[inline(always)]
|
||||
pub unsafe fn bits(self, value: u8) -> &'a mut W {
|
||||
self.w.bits = (self.w.bits & !(0x1f << 11)) | (((value as u32) & 0x1f) << 11);
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = "Reader of field `VAL`"]
|
||||
pub type VAL_R = crate::R<u16, u16>;
|
||||
#[doc = "Write proxy for field `VAL`"]
|
||||
pub struct VAL_W<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> VAL_W<'a> {
|
||||
#[doc = r"Writes raw bits to the field"]
|
||||
#[inline(always)]
|
||||
pub unsafe fn bits(self, value: u16) -> &'a mut W {
|
||||
self.w.bits = (self.w.bits & !(0xffff << 16)) | (((value as u32) & 0xffff) << 16);
|
||||
self.w
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = "Bits 11:15 - Channel (n) Match Fractional Value"]
|
||||
#[inline(always)]
|
||||
pub fn fracval(&self) -> FRACVAL_R {
|
||||
FRACVAL_R::new(((self.bits >> 11) & 0x1f) as u8)
|
||||
}
|
||||
#[doc = "Bits 16:31 - Mirror of the Channel (n) Match Integer Value"]
|
||||
#[inline(always)]
|
||||
pub fn val(&self) -> VAL_R {
|
||||
VAL_R::new(((self.bits >> 16) & 0xffff) as u16)
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = "Bits 11:15 - Channel (n) Match Fractional Value"]
|
||||
#[inline(always)]
|
||||
pub fn fracval(&mut self) -> FRACVAL_W {
|
||||
FRACVAL_W { w: self }
|
||||
}
|
||||
#[doc = "Bits 16:31 - Mirror of the Channel (n) Match Integer Value"]
|
||||
#[inline(always)]
|
||||
pub fn val(&mut self) -> VAL_W {
|
||||
VAL_W { w: self }
|
||||
}
|
||||
}
|
143
src/ftm1/cnt.rs
143
src/ftm1/cnt.rs
@ -1,103 +1,40 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::CNT {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
#[doc = r" Value of the field"]
|
||||
pub struct COUNTR {
|
||||
bits: u16,
|
||||
}
|
||||
impl COUNTR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u16 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _COUNTW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _COUNTW<'a> {
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(self, value: u16) -> &'a mut W {
|
||||
const MASK: u16 = 65535;
|
||||
const OFFSET: u8 = 0;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
#[doc = "Bits 0:15 - Counter Value"]
|
||||
#[inline]
|
||||
pub fn count(&self) -> COUNTR {
|
||||
let bits = {
|
||||
const MASK: u16 = 65535;
|
||||
const OFFSET: u8 = 0;
|
||||
((self.bits >> OFFSET) & MASK as u32) as u16
|
||||
};
|
||||
COUNTR { bits }
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 0 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
#[doc = "Bits 0:15 - Counter Value"]
|
||||
#[inline]
|
||||
pub fn count(&mut self) -> _COUNTW {
|
||||
_COUNTW { w: self }
|
||||
}
|
||||
}
|
||||
#[doc = "Reader of register CNT"]
|
||||
pub type R = crate::R<u32, super::CNT>;
|
||||
#[doc = "Writer for register CNT"]
|
||||
pub type W = crate::W<u32, super::CNT>;
|
||||
#[doc = "Register CNT `reset()`'s with value 0"]
|
||||
impl crate::ResetValue for super::CNT {
|
||||
type Type = u32;
|
||||
#[inline(always)]
|
||||
fn reset_value() -> Self::Type {
|
||||
0
|
||||
}
|
||||
}
|
||||
#[doc = "Reader of field `COUNT`"]
|
||||
pub type COUNT_R = crate::R<u16, u16>;
|
||||
#[doc = "Write proxy for field `COUNT`"]
|
||||
pub struct COUNT_W<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> COUNT_W<'a> {
|
||||
#[doc = r"Writes raw bits to the field"]
|
||||
#[inline(always)]
|
||||
pub unsafe fn bits(self, value: u16) -> &'a mut W {
|
||||
self.w.bits = (self.w.bits & !0xffff) | ((value as u32) & 0xffff);
|
||||
self.w
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = "Bits 0:15 - Counter Value"]
|
||||
#[inline(always)]
|
||||
pub fn count(&self) -> COUNT_R {
|
||||
COUNT_R::new((self.bits & 0xffff) as u16)
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = "Bits 0:15 - Counter Value"]
|
||||
#[inline(always)]
|
||||
pub fn count(&mut self) -> COUNT_W {
|
||||
COUNT_W { w: self }
|
||||
}
|
||||
}
|
||||
|
@ -1,103 +1,40 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::CNTIN {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
#[doc = r" Value of the field"]
|
||||
pub struct INITR {
|
||||
bits: u16,
|
||||
}
|
||||
impl INITR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u16 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _INITW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _INITW<'a> {
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(self, value: u16) -> &'a mut W {
|
||||
const MASK: u16 = 65535;
|
||||
const OFFSET: u8 = 0;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
#[doc = "Bits 0:15 - INIT"]
|
||||
#[inline]
|
||||
pub fn init(&self) -> INITR {
|
||||
let bits = {
|
||||
const MASK: u16 = 65535;
|
||||
const OFFSET: u8 = 0;
|
||||
((self.bits >> OFFSET) & MASK as u32) as u16
|
||||
};
|
||||
INITR { bits }
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 0 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
#[doc = "Bits 0:15 - INIT"]
|
||||
#[inline]
|
||||
pub fn init(&mut self) -> _INITW {
|
||||
_INITW { w: self }
|
||||
}
|
||||
}
|
||||
#[doc = "Reader of register CNTIN"]
|
||||
pub type R = crate::R<u32, super::CNTIN>;
|
||||
#[doc = "Writer for register CNTIN"]
|
||||
pub type W = crate::W<u32, super::CNTIN>;
|
||||
#[doc = "Register CNTIN `reset()`'s with value 0"]
|
||||
impl crate::ResetValue for super::CNTIN {
|
||||
type Type = u32;
|
||||
#[inline(always)]
|
||||
fn reset_value() -> Self::Type {
|
||||
0
|
||||
}
|
||||
}
|
||||
#[doc = "Reader of field `INIT`"]
|
||||
pub type INIT_R = crate::R<u16, u16>;
|
||||
#[doc = "Write proxy for field `INIT`"]
|
||||
pub struct INIT_W<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> INIT_W<'a> {
|
||||
#[doc = r"Writes raw bits to the field"]
|
||||
#[inline(always)]
|
||||
pub unsafe fn bits(self, value: u16) -> &'a mut W {
|
||||
self.w.bits = (self.w.bits & !0xffff) | ((value as u32) & 0xffff);
|
||||
self.w
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = "Bits 0:15 - INIT"]
|
||||
#[inline(always)]
|
||||
pub fn init(&self) -> INIT_R {
|
||||
INIT_R::new((self.bits & 0xffff) as u16)
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = "Bits 0:15 - INIT"]
|
||||
#[inline(always)]
|
||||
pub fn init(&mut self) -> INIT_W {
|
||||
INIT_W { w: self }
|
||||
}
|
||||
}
|
||||
|
5274
src/ftm1/combine.rs
5274
src/ftm1/combine.rs
File diff suppressed because it is too large
Load Diff
598
src/ftm1/conf.rs
598
src/ftm1/conf.rs
@ -1,381 +1,217 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::CONF {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
#[doc = r" Value of the field"]
|
||||
pub struct LDFQR {
|
||||
bits: u8,
|
||||
}
|
||||
impl LDFQR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u8 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
#[doc = r" Value of the field"]
|
||||
pub struct BDMMODER {
|
||||
bits: u8,
|
||||
}
|
||||
impl BDMMODER {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u8 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
#[doc = r" Value of the field"]
|
||||
pub struct GTBEENR {
|
||||
bits: bool,
|
||||
}
|
||||
impl GTBEENR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
self.bits
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
}
|
||||
#[doc = r" Value of the field"]
|
||||
pub struct GTBEOUTR {
|
||||
bits: bool,
|
||||
}
|
||||
impl GTBEOUTR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
self.bits
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `ITRIGR`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ITRIGRR {
|
||||
#[doc = "Initialization trigger is generated on counter wrap events."]
|
||||
_0,
|
||||
#[doc = "Initialization trigger is generated when a reload point is reached."]
|
||||
_1,
|
||||
}
|
||||
impl ITRIGRR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
match *self {
|
||||
ITRIGRR::_0 => false,
|
||||
ITRIGRR::_1 => true,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: bool) -> ITRIGRR {
|
||||
match value {
|
||||
false => ITRIGRR::_0,
|
||||
true => ITRIGRR::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == ITRIGRR::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == ITRIGRR::_1
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _LDFQW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _LDFQW<'a> {
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(self, value: u8) -> &'a mut W {
|
||||
const MASK: u8 = 31;
|
||||
const OFFSET: u8 = 0;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _BDMMODEW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _BDMMODEW<'a> {
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(self, value: u8) -> &'a mut W {
|
||||
const MASK: u8 = 3;
|
||||
const OFFSET: u8 = 6;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _GTBEENW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _GTBEENW<'a> {
|
||||
#[doc = r" Sets the field bit"]
|
||||
pub fn set_bit(self) -> &'a mut W {
|
||||
self.bit(true)
|
||||
}
|
||||
#[doc = r" Clears the field bit"]
|
||||
pub fn clear_bit(self) -> &'a mut W {
|
||||
self.bit(false)
|
||||
}
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub fn bit(self, value: bool) -> &'a mut W {
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 9;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _GTBEOUTW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _GTBEOUTW<'a> {
|
||||
#[doc = r" Sets the field bit"]
|
||||
pub fn set_bit(self) -> &'a mut W {
|
||||
self.bit(true)
|
||||
}
|
||||
#[doc = r" Clears the field bit"]
|
||||
pub fn clear_bit(self) -> &'a mut W {
|
||||
self.bit(false)
|
||||
}
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub fn bit(self, value: bool) -> &'a mut W {
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 10;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = "Values that can be written to the field `ITRIGR`"]
|
||||
pub enum ITRIGRW {
|
||||
#[doc = "Initialization trigger is generated on counter wrap events."]
|
||||
_0,
|
||||
#[doc = "Initialization trigger is generated when a reload point is reached."]
|
||||
_1,
|
||||
}
|
||||
impl ITRIGRW {
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _bits(&self) -> bool {
|
||||
match *self {
|
||||
ITRIGRW::_0 => false,
|
||||
ITRIGRW::_1 => true,
|
||||
}
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _ITRIGRW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _ITRIGRW<'a> {
|
||||
#[doc = r" Writes `variant` to the field"]
|
||||
#[inline]
|
||||
pub fn variant(self, variant: ITRIGRW) -> &'a mut W {
|
||||
{
|
||||
self.bit(variant._bits())
|
||||
}
|
||||
}
|
||||
#[doc = "Initialization trigger is generated on counter wrap events."]
|
||||
#[inline]
|
||||
pub fn _0(self) -> &'a mut W {
|
||||
self.variant(ITRIGRW::_0)
|
||||
}
|
||||
#[doc = "Initialization trigger is generated when a reload point is reached."]
|
||||
#[inline]
|
||||
pub fn _1(self) -> &'a mut W {
|
||||
self.variant(ITRIGRW::_1)
|
||||
}
|
||||
#[doc = r" Sets the field bit"]
|
||||
pub fn set_bit(self) -> &'a mut W {
|
||||
self.bit(true)
|
||||
}
|
||||
#[doc = r" Clears the field bit"]
|
||||
pub fn clear_bit(self) -> &'a mut W {
|
||||
self.bit(false)
|
||||
}
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub fn bit(self, value: bool) -> &'a mut W {
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 11;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
#[doc = "Bits 0:4 - Frequency of the Reload Opportunities"]
|
||||
#[inline]
|
||||
pub fn ldfq(&self) -> LDFQR {
|
||||
let bits = {
|
||||
const MASK: u8 = 31;
|
||||
const OFFSET: u8 = 0;
|
||||
((self.bits >> OFFSET) & MASK as u32) as u8
|
||||
};
|
||||
LDFQR { bits }
|
||||
}
|
||||
#[doc = "Bits 6:7 - Debug Mode"]
|
||||
#[inline]
|
||||
pub fn bdmmode(&self) -> BDMMODER {
|
||||
let bits = {
|
||||
const MASK: u8 = 3;
|
||||
const OFFSET: u8 = 6;
|
||||
((self.bits >> OFFSET) & MASK as u32) as u8
|
||||
};
|
||||
BDMMODER { bits }
|
||||
}
|
||||
#[doc = "Bit 9 - Global Time Base Enable"]
|
||||
#[inline]
|
||||
pub fn gtbeen(&self) -> GTBEENR {
|
||||
let bits = {
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 9;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
};
|
||||
GTBEENR { bits }
|
||||
}
|
||||
#[doc = "Bit 10 - Global Time Base Output"]
|
||||
#[inline]
|
||||
pub fn gtbeout(&self) -> GTBEOUTR {
|
||||
let bits = {
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 10;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
};
|
||||
GTBEOUTR { bits }
|
||||
}
|
||||
#[doc = "Bit 11 - Initialization trigger on Reload Point"]
|
||||
#[inline]
|
||||
pub fn itrigr(&self) -> ITRIGRR {
|
||||
ITRIGRR::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 11;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 0 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
#[doc = "Bits 0:4 - Frequency of the Reload Opportunities"]
|
||||
#[inline]
|
||||
pub fn ldfq(&mut self) -> _LDFQW {
|
||||
_LDFQW { w: self }
|
||||
}
|
||||
#[doc = "Bits 6:7 - Debug Mode"]
|
||||
#[inline]
|
||||
pub fn bdmmode(&mut self) -> _BDMMODEW {
|
||||
_BDMMODEW { w: self }
|
||||
}
|
||||
#[doc = "Bit 9 - Global Time Base Enable"]
|
||||
#[inline]
|
||||
pub fn gtbeen(&mut self) -> _GTBEENW {
|
||||
_GTBEENW { w: self }
|
||||
}
|
||||
#[doc = "Bit 10 - Global Time Base Output"]
|
||||
#[inline]
|
||||
pub fn gtbeout(&mut self) -> _GTBEOUTW {
|
||||
_GTBEOUTW { w: self }
|
||||
}
|
||||
#[doc = "Bit 11 - Initialization trigger on Reload Point"]
|
||||
#[inline]
|
||||
pub fn itrigr(&mut self) -> _ITRIGRW {
|
||||
_ITRIGRW { w: self }
|
||||
}
|
||||
}
|
||||
#[doc = "Reader of register CONF"]
|
||||
pub type R = crate::R<u32, super::CONF>;
|
||||
#[doc = "Writer for register CONF"]
|
||||
pub type W = crate::W<u32, super::CONF>;
|
||||
#[doc = "Register CONF `reset()`'s with value 0"]
|
||||
impl crate::ResetValue for super::CONF {
|
||||
type Type = u32;
|
||||
#[inline(always)]
|
||||
fn reset_value() -> Self::Type {
|
||||
0
|
||||
}
|
||||
}
|
||||
#[doc = "Reader of field `LDFQ`"]
|
||||
pub type LDFQ_R = crate::R<u8, u8>;
|
||||
#[doc = "Write proxy for field `LDFQ`"]
|
||||
pub struct LDFQ_W<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> LDFQ_W<'a> {
|
||||
#[doc = r"Writes raw bits to the field"]
|
||||
#[inline(always)]
|
||||
pub unsafe fn bits(self, value: u8) -> &'a mut W {
|
||||
self.w.bits = (self.w.bits & !0x1f) | ((value as u32) & 0x1f);
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = "Reader of field `BDMMODE`"]
|
||||
pub type BDMMODE_R = crate::R<u8, u8>;
|
||||
#[doc = "Write proxy for field `BDMMODE`"]
|
||||
pub struct BDMMODE_W<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> BDMMODE_W<'a> {
|
||||
#[doc = r"Writes raw bits to the field"]
|
||||
#[inline(always)]
|
||||
pub unsafe fn bits(self, value: u8) -> &'a mut W {
|
||||
self.w.bits = (self.w.bits & !(0x03 << 6)) | (((value as u32) & 0x03) << 6);
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = "Reader of field `GTBEEN`"]
|
||||
pub type GTBEEN_R = crate::R<bool, bool>;
|
||||
#[doc = "Write proxy for field `GTBEEN`"]
|
||||
pub struct GTBEEN_W<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> GTBEEN_W<'a> {
|
||||
#[doc = r"Sets the field bit"]
|
||||
#[inline(always)]
|
||||
pub fn set_bit(self) -> &'a mut W {
|
||||
self.bit(true)
|
||||
}
|
||||
#[doc = r"Clears the field bit"]
|
||||
#[inline(always)]
|
||||
pub fn clear_bit(self) -> &'a mut W {
|
||||
self.bit(false)
|
||||
}
|
||||
#[doc = r"Writes raw bits to the field"]
|
||||
#[inline(always)]
|
||||
pub fn bit(self, value: bool) -> &'a mut W {
|
||||
self.w.bits = (self.w.bits & !(0x01 << 9)) | (((value as u32) & 0x01) << 9);
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = "Reader of field `GTBEOUT`"]
|
||||
pub type GTBEOUT_R = crate::R<bool, bool>;
|
||||
#[doc = "Write proxy for field `GTBEOUT`"]
|
||||
pub struct GTBEOUT_W<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> GTBEOUT_W<'a> {
|
||||
#[doc = r"Sets the field bit"]
|
||||
#[inline(always)]
|
||||
pub fn set_bit(self) -> &'a mut W {
|
||||
self.bit(true)
|
||||
}
|
||||
#[doc = r"Clears the field bit"]
|
||||
#[inline(always)]
|
||||
pub fn clear_bit(self) -> &'a mut W {
|
||||
self.bit(false)
|
||||
}
|
||||
#[doc = r"Writes raw bits to the field"]
|
||||
#[inline(always)]
|
||||
pub fn bit(self, value: bool) -> &'a mut W {
|
||||
self.w.bits = (self.w.bits & !(0x01 << 10)) | (((value as u32) & 0x01) << 10);
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = "Initialization trigger on Reload Point\n\nValue on reset: 0"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ITRIGR_A {
|
||||
#[doc = "0: Initialization trigger is generated on counter wrap events."]
|
||||
_0 = 0,
|
||||
#[doc = "1: Initialization trigger is generated when a reload point is reached."]
|
||||
_1 = 1,
|
||||
}
|
||||
impl From<ITRIGR_A> for bool {
|
||||
#[inline(always)]
|
||||
fn from(variant: ITRIGR_A) -> Self {
|
||||
variant as u8 != 0
|
||||
}
|
||||
}
|
||||
#[doc = "Reader of field `ITRIGR`"]
|
||||
pub type ITRIGR_R = crate::R<bool, ITRIGR_A>;
|
||||
impl ITRIGR_R {
|
||||
#[doc = r"Get enumerated values variant"]
|
||||
#[inline(always)]
|
||||
pub fn variant(&self) -> ITRIGR_A {
|
||||
match self.bits {
|
||||
false => ITRIGR_A::_0,
|
||||
true => ITRIGR_A::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline(always)]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == ITRIGR_A::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline(always)]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == ITRIGR_A::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Write proxy for field `ITRIGR`"]
|
||||
pub struct ITRIGR_W<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> ITRIGR_W<'a> {
|
||||
#[doc = r"Writes `variant` to the field"]
|
||||
#[inline(always)]
|
||||
pub fn variant(self, variant: ITRIGR_A) -> &'a mut W {
|
||||
{
|
||||
self.bit(variant.into())
|
||||
}
|
||||
}
|
||||
#[doc = "Initialization trigger is generated on counter wrap events."]
|
||||
#[inline(always)]
|
||||
pub fn _0(self) -> &'a mut W {
|
||||
self.variant(ITRIGR_A::_0)
|
||||
}
|
||||
#[doc = "Initialization trigger is generated when a reload point is reached."]
|
||||
#[inline(always)]
|
||||
pub fn _1(self) -> &'a mut W {
|
||||
self.variant(ITRIGR_A::_1)
|
||||
}
|
||||
#[doc = r"Sets the field bit"]
|
||||
#[inline(always)]
|
||||
pub fn set_bit(self) -> &'a mut W {
|
||||
self.bit(true)
|
||||
}
|
||||
#[doc = r"Clears the field bit"]
|
||||
#[inline(always)]
|
||||
pub fn clear_bit(self) -> &'a mut W {
|
||||
self.bit(false)
|
||||
}
|
||||
#[doc = r"Writes raw bits to the field"]
|
||||
#[inline(always)]
|
||||
pub fn bit(self, value: bool) -> &'a mut W {
|
||||
self.w.bits = (self.w.bits & !(0x01 << 11)) | (((value as u32) & 0x01) << 11);
|
||||
self.w
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = "Bits 0:4 - Frequency of the Reload Opportunities"]
|
||||
#[inline(always)]
|
||||
pub fn ldfq(&self) -> LDFQ_R {
|
||||
LDFQ_R::new((self.bits & 0x1f) as u8)
|
||||
}
|
||||
#[doc = "Bits 6:7 - Debug Mode"]
|
||||
#[inline(always)]
|
||||
pub fn bdmmode(&self) -> BDMMODE_R {
|
||||
BDMMODE_R::new(((self.bits >> 6) & 0x03) as u8)
|
||||
}
|
||||
#[doc = "Bit 9 - Global Time Base Enable"]
|
||||
#[inline(always)]
|
||||
pub fn gtbeen(&self) -> GTBEEN_R {
|
||||
GTBEEN_R::new(((self.bits >> 9) & 0x01) != 0)
|
||||
}
|
||||
#[doc = "Bit 10 - Global Time Base Output"]
|
||||
#[inline(always)]
|
||||
pub fn gtbeout(&self) -> GTBEOUT_R {
|
||||
GTBEOUT_R::new(((self.bits >> 10) & 0x01) != 0)
|
||||
}
|
||||
#[doc = "Bit 11 - Initialization trigger on Reload Point"]
|
||||
#[inline(always)]
|
||||
pub fn itrigr(&self) -> ITRIGR_R {
|
||||
ITRIGR_R::new(((self.bits >> 11) & 0x01) != 0)
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = "Bits 0:4 - Frequency of the Reload Opportunities"]
|
||||
#[inline(always)]
|
||||
pub fn ldfq(&mut self) -> LDFQ_W {
|
||||
LDFQ_W { w: self }
|
||||
}
|
||||
#[doc = "Bits 6:7 - Debug Mode"]
|
||||
#[inline(always)]
|
||||
pub fn bdmmode(&mut self) -> BDMMODE_W {
|
||||
BDMMODE_W { w: self }
|
||||
}
|
||||
#[doc = "Bit 9 - Global Time Base Enable"]
|
||||
#[inline(always)]
|
||||
pub fn gtbeen(&mut self) -> GTBEEN_W {
|
||||
GTBEEN_W { w: self }
|
||||
}
|
||||
#[doc = "Bit 10 - Global Time Base Output"]
|
||||
#[inline(always)]
|
||||
pub fn gtbeout(&mut self) -> GTBEOUT_W {
|
||||
GTBEOUT_W { w: self }
|
||||
}
|
||||
#[doc = "Bit 11 - Initialization trigger on Reload Point"]
|
||||
#[inline(always)]
|
||||
pub fn itrigr(&mut self) -> ITRIGR_W {
|
||||
ITRIGR_W { w: self }
|
||||
}
|
||||
}
|
||||
|
@ -1,264 +1,153 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::DEADTIME {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
#[doc = r" Value of the field"]
|
||||
pub struct DTVALR {
|
||||
bits: u8,
|
||||
}
|
||||
impl DTVALR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u8 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `DTPS`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum DTPSR {
|
||||
#[doc = "Divide the FTM input clock by 1."]
|
||||
_0X,
|
||||
#[doc = "Divide the FTM input clock by 4."]
|
||||
_10,
|
||||
#[doc = "Divide the FTM input clock by 16."]
|
||||
_11,
|
||||
#[doc = r" Reserved"]
|
||||
_Reserved(u8),
|
||||
}
|
||||
impl DTPSR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u8 {
|
||||
match *self {
|
||||
DTPSR::_0X => 0,
|
||||
DTPSR::_10 => 2,
|
||||
DTPSR::_11 => 3,
|
||||
DTPSR::_Reserved(bits) => bits,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: u8) -> DTPSR {
|
||||
match value {
|
||||
0 => DTPSR::_0X,
|
||||
2 => DTPSR::_10,
|
||||
3 => DTPSR::_11,
|
||||
i => DTPSR::_Reserved(i),
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0X`"]
|
||||
#[inline]
|
||||
pub fn is_0x(&self) -> bool {
|
||||
*self == DTPSR::_0X
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_10`"]
|
||||
#[inline]
|
||||
pub fn is_10(&self) -> bool {
|
||||
*self == DTPSR::_10
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_11`"]
|
||||
#[inline]
|
||||
pub fn is_11(&self) -> bool {
|
||||
*self == DTPSR::_11
|
||||
}
|
||||
}
|
||||
#[doc = r" Value of the field"]
|
||||
pub struct DTVALEXR {
|
||||
bits: u8,
|
||||
}
|
||||
impl DTVALEXR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u8 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _DTVALW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _DTVALW<'a> {
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(self, value: u8) -> &'a mut W {
|
||||
const MASK: u8 = 63;
|
||||
const OFFSET: u8 = 0;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = "Values that can be written to the field `DTPS`"]
|
||||
pub enum DTPSW {
|
||||
#[doc = "Divide the FTM input clock by 1."]
|
||||
_0X,
|
||||
#[doc = "Divide the FTM input clock by 4."]
|
||||
_10,
|
||||
#[doc = "Divide the FTM input clock by 16."]
|
||||
_11,
|
||||
}
|
||||
impl DTPSW {
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _bits(&self) -> u8 {
|
||||
match *self {
|
||||
DTPSW::_0X => 0,
|
||||
DTPSW::_10 => 2,
|
||||
DTPSW::_11 => 3,
|
||||
}
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _DTPSW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _DTPSW<'a> {
|
||||
#[doc = r" Writes `variant` to the field"]
|
||||
#[inline]
|
||||
pub fn variant(self, variant: DTPSW) -> &'a mut W {
|
||||
unsafe { self.bits(variant._bits()) }
|
||||
}
|
||||
#[doc = "Divide the FTM input clock by 1."]
|
||||
#[inline]
|
||||
pub fn _0x(self) -> &'a mut W {
|
||||
self.variant(DTPSW::_0X)
|
||||
}
|
||||
#[doc = "Divide the FTM input clock by 4."]
|
||||
#[inline]
|
||||
pub fn _10(self) -> &'a mut W {
|
||||
self.variant(DTPSW::_10)
|
||||
}
|
||||
#[doc = "Divide the FTM input clock by 16."]
|
||||
#[inline]
|
||||
pub fn _11(self) -> &'a mut W {
|
||||
self.variant(DTPSW::_11)
|
||||
}
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(self, value: u8) -> &'a mut W {
|
||||
const MASK: u8 = 3;
|
||||
const OFFSET: u8 = 6;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _DTVALEXW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _DTVALEXW<'a> {
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(self, value: u8) -> &'a mut W {
|
||||
const MASK: u8 = 15;
|
||||
const OFFSET: u8 = 16;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
#[doc = "Bits 0:5 - Deadtime Value"]
|
||||
#[inline]
|
||||
pub fn dtval(&self) -> DTVALR {
|
||||
let bits = {
|
||||
const MASK: u8 = 63;
|
||||
const OFFSET: u8 = 0;
|
||||
((self.bits >> OFFSET) & MASK as u32) as u8
|
||||
};
|
||||
DTVALR { bits }
|
||||
}
|
||||
#[doc = "Bits 6:7 - Deadtime Prescaler Value"]
|
||||
#[inline]
|
||||
pub fn dtps(&self) -> DTPSR {
|
||||
DTPSR::_from({
|
||||
const MASK: u8 = 3;
|
||||
const OFFSET: u8 = 6;
|
||||
((self.bits >> OFFSET) & MASK as u32) as u8
|
||||
})
|
||||
}
|
||||
#[doc = "Bits 16:19 - Extended Deadtime Value"]
|
||||
#[inline]
|
||||
pub fn dtvalex(&self) -> DTVALEXR {
|
||||
let bits = {
|
||||
const MASK: u8 = 15;
|
||||
const OFFSET: u8 = 16;
|
||||
((self.bits >> OFFSET) & MASK as u32) as u8
|
||||
};
|
||||
DTVALEXR { bits }
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 0 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
#[doc = "Bits 0:5 - Deadtime Value"]
|
||||
#[inline]
|
||||
pub fn dtval(&mut self) -> _DTVALW {
|
||||
_DTVALW { w: self }
|
||||
}
|
||||
#[doc = "Bits 6:7 - Deadtime Prescaler Value"]
|
||||
#[inline]
|
||||
pub fn dtps(&mut self) -> _DTPSW {
|
||||
_DTPSW { w: self }
|
||||
}
|
||||
#[doc = "Bits 16:19 - Extended Deadtime Value"]
|
||||
#[inline]
|
||||
pub fn dtvalex(&mut self) -> _DTVALEXW {
|
||||
_DTVALEXW { w: self }
|
||||
}
|
||||
}
|
||||
#[doc = "Reader of register DEADTIME"]
|
||||
pub type R = crate::R<u32, super::DEADTIME>;
|
||||
#[doc = "Writer for register DEADTIME"]
|
||||
pub type W = crate::W<u32, super::DEADTIME>;
|
||||
#[doc = "Register DEADTIME `reset()`'s with value 0"]
|
||||
impl crate::ResetValue for super::DEADTIME {
|
||||
type Type = u32;
|
||||
#[inline(always)]
|
||||
fn reset_value() -> Self::Type {
|
||||
0
|
||||
}
|
||||
}
|
||||
#[doc = "Reader of field `DTVAL`"]
|
||||
pub type DTVAL_R = crate::R<u8, u8>;
|
||||
#[doc = "Write proxy for field `DTVAL`"]
|
||||
pub struct DTVAL_W<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> DTVAL_W<'a> {
|
||||
#[doc = r"Writes raw bits to the field"]
|
||||
#[inline(always)]
|
||||
pub unsafe fn bits(self, value: u8) -> &'a mut W {
|
||||
self.w.bits = (self.w.bits & !0x3f) | ((value as u32) & 0x3f);
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = "Deadtime Prescaler Value\n\nValue on reset: 0"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
#[repr(u8)]
|
||||
pub enum DTPS_A {
|
||||
#[doc = "0: Divide the FTM input clock by 1."]
|
||||
_0X = 0,
|
||||
#[doc = "2: Divide the FTM input clock by 4."]
|
||||
_10 = 2,
|
||||
#[doc = "3: Divide the FTM input clock by 16."]
|
||||
_11 = 3,
|
||||
}
|
||||
impl From<DTPS_A> for u8 {
|
||||
#[inline(always)]
|
||||
fn from(variant: DTPS_A) -> Self {
|
||||
variant as _
|
||||
}
|
||||
}
|
||||
#[doc = "Reader of field `DTPS`"]
|
||||
pub type DTPS_R = crate::R<u8, DTPS_A>;
|
||||
impl DTPS_R {
|
||||
#[doc = r"Get enumerated values variant"]
|
||||
#[inline(always)]
|
||||
pub fn variant(&self) -> crate::Variant<u8, DTPS_A> {
|
||||
use crate::Variant::*;
|
||||
match self.bits {
|
||||
0 => Val(DTPS_A::_0X),
|
||||
2 => Val(DTPS_A::_10),
|
||||
3 => Val(DTPS_A::_11),
|
||||
i => Res(i),
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0X`"]
|
||||
#[inline(always)]
|
||||
pub fn is_0x(&self) -> bool {
|
||||
*self == DTPS_A::_0X
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_10`"]
|
||||
#[inline(always)]
|
||||
pub fn is_10(&self) -> bool {
|
||||
*self == DTPS_A::_10
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_11`"]
|
||||
#[inline(always)]
|
||||
pub fn is_11(&self) -> bool {
|
||||
*self == DTPS_A::_11
|
||||
}
|
||||
}
|
||||
#[doc = "Write proxy for field `DTPS`"]
|
||||
pub struct DTPS_W<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> DTPS_W<'a> {
|
||||
#[doc = r"Writes `variant` to the field"]
|
||||
#[inline(always)]
|
||||
pub fn variant(self, variant: DTPS_A) -> &'a mut W {
|
||||
unsafe { self.bits(variant.into()) }
|
||||
}
|
||||
#[doc = "Divide the FTM input clock by 1."]
|
||||
#[inline(always)]
|
||||
pub fn _0x(self) -> &'a mut W {
|
||||
self.variant(DTPS_A::_0X)
|
||||
}
|
||||
#[doc = "Divide the FTM input clock by 4."]
|
||||
#[inline(always)]
|
||||
pub fn _10(self) -> &'a mut W {
|
||||
self.variant(DTPS_A::_10)
|
||||
}
|
||||
#[doc = "Divide the FTM input clock by 16."]
|
||||
#[inline(always)]
|
||||
pub fn _11(self) -> &'a mut W {
|
||||
self.variant(DTPS_A::_11)
|
||||
}
|
||||
#[doc = r"Writes raw bits to the field"]
|
||||
#[inline(always)]
|
||||
pub unsafe fn bits(self, value: u8) -> &'a mut W {
|
||||
self.w.bits = (self.w.bits & !(0x03 << 6)) | (((value as u32) & 0x03) << 6);
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = "Reader of field `DTVALEX`"]
|
||||
pub type DTVALEX_R = crate::R<u8, u8>;
|
||||
#[doc = "Write proxy for field `DTVALEX`"]
|
||||
pub struct DTVALEX_W<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> DTVALEX_W<'a> {
|
||||
#[doc = r"Writes raw bits to the field"]
|
||||
#[inline(always)]
|
||||
pub unsafe fn bits(self, value: u8) -> &'a mut W {
|
||||
self.w.bits = (self.w.bits & !(0x0f << 16)) | (((value as u32) & 0x0f) << 16);
|
||||
self.w
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = "Bits 0:5 - Deadtime Value"]
|
||||
#[inline(always)]
|
||||
pub fn dtval(&self) -> DTVAL_R {
|
||||
DTVAL_R::new((self.bits & 0x3f) as u8)
|
||||
}
|
||||
#[doc = "Bits 6:7 - Deadtime Prescaler Value"]
|
||||
#[inline(always)]
|
||||
pub fn dtps(&self) -> DTPS_R {
|
||||
DTPS_R::new(((self.bits >> 6) & 0x03) as u8)
|
||||
}
|
||||
#[doc = "Bits 16:19 - Extended Deadtime Value"]
|
||||
#[inline(always)]
|
||||
pub fn dtvalex(&self) -> DTVALEX_R {
|
||||
DTVALEX_R::new(((self.bits >> 16) & 0x0f) as u8)
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = "Bits 0:5 - Deadtime Value"]
|
||||
#[inline(always)]
|
||||
pub fn dtval(&mut self) -> DTVAL_W {
|
||||
DTVAL_W { w: self }
|
||||
}
|
||||
#[doc = "Bits 6:7 - Deadtime Prescaler Value"]
|
||||
#[inline(always)]
|
||||
pub fn dtps(&mut self) -> DTPS_W {
|
||||
DTPS_W { w: self }
|
||||
}
|
||||
#[doc = "Bits 16:19 - Extended Deadtime Value"]
|
||||
#[inline(always)]
|
||||
pub fn dtvalex(&mut self) -> DTVALEX_W {
|
||||
DTVALEX_W { w: self }
|
||||
}
|
||||
}
|
||||
|
2011
src/ftm1/exttrig.rs
2011
src/ftm1/exttrig.rs
File diff suppressed because it is too large
Load Diff
@ -1,226 +1,112 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::FILTER {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
#[doc = r" Value of the field"]
|
||||
pub struct CH0FVALR {
|
||||
bits: u8,
|
||||
}
|
||||
impl CH0FVALR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u8 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
#[doc = r" Value of the field"]
|
||||
pub struct CH1FVALR {
|
||||
bits: u8,
|
||||
}
|
||||
impl CH1FVALR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u8 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
#[doc = r" Value of the field"]
|
||||
pub struct CH2FVALR {
|
||||
bits: u8,
|
||||
}
|
||||
impl CH2FVALR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u8 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
#[doc = r" Value of the field"]
|
||||
pub struct CH3FVALR {
|
||||
bits: u8,
|
||||
}
|
||||
impl CH3FVALR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u8 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _CH0FVALW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _CH0FVALW<'a> {
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(self, value: u8) -> &'a mut W {
|
||||
const MASK: u8 = 15;
|
||||
const OFFSET: u8 = 0;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _CH1FVALW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _CH1FVALW<'a> {
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(self, value: u8) -> &'a mut W {
|
||||
const MASK: u8 = 15;
|
||||
const OFFSET: u8 = 4;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _CH2FVALW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _CH2FVALW<'a> {
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(self, value: u8) -> &'a mut W {
|
||||
const MASK: u8 = 15;
|
||||
const OFFSET: u8 = 8;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _CH3FVALW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _CH3FVALW<'a> {
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(self, value: u8) -> &'a mut W {
|
||||
const MASK: u8 = 15;
|
||||
const OFFSET: u8 = 12;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
#[doc = "Bits 0:3 - Channel 0 Input Filter"]
|
||||
#[inline]
|
||||
pub fn ch0fval(&self) -> CH0FVALR {
|
||||
let bits = {
|
||||
const MASK: u8 = 15;
|
||||
const OFFSET: u8 = 0;
|
||||
((self.bits >> OFFSET) & MASK as u32) as u8
|
||||
};
|
||||
CH0FVALR { bits }
|
||||
}
|
||||
#[doc = "Bits 4:7 - Channel 1 Input Filter"]
|
||||
#[inline]
|
||||
pub fn ch1fval(&self) -> CH1FVALR {
|
||||
let bits = {
|
||||
const MASK: u8 = 15;
|
||||
const OFFSET: u8 = 4;
|
||||
((self.bits >> OFFSET) & MASK as u32) as u8
|
||||
};
|
||||
CH1FVALR { bits }
|
||||
}
|
||||
#[doc = "Bits 8:11 - Channel 2 Input Filter"]
|
||||
#[inline]
|
||||
pub fn ch2fval(&self) -> CH2FVALR {
|
||||
let bits = {
|
||||
const MASK: u8 = 15;
|
||||
const OFFSET: u8 = 8;
|
||||
((self.bits >> OFFSET) & MASK as u32) as u8
|
||||
};
|
||||
CH2FVALR { bits }
|
||||
}
|
||||
#[doc = "Bits 12:15 - Channel 3 Input Filter"]
|
||||
#[inline]
|
||||
pub fn ch3fval(&self) -> CH3FVALR {
|
||||
let bits = {
|
||||
const MASK: u8 = 15;
|
||||
const OFFSET: u8 = 12;
|
||||
((self.bits >> OFFSET) & MASK as u32) as u8
|
||||
};
|
||||
CH3FVALR { bits }
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 0 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
#[doc = "Bits 0:3 - Channel 0 Input Filter"]
|
||||
#[inline]
|
||||
pub fn ch0fval(&mut self) -> _CH0FVALW {
|
||||
_CH0FVALW { w: self }
|
||||
}
|
||||
#[doc = "Bits 4:7 - Channel 1 Input Filter"]
|
||||
#[inline]
|
||||
pub fn ch1fval(&mut self) -> _CH1FVALW {
|
||||
_CH1FVALW { w: self }
|
||||
}
|
||||
#[doc = "Bits 8:11 - Channel 2 Input Filter"]
|
||||
#[inline]
|
||||
pub fn ch2fval(&mut self) -> _CH2FVALW {
|
||||
_CH2FVALW { w: self }
|
||||
}
|
||||
#[doc = "Bits 12:15 - Channel 3 Input Filter"]
|
||||
#[inline]
|
||||
pub fn ch3fval(&mut self) -> _CH3FVALW {
|
||||
_CH3FVALW { w: self }
|
||||
}
|
||||
}
|
||||
#[doc = "Reader of register FILTER"]
|
||||
pub type R = crate::R<u32, super::FILTER>;
|
||||
#[doc = "Writer for register FILTER"]
|
||||
pub type W = crate::W<u32, super::FILTER>;
|
||||
#[doc = "Register FILTER `reset()`'s with value 0"]
|
||||
impl crate::ResetValue for super::FILTER {
|
||||
type Type = u32;
|
||||
#[inline(always)]
|
||||
fn reset_value() -> Self::Type {
|
||||
0
|
||||
}
|
||||
}
|
||||
#[doc = "Reader of field `CH0FVAL`"]
|
||||
pub type CH0FVAL_R = crate::R<u8, u8>;
|
||||
#[doc = "Write proxy for field `CH0FVAL`"]
|
||||
pub struct CH0FVAL_W<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> CH0FVAL_W<'a> {
|
||||
#[doc = r"Writes raw bits to the field"]
|
||||
#[inline(always)]
|
||||
pub unsafe fn bits(self, value: u8) -> &'a mut W {
|
||||
self.w.bits = (self.w.bits & !0x0f) | ((value as u32) & 0x0f);
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = "Reader of field `CH1FVAL`"]
|
||||
pub type CH1FVAL_R = crate::R<u8, u8>;
|
||||
#[doc = "Write proxy for field `CH1FVAL`"]
|
||||
pub struct CH1FVAL_W<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> CH1FVAL_W<'a> {
|
||||
#[doc = r"Writes raw bits to the field"]
|
||||
#[inline(always)]
|
||||
pub unsafe fn bits(self, value: u8) -> &'a mut W {
|
||||
self.w.bits = (self.w.bits & !(0x0f << 4)) | (((value as u32) & 0x0f) << 4);
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = "Reader of field `CH2FVAL`"]
|
||||
pub type CH2FVAL_R = crate::R<u8, u8>;
|
||||
#[doc = "Write proxy for field `CH2FVAL`"]
|
||||
pub struct CH2FVAL_W<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> CH2FVAL_W<'a> {
|
||||
#[doc = r"Writes raw bits to the field"]
|
||||
#[inline(always)]
|
||||
pub unsafe fn bits(self, value: u8) -> &'a mut W {
|
||||
self.w.bits = (self.w.bits & !(0x0f << 8)) | (((value as u32) & 0x0f) << 8);
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = "Reader of field `CH3FVAL`"]
|
||||
pub type CH3FVAL_R = crate::R<u8, u8>;
|
||||
#[doc = "Write proxy for field `CH3FVAL`"]
|
||||
pub struct CH3FVAL_W<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> CH3FVAL_W<'a> {
|
||||
#[doc = r"Writes raw bits to the field"]
|
||||
#[inline(always)]
|
||||
pub unsafe fn bits(self, value: u8) -> &'a mut W {
|
||||
self.w.bits = (self.w.bits & !(0x0f << 12)) | (((value as u32) & 0x0f) << 12);
|
||||
self.w
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = "Bits 0:3 - Channel 0 Input Filter"]
|
||||
#[inline(always)]
|
||||
pub fn ch0fval(&self) -> CH0FVAL_R {
|
||||
CH0FVAL_R::new((self.bits & 0x0f) as u8)
|
||||
}
|
||||
#[doc = "Bits 4:7 - Channel 1 Input Filter"]
|
||||
#[inline(always)]
|
||||
pub fn ch1fval(&self) -> CH1FVAL_R {
|
||||
CH1FVAL_R::new(((self.bits >> 4) & 0x0f) as u8)
|
||||
}
|
||||
#[doc = "Bits 8:11 - Channel 2 Input Filter"]
|
||||
#[inline(always)]
|
||||
pub fn ch2fval(&self) -> CH2FVAL_R {
|
||||
CH2FVAL_R::new(((self.bits >> 8) & 0x0f) as u8)
|
||||
}
|
||||
#[doc = "Bits 12:15 - Channel 3 Input Filter"]
|
||||
#[inline(always)]
|
||||
pub fn ch3fval(&self) -> CH3FVAL_R {
|
||||
CH3FVAL_R::new(((self.bits >> 12) & 0x0f) as u8)
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = "Bits 0:3 - Channel 0 Input Filter"]
|
||||
#[inline(always)]
|
||||
pub fn ch0fval(&mut self) -> CH0FVAL_W {
|
||||
CH0FVAL_W { w: self }
|
||||
}
|
||||
#[doc = "Bits 4:7 - Channel 1 Input Filter"]
|
||||
#[inline(always)]
|
||||
pub fn ch1fval(&mut self) -> CH1FVAL_W {
|
||||
CH1FVAL_W { w: self }
|
||||
}
|
||||
#[doc = "Bits 8:11 - Channel 2 Input Filter"]
|
||||
#[inline(always)]
|
||||
pub fn ch2fval(&mut self) -> CH2FVAL_W {
|
||||
CH2FVAL_W { w: self }
|
||||
}
|
||||
#[doc = "Bits 12:15 - Channel 3 Input Filter"]
|
||||
#[inline(always)]
|
||||
pub fn ch3fval(&mut self) -> CH3FVAL_W {
|
||||
CH3FVAL_W { w: self }
|
||||
}
|
||||
}
|
||||
|
1979
src/ftm1/fltctrl.rs
1979
src/ftm1/fltctrl.rs
File diff suppressed because it is too large
Load Diff
@ -1,538 +1,356 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::FLTPOL {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `FLT0POL`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum FLT0POLR {
|
||||
#[doc = "The fault input polarity is active high. A 1 at the fault input indicates a fault."]
|
||||
_0,
|
||||
#[doc = "The fault input polarity is active low. A 0 at the fault input indicates a fault."]
|
||||
_1,
|
||||
}
|
||||
impl FLT0POLR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
match *self {
|
||||
FLT0POLR::_0 => false,
|
||||
FLT0POLR::_1 => true,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: bool) -> FLT0POLR {
|
||||
match value {
|
||||
false => FLT0POLR::_0,
|
||||
true => FLT0POLR::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == FLT0POLR::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == FLT0POLR::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `FLT1POL`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum FLT1POLR {
|
||||
#[doc = "The fault input polarity is active high. A 1 at the fault input indicates a fault."]
|
||||
_0,
|
||||
#[doc = "The fault input polarity is active low. A 0 at the fault input indicates a fault."]
|
||||
_1,
|
||||
}
|
||||
impl FLT1POLR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
match *self {
|
||||
FLT1POLR::_0 => false,
|
||||
FLT1POLR::_1 => true,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: bool) -> FLT1POLR {
|
||||
match value {
|
||||
false => FLT1POLR::_0,
|
||||
true => FLT1POLR::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == FLT1POLR::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == FLT1POLR::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `FLT2POL`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum FLT2POLR {
|
||||
#[doc = "The fault input polarity is active high. A 1 at the fault input indicates a fault."]
|
||||
_0,
|
||||
#[doc = "The fault input polarity is active low. A 0 at the fault input indicates a fault."]
|
||||
_1,
|
||||
}
|
||||
impl FLT2POLR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
match *self {
|
||||
FLT2POLR::_0 => false,
|
||||
FLT2POLR::_1 => true,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: bool) -> FLT2POLR {
|
||||
match value {
|
||||
false => FLT2POLR::_0,
|
||||
true => FLT2POLR::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == FLT2POLR::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == FLT2POLR::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `FLT3POL`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum FLT3POLR {
|
||||
#[doc = "The fault input polarity is active high. A 1 at the fault input indicates a fault."]
|
||||
_0,
|
||||
#[doc = "The fault input polarity is active low. A 0 at the fault input indicates a fault."]
|
||||
_1,
|
||||
}
|
||||
impl FLT3POLR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
match *self {
|
||||
FLT3POLR::_0 => false,
|
||||
FLT3POLR::_1 => true,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: bool) -> FLT3POLR {
|
||||
match value {
|
||||
false => FLT3POLR::_0,
|
||||
true => FLT3POLR::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == FLT3POLR::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == FLT3POLR::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Values that can be written to the field `FLT0POL`"]
|
||||
pub enum FLT0POLW {
|
||||
#[doc = "The fault input polarity is active high. A 1 at the fault input indicates a fault."]
|
||||
_0,
|
||||
#[doc = "The fault input polarity is active low. A 0 at the fault input indicates a fault."]
|
||||
_1,
|
||||
}
|
||||
impl FLT0POLW {
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _bits(&self) -> bool {
|
||||
match *self {
|
||||
FLT0POLW::_0 => false,
|
||||
FLT0POLW::_1 => true,
|
||||
}
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _FLT0POLW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _FLT0POLW<'a> {
|
||||
#[doc = r" Writes `variant` to the field"]
|
||||
#[inline]
|
||||
pub fn variant(self, variant: FLT0POLW) -> &'a mut W {
|
||||
{
|
||||
self.bit(variant._bits())
|
||||
}
|
||||
}
|
||||
#[doc = "The fault input polarity is active high. A 1 at the fault input indicates a fault."]
|
||||
#[inline]
|
||||
pub fn _0(self) -> &'a mut W {
|
||||
self.variant(FLT0POLW::_0)
|
||||
}
|
||||
#[doc = "The fault input polarity is active low. A 0 at the fault input indicates a fault."]
|
||||
#[inline]
|
||||
pub fn _1(self) -> &'a mut W {
|
||||
self.variant(FLT0POLW::_1)
|
||||
}
|
||||
#[doc = r" Sets the field bit"]
|
||||
pub fn set_bit(self) -> &'a mut W {
|
||||
self.bit(true)
|
||||
}
|
||||
#[doc = r" Clears the field bit"]
|
||||
pub fn clear_bit(self) -> &'a mut W {
|
||||
self.bit(false)
|
||||
}
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub fn bit(self, value: bool) -> &'a mut W {
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 0;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = "Values that can be written to the field `FLT1POL`"]
|
||||
pub enum FLT1POLW {
|
||||
#[doc = "The fault input polarity is active high. A 1 at the fault input indicates a fault."]
|
||||
_0,
|
||||
#[doc = "The fault input polarity is active low. A 0 at the fault input indicates a fault."]
|
||||
_1,
|
||||
}
|
||||
impl FLT1POLW {
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _bits(&self) -> bool {
|
||||
match *self {
|
||||
FLT1POLW::_0 => false,
|
||||
FLT1POLW::_1 => true,
|
||||
}
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _FLT1POLW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _FLT1POLW<'a> {
|
||||
#[doc = r" Writes `variant` to the field"]
|
||||
#[inline]
|
||||
pub fn variant(self, variant: FLT1POLW) -> &'a mut W {
|
||||
{
|
||||
self.bit(variant._bits())
|
||||
}
|
||||
}
|
||||
#[doc = "The fault input polarity is active high. A 1 at the fault input indicates a fault."]
|
||||
#[inline]
|
||||
pub fn _0(self) -> &'a mut W {
|
||||
self.variant(FLT1POLW::_0)
|
||||
}
|
||||
#[doc = "The fault input polarity is active low. A 0 at the fault input indicates a fault."]
|
||||
#[inline]
|
||||
pub fn _1(self) -> &'a mut W {
|
||||
self.variant(FLT1POLW::_1)
|
||||
}
|
||||
#[doc = r" Sets the field bit"]
|
||||
pub fn set_bit(self) -> &'a mut W {
|
||||
self.bit(true)
|
||||
}
|
||||
#[doc = r" Clears the field bit"]
|
||||
pub fn clear_bit(self) -> &'a mut W {
|
||||
self.bit(false)
|
||||
}
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub fn bit(self, value: bool) -> &'a mut W {
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 1;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = "Values that can be written to the field `FLT2POL`"]
|
||||
pub enum FLT2POLW {
|
||||
#[doc = "The fault input polarity is active high. A 1 at the fault input indicates a fault."]
|
||||
_0,
|
||||
#[doc = "The fault input polarity is active low. A 0 at the fault input indicates a fault."]
|
||||
_1,
|
||||
}
|
||||
impl FLT2POLW {
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _bits(&self) -> bool {
|
||||
match *self {
|
||||
FLT2POLW::_0 => false,
|
||||
FLT2POLW::_1 => true,
|
||||
}
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _FLT2POLW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _FLT2POLW<'a> {
|
||||
#[doc = r" Writes `variant` to the field"]
|
||||
#[inline]
|
||||
pub fn variant(self, variant: FLT2POLW) -> &'a mut W {
|
||||
{
|
||||
self.bit(variant._bits())
|
||||
}
|
||||
}
|
||||
#[doc = "The fault input polarity is active high. A 1 at the fault input indicates a fault."]
|
||||
#[inline]
|
||||
pub fn _0(self) -> &'a mut W {
|
||||
self.variant(FLT2POLW::_0)
|
||||
}
|
||||
#[doc = "The fault input polarity is active low. A 0 at the fault input indicates a fault."]
|
||||
#[inline]
|
||||
pub fn _1(self) -> &'a mut W {
|
||||
self.variant(FLT2POLW::_1)
|
||||
}
|
||||
#[doc = r" Sets the field bit"]
|
||||
pub fn set_bit(self) -> &'a mut W {
|
||||
self.bit(true)
|
||||
}
|
||||
#[doc = r" Clears the field bit"]
|
||||
pub fn clear_bit(self) -> &'a mut W {
|
||||
self.bit(false)
|
||||
}
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub fn bit(self, value: bool) -> &'a mut W {
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 2;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = "Values that can be written to the field `FLT3POL`"]
|
||||
pub enum FLT3POLW {
|
||||
#[doc = "The fault input polarity is active high. A 1 at the fault input indicates a fault."]
|
||||
_0,
|
||||
#[doc = "The fault input polarity is active low. A 0 at the fault input indicates a fault."]
|
||||
_1,
|
||||
}
|
||||
impl FLT3POLW {
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _bits(&self) -> bool {
|
||||
match *self {
|
||||
FLT3POLW::_0 => false,
|
||||
FLT3POLW::_1 => true,
|
||||
}
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _FLT3POLW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _FLT3POLW<'a> {
|
||||
#[doc = r" Writes `variant` to the field"]
|
||||
#[inline]
|
||||
pub fn variant(self, variant: FLT3POLW) -> &'a mut W {
|
||||
{
|
||||
self.bit(variant._bits())
|
||||
}
|
||||
}
|
||||
#[doc = "The fault input polarity is active high. A 1 at the fault input indicates a fault."]
|
||||
#[inline]
|
||||
pub fn _0(self) -> &'a mut W {
|
||||
self.variant(FLT3POLW::_0)
|
||||
}
|
||||
#[doc = "The fault input polarity is active low. A 0 at the fault input indicates a fault."]
|
||||
#[inline]
|
||||
pub fn _1(self) -> &'a mut W {
|
||||
self.variant(FLT3POLW::_1)
|
||||
}
|
||||
#[doc = r" Sets the field bit"]
|
||||
pub fn set_bit(self) -> &'a mut W {
|
||||
self.bit(true)
|
||||
}
|
||||
#[doc = r" Clears the field bit"]
|
||||
pub fn clear_bit(self) -> &'a mut W {
|
||||
self.bit(false)
|
||||
}
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub fn bit(self, value: bool) -> &'a mut W {
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 3;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
#[doc = "Bit 0 - Fault Input 0 Polarity"]
|
||||
#[inline]
|
||||
pub fn flt0pol(&self) -> FLT0POLR {
|
||||
FLT0POLR::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 0;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
#[doc = "Bit 1 - Fault Input 1 Polarity"]
|
||||
#[inline]
|
||||
pub fn flt1pol(&self) -> FLT1POLR {
|
||||
FLT1POLR::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 1;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
#[doc = "Bit 2 - Fault Input 2 Polarity"]
|
||||
#[inline]
|
||||
pub fn flt2pol(&self) -> FLT2POLR {
|
||||
FLT2POLR::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 2;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
#[doc = "Bit 3 - Fault Input 3 Polarity"]
|
||||
#[inline]
|
||||
pub fn flt3pol(&self) -> FLT3POLR {
|
||||
FLT3POLR::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 3;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 0 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
#[doc = "Bit 0 - Fault Input 0 Polarity"]
|
||||
#[inline]
|
||||
pub fn flt0pol(&mut self) -> _FLT0POLW {
|
||||
_FLT0POLW { w: self }
|
||||
}
|
||||
#[doc = "Bit 1 - Fault Input 1 Polarity"]
|
||||
#[inline]
|
||||
pub fn flt1pol(&mut self) -> _FLT1POLW {
|
||||
_FLT1POLW { w: self }
|
||||
}
|
||||
#[doc = "Bit 2 - Fault Input 2 Polarity"]
|
||||
#[inline]
|
||||
pub fn flt2pol(&mut self) -> _FLT2POLW {
|
||||
_FLT2POLW { w: self }
|
||||
}
|
||||
#[doc = "Bit 3 - Fault Input 3 Polarity"]
|
||||
#[inline]
|
||||
pub fn flt3pol(&mut self) -> _FLT3POLW {
|
||||
_FLT3POLW { w: self }
|
||||
}
|
||||
}
|
||||
#[doc = "Reader of register FLTPOL"]
|
||||
pub type R = crate::R<u32, super::FLTPOL>;
|
||||
#[doc = "Writer for register FLTPOL"]
|
||||
pub type W = crate::W<u32, super::FLTPOL>;
|
||||
#[doc = "Register FLTPOL `reset()`'s with value 0"]
|
||||
impl crate::ResetValue for super::FLTPOL {
|
||||
type Type = u32;
|
||||
#[inline(always)]
|
||||
fn reset_value() -> Self::Type {
|
||||
0
|
||||
}
|
||||
}
|
||||
#[doc = "Fault Input 0 Polarity\n\nValue on reset: 0"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum FLT0POL_A {
|
||||
#[doc = "0: The fault input polarity is active high. A 1 at the fault input indicates a fault."]
|
||||
_0 = 0,
|
||||
#[doc = "1: The fault input polarity is active low. A 0 at the fault input indicates a fault."]
|
||||
_1 = 1,
|
||||
}
|
||||
impl From<FLT0POL_A> for bool {
|
||||
#[inline(always)]
|
||||
fn from(variant: FLT0POL_A) -> Self {
|
||||
variant as u8 != 0
|
||||
}
|
||||
}
|
||||
#[doc = "Reader of field `FLT0POL`"]
|
||||
pub type FLT0POL_R = crate::R<bool, FLT0POL_A>;
|
||||
impl FLT0POL_R {
|
||||
#[doc = r"Get enumerated values variant"]
|
||||
#[inline(always)]
|
||||
pub fn variant(&self) -> FLT0POL_A {
|
||||
match self.bits {
|
||||
false => FLT0POL_A::_0,
|
||||
true => FLT0POL_A::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline(always)]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == FLT0POL_A::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline(always)]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == FLT0POL_A::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Write proxy for field `FLT0POL`"]
|
||||
pub struct FLT0POL_W<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> FLT0POL_W<'a> {
|
||||
#[doc = r"Writes `variant` to the field"]
|
||||
#[inline(always)]
|
||||
pub fn variant(self, variant: FLT0POL_A) -> &'a mut W {
|
||||
{
|
||||
self.bit(variant.into())
|
||||
}
|
||||
}
|
||||
#[doc = "The fault input polarity is active high. A 1 at the fault input indicates a fault."]
|
||||
#[inline(always)]
|
||||
pub fn _0(self) -> &'a mut W {
|
||||
self.variant(FLT0POL_A::_0)
|
||||
}
|
||||
#[doc = "The fault input polarity is active low. A 0 at the fault input indicates a fault."]
|
||||
#[inline(always)]
|
||||
pub fn _1(self) -> &'a mut W {
|
||||
self.variant(FLT0POL_A::_1)
|
||||
}
|
||||
#[doc = r"Sets the field bit"]
|
||||
#[inline(always)]
|
||||
pub fn set_bit(self) -> &'a mut W {
|
||||
self.bit(true)
|
||||
}
|
||||
#[doc = r"Clears the field bit"]
|
||||
#[inline(always)]
|
||||
pub fn clear_bit(self) -> &'a mut W {
|
||||
self.bit(false)
|
||||
}
|
||||
#[doc = r"Writes raw bits to the field"]
|
||||
#[inline(always)]
|
||||
pub fn bit(self, value: bool) -> &'a mut W {
|
||||
self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01);
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = "Fault Input 1 Polarity\n\nValue on reset: 0"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum FLT1POL_A {
|
||||
#[doc = "0: The fault input polarity is active high. A 1 at the fault input indicates a fault."]
|
||||
_0 = 0,
|
||||
#[doc = "1: The fault input polarity is active low. A 0 at the fault input indicates a fault."]
|
||||
_1 = 1,
|
||||
}
|
||||
impl From<FLT1POL_A> for bool {
|
||||
#[inline(always)]
|
||||
fn from(variant: FLT1POL_A) -> Self {
|
||||
variant as u8 != 0
|
||||
}
|
||||
}
|
||||
#[doc = "Reader of field `FLT1POL`"]
|
||||
pub type FLT1POL_R = crate::R<bool, FLT1POL_A>;
|
||||
impl FLT1POL_R {
|
||||
#[doc = r"Get enumerated values variant"]
|
||||
#[inline(always)]
|
||||
pub fn variant(&self) -> FLT1POL_A {
|
||||
match self.bits {
|
||||
false => FLT1POL_A::_0,
|
||||
true => FLT1POL_A::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline(always)]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == FLT1POL_A::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline(always)]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == FLT1POL_A::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Write proxy for field `FLT1POL`"]
|
||||
pub struct FLT1POL_W<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> FLT1POL_W<'a> {
|
||||
#[doc = r"Writes `variant` to the field"]
|
||||
#[inline(always)]
|
||||
pub fn variant(self, variant: FLT1POL_A) -> &'a mut W {
|
||||
{
|
||||
self.bit(variant.into())
|
||||
}
|
||||
}
|
||||
#[doc = "The fault input polarity is active high. A 1 at the fault input indicates a fault."]
|
||||
#[inline(always)]
|
||||
pub fn _0(self) -> &'a mut W {
|
||||
self.variant(FLT1POL_A::_0)
|
||||
}
|
||||
#[doc = "The fault input polarity is active low. A 0 at the fault input indicates a fault."]
|
||||
#[inline(always)]
|
||||
pub fn _1(self) -> &'a mut W {
|
||||
self.variant(FLT1POL_A::_1)
|
||||
}
|
||||
#[doc = r"Sets the field bit"]
|
||||
#[inline(always)]
|
||||
pub fn set_bit(self) -> &'a mut W {
|
||||
self.bit(true)
|
||||
}
|
||||
#[doc = r"Clears the field bit"]
|
||||
#[inline(always)]
|
||||
pub fn clear_bit(self) -> &'a mut W {
|
||||
self.bit(false)
|
||||
}
|
||||
#[doc = r"Writes raw bits to the field"]
|
||||
#[inline(always)]
|
||||
pub fn bit(self, value: bool) -> &'a mut W {
|
||||
self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1);
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = "Fault Input 2 Polarity\n\nValue on reset: 0"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum FLT2POL_A {
|
||||
#[doc = "0: The fault input polarity is active high. A 1 at the fault input indicates a fault."]
|
||||
_0 = 0,
|
||||
#[doc = "1: The fault input polarity is active low. A 0 at the fault input indicates a fault."]
|
||||
_1 = 1,
|
||||
}
|
||||
impl From<FLT2POL_A> for bool {
|
||||
#[inline(always)]
|
||||
fn from(variant: FLT2POL_A) -> Self {
|
||||
variant as u8 != 0
|
||||
}
|
||||
}
|
||||
#[doc = "Reader of field `FLT2POL`"]
|
||||
pub type FLT2POL_R = crate::R<bool, FLT2POL_A>;
|
||||
impl FLT2POL_R {
|
||||
#[doc = r"Get enumerated values variant"]
|
||||
#[inline(always)]
|
||||
pub fn variant(&self) -> FLT2POL_A {
|
||||
match self.bits {
|
||||
false => FLT2POL_A::_0,
|
||||
true => FLT2POL_A::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline(always)]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == FLT2POL_A::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline(always)]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == FLT2POL_A::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Write proxy for field `FLT2POL`"]
|
||||
pub struct FLT2POL_W<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> FLT2POL_W<'a> {
|
||||
#[doc = r"Writes `variant` to the field"]
|
||||
#[inline(always)]
|
||||
pub fn variant(self, variant: FLT2POL_A) -> &'a mut W {
|
||||
{
|
||||
self.bit(variant.into())
|
||||
}
|
||||
}
|
||||
#[doc = "The fault input polarity is active high. A 1 at the fault input indicates a fault."]
|
||||
#[inline(always)]
|
||||
pub fn _0(self) -> &'a mut W {
|
||||
self.variant(FLT2POL_A::_0)
|
||||
}
|
||||
#[doc = "The fault input polarity is active low. A 0 at the fault input indicates a fault."]
|
||||
#[inline(always)]
|
||||
pub fn _1(self) -> &'a mut W {
|
||||
self.variant(FLT2POL_A::_1)
|
||||
}
|
||||
#[doc = r"Sets the field bit"]
|
||||
#[inline(always)]
|
||||
pub fn set_bit(self) -> &'a mut W {
|
||||
self.bit(true)
|
||||
}
|
||||
#[doc = r"Clears the field bit"]
|
||||
#[inline(always)]
|
||||
pub fn clear_bit(self) -> &'a mut W {
|
||||
self.bit(false)
|
||||
}
|
||||
#[doc = r"Writes raw bits to the field"]
|
||||
#[inline(always)]
|
||||
pub fn bit(self, value: bool) -> &'a mut W {
|
||||
self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u32) & 0x01) << 2);
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = "Fault Input 3 Polarity\n\nValue on reset: 0"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum FLT3POL_A {
|
||||
#[doc = "0: The fault input polarity is active high. A 1 at the fault input indicates a fault."]
|
||||
_0 = 0,
|
||||
#[doc = "1: The fault input polarity is active low. A 0 at the fault input indicates a fault."]
|
||||
_1 = 1,
|
||||
}
|
||||
impl From<FLT3POL_A> for bool {
|
||||
#[inline(always)]
|
||||
fn from(variant: FLT3POL_A) -> Self {
|
||||
variant as u8 != 0
|
||||
}
|
||||
}
|
||||
#[doc = "Reader of field `FLT3POL`"]
|
||||
pub type FLT3POL_R = crate::R<bool, FLT3POL_A>;
|
||||
impl FLT3POL_R {
|
||||
#[doc = r"Get enumerated values variant"]
|
||||
#[inline(always)]
|
||||
pub fn variant(&self) -> FLT3POL_A {
|
||||
match self.bits {
|
||||
false => FLT3POL_A::_0,
|
||||
true => FLT3POL_A::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline(always)]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == FLT3POL_A::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline(always)]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == FLT3POL_A::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Write proxy for field `FLT3POL`"]
|
||||
pub struct FLT3POL_W<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> FLT3POL_W<'a> {
|
||||
#[doc = r"Writes `variant` to the field"]
|
||||
#[inline(always)]
|
||||
pub fn variant(self, variant: FLT3POL_A) -> &'a mut W {
|
||||
{
|
||||
self.bit(variant.into())
|
||||
}
|
||||
}
|
||||
#[doc = "The fault input polarity is active high. A 1 at the fault input indicates a fault."]
|
||||
#[inline(always)]
|
||||
pub fn _0(self) -> &'a mut W {
|
||||
self.variant(FLT3POL_A::_0)
|
||||
}
|
||||
#[doc = "The fault input polarity is active low. A 0 at the fault input indicates a fault."]
|
||||
#[inline(always)]
|
||||
pub fn _1(self) -> &'a mut W {
|
||||
self.variant(FLT3POL_A::_1)
|
||||
}
|
||||
#[doc = r"Sets the field bit"]
|
||||
#[inline(always)]
|
||||
pub fn set_bit(self) -> &'a mut W {
|
||||
self.bit(true)
|
||||
}
|
||||
#[doc = r"Clears the field bit"]
|
||||
#[inline(always)]
|
||||
pub fn clear_bit(self) -> &'a mut W {
|
||||
self.bit(false)
|
||||
}
|
||||
#[doc = r"Writes raw bits to the field"]
|
||||
#[inline(always)]
|
||||
pub fn bit(self, value: bool) -> &'a mut W {
|
||||
self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u32) & 0x01) << 3);
|
||||
self.w
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = "Bit 0 - Fault Input 0 Polarity"]
|
||||
#[inline(always)]
|
||||
pub fn flt0pol(&self) -> FLT0POL_R {
|
||||
FLT0POL_R::new((self.bits & 0x01) != 0)
|
||||
}
|
||||
#[doc = "Bit 1 - Fault Input 1 Polarity"]
|
||||
#[inline(always)]
|
||||
pub fn flt1pol(&self) -> FLT1POL_R {
|
||||
FLT1POL_R::new(((self.bits >> 1) & 0x01) != 0)
|
||||
}
|
||||
#[doc = "Bit 2 - Fault Input 2 Polarity"]
|
||||
#[inline(always)]
|
||||
pub fn flt2pol(&self) -> FLT2POL_R {
|
||||
FLT2POL_R::new(((self.bits >> 2) & 0x01) != 0)
|
||||
}
|
||||
#[doc = "Bit 3 - Fault Input 3 Polarity"]
|
||||
#[inline(always)]
|
||||
pub fn flt3pol(&self) -> FLT3POL_R {
|
||||
FLT3POL_R::new(((self.bits >> 3) & 0x01) != 0)
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = "Bit 0 - Fault Input 0 Polarity"]
|
||||
#[inline(always)]
|
||||
pub fn flt0pol(&mut self) -> FLT0POL_W {
|
||||
FLT0POL_W { w: self }
|
||||
}
|
||||
#[doc = "Bit 1 - Fault Input 1 Polarity"]
|
||||
#[inline(always)]
|
||||
pub fn flt1pol(&mut self) -> FLT1POL_W {
|
||||
FLT1POL_W { w: self }
|
||||
}
|
||||
#[doc = "Bit 2 - Fault Input 2 Polarity"]
|
||||
#[inline(always)]
|
||||
pub fn flt2pol(&mut self) -> FLT2POL_W {
|
||||
FLT2POL_W { w: self }
|
||||
}
|
||||
#[doc = "Bit 3 - Fault Input 3 Polarity"]
|
||||
#[inline(always)]
|
||||
pub fn flt3pol(&mut self) -> FLT3POL_W {
|
||||
FLT3POL_W { w: self }
|
||||
}
|
||||
}
|
||||
|
864
src/ftm1/fms.rs
864
src/ftm1/fms.rs
@ -1,517 +1,347 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::FMS {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `FAULTF0`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum FAULTF0R {
|
||||
#[doc = "No fault condition was detected at the fault input."]
|
||||
_0,
|
||||
#[doc = "A fault condition was detected at the fault input."]
|
||||
_1,
|
||||
}
|
||||
impl FAULTF0R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
match *self {
|
||||
FAULTF0R::_0 => false,
|
||||
FAULTF0R::_1 => true,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: bool) -> FAULTF0R {
|
||||
match value {
|
||||
false => FAULTF0R::_0,
|
||||
true => FAULTF0R::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == FAULTF0R::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == FAULTF0R::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `FAULTF1`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum FAULTF1R {
|
||||
#[doc = "No fault condition was detected at the fault input."]
|
||||
_0,
|
||||
#[doc = "A fault condition was detected at the fault input."]
|
||||
_1,
|
||||
}
|
||||
impl FAULTF1R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
match *self {
|
||||
FAULTF1R::_0 => false,
|
||||
FAULTF1R::_1 => true,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: bool) -> FAULTF1R {
|
||||
match value {
|
||||
false => FAULTF1R::_0,
|
||||
true => FAULTF1R::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == FAULTF1R::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == FAULTF1R::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `FAULTF2`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum FAULTF2R {
|
||||
#[doc = "No fault condition was detected at the fault input."]
|
||||
_0,
|
||||
#[doc = "A fault condition was detected at the fault input."]
|
||||
_1,
|
||||
}
|
||||
impl FAULTF2R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
match *self {
|
||||
FAULTF2R::_0 => false,
|
||||
FAULTF2R::_1 => true,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: bool) -> FAULTF2R {
|
||||
match value {
|
||||
false => FAULTF2R::_0,
|
||||
true => FAULTF2R::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == FAULTF2R::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == FAULTF2R::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `FAULTF3`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum FAULTF3R {
|
||||
#[doc = "No fault condition was detected at the fault input."]
|
||||
_0,
|
||||
#[doc = "A fault condition was detected at the fault input."]
|
||||
_1,
|
||||
}
|
||||
impl FAULTF3R {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
match *self {
|
||||
FAULTF3R::_0 => false,
|
||||
FAULTF3R::_1 => true,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: bool) -> FAULTF3R {
|
||||
match value {
|
||||
false => FAULTF3R::_0,
|
||||
true => FAULTF3R::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == FAULTF3R::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == FAULTF3R::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `FAULTIN`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum FAULTINR {
|
||||
#[doc = "The logic OR of the enabled fault inputs is 0."]
|
||||
_0,
|
||||
#[doc = "The logic OR of the enabled fault inputs is 1."]
|
||||
_1,
|
||||
}
|
||||
impl FAULTINR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
match *self {
|
||||
FAULTINR::_0 => false,
|
||||
FAULTINR::_1 => true,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: bool) -> FAULTINR {
|
||||
match value {
|
||||
false => FAULTINR::_0,
|
||||
true => FAULTINR::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == FAULTINR::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == FAULTINR::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `WPEN`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WPENR {
|
||||
#[doc = "Write protection is disabled. Write protected bits can be written."]
|
||||
_0,
|
||||
#[doc = "Write protection is enabled. Write protected bits cannot be written."]
|
||||
_1,
|
||||
}
|
||||
impl WPENR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
match *self {
|
||||
WPENR::_0 => false,
|
||||
WPENR::_1 => true,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: bool) -> WPENR {
|
||||
match value {
|
||||
false => WPENR::_0,
|
||||
true => WPENR::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == WPENR::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == WPENR::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `FAULTF`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum FAULTFR {
|
||||
#[doc = "No fault condition was detected."]
|
||||
_0,
|
||||
#[doc = "A fault condition was detected."]
|
||||
_1,
|
||||
}
|
||||
impl FAULTFR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
match *self {
|
||||
FAULTFR::_0 => false,
|
||||
FAULTFR::_1 => true,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: bool) -> FAULTFR {
|
||||
match value {
|
||||
false => FAULTFR::_0,
|
||||
true => FAULTFR::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == FAULTFR::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == FAULTFR::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Values that can be written to the field `WPEN`"]
|
||||
pub enum WPENW {
|
||||
#[doc = "Write protection is disabled. Write protected bits can be written."]
|
||||
_0,
|
||||
#[doc = "Write protection is enabled. Write protected bits cannot be written."]
|
||||
_1,
|
||||
}
|
||||
impl WPENW {
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _bits(&self) -> bool {
|
||||
match *self {
|
||||
WPENW::_0 => false,
|
||||
WPENW::_1 => true,
|
||||
}
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _WPENW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _WPENW<'a> {
|
||||
#[doc = r" Writes `variant` to the field"]
|
||||
#[inline]
|
||||
pub fn variant(self, variant: WPENW) -> &'a mut W {
|
||||
{
|
||||
self.bit(variant._bits())
|
||||
}
|
||||
}
|
||||
#[doc = "Write protection is disabled. Write protected bits can be written."]
|
||||
#[inline]
|
||||
pub fn _0(self) -> &'a mut W {
|
||||
self.variant(WPENW::_0)
|
||||
}
|
||||
#[doc = "Write protection is enabled. Write protected bits cannot be written."]
|
||||
#[inline]
|
||||
pub fn _1(self) -> &'a mut W {
|
||||
self.variant(WPENW::_1)
|
||||
}
|
||||
#[doc = r" Sets the field bit"]
|
||||
pub fn set_bit(self) -> &'a mut W {
|
||||
self.bit(true)
|
||||
}
|
||||
#[doc = r" Clears the field bit"]
|
||||
pub fn clear_bit(self) -> &'a mut W {
|
||||
self.bit(false)
|
||||
}
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub fn bit(self, value: bool) -> &'a mut W {
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 6;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
#[doc = "Bit 0 - Fault Detection Flag 0"]
|
||||
#[inline]
|
||||
pub fn faultf0(&self) -> FAULTF0R {
|
||||
FAULTF0R::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 0;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
#[doc = "Bit 1 - Fault Detection Flag 1"]
|
||||
#[inline]
|
||||
pub fn faultf1(&self) -> FAULTF1R {
|
||||
FAULTF1R::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 1;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
#[doc = "Bit 2 - Fault Detection Flag 2"]
|
||||
#[inline]
|
||||
pub fn faultf2(&self) -> FAULTF2R {
|
||||
FAULTF2R::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 2;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
#[doc = "Bit 3 - Fault Detection Flag 3"]
|
||||
#[inline]
|
||||
pub fn faultf3(&self) -> FAULTF3R {
|
||||
FAULTF3R::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 3;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
#[doc = "Bit 5 - Fault Inputs"]
|
||||
#[inline]
|
||||
pub fn faultin(&self) -> FAULTINR {
|
||||
FAULTINR::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 5;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
#[doc = "Bit 6 - Write Protection Enable"]
|
||||
#[inline]
|
||||
pub fn wpen(&self) -> WPENR {
|
||||
WPENR::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 6;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
#[doc = "Bit 7 - Fault Detection Flag"]
|
||||
#[inline]
|
||||
pub fn faultf(&self) -> FAULTFR {
|
||||
FAULTFR::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 7;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 0 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
#[doc = "Bit 6 - Write Protection Enable"]
|
||||
#[inline]
|
||||
pub fn wpen(&mut self) -> _WPENW {
|
||||
_WPENW { w: self }
|
||||
}
|
||||
}
|
||||
#[doc = "Reader of register FMS"]
|
||||
pub type R = crate::R<u32, super::FMS>;
|
||||
#[doc = "Writer for register FMS"]
|
||||
pub type W = crate::W<u32, super::FMS>;
|
||||
#[doc = "Register FMS `reset()`'s with value 0"]
|
||||
impl crate::ResetValue for super::FMS {
|
||||
type Type = u32;
|
||||
#[inline(always)]
|
||||
fn reset_value() -> Self::Type {
|
||||
0
|
||||
}
|
||||
}
|
||||
#[doc = "Fault Detection Flag 0\n\nValue on reset: 0"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum FAULTF0_A {
|
||||
#[doc = "0: No fault condition was detected at the fault input."]
|
||||
_0 = 0,
|
||||
#[doc = "1: A fault condition was detected at the fault input."]
|
||||
_1 = 1,
|
||||
}
|
||||
impl From<FAULTF0_A> for bool {
|
||||
#[inline(always)]
|
||||
fn from(variant: FAULTF0_A) -> Self {
|
||||
variant as u8 != 0
|
||||
}
|
||||
}
|
||||
#[doc = "Reader of field `FAULTF0`"]
|
||||
pub type FAULTF0_R = crate::R<bool, FAULTF0_A>;
|
||||
impl FAULTF0_R {
|
||||
#[doc = r"Get enumerated values variant"]
|
||||
#[inline(always)]
|
||||
pub fn variant(&self) -> FAULTF0_A {
|
||||
match self.bits {
|
||||
false => FAULTF0_A::_0,
|
||||
true => FAULTF0_A::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline(always)]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == FAULTF0_A::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline(always)]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == FAULTF0_A::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Fault Detection Flag 1\n\nValue on reset: 0"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum FAULTF1_A {
|
||||
#[doc = "0: No fault condition was detected at the fault input."]
|
||||
_0 = 0,
|
||||
#[doc = "1: A fault condition was detected at the fault input."]
|
||||
_1 = 1,
|
||||
}
|
||||
impl From<FAULTF1_A> for bool {
|
||||
#[inline(always)]
|
||||
fn from(variant: FAULTF1_A) -> Self {
|
||||
variant as u8 != 0
|
||||
}
|
||||
}
|
||||
#[doc = "Reader of field `FAULTF1`"]
|
||||
pub type FAULTF1_R = crate::R<bool, FAULTF1_A>;
|
||||
impl FAULTF1_R {
|
||||
#[doc = r"Get enumerated values variant"]
|
||||
#[inline(always)]
|
||||
pub fn variant(&self) -> FAULTF1_A {
|
||||
match self.bits {
|
||||
false => FAULTF1_A::_0,
|
||||
true => FAULTF1_A::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline(always)]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == FAULTF1_A::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline(always)]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == FAULTF1_A::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Fault Detection Flag 2\n\nValue on reset: 0"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum FAULTF2_A {
|
||||
#[doc = "0: No fault condition was detected at the fault input."]
|
||||
_0 = 0,
|
||||
#[doc = "1: A fault condition was detected at the fault input."]
|
||||
_1 = 1,
|
||||
}
|
||||
impl From<FAULTF2_A> for bool {
|
||||
#[inline(always)]
|
||||
fn from(variant: FAULTF2_A) -> Self {
|
||||
variant as u8 != 0
|
||||
}
|
||||
}
|
||||
#[doc = "Reader of field `FAULTF2`"]
|
||||
pub type FAULTF2_R = crate::R<bool, FAULTF2_A>;
|
||||
impl FAULTF2_R {
|
||||
#[doc = r"Get enumerated values variant"]
|
||||
#[inline(always)]
|
||||
pub fn variant(&self) -> FAULTF2_A {
|
||||
match self.bits {
|
||||
false => FAULTF2_A::_0,
|
||||
true => FAULTF2_A::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline(always)]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == FAULTF2_A::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline(always)]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == FAULTF2_A::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Fault Detection Flag 3\n\nValue on reset: 0"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum FAULTF3_A {
|
||||
#[doc = "0: No fault condition was detected at the fault input."]
|
||||
_0 = 0,
|
||||
#[doc = "1: A fault condition was detected at the fault input."]
|
||||
_1 = 1,
|
||||
}
|
||||
impl From<FAULTF3_A> for bool {
|
||||
#[inline(always)]
|
||||
fn from(variant: FAULTF3_A) -> Self {
|
||||
variant as u8 != 0
|
||||
}
|
||||
}
|
||||
#[doc = "Reader of field `FAULTF3`"]
|
||||
pub type FAULTF3_R = crate::R<bool, FAULTF3_A>;
|
||||
impl FAULTF3_R {
|
||||
#[doc = r"Get enumerated values variant"]
|
||||
#[inline(always)]
|
||||
pub fn variant(&self) -> FAULTF3_A {
|
||||
match self.bits {
|
||||
false => FAULTF3_A::_0,
|
||||
true => FAULTF3_A::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline(always)]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == FAULTF3_A::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline(always)]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == FAULTF3_A::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Fault Inputs\n\nValue on reset: 0"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum FAULTIN_A {
|
||||
#[doc = "0: The logic OR of the enabled fault inputs is 0."]
|
||||
_0 = 0,
|
||||
#[doc = "1: The logic OR of the enabled fault inputs is 1."]
|
||||
_1 = 1,
|
||||
}
|
||||
impl From<FAULTIN_A> for bool {
|
||||
#[inline(always)]
|
||||
fn from(variant: FAULTIN_A) -> Self {
|
||||
variant as u8 != 0
|
||||
}
|
||||
}
|
||||
#[doc = "Reader of field `FAULTIN`"]
|
||||
pub type FAULTIN_R = crate::R<bool, FAULTIN_A>;
|
||||
impl FAULTIN_R {
|
||||
#[doc = r"Get enumerated values variant"]
|
||||
#[inline(always)]
|
||||
pub fn variant(&self) -> FAULTIN_A {
|
||||
match self.bits {
|
||||
false => FAULTIN_A::_0,
|
||||
true => FAULTIN_A::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline(always)]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == FAULTIN_A::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline(always)]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == FAULTIN_A::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Write Protection Enable\n\nValue on reset: 0"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum WPEN_A {
|
||||
#[doc = "0: Write protection is disabled. Write protected bits can be written."]
|
||||
_0 = 0,
|
||||
#[doc = "1: Write protection is enabled. Write protected bits cannot be written."]
|
||||
_1 = 1,
|
||||
}
|
||||
impl From<WPEN_A> for bool {
|
||||
#[inline(always)]
|
||||
fn from(variant: WPEN_A) -> Self {
|
||||
variant as u8 != 0
|
||||
}
|
||||
}
|
||||
#[doc = "Reader of field `WPEN`"]
|
||||
pub type WPEN_R = crate::R<bool, WPEN_A>;
|
||||
impl WPEN_R {
|
||||
#[doc = r"Get enumerated values variant"]
|
||||
#[inline(always)]
|
||||
pub fn variant(&self) -> WPEN_A {
|
||||
match self.bits {
|
||||
false => WPEN_A::_0,
|
||||
true => WPEN_A::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline(always)]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == WPEN_A::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline(always)]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == WPEN_A::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Write proxy for field `WPEN`"]
|
||||
pub struct WPEN_W<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> WPEN_W<'a> {
|
||||
#[doc = r"Writes `variant` to the field"]
|
||||
#[inline(always)]
|
||||
pub fn variant(self, variant: WPEN_A) -> &'a mut W {
|
||||
{
|
||||
self.bit(variant.into())
|
||||
}
|
||||
}
|
||||
#[doc = "Write protection is disabled. Write protected bits can be written."]
|
||||
#[inline(always)]
|
||||
pub fn _0(self) -> &'a mut W {
|
||||
self.variant(WPEN_A::_0)
|
||||
}
|
||||
#[doc = "Write protection is enabled. Write protected bits cannot be written."]
|
||||
#[inline(always)]
|
||||
pub fn _1(self) -> &'a mut W {
|
||||
self.variant(WPEN_A::_1)
|
||||
}
|
||||
#[doc = r"Sets the field bit"]
|
||||
#[inline(always)]
|
||||
pub fn set_bit(self) -> &'a mut W {
|
||||
self.bit(true)
|
||||
}
|
||||
#[doc = r"Clears the field bit"]
|
||||
#[inline(always)]
|
||||
pub fn clear_bit(self) -> &'a mut W {
|
||||
self.bit(false)
|
||||
}
|
||||
#[doc = r"Writes raw bits to the field"]
|
||||
#[inline(always)]
|
||||
pub fn bit(self, value: bool) -> &'a mut W {
|
||||
self.w.bits = (self.w.bits & !(0x01 << 6)) | (((value as u32) & 0x01) << 6);
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = "Fault Detection Flag\n\nValue on reset: 0"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum FAULTF_A {
|
||||
#[doc = "0: No fault condition was detected."]
|
||||
_0 = 0,
|
||||
#[doc = "1: A fault condition was detected."]
|
||||
_1 = 1,
|
||||
}
|
||||
impl From<FAULTF_A> for bool {
|
||||
#[inline(always)]
|
||||
fn from(variant: FAULTF_A) -> Self {
|
||||
variant as u8 != 0
|
||||
}
|
||||
}
|
||||
#[doc = "Reader of field `FAULTF`"]
|
||||
pub type FAULTF_R = crate::R<bool, FAULTF_A>;
|
||||
impl FAULTF_R {
|
||||
#[doc = r"Get enumerated values variant"]
|
||||
#[inline(always)]
|
||||
pub fn variant(&self) -> FAULTF_A {
|
||||
match self.bits {
|
||||
false => FAULTF_A::_0,
|
||||
true => FAULTF_A::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline(always)]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == FAULTF_A::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline(always)]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == FAULTF_A::_1
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = "Bit 0 - Fault Detection Flag 0"]
|
||||
#[inline(always)]
|
||||
pub fn faultf0(&self) -> FAULTF0_R {
|
||||
FAULTF0_R::new((self.bits & 0x01) != 0)
|
||||
}
|
||||
#[doc = "Bit 1 - Fault Detection Flag 1"]
|
||||
#[inline(always)]
|
||||
pub fn faultf1(&self) -> FAULTF1_R {
|
||||
FAULTF1_R::new(((self.bits >> 1) & 0x01) != 0)
|
||||
}
|
||||
#[doc = "Bit 2 - Fault Detection Flag 2"]
|
||||
#[inline(always)]
|
||||
pub fn faultf2(&self) -> FAULTF2_R {
|
||||
FAULTF2_R::new(((self.bits >> 2) & 0x01) != 0)
|
||||
}
|
||||
#[doc = "Bit 3 - Fault Detection Flag 3"]
|
||||
#[inline(always)]
|
||||
pub fn faultf3(&self) -> FAULTF3_R {
|
||||
FAULTF3_R::new(((self.bits >> 3) & 0x01) != 0)
|
||||
}
|
||||
#[doc = "Bit 5 - Fault Inputs"]
|
||||
#[inline(always)]
|
||||
pub fn faultin(&self) -> FAULTIN_R {
|
||||
FAULTIN_R::new(((self.bits >> 5) & 0x01) != 0)
|
||||
}
|
||||
#[doc = "Bit 6 - Write Protection Enable"]
|
||||
#[inline(always)]
|
||||
pub fn wpen(&self) -> WPEN_R {
|
||||
WPEN_R::new(((self.bits >> 6) & 0x01) != 0)
|
||||
}
|
||||
#[doc = "Bit 7 - Fault Detection Flag"]
|
||||
#[inline(always)]
|
||||
pub fn faultf(&self) -> FAULTF_R {
|
||||
FAULTF_R::new(((self.bits >> 7) & 0x01) != 0)
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = "Bit 6 - Write Protection Enable"]
|
||||
#[inline(always)]
|
||||
pub fn wpen(&mut self) -> WPEN_W {
|
||||
WPEN_W { w: self }
|
||||
}
|
||||
}
|
||||
|
143
src/ftm1/hcr.rs
143
src/ftm1/hcr.rs
@ -1,103 +1,40 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::HCR {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
#[doc = r" Value of the field"]
|
||||
pub struct HCVALR {
|
||||
bits: u16,
|
||||
}
|
||||
impl HCVALR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u16 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _HCVALW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _HCVALW<'a> {
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(self, value: u16) -> &'a mut W {
|
||||
const MASK: u16 = 65535;
|
||||
const OFFSET: u8 = 0;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
#[doc = "Bits 0:15 - Half Cycle Value"]
|
||||
#[inline]
|
||||
pub fn hcval(&self) -> HCVALR {
|
||||
let bits = {
|
||||
const MASK: u16 = 65535;
|
||||
const OFFSET: u8 = 0;
|
||||
((self.bits >> OFFSET) & MASK as u32) as u16
|
||||
};
|
||||
HCVALR { bits }
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 0 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
#[doc = "Bits 0:15 - Half Cycle Value"]
|
||||
#[inline]
|
||||
pub fn hcval(&mut self) -> _HCVALW {
|
||||
_HCVALW { w: self }
|
||||
}
|
||||
}
|
||||
#[doc = "Reader of register HCR"]
|
||||
pub type R = crate::R<u32, super::HCR>;
|
||||
#[doc = "Writer for register HCR"]
|
||||
pub type W = crate::W<u32, super::HCR>;
|
||||
#[doc = "Register HCR `reset()`'s with value 0"]
|
||||
impl crate::ResetValue for super::HCR {
|
||||
type Type = u32;
|
||||
#[inline(always)]
|
||||
fn reset_value() -> Self::Type {
|
||||
0
|
||||
}
|
||||
}
|
||||
#[doc = "Reader of field `HCVAL`"]
|
||||
pub type HCVAL_R = crate::R<u16, u16>;
|
||||
#[doc = "Write proxy for field `HCVAL`"]
|
||||
pub struct HCVAL_W<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> HCVAL_W<'a> {
|
||||
#[doc = r"Writes raw bits to the field"]
|
||||
#[inline(always)]
|
||||
pub unsafe fn bits(self, value: u16) -> &'a mut W {
|
||||
self.w.bits = (self.w.bits & !0xffff) | ((value as u32) & 0xffff);
|
||||
self.w
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = "Bits 0:15 - Half Cycle Value"]
|
||||
#[inline(always)]
|
||||
pub fn hcval(&self) -> HCVAL_R {
|
||||
HCVAL_R::new((self.bits & 0xffff) as u16)
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = "Bits 0:15 - Half Cycle Value"]
|
||||
#[inline(always)]
|
||||
pub fn hcval(&mut self) -> HCVAL_W {
|
||||
HCVAL_W { w: self }
|
||||
}
|
||||
}
|
||||
|
@ -1,538 +1,356 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::INVCTRL {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `INV0EN`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum INV0ENR {
|
||||
#[doc = "Inverting is disabled."]
|
||||
_0,
|
||||
#[doc = "Inverting is enabled."]
|
||||
_1,
|
||||
}
|
||||
impl INV0ENR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
match *self {
|
||||
INV0ENR::_0 => false,
|
||||
INV0ENR::_1 => true,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: bool) -> INV0ENR {
|
||||
match value {
|
||||
false => INV0ENR::_0,
|
||||
true => INV0ENR::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == INV0ENR::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == INV0ENR::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `INV1EN`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum INV1ENR {
|
||||
#[doc = "Inverting is disabled."]
|
||||
_0,
|
||||
#[doc = "Inverting is enabled."]
|
||||
_1,
|
||||
}
|
||||
impl INV1ENR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
match *self {
|
||||
INV1ENR::_0 => false,
|
||||
INV1ENR::_1 => true,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: bool) -> INV1ENR {
|
||||
match value {
|
||||
false => INV1ENR::_0,
|
||||
true => INV1ENR::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == INV1ENR::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == INV1ENR::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `INV2EN`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum INV2ENR {
|
||||
#[doc = "Inverting is disabled."]
|
||||
_0,
|
||||
#[doc = "Inverting is enabled."]
|
||||
_1,
|
||||
}
|
||||
impl INV2ENR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
match *self {
|
||||
INV2ENR::_0 => false,
|
||||
INV2ENR::_1 => true,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: bool) -> INV2ENR {
|
||||
match value {
|
||||
false => INV2ENR::_0,
|
||||
true => INV2ENR::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == INV2ENR::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == INV2ENR::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `INV3EN`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum INV3ENR {
|
||||
#[doc = "Inverting is disabled."]
|
||||
_0,
|
||||
#[doc = "Inverting is enabled."]
|
||||
_1,
|
||||
}
|
||||
impl INV3ENR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
match *self {
|
||||
INV3ENR::_0 => false,
|
||||
INV3ENR::_1 => true,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: bool) -> INV3ENR {
|
||||
match value {
|
||||
false => INV3ENR::_0,
|
||||
true => INV3ENR::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == INV3ENR::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == INV3ENR::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Values that can be written to the field `INV0EN`"]
|
||||
pub enum INV0ENW {
|
||||
#[doc = "Inverting is disabled."]
|
||||
_0,
|
||||
#[doc = "Inverting is enabled."]
|
||||
_1,
|
||||
}
|
||||
impl INV0ENW {
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _bits(&self) -> bool {
|
||||
match *self {
|
||||
INV0ENW::_0 => false,
|
||||
INV0ENW::_1 => true,
|
||||
}
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _INV0ENW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _INV0ENW<'a> {
|
||||
#[doc = r" Writes `variant` to the field"]
|
||||
#[inline]
|
||||
pub fn variant(self, variant: INV0ENW) -> &'a mut W {
|
||||
{
|
||||
self.bit(variant._bits())
|
||||
}
|
||||
}
|
||||
#[doc = "Inverting is disabled."]
|
||||
#[inline]
|
||||
pub fn _0(self) -> &'a mut W {
|
||||
self.variant(INV0ENW::_0)
|
||||
}
|
||||
#[doc = "Inverting is enabled."]
|
||||
#[inline]
|
||||
pub fn _1(self) -> &'a mut W {
|
||||
self.variant(INV0ENW::_1)
|
||||
}
|
||||
#[doc = r" Sets the field bit"]
|
||||
pub fn set_bit(self) -> &'a mut W {
|
||||
self.bit(true)
|
||||
}
|
||||
#[doc = r" Clears the field bit"]
|
||||
pub fn clear_bit(self) -> &'a mut W {
|
||||
self.bit(false)
|
||||
}
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub fn bit(self, value: bool) -> &'a mut W {
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 0;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = "Values that can be written to the field `INV1EN`"]
|
||||
pub enum INV1ENW {
|
||||
#[doc = "Inverting is disabled."]
|
||||
_0,
|
||||
#[doc = "Inverting is enabled."]
|
||||
_1,
|
||||
}
|
||||
impl INV1ENW {
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _bits(&self) -> bool {
|
||||
match *self {
|
||||
INV1ENW::_0 => false,
|
||||
INV1ENW::_1 => true,
|
||||
}
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _INV1ENW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _INV1ENW<'a> {
|
||||
#[doc = r" Writes `variant` to the field"]
|
||||
#[inline]
|
||||
pub fn variant(self, variant: INV1ENW) -> &'a mut W {
|
||||
{
|
||||
self.bit(variant._bits())
|
||||
}
|
||||
}
|
||||
#[doc = "Inverting is disabled."]
|
||||
#[inline]
|
||||
pub fn _0(self) -> &'a mut W {
|
||||
self.variant(INV1ENW::_0)
|
||||
}
|
||||
#[doc = "Inverting is enabled."]
|
||||
#[inline]
|
||||
pub fn _1(self) -> &'a mut W {
|
||||
self.variant(INV1ENW::_1)
|
||||
}
|
||||
#[doc = r" Sets the field bit"]
|
||||
pub fn set_bit(self) -> &'a mut W {
|
||||
self.bit(true)
|
||||
}
|
||||
#[doc = r" Clears the field bit"]
|
||||
pub fn clear_bit(self) -> &'a mut W {
|
||||
self.bit(false)
|
||||
}
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub fn bit(self, value: bool) -> &'a mut W {
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 1;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = "Values that can be written to the field `INV2EN`"]
|
||||
pub enum INV2ENW {
|
||||
#[doc = "Inverting is disabled."]
|
||||
_0,
|
||||
#[doc = "Inverting is enabled."]
|
||||
_1,
|
||||
}
|
||||
impl INV2ENW {
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _bits(&self) -> bool {
|
||||
match *self {
|
||||
INV2ENW::_0 => false,
|
||||
INV2ENW::_1 => true,
|
||||
}
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _INV2ENW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _INV2ENW<'a> {
|
||||
#[doc = r" Writes `variant` to the field"]
|
||||
#[inline]
|
||||
pub fn variant(self, variant: INV2ENW) -> &'a mut W {
|
||||
{
|
||||
self.bit(variant._bits())
|
||||
}
|
||||
}
|
||||
#[doc = "Inverting is disabled."]
|
||||
#[inline]
|
||||
pub fn _0(self) -> &'a mut W {
|
||||
self.variant(INV2ENW::_0)
|
||||
}
|
||||
#[doc = "Inverting is enabled."]
|
||||
#[inline]
|
||||
pub fn _1(self) -> &'a mut W {
|
||||
self.variant(INV2ENW::_1)
|
||||
}
|
||||
#[doc = r" Sets the field bit"]
|
||||
pub fn set_bit(self) -> &'a mut W {
|
||||
self.bit(true)
|
||||
}
|
||||
#[doc = r" Clears the field bit"]
|
||||
pub fn clear_bit(self) -> &'a mut W {
|
||||
self.bit(false)
|
||||
}
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub fn bit(self, value: bool) -> &'a mut W {
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 2;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = "Values that can be written to the field `INV3EN`"]
|
||||
pub enum INV3ENW {
|
||||
#[doc = "Inverting is disabled."]
|
||||
_0,
|
||||
#[doc = "Inverting is enabled."]
|
||||
_1,
|
||||
}
|
||||
impl INV3ENW {
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _bits(&self) -> bool {
|
||||
match *self {
|
||||
INV3ENW::_0 => false,
|
||||
INV3ENW::_1 => true,
|
||||
}
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _INV3ENW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _INV3ENW<'a> {
|
||||
#[doc = r" Writes `variant` to the field"]
|
||||
#[inline]
|
||||
pub fn variant(self, variant: INV3ENW) -> &'a mut W {
|
||||
{
|
||||
self.bit(variant._bits())
|
||||
}
|
||||
}
|
||||
#[doc = "Inverting is disabled."]
|
||||
#[inline]
|
||||
pub fn _0(self) -> &'a mut W {
|
||||
self.variant(INV3ENW::_0)
|
||||
}
|
||||
#[doc = "Inverting is enabled."]
|
||||
#[inline]
|
||||
pub fn _1(self) -> &'a mut W {
|
||||
self.variant(INV3ENW::_1)
|
||||
}
|
||||
#[doc = r" Sets the field bit"]
|
||||
pub fn set_bit(self) -> &'a mut W {
|
||||
self.bit(true)
|
||||
}
|
||||
#[doc = r" Clears the field bit"]
|
||||
pub fn clear_bit(self) -> &'a mut W {
|
||||
self.bit(false)
|
||||
}
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub fn bit(self, value: bool) -> &'a mut W {
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 3;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
#[doc = "Bit 0 - Pair Channels 0 Inverting Enable"]
|
||||
#[inline]
|
||||
pub fn inv0en(&self) -> INV0ENR {
|
||||
INV0ENR::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 0;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
#[doc = "Bit 1 - Pair Channels 1 Inverting Enable"]
|
||||
#[inline]
|
||||
pub fn inv1en(&self) -> INV1ENR {
|
||||
INV1ENR::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 1;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
#[doc = "Bit 2 - Pair Channels 2 Inverting Enable"]
|
||||
#[inline]
|
||||
pub fn inv2en(&self) -> INV2ENR {
|
||||
INV2ENR::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 2;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
#[doc = "Bit 3 - Pair Channels 3 Inverting Enable"]
|
||||
#[inline]
|
||||
pub fn inv3en(&self) -> INV3ENR {
|
||||
INV3ENR::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 3;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 0 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
#[doc = "Bit 0 - Pair Channels 0 Inverting Enable"]
|
||||
#[inline]
|
||||
pub fn inv0en(&mut self) -> _INV0ENW {
|
||||
_INV0ENW { w: self }
|
||||
}
|
||||
#[doc = "Bit 1 - Pair Channels 1 Inverting Enable"]
|
||||
#[inline]
|
||||
pub fn inv1en(&mut self) -> _INV1ENW {
|
||||
_INV1ENW { w: self }
|
||||
}
|
||||
#[doc = "Bit 2 - Pair Channels 2 Inverting Enable"]
|
||||
#[inline]
|
||||
pub fn inv2en(&mut self) -> _INV2ENW {
|
||||
_INV2ENW { w: self }
|
||||
}
|
||||
#[doc = "Bit 3 - Pair Channels 3 Inverting Enable"]
|
||||
#[inline]
|
||||
pub fn inv3en(&mut self) -> _INV3ENW {
|
||||
_INV3ENW { w: self }
|
||||
}
|
||||
}
|
||||
#[doc = "Reader of register INVCTRL"]
|
||||
pub type R = crate::R<u32, super::INVCTRL>;
|
||||
#[doc = "Writer for register INVCTRL"]
|
||||
pub type W = crate::W<u32, super::INVCTRL>;
|
||||
#[doc = "Register INVCTRL `reset()`'s with value 0"]
|
||||
impl crate::ResetValue for super::INVCTRL {
|
||||
type Type = u32;
|
||||
#[inline(always)]
|
||||
fn reset_value() -> Self::Type {
|
||||
0
|
||||
}
|
||||
}
|
||||
#[doc = "Pair Channels 0 Inverting Enable\n\nValue on reset: 0"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum INV0EN_A {
|
||||
#[doc = "0: Inverting is disabled."]
|
||||
_0 = 0,
|
||||
#[doc = "1: Inverting is enabled."]
|
||||
_1 = 1,
|
||||
}
|
||||
impl From<INV0EN_A> for bool {
|
||||
#[inline(always)]
|
||||
fn from(variant: INV0EN_A) -> Self {
|
||||
variant as u8 != 0
|
||||
}
|
||||
}
|
||||
#[doc = "Reader of field `INV0EN`"]
|
||||
pub type INV0EN_R = crate::R<bool, INV0EN_A>;
|
||||
impl INV0EN_R {
|
||||
#[doc = r"Get enumerated values variant"]
|
||||
#[inline(always)]
|
||||
pub fn variant(&self) -> INV0EN_A {
|
||||
match self.bits {
|
||||
false => INV0EN_A::_0,
|
||||
true => INV0EN_A::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline(always)]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == INV0EN_A::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline(always)]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == INV0EN_A::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Write proxy for field `INV0EN`"]
|
||||
pub struct INV0EN_W<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> INV0EN_W<'a> {
|
||||
#[doc = r"Writes `variant` to the field"]
|
||||
#[inline(always)]
|
||||
pub fn variant(self, variant: INV0EN_A) -> &'a mut W {
|
||||
{
|
||||
self.bit(variant.into())
|
||||
}
|
||||
}
|
||||
#[doc = "Inverting is disabled."]
|
||||
#[inline(always)]
|
||||
pub fn _0(self) -> &'a mut W {
|
||||
self.variant(INV0EN_A::_0)
|
||||
}
|
||||
#[doc = "Inverting is enabled."]
|
||||
#[inline(always)]
|
||||
pub fn _1(self) -> &'a mut W {
|
||||
self.variant(INV0EN_A::_1)
|
||||
}
|
||||
#[doc = r"Sets the field bit"]
|
||||
#[inline(always)]
|
||||
pub fn set_bit(self) -> &'a mut W {
|
||||
self.bit(true)
|
||||
}
|
||||
#[doc = r"Clears the field bit"]
|
||||
#[inline(always)]
|
||||
pub fn clear_bit(self) -> &'a mut W {
|
||||
self.bit(false)
|
||||
}
|
||||
#[doc = r"Writes raw bits to the field"]
|
||||
#[inline(always)]
|
||||
pub fn bit(self, value: bool) -> &'a mut W {
|
||||
self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01);
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = "Pair Channels 1 Inverting Enable\n\nValue on reset: 0"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum INV1EN_A {
|
||||
#[doc = "0: Inverting is disabled."]
|
||||
_0 = 0,
|
||||
#[doc = "1: Inverting is enabled."]
|
||||
_1 = 1,
|
||||
}
|
||||
impl From<INV1EN_A> for bool {
|
||||
#[inline(always)]
|
||||
fn from(variant: INV1EN_A) -> Self {
|
||||
variant as u8 != 0
|
||||
}
|
||||
}
|
||||
#[doc = "Reader of field `INV1EN`"]
|
||||
pub type INV1EN_R = crate::R<bool, INV1EN_A>;
|
||||
impl INV1EN_R {
|
||||
#[doc = r"Get enumerated values variant"]
|
||||
#[inline(always)]
|
||||
pub fn variant(&self) -> INV1EN_A {
|
||||
match self.bits {
|
||||
false => INV1EN_A::_0,
|
||||
true => INV1EN_A::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline(always)]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == INV1EN_A::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline(always)]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == INV1EN_A::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Write proxy for field `INV1EN`"]
|
||||
pub struct INV1EN_W<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> INV1EN_W<'a> {
|
||||
#[doc = r"Writes `variant` to the field"]
|
||||
#[inline(always)]
|
||||
pub fn variant(self, variant: INV1EN_A) -> &'a mut W {
|
||||
{
|
||||
self.bit(variant.into())
|
||||
}
|
||||
}
|
||||
#[doc = "Inverting is disabled."]
|
||||
#[inline(always)]
|
||||
pub fn _0(self) -> &'a mut W {
|
||||
self.variant(INV1EN_A::_0)
|
||||
}
|
||||
#[doc = "Inverting is enabled."]
|
||||
#[inline(always)]
|
||||
pub fn _1(self) -> &'a mut W {
|
||||
self.variant(INV1EN_A::_1)
|
||||
}
|
||||
#[doc = r"Sets the field bit"]
|
||||
#[inline(always)]
|
||||
pub fn set_bit(self) -> &'a mut W {
|
||||
self.bit(true)
|
||||
}
|
||||
#[doc = r"Clears the field bit"]
|
||||
#[inline(always)]
|
||||
pub fn clear_bit(self) -> &'a mut W {
|
||||
self.bit(false)
|
||||
}
|
||||
#[doc = r"Writes raw bits to the field"]
|
||||
#[inline(always)]
|
||||
pub fn bit(self, value: bool) -> &'a mut W {
|
||||
self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1);
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = "Pair Channels 2 Inverting Enable\n\nValue on reset: 0"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum INV2EN_A {
|
||||
#[doc = "0: Inverting is disabled."]
|
||||
_0 = 0,
|
||||
#[doc = "1: Inverting is enabled."]
|
||||
_1 = 1,
|
||||
}
|
||||
impl From<INV2EN_A> for bool {
|
||||
#[inline(always)]
|
||||
fn from(variant: INV2EN_A) -> Self {
|
||||
variant as u8 != 0
|
||||
}
|
||||
}
|
||||
#[doc = "Reader of field `INV2EN`"]
|
||||
pub type INV2EN_R = crate::R<bool, INV2EN_A>;
|
||||
impl INV2EN_R {
|
||||
#[doc = r"Get enumerated values variant"]
|
||||
#[inline(always)]
|
||||
pub fn variant(&self) -> INV2EN_A {
|
||||
match self.bits {
|
||||
false => INV2EN_A::_0,
|
||||
true => INV2EN_A::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline(always)]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == INV2EN_A::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline(always)]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == INV2EN_A::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Write proxy for field `INV2EN`"]
|
||||
pub struct INV2EN_W<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> INV2EN_W<'a> {
|
||||
#[doc = r"Writes `variant` to the field"]
|
||||
#[inline(always)]
|
||||
pub fn variant(self, variant: INV2EN_A) -> &'a mut W {
|
||||
{
|
||||
self.bit(variant.into())
|
||||
}
|
||||
}
|
||||
#[doc = "Inverting is disabled."]
|
||||
#[inline(always)]
|
||||
pub fn _0(self) -> &'a mut W {
|
||||
self.variant(INV2EN_A::_0)
|
||||
}
|
||||
#[doc = "Inverting is enabled."]
|
||||
#[inline(always)]
|
||||
pub fn _1(self) -> &'a mut W {
|
||||
self.variant(INV2EN_A::_1)
|
||||
}
|
||||
#[doc = r"Sets the field bit"]
|
||||
#[inline(always)]
|
||||
pub fn set_bit(self) -> &'a mut W {
|
||||
self.bit(true)
|
||||
}
|
||||
#[doc = r"Clears the field bit"]
|
||||
#[inline(always)]
|
||||
pub fn clear_bit(self) -> &'a mut W {
|
||||
self.bit(false)
|
||||
}
|
||||
#[doc = r"Writes raw bits to the field"]
|
||||
#[inline(always)]
|
||||
pub fn bit(self, value: bool) -> &'a mut W {
|
||||
self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u32) & 0x01) << 2);
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = "Pair Channels 3 Inverting Enable\n\nValue on reset: 0"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum INV3EN_A {
|
||||
#[doc = "0: Inverting is disabled."]
|
||||
_0 = 0,
|
||||
#[doc = "1: Inverting is enabled."]
|
||||
_1 = 1,
|
||||
}
|
||||
impl From<INV3EN_A> for bool {
|
||||
#[inline(always)]
|
||||
fn from(variant: INV3EN_A) -> Self {
|
||||
variant as u8 != 0
|
||||
}
|
||||
}
|
||||
#[doc = "Reader of field `INV3EN`"]
|
||||
pub type INV3EN_R = crate::R<bool, INV3EN_A>;
|
||||
impl INV3EN_R {
|
||||
#[doc = r"Get enumerated values variant"]
|
||||
#[inline(always)]
|
||||
pub fn variant(&self) -> INV3EN_A {
|
||||
match self.bits {
|
||||
false => INV3EN_A::_0,
|
||||
true => INV3EN_A::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline(always)]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == INV3EN_A::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline(always)]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == INV3EN_A::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Write proxy for field `INV3EN`"]
|
||||
pub struct INV3EN_W<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> INV3EN_W<'a> {
|
||||
#[doc = r"Writes `variant` to the field"]
|
||||
#[inline(always)]
|
||||
pub fn variant(self, variant: INV3EN_A) -> &'a mut W {
|
||||
{
|
||||
self.bit(variant.into())
|
||||
}
|
||||
}
|
||||
#[doc = "Inverting is disabled."]
|
||||
#[inline(always)]
|
||||
pub fn _0(self) -> &'a mut W {
|
||||
self.variant(INV3EN_A::_0)
|
||||
}
|
||||
#[doc = "Inverting is enabled."]
|
||||
#[inline(always)]
|
||||
pub fn _1(self) -> &'a mut W {
|
||||
self.variant(INV3EN_A::_1)
|
||||
}
|
||||
#[doc = r"Sets the field bit"]
|
||||
#[inline(always)]
|
||||
pub fn set_bit(self) -> &'a mut W {
|
||||
self.bit(true)
|
||||
}
|
||||
#[doc = r"Clears the field bit"]
|
||||
#[inline(always)]
|
||||
pub fn clear_bit(self) -> &'a mut W {
|
||||
self.bit(false)
|
||||
}
|
||||
#[doc = r"Writes raw bits to the field"]
|
||||
#[inline(always)]
|
||||
pub fn bit(self, value: bool) -> &'a mut W {
|
||||
self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u32) & 0x01) << 3);
|
||||
self.w
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = "Bit 0 - Pair Channels 0 Inverting Enable"]
|
||||
#[inline(always)]
|
||||
pub fn inv0en(&self) -> INV0EN_R {
|
||||
INV0EN_R::new((self.bits & 0x01) != 0)
|
||||
}
|
||||
#[doc = "Bit 1 - Pair Channels 1 Inverting Enable"]
|
||||
#[inline(always)]
|
||||
pub fn inv1en(&self) -> INV1EN_R {
|
||||
INV1EN_R::new(((self.bits >> 1) & 0x01) != 0)
|
||||
}
|
||||
#[doc = "Bit 2 - Pair Channels 2 Inverting Enable"]
|
||||
#[inline(always)]
|
||||
pub fn inv2en(&self) -> INV2EN_R {
|
||||
INV2EN_R::new(((self.bits >> 2) & 0x01) != 0)
|
||||
}
|
||||
#[doc = "Bit 3 - Pair Channels 3 Inverting Enable"]
|
||||
#[inline(always)]
|
||||
pub fn inv3en(&self) -> INV3EN_R {
|
||||
INV3EN_R::new(((self.bits >> 3) & 0x01) != 0)
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = "Bit 0 - Pair Channels 0 Inverting Enable"]
|
||||
#[inline(always)]
|
||||
pub fn inv0en(&mut self) -> INV0EN_W {
|
||||
INV0EN_W { w: self }
|
||||
}
|
||||
#[doc = "Bit 1 - Pair Channels 1 Inverting Enable"]
|
||||
#[inline(always)]
|
||||
pub fn inv1en(&mut self) -> INV1EN_W {
|
||||
INV1EN_W { w: self }
|
||||
}
|
||||
#[doc = "Bit 2 - Pair Channels 2 Inverting Enable"]
|
||||
#[inline(always)]
|
||||
pub fn inv2en(&mut self) -> INV2EN_W {
|
||||
INV2EN_W { w: self }
|
||||
}
|
||||
#[doc = "Bit 3 - Pair Channels 3 Inverting Enable"]
|
||||
#[inline(always)]
|
||||
pub fn inv3en(&mut self) -> INV3EN_W {
|
||||
INV3EN_W { w: self }
|
||||
}
|
||||
}
|
||||
|
143
src/ftm1/mod_.rs
143
src/ftm1/mod_.rs
@ -1,103 +1,40 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::MOD {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
#[doc = r" Value of the field"]
|
||||
pub struct MODR {
|
||||
bits: u16,
|
||||
}
|
||||
impl MODR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u16 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _MODW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _MODW<'a> {
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(self, value: u16) -> &'a mut W {
|
||||
const MASK: u16 = 65535;
|
||||
const OFFSET: u8 = 0;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
#[doc = "Bits 0:15 - MOD"]
|
||||
#[inline]
|
||||
pub fn mod_(&self) -> MODR {
|
||||
let bits = {
|
||||
const MASK: u16 = 65535;
|
||||
const OFFSET: u8 = 0;
|
||||
((self.bits >> OFFSET) & MASK as u32) as u16
|
||||
};
|
||||
MODR { bits }
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 0 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
#[doc = "Bits 0:15 - MOD"]
|
||||
#[inline]
|
||||
pub fn mod_(&mut self) -> _MODW {
|
||||
_MODW { w: self }
|
||||
}
|
||||
}
|
||||
#[doc = "Reader of register MOD"]
|
||||
pub type R = crate::R<u32, super::MOD>;
|
||||
#[doc = "Writer for register MOD"]
|
||||
pub type W = crate::W<u32, super::MOD>;
|
||||
#[doc = "Register MOD `reset()`'s with value 0"]
|
||||
impl crate::ResetValue for super::MOD {
|
||||
type Type = u32;
|
||||
#[inline(always)]
|
||||
fn reset_value() -> Self::Type {
|
||||
0
|
||||
}
|
||||
}
|
||||
#[doc = "Reader of field `MOD`"]
|
||||
pub type MOD_R = crate::R<u16, u16>;
|
||||
#[doc = "Write proxy for field `MOD`"]
|
||||
pub struct MOD_W<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> MOD_W<'a> {
|
||||
#[doc = r"Writes raw bits to the field"]
|
||||
#[inline(always)]
|
||||
pub unsafe fn bits(self, value: u16) -> &'a mut W {
|
||||
self.w.bits = (self.w.bits & !0xffff) | ((value as u32) & 0xffff);
|
||||
self.w
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = "Bits 0:15 - MOD"]
|
||||
#[inline(always)]
|
||||
pub fn mod_(&self) -> MOD_R {
|
||||
MOD_R::new((self.bits & 0xffff) as u16)
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = "Bits 0:15 - MOD"]
|
||||
#[inline(always)]
|
||||
pub fn mod_(&mut self) -> MOD_W {
|
||||
MOD_W { w: self }
|
||||
}
|
||||
}
|
||||
|
64
src/ftm1/mod_mirror.rs
Normal file
64
src/ftm1/mod_mirror.rs
Normal file
@ -0,0 +1,64 @@
|
||||
#[doc = "Reader of register MOD_MIRROR"]
|
||||
pub type R = crate::R<u32, super::MOD_MIRROR>;
|
||||
#[doc = "Writer for register MOD_MIRROR"]
|
||||
pub type W = crate::W<u32, super::MOD_MIRROR>;
|
||||
#[doc = "Register MOD_MIRROR `reset()`'s with value 0"]
|
||||
impl crate::ResetValue for super::MOD_MIRROR {
|
||||
type Type = u32;
|
||||
#[inline(always)]
|
||||
fn reset_value() -> Self::Type {
|
||||
0
|
||||
}
|
||||
}
|
||||
#[doc = "Reader of field `FRACMOD`"]
|
||||
pub type FRACMOD_R = crate::R<u8, u8>;
|
||||
#[doc = "Write proxy for field `FRACMOD`"]
|
||||
pub struct FRACMOD_W<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> FRACMOD_W<'a> {
|
||||
#[doc = r"Writes raw bits to the field"]
|
||||
#[inline(always)]
|
||||
pub unsafe fn bits(self, value: u8) -> &'a mut W {
|
||||
self.w.bits = (self.w.bits & !(0x1f << 11)) | (((value as u32) & 0x1f) << 11);
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = "Reader of field `MOD`"]
|
||||
pub type MOD_R = crate::R<u16, u16>;
|
||||
#[doc = "Write proxy for field `MOD`"]
|
||||
pub struct MOD_W<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> MOD_W<'a> {
|
||||
#[doc = r"Writes raw bits to the field"]
|
||||
#[inline(always)]
|
||||
pub unsafe fn bits(self, value: u16) -> &'a mut W {
|
||||
self.w.bits = (self.w.bits & !(0xffff << 16)) | (((value as u32) & 0xffff) << 16);
|
||||
self.w
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = "Bits 11:15 - Modulo Fractional Value"]
|
||||
#[inline(always)]
|
||||
pub fn fracmod(&self) -> FRACMOD_R {
|
||||
FRACMOD_R::new(((self.bits >> 11) & 0x1f) as u8)
|
||||
}
|
||||
#[doc = "Bits 16:31 - Mirror of the Modulo Integer Value"]
|
||||
#[inline(always)]
|
||||
pub fn mod_(&self) -> MOD_R {
|
||||
MOD_R::new(((self.bits >> 16) & 0xffff) as u16)
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = "Bits 11:15 - Modulo Fractional Value"]
|
||||
#[inline(always)]
|
||||
pub fn fracmod(&mut self) -> FRACMOD_W {
|
||||
FRACMOD_W { w: self }
|
||||
}
|
||||
#[doc = "Bits 16:31 - Mirror of the Modulo Integer Value"]
|
||||
#[inline(always)]
|
||||
pub fn mod_(&mut self) -> MOD_W {
|
||||
MOD_W { w: self }
|
||||
}
|
||||
}
|
1392
src/ftm1/mode.rs
1392
src/ftm1/mode.rs
File diff suppressed because it is too large
Load Diff
1710
src/ftm1/outinit.rs
1710
src/ftm1/outinit.rs
File diff suppressed because it is too large
Load Diff
1710
src/ftm1/outmask.rs
1710
src/ftm1/outmask.rs
File diff suppressed because it is too large
Load Diff
@ -1,264 +1,153 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PAIR0DEADTIME {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
#[doc = r" Value of the field"]
|
||||
pub struct DTVALR {
|
||||
bits: u8,
|
||||
}
|
||||
impl DTVALR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u8 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `DTPS`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum DTPSR {
|
||||
#[doc = "Divide the FTM input clock by 1."]
|
||||
_0X,
|
||||
#[doc = "Divide the FTM input clock by 4."]
|
||||
_10,
|
||||
#[doc = "Divide the FTM input clock by 16."]
|
||||
_11,
|
||||
#[doc = r" Reserved"]
|
||||
_Reserved(u8),
|
||||
}
|
||||
impl DTPSR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u8 {
|
||||
match *self {
|
||||
DTPSR::_0X => 0,
|
||||
DTPSR::_10 => 2,
|
||||
DTPSR::_11 => 3,
|
||||
DTPSR::_Reserved(bits) => bits,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: u8) -> DTPSR {
|
||||
match value {
|
||||
0 => DTPSR::_0X,
|
||||
2 => DTPSR::_10,
|
||||
3 => DTPSR::_11,
|
||||
i => DTPSR::_Reserved(i),
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0X`"]
|
||||
#[inline]
|
||||
pub fn is_0x(&self) -> bool {
|
||||
*self == DTPSR::_0X
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_10`"]
|
||||
#[inline]
|
||||
pub fn is_10(&self) -> bool {
|
||||
*self == DTPSR::_10
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_11`"]
|
||||
#[inline]
|
||||
pub fn is_11(&self) -> bool {
|
||||
*self == DTPSR::_11
|
||||
}
|
||||
}
|
||||
#[doc = r" Value of the field"]
|
||||
pub struct DTVALEXR {
|
||||
bits: u8,
|
||||
}
|
||||
impl DTVALEXR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u8 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _DTVALW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _DTVALW<'a> {
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(self, value: u8) -> &'a mut W {
|
||||
const MASK: u8 = 63;
|
||||
const OFFSET: u8 = 0;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = "Values that can be written to the field `DTPS`"]
|
||||
pub enum DTPSW {
|
||||
#[doc = "Divide the FTM input clock by 1."]
|
||||
_0X,
|
||||
#[doc = "Divide the FTM input clock by 4."]
|
||||
_10,
|
||||
#[doc = "Divide the FTM input clock by 16."]
|
||||
_11,
|
||||
}
|
||||
impl DTPSW {
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _bits(&self) -> u8 {
|
||||
match *self {
|
||||
DTPSW::_0X => 0,
|
||||
DTPSW::_10 => 2,
|
||||
DTPSW::_11 => 3,
|
||||
}
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _DTPSW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _DTPSW<'a> {
|
||||
#[doc = r" Writes `variant` to the field"]
|
||||
#[inline]
|
||||
pub fn variant(self, variant: DTPSW) -> &'a mut W {
|
||||
unsafe { self.bits(variant._bits()) }
|
||||
}
|
||||
#[doc = "Divide the FTM input clock by 1."]
|
||||
#[inline]
|
||||
pub fn _0x(self) -> &'a mut W {
|
||||
self.variant(DTPSW::_0X)
|
||||
}
|
||||
#[doc = "Divide the FTM input clock by 4."]
|
||||
#[inline]
|
||||
pub fn _10(self) -> &'a mut W {
|
||||
self.variant(DTPSW::_10)
|
||||
}
|
||||
#[doc = "Divide the FTM input clock by 16."]
|
||||
#[inline]
|
||||
pub fn _11(self) -> &'a mut W {
|
||||
self.variant(DTPSW::_11)
|
||||
}
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(self, value: u8) -> &'a mut W {
|
||||
const MASK: u8 = 3;
|
||||
const OFFSET: u8 = 6;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _DTVALEXW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _DTVALEXW<'a> {
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(self, value: u8) -> &'a mut W {
|
||||
const MASK: u8 = 15;
|
||||
const OFFSET: u8 = 16;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
#[doc = "Bits 0:5 - Deadtime Value"]
|
||||
#[inline]
|
||||
pub fn dtval(&self) -> DTVALR {
|
||||
let bits = {
|
||||
const MASK: u8 = 63;
|
||||
const OFFSET: u8 = 0;
|
||||
((self.bits >> OFFSET) & MASK as u32) as u8
|
||||
};
|
||||
DTVALR { bits }
|
||||
}
|
||||
#[doc = "Bits 6:7 - Deadtime Prescaler Value"]
|
||||
#[inline]
|
||||
pub fn dtps(&self) -> DTPSR {
|
||||
DTPSR::_from({
|
||||
const MASK: u8 = 3;
|
||||
const OFFSET: u8 = 6;
|
||||
((self.bits >> OFFSET) & MASK as u32) as u8
|
||||
})
|
||||
}
|
||||
#[doc = "Bits 16:19 - Extended Deadtime Value"]
|
||||
#[inline]
|
||||
pub fn dtvalex(&self) -> DTVALEXR {
|
||||
let bits = {
|
||||
const MASK: u8 = 15;
|
||||
const OFFSET: u8 = 16;
|
||||
((self.bits >> OFFSET) & MASK as u32) as u8
|
||||
};
|
||||
DTVALEXR { bits }
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 0 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
#[doc = "Bits 0:5 - Deadtime Value"]
|
||||
#[inline]
|
||||
pub fn dtval(&mut self) -> _DTVALW {
|
||||
_DTVALW { w: self }
|
||||
}
|
||||
#[doc = "Bits 6:7 - Deadtime Prescaler Value"]
|
||||
#[inline]
|
||||
pub fn dtps(&mut self) -> _DTPSW {
|
||||
_DTPSW { w: self }
|
||||
}
|
||||
#[doc = "Bits 16:19 - Extended Deadtime Value"]
|
||||
#[inline]
|
||||
pub fn dtvalex(&mut self) -> _DTVALEXW {
|
||||
_DTVALEXW { w: self }
|
||||
}
|
||||
}
|
||||
#[doc = "Reader of register PAIR0DEADTIME"]
|
||||
pub type R = crate::R<u32, super::PAIR0DEADTIME>;
|
||||
#[doc = "Writer for register PAIR0DEADTIME"]
|
||||
pub type W = crate::W<u32, super::PAIR0DEADTIME>;
|
||||
#[doc = "Register PAIR0DEADTIME `reset()`'s with value 0"]
|
||||
impl crate::ResetValue for super::PAIR0DEADTIME {
|
||||
type Type = u32;
|
||||
#[inline(always)]
|
||||
fn reset_value() -> Self::Type {
|
||||
0
|
||||
}
|
||||
}
|
||||
#[doc = "Reader of field `DTVAL`"]
|
||||
pub type DTVAL_R = crate::R<u8, u8>;
|
||||
#[doc = "Write proxy for field `DTVAL`"]
|
||||
pub struct DTVAL_W<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> DTVAL_W<'a> {
|
||||
#[doc = r"Writes raw bits to the field"]
|
||||
#[inline(always)]
|
||||
pub unsafe fn bits(self, value: u8) -> &'a mut W {
|
||||
self.w.bits = (self.w.bits & !0x3f) | ((value as u32) & 0x3f);
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = "Deadtime Prescaler Value\n\nValue on reset: 0"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
#[repr(u8)]
|
||||
pub enum DTPS_A {
|
||||
#[doc = "0: Divide the FTM input clock by 1."]
|
||||
_0X = 0,
|
||||
#[doc = "2: Divide the FTM input clock by 4."]
|
||||
_10 = 2,
|
||||
#[doc = "3: Divide the FTM input clock by 16."]
|
||||
_11 = 3,
|
||||
}
|
||||
impl From<DTPS_A> for u8 {
|
||||
#[inline(always)]
|
||||
fn from(variant: DTPS_A) -> Self {
|
||||
variant as _
|
||||
}
|
||||
}
|
||||
#[doc = "Reader of field `DTPS`"]
|
||||
pub type DTPS_R = crate::R<u8, DTPS_A>;
|
||||
impl DTPS_R {
|
||||
#[doc = r"Get enumerated values variant"]
|
||||
#[inline(always)]
|
||||
pub fn variant(&self) -> crate::Variant<u8, DTPS_A> {
|
||||
use crate::Variant::*;
|
||||
match self.bits {
|
||||
0 => Val(DTPS_A::_0X),
|
||||
2 => Val(DTPS_A::_10),
|
||||
3 => Val(DTPS_A::_11),
|
||||
i => Res(i),
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0X`"]
|
||||
#[inline(always)]
|
||||
pub fn is_0x(&self) -> bool {
|
||||
*self == DTPS_A::_0X
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_10`"]
|
||||
#[inline(always)]
|
||||
pub fn is_10(&self) -> bool {
|
||||
*self == DTPS_A::_10
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_11`"]
|
||||
#[inline(always)]
|
||||
pub fn is_11(&self) -> bool {
|
||||
*self == DTPS_A::_11
|
||||
}
|
||||
}
|
||||
#[doc = "Write proxy for field `DTPS`"]
|
||||
pub struct DTPS_W<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> DTPS_W<'a> {
|
||||
#[doc = r"Writes `variant` to the field"]
|
||||
#[inline(always)]
|
||||
pub fn variant(self, variant: DTPS_A) -> &'a mut W {
|
||||
unsafe { self.bits(variant.into()) }
|
||||
}
|
||||
#[doc = "Divide the FTM input clock by 1."]
|
||||
#[inline(always)]
|
||||
pub fn _0x(self) -> &'a mut W {
|
||||
self.variant(DTPS_A::_0X)
|
||||
}
|
||||
#[doc = "Divide the FTM input clock by 4."]
|
||||
#[inline(always)]
|
||||
pub fn _10(self) -> &'a mut W {
|
||||
self.variant(DTPS_A::_10)
|
||||
}
|
||||
#[doc = "Divide the FTM input clock by 16."]
|
||||
#[inline(always)]
|
||||
pub fn _11(self) -> &'a mut W {
|
||||
self.variant(DTPS_A::_11)
|
||||
}
|
||||
#[doc = r"Writes raw bits to the field"]
|
||||
#[inline(always)]
|
||||
pub unsafe fn bits(self, value: u8) -> &'a mut W {
|
||||
self.w.bits = (self.w.bits & !(0x03 << 6)) | (((value as u32) & 0x03) << 6);
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = "Reader of field `DTVALEX`"]
|
||||
pub type DTVALEX_R = crate::R<u8, u8>;
|
||||
#[doc = "Write proxy for field `DTVALEX`"]
|
||||
pub struct DTVALEX_W<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> DTVALEX_W<'a> {
|
||||
#[doc = r"Writes raw bits to the field"]
|
||||
#[inline(always)]
|
||||
pub unsafe fn bits(self, value: u8) -> &'a mut W {
|
||||
self.w.bits = (self.w.bits & !(0x0f << 16)) | (((value as u32) & 0x0f) << 16);
|
||||
self.w
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = "Bits 0:5 - Deadtime Value"]
|
||||
#[inline(always)]
|
||||
pub fn dtval(&self) -> DTVAL_R {
|
||||
DTVAL_R::new((self.bits & 0x3f) as u8)
|
||||
}
|
||||
#[doc = "Bits 6:7 - Deadtime Prescaler Value"]
|
||||
#[inline(always)]
|
||||
pub fn dtps(&self) -> DTPS_R {
|
||||
DTPS_R::new(((self.bits >> 6) & 0x03) as u8)
|
||||
}
|
||||
#[doc = "Bits 16:19 - Extended Deadtime Value"]
|
||||
#[inline(always)]
|
||||
pub fn dtvalex(&self) -> DTVALEX_R {
|
||||
DTVALEX_R::new(((self.bits >> 16) & 0x0f) as u8)
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = "Bits 0:5 - Deadtime Value"]
|
||||
#[inline(always)]
|
||||
pub fn dtval(&mut self) -> DTVAL_W {
|
||||
DTVAL_W { w: self }
|
||||
}
|
||||
#[doc = "Bits 6:7 - Deadtime Prescaler Value"]
|
||||
#[inline(always)]
|
||||
pub fn dtps(&mut self) -> DTPS_W {
|
||||
DTPS_W { w: self }
|
||||
}
|
||||
#[doc = "Bits 16:19 - Extended Deadtime Value"]
|
||||
#[inline(always)]
|
||||
pub fn dtvalex(&mut self) -> DTVALEX_W {
|
||||
DTVALEX_W { w: self }
|
||||
}
|
||||
}
|
||||
|
@ -1,264 +1,153 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PAIR1DEADTIME {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
#[doc = r" Value of the field"]
|
||||
pub struct DTVALR {
|
||||
bits: u8,
|
||||
}
|
||||
impl DTVALR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u8 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `DTPS`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum DTPSR {
|
||||
#[doc = "Divide the FTM input clock by 1."]
|
||||
_0X,
|
||||
#[doc = "Divide the FTM input clock by 4."]
|
||||
_10,
|
||||
#[doc = "Divide the FTM input clock by 16."]
|
||||
_11,
|
||||
#[doc = r" Reserved"]
|
||||
_Reserved(u8),
|
||||
}
|
||||
impl DTPSR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u8 {
|
||||
match *self {
|
||||
DTPSR::_0X => 0,
|
||||
DTPSR::_10 => 2,
|
||||
DTPSR::_11 => 3,
|
||||
DTPSR::_Reserved(bits) => bits,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: u8) -> DTPSR {
|
||||
match value {
|
||||
0 => DTPSR::_0X,
|
||||
2 => DTPSR::_10,
|
||||
3 => DTPSR::_11,
|
||||
i => DTPSR::_Reserved(i),
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0X`"]
|
||||
#[inline]
|
||||
pub fn is_0x(&self) -> bool {
|
||||
*self == DTPSR::_0X
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_10`"]
|
||||
#[inline]
|
||||
pub fn is_10(&self) -> bool {
|
||||
*self == DTPSR::_10
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_11`"]
|
||||
#[inline]
|
||||
pub fn is_11(&self) -> bool {
|
||||
*self == DTPSR::_11
|
||||
}
|
||||
}
|
||||
#[doc = r" Value of the field"]
|
||||
pub struct DTVALEXR {
|
||||
bits: u8,
|
||||
}
|
||||
impl DTVALEXR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u8 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _DTVALW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _DTVALW<'a> {
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(self, value: u8) -> &'a mut W {
|
||||
const MASK: u8 = 63;
|
||||
const OFFSET: u8 = 0;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = "Values that can be written to the field `DTPS`"]
|
||||
pub enum DTPSW {
|
||||
#[doc = "Divide the FTM input clock by 1."]
|
||||
_0X,
|
||||
#[doc = "Divide the FTM input clock by 4."]
|
||||
_10,
|
||||
#[doc = "Divide the FTM input clock by 16."]
|
||||
_11,
|
||||
}
|
||||
impl DTPSW {
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _bits(&self) -> u8 {
|
||||
match *self {
|
||||
DTPSW::_0X => 0,
|
||||
DTPSW::_10 => 2,
|
||||
DTPSW::_11 => 3,
|
||||
}
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _DTPSW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _DTPSW<'a> {
|
||||
#[doc = r" Writes `variant` to the field"]
|
||||
#[inline]
|
||||
pub fn variant(self, variant: DTPSW) -> &'a mut W {
|
||||
unsafe { self.bits(variant._bits()) }
|
||||
}
|
||||
#[doc = "Divide the FTM input clock by 1."]
|
||||
#[inline]
|
||||
pub fn _0x(self) -> &'a mut W {
|
||||
self.variant(DTPSW::_0X)
|
||||
}
|
||||
#[doc = "Divide the FTM input clock by 4."]
|
||||
#[inline]
|
||||
pub fn _10(self) -> &'a mut W {
|
||||
self.variant(DTPSW::_10)
|
||||
}
|
||||
#[doc = "Divide the FTM input clock by 16."]
|
||||
#[inline]
|
||||
pub fn _11(self) -> &'a mut W {
|
||||
self.variant(DTPSW::_11)
|
||||
}
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(self, value: u8) -> &'a mut W {
|
||||
const MASK: u8 = 3;
|
||||
const OFFSET: u8 = 6;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _DTVALEXW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _DTVALEXW<'a> {
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(self, value: u8) -> &'a mut W {
|
||||
const MASK: u8 = 15;
|
||||
const OFFSET: u8 = 16;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
#[doc = "Bits 0:5 - Deadtime Value"]
|
||||
#[inline]
|
||||
pub fn dtval(&self) -> DTVALR {
|
||||
let bits = {
|
||||
const MASK: u8 = 63;
|
||||
const OFFSET: u8 = 0;
|
||||
((self.bits >> OFFSET) & MASK as u32) as u8
|
||||
};
|
||||
DTVALR { bits }
|
||||
}
|
||||
#[doc = "Bits 6:7 - Deadtime Prescaler Value"]
|
||||
#[inline]
|
||||
pub fn dtps(&self) -> DTPSR {
|
||||
DTPSR::_from({
|
||||
const MASK: u8 = 3;
|
||||
const OFFSET: u8 = 6;
|
||||
((self.bits >> OFFSET) & MASK as u32) as u8
|
||||
})
|
||||
}
|
||||
#[doc = "Bits 16:19 - Extended Deadtime Value"]
|
||||
#[inline]
|
||||
pub fn dtvalex(&self) -> DTVALEXR {
|
||||
let bits = {
|
||||
const MASK: u8 = 15;
|
||||
const OFFSET: u8 = 16;
|
||||
((self.bits >> OFFSET) & MASK as u32) as u8
|
||||
};
|
||||
DTVALEXR { bits }
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 0 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
#[doc = "Bits 0:5 - Deadtime Value"]
|
||||
#[inline]
|
||||
pub fn dtval(&mut self) -> _DTVALW {
|
||||
_DTVALW { w: self }
|
||||
}
|
||||
#[doc = "Bits 6:7 - Deadtime Prescaler Value"]
|
||||
#[inline]
|
||||
pub fn dtps(&mut self) -> _DTPSW {
|
||||
_DTPSW { w: self }
|
||||
}
|
||||
#[doc = "Bits 16:19 - Extended Deadtime Value"]
|
||||
#[inline]
|
||||
pub fn dtvalex(&mut self) -> _DTVALEXW {
|
||||
_DTVALEXW { w: self }
|
||||
}
|
||||
}
|
||||
#[doc = "Reader of register PAIR1DEADTIME"]
|
||||
pub type R = crate::R<u32, super::PAIR1DEADTIME>;
|
||||
#[doc = "Writer for register PAIR1DEADTIME"]
|
||||
pub type W = crate::W<u32, super::PAIR1DEADTIME>;
|
||||
#[doc = "Register PAIR1DEADTIME `reset()`'s with value 0"]
|
||||
impl crate::ResetValue for super::PAIR1DEADTIME {
|
||||
type Type = u32;
|
||||
#[inline(always)]
|
||||
fn reset_value() -> Self::Type {
|
||||
0
|
||||
}
|
||||
}
|
||||
#[doc = "Reader of field `DTVAL`"]
|
||||
pub type DTVAL_R = crate::R<u8, u8>;
|
||||
#[doc = "Write proxy for field `DTVAL`"]
|
||||
pub struct DTVAL_W<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> DTVAL_W<'a> {
|
||||
#[doc = r"Writes raw bits to the field"]
|
||||
#[inline(always)]
|
||||
pub unsafe fn bits(self, value: u8) -> &'a mut W {
|
||||
self.w.bits = (self.w.bits & !0x3f) | ((value as u32) & 0x3f);
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = "Deadtime Prescaler Value\n\nValue on reset: 0"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
#[repr(u8)]
|
||||
pub enum DTPS_A {
|
||||
#[doc = "0: Divide the FTM input clock by 1."]
|
||||
_0X = 0,
|
||||
#[doc = "2: Divide the FTM input clock by 4."]
|
||||
_10 = 2,
|
||||
#[doc = "3: Divide the FTM input clock by 16."]
|
||||
_11 = 3,
|
||||
}
|
||||
impl From<DTPS_A> for u8 {
|
||||
#[inline(always)]
|
||||
fn from(variant: DTPS_A) -> Self {
|
||||
variant as _
|
||||
}
|
||||
}
|
||||
#[doc = "Reader of field `DTPS`"]
|
||||
pub type DTPS_R = crate::R<u8, DTPS_A>;
|
||||
impl DTPS_R {
|
||||
#[doc = r"Get enumerated values variant"]
|
||||
#[inline(always)]
|
||||
pub fn variant(&self) -> crate::Variant<u8, DTPS_A> {
|
||||
use crate::Variant::*;
|
||||
match self.bits {
|
||||
0 => Val(DTPS_A::_0X),
|
||||
2 => Val(DTPS_A::_10),
|
||||
3 => Val(DTPS_A::_11),
|
||||
i => Res(i),
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0X`"]
|
||||
#[inline(always)]
|
||||
pub fn is_0x(&self) -> bool {
|
||||
*self == DTPS_A::_0X
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_10`"]
|
||||
#[inline(always)]
|
||||
pub fn is_10(&self) -> bool {
|
||||
*self == DTPS_A::_10
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_11`"]
|
||||
#[inline(always)]
|
||||
pub fn is_11(&self) -> bool {
|
||||
*self == DTPS_A::_11
|
||||
}
|
||||
}
|
||||
#[doc = "Write proxy for field `DTPS`"]
|
||||
pub struct DTPS_W<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> DTPS_W<'a> {
|
||||
#[doc = r"Writes `variant` to the field"]
|
||||
#[inline(always)]
|
||||
pub fn variant(self, variant: DTPS_A) -> &'a mut W {
|
||||
unsafe { self.bits(variant.into()) }
|
||||
}
|
||||
#[doc = "Divide the FTM input clock by 1."]
|
||||
#[inline(always)]
|
||||
pub fn _0x(self) -> &'a mut W {
|
||||
self.variant(DTPS_A::_0X)
|
||||
}
|
||||
#[doc = "Divide the FTM input clock by 4."]
|
||||
#[inline(always)]
|
||||
pub fn _10(self) -> &'a mut W {
|
||||
self.variant(DTPS_A::_10)
|
||||
}
|
||||
#[doc = "Divide the FTM input clock by 16."]
|
||||
#[inline(always)]
|
||||
pub fn _11(self) -> &'a mut W {
|
||||
self.variant(DTPS_A::_11)
|
||||
}
|
||||
#[doc = r"Writes raw bits to the field"]
|
||||
#[inline(always)]
|
||||
pub unsafe fn bits(self, value: u8) -> &'a mut W {
|
||||
self.w.bits = (self.w.bits & !(0x03 << 6)) | (((value as u32) & 0x03) << 6);
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = "Reader of field `DTVALEX`"]
|
||||
pub type DTVALEX_R = crate::R<u8, u8>;
|
||||
#[doc = "Write proxy for field `DTVALEX`"]
|
||||
pub struct DTVALEX_W<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> DTVALEX_W<'a> {
|
||||
#[doc = r"Writes raw bits to the field"]
|
||||
#[inline(always)]
|
||||
pub unsafe fn bits(self, value: u8) -> &'a mut W {
|
||||
self.w.bits = (self.w.bits & !(0x0f << 16)) | (((value as u32) & 0x0f) << 16);
|
||||
self.w
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = "Bits 0:5 - Deadtime Value"]
|
||||
#[inline(always)]
|
||||
pub fn dtval(&self) -> DTVAL_R {
|
||||
DTVAL_R::new((self.bits & 0x3f) as u8)
|
||||
}
|
||||
#[doc = "Bits 6:7 - Deadtime Prescaler Value"]
|
||||
#[inline(always)]
|
||||
pub fn dtps(&self) -> DTPS_R {
|
||||
DTPS_R::new(((self.bits >> 6) & 0x03) as u8)
|
||||
}
|
||||
#[doc = "Bits 16:19 - Extended Deadtime Value"]
|
||||
#[inline(always)]
|
||||
pub fn dtvalex(&self) -> DTVALEX_R {
|
||||
DTVALEX_R::new(((self.bits >> 16) & 0x0f) as u8)
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = "Bits 0:5 - Deadtime Value"]
|
||||
#[inline(always)]
|
||||
pub fn dtval(&mut self) -> DTVAL_W {
|
||||
DTVAL_W { w: self }
|
||||
}
|
||||
#[doc = "Bits 6:7 - Deadtime Prescaler Value"]
|
||||
#[inline(always)]
|
||||
pub fn dtps(&mut self) -> DTPS_W {
|
||||
DTPS_W { w: self }
|
||||
}
|
||||
#[doc = "Bits 16:19 - Extended Deadtime Value"]
|
||||
#[inline(always)]
|
||||
pub fn dtvalex(&mut self) -> DTVALEX_W {
|
||||
DTVALEX_W { w: self }
|
||||
}
|
||||
}
|
||||
|
@ -1,264 +1,153 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PAIR2DEADTIME {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
#[doc = r" Value of the field"]
|
||||
pub struct DTVALR {
|
||||
bits: u8,
|
||||
}
|
||||
impl DTVALR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u8 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `DTPS`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum DTPSR {
|
||||
#[doc = "Divide the FTM input clock by 1."]
|
||||
_0X,
|
||||
#[doc = "Divide the FTM input clock by 4."]
|
||||
_10,
|
||||
#[doc = "Divide the FTM input clock by 16."]
|
||||
_11,
|
||||
#[doc = r" Reserved"]
|
||||
_Reserved(u8),
|
||||
}
|
||||
impl DTPSR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u8 {
|
||||
match *self {
|
||||
DTPSR::_0X => 0,
|
||||
DTPSR::_10 => 2,
|
||||
DTPSR::_11 => 3,
|
||||
DTPSR::_Reserved(bits) => bits,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: u8) -> DTPSR {
|
||||
match value {
|
||||
0 => DTPSR::_0X,
|
||||
2 => DTPSR::_10,
|
||||
3 => DTPSR::_11,
|
||||
i => DTPSR::_Reserved(i),
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0X`"]
|
||||
#[inline]
|
||||
pub fn is_0x(&self) -> bool {
|
||||
*self == DTPSR::_0X
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_10`"]
|
||||
#[inline]
|
||||
pub fn is_10(&self) -> bool {
|
||||
*self == DTPSR::_10
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_11`"]
|
||||
#[inline]
|
||||
pub fn is_11(&self) -> bool {
|
||||
*self == DTPSR::_11
|
||||
}
|
||||
}
|
||||
#[doc = r" Value of the field"]
|
||||
pub struct DTVALEXR {
|
||||
bits: u8,
|
||||
}
|
||||
impl DTVALEXR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u8 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _DTVALW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _DTVALW<'a> {
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(self, value: u8) -> &'a mut W {
|
||||
const MASK: u8 = 63;
|
||||
const OFFSET: u8 = 0;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = "Values that can be written to the field `DTPS`"]
|
||||
pub enum DTPSW {
|
||||
#[doc = "Divide the FTM input clock by 1."]
|
||||
_0X,
|
||||
#[doc = "Divide the FTM input clock by 4."]
|
||||
_10,
|
||||
#[doc = "Divide the FTM input clock by 16."]
|
||||
_11,
|
||||
}
|
||||
impl DTPSW {
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _bits(&self) -> u8 {
|
||||
match *self {
|
||||
DTPSW::_0X => 0,
|
||||
DTPSW::_10 => 2,
|
||||
DTPSW::_11 => 3,
|
||||
}
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _DTPSW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _DTPSW<'a> {
|
||||
#[doc = r" Writes `variant` to the field"]
|
||||
#[inline]
|
||||
pub fn variant(self, variant: DTPSW) -> &'a mut W {
|
||||
unsafe { self.bits(variant._bits()) }
|
||||
}
|
||||
#[doc = "Divide the FTM input clock by 1."]
|
||||
#[inline]
|
||||
pub fn _0x(self) -> &'a mut W {
|
||||
self.variant(DTPSW::_0X)
|
||||
}
|
||||
#[doc = "Divide the FTM input clock by 4."]
|
||||
#[inline]
|
||||
pub fn _10(self) -> &'a mut W {
|
||||
self.variant(DTPSW::_10)
|
||||
}
|
||||
#[doc = "Divide the FTM input clock by 16."]
|
||||
#[inline]
|
||||
pub fn _11(self) -> &'a mut W {
|
||||
self.variant(DTPSW::_11)
|
||||
}
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(self, value: u8) -> &'a mut W {
|
||||
const MASK: u8 = 3;
|
||||
const OFFSET: u8 = 6;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _DTVALEXW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _DTVALEXW<'a> {
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(self, value: u8) -> &'a mut W {
|
||||
const MASK: u8 = 15;
|
||||
const OFFSET: u8 = 16;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
#[doc = "Bits 0:5 - Deadtime Value"]
|
||||
#[inline]
|
||||
pub fn dtval(&self) -> DTVALR {
|
||||
let bits = {
|
||||
const MASK: u8 = 63;
|
||||
const OFFSET: u8 = 0;
|
||||
((self.bits >> OFFSET) & MASK as u32) as u8
|
||||
};
|
||||
DTVALR { bits }
|
||||
}
|
||||
#[doc = "Bits 6:7 - Deadtime Prescaler Value"]
|
||||
#[inline]
|
||||
pub fn dtps(&self) -> DTPSR {
|
||||
DTPSR::_from({
|
||||
const MASK: u8 = 3;
|
||||
const OFFSET: u8 = 6;
|
||||
((self.bits >> OFFSET) & MASK as u32) as u8
|
||||
})
|
||||
}
|
||||
#[doc = "Bits 16:19 - Extended Deadtime Value"]
|
||||
#[inline]
|
||||
pub fn dtvalex(&self) -> DTVALEXR {
|
||||
let bits = {
|
||||
const MASK: u8 = 15;
|
||||
const OFFSET: u8 = 16;
|
||||
((self.bits >> OFFSET) & MASK as u32) as u8
|
||||
};
|
||||
DTVALEXR { bits }
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 0 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
#[doc = "Bits 0:5 - Deadtime Value"]
|
||||
#[inline]
|
||||
pub fn dtval(&mut self) -> _DTVALW {
|
||||
_DTVALW { w: self }
|
||||
}
|
||||
#[doc = "Bits 6:7 - Deadtime Prescaler Value"]
|
||||
#[inline]
|
||||
pub fn dtps(&mut self) -> _DTPSW {
|
||||
_DTPSW { w: self }
|
||||
}
|
||||
#[doc = "Bits 16:19 - Extended Deadtime Value"]
|
||||
#[inline]
|
||||
pub fn dtvalex(&mut self) -> _DTVALEXW {
|
||||
_DTVALEXW { w: self }
|
||||
}
|
||||
}
|
||||
#[doc = "Reader of register PAIR2DEADTIME"]
|
||||
pub type R = crate::R<u32, super::PAIR2DEADTIME>;
|
||||
#[doc = "Writer for register PAIR2DEADTIME"]
|
||||
pub type W = crate::W<u32, super::PAIR2DEADTIME>;
|
||||
#[doc = "Register PAIR2DEADTIME `reset()`'s with value 0"]
|
||||
impl crate::ResetValue for super::PAIR2DEADTIME {
|
||||
type Type = u32;
|
||||
#[inline(always)]
|
||||
fn reset_value() -> Self::Type {
|
||||
0
|
||||
}
|
||||
}
|
||||
#[doc = "Reader of field `DTVAL`"]
|
||||
pub type DTVAL_R = crate::R<u8, u8>;
|
||||
#[doc = "Write proxy for field `DTVAL`"]
|
||||
pub struct DTVAL_W<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> DTVAL_W<'a> {
|
||||
#[doc = r"Writes raw bits to the field"]
|
||||
#[inline(always)]
|
||||
pub unsafe fn bits(self, value: u8) -> &'a mut W {
|
||||
self.w.bits = (self.w.bits & !0x3f) | ((value as u32) & 0x3f);
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = "Deadtime Prescaler Value\n\nValue on reset: 0"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
#[repr(u8)]
|
||||
pub enum DTPS_A {
|
||||
#[doc = "0: Divide the FTM input clock by 1."]
|
||||
_0X = 0,
|
||||
#[doc = "2: Divide the FTM input clock by 4."]
|
||||
_10 = 2,
|
||||
#[doc = "3: Divide the FTM input clock by 16."]
|
||||
_11 = 3,
|
||||
}
|
||||
impl From<DTPS_A> for u8 {
|
||||
#[inline(always)]
|
||||
fn from(variant: DTPS_A) -> Self {
|
||||
variant as _
|
||||
}
|
||||
}
|
||||
#[doc = "Reader of field `DTPS`"]
|
||||
pub type DTPS_R = crate::R<u8, DTPS_A>;
|
||||
impl DTPS_R {
|
||||
#[doc = r"Get enumerated values variant"]
|
||||
#[inline(always)]
|
||||
pub fn variant(&self) -> crate::Variant<u8, DTPS_A> {
|
||||
use crate::Variant::*;
|
||||
match self.bits {
|
||||
0 => Val(DTPS_A::_0X),
|
||||
2 => Val(DTPS_A::_10),
|
||||
3 => Val(DTPS_A::_11),
|
||||
i => Res(i),
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0X`"]
|
||||
#[inline(always)]
|
||||
pub fn is_0x(&self) -> bool {
|
||||
*self == DTPS_A::_0X
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_10`"]
|
||||
#[inline(always)]
|
||||
pub fn is_10(&self) -> bool {
|
||||
*self == DTPS_A::_10
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_11`"]
|
||||
#[inline(always)]
|
||||
pub fn is_11(&self) -> bool {
|
||||
*self == DTPS_A::_11
|
||||
}
|
||||
}
|
||||
#[doc = "Write proxy for field `DTPS`"]
|
||||
pub struct DTPS_W<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> DTPS_W<'a> {
|
||||
#[doc = r"Writes `variant` to the field"]
|
||||
#[inline(always)]
|
||||
pub fn variant(self, variant: DTPS_A) -> &'a mut W {
|
||||
unsafe { self.bits(variant.into()) }
|
||||
}
|
||||
#[doc = "Divide the FTM input clock by 1."]
|
||||
#[inline(always)]
|
||||
pub fn _0x(self) -> &'a mut W {
|
||||
self.variant(DTPS_A::_0X)
|
||||
}
|
||||
#[doc = "Divide the FTM input clock by 4."]
|
||||
#[inline(always)]
|
||||
pub fn _10(self) -> &'a mut W {
|
||||
self.variant(DTPS_A::_10)
|
||||
}
|
||||
#[doc = "Divide the FTM input clock by 16."]
|
||||
#[inline(always)]
|
||||
pub fn _11(self) -> &'a mut W {
|
||||
self.variant(DTPS_A::_11)
|
||||
}
|
||||
#[doc = r"Writes raw bits to the field"]
|
||||
#[inline(always)]
|
||||
pub unsafe fn bits(self, value: u8) -> &'a mut W {
|
||||
self.w.bits = (self.w.bits & !(0x03 << 6)) | (((value as u32) & 0x03) << 6);
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = "Reader of field `DTVALEX`"]
|
||||
pub type DTVALEX_R = crate::R<u8, u8>;
|
||||
#[doc = "Write proxy for field `DTVALEX`"]
|
||||
pub struct DTVALEX_W<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> DTVALEX_W<'a> {
|
||||
#[doc = r"Writes raw bits to the field"]
|
||||
#[inline(always)]
|
||||
pub unsafe fn bits(self, value: u8) -> &'a mut W {
|
||||
self.w.bits = (self.w.bits & !(0x0f << 16)) | (((value as u32) & 0x0f) << 16);
|
||||
self.w
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = "Bits 0:5 - Deadtime Value"]
|
||||
#[inline(always)]
|
||||
pub fn dtval(&self) -> DTVAL_R {
|
||||
DTVAL_R::new((self.bits & 0x3f) as u8)
|
||||
}
|
||||
#[doc = "Bits 6:7 - Deadtime Prescaler Value"]
|
||||
#[inline(always)]
|
||||
pub fn dtps(&self) -> DTPS_R {
|
||||
DTPS_R::new(((self.bits >> 6) & 0x03) as u8)
|
||||
}
|
||||
#[doc = "Bits 16:19 - Extended Deadtime Value"]
|
||||
#[inline(always)]
|
||||
pub fn dtvalex(&self) -> DTVALEX_R {
|
||||
DTVALEX_R::new(((self.bits >> 16) & 0x0f) as u8)
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = "Bits 0:5 - Deadtime Value"]
|
||||
#[inline(always)]
|
||||
pub fn dtval(&mut self) -> DTVAL_W {
|
||||
DTVAL_W { w: self }
|
||||
}
|
||||
#[doc = "Bits 6:7 - Deadtime Prescaler Value"]
|
||||
#[inline(always)]
|
||||
pub fn dtps(&mut self) -> DTPS_W {
|
||||
DTPS_W { w: self }
|
||||
}
|
||||
#[doc = "Bits 16:19 - Extended Deadtime Value"]
|
||||
#[inline(always)]
|
||||
pub fn dtvalex(&mut self) -> DTVALEX_W {
|
||||
DTVALEX_W { w: self }
|
||||
}
|
||||
}
|
||||
|
@ -1,264 +1,153 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PAIR3DEADTIME {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
#[doc = r" Value of the field"]
|
||||
pub struct DTVALR {
|
||||
bits: u8,
|
||||
}
|
||||
impl DTVALR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u8 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `DTPS`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum DTPSR {
|
||||
#[doc = "Divide the FTM input clock by 1."]
|
||||
_0X,
|
||||
#[doc = "Divide the FTM input clock by 4."]
|
||||
_10,
|
||||
#[doc = "Divide the FTM input clock by 16."]
|
||||
_11,
|
||||
#[doc = r" Reserved"]
|
||||
_Reserved(u8),
|
||||
}
|
||||
impl DTPSR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u8 {
|
||||
match *self {
|
||||
DTPSR::_0X => 0,
|
||||
DTPSR::_10 => 2,
|
||||
DTPSR::_11 => 3,
|
||||
DTPSR::_Reserved(bits) => bits,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: u8) -> DTPSR {
|
||||
match value {
|
||||
0 => DTPSR::_0X,
|
||||
2 => DTPSR::_10,
|
||||
3 => DTPSR::_11,
|
||||
i => DTPSR::_Reserved(i),
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0X`"]
|
||||
#[inline]
|
||||
pub fn is_0x(&self) -> bool {
|
||||
*self == DTPSR::_0X
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_10`"]
|
||||
#[inline]
|
||||
pub fn is_10(&self) -> bool {
|
||||
*self == DTPSR::_10
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_11`"]
|
||||
#[inline]
|
||||
pub fn is_11(&self) -> bool {
|
||||
*self == DTPSR::_11
|
||||
}
|
||||
}
|
||||
#[doc = r" Value of the field"]
|
||||
pub struct DTVALEXR {
|
||||
bits: u8,
|
||||
}
|
||||
impl DTVALEXR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u8 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _DTVALW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _DTVALW<'a> {
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(self, value: u8) -> &'a mut W {
|
||||
const MASK: u8 = 63;
|
||||
const OFFSET: u8 = 0;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = "Values that can be written to the field `DTPS`"]
|
||||
pub enum DTPSW {
|
||||
#[doc = "Divide the FTM input clock by 1."]
|
||||
_0X,
|
||||
#[doc = "Divide the FTM input clock by 4."]
|
||||
_10,
|
||||
#[doc = "Divide the FTM input clock by 16."]
|
||||
_11,
|
||||
}
|
||||
impl DTPSW {
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _bits(&self) -> u8 {
|
||||
match *self {
|
||||
DTPSW::_0X => 0,
|
||||
DTPSW::_10 => 2,
|
||||
DTPSW::_11 => 3,
|
||||
}
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _DTPSW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _DTPSW<'a> {
|
||||
#[doc = r" Writes `variant` to the field"]
|
||||
#[inline]
|
||||
pub fn variant(self, variant: DTPSW) -> &'a mut W {
|
||||
unsafe { self.bits(variant._bits()) }
|
||||
}
|
||||
#[doc = "Divide the FTM input clock by 1."]
|
||||
#[inline]
|
||||
pub fn _0x(self) -> &'a mut W {
|
||||
self.variant(DTPSW::_0X)
|
||||
}
|
||||
#[doc = "Divide the FTM input clock by 4."]
|
||||
#[inline]
|
||||
pub fn _10(self) -> &'a mut W {
|
||||
self.variant(DTPSW::_10)
|
||||
}
|
||||
#[doc = "Divide the FTM input clock by 16."]
|
||||
#[inline]
|
||||
pub fn _11(self) -> &'a mut W {
|
||||
self.variant(DTPSW::_11)
|
||||
}
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(self, value: u8) -> &'a mut W {
|
||||
const MASK: u8 = 3;
|
||||
const OFFSET: u8 = 6;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _DTVALEXW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _DTVALEXW<'a> {
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(self, value: u8) -> &'a mut W {
|
||||
const MASK: u8 = 15;
|
||||
const OFFSET: u8 = 16;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
#[doc = "Bits 0:5 - Deadtime Value"]
|
||||
#[inline]
|
||||
pub fn dtval(&self) -> DTVALR {
|
||||
let bits = {
|
||||
const MASK: u8 = 63;
|
||||
const OFFSET: u8 = 0;
|
||||
((self.bits >> OFFSET) & MASK as u32) as u8
|
||||
};
|
||||
DTVALR { bits }
|
||||
}
|
||||
#[doc = "Bits 6:7 - Deadtime Prescaler Value"]
|
||||
#[inline]
|
||||
pub fn dtps(&self) -> DTPSR {
|
||||
DTPSR::_from({
|
||||
const MASK: u8 = 3;
|
||||
const OFFSET: u8 = 6;
|
||||
((self.bits >> OFFSET) & MASK as u32) as u8
|
||||
})
|
||||
}
|
||||
#[doc = "Bits 16:19 - Extended Deadtime Value"]
|
||||
#[inline]
|
||||
pub fn dtvalex(&self) -> DTVALEXR {
|
||||
let bits = {
|
||||
const MASK: u8 = 15;
|
||||
const OFFSET: u8 = 16;
|
||||
((self.bits >> OFFSET) & MASK as u32) as u8
|
||||
};
|
||||
DTVALEXR { bits }
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 0 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
#[doc = "Bits 0:5 - Deadtime Value"]
|
||||
#[inline]
|
||||
pub fn dtval(&mut self) -> _DTVALW {
|
||||
_DTVALW { w: self }
|
||||
}
|
||||
#[doc = "Bits 6:7 - Deadtime Prescaler Value"]
|
||||
#[inline]
|
||||
pub fn dtps(&mut self) -> _DTPSW {
|
||||
_DTPSW { w: self }
|
||||
}
|
||||
#[doc = "Bits 16:19 - Extended Deadtime Value"]
|
||||
#[inline]
|
||||
pub fn dtvalex(&mut self) -> _DTVALEXW {
|
||||
_DTVALEXW { w: self }
|
||||
}
|
||||
}
|
||||
#[doc = "Reader of register PAIR3DEADTIME"]
|
||||
pub type R = crate::R<u32, super::PAIR3DEADTIME>;
|
||||
#[doc = "Writer for register PAIR3DEADTIME"]
|
||||
pub type W = crate::W<u32, super::PAIR3DEADTIME>;
|
||||
#[doc = "Register PAIR3DEADTIME `reset()`'s with value 0"]
|
||||
impl crate::ResetValue for super::PAIR3DEADTIME {
|
||||
type Type = u32;
|
||||
#[inline(always)]
|
||||
fn reset_value() -> Self::Type {
|
||||
0
|
||||
}
|
||||
}
|
||||
#[doc = "Reader of field `DTVAL`"]
|
||||
pub type DTVAL_R = crate::R<u8, u8>;
|
||||
#[doc = "Write proxy for field `DTVAL`"]
|
||||
pub struct DTVAL_W<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> DTVAL_W<'a> {
|
||||
#[doc = r"Writes raw bits to the field"]
|
||||
#[inline(always)]
|
||||
pub unsafe fn bits(self, value: u8) -> &'a mut W {
|
||||
self.w.bits = (self.w.bits & !0x3f) | ((value as u32) & 0x3f);
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = "Deadtime Prescaler Value\n\nValue on reset: 0"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
#[repr(u8)]
|
||||
pub enum DTPS_A {
|
||||
#[doc = "0: Divide the FTM input clock by 1."]
|
||||
_0X = 0,
|
||||
#[doc = "2: Divide the FTM input clock by 4."]
|
||||
_10 = 2,
|
||||
#[doc = "3: Divide the FTM input clock by 16."]
|
||||
_11 = 3,
|
||||
}
|
||||
impl From<DTPS_A> for u8 {
|
||||
#[inline(always)]
|
||||
fn from(variant: DTPS_A) -> Self {
|
||||
variant as _
|
||||
}
|
||||
}
|
||||
#[doc = "Reader of field `DTPS`"]
|
||||
pub type DTPS_R = crate::R<u8, DTPS_A>;
|
||||
impl DTPS_R {
|
||||
#[doc = r"Get enumerated values variant"]
|
||||
#[inline(always)]
|
||||
pub fn variant(&self) -> crate::Variant<u8, DTPS_A> {
|
||||
use crate::Variant::*;
|
||||
match self.bits {
|
||||
0 => Val(DTPS_A::_0X),
|
||||
2 => Val(DTPS_A::_10),
|
||||
3 => Val(DTPS_A::_11),
|
||||
i => Res(i),
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0X`"]
|
||||
#[inline(always)]
|
||||
pub fn is_0x(&self) -> bool {
|
||||
*self == DTPS_A::_0X
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_10`"]
|
||||
#[inline(always)]
|
||||
pub fn is_10(&self) -> bool {
|
||||
*self == DTPS_A::_10
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_11`"]
|
||||
#[inline(always)]
|
||||
pub fn is_11(&self) -> bool {
|
||||
*self == DTPS_A::_11
|
||||
}
|
||||
}
|
||||
#[doc = "Write proxy for field `DTPS`"]
|
||||
pub struct DTPS_W<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> DTPS_W<'a> {
|
||||
#[doc = r"Writes `variant` to the field"]
|
||||
#[inline(always)]
|
||||
pub fn variant(self, variant: DTPS_A) -> &'a mut W {
|
||||
unsafe { self.bits(variant.into()) }
|
||||
}
|
||||
#[doc = "Divide the FTM input clock by 1."]
|
||||
#[inline(always)]
|
||||
pub fn _0x(self) -> &'a mut W {
|
||||
self.variant(DTPS_A::_0X)
|
||||
}
|
||||
#[doc = "Divide the FTM input clock by 4."]
|
||||
#[inline(always)]
|
||||
pub fn _10(self) -> &'a mut W {
|
||||
self.variant(DTPS_A::_10)
|
||||
}
|
||||
#[doc = "Divide the FTM input clock by 16."]
|
||||
#[inline(always)]
|
||||
pub fn _11(self) -> &'a mut W {
|
||||
self.variant(DTPS_A::_11)
|
||||
}
|
||||
#[doc = r"Writes raw bits to the field"]
|
||||
#[inline(always)]
|
||||
pub unsafe fn bits(self, value: u8) -> &'a mut W {
|
||||
self.w.bits = (self.w.bits & !(0x03 << 6)) | (((value as u32) & 0x03) << 6);
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = "Reader of field `DTVALEX`"]
|
||||
pub type DTVALEX_R = crate::R<u8, u8>;
|
||||
#[doc = "Write proxy for field `DTVALEX`"]
|
||||
pub struct DTVALEX_W<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> DTVALEX_W<'a> {
|
||||
#[doc = r"Writes raw bits to the field"]
|
||||
#[inline(always)]
|
||||
pub unsafe fn bits(self, value: u8) -> &'a mut W {
|
||||
self.w.bits = (self.w.bits & !(0x0f << 16)) | (((value as u32) & 0x0f) << 16);
|
||||
self.w
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = "Bits 0:5 - Deadtime Value"]
|
||||
#[inline(always)]
|
||||
pub fn dtval(&self) -> DTVAL_R {
|
||||
DTVAL_R::new((self.bits & 0x3f) as u8)
|
||||
}
|
||||
#[doc = "Bits 6:7 - Deadtime Prescaler Value"]
|
||||
#[inline(always)]
|
||||
pub fn dtps(&self) -> DTPS_R {
|
||||
DTPS_R::new(((self.bits >> 6) & 0x03) as u8)
|
||||
}
|
||||
#[doc = "Bits 16:19 - Extended Deadtime Value"]
|
||||
#[inline(always)]
|
||||
pub fn dtvalex(&self) -> DTVALEX_R {
|
||||
DTVALEX_R::new(((self.bits >> 16) & 0x0f) as u8)
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = "Bits 0:5 - Deadtime Value"]
|
||||
#[inline(always)]
|
||||
pub fn dtval(&mut self) -> DTVAL_W {
|
||||
DTVAL_W { w: self }
|
||||
}
|
||||
#[doc = "Bits 6:7 - Deadtime Prescaler Value"]
|
||||
#[inline(always)]
|
||||
pub fn dtps(&mut self) -> DTPS_W {
|
||||
DTPS_W { w: self }
|
||||
}
|
||||
#[doc = "Bits 16:19 - Extended Deadtime Value"]
|
||||
#[inline(always)]
|
||||
pub fn dtvalex(&mut self) -> DTVALEX_W {
|
||||
DTVALEX_W { w: self }
|
||||
}
|
||||
}
|
||||
|
1710
src/ftm1/pol.rs
1710
src/ftm1/pol.rs
File diff suppressed because it is too large
Load Diff
2443
src/ftm1/pwmload.rs
2443
src/ftm1/pwmload.rs
File diff suppressed because it is too large
Load Diff
1496
src/ftm1/qdctrl.rs
1496
src/ftm1/qdctrl.rs
File diff suppressed because it is too large
Load Diff
3713
src/ftm1/sc.rs
3713
src/ftm1/sc.rs
File diff suppressed because it is too large
Load Diff
@ -1,466 +1,332 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::STATUS {
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `CH0F`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum CH0FR {
|
||||
#[doc = "No channel event has occurred."]
|
||||
_0,
|
||||
#[doc = "A channel event has occurred."]
|
||||
_1,
|
||||
}
|
||||
impl CH0FR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
match *self {
|
||||
CH0FR::_0 => false,
|
||||
CH0FR::_1 => true,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: bool) -> CH0FR {
|
||||
match value {
|
||||
false => CH0FR::_0,
|
||||
true => CH0FR::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == CH0FR::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == CH0FR::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `CH1F`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum CH1FR {
|
||||
#[doc = "No channel event has occurred."]
|
||||
_0,
|
||||
#[doc = "A channel event has occurred."]
|
||||
_1,
|
||||
}
|
||||
impl CH1FR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
match *self {
|
||||
CH1FR::_0 => false,
|
||||
CH1FR::_1 => true,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: bool) -> CH1FR {
|
||||
match value {
|
||||
false => CH1FR::_0,
|
||||
true => CH1FR::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == CH1FR::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == CH1FR::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `CH2F`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum CH2FR {
|
||||
#[doc = "No channel event has occurred."]
|
||||
_0,
|
||||
#[doc = "A channel event has occurred."]
|
||||
_1,
|
||||
}
|
||||
impl CH2FR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
match *self {
|
||||
CH2FR::_0 => false,
|
||||
CH2FR::_1 => true,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: bool) -> CH2FR {
|
||||
match value {
|
||||
false => CH2FR::_0,
|
||||
true => CH2FR::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == CH2FR::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == CH2FR::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `CH3F`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum CH3FR {
|
||||
#[doc = "No channel event has occurred."]
|
||||
_0,
|
||||
#[doc = "A channel event has occurred."]
|
||||
_1,
|
||||
}
|
||||
impl CH3FR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
match *self {
|
||||
CH3FR::_0 => false,
|
||||
CH3FR::_1 => true,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: bool) -> CH3FR {
|
||||
match value {
|
||||
false => CH3FR::_0,
|
||||
true => CH3FR::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == CH3FR::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == CH3FR::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `CH4F`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum CH4FR {
|
||||
#[doc = "No channel event has occurred."]
|
||||
_0,
|
||||
#[doc = "A channel event has occurred."]
|
||||
_1,
|
||||
}
|
||||
impl CH4FR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
match *self {
|
||||
CH4FR::_0 => false,
|
||||
CH4FR::_1 => true,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: bool) -> CH4FR {
|
||||
match value {
|
||||
false => CH4FR::_0,
|
||||
true => CH4FR::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == CH4FR::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == CH4FR::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `CH5F`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum CH5FR {
|
||||
#[doc = "No channel event has occurred."]
|
||||
_0,
|
||||
#[doc = "A channel event has occurred."]
|
||||
_1,
|
||||
}
|
||||
impl CH5FR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
match *self {
|
||||
CH5FR::_0 => false,
|
||||
CH5FR::_1 => true,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: bool) -> CH5FR {
|
||||
match value {
|
||||
false => CH5FR::_0,
|
||||
true => CH5FR::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == CH5FR::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == CH5FR::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `CH6F`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum CH6FR {
|
||||
#[doc = "No channel event has occurred."]
|
||||
_0,
|
||||
#[doc = "A channel event has occurred."]
|
||||
_1,
|
||||
}
|
||||
impl CH6FR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
match *self {
|
||||
CH6FR::_0 => false,
|
||||
CH6FR::_1 => true,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: bool) -> CH6FR {
|
||||
match value {
|
||||
false => CH6FR::_0,
|
||||
true => CH6FR::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == CH6FR::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == CH6FR::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `CH7F`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum CH7FR {
|
||||
#[doc = "No channel event has occurred."]
|
||||
_0,
|
||||
#[doc = "A channel event has occurred."]
|
||||
_1,
|
||||
}
|
||||
impl CH7FR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
match *self {
|
||||
CH7FR::_0 => false,
|
||||
CH7FR::_1 => true,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: bool) -> CH7FR {
|
||||
match value {
|
||||
false => CH7FR::_0,
|
||||
true => CH7FR::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == CH7FR::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == CH7FR::_1
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
#[doc = "Bit 0 - Channel 0 Flag"]
|
||||
#[inline]
|
||||
pub fn ch0f(&self) -> CH0FR {
|
||||
CH0FR::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 0;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
#[doc = "Bit 1 - Channel 1 Flag"]
|
||||
#[inline]
|
||||
pub fn ch1f(&self) -> CH1FR {
|
||||
CH1FR::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 1;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
#[doc = "Bit 2 - Channel 2 Flag"]
|
||||
#[inline]
|
||||
pub fn ch2f(&self) -> CH2FR {
|
||||
CH2FR::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 2;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
#[doc = "Bit 3 - Channel 3 Flag"]
|
||||
#[inline]
|
||||
pub fn ch3f(&self) -> CH3FR {
|
||||
CH3FR::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 3;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
#[doc = "Bit 4 - Channel 4 Flag"]
|
||||
#[inline]
|
||||
pub fn ch4f(&self) -> CH4FR {
|
||||
CH4FR::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 4;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
#[doc = "Bit 5 - Channel 5 Flag"]
|
||||
#[inline]
|
||||
pub fn ch5f(&self) -> CH5FR {
|
||||
CH5FR::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 5;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
#[doc = "Bit 6 - Channel 6 Flag"]
|
||||
#[inline]
|
||||
pub fn ch6f(&self) -> CH6FR {
|
||||
CH6FR::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 6;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
#[doc = "Bit 7 - Channel 7 Flag"]
|
||||
#[inline]
|
||||
pub fn ch7f(&self) -> CH7FR {
|
||||
CH7FR::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 7;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
}
|
||||
#[doc = "Reader of register STATUS"]
|
||||
pub type R = crate::R<u32, super::STATUS>;
|
||||
#[doc = "Channel 0 Flag\n\nValue on reset: 0"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum CH0F_A {
|
||||
#[doc = "0: No channel event has occurred."]
|
||||
_0 = 0,
|
||||
#[doc = "1: A channel event has occurred."]
|
||||
_1 = 1,
|
||||
}
|
||||
impl From<CH0F_A> for bool {
|
||||
#[inline(always)]
|
||||
fn from(variant: CH0F_A) -> Self {
|
||||
variant as u8 != 0
|
||||
}
|
||||
}
|
||||
#[doc = "Reader of field `CH0F`"]
|
||||
pub type CH0F_R = crate::R<bool, CH0F_A>;
|
||||
impl CH0F_R {
|
||||
#[doc = r"Get enumerated values variant"]
|
||||
#[inline(always)]
|
||||
pub fn variant(&self) -> CH0F_A {
|
||||
match self.bits {
|
||||
false => CH0F_A::_0,
|
||||
true => CH0F_A::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline(always)]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == CH0F_A::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline(always)]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == CH0F_A::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Channel 1 Flag\n\nValue on reset: 0"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum CH1F_A {
|
||||
#[doc = "0: No channel event has occurred."]
|
||||
_0 = 0,
|
||||
#[doc = "1: A channel event has occurred."]
|
||||
_1 = 1,
|
||||
}
|
||||
impl From<CH1F_A> for bool {
|
||||
#[inline(always)]
|
||||
fn from(variant: CH1F_A) -> Self {
|
||||
variant as u8 != 0
|
||||
}
|
||||
}
|
||||
#[doc = "Reader of field `CH1F`"]
|
||||
pub type CH1F_R = crate::R<bool, CH1F_A>;
|
||||
impl CH1F_R {
|
||||
#[doc = r"Get enumerated values variant"]
|
||||
#[inline(always)]
|
||||
pub fn variant(&self) -> CH1F_A {
|
||||
match self.bits {
|
||||
false => CH1F_A::_0,
|
||||
true => CH1F_A::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline(always)]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == CH1F_A::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline(always)]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == CH1F_A::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Channel 2 Flag\n\nValue on reset: 0"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum CH2F_A {
|
||||
#[doc = "0: No channel event has occurred."]
|
||||
_0 = 0,
|
||||
#[doc = "1: A channel event has occurred."]
|
||||
_1 = 1,
|
||||
}
|
||||
impl From<CH2F_A> for bool {
|
||||
#[inline(always)]
|
||||
fn from(variant: CH2F_A) -> Self {
|
||||
variant as u8 != 0
|
||||
}
|
||||
}
|
||||
#[doc = "Reader of field `CH2F`"]
|
||||
pub type CH2F_R = crate::R<bool, CH2F_A>;
|
||||
impl CH2F_R {
|
||||
#[doc = r"Get enumerated values variant"]
|
||||
#[inline(always)]
|
||||
pub fn variant(&self) -> CH2F_A {
|
||||
match self.bits {
|
||||
false => CH2F_A::_0,
|
||||
true => CH2F_A::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline(always)]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == CH2F_A::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline(always)]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == CH2F_A::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Channel 3 Flag\n\nValue on reset: 0"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum CH3F_A {
|
||||
#[doc = "0: No channel event has occurred."]
|
||||
_0 = 0,
|
||||
#[doc = "1: A channel event has occurred."]
|
||||
_1 = 1,
|
||||
}
|
||||
impl From<CH3F_A> for bool {
|
||||
#[inline(always)]
|
||||
fn from(variant: CH3F_A) -> Self {
|
||||
variant as u8 != 0
|
||||
}
|
||||
}
|
||||
#[doc = "Reader of field `CH3F`"]
|
||||
pub type CH3F_R = crate::R<bool, CH3F_A>;
|
||||
impl CH3F_R {
|
||||
#[doc = r"Get enumerated values variant"]
|
||||
#[inline(always)]
|
||||
pub fn variant(&self) -> CH3F_A {
|
||||
match self.bits {
|
||||
false => CH3F_A::_0,
|
||||
true => CH3F_A::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline(always)]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == CH3F_A::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline(always)]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == CH3F_A::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Channel 4 Flag\n\nValue on reset: 0"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum CH4F_A {
|
||||
#[doc = "0: No channel event has occurred."]
|
||||
_0 = 0,
|
||||
#[doc = "1: A channel event has occurred."]
|
||||
_1 = 1,
|
||||
}
|
||||
impl From<CH4F_A> for bool {
|
||||
#[inline(always)]
|
||||
fn from(variant: CH4F_A) -> Self {
|
||||
variant as u8 != 0
|
||||
}
|
||||
}
|
||||
#[doc = "Reader of field `CH4F`"]
|
||||
pub type CH4F_R = crate::R<bool, CH4F_A>;
|
||||
impl CH4F_R {
|
||||
#[doc = r"Get enumerated values variant"]
|
||||
#[inline(always)]
|
||||
pub fn variant(&self) -> CH4F_A {
|
||||
match self.bits {
|
||||
false => CH4F_A::_0,
|
||||
true => CH4F_A::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline(always)]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == CH4F_A::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline(always)]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == CH4F_A::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Channel 5 Flag\n\nValue on reset: 0"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum CH5F_A {
|
||||
#[doc = "0: No channel event has occurred."]
|
||||
_0 = 0,
|
||||
#[doc = "1: A channel event has occurred."]
|
||||
_1 = 1,
|
||||
}
|
||||
impl From<CH5F_A> for bool {
|
||||
#[inline(always)]
|
||||
fn from(variant: CH5F_A) -> Self {
|
||||
variant as u8 != 0
|
||||
}
|
||||
}
|
||||
#[doc = "Reader of field `CH5F`"]
|
||||
pub type CH5F_R = crate::R<bool, CH5F_A>;
|
||||
impl CH5F_R {
|
||||
#[doc = r"Get enumerated values variant"]
|
||||
#[inline(always)]
|
||||
pub fn variant(&self) -> CH5F_A {
|
||||
match self.bits {
|
||||
false => CH5F_A::_0,
|
||||
true => CH5F_A::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline(always)]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == CH5F_A::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline(always)]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == CH5F_A::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Channel 6 Flag\n\nValue on reset: 0"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum CH6F_A {
|
||||
#[doc = "0: No channel event has occurred."]
|
||||
_0 = 0,
|
||||
#[doc = "1: A channel event has occurred."]
|
||||
_1 = 1,
|
||||
}
|
||||
impl From<CH6F_A> for bool {
|
||||
#[inline(always)]
|
||||
fn from(variant: CH6F_A) -> Self {
|
||||
variant as u8 != 0
|
||||
}
|
||||
}
|
||||
#[doc = "Reader of field `CH6F`"]
|
||||
pub type CH6F_R = crate::R<bool, CH6F_A>;
|
||||
impl CH6F_R {
|
||||
#[doc = r"Get enumerated values variant"]
|
||||
#[inline(always)]
|
||||
pub fn variant(&self) -> CH6F_A {
|
||||
match self.bits {
|
||||
false => CH6F_A::_0,
|
||||
true => CH6F_A::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline(always)]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == CH6F_A::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline(always)]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == CH6F_A::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Channel 7 Flag\n\nValue on reset: 0"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum CH7F_A {
|
||||
#[doc = "0: No channel event has occurred."]
|
||||
_0 = 0,
|
||||
#[doc = "1: A channel event has occurred."]
|
||||
_1 = 1,
|
||||
}
|
||||
impl From<CH7F_A> for bool {
|
||||
#[inline(always)]
|
||||
fn from(variant: CH7F_A) -> Self {
|
||||
variant as u8 != 0
|
||||
}
|
||||
}
|
||||
#[doc = "Reader of field `CH7F`"]
|
||||
pub type CH7F_R = crate::R<bool, CH7F_A>;
|
||||
impl CH7F_R {
|
||||
#[doc = r"Get enumerated values variant"]
|
||||
#[inline(always)]
|
||||
pub fn variant(&self) -> CH7F_A {
|
||||
match self.bits {
|
||||
false => CH7F_A::_0,
|
||||
true => CH7F_A::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline(always)]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == CH7F_A::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline(always)]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == CH7F_A::_1
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = "Bit 0 - Channel 0 Flag"]
|
||||
#[inline(always)]
|
||||
pub fn ch0f(&self) -> CH0F_R {
|
||||
CH0F_R::new((self.bits & 0x01) != 0)
|
||||
}
|
||||
#[doc = "Bit 1 - Channel 1 Flag"]
|
||||
#[inline(always)]
|
||||
pub fn ch1f(&self) -> CH1F_R {
|
||||
CH1F_R::new(((self.bits >> 1) & 0x01) != 0)
|
||||
}
|
||||
#[doc = "Bit 2 - Channel 2 Flag"]
|
||||
#[inline(always)]
|
||||
pub fn ch2f(&self) -> CH2F_R {
|
||||
CH2F_R::new(((self.bits >> 2) & 0x01) != 0)
|
||||
}
|
||||
#[doc = "Bit 3 - Channel 3 Flag"]
|
||||
#[inline(always)]
|
||||
pub fn ch3f(&self) -> CH3F_R {
|
||||
CH3F_R::new(((self.bits >> 3) & 0x01) != 0)
|
||||
}
|
||||
#[doc = "Bit 4 - Channel 4 Flag"]
|
||||
#[inline(always)]
|
||||
pub fn ch4f(&self) -> CH4F_R {
|
||||
CH4F_R::new(((self.bits >> 4) & 0x01) != 0)
|
||||
}
|
||||
#[doc = "Bit 5 - Channel 5 Flag"]
|
||||
#[inline(always)]
|
||||
pub fn ch5f(&self) -> CH5F_R {
|
||||
CH5F_R::new(((self.bits >> 5) & 0x01) != 0)
|
||||
}
|
||||
#[doc = "Bit 6 - Channel 6 Flag"]
|
||||
#[inline(always)]
|
||||
pub fn ch6f(&self) -> CH6F_R {
|
||||
CH6F_R::new(((self.bits >> 6) & 0x01) != 0)
|
||||
}
|
||||
#[doc = "Bit 7 - Channel 7 Flag"]
|
||||
#[inline(always)]
|
||||
pub fn ch7f(&self) -> CH7F_R {
|
||||
CH7F_R::new(((self.bits >> 7) & 0x01) != 0)
|
||||
}
|
||||
}
|
||||
|
3342
src/ftm1/swoctrl.rs
3342
src/ftm1/swoctrl.rs
File diff suppressed because it is too large
Load Diff
1710
src/ftm1/sync.rs
1710
src/ftm1/sync.rs
File diff suppressed because it is too large
Load Diff
3138
src/ftm1/synconf.rs
3138
src/ftm1/synconf.rs
File diff suppressed because it is too large
Load Diff
Reference in New Issue
Block a user