s32k118: rewrite everything for s32k118
Signed-off-by: Sean Cross <sean@xobs.io>
This commit is contained in:
818
src/adc0/sc3.rs
818
src/adc0/sc3.rs
@ -1,495 +1,323 @@
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#[doc = r" Value read from the register"]
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pub struct R {
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bits: u32,
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}
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#[doc = r" Value to write to the register"]
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pub struct W {
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bits: u32,
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}
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impl super::SC3 {
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#[doc = r" Modifies the contents of the register"]
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#[inline]
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pub fn modify<F>(&self, f: F)
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where
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for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
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{
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let bits = self.register.get();
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let r = R { bits: bits };
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let mut w = W { bits: bits };
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f(&r, &mut w);
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self.register.set(w.bits);
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}
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#[doc = r" Reads the contents of the register"]
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#[inline]
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pub fn read(&self) -> R {
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R { bits: self.register.get() }
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}
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#[doc = r" Writes to the register"]
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#[inline]
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pub fn write<F>(&self, f: F)
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where
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F: FnOnce(&mut W) -> &mut W,
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{
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let mut w = W::reset_value();
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f(&mut w);
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self.register.set(w.bits);
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}
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#[doc = r" Writes the reset value to the register"]
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#[inline]
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pub fn reset(&self) {
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self.write(|w| w)
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}
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}
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#[doc = "Possible values of the field `AVGS`"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum AVGSR {
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#[doc = "4 samples averaged."]
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_00,
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#[doc = "8 samples averaged."]
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_01,
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#[doc = "16 samples averaged."]
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_10,
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#[doc = "32 samples averaged."]
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_11,
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}
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impl AVGSR {
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#[doc = r" Value of the field as raw bits"]
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#[inline]
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pub fn bits(&self) -> u8 {
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match *self {
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AVGSR::_00 => 0,
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AVGSR::_01 => 1,
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AVGSR::_10 => 2,
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AVGSR::_11 => 3,
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}
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}
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#[allow(missing_docs)]
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#[doc(hidden)]
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#[inline]
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pub fn _from(value: u8) -> AVGSR {
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match value {
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0 => AVGSR::_00,
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1 => AVGSR::_01,
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2 => AVGSR::_10,
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3 => AVGSR::_11,
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_ => unreachable!(),
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}
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}
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#[doc = "Checks if the value of the field is `_00`"]
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#[inline]
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pub fn is_00(&self) -> bool {
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*self == AVGSR::_00
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}
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#[doc = "Checks if the value of the field is `_01`"]
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#[inline]
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pub fn is_01(&self) -> bool {
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*self == AVGSR::_01
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}
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#[doc = "Checks if the value of the field is `_10`"]
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#[inline]
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pub fn is_10(&self) -> bool {
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*self == AVGSR::_10
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}
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#[doc = "Checks if the value of the field is `_11`"]
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#[inline]
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pub fn is_11(&self) -> bool {
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*self == AVGSR::_11
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}
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}
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#[doc = "Possible values of the field `AVGE`"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum AVGER {
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#[doc = "Hardware average function disabled."]
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_0,
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#[doc = "Hardware average function enabled."]
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_1,
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}
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impl AVGER {
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#[doc = r" Returns `true` if the bit is clear (0)"]
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#[inline]
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pub fn bit_is_clear(&self) -> bool {
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!self.bit()
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}
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#[doc = r" Returns `true` if the bit is set (1)"]
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#[inline]
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pub fn bit_is_set(&self) -> bool {
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self.bit()
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}
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#[doc = r" Value of the field as raw bits"]
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#[inline]
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pub fn bit(&self) -> bool {
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match *self {
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AVGER::_0 => false,
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AVGER::_1 => true,
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}
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}
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#[allow(missing_docs)]
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#[doc(hidden)]
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#[inline]
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pub fn _from(value: bool) -> AVGER {
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match value {
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false => AVGER::_0,
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true => AVGER::_1,
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}
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}
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#[doc = "Checks if the value of the field is `_0`"]
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#[inline]
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pub fn is_0(&self) -> bool {
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*self == AVGER::_0
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}
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#[doc = "Checks if the value of the field is `_1`"]
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#[inline]
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pub fn is_1(&self) -> bool {
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*self == AVGER::_1
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}
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}
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#[doc = "Possible values of the field `ADCO`"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum ADCOR {
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#[doc = "One conversion will be performed (or one set of conversions, if AVGE is set) after a conversion is initiated."]
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_0,
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#[doc = "Continuous conversions will be performed (or continuous sets of conversions, if AVGE is set) after a conversion is initiated."]
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_1,
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}
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impl ADCOR {
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#[doc = r" Returns `true` if the bit is clear (0)"]
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#[inline]
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pub fn bit_is_clear(&self) -> bool {
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!self.bit()
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}
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#[doc = r" Returns `true` if the bit is set (1)"]
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#[inline]
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pub fn bit_is_set(&self) -> bool {
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self.bit()
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}
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#[doc = r" Value of the field as raw bits"]
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#[inline]
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pub fn bit(&self) -> bool {
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match *self {
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ADCOR::_0 => false,
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ADCOR::_1 => true,
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}
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}
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#[allow(missing_docs)]
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#[doc(hidden)]
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#[inline]
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pub fn _from(value: bool) -> ADCOR {
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match value {
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false => ADCOR::_0,
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true => ADCOR::_1,
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}
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}
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#[doc = "Checks if the value of the field is `_0`"]
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#[inline]
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pub fn is_0(&self) -> bool {
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*self == ADCOR::_0
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}
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#[doc = "Checks if the value of the field is `_1`"]
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#[inline]
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pub fn is_1(&self) -> bool {
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*self == ADCOR::_1
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}
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}
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#[doc = r" Value of the field"]
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pub struct CALR {
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bits: bool,
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}
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impl CALR {
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#[doc = r" Value of the field as raw bits"]
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#[inline]
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pub fn bit(&self) -> bool {
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self.bits
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}
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#[doc = r" Returns `true` if the bit is clear (0)"]
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#[inline]
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pub fn bit_is_clear(&self) -> bool {
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!self.bit()
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}
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#[doc = r" Returns `true` if the bit is set (1)"]
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#[inline]
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pub fn bit_is_set(&self) -> bool {
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self.bit()
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}
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}
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#[doc = "Values that can be written to the field `AVGS`"]
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pub enum AVGSW {
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#[doc = "4 samples averaged."]
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_00,
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#[doc = "8 samples averaged."]
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_01,
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#[doc = "16 samples averaged."]
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_10,
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#[doc = "32 samples averaged."]
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_11,
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}
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impl AVGSW {
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#[allow(missing_docs)]
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#[doc(hidden)]
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#[inline]
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pub fn _bits(&self) -> u8 {
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match *self {
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AVGSW::_00 => 0,
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AVGSW::_01 => 1,
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AVGSW::_10 => 2,
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AVGSW::_11 => 3,
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}
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}
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}
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#[doc = r" Proxy"]
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pub struct _AVGSW<'a> {
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w: &'a mut W,
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}
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impl<'a> _AVGSW<'a> {
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#[doc = r" Writes `variant` to the field"]
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#[inline]
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pub fn variant(self, variant: AVGSW) -> &'a mut W {
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{
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self.bits(variant._bits())
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}
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}
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#[doc = "4 samples averaged."]
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#[inline]
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pub fn _00(self) -> &'a mut W {
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self.variant(AVGSW::_00)
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}
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#[doc = "8 samples averaged."]
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#[inline]
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pub fn _01(self) -> &'a mut W {
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self.variant(AVGSW::_01)
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}
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#[doc = "16 samples averaged."]
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#[inline]
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pub fn _10(self) -> &'a mut W {
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self.variant(AVGSW::_10)
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}
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#[doc = "32 samples averaged."]
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#[inline]
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pub fn _11(self) -> &'a mut W {
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self.variant(AVGSW::_11)
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}
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#[doc = r" Writes raw bits to the field"]
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#[inline]
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pub fn bits(self, value: u8) -> &'a mut W {
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const MASK: u8 = 3;
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const OFFSET: u8 = 0;
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self.w.bits &= !((MASK as u32) << OFFSET);
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self.w.bits |= ((value & MASK) as u32) << OFFSET;
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self.w
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}
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}
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#[doc = "Values that can be written to the field `AVGE`"]
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pub enum AVGEW {
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#[doc = "Hardware average function disabled."]
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_0,
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#[doc = "Hardware average function enabled."]
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_1,
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}
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impl AVGEW {
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#[allow(missing_docs)]
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#[doc(hidden)]
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#[inline]
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pub fn _bits(&self) -> bool {
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match *self {
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AVGEW::_0 => false,
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AVGEW::_1 => true,
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}
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}
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}
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#[doc = r" Proxy"]
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pub struct _AVGEW<'a> {
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w: &'a mut W,
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}
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impl<'a> _AVGEW<'a> {
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#[doc = r" Writes `variant` to the field"]
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#[inline]
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pub fn variant(self, variant: AVGEW) -> &'a mut W {
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{
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self.bit(variant._bits())
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}
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}
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#[doc = "Hardware average function disabled."]
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#[inline]
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pub fn _0(self) -> &'a mut W {
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self.variant(AVGEW::_0)
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}
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#[doc = "Hardware average function enabled."]
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#[inline]
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pub fn _1(self) -> &'a mut W {
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self.variant(AVGEW::_1)
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}
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#[doc = r" Sets the field bit"]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r" Clears the field bit"]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r" Writes raw bits to the field"]
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#[inline]
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pub fn bit(self, value: bool) -> &'a mut W {
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const MASK: bool = true;
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const OFFSET: u8 = 2;
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self.w.bits &= !((MASK as u32) << OFFSET);
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self.w.bits |= ((value & MASK) as u32) << OFFSET;
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self.w
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}
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}
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#[doc = "Values that can be written to the field `ADCO`"]
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pub enum ADCOW {
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#[doc = "One conversion will be performed (or one set of conversions, if AVGE is set) after a conversion is initiated."]
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_0,
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#[doc = "Continuous conversions will be performed (or continuous sets of conversions, if AVGE is set) after a conversion is initiated."]
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_1,
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}
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impl ADCOW {
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#[allow(missing_docs)]
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#[doc(hidden)]
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#[inline]
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pub fn _bits(&self) -> bool {
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match *self {
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ADCOW::_0 => false,
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ADCOW::_1 => true,
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}
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}
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}
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#[doc = r" Proxy"]
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pub struct _ADCOW<'a> {
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w: &'a mut W,
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}
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impl<'a> _ADCOW<'a> {
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#[doc = r" Writes `variant` to the field"]
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#[inline]
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pub fn variant(self, variant: ADCOW) -> &'a mut W {
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{
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self.bit(variant._bits())
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}
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}
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#[doc = "One conversion will be performed (or one set of conversions, if AVGE is set) after a conversion is initiated."]
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#[inline]
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pub fn _0(self) -> &'a mut W {
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self.variant(ADCOW::_0)
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}
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#[doc = "Continuous conversions will be performed (or continuous sets of conversions, if AVGE is set) after a conversion is initiated."]
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#[inline]
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pub fn _1(self) -> &'a mut W {
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self.variant(ADCOW::_1)
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}
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#[doc = r" Sets the field bit"]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r" Clears the field bit"]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r" Writes raw bits to the field"]
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#[inline]
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pub fn bit(self, value: bool) -> &'a mut W {
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const MASK: bool = true;
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const OFFSET: u8 = 3;
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self.w.bits &= !((MASK as u32) << OFFSET);
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self.w.bits |= ((value & MASK) as u32) << OFFSET;
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self.w
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}
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}
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#[doc = r" Proxy"]
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pub struct _CALW<'a> {
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w: &'a mut W,
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}
|
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impl<'a> _CALW<'a> {
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#[doc = r" Sets the field bit"]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r" Clears the field bit"]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r" Writes raw bits to the field"]
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#[inline]
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pub fn bit(self, value: bool) -> &'a mut W {
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const MASK: bool = true;
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const OFFSET: u8 = 7;
|
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self.w.bits &= !((MASK as u32) << OFFSET);
|
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self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
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impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
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self.bits
|
||||
}
|
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#[doc = "Bits 0:1 - Hardware Average Select"]
|
||||
#[inline]
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pub fn avgs(&self) -> AVGSR {
|
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AVGSR::_from({
|
||||
const MASK: u8 = 3;
|
||||
const OFFSET: u8 = 0;
|
||||
((self.bits >> OFFSET) & MASK as u32) as u8
|
||||
})
|
||||
}
|
||||
#[doc = "Bit 2 - Hardware Average Enable"]
|
||||
#[inline]
|
||||
pub fn avge(&self) -> AVGER {
|
||||
AVGER::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 2;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
#[doc = "Bit 3 - Continuous Conversion Enable"]
|
||||
#[inline]
|
||||
pub fn adco(&self) -> ADCOR {
|
||||
ADCOR::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 3;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
#[doc = "Bit 7 - Calibration"]
|
||||
#[inline]
|
||||
pub fn cal(&self) -> CALR {
|
||||
let bits = {
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 7;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
};
|
||||
CALR { bits }
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 0 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
#[doc = "Bits 0:1 - Hardware Average Select"]
|
||||
#[inline]
|
||||
pub fn avgs(&mut self) -> _AVGSW {
|
||||
_AVGSW { w: self }
|
||||
}
|
||||
#[doc = "Bit 2 - Hardware Average Enable"]
|
||||
#[inline]
|
||||
pub fn avge(&mut self) -> _AVGEW {
|
||||
_AVGEW { w: self }
|
||||
}
|
||||
#[doc = "Bit 3 - Continuous Conversion Enable"]
|
||||
#[inline]
|
||||
pub fn adco(&mut self) -> _ADCOW {
|
||||
_ADCOW { w: self }
|
||||
}
|
||||
#[doc = "Bit 7 - Calibration"]
|
||||
#[inline]
|
||||
pub fn cal(&mut self) -> _CALW {
|
||||
_CALW { w: self }
|
||||
}
|
||||
}
|
||||
#[doc = "Reader of register SC3"]
|
||||
pub type R = crate::R<u32, super::SC3>;
|
||||
#[doc = "Writer for register SC3"]
|
||||
pub type W = crate::W<u32, super::SC3>;
|
||||
#[doc = "Register SC3 `reset()`'s with value 0"]
|
||||
impl crate::ResetValue for super::SC3 {
|
||||
type Type = u32;
|
||||
#[inline(always)]
|
||||
fn reset_value() -> Self::Type {
|
||||
0
|
||||
}
|
||||
}
|
||||
#[doc = "Hardware Average Select\n\nValue on reset: 0"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
#[repr(u8)]
|
||||
pub enum AVGS_A {
|
||||
#[doc = "0: 4 samples averaged."]
|
||||
_00 = 0,
|
||||
#[doc = "1: 8 samples averaged."]
|
||||
_01 = 1,
|
||||
#[doc = "2: 16 samples averaged."]
|
||||
_10 = 2,
|
||||
#[doc = "3: 32 samples averaged."]
|
||||
_11 = 3,
|
||||
}
|
||||
impl From<AVGS_A> for u8 {
|
||||
#[inline(always)]
|
||||
fn from(variant: AVGS_A) -> Self {
|
||||
variant as _
|
||||
}
|
||||
}
|
||||
#[doc = "Reader of field `AVGS`"]
|
||||
pub type AVGS_R = crate::R<u8, AVGS_A>;
|
||||
impl AVGS_R {
|
||||
#[doc = r"Get enumerated values variant"]
|
||||
#[inline(always)]
|
||||
pub fn variant(&self) -> AVGS_A {
|
||||
match self.bits {
|
||||
0 => AVGS_A::_00,
|
||||
1 => AVGS_A::_01,
|
||||
2 => AVGS_A::_10,
|
||||
3 => AVGS_A::_11,
|
||||
_ => unreachable!(),
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_00`"]
|
||||
#[inline(always)]
|
||||
pub fn is_00(&self) -> bool {
|
||||
*self == AVGS_A::_00
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_01`"]
|
||||
#[inline(always)]
|
||||
pub fn is_01(&self) -> bool {
|
||||
*self == AVGS_A::_01
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_10`"]
|
||||
#[inline(always)]
|
||||
pub fn is_10(&self) -> bool {
|
||||
*self == AVGS_A::_10
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_11`"]
|
||||
#[inline(always)]
|
||||
pub fn is_11(&self) -> bool {
|
||||
*self == AVGS_A::_11
|
||||
}
|
||||
}
|
||||
#[doc = "Write proxy for field `AVGS`"]
|
||||
pub struct AVGS_W<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> AVGS_W<'a> {
|
||||
#[doc = r"Writes `variant` to the field"]
|
||||
#[inline(always)]
|
||||
pub fn variant(self, variant: AVGS_A) -> &'a mut W {
|
||||
{
|
||||
self.bits(variant.into())
|
||||
}
|
||||
}
|
||||
#[doc = "4 samples averaged."]
|
||||
#[inline(always)]
|
||||
pub fn _00(self) -> &'a mut W {
|
||||
self.variant(AVGS_A::_00)
|
||||
}
|
||||
#[doc = "8 samples averaged."]
|
||||
#[inline(always)]
|
||||
pub fn _01(self) -> &'a mut W {
|
||||
self.variant(AVGS_A::_01)
|
||||
}
|
||||
#[doc = "16 samples averaged."]
|
||||
#[inline(always)]
|
||||
pub fn _10(self) -> &'a mut W {
|
||||
self.variant(AVGS_A::_10)
|
||||
}
|
||||
#[doc = "32 samples averaged."]
|
||||
#[inline(always)]
|
||||
pub fn _11(self) -> &'a mut W {
|
||||
self.variant(AVGS_A::_11)
|
||||
}
|
||||
#[doc = r"Writes raw bits to the field"]
|
||||
#[inline(always)]
|
||||
pub fn bits(self, value: u8) -> &'a mut W {
|
||||
self.w.bits = (self.w.bits & !0x03) | ((value as u32) & 0x03);
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = "Hardware Average Enable\n\nValue on reset: 0"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum AVGE_A {
|
||||
#[doc = "0: Hardware average function disabled."]
|
||||
_0 = 0,
|
||||
#[doc = "1: Hardware average function enabled."]
|
||||
_1 = 1,
|
||||
}
|
||||
impl From<AVGE_A> for bool {
|
||||
#[inline(always)]
|
||||
fn from(variant: AVGE_A) -> Self {
|
||||
variant as u8 != 0
|
||||
}
|
||||
}
|
||||
#[doc = "Reader of field `AVGE`"]
|
||||
pub type AVGE_R = crate::R<bool, AVGE_A>;
|
||||
impl AVGE_R {
|
||||
#[doc = r"Get enumerated values variant"]
|
||||
#[inline(always)]
|
||||
pub fn variant(&self) -> AVGE_A {
|
||||
match self.bits {
|
||||
false => AVGE_A::_0,
|
||||
true => AVGE_A::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline(always)]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == AVGE_A::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline(always)]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == AVGE_A::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Write proxy for field `AVGE`"]
|
||||
pub struct AVGE_W<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> AVGE_W<'a> {
|
||||
#[doc = r"Writes `variant` to the field"]
|
||||
#[inline(always)]
|
||||
pub fn variant(self, variant: AVGE_A) -> &'a mut W {
|
||||
{
|
||||
self.bit(variant.into())
|
||||
}
|
||||
}
|
||||
#[doc = "Hardware average function disabled."]
|
||||
#[inline(always)]
|
||||
pub fn _0(self) -> &'a mut W {
|
||||
self.variant(AVGE_A::_0)
|
||||
}
|
||||
#[doc = "Hardware average function enabled."]
|
||||
#[inline(always)]
|
||||
pub fn _1(self) -> &'a mut W {
|
||||
self.variant(AVGE_A::_1)
|
||||
}
|
||||
#[doc = r"Sets the field bit"]
|
||||
#[inline(always)]
|
||||
pub fn set_bit(self) -> &'a mut W {
|
||||
self.bit(true)
|
||||
}
|
||||
#[doc = r"Clears the field bit"]
|
||||
#[inline(always)]
|
||||
pub fn clear_bit(self) -> &'a mut W {
|
||||
self.bit(false)
|
||||
}
|
||||
#[doc = r"Writes raw bits to the field"]
|
||||
#[inline(always)]
|
||||
pub fn bit(self, value: bool) -> &'a mut W {
|
||||
self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u32) & 0x01) << 2);
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = "Continuous Conversion Enable\n\nValue on reset: 0"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum ADCO_A {
|
||||
#[doc = "0: One conversion will be performed (or one set of conversions, if AVGE is set) after a conversion is initiated."]
|
||||
_0 = 0,
|
||||
#[doc = "1: Continuous conversions will be performed (or continuous sets of conversions, if AVGE is set) after a conversion is initiated."]
|
||||
_1 = 1,
|
||||
}
|
||||
impl From<ADCO_A> for bool {
|
||||
#[inline(always)]
|
||||
fn from(variant: ADCO_A) -> Self {
|
||||
variant as u8 != 0
|
||||
}
|
||||
}
|
||||
#[doc = "Reader of field `ADCO`"]
|
||||
pub type ADCO_R = crate::R<bool, ADCO_A>;
|
||||
impl ADCO_R {
|
||||
#[doc = r"Get enumerated values variant"]
|
||||
#[inline(always)]
|
||||
pub fn variant(&self) -> ADCO_A {
|
||||
match self.bits {
|
||||
false => ADCO_A::_0,
|
||||
true => ADCO_A::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline(always)]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == ADCO_A::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline(always)]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == ADCO_A::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Write proxy for field `ADCO`"]
|
||||
pub struct ADCO_W<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> ADCO_W<'a> {
|
||||
#[doc = r"Writes `variant` to the field"]
|
||||
#[inline(always)]
|
||||
pub fn variant(self, variant: ADCO_A) -> &'a mut W {
|
||||
{
|
||||
self.bit(variant.into())
|
||||
}
|
||||
}
|
||||
#[doc = "One conversion will be performed (or one set of conversions, if AVGE is set) after a conversion is initiated."]
|
||||
#[inline(always)]
|
||||
pub fn _0(self) -> &'a mut W {
|
||||
self.variant(ADCO_A::_0)
|
||||
}
|
||||
#[doc = "Continuous conversions will be performed (or continuous sets of conversions, if AVGE is set) after a conversion is initiated."]
|
||||
#[inline(always)]
|
||||
pub fn _1(self) -> &'a mut W {
|
||||
self.variant(ADCO_A::_1)
|
||||
}
|
||||
#[doc = r"Sets the field bit"]
|
||||
#[inline(always)]
|
||||
pub fn set_bit(self) -> &'a mut W {
|
||||
self.bit(true)
|
||||
}
|
||||
#[doc = r"Clears the field bit"]
|
||||
#[inline(always)]
|
||||
pub fn clear_bit(self) -> &'a mut W {
|
||||
self.bit(false)
|
||||
}
|
||||
#[doc = r"Writes raw bits to the field"]
|
||||
#[inline(always)]
|
||||
pub fn bit(self, value: bool) -> &'a mut W {
|
||||
self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u32) & 0x01) << 3);
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = "Reader of field `CAL`"]
|
||||
pub type CAL_R = crate::R<bool, bool>;
|
||||
#[doc = "Write proxy for field `CAL`"]
|
||||
pub struct CAL_W<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> CAL_W<'a> {
|
||||
#[doc = r"Sets the field bit"]
|
||||
#[inline(always)]
|
||||
pub fn set_bit(self) -> &'a mut W {
|
||||
self.bit(true)
|
||||
}
|
||||
#[doc = r"Clears the field bit"]
|
||||
#[inline(always)]
|
||||
pub fn clear_bit(self) -> &'a mut W {
|
||||
self.bit(false)
|
||||
}
|
||||
#[doc = r"Writes raw bits to the field"]
|
||||
#[inline(always)]
|
||||
pub fn bit(self, value: bool) -> &'a mut W {
|
||||
self.w.bits = (self.w.bits & !(0x01 << 7)) | (((value as u32) & 0x01) << 7);
|
||||
self.w
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = "Bits 0:1 - Hardware Average Select"]
|
||||
#[inline(always)]
|
||||
pub fn avgs(&self) -> AVGS_R {
|
||||
AVGS_R::new((self.bits & 0x03) as u8)
|
||||
}
|
||||
#[doc = "Bit 2 - Hardware Average Enable"]
|
||||
#[inline(always)]
|
||||
pub fn avge(&self) -> AVGE_R {
|
||||
AVGE_R::new(((self.bits >> 2) & 0x01) != 0)
|
||||
}
|
||||
#[doc = "Bit 3 - Continuous Conversion Enable"]
|
||||
#[inline(always)]
|
||||
pub fn adco(&self) -> ADCO_R {
|
||||
ADCO_R::new(((self.bits >> 3) & 0x01) != 0)
|
||||
}
|
||||
#[doc = "Bit 7 - Calibration"]
|
||||
#[inline(always)]
|
||||
pub fn cal(&self) -> CAL_R {
|
||||
CAL_R::new(((self.bits >> 7) & 0x01) != 0)
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = "Bits 0:1 - Hardware Average Select"]
|
||||
#[inline(always)]
|
||||
pub fn avgs(&mut self) -> AVGS_W {
|
||||
AVGS_W { w: self }
|
||||
}
|
||||
#[doc = "Bit 2 - Hardware Average Enable"]
|
||||
#[inline(always)]
|
||||
pub fn avge(&mut self) -> AVGE_W {
|
||||
AVGE_W { w: self }
|
||||
}
|
||||
#[doc = "Bit 3 - Continuous Conversion Enable"]
|
||||
#[inline(always)]
|
||||
pub fn adco(&mut self) -> ADCO_W {
|
||||
ADCO_W { w: self }
|
||||
}
|
||||
#[doc = "Bit 7 - Calibration"]
|
||||
#[inline(always)]
|
||||
pub fn cal(&mut self) -> CAL_W {
|
||||
CAL_W { w: self }
|
||||
}
|
||||
}
|
||||
|
||||
Reference in New Issue
Block a user