Same as last commit just run through the form tool (splits up large lib.rs files)
This commit is contained in:
Kjetil Kjeka
933
src/pcc/mod.rs
Normal file
933
src/pcc/mod.rs
Normal file
@@ -0,0 +1,933 @@
|
||||
use vcell::VolatileCell;
|
||||
#[doc = r" Register block"]
|
||||
#[repr(C)]
|
||||
pub struct RegisterBlock {
|
||||
#[doc = "0x00 - PCC Reserved Register 0"]
|
||||
pub pccdummy0: PCCDUMMY0,
|
||||
#[doc = "0x04 - PCC Reserved Register 1"]
|
||||
pub pccdummy1: PCCDUMMY1,
|
||||
#[doc = "0x08 - PCC Reserved Register 2"]
|
||||
pub pccdummy2: PCCDUMMY2,
|
||||
#[doc = "0x0c - PCC Reserved Register 3"]
|
||||
pub pccdummy3: PCCDUMMY3,
|
||||
#[doc = "0x10 - PCC Reserved Register 4"]
|
||||
pub pccdummy4: PCCDUMMY4,
|
||||
#[doc = "0x14 - PCC Reserved Register 5"]
|
||||
pub pccdummy5: PCCDUMMY5,
|
||||
#[doc = "0x18 - PCC Reserved Register 6"]
|
||||
pub pccdummy6: PCCDUMMY6,
|
||||
#[doc = "0x1c - PCC Reserved Register 7"]
|
||||
pub pccdummy7: PCCDUMMY7,
|
||||
#[doc = "0x20 - PCC Reserved Register 8"]
|
||||
pub pccdummy8: PCCDUMMY8,
|
||||
#[doc = "0x24 - PCC Reserved Register 9"]
|
||||
pub pccdummy9: PCCDUMMY9,
|
||||
#[doc = "0x28 - PCC Reserved Register 10"]
|
||||
pub pccdummy10: PCCDUMMY10,
|
||||
#[doc = "0x2c - PCC Reserved Register 11"]
|
||||
pub pccdummy11: PCCDUMMY11,
|
||||
#[doc = "0x30 - PCC Reserved Register 12"]
|
||||
pub pccdummy12: PCCDUMMY12,
|
||||
#[doc = "0x34 - PCC Reserved Register 13"]
|
||||
pub pccdummy13: PCCDUMMY13,
|
||||
#[doc = "0x38 - PCC Reserved Register 14"]
|
||||
pub pccdummy14: PCCDUMMY14,
|
||||
#[doc = "0x3c - PCC Reserved Register 15"]
|
||||
pub pccdummy15: PCCDUMMY15,
|
||||
#[doc = "0x40 - PCC Reserved Register 16"]
|
||||
pub pccdummy16: PCCDUMMY16,
|
||||
#[doc = "0x44 - PCC Reserved Register 17"]
|
||||
pub pccdummy17: PCCDUMMY17,
|
||||
#[doc = "0x48 - PCC Reserved Register 18"]
|
||||
pub pccdummy18: PCCDUMMY18,
|
||||
#[doc = "0x4c - PCC Reserved Register 19"]
|
||||
pub pccdummy19: PCCDUMMY19,
|
||||
#[doc = "0x50 - PCC Reserved Register 20"]
|
||||
pub pccdummy20: PCCDUMMY20,
|
||||
#[doc = "0x54 - PCC Reserved Register 21"]
|
||||
pub pccdummy21: PCCDUMMY21,
|
||||
#[doc = "0x58 - PCC Reserved Register 22"]
|
||||
pub pccdummy22: PCCDUMMY22,
|
||||
#[doc = "0x5c - PCC Reserved Register 23"]
|
||||
pub pccdummy23: PCCDUMMY23,
|
||||
#[doc = "0x60 - PCC Reserved Register 24"]
|
||||
pub pccdummy24: PCCDUMMY24,
|
||||
#[doc = "0x64 - PCC Reserved Register 25"]
|
||||
pub pccdummy25: PCCDUMMY25,
|
||||
#[doc = "0x68 - PCC Reserved Register 26"]
|
||||
pub pccdummy26: PCCDUMMY26,
|
||||
#[doc = "0x6c - PCC Reserved Register 27"]
|
||||
pub pccdummy27: PCCDUMMY27,
|
||||
#[doc = "0x70 - PCC Reserved Register 28"]
|
||||
pub pccdummy28: PCCDUMMY28,
|
||||
#[doc = "0x74 - PCC Reserved Register 29"]
|
||||
pub pccdummy29: PCCDUMMY29,
|
||||
#[doc = "0x78 - PCC Reserved Register 30"]
|
||||
pub pccdummy30: PCCDUMMY30,
|
||||
#[doc = "0x7c - PCC Reserved Register 31"]
|
||||
pub pccdummy31: PCCDUMMY31,
|
||||
#[doc = "0x80 - PCC FTFC Register"]
|
||||
pub pcc_ftfc: PCC_FTFC,
|
||||
#[doc = "0x84 - PCC DMAMUX Register"]
|
||||
pub pcc_dmamux: PCC_DMAMUX,
|
||||
#[doc = "0x88 - PCC Reserved Register 34"]
|
||||
pub pccdummy34: PCCDUMMY34,
|
||||
#[doc = "0x8c - PCC Reserved Register 35"]
|
||||
pub pccdummy35: PCCDUMMY35,
|
||||
#[doc = "0x90 - PCC FlexCAN0 Register"]
|
||||
pub pcc_flex_can0: PCC_FLEXCAN0,
|
||||
#[doc = "0x94 - PCC FlexCAN1 Register"]
|
||||
pub pcc_flex_can1: PCC_FLEXCAN1,
|
||||
#[doc = "0x98 - PCC FTM3 Register"]
|
||||
pub pcc_ftm3: PCC_FTM3,
|
||||
#[doc = "0x9c - PCC ADC1 Register"]
|
||||
pub pcc_adc1: PCC_ADC1,
|
||||
#[doc = "0xa0 - PCC Reserved Register 40"]
|
||||
pub pccdummy40: PCCDUMMY40,
|
||||
#[doc = "0xa4 - PCC Reserved Register 41"]
|
||||
pub pccdummy41: PCCDUMMY41,
|
||||
#[doc = "0xa8 - PCC Reserved Register 42"]
|
||||
pub pccdummy42: PCCDUMMY42,
|
||||
#[doc = "0xac - PCC FlexCAN2 Register"]
|
||||
pub pcc_flex_can2: PCC_FLEXCAN2,
|
||||
#[doc = "0xb0 - PCC LPSPI0 Register"]
|
||||
pub pcc_lpspi0: PCC_LPSPI0,
|
||||
#[doc = "0xb4 - PCC LPSPI1 Register"]
|
||||
pub pcc_lpspi1: PCC_LPSPI1,
|
||||
#[doc = "0xb8 - PCC LPSPI2 Register"]
|
||||
pub pcc_lpspi2: PCC_LPSPI2,
|
||||
#[doc = "0xbc - PCC Reserved Register 47"]
|
||||
pub pccdummy47: PCCDUMMY47,
|
||||
#[doc = "0xc0 - PCC Reserved Register 48"]
|
||||
pub pccdummy48: PCCDUMMY48,
|
||||
#[doc = "0xc4 - PCC PDB1 Register"]
|
||||
pub pcc_pdb1: PCC_PDB1,
|
||||
#[doc = "0xc8 - PCC CRC Register"]
|
||||
pub pcc_crc: PCC_CRC,
|
||||
#[doc = "0xcc - PCC Reserved Register 51"]
|
||||
pub pccdummy51: PCCDUMMY51,
|
||||
#[doc = "0xd0 - PCC Reserved Register 52"]
|
||||
pub pccdummy52: PCCDUMMY52,
|
||||
#[doc = "0xd4 - PCC Reserved Register 53"]
|
||||
pub pccdummy53: PCCDUMMY53,
|
||||
#[doc = "0xd8 - PCC PDB0 Register"]
|
||||
pub pcc_pdb0: PCC_PDB0,
|
||||
#[doc = "0xdc - PCC LPIT Register"]
|
||||
pub pcc_lpit: PCC_LPIT,
|
||||
#[doc = "0xe0 - PCC FTM0 Register"]
|
||||
pub pcc_ftm0: PCC_FTM0,
|
||||
#[doc = "0xe4 - PCC FTM1 Register"]
|
||||
pub pcc_ftm1: PCC_FTM1,
|
||||
#[doc = "0xe8 - PCC FTM2 Register"]
|
||||
pub pcc_ftm2: PCC_FTM2,
|
||||
#[doc = "0xec - PCC ADC0 Register"]
|
||||
pub pcc_adc0: PCC_ADC0,
|
||||
#[doc = "0xf0 - PCC Reserved Register 60"]
|
||||
pub pccdummy60: PCCDUMMY60,
|
||||
#[doc = "0xf4 - PCC RTC Register"]
|
||||
pub pcc_rtc: PCC_RTC,
|
||||
#[doc = "0xf8 - PCC Reserved Register 62"]
|
||||
pub pccdummy62: PCCDUMMY62,
|
||||
#[doc = "0xfc - PCC Reserved Register 63"]
|
||||
pub pccdummy63: PCCDUMMY63,
|
||||
#[doc = "0x100 - PCC LPTMR0 Register"]
|
||||
pub pcc_lptmr0: PCC_LPTMR0,
|
||||
#[doc = "0x104 - PCC Reserved Register 65"]
|
||||
pub pccdummy65: PCCDUMMY65,
|
||||
#[doc = "0x108 - PCC Reserved Register 66"]
|
||||
pub pccdummy66: PCCDUMMY66,
|
||||
#[doc = "0x10c - PCC Reserved Register 67"]
|
||||
pub pccdummy67: PCCDUMMY67,
|
||||
#[doc = "0x110 - PCC Reserved Register 68"]
|
||||
pub pccdummy68: PCCDUMMY68,
|
||||
#[doc = "0x114 - PCC Reserved Register 69"]
|
||||
pub pccdummy69: PCCDUMMY69,
|
||||
#[doc = "0x118 - PCC Reserved Register 70"]
|
||||
pub pccdummy70: PCCDUMMY70,
|
||||
#[doc = "0x11c - PCC Reserved Register 71"]
|
||||
pub pccdummy71: PCCDUMMY71,
|
||||
#[doc = "0x120 - PCC Reserved Register 72"]
|
||||
pub pccdummy72: PCCDUMMY72,
|
||||
#[doc = "0x124 - PCC PORTA Register"]
|
||||
pub pcc_porta: PCC_PORTA,
|
||||
#[doc = "0x128 - PCC PORTB Register"]
|
||||
pub pcc_portb: PCC_PORTB,
|
||||
#[doc = "0x12c - PCC PORTC Register"]
|
||||
pub pcc_portc: PCC_PORTC,
|
||||
#[doc = "0x130 - PCC PORTD Register"]
|
||||
pub pcc_portd: PCC_PORTD,
|
||||
#[doc = "0x134 - PCC PORTE Register"]
|
||||
pub pcc_porte: PCC_PORTE,
|
||||
#[doc = "0x138 - PCC Reserved Register 78"]
|
||||
pub pccdummy78: PCCDUMMY78,
|
||||
#[doc = "0x13c - PCC Reserved Register 79"]
|
||||
pub pccdummy79: PCCDUMMY79,
|
||||
#[doc = "0x140 - PCC Reserved Register 80"]
|
||||
pub pccdummy80: PCCDUMMY80,
|
||||
#[doc = "0x144 - PCC Reserved Register 81"]
|
||||
pub pccdummy81: PCCDUMMY81,
|
||||
#[doc = "0x148 - PCC Reserved Register 82"]
|
||||
pub pccdummy82: PCCDUMMY82,
|
||||
#[doc = "0x14c - PCC Reserved Register 83"]
|
||||
pub pccdummy83: PCCDUMMY83,
|
||||
#[doc = "0x150 - PCC Reserved Register 84"]
|
||||
pub pccdummy84: PCCDUMMY84,
|
||||
#[doc = "0x154 - PCC Reserved Register 85"]
|
||||
pub pccdummy85: PCCDUMMY85,
|
||||
#[doc = "0x158 - PCC Reserved Register 86"]
|
||||
pub pccdummy86: PCCDUMMY86,
|
||||
#[doc = "0x15c - PCC Reserved Register 87"]
|
||||
pub pccdummy87: PCCDUMMY87,
|
||||
#[doc = "0x160 - PCC Reserved Register 88"]
|
||||
pub pccdummy88: PCCDUMMY88,
|
||||
#[doc = "0x164 - PCC Reserved Register 89"]
|
||||
pub pccdummy89: PCCDUMMY89,
|
||||
#[doc = "0x168 - PCC FlexIO Register"]
|
||||
pub pcc_flexio: PCC_FLEXIO,
|
||||
#[doc = "0x16c - PCC Reserved Register 91"]
|
||||
pub pccdummy91: PCCDUMMY91,
|
||||
#[doc = "0x170 - PCC Reserved Register 92"]
|
||||
pub pccdummy92: PCCDUMMY92,
|
||||
#[doc = "0x174 - PCC Reserved Register 93"]
|
||||
pub pccdummy93: PCCDUMMY93,
|
||||
#[doc = "0x178 - PCC Reserved Register 94"]
|
||||
pub pccdummy94: PCCDUMMY94,
|
||||
#[doc = "0x17c - PCC Reserved Register 95"]
|
||||
pub pccdummy95: PCCDUMMY95,
|
||||
#[doc = "0x180 - PCC Reserved Register 96"]
|
||||
pub pccdummy96: PCCDUMMY96,
|
||||
#[doc = "0x184 - PCC EWM Register"]
|
||||
pub pcc_ewm: PCC_EWM,
|
||||
#[doc = "0x188 - PCC Reserved Register 98"]
|
||||
pub pccdummy98: PCCDUMMY98,
|
||||
#[doc = "0x18c - PCC Reserved Register 99"]
|
||||
pub pccdummy99: PCCDUMMY99,
|
||||
#[doc = "0x190 - PCC Reserved Register 100"]
|
||||
pub pccdummy100: PCCDUMMY100,
|
||||
#[doc = "0x194 - PCC Reserved Register 101"]
|
||||
pub pccdummy101: PCCDUMMY101,
|
||||
#[doc = "0x198 - PCC LPI2C0 Register"]
|
||||
pub pcc_lpi2c0: PCC_LPI2C0,
|
||||
#[doc = "0x19c - PCC Reserved Register 103"]
|
||||
pub pccdummy103: PCCDUMMY103,
|
||||
#[doc = "0x1a0 - PCC Reserved Register 104"]
|
||||
pub pccdummy104: PCCDUMMY104,
|
||||
#[doc = "0x1a4 - PCC Reserved Register 105"]
|
||||
pub pccdummy105: PCCDUMMY105,
|
||||
#[doc = "0x1a8 - PCC LPUART0 Register"]
|
||||
pub pcc_lpuart0: PCC_LPUART0,
|
||||
#[doc = "0x1ac - PCC LPUART1 Register"]
|
||||
pub pcc_lpuart1: PCC_LPUART1,
|
||||
#[doc = "0x1b0 - PCC LPUART2 Register"]
|
||||
pub pcc_lpuart2: PCC_LPUART2,
|
||||
#[doc = "0x1b4 - PCC Reserved Register 109"]
|
||||
pub pccdummy109: PCCDUMMY109,
|
||||
#[doc = "0x1b8 - PCC Reserved Register 110"]
|
||||
pub pccdummy110: PCCDUMMY110,
|
||||
#[doc = "0x1bc - PCC Reserved Register 111"]
|
||||
pub pccdummy111: PCCDUMMY111,
|
||||
#[doc = "0x1c0 - PCC Reserved Register 112"]
|
||||
pub pccdummy112: PCCDUMMY112,
|
||||
#[doc = "0x1c4 - PCC Reserved Register 113"]
|
||||
pub pccdummy113: PCCDUMMY113,
|
||||
#[doc = "0x1c8 - PCC Reserved Register 114"]
|
||||
pub pccdummy114: PCCDUMMY114,
|
||||
#[doc = "0x1cc - PCC CMP0 Register"]
|
||||
pub pcc_cmp0: PCC_CMP0,
|
||||
}
|
||||
#[doc = "PCC Reserved Register 0"]
|
||||
pub struct PCCDUMMY0 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC Reserved Register 0"]
|
||||
pub mod pccdummy0;
|
||||
#[doc = "PCC Reserved Register 1"]
|
||||
pub struct PCCDUMMY1 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC Reserved Register 1"]
|
||||
pub mod pccdummy1;
|
||||
#[doc = "PCC Reserved Register 2"]
|
||||
pub struct PCCDUMMY2 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC Reserved Register 2"]
|
||||
pub mod pccdummy2;
|
||||
#[doc = "PCC Reserved Register 3"]
|
||||
pub struct PCCDUMMY3 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC Reserved Register 3"]
|
||||
pub mod pccdummy3;
|
||||
#[doc = "PCC Reserved Register 4"]
|
||||
pub struct PCCDUMMY4 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC Reserved Register 4"]
|
||||
pub mod pccdummy4;
|
||||
#[doc = "PCC Reserved Register 5"]
|
||||
pub struct PCCDUMMY5 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC Reserved Register 5"]
|
||||
pub mod pccdummy5;
|
||||
#[doc = "PCC Reserved Register 6"]
|
||||
pub struct PCCDUMMY6 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC Reserved Register 6"]
|
||||
pub mod pccdummy6;
|
||||
#[doc = "PCC Reserved Register 7"]
|
||||
pub struct PCCDUMMY7 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC Reserved Register 7"]
|
||||
pub mod pccdummy7;
|
||||
#[doc = "PCC Reserved Register 8"]
|
||||
pub struct PCCDUMMY8 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC Reserved Register 8"]
|
||||
pub mod pccdummy8;
|
||||
#[doc = "PCC Reserved Register 9"]
|
||||
pub struct PCCDUMMY9 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC Reserved Register 9"]
|
||||
pub mod pccdummy9;
|
||||
#[doc = "PCC Reserved Register 10"]
|
||||
pub struct PCCDUMMY10 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC Reserved Register 10"]
|
||||
pub mod pccdummy10;
|
||||
#[doc = "PCC Reserved Register 11"]
|
||||
pub struct PCCDUMMY11 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC Reserved Register 11"]
|
||||
pub mod pccdummy11;
|
||||
#[doc = "PCC Reserved Register 12"]
|
||||
pub struct PCCDUMMY12 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC Reserved Register 12"]
|
||||
pub mod pccdummy12;
|
||||
#[doc = "PCC Reserved Register 13"]
|
||||
pub struct PCCDUMMY13 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC Reserved Register 13"]
|
||||
pub mod pccdummy13;
|
||||
#[doc = "PCC Reserved Register 14"]
|
||||
pub struct PCCDUMMY14 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC Reserved Register 14"]
|
||||
pub mod pccdummy14;
|
||||
#[doc = "PCC Reserved Register 15"]
|
||||
pub struct PCCDUMMY15 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC Reserved Register 15"]
|
||||
pub mod pccdummy15;
|
||||
#[doc = "PCC Reserved Register 16"]
|
||||
pub struct PCCDUMMY16 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC Reserved Register 16"]
|
||||
pub mod pccdummy16;
|
||||
#[doc = "PCC Reserved Register 17"]
|
||||
pub struct PCCDUMMY17 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC Reserved Register 17"]
|
||||
pub mod pccdummy17;
|
||||
#[doc = "PCC Reserved Register 18"]
|
||||
pub struct PCCDUMMY18 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC Reserved Register 18"]
|
||||
pub mod pccdummy18;
|
||||
#[doc = "PCC Reserved Register 19"]
|
||||
pub struct PCCDUMMY19 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC Reserved Register 19"]
|
||||
pub mod pccdummy19;
|
||||
#[doc = "PCC Reserved Register 20"]
|
||||
pub struct PCCDUMMY20 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC Reserved Register 20"]
|
||||
pub mod pccdummy20;
|
||||
#[doc = "PCC Reserved Register 21"]
|
||||
pub struct PCCDUMMY21 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC Reserved Register 21"]
|
||||
pub mod pccdummy21;
|
||||
#[doc = "PCC Reserved Register 22"]
|
||||
pub struct PCCDUMMY22 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC Reserved Register 22"]
|
||||
pub mod pccdummy22;
|
||||
#[doc = "PCC Reserved Register 23"]
|
||||
pub struct PCCDUMMY23 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC Reserved Register 23"]
|
||||
pub mod pccdummy23;
|
||||
#[doc = "PCC Reserved Register 24"]
|
||||
pub struct PCCDUMMY24 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC Reserved Register 24"]
|
||||
pub mod pccdummy24;
|
||||
#[doc = "PCC Reserved Register 25"]
|
||||
pub struct PCCDUMMY25 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC Reserved Register 25"]
|
||||
pub mod pccdummy25;
|
||||
#[doc = "PCC Reserved Register 26"]
|
||||
pub struct PCCDUMMY26 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC Reserved Register 26"]
|
||||
pub mod pccdummy26;
|
||||
#[doc = "PCC Reserved Register 27"]
|
||||
pub struct PCCDUMMY27 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC Reserved Register 27"]
|
||||
pub mod pccdummy27;
|
||||
#[doc = "PCC Reserved Register 28"]
|
||||
pub struct PCCDUMMY28 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC Reserved Register 28"]
|
||||
pub mod pccdummy28;
|
||||
#[doc = "PCC Reserved Register 29"]
|
||||
pub struct PCCDUMMY29 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC Reserved Register 29"]
|
||||
pub mod pccdummy29;
|
||||
#[doc = "PCC Reserved Register 30"]
|
||||
pub struct PCCDUMMY30 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC Reserved Register 30"]
|
||||
pub mod pccdummy30;
|
||||
#[doc = "PCC Reserved Register 31"]
|
||||
pub struct PCCDUMMY31 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC Reserved Register 31"]
|
||||
pub mod pccdummy31;
|
||||
#[doc = "PCC FTFC Register"]
|
||||
pub struct PCC_FTFC {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC FTFC Register"]
|
||||
pub mod pcc_ftfc;
|
||||
#[doc = "PCC DMAMUX Register"]
|
||||
pub struct PCC_DMAMUX {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC DMAMUX Register"]
|
||||
pub mod pcc_dmamux;
|
||||
#[doc = "PCC Reserved Register 34"]
|
||||
pub struct PCCDUMMY34 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC Reserved Register 34"]
|
||||
pub mod pccdummy34;
|
||||
#[doc = "PCC Reserved Register 35"]
|
||||
pub struct PCCDUMMY35 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC Reserved Register 35"]
|
||||
pub mod pccdummy35;
|
||||
#[doc = "PCC FlexCAN0 Register"]
|
||||
pub struct PCC_FLEXCAN0 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC FlexCAN0 Register"]
|
||||
pub mod pcc_flex_can0;
|
||||
#[doc = "PCC FlexCAN1 Register"]
|
||||
pub struct PCC_FLEXCAN1 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC FlexCAN1 Register"]
|
||||
pub mod pcc_flex_can1;
|
||||
#[doc = "PCC FTM3 Register"]
|
||||
pub struct PCC_FTM3 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC FTM3 Register"]
|
||||
pub mod pcc_ftm3;
|
||||
#[doc = "PCC ADC1 Register"]
|
||||
pub struct PCC_ADC1 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC ADC1 Register"]
|
||||
pub mod pcc_adc1;
|
||||
#[doc = "PCC Reserved Register 40"]
|
||||
pub struct PCCDUMMY40 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC Reserved Register 40"]
|
||||
pub mod pccdummy40;
|
||||
#[doc = "PCC Reserved Register 41"]
|
||||
pub struct PCCDUMMY41 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC Reserved Register 41"]
|
||||
pub mod pccdummy41;
|
||||
#[doc = "PCC Reserved Register 42"]
|
||||
pub struct PCCDUMMY42 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC Reserved Register 42"]
|
||||
pub mod pccdummy42;
|
||||
#[doc = "PCC FlexCAN2 Register"]
|
||||
pub struct PCC_FLEXCAN2 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC FlexCAN2 Register"]
|
||||
pub mod pcc_flex_can2;
|
||||
#[doc = "PCC LPSPI0 Register"]
|
||||
pub struct PCC_LPSPI0 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC LPSPI0 Register"]
|
||||
pub mod pcc_lpspi0;
|
||||
#[doc = "PCC LPSPI1 Register"]
|
||||
pub struct PCC_LPSPI1 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC LPSPI1 Register"]
|
||||
pub mod pcc_lpspi1;
|
||||
#[doc = "PCC LPSPI2 Register"]
|
||||
pub struct PCC_LPSPI2 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC LPSPI2 Register"]
|
||||
pub mod pcc_lpspi2;
|
||||
#[doc = "PCC Reserved Register 47"]
|
||||
pub struct PCCDUMMY47 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC Reserved Register 47"]
|
||||
pub mod pccdummy47;
|
||||
#[doc = "PCC Reserved Register 48"]
|
||||
pub struct PCCDUMMY48 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC Reserved Register 48"]
|
||||
pub mod pccdummy48;
|
||||
#[doc = "PCC PDB1 Register"]
|
||||
pub struct PCC_PDB1 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC PDB1 Register"]
|
||||
pub mod pcc_pdb1;
|
||||
#[doc = "PCC CRC Register"]
|
||||
pub struct PCC_CRC {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC CRC Register"]
|
||||
pub mod pcc_crc;
|
||||
#[doc = "PCC Reserved Register 51"]
|
||||
pub struct PCCDUMMY51 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC Reserved Register 51"]
|
||||
pub mod pccdummy51;
|
||||
#[doc = "PCC Reserved Register 52"]
|
||||
pub struct PCCDUMMY52 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC Reserved Register 52"]
|
||||
pub mod pccdummy52;
|
||||
#[doc = "PCC Reserved Register 53"]
|
||||
pub struct PCCDUMMY53 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC Reserved Register 53"]
|
||||
pub mod pccdummy53;
|
||||
#[doc = "PCC PDB0 Register"]
|
||||
pub struct PCC_PDB0 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC PDB0 Register"]
|
||||
pub mod pcc_pdb0;
|
||||
#[doc = "PCC LPIT Register"]
|
||||
pub struct PCC_LPIT {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC LPIT Register"]
|
||||
pub mod pcc_lpit;
|
||||
#[doc = "PCC FTM0 Register"]
|
||||
pub struct PCC_FTM0 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC FTM0 Register"]
|
||||
pub mod pcc_ftm0;
|
||||
#[doc = "PCC FTM1 Register"]
|
||||
pub struct PCC_FTM1 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC FTM1 Register"]
|
||||
pub mod pcc_ftm1;
|
||||
#[doc = "PCC FTM2 Register"]
|
||||
pub struct PCC_FTM2 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC FTM2 Register"]
|
||||
pub mod pcc_ftm2;
|
||||
#[doc = "PCC ADC0 Register"]
|
||||
pub struct PCC_ADC0 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC ADC0 Register"]
|
||||
pub mod pcc_adc0;
|
||||
#[doc = "PCC Reserved Register 60"]
|
||||
pub struct PCCDUMMY60 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC Reserved Register 60"]
|
||||
pub mod pccdummy60;
|
||||
#[doc = "PCC RTC Register"]
|
||||
pub struct PCC_RTC {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC RTC Register"]
|
||||
pub mod pcc_rtc;
|
||||
#[doc = "PCC Reserved Register 62"]
|
||||
pub struct PCCDUMMY62 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC Reserved Register 62"]
|
||||
pub mod pccdummy62;
|
||||
#[doc = "PCC Reserved Register 63"]
|
||||
pub struct PCCDUMMY63 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC Reserved Register 63"]
|
||||
pub mod pccdummy63;
|
||||
#[doc = "PCC LPTMR0 Register"]
|
||||
pub struct PCC_LPTMR0 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC LPTMR0 Register"]
|
||||
pub mod pcc_lptmr0;
|
||||
#[doc = "PCC Reserved Register 65"]
|
||||
pub struct PCCDUMMY65 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC Reserved Register 65"]
|
||||
pub mod pccdummy65;
|
||||
#[doc = "PCC Reserved Register 66"]
|
||||
pub struct PCCDUMMY66 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC Reserved Register 66"]
|
||||
pub mod pccdummy66;
|
||||
#[doc = "PCC Reserved Register 67"]
|
||||
pub struct PCCDUMMY67 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC Reserved Register 67"]
|
||||
pub mod pccdummy67;
|
||||
#[doc = "PCC Reserved Register 68"]
|
||||
pub struct PCCDUMMY68 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC Reserved Register 68"]
|
||||
pub mod pccdummy68;
|
||||
#[doc = "PCC Reserved Register 69"]
|
||||
pub struct PCCDUMMY69 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC Reserved Register 69"]
|
||||
pub mod pccdummy69;
|
||||
#[doc = "PCC Reserved Register 70"]
|
||||
pub struct PCCDUMMY70 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC Reserved Register 70"]
|
||||
pub mod pccdummy70;
|
||||
#[doc = "PCC Reserved Register 71"]
|
||||
pub struct PCCDUMMY71 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC Reserved Register 71"]
|
||||
pub mod pccdummy71;
|
||||
#[doc = "PCC Reserved Register 72"]
|
||||
pub struct PCCDUMMY72 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC Reserved Register 72"]
|
||||
pub mod pccdummy72;
|
||||
#[doc = "PCC PORTA Register"]
|
||||
pub struct PCC_PORTA {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC PORTA Register"]
|
||||
pub mod pcc_porta;
|
||||
#[doc = "PCC PORTB Register"]
|
||||
pub struct PCC_PORTB {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC PORTB Register"]
|
||||
pub mod pcc_portb;
|
||||
#[doc = "PCC PORTC Register"]
|
||||
pub struct PCC_PORTC {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC PORTC Register"]
|
||||
pub mod pcc_portc;
|
||||
#[doc = "PCC PORTD Register"]
|
||||
pub struct PCC_PORTD {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC PORTD Register"]
|
||||
pub mod pcc_portd;
|
||||
#[doc = "PCC PORTE Register"]
|
||||
pub struct PCC_PORTE {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC PORTE Register"]
|
||||
pub mod pcc_porte;
|
||||
#[doc = "PCC Reserved Register 78"]
|
||||
pub struct PCCDUMMY78 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC Reserved Register 78"]
|
||||
pub mod pccdummy78;
|
||||
#[doc = "PCC Reserved Register 79"]
|
||||
pub struct PCCDUMMY79 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC Reserved Register 79"]
|
||||
pub mod pccdummy79;
|
||||
#[doc = "PCC Reserved Register 80"]
|
||||
pub struct PCCDUMMY80 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC Reserved Register 80"]
|
||||
pub mod pccdummy80;
|
||||
#[doc = "PCC Reserved Register 81"]
|
||||
pub struct PCCDUMMY81 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC Reserved Register 81"]
|
||||
pub mod pccdummy81;
|
||||
#[doc = "PCC Reserved Register 82"]
|
||||
pub struct PCCDUMMY82 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC Reserved Register 82"]
|
||||
pub mod pccdummy82;
|
||||
#[doc = "PCC Reserved Register 83"]
|
||||
pub struct PCCDUMMY83 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC Reserved Register 83"]
|
||||
pub mod pccdummy83;
|
||||
#[doc = "PCC Reserved Register 84"]
|
||||
pub struct PCCDUMMY84 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC Reserved Register 84"]
|
||||
pub mod pccdummy84;
|
||||
#[doc = "PCC Reserved Register 85"]
|
||||
pub struct PCCDUMMY85 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC Reserved Register 85"]
|
||||
pub mod pccdummy85;
|
||||
#[doc = "PCC Reserved Register 86"]
|
||||
pub struct PCCDUMMY86 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC Reserved Register 86"]
|
||||
pub mod pccdummy86;
|
||||
#[doc = "PCC Reserved Register 87"]
|
||||
pub struct PCCDUMMY87 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC Reserved Register 87"]
|
||||
pub mod pccdummy87;
|
||||
#[doc = "PCC Reserved Register 88"]
|
||||
pub struct PCCDUMMY88 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC Reserved Register 88"]
|
||||
pub mod pccdummy88;
|
||||
#[doc = "PCC Reserved Register 89"]
|
||||
pub struct PCCDUMMY89 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC Reserved Register 89"]
|
||||
pub mod pccdummy89;
|
||||
#[doc = "PCC FlexIO Register"]
|
||||
pub struct PCC_FLEXIO {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC FlexIO Register"]
|
||||
pub mod pcc_flexio;
|
||||
#[doc = "PCC Reserved Register 91"]
|
||||
pub struct PCCDUMMY91 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC Reserved Register 91"]
|
||||
pub mod pccdummy91;
|
||||
#[doc = "PCC Reserved Register 92"]
|
||||
pub struct PCCDUMMY92 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC Reserved Register 92"]
|
||||
pub mod pccdummy92;
|
||||
#[doc = "PCC Reserved Register 93"]
|
||||
pub struct PCCDUMMY93 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC Reserved Register 93"]
|
||||
pub mod pccdummy93;
|
||||
#[doc = "PCC Reserved Register 94"]
|
||||
pub struct PCCDUMMY94 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC Reserved Register 94"]
|
||||
pub mod pccdummy94;
|
||||
#[doc = "PCC Reserved Register 95"]
|
||||
pub struct PCCDUMMY95 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC Reserved Register 95"]
|
||||
pub mod pccdummy95;
|
||||
#[doc = "PCC Reserved Register 96"]
|
||||
pub struct PCCDUMMY96 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC Reserved Register 96"]
|
||||
pub mod pccdummy96;
|
||||
#[doc = "PCC EWM Register"]
|
||||
pub struct PCC_EWM {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC EWM Register"]
|
||||
pub mod pcc_ewm;
|
||||
#[doc = "PCC Reserved Register 98"]
|
||||
pub struct PCCDUMMY98 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC Reserved Register 98"]
|
||||
pub mod pccdummy98;
|
||||
#[doc = "PCC Reserved Register 99"]
|
||||
pub struct PCCDUMMY99 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC Reserved Register 99"]
|
||||
pub mod pccdummy99;
|
||||
#[doc = "PCC Reserved Register 100"]
|
||||
pub struct PCCDUMMY100 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC Reserved Register 100"]
|
||||
pub mod pccdummy100;
|
||||
#[doc = "PCC Reserved Register 101"]
|
||||
pub struct PCCDUMMY101 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC Reserved Register 101"]
|
||||
pub mod pccdummy101;
|
||||
#[doc = "PCC LPI2C0 Register"]
|
||||
pub struct PCC_LPI2C0 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC LPI2C0 Register"]
|
||||
pub mod pcc_lpi2c0;
|
||||
#[doc = "PCC Reserved Register 103"]
|
||||
pub struct PCCDUMMY103 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC Reserved Register 103"]
|
||||
pub mod pccdummy103;
|
||||
#[doc = "PCC Reserved Register 104"]
|
||||
pub struct PCCDUMMY104 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC Reserved Register 104"]
|
||||
pub mod pccdummy104;
|
||||
#[doc = "PCC Reserved Register 105"]
|
||||
pub struct PCCDUMMY105 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC Reserved Register 105"]
|
||||
pub mod pccdummy105;
|
||||
#[doc = "PCC LPUART0 Register"]
|
||||
pub struct PCC_LPUART0 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC LPUART0 Register"]
|
||||
pub mod pcc_lpuart0;
|
||||
#[doc = "PCC LPUART1 Register"]
|
||||
pub struct PCC_LPUART1 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC LPUART1 Register"]
|
||||
pub mod pcc_lpuart1;
|
||||
#[doc = "PCC LPUART2 Register"]
|
||||
pub struct PCC_LPUART2 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC LPUART2 Register"]
|
||||
pub mod pcc_lpuart2;
|
||||
#[doc = "PCC Reserved Register 109"]
|
||||
pub struct PCCDUMMY109 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC Reserved Register 109"]
|
||||
pub mod pccdummy109;
|
||||
#[doc = "PCC Reserved Register 110"]
|
||||
pub struct PCCDUMMY110 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC Reserved Register 110"]
|
||||
pub mod pccdummy110;
|
||||
#[doc = "PCC Reserved Register 111"]
|
||||
pub struct PCCDUMMY111 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC Reserved Register 111"]
|
||||
pub mod pccdummy111;
|
||||
#[doc = "PCC Reserved Register 112"]
|
||||
pub struct PCCDUMMY112 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC Reserved Register 112"]
|
||||
pub mod pccdummy112;
|
||||
#[doc = "PCC Reserved Register 113"]
|
||||
pub struct PCCDUMMY113 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC Reserved Register 113"]
|
||||
pub mod pccdummy113;
|
||||
#[doc = "PCC Reserved Register 114"]
|
||||
pub struct PCCDUMMY114 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC Reserved Register 114"]
|
||||
pub mod pccdummy114;
|
||||
#[doc = "PCC CMP0 Register"]
|
||||
pub struct PCC_CMP0 {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "PCC CMP0 Register"]
|
||||
pub mod pcc_cmp0;
|
||||
441
src/pcc/pcc_adc0/mod.rs
Normal file
441
src/pcc/pcc_adc0/mod.rs
Normal file
@@ -0,0 +1,441 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PCC_ADC0 {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `PCS`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum PCSR {
|
||||
#[doc = "Clock is off."]
|
||||
_000,
|
||||
#[doc = "Clock option 1"]
|
||||
_001,
|
||||
#[doc = "Clock option 2"]
|
||||
_010,
|
||||
#[doc = "Clock option 3"]
|
||||
_011,
|
||||
#[doc = "Clock option 4"]
|
||||
_100,
|
||||
#[doc = "Clock option 5"]
|
||||
_101,
|
||||
#[doc = "Clock option 6"]
|
||||
_110,
|
||||
#[doc = "Clock option 7"]
|
||||
_111,
|
||||
}
|
||||
impl PCSR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u8 {
|
||||
match *self {
|
||||
PCSR::_000 => 0,
|
||||
PCSR::_001 => 1,
|
||||
PCSR::_010 => 2,
|
||||
PCSR::_011 => 3,
|
||||
PCSR::_100 => 4,
|
||||
PCSR::_101 => 5,
|
||||
PCSR::_110 => 6,
|
||||
PCSR::_111 => 7,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: u8) -> PCSR {
|
||||
match value {
|
||||
0 => PCSR::_000,
|
||||
1 => PCSR::_001,
|
||||
2 => PCSR::_010,
|
||||
3 => PCSR::_011,
|
||||
4 => PCSR::_100,
|
||||
5 => PCSR::_101,
|
||||
6 => PCSR::_110,
|
||||
7 => PCSR::_111,
|
||||
_ => unreachable!(),
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_000`"]
|
||||
#[inline]
|
||||
pub fn is_000(&self) -> bool {
|
||||
*self == PCSR::_000
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_001`"]
|
||||
#[inline]
|
||||
pub fn is_001(&self) -> bool {
|
||||
*self == PCSR::_001
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_010`"]
|
||||
#[inline]
|
||||
pub fn is_010(&self) -> bool {
|
||||
*self == PCSR::_010
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_011`"]
|
||||
#[inline]
|
||||
pub fn is_011(&self) -> bool {
|
||||
*self == PCSR::_011
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_100`"]
|
||||
#[inline]
|
||||
pub fn is_100(&self) -> bool {
|
||||
*self == PCSR::_100
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_101`"]
|
||||
#[inline]
|
||||
pub fn is_101(&self) -> bool {
|
||||
*self == PCSR::_101
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_110`"]
|
||||
#[inline]
|
||||
pub fn is_110(&self) -> bool {
|
||||
*self == PCSR::_110
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_111`"]
|
||||
#[inline]
|
||||
pub fn is_111(&self) -> bool {
|
||||
*self == PCSR::_111
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `CGC`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum CGCR {
|
||||
#[doc = "Clock disabled"]
|
||||
_0,
|
||||
#[doc = "Clock enabled. The current clock selection and divider options are locked."]
|
||||
_1,
|
||||
}
|
||||
impl CGCR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
match *self {
|
||||
CGCR::_0 => false,
|
||||
CGCR::_1 => true,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: bool) -> CGCR {
|
||||
match value {
|
||||
false => CGCR::_0,
|
||||
true => CGCR::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == CGCR::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == CGCR::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `PR`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum PRR {
|
||||
#[doc = "Peripheral is not present."]
|
||||
_0,
|
||||
#[doc = "Peripheral is present."]
|
||||
_1,
|
||||
}
|
||||
impl PRR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
match *self {
|
||||
PRR::_0 => false,
|
||||
PRR::_1 => true,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: bool) -> PRR {
|
||||
match value {
|
||||
false => PRR::_0,
|
||||
true => PRR::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == PRR::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == PRR::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Values that can be written to the field `PCS`"]
|
||||
pub enum PCSW {
|
||||
#[doc = "Clock is off."]
|
||||
_000,
|
||||
#[doc = "Clock option 1"]
|
||||
_001,
|
||||
#[doc = "Clock option 2"]
|
||||
_010,
|
||||
#[doc = "Clock option 3"]
|
||||
_011,
|
||||
#[doc = "Clock option 4"]
|
||||
_100,
|
||||
#[doc = "Clock option 5"]
|
||||
_101,
|
||||
#[doc = "Clock option 6"]
|
||||
_110,
|
||||
#[doc = "Clock option 7"]
|
||||
_111,
|
||||
}
|
||||
impl PCSW {
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _bits(&self) -> u8 {
|
||||
match *self {
|
||||
PCSW::_000 => 0,
|
||||
PCSW::_001 => 1,
|
||||
PCSW::_010 => 2,
|
||||
PCSW::_011 => 3,
|
||||
PCSW::_100 => 4,
|
||||
PCSW::_101 => 5,
|
||||
PCSW::_110 => 6,
|
||||
PCSW::_111 => 7,
|
||||
}
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _PCSW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _PCSW<'a> {
|
||||
#[doc = r" Writes `variant` to the field"]
|
||||
#[inline]
|
||||
pub fn variant(self, variant: PCSW) -> &'a mut W {
|
||||
{
|
||||
self.bits(variant._bits())
|
||||
}
|
||||
}
|
||||
#[doc = "Clock is off."]
|
||||
#[inline]
|
||||
pub fn _000(self) -> &'a mut W {
|
||||
self.variant(PCSW::_000)
|
||||
}
|
||||
#[doc = "Clock option 1"]
|
||||
#[inline]
|
||||
pub fn _001(self) -> &'a mut W {
|
||||
self.variant(PCSW::_001)
|
||||
}
|
||||
#[doc = "Clock option 2"]
|
||||
#[inline]
|
||||
pub fn _010(self) -> &'a mut W {
|
||||
self.variant(PCSW::_010)
|
||||
}
|
||||
#[doc = "Clock option 3"]
|
||||
#[inline]
|
||||
pub fn _011(self) -> &'a mut W {
|
||||
self.variant(PCSW::_011)
|
||||
}
|
||||
#[doc = "Clock option 4"]
|
||||
#[inline]
|
||||
pub fn _100(self) -> &'a mut W {
|
||||
self.variant(PCSW::_100)
|
||||
}
|
||||
#[doc = "Clock option 5"]
|
||||
#[inline]
|
||||
pub fn _101(self) -> &'a mut W {
|
||||
self.variant(PCSW::_101)
|
||||
}
|
||||
#[doc = "Clock option 6"]
|
||||
#[inline]
|
||||
pub fn _110(self) -> &'a mut W {
|
||||
self.variant(PCSW::_110)
|
||||
}
|
||||
#[doc = "Clock option 7"]
|
||||
#[inline]
|
||||
pub fn _111(self) -> &'a mut W {
|
||||
self.variant(PCSW::_111)
|
||||
}
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub fn bits(self, value: u8) -> &'a mut W {
|
||||
const MASK: u8 = 7;
|
||||
const OFFSET: u8 = 24;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = "Values that can be written to the field `CGC`"]
|
||||
pub enum CGCW {
|
||||
#[doc = "Clock disabled"]
|
||||
_0,
|
||||
#[doc = "Clock enabled. The current clock selection and divider options are locked."]
|
||||
_1,
|
||||
}
|
||||
impl CGCW {
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _bits(&self) -> bool {
|
||||
match *self {
|
||||
CGCW::_0 => false,
|
||||
CGCW::_1 => true,
|
||||
}
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _CGCW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _CGCW<'a> {
|
||||
#[doc = r" Writes `variant` to the field"]
|
||||
#[inline]
|
||||
pub fn variant(self, variant: CGCW) -> &'a mut W {
|
||||
{
|
||||
self.bit(variant._bits())
|
||||
}
|
||||
}
|
||||
#[doc = "Clock disabled"]
|
||||
#[inline]
|
||||
pub fn _0(self) -> &'a mut W {
|
||||
self.variant(CGCW::_0)
|
||||
}
|
||||
#[doc = "Clock enabled. The current clock selection and divider options are locked."]
|
||||
#[inline]
|
||||
pub fn _1(self) -> &'a mut W {
|
||||
self.variant(CGCW::_1)
|
||||
}
|
||||
#[doc = r" Sets the field bit"]
|
||||
pub fn set_bit(self) -> &'a mut W {
|
||||
self.bit(true)
|
||||
}
|
||||
#[doc = r" Clears the field bit"]
|
||||
pub fn clear_bit(self) -> &'a mut W {
|
||||
self.bit(false)
|
||||
}
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub fn bit(self, value: bool) -> &'a mut W {
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 30;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
#[doc = "Bits 24:26 - Peripheral Clock Source Select"]
|
||||
#[inline]
|
||||
pub fn pcs(&self) -> PCSR {
|
||||
PCSR::_from({
|
||||
const MASK: u8 = 7;
|
||||
const OFFSET: u8 = 24;
|
||||
((self.bits >> OFFSET) & MASK as u32) as u8
|
||||
})
|
||||
}
|
||||
#[doc = "Bit 30 - Clock Gate Control"]
|
||||
#[inline]
|
||||
pub fn cgc(&self) -> CGCR {
|
||||
CGCR::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 30;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
#[doc = "Bit 31 - Present"]
|
||||
#[inline]
|
||||
pub fn pr(&self) -> PRR {
|
||||
PRR::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 31;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 2147483648 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
#[doc = "Bits 24:26 - Peripheral Clock Source Select"]
|
||||
#[inline]
|
||||
pub fn pcs(&mut self) -> _PCSW {
|
||||
_PCSW { w: self }
|
||||
}
|
||||
#[doc = "Bit 30 - Clock Gate Control"]
|
||||
#[inline]
|
||||
pub fn cgc(&mut self) -> _CGCW {
|
||||
_CGCW { w: self }
|
||||
}
|
||||
}
|
||||
441
src/pcc/pcc_adc1/mod.rs
Normal file
441
src/pcc/pcc_adc1/mod.rs
Normal file
@@ -0,0 +1,441 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PCC_ADC1 {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `PCS`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum PCSR {
|
||||
#[doc = "Clock is off."]
|
||||
_000,
|
||||
#[doc = "Clock option 1"]
|
||||
_001,
|
||||
#[doc = "Clock option 2"]
|
||||
_010,
|
||||
#[doc = "Clock option 3"]
|
||||
_011,
|
||||
#[doc = "Clock option 4"]
|
||||
_100,
|
||||
#[doc = "Clock option 5"]
|
||||
_101,
|
||||
#[doc = "Clock option 6"]
|
||||
_110,
|
||||
#[doc = "Clock option 7"]
|
||||
_111,
|
||||
}
|
||||
impl PCSR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u8 {
|
||||
match *self {
|
||||
PCSR::_000 => 0,
|
||||
PCSR::_001 => 1,
|
||||
PCSR::_010 => 2,
|
||||
PCSR::_011 => 3,
|
||||
PCSR::_100 => 4,
|
||||
PCSR::_101 => 5,
|
||||
PCSR::_110 => 6,
|
||||
PCSR::_111 => 7,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: u8) -> PCSR {
|
||||
match value {
|
||||
0 => PCSR::_000,
|
||||
1 => PCSR::_001,
|
||||
2 => PCSR::_010,
|
||||
3 => PCSR::_011,
|
||||
4 => PCSR::_100,
|
||||
5 => PCSR::_101,
|
||||
6 => PCSR::_110,
|
||||
7 => PCSR::_111,
|
||||
_ => unreachable!(),
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_000`"]
|
||||
#[inline]
|
||||
pub fn is_000(&self) -> bool {
|
||||
*self == PCSR::_000
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_001`"]
|
||||
#[inline]
|
||||
pub fn is_001(&self) -> bool {
|
||||
*self == PCSR::_001
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_010`"]
|
||||
#[inline]
|
||||
pub fn is_010(&self) -> bool {
|
||||
*self == PCSR::_010
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_011`"]
|
||||
#[inline]
|
||||
pub fn is_011(&self) -> bool {
|
||||
*self == PCSR::_011
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_100`"]
|
||||
#[inline]
|
||||
pub fn is_100(&self) -> bool {
|
||||
*self == PCSR::_100
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_101`"]
|
||||
#[inline]
|
||||
pub fn is_101(&self) -> bool {
|
||||
*self == PCSR::_101
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_110`"]
|
||||
#[inline]
|
||||
pub fn is_110(&self) -> bool {
|
||||
*self == PCSR::_110
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_111`"]
|
||||
#[inline]
|
||||
pub fn is_111(&self) -> bool {
|
||||
*self == PCSR::_111
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `CGC`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum CGCR {
|
||||
#[doc = "Clock disabled"]
|
||||
_0,
|
||||
#[doc = "Clock enabled. The current clock selection and divider options are locked."]
|
||||
_1,
|
||||
}
|
||||
impl CGCR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
match *self {
|
||||
CGCR::_0 => false,
|
||||
CGCR::_1 => true,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: bool) -> CGCR {
|
||||
match value {
|
||||
false => CGCR::_0,
|
||||
true => CGCR::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == CGCR::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == CGCR::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `PR`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum PRR {
|
||||
#[doc = "Peripheral is not present."]
|
||||
_0,
|
||||
#[doc = "Peripheral is present."]
|
||||
_1,
|
||||
}
|
||||
impl PRR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
match *self {
|
||||
PRR::_0 => false,
|
||||
PRR::_1 => true,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: bool) -> PRR {
|
||||
match value {
|
||||
false => PRR::_0,
|
||||
true => PRR::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == PRR::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == PRR::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Values that can be written to the field `PCS`"]
|
||||
pub enum PCSW {
|
||||
#[doc = "Clock is off."]
|
||||
_000,
|
||||
#[doc = "Clock option 1"]
|
||||
_001,
|
||||
#[doc = "Clock option 2"]
|
||||
_010,
|
||||
#[doc = "Clock option 3"]
|
||||
_011,
|
||||
#[doc = "Clock option 4"]
|
||||
_100,
|
||||
#[doc = "Clock option 5"]
|
||||
_101,
|
||||
#[doc = "Clock option 6"]
|
||||
_110,
|
||||
#[doc = "Clock option 7"]
|
||||
_111,
|
||||
}
|
||||
impl PCSW {
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _bits(&self) -> u8 {
|
||||
match *self {
|
||||
PCSW::_000 => 0,
|
||||
PCSW::_001 => 1,
|
||||
PCSW::_010 => 2,
|
||||
PCSW::_011 => 3,
|
||||
PCSW::_100 => 4,
|
||||
PCSW::_101 => 5,
|
||||
PCSW::_110 => 6,
|
||||
PCSW::_111 => 7,
|
||||
}
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _PCSW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _PCSW<'a> {
|
||||
#[doc = r" Writes `variant` to the field"]
|
||||
#[inline]
|
||||
pub fn variant(self, variant: PCSW) -> &'a mut W {
|
||||
{
|
||||
self.bits(variant._bits())
|
||||
}
|
||||
}
|
||||
#[doc = "Clock is off."]
|
||||
#[inline]
|
||||
pub fn _000(self) -> &'a mut W {
|
||||
self.variant(PCSW::_000)
|
||||
}
|
||||
#[doc = "Clock option 1"]
|
||||
#[inline]
|
||||
pub fn _001(self) -> &'a mut W {
|
||||
self.variant(PCSW::_001)
|
||||
}
|
||||
#[doc = "Clock option 2"]
|
||||
#[inline]
|
||||
pub fn _010(self) -> &'a mut W {
|
||||
self.variant(PCSW::_010)
|
||||
}
|
||||
#[doc = "Clock option 3"]
|
||||
#[inline]
|
||||
pub fn _011(self) -> &'a mut W {
|
||||
self.variant(PCSW::_011)
|
||||
}
|
||||
#[doc = "Clock option 4"]
|
||||
#[inline]
|
||||
pub fn _100(self) -> &'a mut W {
|
||||
self.variant(PCSW::_100)
|
||||
}
|
||||
#[doc = "Clock option 5"]
|
||||
#[inline]
|
||||
pub fn _101(self) -> &'a mut W {
|
||||
self.variant(PCSW::_101)
|
||||
}
|
||||
#[doc = "Clock option 6"]
|
||||
#[inline]
|
||||
pub fn _110(self) -> &'a mut W {
|
||||
self.variant(PCSW::_110)
|
||||
}
|
||||
#[doc = "Clock option 7"]
|
||||
#[inline]
|
||||
pub fn _111(self) -> &'a mut W {
|
||||
self.variant(PCSW::_111)
|
||||
}
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub fn bits(self, value: u8) -> &'a mut W {
|
||||
const MASK: u8 = 7;
|
||||
const OFFSET: u8 = 24;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = "Values that can be written to the field `CGC`"]
|
||||
pub enum CGCW {
|
||||
#[doc = "Clock disabled"]
|
||||
_0,
|
||||
#[doc = "Clock enabled. The current clock selection and divider options are locked."]
|
||||
_1,
|
||||
}
|
||||
impl CGCW {
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _bits(&self) -> bool {
|
||||
match *self {
|
||||
CGCW::_0 => false,
|
||||
CGCW::_1 => true,
|
||||
}
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _CGCW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _CGCW<'a> {
|
||||
#[doc = r" Writes `variant` to the field"]
|
||||
#[inline]
|
||||
pub fn variant(self, variant: CGCW) -> &'a mut W {
|
||||
{
|
||||
self.bit(variant._bits())
|
||||
}
|
||||
}
|
||||
#[doc = "Clock disabled"]
|
||||
#[inline]
|
||||
pub fn _0(self) -> &'a mut W {
|
||||
self.variant(CGCW::_0)
|
||||
}
|
||||
#[doc = "Clock enabled. The current clock selection and divider options are locked."]
|
||||
#[inline]
|
||||
pub fn _1(self) -> &'a mut W {
|
||||
self.variant(CGCW::_1)
|
||||
}
|
||||
#[doc = r" Sets the field bit"]
|
||||
pub fn set_bit(self) -> &'a mut W {
|
||||
self.bit(true)
|
||||
}
|
||||
#[doc = r" Clears the field bit"]
|
||||
pub fn clear_bit(self) -> &'a mut W {
|
||||
self.bit(false)
|
||||
}
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub fn bit(self, value: bool) -> &'a mut W {
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 30;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
#[doc = "Bits 24:26 - Peripheral Clock Source Select"]
|
||||
#[inline]
|
||||
pub fn pcs(&self) -> PCSR {
|
||||
PCSR::_from({
|
||||
const MASK: u8 = 7;
|
||||
const OFFSET: u8 = 24;
|
||||
((self.bits >> OFFSET) & MASK as u32) as u8
|
||||
})
|
||||
}
|
||||
#[doc = "Bit 30 - Clock Gate Control"]
|
||||
#[inline]
|
||||
pub fn cgc(&self) -> CGCR {
|
||||
CGCR::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 30;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
#[doc = "Bit 31 - Present"]
|
||||
#[inline]
|
||||
pub fn pr(&self) -> PRR {
|
||||
PRR::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 31;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 2147483648 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
#[doc = "Bits 24:26 - Peripheral Clock Source Select"]
|
||||
#[inline]
|
||||
pub fn pcs(&mut self) -> _PCSW {
|
||||
_PCSW { w: self }
|
||||
}
|
||||
#[doc = "Bit 30 - Clock Gate Control"]
|
||||
#[inline]
|
||||
pub fn cgc(&mut self) -> _CGCW {
|
||||
_CGCW { w: self }
|
||||
}
|
||||
}
|
||||
237
src/pcc/pcc_cmp0/mod.rs
Normal file
237
src/pcc/pcc_cmp0/mod.rs
Normal file
@@ -0,0 +1,237 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PCC_CMP0 {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `CGC`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum CGCR {
|
||||
#[doc = "Clock disabled"]
|
||||
_0,
|
||||
#[doc = "Clock enabled. The current clock selection and divider options are locked."]
|
||||
_1,
|
||||
}
|
||||
impl CGCR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
match *self {
|
||||
CGCR::_0 => false,
|
||||
CGCR::_1 => true,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: bool) -> CGCR {
|
||||
match value {
|
||||
false => CGCR::_0,
|
||||
true => CGCR::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == CGCR::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == CGCR::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `PR`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum PRR {
|
||||
#[doc = "Peripheral is not present."]
|
||||
_0,
|
||||
#[doc = "Peripheral is present."]
|
||||
_1,
|
||||
}
|
||||
impl PRR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
match *self {
|
||||
PRR::_0 => false,
|
||||
PRR::_1 => true,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: bool) -> PRR {
|
||||
match value {
|
||||
false => PRR::_0,
|
||||
true => PRR::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == PRR::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == PRR::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Values that can be written to the field `CGC`"]
|
||||
pub enum CGCW {
|
||||
#[doc = "Clock disabled"]
|
||||
_0,
|
||||
#[doc = "Clock enabled. The current clock selection and divider options are locked."]
|
||||
_1,
|
||||
}
|
||||
impl CGCW {
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _bits(&self) -> bool {
|
||||
match *self {
|
||||
CGCW::_0 => false,
|
||||
CGCW::_1 => true,
|
||||
}
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _CGCW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _CGCW<'a> {
|
||||
#[doc = r" Writes `variant` to the field"]
|
||||
#[inline]
|
||||
pub fn variant(self, variant: CGCW) -> &'a mut W {
|
||||
{
|
||||
self.bit(variant._bits())
|
||||
}
|
||||
}
|
||||
#[doc = "Clock disabled"]
|
||||
#[inline]
|
||||
pub fn _0(self) -> &'a mut W {
|
||||
self.variant(CGCW::_0)
|
||||
}
|
||||
#[doc = "Clock enabled. The current clock selection and divider options are locked."]
|
||||
#[inline]
|
||||
pub fn _1(self) -> &'a mut W {
|
||||
self.variant(CGCW::_1)
|
||||
}
|
||||
#[doc = r" Sets the field bit"]
|
||||
pub fn set_bit(self) -> &'a mut W {
|
||||
self.bit(true)
|
||||
}
|
||||
#[doc = r" Clears the field bit"]
|
||||
pub fn clear_bit(self) -> &'a mut W {
|
||||
self.bit(false)
|
||||
}
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub fn bit(self, value: bool) -> &'a mut W {
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 30;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
#[doc = "Bit 30 - Clock Gate Control"]
|
||||
#[inline]
|
||||
pub fn cgc(&self) -> CGCR {
|
||||
CGCR::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 30;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
#[doc = "Bit 31 - Present"]
|
||||
#[inline]
|
||||
pub fn pr(&self) -> PRR {
|
||||
PRR::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 31;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 2147483648 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
#[doc = "Bit 30 - Clock Gate Control"]
|
||||
#[inline]
|
||||
pub fn cgc(&mut self) -> _CGCW {
|
||||
_CGCW { w: self }
|
||||
}
|
||||
}
|
||||
237
src/pcc/pcc_crc/mod.rs
Normal file
237
src/pcc/pcc_crc/mod.rs
Normal file
@@ -0,0 +1,237 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PCC_CRC {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `CGC`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum CGCR {
|
||||
#[doc = "Clock disabled"]
|
||||
_0,
|
||||
#[doc = "Clock enabled. The current clock selection and divider options are locked."]
|
||||
_1,
|
||||
}
|
||||
impl CGCR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
match *self {
|
||||
CGCR::_0 => false,
|
||||
CGCR::_1 => true,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: bool) -> CGCR {
|
||||
match value {
|
||||
false => CGCR::_0,
|
||||
true => CGCR::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == CGCR::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == CGCR::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `PR`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum PRR {
|
||||
#[doc = "Peripheral is not present."]
|
||||
_0,
|
||||
#[doc = "Peripheral is present."]
|
||||
_1,
|
||||
}
|
||||
impl PRR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
match *self {
|
||||
PRR::_0 => false,
|
||||
PRR::_1 => true,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: bool) -> PRR {
|
||||
match value {
|
||||
false => PRR::_0,
|
||||
true => PRR::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == PRR::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == PRR::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Values that can be written to the field `CGC`"]
|
||||
pub enum CGCW {
|
||||
#[doc = "Clock disabled"]
|
||||
_0,
|
||||
#[doc = "Clock enabled. The current clock selection and divider options are locked."]
|
||||
_1,
|
||||
}
|
||||
impl CGCW {
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _bits(&self) -> bool {
|
||||
match *self {
|
||||
CGCW::_0 => false,
|
||||
CGCW::_1 => true,
|
||||
}
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _CGCW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _CGCW<'a> {
|
||||
#[doc = r" Writes `variant` to the field"]
|
||||
#[inline]
|
||||
pub fn variant(self, variant: CGCW) -> &'a mut W {
|
||||
{
|
||||
self.bit(variant._bits())
|
||||
}
|
||||
}
|
||||
#[doc = "Clock disabled"]
|
||||
#[inline]
|
||||
pub fn _0(self) -> &'a mut W {
|
||||
self.variant(CGCW::_0)
|
||||
}
|
||||
#[doc = "Clock enabled. The current clock selection and divider options are locked."]
|
||||
#[inline]
|
||||
pub fn _1(self) -> &'a mut W {
|
||||
self.variant(CGCW::_1)
|
||||
}
|
||||
#[doc = r" Sets the field bit"]
|
||||
pub fn set_bit(self) -> &'a mut W {
|
||||
self.bit(true)
|
||||
}
|
||||
#[doc = r" Clears the field bit"]
|
||||
pub fn clear_bit(self) -> &'a mut W {
|
||||
self.bit(false)
|
||||
}
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub fn bit(self, value: bool) -> &'a mut W {
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 30;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
#[doc = "Bit 30 - Clock Gate Control"]
|
||||
#[inline]
|
||||
pub fn cgc(&self) -> CGCR {
|
||||
CGCR::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 30;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
#[doc = "Bit 31 - Present"]
|
||||
#[inline]
|
||||
pub fn pr(&self) -> PRR {
|
||||
PRR::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 31;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 2147483648 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
#[doc = "Bit 30 - Clock Gate Control"]
|
||||
#[inline]
|
||||
pub fn cgc(&mut self) -> _CGCW {
|
||||
_CGCW { w: self }
|
||||
}
|
||||
}
|
||||
237
src/pcc/pcc_dmamux/mod.rs
Normal file
237
src/pcc/pcc_dmamux/mod.rs
Normal file
@@ -0,0 +1,237 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PCC_DMAMUX {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `CGC`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum CGCR {
|
||||
#[doc = "Clock disabled"]
|
||||
_0,
|
||||
#[doc = "Clock enabled. The current clock selection and divider options are locked."]
|
||||
_1,
|
||||
}
|
||||
impl CGCR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
match *self {
|
||||
CGCR::_0 => false,
|
||||
CGCR::_1 => true,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: bool) -> CGCR {
|
||||
match value {
|
||||
false => CGCR::_0,
|
||||
true => CGCR::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == CGCR::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == CGCR::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `PR`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum PRR {
|
||||
#[doc = "Peripheral is not present."]
|
||||
_0,
|
||||
#[doc = "Peripheral is present."]
|
||||
_1,
|
||||
}
|
||||
impl PRR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
match *self {
|
||||
PRR::_0 => false,
|
||||
PRR::_1 => true,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: bool) -> PRR {
|
||||
match value {
|
||||
false => PRR::_0,
|
||||
true => PRR::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == PRR::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == PRR::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Values that can be written to the field `CGC`"]
|
||||
pub enum CGCW {
|
||||
#[doc = "Clock disabled"]
|
||||
_0,
|
||||
#[doc = "Clock enabled. The current clock selection and divider options are locked."]
|
||||
_1,
|
||||
}
|
||||
impl CGCW {
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _bits(&self) -> bool {
|
||||
match *self {
|
||||
CGCW::_0 => false,
|
||||
CGCW::_1 => true,
|
||||
}
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _CGCW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _CGCW<'a> {
|
||||
#[doc = r" Writes `variant` to the field"]
|
||||
#[inline]
|
||||
pub fn variant(self, variant: CGCW) -> &'a mut W {
|
||||
{
|
||||
self.bit(variant._bits())
|
||||
}
|
||||
}
|
||||
#[doc = "Clock disabled"]
|
||||
#[inline]
|
||||
pub fn _0(self) -> &'a mut W {
|
||||
self.variant(CGCW::_0)
|
||||
}
|
||||
#[doc = "Clock enabled. The current clock selection and divider options are locked."]
|
||||
#[inline]
|
||||
pub fn _1(self) -> &'a mut W {
|
||||
self.variant(CGCW::_1)
|
||||
}
|
||||
#[doc = r" Sets the field bit"]
|
||||
pub fn set_bit(self) -> &'a mut W {
|
||||
self.bit(true)
|
||||
}
|
||||
#[doc = r" Clears the field bit"]
|
||||
pub fn clear_bit(self) -> &'a mut W {
|
||||
self.bit(false)
|
||||
}
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub fn bit(self, value: bool) -> &'a mut W {
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 30;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
#[doc = "Bit 30 - Clock Gate Control"]
|
||||
#[inline]
|
||||
pub fn cgc(&self) -> CGCR {
|
||||
CGCR::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 30;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
#[doc = "Bit 31 - Present"]
|
||||
#[inline]
|
||||
pub fn pr(&self) -> PRR {
|
||||
PRR::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 31;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 2147483648 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
#[doc = "Bit 30 - Clock Gate Control"]
|
||||
#[inline]
|
||||
pub fn cgc(&mut self) -> _CGCW {
|
||||
_CGCW { w: self }
|
||||
}
|
||||
}
|
||||
237
src/pcc/pcc_ewm/mod.rs
Normal file
237
src/pcc/pcc_ewm/mod.rs
Normal file
@@ -0,0 +1,237 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PCC_EWM {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `CGC`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum CGCR {
|
||||
#[doc = "Clock disabled"]
|
||||
_0,
|
||||
#[doc = "Clock enabled. The current clock selection and divider options are locked."]
|
||||
_1,
|
||||
}
|
||||
impl CGCR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
match *self {
|
||||
CGCR::_0 => false,
|
||||
CGCR::_1 => true,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: bool) -> CGCR {
|
||||
match value {
|
||||
false => CGCR::_0,
|
||||
true => CGCR::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == CGCR::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == CGCR::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `PR`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum PRR {
|
||||
#[doc = "Peripheral is not present."]
|
||||
_0,
|
||||
#[doc = "Peripheral is present."]
|
||||
_1,
|
||||
}
|
||||
impl PRR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
match *self {
|
||||
PRR::_0 => false,
|
||||
PRR::_1 => true,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: bool) -> PRR {
|
||||
match value {
|
||||
false => PRR::_0,
|
||||
true => PRR::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == PRR::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == PRR::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Values that can be written to the field `CGC`"]
|
||||
pub enum CGCW {
|
||||
#[doc = "Clock disabled"]
|
||||
_0,
|
||||
#[doc = "Clock enabled. The current clock selection and divider options are locked."]
|
||||
_1,
|
||||
}
|
||||
impl CGCW {
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _bits(&self) -> bool {
|
||||
match *self {
|
||||
CGCW::_0 => false,
|
||||
CGCW::_1 => true,
|
||||
}
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _CGCW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _CGCW<'a> {
|
||||
#[doc = r" Writes `variant` to the field"]
|
||||
#[inline]
|
||||
pub fn variant(self, variant: CGCW) -> &'a mut W {
|
||||
{
|
||||
self.bit(variant._bits())
|
||||
}
|
||||
}
|
||||
#[doc = "Clock disabled"]
|
||||
#[inline]
|
||||
pub fn _0(self) -> &'a mut W {
|
||||
self.variant(CGCW::_0)
|
||||
}
|
||||
#[doc = "Clock enabled. The current clock selection and divider options are locked."]
|
||||
#[inline]
|
||||
pub fn _1(self) -> &'a mut W {
|
||||
self.variant(CGCW::_1)
|
||||
}
|
||||
#[doc = r" Sets the field bit"]
|
||||
pub fn set_bit(self) -> &'a mut W {
|
||||
self.bit(true)
|
||||
}
|
||||
#[doc = r" Clears the field bit"]
|
||||
pub fn clear_bit(self) -> &'a mut W {
|
||||
self.bit(false)
|
||||
}
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub fn bit(self, value: bool) -> &'a mut W {
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 30;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
#[doc = "Bit 30 - Clock Gate Control"]
|
||||
#[inline]
|
||||
pub fn cgc(&self) -> CGCR {
|
||||
CGCR::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 30;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
#[doc = "Bit 31 - Present"]
|
||||
#[inline]
|
||||
pub fn pr(&self) -> PRR {
|
||||
PRR::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 31;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 2147483648 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
#[doc = "Bit 30 - Clock Gate Control"]
|
||||
#[inline]
|
||||
pub fn cgc(&mut self) -> _CGCW {
|
||||
_CGCW { w: self }
|
||||
}
|
||||
}
|
||||
237
src/pcc/pcc_flex_can0/mod.rs
Normal file
237
src/pcc/pcc_flex_can0/mod.rs
Normal file
@@ -0,0 +1,237 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PCC_FLEXCAN0 {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `CGC`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum CGCR {
|
||||
#[doc = "Clock disabled"]
|
||||
_0,
|
||||
#[doc = "Clock enabled. The current clock selection and divider options are locked."]
|
||||
_1,
|
||||
}
|
||||
impl CGCR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
match *self {
|
||||
CGCR::_0 => false,
|
||||
CGCR::_1 => true,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: bool) -> CGCR {
|
||||
match value {
|
||||
false => CGCR::_0,
|
||||
true => CGCR::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == CGCR::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == CGCR::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `PR`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum PRR {
|
||||
#[doc = "Peripheral is not present."]
|
||||
_0,
|
||||
#[doc = "Peripheral is present."]
|
||||
_1,
|
||||
}
|
||||
impl PRR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
match *self {
|
||||
PRR::_0 => false,
|
||||
PRR::_1 => true,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: bool) -> PRR {
|
||||
match value {
|
||||
false => PRR::_0,
|
||||
true => PRR::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == PRR::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == PRR::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Values that can be written to the field `CGC`"]
|
||||
pub enum CGCW {
|
||||
#[doc = "Clock disabled"]
|
||||
_0,
|
||||
#[doc = "Clock enabled. The current clock selection and divider options are locked."]
|
||||
_1,
|
||||
}
|
||||
impl CGCW {
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _bits(&self) -> bool {
|
||||
match *self {
|
||||
CGCW::_0 => false,
|
||||
CGCW::_1 => true,
|
||||
}
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _CGCW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _CGCW<'a> {
|
||||
#[doc = r" Writes `variant` to the field"]
|
||||
#[inline]
|
||||
pub fn variant(self, variant: CGCW) -> &'a mut W {
|
||||
{
|
||||
self.bit(variant._bits())
|
||||
}
|
||||
}
|
||||
#[doc = "Clock disabled"]
|
||||
#[inline]
|
||||
pub fn _0(self) -> &'a mut W {
|
||||
self.variant(CGCW::_0)
|
||||
}
|
||||
#[doc = "Clock enabled. The current clock selection and divider options are locked."]
|
||||
#[inline]
|
||||
pub fn _1(self) -> &'a mut W {
|
||||
self.variant(CGCW::_1)
|
||||
}
|
||||
#[doc = r" Sets the field bit"]
|
||||
pub fn set_bit(self) -> &'a mut W {
|
||||
self.bit(true)
|
||||
}
|
||||
#[doc = r" Clears the field bit"]
|
||||
pub fn clear_bit(self) -> &'a mut W {
|
||||
self.bit(false)
|
||||
}
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub fn bit(self, value: bool) -> &'a mut W {
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 30;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
#[doc = "Bit 30 - Clock Gate Control"]
|
||||
#[inline]
|
||||
pub fn cgc(&self) -> CGCR {
|
||||
CGCR::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 30;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
#[doc = "Bit 31 - Present"]
|
||||
#[inline]
|
||||
pub fn pr(&self) -> PRR {
|
||||
PRR::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 31;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 2147483648 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
#[doc = "Bit 30 - Clock Gate Control"]
|
||||
#[inline]
|
||||
pub fn cgc(&mut self) -> _CGCW {
|
||||
_CGCW { w: self }
|
||||
}
|
||||
}
|
||||
237
src/pcc/pcc_flex_can1/mod.rs
Normal file
237
src/pcc/pcc_flex_can1/mod.rs
Normal file
@@ -0,0 +1,237 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PCC_FLEXCAN1 {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `CGC`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum CGCR {
|
||||
#[doc = "Clock disabled"]
|
||||
_0,
|
||||
#[doc = "Clock enabled. The current clock selection and divider options are locked."]
|
||||
_1,
|
||||
}
|
||||
impl CGCR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
match *self {
|
||||
CGCR::_0 => false,
|
||||
CGCR::_1 => true,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: bool) -> CGCR {
|
||||
match value {
|
||||
false => CGCR::_0,
|
||||
true => CGCR::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == CGCR::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == CGCR::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `PR`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum PRR {
|
||||
#[doc = "Peripheral is not present."]
|
||||
_0,
|
||||
#[doc = "Peripheral is present."]
|
||||
_1,
|
||||
}
|
||||
impl PRR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
match *self {
|
||||
PRR::_0 => false,
|
||||
PRR::_1 => true,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: bool) -> PRR {
|
||||
match value {
|
||||
false => PRR::_0,
|
||||
true => PRR::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == PRR::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == PRR::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Values that can be written to the field `CGC`"]
|
||||
pub enum CGCW {
|
||||
#[doc = "Clock disabled"]
|
||||
_0,
|
||||
#[doc = "Clock enabled. The current clock selection and divider options are locked."]
|
||||
_1,
|
||||
}
|
||||
impl CGCW {
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _bits(&self) -> bool {
|
||||
match *self {
|
||||
CGCW::_0 => false,
|
||||
CGCW::_1 => true,
|
||||
}
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _CGCW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _CGCW<'a> {
|
||||
#[doc = r" Writes `variant` to the field"]
|
||||
#[inline]
|
||||
pub fn variant(self, variant: CGCW) -> &'a mut W {
|
||||
{
|
||||
self.bit(variant._bits())
|
||||
}
|
||||
}
|
||||
#[doc = "Clock disabled"]
|
||||
#[inline]
|
||||
pub fn _0(self) -> &'a mut W {
|
||||
self.variant(CGCW::_0)
|
||||
}
|
||||
#[doc = "Clock enabled. The current clock selection and divider options are locked."]
|
||||
#[inline]
|
||||
pub fn _1(self) -> &'a mut W {
|
||||
self.variant(CGCW::_1)
|
||||
}
|
||||
#[doc = r" Sets the field bit"]
|
||||
pub fn set_bit(self) -> &'a mut W {
|
||||
self.bit(true)
|
||||
}
|
||||
#[doc = r" Clears the field bit"]
|
||||
pub fn clear_bit(self) -> &'a mut W {
|
||||
self.bit(false)
|
||||
}
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub fn bit(self, value: bool) -> &'a mut W {
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 30;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
#[doc = "Bit 30 - Clock Gate Control"]
|
||||
#[inline]
|
||||
pub fn cgc(&self) -> CGCR {
|
||||
CGCR::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 30;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
#[doc = "Bit 31 - Present"]
|
||||
#[inline]
|
||||
pub fn pr(&self) -> PRR {
|
||||
PRR::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 31;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 2147483648 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
#[doc = "Bit 30 - Clock Gate Control"]
|
||||
#[inline]
|
||||
pub fn cgc(&mut self) -> _CGCW {
|
||||
_CGCW { w: self }
|
||||
}
|
||||
}
|
||||
237
src/pcc/pcc_flex_can2/mod.rs
Normal file
237
src/pcc/pcc_flex_can2/mod.rs
Normal file
@@ -0,0 +1,237 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PCC_FLEXCAN2 {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `CGC`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum CGCR {
|
||||
#[doc = "Clock disabled"]
|
||||
_0,
|
||||
#[doc = "Clock enabled. The current clock selection and divider options are locked."]
|
||||
_1,
|
||||
}
|
||||
impl CGCR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
match *self {
|
||||
CGCR::_0 => false,
|
||||
CGCR::_1 => true,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: bool) -> CGCR {
|
||||
match value {
|
||||
false => CGCR::_0,
|
||||
true => CGCR::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == CGCR::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == CGCR::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `PR`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum PRR {
|
||||
#[doc = "Peripheral is not present."]
|
||||
_0,
|
||||
#[doc = "Peripheral is present."]
|
||||
_1,
|
||||
}
|
||||
impl PRR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
match *self {
|
||||
PRR::_0 => false,
|
||||
PRR::_1 => true,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: bool) -> PRR {
|
||||
match value {
|
||||
false => PRR::_0,
|
||||
true => PRR::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == PRR::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == PRR::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Values that can be written to the field `CGC`"]
|
||||
pub enum CGCW {
|
||||
#[doc = "Clock disabled"]
|
||||
_0,
|
||||
#[doc = "Clock enabled. The current clock selection and divider options are locked."]
|
||||
_1,
|
||||
}
|
||||
impl CGCW {
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _bits(&self) -> bool {
|
||||
match *self {
|
||||
CGCW::_0 => false,
|
||||
CGCW::_1 => true,
|
||||
}
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _CGCW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _CGCW<'a> {
|
||||
#[doc = r" Writes `variant` to the field"]
|
||||
#[inline]
|
||||
pub fn variant(self, variant: CGCW) -> &'a mut W {
|
||||
{
|
||||
self.bit(variant._bits())
|
||||
}
|
||||
}
|
||||
#[doc = "Clock disabled"]
|
||||
#[inline]
|
||||
pub fn _0(self) -> &'a mut W {
|
||||
self.variant(CGCW::_0)
|
||||
}
|
||||
#[doc = "Clock enabled. The current clock selection and divider options are locked."]
|
||||
#[inline]
|
||||
pub fn _1(self) -> &'a mut W {
|
||||
self.variant(CGCW::_1)
|
||||
}
|
||||
#[doc = r" Sets the field bit"]
|
||||
pub fn set_bit(self) -> &'a mut W {
|
||||
self.bit(true)
|
||||
}
|
||||
#[doc = r" Clears the field bit"]
|
||||
pub fn clear_bit(self) -> &'a mut W {
|
||||
self.bit(false)
|
||||
}
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub fn bit(self, value: bool) -> &'a mut W {
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 30;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
#[doc = "Bit 30 - Clock Gate Control"]
|
||||
#[inline]
|
||||
pub fn cgc(&self) -> CGCR {
|
||||
CGCR::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 30;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
#[doc = "Bit 31 - Present"]
|
||||
#[inline]
|
||||
pub fn pr(&self) -> PRR {
|
||||
PRR::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 31;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 2147483648 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
#[doc = "Bit 30 - Clock Gate Control"]
|
||||
#[inline]
|
||||
pub fn cgc(&mut self) -> _CGCW {
|
||||
_CGCW { w: self }
|
||||
}
|
||||
}
|
||||
441
src/pcc/pcc_flexio/mod.rs
Normal file
441
src/pcc/pcc_flexio/mod.rs
Normal file
@@ -0,0 +1,441 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PCC_FLEXIO {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `PCS`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum PCSR {
|
||||
#[doc = "Clock is off."]
|
||||
_000,
|
||||
#[doc = "Clock option 1"]
|
||||
_001,
|
||||
#[doc = "Clock option 2"]
|
||||
_010,
|
||||
#[doc = "Clock option 3"]
|
||||
_011,
|
||||
#[doc = "Clock option 4"]
|
||||
_100,
|
||||
#[doc = "Clock option 5"]
|
||||
_101,
|
||||
#[doc = "Clock option 6"]
|
||||
_110,
|
||||
#[doc = "Clock option 7"]
|
||||
_111,
|
||||
}
|
||||
impl PCSR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u8 {
|
||||
match *self {
|
||||
PCSR::_000 => 0,
|
||||
PCSR::_001 => 1,
|
||||
PCSR::_010 => 2,
|
||||
PCSR::_011 => 3,
|
||||
PCSR::_100 => 4,
|
||||
PCSR::_101 => 5,
|
||||
PCSR::_110 => 6,
|
||||
PCSR::_111 => 7,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: u8) -> PCSR {
|
||||
match value {
|
||||
0 => PCSR::_000,
|
||||
1 => PCSR::_001,
|
||||
2 => PCSR::_010,
|
||||
3 => PCSR::_011,
|
||||
4 => PCSR::_100,
|
||||
5 => PCSR::_101,
|
||||
6 => PCSR::_110,
|
||||
7 => PCSR::_111,
|
||||
_ => unreachable!(),
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_000`"]
|
||||
#[inline]
|
||||
pub fn is_000(&self) -> bool {
|
||||
*self == PCSR::_000
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_001`"]
|
||||
#[inline]
|
||||
pub fn is_001(&self) -> bool {
|
||||
*self == PCSR::_001
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_010`"]
|
||||
#[inline]
|
||||
pub fn is_010(&self) -> bool {
|
||||
*self == PCSR::_010
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_011`"]
|
||||
#[inline]
|
||||
pub fn is_011(&self) -> bool {
|
||||
*self == PCSR::_011
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_100`"]
|
||||
#[inline]
|
||||
pub fn is_100(&self) -> bool {
|
||||
*self == PCSR::_100
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_101`"]
|
||||
#[inline]
|
||||
pub fn is_101(&self) -> bool {
|
||||
*self == PCSR::_101
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_110`"]
|
||||
#[inline]
|
||||
pub fn is_110(&self) -> bool {
|
||||
*self == PCSR::_110
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_111`"]
|
||||
#[inline]
|
||||
pub fn is_111(&self) -> bool {
|
||||
*self == PCSR::_111
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `CGC`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum CGCR {
|
||||
#[doc = "Clock disabled"]
|
||||
_0,
|
||||
#[doc = "Clock enabled. The current clock selection and divider options are locked."]
|
||||
_1,
|
||||
}
|
||||
impl CGCR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
match *self {
|
||||
CGCR::_0 => false,
|
||||
CGCR::_1 => true,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: bool) -> CGCR {
|
||||
match value {
|
||||
false => CGCR::_0,
|
||||
true => CGCR::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == CGCR::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == CGCR::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `PR`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum PRR {
|
||||
#[doc = "Peripheral is not present."]
|
||||
_0,
|
||||
#[doc = "Peripheral is present."]
|
||||
_1,
|
||||
}
|
||||
impl PRR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
match *self {
|
||||
PRR::_0 => false,
|
||||
PRR::_1 => true,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: bool) -> PRR {
|
||||
match value {
|
||||
false => PRR::_0,
|
||||
true => PRR::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == PRR::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == PRR::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Values that can be written to the field `PCS`"]
|
||||
pub enum PCSW {
|
||||
#[doc = "Clock is off."]
|
||||
_000,
|
||||
#[doc = "Clock option 1"]
|
||||
_001,
|
||||
#[doc = "Clock option 2"]
|
||||
_010,
|
||||
#[doc = "Clock option 3"]
|
||||
_011,
|
||||
#[doc = "Clock option 4"]
|
||||
_100,
|
||||
#[doc = "Clock option 5"]
|
||||
_101,
|
||||
#[doc = "Clock option 6"]
|
||||
_110,
|
||||
#[doc = "Clock option 7"]
|
||||
_111,
|
||||
}
|
||||
impl PCSW {
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _bits(&self) -> u8 {
|
||||
match *self {
|
||||
PCSW::_000 => 0,
|
||||
PCSW::_001 => 1,
|
||||
PCSW::_010 => 2,
|
||||
PCSW::_011 => 3,
|
||||
PCSW::_100 => 4,
|
||||
PCSW::_101 => 5,
|
||||
PCSW::_110 => 6,
|
||||
PCSW::_111 => 7,
|
||||
}
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _PCSW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _PCSW<'a> {
|
||||
#[doc = r" Writes `variant` to the field"]
|
||||
#[inline]
|
||||
pub fn variant(self, variant: PCSW) -> &'a mut W {
|
||||
{
|
||||
self.bits(variant._bits())
|
||||
}
|
||||
}
|
||||
#[doc = "Clock is off."]
|
||||
#[inline]
|
||||
pub fn _000(self) -> &'a mut W {
|
||||
self.variant(PCSW::_000)
|
||||
}
|
||||
#[doc = "Clock option 1"]
|
||||
#[inline]
|
||||
pub fn _001(self) -> &'a mut W {
|
||||
self.variant(PCSW::_001)
|
||||
}
|
||||
#[doc = "Clock option 2"]
|
||||
#[inline]
|
||||
pub fn _010(self) -> &'a mut W {
|
||||
self.variant(PCSW::_010)
|
||||
}
|
||||
#[doc = "Clock option 3"]
|
||||
#[inline]
|
||||
pub fn _011(self) -> &'a mut W {
|
||||
self.variant(PCSW::_011)
|
||||
}
|
||||
#[doc = "Clock option 4"]
|
||||
#[inline]
|
||||
pub fn _100(self) -> &'a mut W {
|
||||
self.variant(PCSW::_100)
|
||||
}
|
||||
#[doc = "Clock option 5"]
|
||||
#[inline]
|
||||
pub fn _101(self) -> &'a mut W {
|
||||
self.variant(PCSW::_101)
|
||||
}
|
||||
#[doc = "Clock option 6"]
|
||||
#[inline]
|
||||
pub fn _110(self) -> &'a mut W {
|
||||
self.variant(PCSW::_110)
|
||||
}
|
||||
#[doc = "Clock option 7"]
|
||||
#[inline]
|
||||
pub fn _111(self) -> &'a mut W {
|
||||
self.variant(PCSW::_111)
|
||||
}
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub fn bits(self, value: u8) -> &'a mut W {
|
||||
const MASK: u8 = 7;
|
||||
const OFFSET: u8 = 24;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = "Values that can be written to the field `CGC`"]
|
||||
pub enum CGCW {
|
||||
#[doc = "Clock disabled"]
|
||||
_0,
|
||||
#[doc = "Clock enabled. The current clock selection and divider options are locked."]
|
||||
_1,
|
||||
}
|
||||
impl CGCW {
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _bits(&self) -> bool {
|
||||
match *self {
|
||||
CGCW::_0 => false,
|
||||
CGCW::_1 => true,
|
||||
}
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _CGCW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _CGCW<'a> {
|
||||
#[doc = r" Writes `variant` to the field"]
|
||||
#[inline]
|
||||
pub fn variant(self, variant: CGCW) -> &'a mut W {
|
||||
{
|
||||
self.bit(variant._bits())
|
||||
}
|
||||
}
|
||||
#[doc = "Clock disabled"]
|
||||
#[inline]
|
||||
pub fn _0(self) -> &'a mut W {
|
||||
self.variant(CGCW::_0)
|
||||
}
|
||||
#[doc = "Clock enabled. The current clock selection and divider options are locked."]
|
||||
#[inline]
|
||||
pub fn _1(self) -> &'a mut W {
|
||||
self.variant(CGCW::_1)
|
||||
}
|
||||
#[doc = r" Sets the field bit"]
|
||||
pub fn set_bit(self) -> &'a mut W {
|
||||
self.bit(true)
|
||||
}
|
||||
#[doc = r" Clears the field bit"]
|
||||
pub fn clear_bit(self) -> &'a mut W {
|
||||
self.bit(false)
|
||||
}
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub fn bit(self, value: bool) -> &'a mut W {
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 30;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
#[doc = "Bits 24:26 - Peripheral Clock Source Select"]
|
||||
#[inline]
|
||||
pub fn pcs(&self) -> PCSR {
|
||||
PCSR::_from({
|
||||
const MASK: u8 = 7;
|
||||
const OFFSET: u8 = 24;
|
||||
((self.bits >> OFFSET) & MASK as u32) as u8
|
||||
})
|
||||
}
|
||||
#[doc = "Bit 30 - Clock Gate Control"]
|
||||
#[inline]
|
||||
pub fn cgc(&self) -> CGCR {
|
||||
CGCR::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 30;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
#[doc = "Bit 31 - Present"]
|
||||
#[inline]
|
||||
pub fn pr(&self) -> PRR {
|
||||
PRR::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 31;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 2147483648 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
#[doc = "Bits 24:26 - Peripheral Clock Source Select"]
|
||||
#[inline]
|
||||
pub fn pcs(&mut self) -> _PCSW {
|
||||
_PCSW { w: self }
|
||||
}
|
||||
#[doc = "Bit 30 - Clock Gate Control"]
|
||||
#[inline]
|
||||
pub fn cgc(&mut self) -> _CGCW {
|
||||
_CGCW { w: self }
|
||||
}
|
||||
}
|
||||
237
src/pcc/pcc_ftfc/mod.rs
Normal file
237
src/pcc/pcc_ftfc/mod.rs
Normal file
@@ -0,0 +1,237 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PCC_FTFC {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `CGC`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum CGCR {
|
||||
#[doc = "Clock disabled"]
|
||||
_0,
|
||||
#[doc = "Clock enabled. The current clock selection and divider options are locked."]
|
||||
_1,
|
||||
}
|
||||
impl CGCR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
match *self {
|
||||
CGCR::_0 => false,
|
||||
CGCR::_1 => true,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: bool) -> CGCR {
|
||||
match value {
|
||||
false => CGCR::_0,
|
||||
true => CGCR::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == CGCR::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == CGCR::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `PR`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum PRR {
|
||||
#[doc = "Peripheral is not present."]
|
||||
_0,
|
||||
#[doc = "Peripheral is present."]
|
||||
_1,
|
||||
}
|
||||
impl PRR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
match *self {
|
||||
PRR::_0 => false,
|
||||
PRR::_1 => true,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: bool) -> PRR {
|
||||
match value {
|
||||
false => PRR::_0,
|
||||
true => PRR::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == PRR::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == PRR::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Values that can be written to the field `CGC`"]
|
||||
pub enum CGCW {
|
||||
#[doc = "Clock disabled"]
|
||||
_0,
|
||||
#[doc = "Clock enabled. The current clock selection and divider options are locked."]
|
||||
_1,
|
||||
}
|
||||
impl CGCW {
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _bits(&self) -> bool {
|
||||
match *self {
|
||||
CGCW::_0 => false,
|
||||
CGCW::_1 => true,
|
||||
}
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _CGCW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _CGCW<'a> {
|
||||
#[doc = r" Writes `variant` to the field"]
|
||||
#[inline]
|
||||
pub fn variant(self, variant: CGCW) -> &'a mut W {
|
||||
{
|
||||
self.bit(variant._bits())
|
||||
}
|
||||
}
|
||||
#[doc = "Clock disabled"]
|
||||
#[inline]
|
||||
pub fn _0(self) -> &'a mut W {
|
||||
self.variant(CGCW::_0)
|
||||
}
|
||||
#[doc = "Clock enabled. The current clock selection and divider options are locked."]
|
||||
#[inline]
|
||||
pub fn _1(self) -> &'a mut W {
|
||||
self.variant(CGCW::_1)
|
||||
}
|
||||
#[doc = r" Sets the field bit"]
|
||||
pub fn set_bit(self) -> &'a mut W {
|
||||
self.bit(true)
|
||||
}
|
||||
#[doc = r" Clears the field bit"]
|
||||
pub fn clear_bit(self) -> &'a mut W {
|
||||
self.bit(false)
|
||||
}
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub fn bit(self, value: bool) -> &'a mut W {
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 30;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
#[doc = "Bit 30 - Clock Gate Control"]
|
||||
#[inline]
|
||||
pub fn cgc(&self) -> CGCR {
|
||||
CGCR::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 30;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
#[doc = "Bit 31 - Present"]
|
||||
#[inline]
|
||||
pub fn pr(&self) -> PRR {
|
||||
PRR::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 31;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 3221225472 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
#[doc = "Bit 30 - Clock Gate Control"]
|
||||
#[inline]
|
||||
pub fn cgc(&mut self) -> _CGCW {
|
||||
_CGCW { w: self }
|
||||
}
|
||||
}
|
||||
441
src/pcc/pcc_ftm0/mod.rs
Normal file
441
src/pcc/pcc_ftm0/mod.rs
Normal file
@@ -0,0 +1,441 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PCC_FTM0 {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `PCS`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum PCSR {
|
||||
#[doc = "Clock is off. An external clock can be enabled for this peripheral."]
|
||||
_000,
|
||||
#[doc = "Clock option 1"]
|
||||
_001,
|
||||
#[doc = "Clock option 2"]
|
||||
_010,
|
||||
#[doc = "Clock option 3"]
|
||||
_011,
|
||||
#[doc = "Clock option 4"]
|
||||
_100,
|
||||
#[doc = "Clock option 5"]
|
||||
_101,
|
||||
#[doc = "Clock option 6"]
|
||||
_110,
|
||||
#[doc = "Clock option 7"]
|
||||
_111,
|
||||
}
|
||||
impl PCSR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u8 {
|
||||
match *self {
|
||||
PCSR::_000 => 0,
|
||||
PCSR::_001 => 1,
|
||||
PCSR::_010 => 2,
|
||||
PCSR::_011 => 3,
|
||||
PCSR::_100 => 4,
|
||||
PCSR::_101 => 5,
|
||||
PCSR::_110 => 6,
|
||||
PCSR::_111 => 7,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: u8) -> PCSR {
|
||||
match value {
|
||||
0 => PCSR::_000,
|
||||
1 => PCSR::_001,
|
||||
2 => PCSR::_010,
|
||||
3 => PCSR::_011,
|
||||
4 => PCSR::_100,
|
||||
5 => PCSR::_101,
|
||||
6 => PCSR::_110,
|
||||
7 => PCSR::_111,
|
||||
_ => unreachable!(),
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_000`"]
|
||||
#[inline]
|
||||
pub fn is_000(&self) -> bool {
|
||||
*self == PCSR::_000
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_001`"]
|
||||
#[inline]
|
||||
pub fn is_001(&self) -> bool {
|
||||
*self == PCSR::_001
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_010`"]
|
||||
#[inline]
|
||||
pub fn is_010(&self) -> bool {
|
||||
*self == PCSR::_010
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_011`"]
|
||||
#[inline]
|
||||
pub fn is_011(&self) -> bool {
|
||||
*self == PCSR::_011
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_100`"]
|
||||
#[inline]
|
||||
pub fn is_100(&self) -> bool {
|
||||
*self == PCSR::_100
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_101`"]
|
||||
#[inline]
|
||||
pub fn is_101(&self) -> bool {
|
||||
*self == PCSR::_101
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_110`"]
|
||||
#[inline]
|
||||
pub fn is_110(&self) -> bool {
|
||||
*self == PCSR::_110
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_111`"]
|
||||
#[inline]
|
||||
pub fn is_111(&self) -> bool {
|
||||
*self == PCSR::_111
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `CGC`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum CGCR {
|
||||
#[doc = "Clock disabled"]
|
||||
_0,
|
||||
#[doc = "Clock enabled. The current clock selection and divider options are locked."]
|
||||
_1,
|
||||
}
|
||||
impl CGCR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
match *self {
|
||||
CGCR::_0 => false,
|
||||
CGCR::_1 => true,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: bool) -> CGCR {
|
||||
match value {
|
||||
false => CGCR::_0,
|
||||
true => CGCR::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == CGCR::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == CGCR::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `PR`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum PRR {
|
||||
#[doc = "Peripheral is not present."]
|
||||
_0,
|
||||
#[doc = "Peripheral is present."]
|
||||
_1,
|
||||
}
|
||||
impl PRR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
match *self {
|
||||
PRR::_0 => false,
|
||||
PRR::_1 => true,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: bool) -> PRR {
|
||||
match value {
|
||||
false => PRR::_0,
|
||||
true => PRR::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == PRR::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == PRR::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Values that can be written to the field `PCS`"]
|
||||
pub enum PCSW {
|
||||
#[doc = "Clock is off. An external clock can be enabled for this peripheral."]
|
||||
_000,
|
||||
#[doc = "Clock option 1"]
|
||||
_001,
|
||||
#[doc = "Clock option 2"]
|
||||
_010,
|
||||
#[doc = "Clock option 3"]
|
||||
_011,
|
||||
#[doc = "Clock option 4"]
|
||||
_100,
|
||||
#[doc = "Clock option 5"]
|
||||
_101,
|
||||
#[doc = "Clock option 6"]
|
||||
_110,
|
||||
#[doc = "Clock option 7"]
|
||||
_111,
|
||||
}
|
||||
impl PCSW {
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _bits(&self) -> u8 {
|
||||
match *self {
|
||||
PCSW::_000 => 0,
|
||||
PCSW::_001 => 1,
|
||||
PCSW::_010 => 2,
|
||||
PCSW::_011 => 3,
|
||||
PCSW::_100 => 4,
|
||||
PCSW::_101 => 5,
|
||||
PCSW::_110 => 6,
|
||||
PCSW::_111 => 7,
|
||||
}
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _PCSW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _PCSW<'a> {
|
||||
#[doc = r" Writes `variant` to the field"]
|
||||
#[inline]
|
||||
pub fn variant(self, variant: PCSW) -> &'a mut W {
|
||||
{
|
||||
self.bits(variant._bits())
|
||||
}
|
||||
}
|
||||
#[doc = "Clock is off. An external clock can be enabled for this peripheral."]
|
||||
#[inline]
|
||||
pub fn _000(self) -> &'a mut W {
|
||||
self.variant(PCSW::_000)
|
||||
}
|
||||
#[doc = "Clock option 1"]
|
||||
#[inline]
|
||||
pub fn _001(self) -> &'a mut W {
|
||||
self.variant(PCSW::_001)
|
||||
}
|
||||
#[doc = "Clock option 2"]
|
||||
#[inline]
|
||||
pub fn _010(self) -> &'a mut W {
|
||||
self.variant(PCSW::_010)
|
||||
}
|
||||
#[doc = "Clock option 3"]
|
||||
#[inline]
|
||||
pub fn _011(self) -> &'a mut W {
|
||||
self.variant(PCSW::_011)
|
||||
}
|
||||
#[doc = "Clock option 4"]
|
||||
#[inline]
|
||||
pub fn _100(self) -> &'a mut W {
|
||||
self.variant(PCSW::_100)
|
||||
}
|
||||
#[doc = "Clock option 5"]
|
||||
#[inline]
|
||||
pub fn _101(self) -> &'a mut W {
|
||||
self.variant(PCSW::_101)
|
||||
}
|
||||
#[doc = "Clock option 6"]
|
||||
#[inline]
|
||||
pub fn _110(self) -> &'a mut W {
|
||||
self.variant(PCSW::_110)
|
||||
}
|
||||
#[doc = "Clock option 7"]
|
||||
#[inline]
|
||||
pub fn _111(self) -> &'a mut W {
|
||||
self.variant(PCSW::_111)
|
||||
}
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub fn bits(self, value: u8) -> &'a mut W {
|
||||
const MASK: u8 = 7;
|
||||
const OFFSET: u8 = 24;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = "Values that can be written to the field `CGC`"]
|
||||
pub enum CGCW {
|
||||
#[doc = "Clock disabled"]
|
||||
_0,
|
||||
#[doc = "Clock enabled. The current clock selection and divider options are locked."]
|
||||
_1,
|
||||
}
|
||||
impl CGCW {
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _bits(&self) -> bool {
|
||||
match *self {
|
||||
CGCW::_0 => false,
|
||||
CGCW::_1 => true,
|
||||
}
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _CGCW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _CGCW<'a> {
|
||||
#[doc = r" Writes `variant` to the field"]
|
||||
#[inline]
|
||||
pub fn variant(self, variant: CGCW) -> &'a mut W {
|
||||
{
|
||||
self.bit(variant._bits())
|
||||
}
|
||||
}
|
||||
#[doc = "Clock disabled"]
|
||||
#[inline]
|
||||
pub fn _0(self) -> &'a mut W {
|
||||
self.variant(CGCW::_0)
|
||||
}
|
||||
#[doc = "Clock enabled. The current clock selection and divider options are locked."]
|
||||
#[inline]
|
||||
pub fn _1(self) -> &'a mut W {
|
||||
self.variant(CGCW::_1)
|
||||
}
|
||||
#[doc = r" Sets the field bit"]
|
||||
pub fn set_bit(self) -> &'a mut W {
|
||||
self.bit(true)
|
||||
}
|
||||
#[doc = r" Clears the field bit"]
|
||||
pub fn clear_bit(self) -> &'a mut W {
|
||||
self.bit(false)
|
||||
}
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub fn bit(self, value: bool) -> &'a mut W {
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 30;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
#[doc = "Bits 24:26 - Peripheral Clock Source Select"]
|
||||
#[inline]
|
||||
pub fn pcs(&self) -> PCSR {
|
||||
PCSR::_from({
|
||||
const MASK: u8 = 7;
|
||||
const OFFSET: u8 = 24;
|
||||
((self.bits >> OFFSET) & MASK as u32) as u8
|
||||
})
|
||||
}
|
||||
#[doc = "Bit 30 - Clock Gate Control"]
|
||||
#[inline]
|
||||
pub fn cgc(&self) -> CGCR {
|
||||
CGCR::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 30;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
#[doc = "Bit 31 - Present"]
|
||||
#[inline]
|
||||
pub fn pr(&self) -> PRR {
|
||||
PRR::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 31;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 2147483648 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
#[doc = "Bits 24:26 - Peripheral Clock Source Select"]
|
||||
#[inline]
|
||||
pub fn pcs(&mut self) -> _PCSW {
|
||||
_PCSW { w: self }
|
||||
}
|
||||
#[doc = "Bit 30 - Clock Gate Control"]
|
||||
#[inline]
|
||||
pub fn cgc(&mut self) -> _CGCW {
|
||||
_CGCW { w: self }
|
||||
}
|
||||
}
|
||||
441
src/pcc/pcc_ftm1/mod.rs
Normal file
441
src/pcc/pcc_ftm1/mod.rs
Normal file
@@ -0,0 +1,441 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PCC_FTM1 {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `PCS`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum PCSR {
|
||||
#[doc = "Clock is off. An external clock can be enabled for this peripheral."]
|
||||
_000,
|
||||
#[doc = "Clock option 1"]
|
||||
_001,
|
||||
#[doc = "Clock option 2"]
|
||||
_010,
|
||||
#[doc = "Clock option 3"]
|
||||
_011,
|
||||
#[doc = "Clock option 4"]
|
||||
_100,
|
||||
#[doc = "Clock option 5"]
|
||||
_101,
|
||||
#[doc = "Clock option 6"]
|
||||
_110,
|
||||
#[doc = "Clock option 7"]
|
||||
_111,
|
||||
}
|
||||
impl PCSR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u8 {
|
||||
match *self {
|
||||
PCSR::_000 => 0,
|
||||
PCSR::_001 => 1,
|
||||
PCSR::_010 => 2,
|
||||
PCSR::_011 => 3,
|
||||
PCSR::_100 => 4,
|
||||
PCSR::_101 => 5,
|
||||
PCSR::_110 => 6,
|
||||
PCSR::_111 => 7,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: u8) -> PCSR {
|
||||
match value {
|
||||
0 => PCSR::_000,
|
||||
1 => PCSR::_001,
|
||||
2 => PCSR::_010,
|
||||
3 => PCSR::_011,
|
||||
4 => PCSR::_100,
|
||||
5 => PCSR::_101,
|
||||
6 => PCSR::_110,
|
||||
7 => PCSR::_111,
|
||||
_ => unreachable!(),
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_000`"]
|
||||
#[inline]
|
||||
pub fn is_000(&self) -> bool {
|
||||
*self == PCSR::_000
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_001`"]
|
||||
#[inline]
|
||||
pub fn is_001(&self) -> bool {
|
||||
*self == PCSR::_001
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_010`"]
|
||||
#[inline]
|
||||
pub fn is_010(&self) -> bool {
|
||||
*self == PCSR::_010
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_011`"]
|
||||
#[inline]
|
||||
pub fn is_011(&self) -> bool {
|
||||
*self == PCSR::_011
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_100`"]
|
||||
#[inline]
|
||||
pub fn is_100(&self) -> bool {
|
||||
*self == PCSR::_100
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_101`"]
|
||||
#[inline]
|
||||
pub fn is_101(&self) -> bool {
|
||||
*self == PCSR::_101
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_110`"]
|
||||
#[inline]
|
||||
pub fn is_110(&self) -> bool {
|
||||
*self == PCSR::_110
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_111`"]
|
||||
#[inline]
|
||||
pub fn is_111(&self) -> bool {
|
||||
*self == PCSR::_111
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `CGC`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum CGCR {
|
||||
#[doc = "Clock disabled"]
|
||||
_0,
|
||||
#[doc = "Clock enabled. The current clock selection and divider options are locked."]
|
||||
_1,
|
||||
}
|
||||
impl CGCR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
match *self {
|
||||
CGCR::_0 => false,
|
||||
CGCR::_1 => true,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: bool) -> CGCR {
|
||||
match value {
|
||||
false => CGCR::_0,
|
||||
true => CGCR::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == CGCR::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == CGCR::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `PR`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum PRR {
|
||||
#[doc = "Peripheral is not present."]
|
||||
_0,
|
||||
#[doc = "Peripheral is present."]
|
||||
_1,
|
||||
}
|
||||
impl PRR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
match *self {
|
||||
PRR::_0 => false,
|
||||
PRR::_1 => true,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: bool) -> PRR {
|
||||
match value {
|
||||
false => PRR::_0,
|
||||
true => PRR::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == PRR::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == PRR::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Values that can be written to the field `PCS`"]
|
||||
pub enum PCSW {
|
||||
#[doc = "Clock is off. An external clock can be enabled for this peripheral."]
|
||||
_000,
|
||||
#[doc = "Clock option 1"]
|
||||
_001,
|
||||
#[doc = "Clock option 2"]
|
||||
_010,
|
||||
#[doc = "Clock option 3"]
|
||||
_011,
|
||||
#[doc = "Clock option 4"]
|
||||
_100,
|
||||
#[doc = "Clock option 5"]
|
||||
_101,
|
||||
#[doc = "Clock option 6"]
|
||||
_110,
|
||||
#[doc = "Clock option 7"]
|
||||
_111,
|
||||
}
|
||||
impl PCSW {
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _bits(&self) -> u8 {
|
||||
match *self {
|
||||
PCSW::_000 => 0,
|
||||
PCSW::_001 => 1,
|
||||
PCSW::_010 => 2,
|
||||
PCSW::_011 => 3,
|
||||
PCSW::_100 => 4,
|
||||
PCSW::_101 => 5,
|
||||
PCSW::_110 => 6,
|
||||
PCSW::_111 => 7,
|
||||
}
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _PCSW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _PCSW<'a> {
|
||||
#[doc = r" Writes `variant` to the field"]
|
||||
#[inline]
|
||||
pub fn variant(self, variant: PCSW) -> &'a mut W {
|
||||
{
|
||||
self.bits(variant._bits())
|
||||
}
|
||||
}
|
||||
#[doc = "Clock is off. An external clock can be enabled for this peripheral."]
|
||||
#[inline]
|
||||
pub fn _000(self) -> &'a mut W {
|
||||
self.variant(PCSW::_000)
|
||||
}
|
||||
#[doc = "Clock option 1"]
|
||||
#[inline]
|
||||
pub fn _001(self) -> &'a mut W {
|
||||
self.variant(PCSW::_001)
|
||||
}
|
||||
#[doc = "Clock option 2"]
|
||||
#[inline]
|
||||
pub fn _010(self) -> &'a mut W {
|
||||
self.variant(PCSW::_010)
|
||||
}
|
||||
#[doc = "Clock option 3"]
|
||||
#[inline]
|
||||
pub fn _011(self) -> &'a mut W {
|
||||
self.variant(PCSW::_011)
|
||||
}
|
||||
#[doc = "Clock option 4"]
|
||||
#[inline]
|
||||
pub fn _100(self) -> &'a mut W {
|
||||
self.variant(PCSW::_100)
|
||||
}
|
||||
#[doc = "Clock option 5"]
|
||||
#[inline]
|
||||
pub fn _101(self) -> &'a mut W {
|
||||
self.variant(PCSW::_101)
|
||||
}
|
||||
#[doc = "Clock option 6"]
|
||||
#[inline]
|
||||
pub fn _110(self) -> &'a mut W {
|
||||
self.variant(PCSW::_110)
|
||||
}
|
||||
#[doc = "Clock option 7"]
|
||||
#[inline]
|
||||
pub fn _111(self) -> &'a mut W {
|
||||
self.variant(PCSW::_111)
|
||||
}
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub fn bits(self, value: u8) -> &'a mut W {
|
||||
const MASK: u8 = 7;
|
||||
const OFFSET: u8 = 24;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = "Values that can be written to the field `CGC`"]
|
||||
pub enum CGCW {
|
||||
#[doc = "Clock disabled"]
|
||||
_0,
|
||||
#[doc = "Clock enabled. The current clock selection and divider options are locked."]
|
||||
_1,
|
||||
}
|
||||
impl CGCW {
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _bits(&self) -> bool {
|
||||
match *self {
|
||||
CGCW::_0 => false,
|
||||
CGCW::_1 => true,
|
||||
}
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _CGCW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _CGCW<'a> {
|
||||
#[doc = r" Writes `variant` to the field"]
|
||||
#[inline]
|
||||
pub fn variant(self, variant: CGCW) -> &'a mut W {
|
||||
{
|
||||
self.bit(variant._bits())
|
||||
}
|
||||
}
|
||||
#[doc = "Clock disabled"]
|
||||
#[inline]
|
||||
pub fn _0(self) -> &'a mut W {
|
||||
self.variant(CGCW::_0)
|
||||
}
|
||||
#[doc = "Clock enabled. The current clock selection and divider options are locked."]
|
||||
#[inline]
|
||||
pub fn _1(self) -> &'a mut W {
|
||||
self.variant(CGCW::_1)
|
||||
}
|
||||
#[doc = r" Sets the field bit"]
|
||||
pub fn set_bit(self) -> &'a mut W {
|
||||
self.bit(true)
|
||||
}
|
||||
#[doc = r" Clears the field bit"]
|
||||
pub fn clear_bit(self) -> &'a mut W {
|
||||
self.bit(false)
|
||||
}
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub fn bit(self, value: bool) -> &'a mut W {
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 30;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
#[doc = "Bits 24:26 - Peripheral Clock Source Select"]
|
||||
#[inline]
|
||||
pub fn pcs(&self) -> PCSR {
|
||||
PCSR::_from({
|
||||
const MASK: u8 = 7;
|
||||
const OFFSET: u8 = 24;
|
||||
((self.bits >> OFFSET) & MASK as u32) as u8
|
||||
})
|
||||
}
|
||||
#[doc = "Bit 30 - Clock Gate Control"]
|
||||
#[inline]
|
||||
pub fn cgc(&self) -> CGCR {
|
||||
CGCR::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 30;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
#[doc = "Bit 31 - Present"]
|
||||
#[inline]
|
||||
pub fn pr(&self) -> PRR {
|
||||
PRR::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 31;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 2147483648 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
#[doc = "Bits 24:26 - Peripheral Clock Source Select"]
|
||||
#[inline]
|
||||
pub fn pcs(&mut self) -> _PCSW {
|
||||
_PCSW { w: self }
|
||||
}
|
||||
#[doc = "Bit 30 - Clock Gate Control"]
|
||||
#[inline]
|
||||
pub fn cgc(&mut self) -> _CGCW {
|
||||
_CGCW { w: self }
|
||||
}
|
||||
}
|
||||
441
src/pcc/pcc_ftm2/mod.rs
Normal file
441
src/pcc/pcc_ftm2/mod.rs
Normal file
@@ -0,0 +1,441 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PCC_FTM2 {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `PCS`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum PCSR {
|
||||
#[doc = "Clock is off. An external clock can be enabled for this peripheral."]
|
||||
_000,
|
||||
#[doc = "Clock option 1"]
|
||||
_001,
|
||||
#[doc = "Clock option 2"]
|
||||
_010,
|
||||
#[doc = "Clock option 3"]
|
||||
_011,
|
||||
#[doc = "Clock option 4"]
|
||||
_100,
|
||||
#[doc = "Clock option 5"]
|
||||
_101,
|
||||
#[doc = "Clock option 6"]
|
||||
_110,
|
||||
#[doc = "Clock option 7"]
|
||||
_111,
|
||||
}
|
||||
impl PCSR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u8 {
|
||||
match *self {
|
||||
PCSR::_000 => 0,
|
||||
PCSR::_001 => 1,
|
||||
PCSR::_010 => 2,
|
||||
PCSR::_011 => 3,
|
||||
PCSR::_100 => 4,
|
||||
PCSR::_101 => 5,
|
||||
PCSR::_110 => 6,
|
||||
PCSR::_111 => 7,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: u8) -> PCSR {
|
||||
match value {
|
||||
0 => PCSR::_000,
|
||||
1 => PCSR::_001,
|
||||
2 => PCSR::_010,
|
||||
3 => PCSR::_011,
|
||||
4 => PCSR::_100,
|
||||
5 => PCSR::_101,
|
||||
6 => PCSR::_110,
|
||||
7 => PCSR::_111,
|
||||
_ => unreachable!(),
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_000`"]
|
||||
#[inline]
|
||||
pub fn is_000(&self) -> bool {
|
||||
*self == PCSR::_000
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_001`"]
|
||||
#[inline]
|
||||
pub fn is_001(&self) -> bool {
|
||||
*self == PCSR::_001
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_010`"]
|
||||
#[inline]
|
||||
pub fn is_010(&self) -> bool {
|
||||
*self == PCSR::_010
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_011`"]
|
||||
#[inline]
|
||||
pub fn is_011(&self) -> bool {
|
||||
*self == PCSR::_011
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_100`"]
|
||||
#[inline]
|
||||
pub fn is_100(&self) -> bool {
|
||||
*self == PCSR::_100
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_101`"]
|
||||
#[inline]
|
||||
pub fn is_101(&self) -> bool {
|
||||
*self == PCSR::_101
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_110`"]
|
||||
#[inline]
|
||||
pub fn is_110(&self) -> bool {
|
||||
*self == PCSR::_110
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_111`"]
|
||||
#[inline]
|
||||
pub fn is_111(&self) -> bool {
|
||||
*self == PCSR::_111
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `CGC`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum CGCR {
|
||||
#[doc = "Clock disabled"]
|
||||
_0,
|
||||
#[doc = "Clock enabled. The current clock selection and divider options are locked."]
|
||||
_1,
|
||||
}
|
||||
impl CGCR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
match *self {
|
||||
CGCR::_0 => false,
|
||||
CGCR::_1 => true,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: bool) -> CGCR {
|
||||
match value {
|
||||
false => CGCR::_0,
|
||||
true => CGCR::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == CGCR::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == CGCR::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `PR`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum PRR {
|
||||
#[doc = "Peripheral is not present."]
|
||||
_0,
|
||||
#[doc = "Peripheral is present."]
|
||||
_1,
|
||||
}
|
||||
impl PRR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
match *self {
|
||||
PRR::_0 => false,
|
||||
PRR::_1 => true,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: bool) -> PRR {
|
||||
match value {
|
||||
false => PRR::_0,
|
||||
true => PRR::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == PRR::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == PRR::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Values that can be written to the field `PCS`"]
|
||||
pub enum PCSW {
|
||||
#[doc = "Clock is off. An external clock can be enabled for this peripheral."]
|
||||
_000,
|
||||
#[doc = "Clock option 1"]
|
||||
_001,
|
||||
#[doc = "Clock option 2"]
|
||||
_010,
|
||||
#[doc = "Clock option 3"]
|
||||
_011,
|
||||
#[doc = "Clock option 4"]
|
||||
_100,
|
||||
#[doc = "Clock option 5"]
|
||||
_101,
|
||||
#[doc = "Clock option 6"]
|
||||
_110,
|
||||
#[doc = "Clock option 7"]
|
||||
_111,
|
||||
}
|
||||
impl PCSW {
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _bits(&self) -> u8 {
|
||||
match *self {
|
||||
PCSW::_000 => 0,
|
||||
PCSW::_001 => 1,
|
||||
PCSW::_010 => 2,
|
||||
PCSW::_011 => 3,
|
||||
PCSW::_100 => 4,
|
||||
PCSW::_101 => 5,
|
||||
PCSW::_110 => 6,
|
||||
PCSW::_111 => 7,
|
||||
}
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _PCSW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _PCSW<'a> {
|
||||
#[doc = r" Writes `variant` to the field"]
|
||||
#[inline]
|
||||
pub fn variant(self, variant: PCSW) -> &'a mut W {
|
||||
{
|
||||
self.bits(variant._bits())
|
||||
}
|
||||
}
|
||||
#[doc = "Clock is off. An external clock can be enabled for this peripheral."]
|
||||
#[inline]
|
||||
pub fn _000(self) -> &'a mut W {
|
||||
self.variant(PCSW::_000)
|
||||
}
|
||||
#[doc = "Clock option 1"]
|
||||
#[inline]
|
||||
pub fn _001(self) -> &'a mut W {
|
||||
self.variant(PCSW::_001)
|
||||
}
|
||||
#[doc = "Clock option 2"]
|
||||
#[inline]
|
||||
pub fn _010(self) -> &'a mut W {
|
||||
self.variant(PCSW::_010)
|
||||
}
|
||||
#[doc = "Clock option 3"]
|
||||
#[inline]
|
||||
pub fn _011(self) -> &'a mut W {
|
||||
self.variant(PCSW::_011)
|
||||
}
|
||||
#[doc = "Clock option 4"]
|
||||
#[inline]
|
||||
pub fn _100(self) -> &'a mut W {
|
||||
self.variant(PCSW::_100)
|
||||
}
|
||||
#[doc = "Clock option 5"]
|
||||
#[inline]
|
||||
pub fn _101(self) -> &'a mut W {
|
||||
self.variant(PCSW::_101)
|
||||
}
|
||||
#[doc = "Clock option 6"]
|
||||
#[inline]
|
||||
pub fn _110(self) -> &'a mut W {
|
||||
self.variant(PCSW::_110)
|
||||
}
|
||||
#[doc = "Clock option 7"]
|
||||
#[inline]
|
||||
pub fn _111(self) -> &'a mut W {
|
||||
self.variant(PCSW::_111)
|
||||
}
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub fn bits(self, value: u8) -> &'a mut W {
|
||||
const MASK: u8 = 7;
|
||||
const OFFSET: u8 = 24;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = "Values that can be written to the field `CGC`"]
|
||||
pub enum CGCW {
|
||||
#[doc = "Clock disabled"]
|
||||
_0,
|
||||
#[doc = "Clock enabled. The current clock selection and divider options are locked."]
|
||||
_1,
|
||||
}
|
||||
impl CGCW {
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _bits(&self) -> bool {
|
||||
match *self {
|
||||
CGCW::_0 => false,
|
||||
CGCW::_1 => true,
|
||||
}
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _CGCW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _CGCW<'a> {
|
||||
#[doc = r" Writes `variant` to the field"]
|
||||
#[inline]
|
||||
pub fn variant(self, variant: CGCW) -> &'a mut W {
|
||||
{
|
||||
self.bit(variant._bits())
|
||||
}
|
||||
}
|
||||
#[doc = "Clock disabled"]
|
||||
#[inline]
|
||||
pub fn _0(self) -> &'a mut W {
|
||||
self.variant(CGCW::_0)
|
||||
}
|
||||
#[doc = "Clock enabled. The current clock selection and divider options are locked."]
|
||||
#[inline]
|
||||
pub fn _1(self) -> &'a mut W {
|
||||
self.variant(CGCW::_1)
|
||||
}
|
||||
#[doc = r" Sets the field bit"]
|
||||
pub fn set_bit(self) -> &'a mut W {
|
||||
self.bit(true)
|
||||
}
|
||||
#[doc = r" Clears the field bit"]
|
||||
pub fn clear_bit(self) -> &'a mut W {
|
||||
self.bit(false)
|
||||
}
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub fn bit(self, value: bool) -> &'a mut W {
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 30;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
#[doc = "Bits 24:26 - Peripheral Clock Source Select"]
|
||||
#[inline]
|
||||
pub fn pcs(&self) -> PCSR {
|
||||
PCSR::_from({
|
||||
const MASK: u8 = 7;
|
||||
const OFFSET: u8 = 24;
|
||||
((self.bits >> OFFSET) & MASK as u32) as u8
|
||||
})
|
||||
}
|
||||
#[doc = "Bit 30 - Clock Gate Control"]
|
||||
#[inline]
|
||||
pub fn cgc(&self) -> CGCR {
|
||||
CGCR::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 30;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
#[doc = "Bit 31 - Present"]
|
||||
#[inline]
|
||||
pub fn pr(&self) -> PRR {
|
||||
PRR::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 31;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 2147483648 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
#[doc = "Bits 24:26 - Peripheral Clock Source Select"]
|
||||
#[inline]
|
||||
pub fn pcs(&mut self) -> _PCSW {
|
||||
_PCSW { w: self }
|
||||
}
|
||||
#[doc = "Bit 30 - Clock Gate Control"]
|
||||
#[inline]
|
||||
pub fn cgc(&mut self) -> _CGCW {
|
||||
_CGCW { w: self }
|
||||
}
|
||||
}
|
||||
441
src/pcc/pcc_ftm3/mod.rs
Normal file
441
src/pcc/pcc_ftm3/mod.rs
Normal file
@@ -0,0 +1,441 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PCC_FTM3 {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `PCS`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum PCSR {
|
||||
#[doc = "Clock is off. An external clock can be enabled for this peripheral."]
|
||||
_000,
|
||||
#[doc = "Clock option 1"]
|
||||
_001,
|
||||
#[doc = "Clock option 2"]
|
||||
_010,
|
||||
#[doc = "Clock option 3"]
|
||||
_011,
|
||||
#[doc = "Clock option 4"]
|
||||
_100,
|
||||
#[doc = "Clock option 5"]
|
||||
_101,
|
||||
#[doc = "Clock option 6"]
|
||||
_110,
|
||||
#[doc = "Clock option 7"]
|
||||
_111,
|
||||
}
|
||||
impl PCSR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u8 {
|
||||
match *self {
|
||||
PCSR::_000 => 0,
|
||||
PCSR::_001 => 1,
|
||||
PCSR::_010 => 2,
|
||||
PCSR::_011 => 3,
|
||||
PCSR::_100 => 4,
|
||||
PCSR::_101 => 5,
|
||||
PCSR::_110 => 6,
|
||||
PCSR::_111 => 7,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: u8) -> PCSR {
|
||||
match value {
|
||||
0 => PCSR::_000,
|
||||
1 => PCSR::_001,
|
||||
2 => PCSR::_010,
|
||||
3 => PCSR::_011,
|
||||
4 => PCSR::_100,
|
||||
5 => PCSR::_101,
|
||||
6 => PCSR::_110,
|
||||
7 => PCSR::_111,
|
||||
_ => unreachable!(),
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_000`"]
|
||||
#[inline]
|
||||
pub fn is_000(&self) -> bool {
|
||||
*self == PCSR::_000
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_001`"]
|
||||
#[inline]
|
||||
pub fn is_001(&self) -> bool {
|
||||
*self == PCSR::_001
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_010`"]
|
||||
#[inline]
|
||||
pub fn is_010(&self) -> bool {
|
||||
*self == PCSR::_010
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_011`"]
|
||||
#[inline]
|
||||
pub fn is_011(&self) -> bool {
|
||||
*self == PCSR::_011
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_100`"]
|
||||
#[inline]
|
||||
pub fn is_100(&self) -> bool {
|
||||
*self == PCSR::_100
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_101`"]
|
||||
#[inline]
|
||||
pub fn is_101(&self) -> bool {
|
||||
*self == PCSR::_101
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_110`"]
|
||||
#[inline]
|
||||
pub fn is_110(&self) -> bool {
|
||||
*self == PCSR::_110
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_111`"]
|
||||
#[inline]
|
||||
pub fn is_111(&self) -> bool {
|
||||
*self == PCSR::_111
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `CGC`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum CGCR {
|
||||
#[doc = "Clock disabled"]
|
||||
_0,
|
||||
#[doc = "Clock enabled. The current clock selection and divider options are locked."]
|
||||
_1,
|
||||
}
|
||||
impl CGCR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
match *self {
|
||||
CGCR::_0 => false,
|
||||
CGCR::_1 => true,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: bool) -> CGCR {
|
||||
match value {
|
||||
false => CGCR::_0,
|
||||
true => CGCR::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == CGCR::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == CGCR::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `PR`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum PRR {
|
||||
#[doc = "Peripheral is not present."]
|
||||
_0,
|
||||
#[doc = "Peripheral is present."]
|
||||
_1,
|
||||
}
|
||||
impl PRR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
match *self {
|
||||
PRR::_0 => false,
|
||||
PRR::_1 => true,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: bool) -> PRR {
|
||||
match value {
|
||||
false => PRR::_0,
|
||||
true => PRR::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == PRR::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == PRR::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Values that can be written to the field `PCS`"]
|
||||
pub enum PCSW {
|
||||
#[doc = "Clock is off. An external clock can be enabled for this peripheral."]
|
||||
_000,
|
||||
#[doc = "Clock option 1"]
|
||||
_001,
|
||||
#[doc = "Clock option 2"]
|
||||
_010,
|
||||
#[doc = "Clock option 3"]
|
||||
_011,
|
||||
#[doc = "Clock option 4"]
|
||||
_100,
|
||||
#[doc = "Clock option 5"]
|
||||
_101,
|
||||
#[doc = "Clock option 6"]
|
||||
_110,
|
||||
#[doc = "Clock option 7"]
|
||||
_111,
|
||||
}
|
||||
impl PCSW {
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _bits(&self) -> u8 {
|
||||
match *self {
|
||||
PCSW::_000 => 0,
|
||||
PCSW::_001 => 1,
|
||||
PCSW::_010 => 2,
|
||||
PCSW::_011 => 3,
|
||||
PCSW::_100 => 4,
|
||||
PCSW::_101 => 5,
|
||||
PCSW::_110 => 6,
|
||||
PCSW::_111 => 7,
|
||||
}
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _PCSW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _PCSW<'a> {
|
||||
#[doc = r" Writes `variant` to the field"]
|
||||
#[inline]
|
||||
pub fn variant(self, variant: PCSW) -> &'a mut W {
|
||||
{
|
||||
self.bits(variant._bits())
|
||||
}
|
||||
}
|
||||
#[doc = "Clock is off. An external clock can be enabled for this peripheral."]
|
||||
#[inline]
|
||||
pub fn _000(self) -> &'a mut W {
|
||||
self.variant(PCSW::_000)
|
||||
}
|
||||
#[doc = "Clock option 1"]
|
||||
#[inline]
|
||||
pub fn _001(self) -> &'a mut W {
|
||||
self.variant(PCSW::_001)
|
||||
}
|
||||
#[doc = "Clock option 2"]
|
||||
#[inline]
|
||||
pub fn _010(self) -> &'a mut W {
|
||||
self.variant(PCSW::_010)
|
||||
}
|
||||
#[doc = "Clock option 3"]
|
||||
#[inline]
|
||||
pub fn _011(self) -> &'a mut W {
|
||||
self.variant(PCSW::_011)
|
||||
}
|
||||
#[doc = "Clock option 4"]
|
||||
#[inline]
|
||||
pub fn _100(self) -> &'a mut W {
|
||||
self.variant(PCSW::_100)
|
||||
}
|
||||
#[doc = "Clock option 5"]
|
||||
#[inline]
|
||||
pub fn _101(self) -> &'a mut W {
|
||||
self.variant(PCSW::_101)
|
||||
}
|
||||
#[doc = "Clock option 6"]
|
||||
#[inline]
|
||||
pub fn _110(self) -> &'a mut W {
|
||||
self.variant(PCSW::_110)
|
||||
}
|
||||
#[doc = "Clock option 7"]
|
||||
#[inline]
|
||||
pub fn _111(self) -> &'a mut W {
|
||||
self.variant(PCSW::_111)
|
||||
}
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub fn bits(self, value: u8) -> &'a mut W {
|
||||
const MASK: u8 = 7;
|
||||
const OFFSET: u8 = 24;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = "Values that can be written to the field `CGC`"]
|
||||
pub enum CGCW {
|
||||
#[doc = "Clock disabled"]
|
||||
_0,
|
||||
#[doc = "Clock enabled. The current clock selection and divider options are locked."]
|
||||
_1,
|
||||
}
|
||||
impl CGCW {
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _bits(&self) -> bool {
|
||||
match *self {
|
||||
CGCW::_0 => false,
|
||||
CGCW::_1 => true,
|
||||
}
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _CGCW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _CGCW<'a> {
|
||||
#[doc = r" Writes `variant` to the field"]
|
||||
#[inline]
|
||||
pub fn variant(self, variant: CGCW) -> &'a mut W {
|
||||
{
|
||||
self.bit(variant._bits())
|
||||
}
|
||||
}
|
||||
#[doc = "Clock disabled"]
|
||||
#[inline]
|
||||
pub fn _0(self) -> &'a mut W {
|
||||
self.variant(CGCW::_0)
|
||||
}
|
||||
#[doc = "Clock enabled. The current clock selection and divider options are locked."]
|
||||
#[inline]
|
||||
pub fn _1(self) -> &'a mut W {
|
||||
self.variant(CGCW::_1)
|
||||
}
|
||||
#[doc = r" Sets the field bit"]
|
||||
pub fn set_bit(self) -> &'a mut W {
|
||||
self.bit(true)
|
||||
}
|
||||
#[doc = r" Clears the field bit"]
|
||||
pub fn clear_bit(self) -> &'a mut W {
|
||||
self.bit(false)
|
||||
}
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub fn bit(self, value: bool) -> &'a mut W {
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 30;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
#[doc = "Bits 24:26 - Peripheral Clock Source Select"]
|
||||
#[inline]
|
||||
pub fn pcs(&self) -> PCSR {
|
||||
PCSR::_from({
|
||||
const MASK: u8 = 7;
|
||||
const OFFSET: u8 = 24;
|
||||
((self.bits >> OFFSET) & MASK as u32) as u8
|
||||
})
|
||||
}
|
||||
#[doc = "Bit 30 - Clock Gate Control"]
|
||||
#[inline]
|
||||
pub fn cgc(&self) -> CGCR {
|
||||
CGCR::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 30;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
#[doc = "Bit 31 - Present"]
|
||||
#[inline]
|
||||
pub fn pr(&self) -> PRR {
|
||||
PRR::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 31;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 2147483648 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
#[doc = "Bits 24:26 - Peripheral Clock Source Select"]
|
||||
#[inline]
|
||||
pub fn pcs(&mut self) -> _PCSW {
|
||||
_PCSW { w: self }
|
||||
}
|
||||
#[doc = "Bit 30 - Clock Gate Control"]
|
||||
#[inline]
|
||||
pub fn cgc(&mut self) -> _CGCW {
|
||||
_CGCW { w: self }
|
||||
}
|
||||
}
|
||||
441
src/pcc/pcc_lpi2c0/mod.rs
Normal file
441
src/pcc/pcc_lpi2c0/mod.rs
Normal file
@@ -0,0 +1,441 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PCC_LPI2C0 {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `PCS`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum PCSR {
|
||||
#[doc = "Clock is off."]
|
||||
_000,
|
||||
#[doc = "Clock option 1"]
|
||||
_001,
|
||||
#[doc = "Clock option 2"]
|
||||
_010,
|
||||
#[doc = "Clock option 3"]
|
||||
_011,
|
||||
#[doc = "Clock option 4"]
|
||||
_100,
|
||||
#[doc = "Clock option 5"]
|
||||
_101,
|
||||
#[doc = "Clock option 6"]
|
||||
_110,
|
||||
#[doc = "Clock option 7"]
|
||||
_111,
|
||||
}
|
||||
impl PCSR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u8 {
|
||||
match *self {
|
||||
PCSR::_000 => 0,
|
||||
PCSR::_001 => 1,
|
||||
PCSR::_010 => 2,
|
||||
PCSR::_011 => 3,
|
||||
PCSR::_100 => 4,
|
||||
PCSR::_101 => 5,
|
||||
PCSR::_110 => 6,
|
||||
PCSR::_111 => 7,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: u8) -> PCSR {
|
||||
match value {
|
||||
0 => PCSR::_000,
|
||||
1 => PCSR::_001,
|
||||
2 => PCSR::_010,
|
||||
3 => PCSR::_011,
|
||||
4 => PCSR::_100,
|
||||
5 => PCSR::_101,
|
||||
6 => PCSR::_110,
|
||||
7 => PCSR::_111,
|
||||
_ => unreachable!(),
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_000`"]
|
||||
#[inline]
|
||||
pub fn is_000(&self) -> bool {
|
||||
*self == PCSR::_000
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_001`"]
|
||||
#[inline]
|
||||
pub fn is_001(&self) -> bool {
|
||||
*self == PCSR::_001
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_010`"]
|
||||
#[inline]
|
||||
pub fn is_010(&self) -> bool {
|
||||
*self == PCSR::_010
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_011`"]
|
||||
#[inline]
|
||||
pub fn is_011(&self) -> bool {
|
||||
*self == PCSR::_011
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_100`"]
|
||||
#[inline]
|
||||
pub fn is_100(&self) -> bool {
|
||||
*self == PCSR::_100
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_101`"]
|
||||
#[inline]
|
||||
pub fn is_101(&self) -> bool {
|
||||
*self == PCSR::_101
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_110`"]
|
||||
#[inline]
|
||||
pub fn is_110(&self) -> bool {
|
||||
*self == PCSR::_110
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_111`"]
|
||||
#[inline]
|
||||
pub fn is_111(&self) -> bool {
|
||||
*self == PCSR::_111
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `CGC`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum CGCR {
|
||||
#[doc = "Clock disabled"]
|
||||
_0,
|
||||
#[doc = "Clock enabled. The current clock selection and divider options are locked."]
|
||||
_1,
|
||||
}
|
||||
impl CGCR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
match *self {
|
||||
CGCR::_0 => false,
|
||||
CGCR::_1 => true,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: bool) -> CGCR {
|
||||
match value {
|
||||
false => CGCR::_0,
|
||||
true => CGCR::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == CGCR::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == CGCR::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `PR`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum PRR {
|
||||
#[doc = "Peripheral is not present."]
|
||||
_0,
|
||||
#[doc = "Peripheral is present."]
|
||||
_1,
|
||||
}
|
||||
impl PRR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
match *self {
|
||||
PRR::_0 => false,
|
||||
PRR::_1 => true,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: bool) -> PRR {
|
||||
match value {
|
||||
false => PRR::_0,
|
||||
true => PRR::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == PRR::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == PRR::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Values that can be written to the field `PCS`"]
|
||||
pub enum PCSW {
|
||||
#[doc = "Clock is off."]
|
||||
_000,
|
||||
#[doc = "Clock option 1"]
|
||||
_001,
|
||||
#[doc = "Clock option 2"]
|
||||
_010,
|
||||
#[doc = "Clock option 3"]
|
||||
_011,
|
||||
#[doc = "Clock option 4"]
|
||||
_100,
|
||||
#[doc = "Clock option 5"]
|
||||
_101,
|
||||
#[doc = "Clock option 6"]
|
||||
_110,
|
||||
#[doc = "Clock option 7"]
|
||||
_111,
|
||||
}
|
||||
impl PCSW {
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _bits(&self) -> u8 {
|
||||
match *self {
|
||||
PCSW::_000 => 0,
|
||||
PCSW::_001 => 1,
|
||||
PCSW::_010 => 2,
|
||||
PCSW::_011 => 3,
|
||||
PCSW::_100 => 4,
|
||||
PCSW::_101 => 5,
|
||||
PCSW::_110 => 6,
|
||||
PCSW::_111 => 7,
|
||||
}
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _PCSW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _PCSW<'a> {
|
||||
#[doc = r" Writes `variant` to the field"]
|
||||
#[inline]
|
||||
pub fn variant(self, variant: PCSW) -> &'a mut W {
|
||||
{
|
||||
self.bits(variant._bits())
|
||||
}
|
||||
}
|
||||
#[doc = "Clock is off."]
|
||||
#[inline]
|
||||
pub fn _000(self) -> &'a mut W {
|
||||
self.variant(PCSW::_000)
|
||||
}
|
||||
#[doc = "Clock option 1"]
|
||||
#[inline]
|
||||
pub fn _001(self) -> &'a mut W {
|
||||
self.variant(PCSW::_001)
|
||||
}
|
||||
#[doc = "Clock option 2"]
|
||||
#[inline]
|
||||
pub fn _010(self) -> &'a mut W {
|
||||
self.variant(PCSW::_010)
|
||||
}
|
||||
#[doc = "Clock option 3"]
|
||||
#[inline]
|
||||
pub fn _011(self) -> &'a mut W {
|
||||
self.variant(PCSW::_011)
|
||||
}
|
||||
#[doc = "Clock option 4"]
|
||||
#[inline]
|
||||
pub fn _100(self) -> &'a mut W {
|
||||
self.variant(PCSW::_100)
|
||||
}
|
||||
#[doc = "Clock option 5"]
|
||||
#[inline]
|
||||
pub fn _101(self) -> &'a mut W {
|
||||
self.variant(PCSW::_101)
|
||||
}
|
||||
#[doc = "Clock option 6"]
|
||||
#[inline]
|
||||
pub fn _110(self) -> &'a mut W {
|
||||
self.variant(PCSW::_110)
|
||||
}
|
||||
#[doc = "Clock option 7"]
|
||||
#[inline]
|
||||
pub fn _111(self) -> &'a mut W {
|
||||
self.variant(PCSW::_111)
|
||||
}
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub fn bits(self, value: u8) -> &'a mut W {
|
||||
const MASK: u8 = 7;
|
||||
const OFFSET: u8 = 24;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = "Values that can be written to the field `CGC`"]
|
||||
pub enum CGCW {
|
||||
#[doc = "Clock disabled"]
|
||||
_0,
|
||||
#[doc = "Clock enabled. The current clock selection and divider options are locked."]
|
||||
_1,
|
||||
}
|
||||
impl CGCW {
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _bits(&self) -> bool {
|
||||
match *self {
|
||||
CGCW::_0 => false,
|
||||
CGCW::_1 => true,
|
||||
}
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _CGCW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _CGCW<'a> {
|
||||
#[doc = r" Writes `variant` to the field"]
|
||||
#[inline]
|
||||
pub fn variant(self, variant: CGCW) -> &'a mut W {
|
||||
{
|
||||
self.bit(variant._bits())
|
||||
}
|
||||
}
|
||||
#[doc = "Clock disabled"]
|
||||
#[inline]
|
||||
pub fn _0(self) -> &'a mut W {
|
||||
self.variant(CGCW::_0)
|
||||
}
|
||||
#[doc = "Clock enabled. The current clock selection and divider options are locked."]
|
||||
#[inline]
|
||||
pub fn _1(self) -> &'a mut W {
|
||||
self.variant(CGCW::_1)
|
||||
}
|
||||
#[doc = r" Sets the field bit"]
|
||||
pub fn set_bit(self) -> &'a mut W {
|
||||
self.bit(true)
|
||||
}
|
||||
#[doc = r" Clears the field bit"]
|
||||
pub fn clear_bit(self) -> &'a mut W {
|
||||
self.bit(false)
|
||||
}
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub fn bit(self, value: bool) -> &'a mut W {
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 30;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
#[doc = "Bits 24:26 - Peripheral Clock Source Select"]
|
||||
#[inline]
|
||||
pub fn pcs(&self) -> PCSR {
|
||||
PCSR::_from({
|
||||
const MASK: u8 = 7;
|
||||
const OFFSET: u8 = 24;
|
||||
((self.bits >> OFFSET) & MASK as u32) as u8
|
||||
})
|
||||
}
|
||||
#[doc = "Bit 30 - Clock Gate Control"]
|
||||
#[inline]
|
||||
pub fn cgc(&self) -> CGCR {
|
||||
CGCR::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 30;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
#[doc = "Bit 31 - Present"]
|
||||
#[inline]
|
||||
pub fn pr(&self) -> PRR {
|
||||
PRR::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 31;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 2147483648 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
#[doc = "Bits 24:26 - Peripheral Clock Source Select"]
|
||||
#[inline]
|
||||
pub fn pcs(&mut self) -> _PCSW {
|
||||
_PCSW { w: self }
|
||||
}
|
||||
#[doc = "Bit 30 - Clock Gate Control"]
|
||||
#[inline]
|
||||
pub fn cgc(&mut self) -> _CGCW {
|
||||
_CGCW { w: self }
|
||||
}
|
||||
}
|
||||
441
src/pcc/pcc_lpit/mod.rs
Normal file
441
src/pcc/pcc_lpit/mod.rs
Normal file
@@ -0,0 +1,441 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PCC_LPIT {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `PCS`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum PCSR {
|
||||
#[doc = "Clock is off."]
|
||||
_000,
|
||||
#[doc = "Clock option 1"]
|
||||
_001,
|
||||
#[doc = "Clock option 2"]
|
||||
_010,
|
||||
#[doc = "Clock option 3"]
|
||||
_011,
|
||||
#[doc = "Clock option 4"]
|
||||
_100,
|
||||
#[doc = "Clock option 5"]
|
||||
_101,
|
||||
#[doc = "Clock option 6"]
|
||||
_110,
|
||||
#[doc = "Clock option 7"]
|
||||
_111,
|
||||
}
|
||||
impl PCSR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u8 {
|
||||
match *self {
|
||||
PCSR::_000 => 0,
|
||||
PCSR::_001 => 1,
|
||||
PCSR::_010 => 2,
|
||||
PCSR::_011 => 3,
|
||||
PCSR::_100 => 4,
|
||||
PCSR::_101 => 5,
|
||||
PCSR::_110 => 6,
|
||||
PCSR::_111 => 7,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: u8) -> PCSR {
|
||||
match value {
|
||||
0 => PCSR::_000,
|
||||
1 => PCSR::_001,
|
||||
2 => PCSR::_010,
|
||||
3 => PCSR::_011,
|
||||
4 => PCSR::_100,
|
||||
5 => PCSR::_101,
|
||||
6 => PCSR::_110,
|
||||
7 => PCSR::_111,
|
||||
_ => unreachable!(),
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_000`"]
|
||||
#[inline]
|
||||
pub fn is_000(&self) -> bool {
|
||||
*self == PCSR::_000
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_001`"]
|
||||
#[inline]
|
||||
pub fn is_001(&self) -> bool {
|
||||
*self == PCSR::_001
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_010`"]
|
||||
#[inline]
|
||||
pub fn is_010(&self) -> bool {
|
||||
*self == PCSR::_010
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_011`"]
|
||||
#[inline]
|
||||
pub fn is_011(&self) -> bool {
|
||||
*self == PCSR::_011
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_100`"]
|
||||
#[inline]
|
||||
pub fn is_100(&self) -> bool {
|
||||
*self == PCSR::_100
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_101`"]
|
||||
#[inline]
|
||||
pub fn is_101(&self) -> bool {
|
||||
*self == PCSR::_101
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_110`"]
|
||||
#[inline]
|
||||
pub fn is_110(&self) -> bool {
|
||||
*self == PCSR::_110
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_111`"]
|
||||
#[inline]
|
||||
pub fn is_111(&self) -> bool {
|
||||
*self == PCSR::_111
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `CGC`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum CGCR {
|
||||
#[doc = "Clock disabled"]
|
||||
_0,
|
||||
#[doc = "Clock enabled. The current clock selection and divider options are locked."]
|
||||
_1,
|
||||
}
|
||||
impl CGCR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
match *self {
|
||||
CGCR::_0 => false,
|
||||
CGCR::_1 => true,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: bool) -> CGCR {
|
||||
match value {
|
||||
false => CGCR::_0,
|
||||
true => CGCR::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == CGCR::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == CGCR::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `PR`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum PRR {
|
||||
#[doc = "Peripheral is not present."]
|
||||
_0,
|
||||
#[doc = "Peripheral is present."]
|
||||
_1,
|
||||
}
|
||||
impl PRR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
match *self {
|
||||
PRR::_0 => false,
|
||||
PRR::_1 => true,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: bool) -> PRR {
|
||||
match value {
|
||||
false => PRR::_0,
|
||||
true => PRR::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == PRR::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == PRR::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Values that can be written to the field `PCS`"]
|
||||
pub enum PCSW {
|
||||
#[doc = "Clock is off."]
|
||||
_000,
|
||||
#[doc = "Clock option 1"]
|
||||
_001,
|
||||
#[doc = "Clock option 2"]
|
||||
_010,
|
||||
#[doc = "Clock option 3"]
|
||||
_011,
|
||||
#[doc = "Clock option 4"]
|
||||
_100,
|
||||
#[doc = "Clock option 5"]
|
||||
_101,
|
||||
#[doc = "Clock option 6"]
|
||||
_110,
|
||||
#[doc = "Clock option 7"]
|
||||
_111,
|
||||
}
|
||||
impl PCSW {
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _bits(&self) -> u8 {
|
||||
match *self {
|
||||
PCSW::_000 => 0,
|
||||
PCSW::_001 => 1,
|
||||
PCSW::_010 => 2,
|
||||
PCSW::_011 => 3,
|
||||
PCSW::_100 => 4,
|
||||
PCSW::_101 => 5,
|
||||
PCSW::_110 => 6,
|
||||
PCSW::_111 => 7,
|
||||
}
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _PCSW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _PCSW<'a> {
|
||||
#[doc = r" Writes `variant` to the field"]
|
||||
#[inline]
|
||||
pub fn variant(self, variant: PCSW) -> &'a mut W {
|
||||
{
|
||||
self.bits(variant._bits())
|
||||
}
|
||||
}
|
||||
#[doc = "Clock is off."]
|
||||
#[inline]
|
||||
pub fn _000(self) -> &'a mut W {
|
||||
self.variant(PCSW::_000)
|
||||
}
|
||||
#[doc = "Clock option 1"]
|
||||
#[inline]
|
||||
pub fn _001(self) -> &'a mut W {
|
||||
self.variant(PCSW::_001)
|
||||
}
|
||||
#[doc = "Clock option 2"]
|
||||
#[inline]
|
||||
pub fn _010(self) -> &'a mut W {
|
||||
self.variant(PCSW::_010)
|
||||
}
|
||||
#[doc = "Clock option 3"]
|
||||
#[inline]
|
||||
pub fn _011(self) -> &'a mut W {
|
||||
self.variant(PCSW::_011)
|
||||
}
|
||||
#[doc = "Clock option 4"]
|
||||
#[inline]
|
||||
pub fn _100(self) -> &'a mut W {
|
||||
self.variant(PCSW::_100)
|
||||
}
|
||||
#[doc = "Clock option 5"]
|
||||
#[inline]
|
||||
pub fn _101(self) -> &'a mut W {
|
||||
self.variant(PCSW::_101)
|
||||
}
|
||||
#[doc = "Clock option 6"]
|
||||
#[inline]
|
||||
pub fn _110(self) -> &'a mut W {
|
||||
self.variant(PCSW::_110)
|
||||
}
|
||||
#[doc = "Clock option 7"]
|
||||
#[inline]
|
||||
pub fn _111(self) -> &'a mut W {
|
||||
self.variant(PCSW::_111)
|
||||
}
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub fn bits(self, value: u8) -> &'a mut W {
|
||||
const MASK: u8 = 7;
|
||||
const OFFSET: u8 = 24;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = "Values that can be written to the field `CGC`"]
|
||||
pub enum CGCW {
|
||||
#[doc = "Clock disabled"]
|
||||
_0,
|
||||
#[doc = "Clock enabled. The current clock selection and divider options are locked."]
|
||||
_1,
|
||||
}
|
||||
impl CGCW {
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _bits(&self) -> bool {
|
||||
match *self {
|
||||
CGCW::_0 => false,
|
||||
CGCW::_1 => true,
|
||||
}
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _CGCW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _CGCW<'a> {
|
||||
#[doc = r" Writes `variant` to the field"]
|
||||
#[inline]
|
||||
pub fn variant(self, variant: CGCW) -> &'a mut W {
|
||||
{
|
||||
self.bit(variant._bits())
|
||||
}
|
||||
}
|
||||
#[doc = "Clock disabled"]
|
||||
#[inline]
|
||||
pub fn _0(self) -> &'a mut W {
|
||||
self.variant(CGCW::_0)
|
||||
}
|
||||
#[doc = "Clock enabled. The current clock selection and divider options are locked."]
|
||||
#[inline]
|
||||
pub fn _1(self) -> &'a mut W {
|
||||
self.variant(CGCW::_1)
|
||||
}
|
||||
#[doc = r" Sets the field bit"]
|
||||
pub fn set_bit(self) -> &'a mut W {
|
||||
self.bit(true)
|
||||
}
|
||||
#[doc = r" Clears the field bit"]
|
||||
pub fn clear_bit(self) -> &'a mut W {
|
||||
self.bit(false)
|
||||
}
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub fn bit(self, value: bool) -> &'a mut W {
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 30;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
#[doc = "Bits 24:26 - Peripheral Clock Source Select"]
|
||||
#[inline]
|
||||
pub fn pcs(&self) -> PCSR {
|
||||
PCSR::_from({
|
||||
const MASK: u8 = 7;
|
||||
const OFFSET: u8 = 24;
|
||||
((self.bits >> OFFSET) & MASK as u32) as u8
|
||||
})
|
||||
}
|
||||
#[doc = "Bit 30 - Clock Gate Control"]
|
||||
#[inline]
|
||||
pub fn cgc(&self) -> CGCR {
|
||||
CGCR::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 30;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
#[doc = "Bit 31 - Present"]
|
||||
#[inline]
|
||||
pub fn pr(&self) -> PRR {
|
||||
PRR::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 31;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 2147483648 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
#[doc = "Bits 24:26 - Peripheral Clock Source Select"]
|
||||
#[inline]
|
||||
pub fn pcs(&mut self) -> _PCSW {
|
||||
_PCSW { w: self }
|
||||
}
|
||||
#[doc = "Bit 30 - Clock Gate Control"]
|
||||
#[inline]
|
||||
pub fn cgc(&mut self) -> _CGCW {
|
||||
_CGCW { w: self }
|
||||
}
|
||||
}
|
||||
441
src/pcc/pcc_lpspi0/mod.rs
Normal file
441
src/pcc/pcc_lpspi0/mod.rs
Normal file
@@ -0,0 +1,441 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PCC_LPSPI0 {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `PCS`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum PCSR {
|
||||
#[doc = "Clock is off."]
|
||||
_000,
|
||||
#[doc = "Clock option 1"]
|
||||
_001,
|
||||
#[doc = "Clock option 2"]
|
||||
_010,
|
||||
#[doc = "Clock option 3"]
|
||||
_011,
|
||||
#[doc = "Clock option 4"]
|
||||
_100,
|
||||
#[doc = "Clock option 5"]
|
||||
_101,
|
||||
#[doc = "Clock option 6"]
|
||||
_110,
|
||||
#[doc = "Clock option 7"]
|
||||
_111,
|
||||
}
|
||||
impl PCSR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u8 {
|
||||
match *self {
|
||||
PCSR::_000 => 0,
|
||||
PCSR::_001 => 1,
|
||||
PCSR::_010 => 2,
|
||||
PCSR::_011 => 3,
|
||||
PCSR::_100 => 4,
|
||||
PCSR::_101 => 5,
|
||||
PCSR::_110 => 6,
|
||||
PCSR::_111 => 7,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: u8) -> PCSR {
|
||||
match value {
|
||||
0 => PCSR::_000,
|
||||
1 => PCSR::_001,
|
||||
2 => PCSR::_010,
|
||||
3 => PCSR::_011,
|
||||
4 => PCSR::_100,
|
||||
5 => PCSR::_101,
|
||||
6 => PCSR::_110,
|
||||
7 => PCSR::_111,
|
||||
_ => unreachable!(),
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_000`"]
|
||||
#[inline]
|
||||
pub fn is_000(&self) -> bool {
|
||||
*self == PCSR::_000
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_001`"]
|
||||
#[inline]
|
||||
pub fn is_001(&self) -> bool {
|
||||
*self == PCSR::_001
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_010`"]
|
||||
#[inline]
|
||||
pub fn is_010(&self) -> bool {
|
||||
*self == PCSR::_010
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_011`"]
|
||||
#[inline]
|
||||
pub fn is_011(&self) -> bool {
|
||||
*self == PCSR::_011
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_100`"]
|
||||
#[inline]
|
||||
pub fn is_100(&self) -> bool {
|
||||
*self == PCSR::_100
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_101`"]
|
||||
#[inline]
|
||||
pub fn is_101(&self) -> bool {
|
||||
*self == PCSR::_101
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_110`"]
|
||||
#[inline]
|
||||
pub fn is_110(&self) -> bool {
|
||||
*self == PCSR::_110
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_111`"]
|
||||
#[inline]
|
||||
pub fn is_111(&self) -> bool {
|
||||
*self == PCSR::_111
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `CGC`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum CGCR {
|
||||
#[doc = "Clock disabled"]
|
||||
_0,
|
||||
#[doc = "Clock enabled. The current clock selection and divider options are locked."]
|
||||
_1,
|
||||
}
|
||||
impl CGCR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
match *self {
|
||||
CGCR::_0 => false,
|
||||
CGCR::_1 => true,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: bool) -> CGCR {
|
||||
match value {
|
||||
false => CGCR::_0,
|
||||
true => CGCR::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == CGCR::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == CGCR::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `PR`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum PRR {
|
||||
#[doc = "Peripheral is not present."]
|
||||
_0,
|
||||
#[doc = "Peripheral is present."]
|
||||
_1,
|
||||
}
|
||||
impl PRR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
match *self {
|
||||
PRR::_0 => false,
|
||||
PRR::_1 => true,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: bool) -> PRR {
|
||||
match value {
|
||||
false => PRR::_0,
|
||||
true => PRR::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == PRR::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == PRR::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Values that can be written to the field `PCS`"]
|
||||
pub enum PCSW {
|
||||
#[doc = "Clock is off."]
|
||||
_000,
|
||||
#[doc = "Clock option 1"]
|
||||
_001,
|
||||
#[doc = "Clock option 2"]
|
||||
_010,
|
||||
#[doc = "Clock option 3"]
|
||||
_011,
|
||||
#[doc = "Clock option 4"]
|
||||
_100,
|
||||
#[doc = "Clock option 5"]
|
||||
_101,
|
||||
#[doc = "Clock option 6"]
|
||||
_110,
|
||||
#[doc = "Clock option 7"]
|
||||
_111,
|
||||
}
|
||||
impl PCSW {
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _bits(&self) -> u8 {
|
||||
match *self {
|
||||
PCSW::_000 => 0,
|
||||
PCSW::_001 => 1,
|
||||
PCSW::_010 => 2,
|
||||
PCSW::_011 => 3,
|
||||
PCSW::_100 => 4,
|
||||
PCSW::_101 => 5,
|
||||
PCSW::_110 => 6,
|
||||
PCSW::_111 => 7,
|
||||
}
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _PCSW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _PCSW<'a> {
|
||||
#[doc = r" Writes `variant` to the field"]
|
||||
#[inline]
|
||||
pub fn variant(self, variant: PCSW) -> &'a mut W {
|
||||
{
|
||||
self.bits(variant._bits())
|
||||
}
|
||||
}
|
||||
#[doc = "Clock is off."]
|
||||
#[inline]
|
||||
pub fn _000(self) -> &'a mut W {
|
||||
self.variant(PCSW::_000)
|
||||
}
|
||||
#[doc = "Clock option 1"]
|
||||
#[inline]
|
||||
pub fn _001(self) -> &'a mut W {
|
||||
self.variant(PCSW::_001)
|
||||
}
|
||||
#[doc = "Clock option 2"]
|
||||
#[inline]
|
||||
pub fn _010(self) -> &'a mut W {
|
||||
self.variant(PCSW::_010)
|
||||
}
|
||||
#[doc = "Clock option 3"]
|
||||
#[inline]
|
||||
pub fn _011(self) -> &'a mut W {
|
||||
self.variant(PCSW::_011)
|
||||
}
|
||||
#[doc = "Clock option 4"]
|
||||
#[inline]
|
||||
pub fn _100(self) -> &'a mut W {
|
||||
self.variant(PCSW::_100)
|
||||
}
|
||||
#[doc = "Clock option 5"]
|
||||
#[inline]
|
||||
pub fn _101(self) -> &'a mut W {
|
||||
self.variant(PCSW::_101)
|
||||
}
|
||||
#[doc = "Clock option 6"]
|
||||
#[inline]
|
||||
pub fn _110(self) -> &'a mut W {
|
||||
self.variant(PCSW::_110)
|
||||
}
|
||||
#[doc = "Clock option 7"]
|
||||
#[inline]
|
||||
pub fn _111(self) -> &'a mut W {
|
||||
self.variant(PCSW::_111)
|
||||
}
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub fn bits(self, value: u8) -> &'a mut W {
|
||||
const MASK: u8 = 7;
|
||||
const OFFSET: u8 = 24;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = "Values that can be written to the field `CGC`"]
|
||||
pub enum CGCW {
|
||||
#[doc = "Clock disabled"]
|
||||
_0,
|
||||
#[doc = "Clock enabled. The current clock selection and divider options are locked."]
|
||||
_1,
|
||||
}
|
||||
impl CGCW {
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _bits(&self) -> bool {
|
||||
match *self {
|
||||
CGCW::_0 => false,
|
||||
CGCW::_1 => true,
|
||||
}
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _CGCW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _CGCW<'a> {
|
||||
#[doc = r" Writes `variant` to the field"]
|
||||
#[inline]
|
||||
pub fn variant(self, variant: CGCW) -> &'a mut W {
|
||||
{
|
||||
self.bit(variant._bits())
|
||||
}
|
||||
}
|
||||
#[doc = "Clock disabled"]
|
||||
#[inline]
|
||||
pub fn _0(self) -> &'a mut W {
|
||||
self.variant(CGCW::_0)
|
||||
}
|
||||
#[doc = "Clock enabled. The current clock selection and divider options are locked."]
|
||||
#[inline]
|
||||
pub fn _1(self) -> &'a mut W {
|
||||
self.variant(CGCW::_1)
|
||||
}
|
||||
#[doc = r" Sets the field bit"]
|
||||
pub fn set_bit(self) -> &'a mut W {
|
||||
self.bit(true)
|
||||
}
|
||||
#[doc = r" Clears the field bit"]
|
||||
pub fn clear_bit(self) -> &'a mut W {
|
||||
self.bit(false)
|
||||
}
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub fn bit(self, value: bool) -> &'a mut W {
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 30;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
#[doc = "Bits 24:26 - Peripheral Clock Source Select"]
|
||||
#[inline]
|
||||
pub fn pcs(&self) -> PCSR {
|
||||
PCSR::_from({
|
||||
const MASK: u8 = 7;
|
||||
const OFFSET: u8 = 24;
|
||||
((self.bits >> OFFSET) & MASK as u32) as u8
|
||||
})
|
||||
}
|
||||
#[doc = "Bit 30 - Clock Gate Control"]
|
||||
#[inline]
|
||||
pub fn cgc(&self) -> CGCR {
|
||||
CGCR::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 30;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
#[doc = "Bit 31 - Present"]
|
||||
#[inline]
|
||||
pub fn pr(&self) -> PRR {
|
||||
PRR::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 31;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 2147483648 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
#[doc = "Bits 24:26 - Peripheral Clock Source Select"]
|
||||
#[inline]
|
||||
pub fn pcs(&mut self) -> _PCSW {
|
||||
_PCSW { w: self }
|
||||
}
|
||||
#[doc = "Bit 30 - Clock Gate Control"]
|
||||
#[inline]
|
||||
pub fn cgc(&mut self) -> _CGCW {
|
||||
_CGCW { w: self }
|
||||
}
|
||||
}
|
||||
441
src/pcc/pcc_lpspi1/mod.rs
Normal file
441
src/pcc/pcc_lpspi1/mod.rs
Normal file
@@ -0,0 +1,441 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PCC_LPSPI1 {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `PCS`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum PCSR {
|
||||
#[doc = "Clock is off."]
|
||||
_000,
|
||||
#[doc = "Clock option 1"]
|
||||
_001,
|
||||
#[doc = "Clock option 2"]
|
||||
_010,
|
||||
#[doc = "Clock option 3"]
|
||||
_011,
|
||||
#[doc = "Clock option 4"]
|
||||
_100,
|
||||
#[doc = "Clock option 5"]
|
||||
_101,
|
||||
#[doc = "Clock option 6"]
|
||||
_110,
|
||||
#[doc = "Clock option 7"]
|
||||
_111,
|
||||
}
|
||||
impl PCSR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u8 {
|
||||
match *self {
|
||||
PCSR::_000 => 0,
|
||||
PCSR::_001 => 1,
|
||||
PCSR::_010 => 2,
|
||||
PCSR::_011 => 3,
|
||||
PCSR::_100 => 4,
|
||||
PCSR::_101 => 5,
|
||||
PCSR::_110 => 6,
|
||||
PCSR::_111 => 7,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: u8) -> PCSR {
|
||||
match value {
|
||||
0 => PCSR::_000,
|
||||
1 => PCSR::_001,
|
||||
2 => PCSR::_010,
|
||||
3 => PCSR::_011,
|
||||
4 => PCSR::_100,
|
||||
5 => PCSR::_101,
|
||||
6 => PCSR::_110,
|
||||
7 => PCSR::_111,
|
||||
_ => unreachable!(),
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_000`"]
|
||||
#[inline]
|
||||
pub fn is_000(&self) -> bool {
|
||||
*self == PCSR::_000
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_001`"]
|
||||
#[inline]
|
||||
pub fn is_001(&self) -> bool {
|
||||
*self == PCSR::_001
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_010`"]
|
||||
#[inline]
|
||||
pub fn is_010(&self) -> bool {
|
||||
*self == PCSR::_010
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_011`"]
|
||||
#[inline]
|
||||
pub fn is_011(&self) -> bool {
|
||||
*self == PCSR::_011
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_100`"]
|
||||
#[inline]
|
||||
pub fn is_100(&self) -> bool {
|
||||
*self == PCSR::_100
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_101`"]
|
||||
#[inline]
|
||||
pub fn is_101(&self) -> bool {
|
||||
*self == PCSR::_101
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_110`"]
|
||||
#[inline]
|
||||
pub fn is_110(&self) -> bool {
|
||||
*self == PCSR::_110
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_111`"]
|
||||
#[inline]
|
||||
pub fn is_111(&self) -> bool {
|
||||
*self == PCSR::_111
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `CGC`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum CGCR {
|
||||
#[doc = "Clock disabled"]
|
||||
_0,
|
||||
#[doc = "Clock enabled. The current clock selection and divider options are locked."]
|
||||
_1,
|
||||
}
|
||||
impl CGCR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
match *self {
|
||||
CGCR::_0 => false,
|
||||
CGCR::_1 => true,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: bool) -> CGCR {
|
||||
match value {
|
||||
false => CGCR::_0,
|
||||
true => CGCR::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == CGCR::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == CGCR::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `PR`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum PRR {
|
||||
#[doc = "Peripheral is not present."]
|
||||
_0,
|
||||
#[doc = "Peripheral is present."]
|
||||
_1,
|
||||
}
|
||||
impl PRR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
match *self {
|
||||
PRR::_0 => false,
|
||||
PRR::_1 => true,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: bool) -> PRR {
|
||||
match value {
|
||||
false => PRR::_0,
|
||||
true => PRR::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == PRR::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == PRR::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Values that can be written to the field `PCS`"]
|
||||
pub enum PCSW {
|
||||
#[doc = "Clock is off."]
|
||||
_000,
|
||||
#[doc = "Clock option 1"]
|
||||
_001,
|
||||
#[doc = "Clock option 2"]
|
||||
_010,
|
||||
#[doc = "Clock option 3"]
|
||||
_011,
|
||||
#[doc = "Clock option 4"]
|
||||
_100,
|
||||
#[doc = "Clock option 5"]
|
||||
_101,
|
||||
#[doc = "Clock option 6"]
|
||||
_110,
|
||||
#[doc = "Clock option 7"]
|
||||
_111,
|
||||
}
|
||||
impl PCSW {
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _bits(&self) -> u8 {
|
||||
match *self {
|
||||
PCSW::_000 => 0,
|
||||
PCSW::_001 => 1,
|
||||
PCSW::_010 => 2,
|
||||
PCSW::_011 => 3,
|
||||
PCSW::_100 => 4,
|
||||
PCSW::_101 => 5,
|
||||
PCSW::_110 => 6,
|
||||
PCSW::_111 => 7,
|
||||
}
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _PCSW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _PCSW<'a> {
|
||||
#[doc = r" Writes `variant` to the field"]
|
||||
#[inline]
|
||||
pub fn variant(self, variant: PCSW) -> &'a mut W {
|
||||
{
|
||||
self.bits(variant._bits())
|
||||
}
|
||||
}
|
||||
#[doc = "Clock is off."]
|
||||
#[inline]
|
||||
pub fn _000(self) -> &'a mut W {
|
||||
self.variant(PCSW::_000)
|
||||
}
|
||||
#[doc = "Clock option 1"]
|
||||
#[inline]
|
||||
pub fn _001(self) -> &'a mut W {
|
||||
self.variant(PCSW::_001)
|
||||
}
|
||||
#[doc = "Clock option 2"]
|
||||
#[inline]
|
||||
pub fn _010(self) -> &'a mut W {
|
||||
self.variant(PCSW::_010)
|
||||
}
|
||||
#[doc = "Clock option 3"]
|
||||
#[inline]
|
||||
pub fn _011(self) -> &'a mut W {
|
||||
self.variant(PCSW::_011)
|
||||
}
|
||||
#[doc = "Clock option 4"]
|
||||
#[inline]
|
||||
pub fn _100(self) -> &'a mut W {
|
||||
self.variant(PCSW::_100)
|
||||
}
|
||||
#[doc = "Clock option 5"]
|
||||
#[inline]
|
||||
pub fn _101(self) -> &'a mut W {
|
||||
self.variant(PCSW::_101)
|
||||
}
|
||||
#[doc = "Clock option 6"]
|
||||
#[inline]
|
||||
pub fn _110(self) -> &'a mut W {
|
||||
self.variant(PCSW::_110)
|
||||
}
|
||||
#[doc = "Clock option 7"]
|
||||
#[inline]
|
||||
pub fn _111(self) -> &'a mut W {
|
||||
self.variant(PCSW::_111)
|
||||
}
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub fn bits(self, value: u8) -> &'a mut W {
|
||||
const MASK: u8 = 7;
|
||||
const OFFSET: u8 = 24;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = "Values that can be written to the field `CGC`"]
|
||||
pub enum CGCW {
|
||||
#[doc = "Clock disabled"]
|
||||
_0,
|
||||
#[doc = "Clock enabled. The current clock selection and divider options are locked."]
|
||||
_1,
|
||||
}
|
||||
impl CGCW {
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _bits(&self) -> bool {
|
||||
match *self {
|
||||
CGCW::_0 => false,
|
||||
CGCW::_1 => true,
|
||||
}
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _CGCW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _CGCW<'a> {
|
||||
#[doc = r" Writes `variant` to the field"]
|
||||
#[inline]
|
||||
pub fn variant(self, variant: CGCW) -> &'a mut W {
|
||||
{
|
||||
self.bit(variant._bits())
|
||||
}
|
||||
}
|
||||
#[doc = "Clock disabled"]
|
||||
#[inline]
|
||||
pub fn _0(self) -> &'a mut W {
|
||||
self.variant(CGCW::_0)
|
||||
}
|
||||
#[doc = "Clock enabled. The current clock selection and divider options are locked."]
|
||||
#[inline]
|
||||
pub fn _1(self) -> &'a mut W {
|
||||
self.variant(CGCW::_1)
|
||||
}
|
||||
#[doc = r" Sets the field bit"]
|
||||
pub fn set_bit(self) -> &'a mut W {
|
||||
self.bit(true)
|
||||
}
|
||||
#[doc = r" Clears the field bit"]
|
||||
pub fn clear_bit(self) -> &'a mut W {
|
||||
self.bit(false)
|
||||
}
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub fn bit(self, value: bool) -> &'a mut W {
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 30;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
#[doc = "Bits 24:26 - Peripheral Clock Source Select"]
|
||||
#[inline]
|
||||
pub fn pcs(&self) -> PCSR {
|
||||
PCSR::_from({
|
||||
const MASK: u8 = 7;
|
||||
const OFFSET: u8 = 24;
|
||||
((self.bits >> OFFSET) & MASK as u32) as u8
|
||||
})
|
||||
}
|
||||
#[doc = "Bit 30 - Clock Gate Control"]
|
||||
#[inline]
|
||||
pub fn cgc(&self) -> CGCR {
|
||||
CGCR::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 30;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
#[doc = "Bit 31 - Present"]
|
||||
#[inline]
|
||||
pub fn pr(&self) -> PRR {
|
||||
PRR::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 31;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 2147483648 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
#[doc = "Bits 24:26 - Peripheral Clock Source Select"]
|
||||
#[inline]
|
||||
pub fn pcs(&mut self) -> _PCSW {
|
||||
_PCSW { w: self }
|
||||
}
|
||||
#[doc = "Bit 30 - Clock Gate Control"]
|
||||
#[inline]
|
||||
pub fn cgc(&mut self) -> _CGCW {
|
||||
_CGCW { w: self }
|
||||
}
|
||||
}
|
||||
441
src/pcc/pcc_lpspi2/mod.rs
Normal file
441
src/pcc/pcc_lpspi2/mod.rs
Normal file
@@ -0,0 +1,441 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PCC_LPSPI2 {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `PCS`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum PCSR {
|
||||
#[doc = "Clock is off."]
|
||||
_000,
|
||||
#[doc = "Clock option 1"]
|
||||
_001,
|
||||
#[doc = "Clock option 2"]
|
||||
_010,
|
||||
#[doc = "Clock option 3"]
|
||||
_011,
|
||||
#[doc = "Clock option 4"]
|
||||
_100,
|
||||
#[doc = "Clock option 5"]
|
||||
_101,
|
||||
#[doc = "Clock option 6"]
|
||||
_110,
|
||||
#[doc = "Clock option 7"]
|
||||
_111,
|
||||
}
|
||||
impl PCSR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u8 {
|
||||
match *self {
|
||||
PCSR::_000 => 0,
|
||||
PCSR::_001 => 1,
|
||||
PCSR::_010 => 2,
|
||||
PCSR::_011 => 3,
|
||||
PCSR::_100 => 4,
|
||||
PCSR::_101 => 5,
|
||||
PCSR::_110 => 6,
|
||||
PCSR::_111 => 7,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: u8) -> PCSR {
|
||||
match value {
|
||||
0 => PCSR::_000,
|
||||
1 => PCSR::_001,
|
||||
2 => PCSR::_010,
|
||||
3 => PCSR::_011,
|
||||
4 => PCSR::_100,
|
||||
5 => PCSR::_101,
|
||||
6 => PCSR::_110,
|
||||
7 => PCSR::_111,
|
||||
_ => unreachable!(),
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_000`"]
|
||||
#[inline]
|
||||
pub fn is_000(&self) -> bool {
|
||||
*self == PCSR::_000
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_001`"]
|
||||
#[inline]
|
||||
pub fn is_001(&self) -> bool {
|
||||
*self == PCSR::_001
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_010`"]
|
||||
#[inline]
|
||||
pub fn is_010(&self) -> bool {
|
||||
*self == PCSR::_010
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_011`"]
|
||||
#[inline]
|
||||
pub fn is_011(&self) -> bool {
|
||||
*self == PCSR::_011
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_100`"]
|
||||
#[inline]
|
||||
pub fn is_100(&self) -> bool {
|
||||
*self == PCSR::_100
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_101`"]
|
||||
#[inline]
|
||||
pub fn is_101(&self) -> bool {
|
||||
*self == PCSR::_101
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_110`"]
|
||||
#[inline]
|
||||
pub fn is_110(&self) -> bool {
|
||||
*self == PCSR::_110
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_111`"]
|
||||
#[inline]
|
||||
pub fn is_111(&self) -> bool {
|
||||
*self == PCSR::_111
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `CGC`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum CGCR {
|
||||
#[doc = "Clock disabled"]
|
||||
_0,
|
||||
#[doc = "Clock enabled. The current clock selection and divider options are locked."]
|
||||
_1,
|
||||
}
|
||||
impl CGCR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
match *self {
|
||||
CGCR::_0 => false,
|
||||
CGCR::_1 => true,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: bool) -> CGCR {
|
||||
match value {
|
||||
false => CGCR::_0,
|
||||
true => CGCR::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == CGCR::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == CGCR::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `PR`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum PRR {
|
||||
#[doc = "Peripheral is not present."]
|
||||
_0,
|
||||
#[doc = "Peripheral is present."]
|
||||
_1,
|
||||
}
|
||||
impl PRR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
match *self {
|
||||
PRR::_0 => false,
|
||||
PRR::_1 => true,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: bool) -> PRR {
|
||||
match value {
|
||||
false => PRR::_0,
|
||||
true => PRR::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == PRR::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == PRR::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Values that can be written to the field `PCS`"]
|
||||
pub enum PCSW {
|
||||
#[doc = "Clock is off."]
|
||||
_000,
|
||||
#[doc = "Clock option 1"]
|
||||
_001,
|
||||
#[doc = "Clock option 2"]
|
||||
_010,
|
||||
#[doc = "Clock option 3"]
|
||||
_011,
|
||||
#[doc = "Clock option 4"]
|
||||
_100,
|
||||
#[doc = "Clock option 5"]
|
||||
_101,
|
||||
#[doc = "Clock option 6"]
|
||||
_110,
|
||||
#[doc = "Clock option 7"]
|
||||
_111,
|
||||
}
|
||||
impl PCSW {
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _bits(&self) -> u8 {
|
||||
match *self {
|
||||
PCSW::_000 => 0,
|
||||
PCSW::_001 => 1,
|
||||
PCSW::_010 => 2,
|
||||
PCSW::_011 => 3,
|
||||
PCSW::_100 => 4,
|
||||
PCSW::_101 => 5,
|
||||
PCSW::_110 => 6,
|
||||
PCSW::_111 => 7,
|
||||
}
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _PCSW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _PCSW<'a> {
|
||||
#[doc = r" Writes `variant` to the field"]
|
||||
#[inline]
|
||||
pub fn variant(self, variant: PCSW) -> &'a mut W {
|
||||
{
|
||||
self.bits(variant._bits())
|
||||
}
|
||||
}
|
||||
#[doc = "Clock is off."]
|
||||
#[inline]
|
||||
pub fn _000(self) -> &'a mut W {
|
||||
self.variant(PCSW::_000)
|
||||
}
|
||||
#[doc = "Clock option 1"]
|
||||
#[inline]
|
||||
pub fn _001(self) -> &'a mut W {
|
||||
self.variant(PCSW::_001)
|
||||
}
|
||||
#[doc = "Clock option 2"]
|
||||
#[inline]
|
||||
pub fn _010(self) -> &'a mut W {
|
||||
self.variant(PCSW::_010)
|
||||
}
|
||||
#[doc = "Clock option 3"]
|
||||
#[inline]
|
||||
pub fn _011(self) -> &'a mut W {
|
||||
self.variant(PCSW::_011)
|
||||
}
|
||||
#[doc = "Clock option 4"]
|
||||
#[inline]
|
||||
pub fn _100(self) -> &'a mut W {
|
||||
self.variant(PCSW::_100)
|
||||
}
|
||||
#[doc = "Clock option 5"]
|
||||
#[inline]
|
||||
pub fn _101(self) -> &'a mut W {
|
||||
self.variant(PCSW::_101)
|
||||
}
|
||||
#[doc = "Clock option 6"]
|
||||
#[inline]
|
||||
pub fn _110(self) -> &'a mut W {
|
||||
self.variant(PCSW::_110)
|
||||
}
|
||||
#[doc = "Clock option 7"]
|
||||
#[inline]
|
||||
pub fn _111(self) -> &'a mut W {
|
||||
self.variant(PCSW::_111)
|
||||
}
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub fn bits(self, value: u8) -> &'a mut W {
|
||||
const MASK: u8 = 7;
|
||||
const OFFSET: u8 = 24;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = "Values that can be written to the field `CGC`"]
|
||||
pub enum CGCW {
|
||||
#[doc = "Clock disabled"]
|
||||
_0,
|
||||
#[doc = "Clock enabled. The current clock selection and divider options are locked."]
|
||||
_1,
|
||||
}
|
||||
impl CGCW {
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _bits(&self) -> bool {
|
||||
match *self {
|
||||
CGCW::_0 => false,
|
||||
CGCW::_1 => true,
|
||||
}
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _CGCW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _CGCW<'a> {
|
||||
#[doc = r" Writes `variant` to the field"]
|
||||
#[inline]
|
||||
pub fn variant(self, variant: CGCW) -> &'a mut W {
|
||||
{
|
||||
self.bit(variant._bits())
|
||||
}
|
||||
}
|
||||
#[doc = "Clock disabled"]
|
||||
#[inline]
|
||||
pub fn _0(self) -> &'a mut W {
|
||||
self.variant(CGCW::_0)
|
||||
}
|
||||
#[doc = "Clock enabled. The current clock selection and divider options are locked."]
|
||||
#[inline]
|
||||
pub fn _1(self) -> &'a mut W {
|
||||
self.variant(CGCW::_1)
|
||||
}
|
||||
#[doc = r" Sets the field bit"]
|
||||
pub fn set_bit(self) -> &'a mut W {
|
||||
self.bit(true)
|
||||
}
|
||||
#[doc = r" Clears the field bit"]
|
||||
pub fn clear_bit(self) -> &'a mut W {
|
||||
self.bit(false)
|
||||
}
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub fn bit(self, value: bool) -> &'a mut W {
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 30;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
#[doc = "Bits 24:26 - Peripheral Clock Source Select"]
|
||||
#[inline]
|
||||
pub fn pcs(&self) -> PCSR {
|
||||
PCSR::_from({
|
||||
const MASK: u8 = 7;
|
||||
const OFFSET: u8 = 24;
|
||||
((self.bits >> OFFSET) & MASK as u32) as u8
|
||||
})
|
||||
}
|
||||
#[doc = "Bit 30 - Clock Gate Control"]
|
||||
#[inline]
|
||||
pub fn cgc(&self) -> CGCR {
|
||||
CGCR::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 30;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
#[doc = "Bit 31 - Present"]
|
||||
#[inline]
|
||||
pub fn pr(&self) -> PRR {
|
||||
PRR::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 31;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 2147483648 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
#[doc = "Bits 24:26 - Peripheral Clock Source Select"]
|
||||
#[inline]
|
||||
pub fn pcs(&mut self) -> _PCSW {
|
||||
_PCSW { w: self }
|
||||
}
|
||||
#[doc = "Bit 30 - Clock Gate Control"]
|
||||
#[inline]
|
||||
pub fn cgc(&mut self) -> _CGCW {
|
||||
_CGCW { w: self }
|
||||
}
|
||||
}
|
||||
764
src/pcc/pcc_lptmr0/mod.rs
Normal file
764
src/pcc/pcc_lptmr0/mod.rs
Normal file
@@ -0,0 +1,764 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PCC_LPTMR0 {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `PCD`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum PCDR {
|
||||
#[doc = "Divide by 1."]
|
||||
_000,
|
||||
#[doc = "Divide by 2."]
|
||||
_001,
|
||||
#[doc = "Divide by 3."]
|
||||
_010,
|
||||
#[doc = "Divide by 4."]
|
||||
_011,
|
||||
#[doc = "Divide by 5."]
|
||||
_100,
|
||||
#[doc = "Divide by 6."]
|
||||
_101,
|
||||
#[doc = "Divide by 7."]
|
||||
_110,
|
||||
#[doc = "Divide by 8."]
|
||||
_111,
|
||||
}
|
||||
impl PCDR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u8 {
|
||||
match *self {
|
||||
PCDR::_000 => 0,
|
||||
PCDR::_001 => 1,
|
||||
PCDR::_010 => 2,
|
||||
PCDR::_011 => 3,
|
||||
PCDR::_100 => 4,
|
||||
PCDR::_101 => 5,
|
||||
PCDR::_110 => 6,
|
||||
PCDR::_111 => 7,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: u8) -> PCDR {
|
||||
match value {
|
||||
0 => PCDR::_000,
|
||||
1 => PCDR::_001,
|
||||
2 => PCDR::_010,
|
||||
3 => PCDR::_011,
|
||||
4 => PCDR::_100,
|
||||
5 => PCDR::_101,
|
||||
6 => PCDR::_110,
|
||||
7 => PCDR::_111,
|
||||
_ => unreachable!(),
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_000`"]
|
||||
#[inline]
|
||||
pub fn is_000(&self) -> bool {
|
||||
*self == PCDR::_000
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_001`"]
|
||||
#[inline]
|
||||
pub fn is_001(&self) -> bool {
|
||||
*self == PCDR::_001
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_010`"]
|
||||
#[inline]
|
||||
pub fn is_010(&self) -> bool {
|
||||
*self == PCDR::_010
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_011`"]
|
||||
#[inline]
|
||||
pub fn is_011(&self) -> bool {
|
||||
*self == PCDR::_011
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_100`"]
|
||||
#[inline]
|
||||
pub fn is_100(&self) -> bool {
|
||||
*self == PCDR::_100
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_101`"]
|
||||
#[inline]
|
||||
pub fn is_101(&self) -> bool {
|
||||
*self == PCDR::_101
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_110`"]
|
||||
#[inline]
|
||||
pub fn is_110(&self) -> bool {
|
||||
*self == PCDR::_110
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_111`"]
|
||||
#[inline]
|
||||
pub fn is_111(&self) -> bool {
|
||||
*self == PCDR::_111
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `FRAC`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum FRACR {
|
||||
#[doc = "Fractional value is 0."]
|
||||
_0,
|
||||
#[doc = "Fractional value is 1."]
|
||||
_1,
|
||||
}
|
||||
impl FRACR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
match *self {
|
||||
FRACR::_0 => false,
|
||||
FRACR::_1 => true,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: bool) -> FRACR {
|
||||
match value {
|
||||
false => FRACR::_0,
|
||||
true => FRACR::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == FRACR::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == FRACR::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `PCS`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum PCSR {
|
||||
#[doc = "Clock is off."]
|
||||
_000,
|
||||
#[doc = "Clock option 1"]
|
||||
_001,
|
||||
#[doc = "Clock option 2"]
|
||||
_010,
|
||||
#[doc = "Clock option 3"]
|
||||
_011,
|
||||
#[doc = "Clock option 4"]
|
||||
_100,
|
||||
#[doc = "Clock option 5"]
|
||||
_101,
|
||||
#[doc = "Clock option 6"]
|
||||
_110,
|
||||
#[doc = "Clock option 7"]
|
||||
_111,
|
||||
}
|
||||
impl PCSR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u8 {
|
||||
match *self {
|
||||
PCSR::_000 => 0,
|
||||
PCSR::_001 => 1,
|
||||
PCSR::_010 => 2,
|
||||
PCSR::_011 => 3,
|
||||
PCSR::_100 => 4,
|
||||
PCSR::_101 => 5,
|
||||
PCSR::_110 => 6,
|
||||
PCSR::_111 => 7,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: u8) -> PCSR {
|
||||
match value {
|
||||
0 => PCSR::_000,
|
||||
1 => PCSR::_001,
|
||||
2 => PCSR::_010,
|
||||
3 => PCSR::_011,
|
||||
4 => PCSR::_100,
|
||||
5 => PCSR::_101,
|
||||
6 => PCSR::_110,
|
||||
7 => PCSR::_111,
|
||||
_ => unreachable!(),
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_000`"]
|
||||
#[inline]
|
||||
pub fn is_000(&self) -> bool {
|
||||
*self == PCSR::_000
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_001`"]
|
||||
#[inline]
|
||||
pub fn is_001(&self) -> bool {
|
||||
*self == PCSR::_001
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_010`"]
|
||||
#[inline]
|
||||
pub fn is_010(&self) -> bool {
|
||||
*self == PCSR::_010
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_011`"]
|
||||
#[inline]
|
||||
pub fn is_011(&self) -> bool {
|
||||
*self == PCSR::_011
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_100`"]
|
||||
#[inline]
|
||||
pub fn is_100(&self) -> bool {
|
||||
*self == PCSR::_100
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_101`"]
|
||||
#[inline]
|
||||
pub fn is_101(&self) -> bool {
|
||||
*self == PCSR::_101
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_110`"]
|
||||
#[inline]
|
||||
pub fn is_110(&self) -> bool {
|
||||
*self == PCSR::_110
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_111`"]
|
||||
#[inline]
|
||||
pub fn is_111(&self) -> bool {
|
||||
*self == PCSR::_111
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `CGC`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum CGCR {
|
||||
#[doc = "Clock disabled"]
|
||||
_0,
|
||||
#[doc = "Clock enabled. The current clock selection and divider options are locked."]
|
||||
_1,
|
||||
}
|
||||
impl CGCR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
match *self {
|
||||
CGCR::_0 => false,
|
||||
CGCR::_1 => true,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: bool) -> CGCR {
|
||||
match value {
|
||||
false => CGCR::_0,
|
||||
true => CGCR::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == CGCR::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == CGCR::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `PR`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum PRR {
|
||||
#[doc = "Peripheral is not present."]
|
||||
_0,
|
||||
#[doc = "Peripheral is present."]
|
||||
_1,
|
||||
}
|
||||
impl PRR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
match *self {
|
||||
PRR::_0 => false,
|
||||
PRR::_1 => true,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: bool) -> PRR {
|
||||
match value {
|
||||
false => PRR::_0,
|
||||
true => PRR::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == PRR::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == PRR::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Values that can be written to the field `PCD`"]
|
||||
pub enum PCDW {
|
||||
#[doc = "Divide by 1."]
|
||||
_000,
|
||||
#[doc = "Divide by 2."]
|
||||
_001,
|
||||
#[doc = "Divide by 3."]
|
||||
_010,
|
||||
#[doc = "Divide by 4."]
|
||||
_011,
|
||||
#[doc = "Divide by 5."]
|
||||
_100,
|
||||
#[doc = "Divide by 6."]
|
||||
_101,
|
||||
#[doc = "Divide by 7."]
|
||||
_110,
|
||||
#[doc = "Divide by 8."]
|
||||
_111,
|
||||
}
|
||||
impl PCDW {
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _bits(&self) -> u8 {
|
||||
match *self {
|
||||
PCDW::_000 => 0,
|
||||
PCDW::_001 => 1,
|
||||
PCDW::_010 => 2,
|
||||
PCDW::_011 => 3,
|
||||
PCDW::_100 => 4,
|
||||
PCDW::_101 => 5,
|
||||
PCDW::_110 => 6,
|
||||
PCDW::_111 => 7,
|
||||
}
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _PCDW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _PCDW<'a> {
|
||||
#[doc = r" Writes `variant` to the field"]
|
||||
#[inline]
|
||||
pub fn variant(self, variant: PCDW) -> &'a mut W {
|
||||
{
|
||||
self.bits(variant._bits())
|
||||
}
|
||||
}
|
||||
#[doc = "Divide by 1."]
|
||||
#[inline]
|
||||
pub fn _000(self) -> &'a mut W {
|
||||
self.variant(PCDW::_000)
|
||||
}
|
||||
#[doc = "Divide by 2."]
|
||||
#[inline]
|
||||
pub fn _001(self) -> &'a mut W {
|
||||
self.variant(PCDW::_001)
|
||||
}
|
||||
#[doc = "Divide by 3."]
|
||||
#[inline]
|
||||
pub fn _010(self) -> &'a mut W {
|
||||
self.variant(PCDW::_010)
|
||||
}
|
||||
#[doc = "Divide by 4."]
|
||||
#[inline]
|
||||
pub fn _011(self) -> &'a mut W {
|
||||
self.variant(PCDW::_011)
|
||||
}
|
||||
#[doc = "Divide by 5."]
|
||||
#[inline]
|
||||
pub fn _100(self) -> &'a mut W {
|
||||
self.variant(PCDW::_100)
|
||||
}
|
||||
#[doc = "Divide by 6."]
|
||||
#[inline]
|
||||
pub fn _101(self) -> &'a mut W {
|
||||
self.variant(PCDW::_101)
|
||||
}
|
||||
#[doc = "Divide by 7."]
|
||||
#[inline]
|
||||
pub fn _110(self) -> &'a mut W {
|
||||
self.variant(PCDW::_110)
|
||||
}
|
||||
#[doc = "Divide by 8."]
|
||||
#[inline]
|
||||
pub fn _111(self) -> &'a mut W {
|
||||
self.variant(PCDW::_111)
|
||||
}
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub fn bits(self, value: u8) -> &'a mut W {
|
||||
const MASK: u8 = 7;
|
||||
const OFFSET: u8 = 0;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = "Values that can be written to the field `FRAC`"]
|
||||
pub enum FRACW {
|
||||
#[doc = "Fractional value is 0."]
|
||||
_0,
|
||||
#[doc = "Fractional value is 1."]
|
||||
_1,
|
||||
}
|
||||
impl FRACW {
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _bits(&self) -> bool {
|
||||
match *self {
|
||||
FRACW::_0 => false,
|
||||
FRACW::_1 => true,
|
||||
}
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _FRACW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _FRACW<'a> {
|
||||
#[doc = r" Writes `variant` to the field"]
|
||||
#[inline]
|
||||
pub fn variant(self, variant: FRACW) -> &'a mut W {
|
||||
{
|
||||
self.bit(variant._bits())
|
||||
}
|
||||
}
|
||||
#[doc = "Fractional value is 0."]
|
||||
#[inline]
|
||||
pub fn _0(self) -> &'a mut W {
|
||||
self.variant(FRACW::_0)
|
||||
}
|
||||
#[doc = "Fractional value is 1."]
|
||||
#[inline]
|
||||
pub fn _1(self) -> &'a mut W {
|
||||
self.variant(FRACW::_1)
|
||||
}
|
||||
#[doc = r" Sets the field bit"]
|
||||
pub fn set_bit(self) -> &'a mut W {
|
||||
self.bit(true)
|
||||
}
|
||||
#[doc = r" Clears the field bit"]
|
||||
pub fn clear_bit(self) -> &'a mut W {
|
||||
self.bit(false)
|
||||
}
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub fn bit(self, value: bool) -> &'a mut W {
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 3;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = "Values that can be written to the field `PCS`"]
|
||||
pub enum PCSW {
|
||||
#[doc = "Clock is off."]
|
||||
_000,
|
||||
#[doc = "Clock option 1"]
|
||||
_001,
|
||||
#[doc = "Clock option 2"]
|
||||
_010,
|
||||
#[doc = "Clock option 3"]
|
||||
_011,
|
||||
#[doc = "Clock option 4"]
|
||||
_100,
|
||||
#[doc = "Clock option 5"]
|
||||
_101,
|
||||
#[doc = "Clock option 6"]
|
||||
_110,
|
||||
#[doc = "Clock option 7"]
|
||||
_111,
|
||||
}
|
||||
impl PCSW {
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _bits(&self) -> u8 {
|
||||
match *self {
|
||||
PCSW::_000 => 0,
|
||||
PCSW::_001 => 1,
|
||||
PCSW::_010 => 2,
|
||||
PCSW::_011 => 3,
|
||||
PCSW::_100 => 4,
|
||||
PCSW::_101 => 5,
|
||||
PCSW::_110 => 6,
|
||||
PCSW::_111 => 7,
|
||||
}
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _PCSW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _PCSW<'a> {
|
||||
#[doc = r" Writes `variant` to the field"]
|
||||
#[inline]
|
||||
pub fn variant(self, variant: PCSW) -> &'a mut W {
|
||||
{
|
||||
self.bits(variant._bits())
|
||||
}
|
||||
}
|
||||
#[doc = "Clock is off."]
|
||||
#[inline]
|
||||
pub fn _000(self) -> &'a mut W {
|
||||
self.variant(PCSW::_000)
|
||||
}
|
||||
#[doc = "Clock option 1"]
|
||||
#[inline]
|
||||
pub fn _001(self) -> &'a mut W {
|
||||
self.variant(PCSW::_001)
|
||||
}
|
||||
#[doc = "Clock option 2"]
|
||||
#[inline]
|
||||
pub fn _010(self) -> &'a mut W {
|
||||
self.variant(PCSW::_010)
|
||||
}
|
||||
#[doc = "Clock option 3"]
|
||||
#[inline]
|
||||
pub fn _011(self) -> &'a mut W {
|
||||
self.variant(PCSW::_011)
|
||||
}
|
||||
#[doc = "Clock option 4"]
|
||||
#[inline]
|
||||
pub fn _100(self) -> &'a mut W {
|
||||
self.variant(PCSW::_100)
|
||||
}
|
||||
#[doc = "Clock option 5"]
|
||||
#[inline]
|
||||
pub fn _101(self) -> &'a mut W {
|
||||
self.variant(PCSW::_101)
|
||||
}
|
||||
#[doc = "Clock option 6"]
|
||||
#[inline]
|
||||
pub fn _110(self) -> &'a mut W {
|
||||
self.variant(PCSW::_110)
|
||||
}
|
||||
#[doc = "Clock option 7"]
|
||||
#[inline]
|
||||
pub fn _111(self) -> &'a mut W {
|
||||
self.variant(PCSW::_111)
|
||||
}
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub fn bits(self, value: u8) -> &'a mut W {
|
||||
const MASK: u8 = 7;
|
||||
const OFFSET: u8 = 24;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = "Values that can be written to the field `CGC`"]
|
||||
pub enum CGCW {
|
||||
#[doc = "Clock disabled"]
|
||||
_0,
|
||||
#[doc = "Clock enabled. The current clock selection and divider options are locked."]
|
||||
_1,
|
||||
}
|
||||
impl CGCW {
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _bits(&self) -> bool {
|
||||
match *self {
|
||||
CGCW::_0 => false,
|
||||
CGCW::_1 => true,
|
||||
}
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _CGCW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _CGCW<'a> {
|
||||
#[doc = r" Writes `variant` to the field"]
|
||||
#[inline]
|
||||
pub fn variant(self, variant: CGCW) -> &'a mut W {
|
||||
{
|
||||
self.bit(variant._bits())
|
||||
}
|
||||
}
|
||||
#[doc = "Clock disabled"]
|
||||
#[inline]
|
||||
pub fn _0(self) -> &'a mut W {
|
||||
self.variant(CGCW::_0)
|
||||
}
|
||||
#[doc = "Clock enabled. The current clock selection and divider options are locked."]
|
||||
#[inline]
|
||||
pub fn _1(self) -> &'a mut W {
|
||||
self.variant(CGCW::_1)
|
||||
}
|
||||
#[doc = r" Sets the field bit"]
|
||||
pub fn set_bit(self) -> &'a mut W {
|
||||
self.bit(true)
|
||||
}
|
||||
#[doc = r" Clears the field bit"]
|
||||
pub fn clear_bit(self) -> &'a mut W {
|
||||
self.bit(false)
|
||||
}
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub fn bit(self, value: bool) -> &'a mut W {
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 30;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
#[doc = "Bits 0:2 - Peripheral Clock Divider Select"]
|
||||
#[inline]
|
||||
pub fn pcd(&self) -> PCDR {
|
||||
PCDR::_from({
|
||||
const MASK: u8 = 7;
|
||||
const OFFSET: u8 = 0;
|
||||
((self.bits >> OFFSET) & MASK as u32) as u8
|
||||
})
|
||||
}
|
||||
#[doc = "Bit 3 - Peripheral Clock Divider Fraction"]
|
||||
#[inline]
|
||||
pub fn frac(&self) -> FRACR {
|
||||
FRACR::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 3;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
#[doc = "Bits 24:26 - Peripheral Clock Source Select"]
|
||||
#[inline]
|
||||
pub fn pcs(&self) -> PCSR {
|
||||
PCSR::_from({
|
||||
const MASK: u8 = 7;
|
||||
const OFFSET: u8 = 24;
|
||||
((self.bits >> OFFSET) & MASK as u32) as u8
|
||||
})
|
||||
}
|
||||
#[doc = "Bit 30 - Clock Gate Control"]
|
||||
#[inline]
|
||||
pub fn cgc(&self) -> CGCR {
|
||||
CGCR::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 30;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
#[doc = "Bit 31 - Present"]
|
||||
#[inline]
|
||||
pub fn pr(&self) -> PRR {
|
||||
PRR::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 31;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 2147483648 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
#[doc = "Bits 0:2 - Peripheral Clock Divider Select"]
|
||||
#[inline]
|
||||
pub fn pcd(&mut self) -> _PCDW {
|
||||
_PCDW { w: self }
|
||||
}
|
||||
#[doc = "Bit 3 - Peripheral Clock Divider Fraction"]
|
||||
#[inline]
|
||||
pub fn frac(&mut self) -> _FRACW {
|
||||
_FRACW { w: self }
|
||||
}
|
||||
#[doc = "Bits 24:26 - Peripheral Clock Source Select"]
|
||||
#[inline]
|
||||
pub fn pcs(&mut self) -> _PCSW {
|
||||
_PCSW { w: self }
|
||||
}
|
||||
#[doc = "Bit 30 - Clock Gate Control"]
|
||||
#[inline]
|
||||
pub fn cgc(&mut self) -> _CGCW {
|
||||
_CGCW { w: self }
|
||||
}
|
||||
}
|
||||
441
src/pcc/pcc_lpuart0/mod.rs
Normal file
441
src/pcc/pcc_lpuart0/mod.rs
Normal file
@@ -0,0 +1,441 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PCC_LPUART0 {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `PCS`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum PCSR {
|
||||
#[doc = "Clock is off."]
|
||||
_000,
|
||||
#[doc = "Clock option 1"]
|
||||
_001,
|
||||
#[doc = "Clock option 2"]
|
||||
_010,
|
||||
#[doc = "Clock option 3"]
|
||||
_011,
|
||||
#[doc = "Clock option 4"]
|
||||
_100,
|
||||
#[doc = "Clock option 5"]
|
||||
_101,
|
||||
#[doc = "Clock option 6"]
|
||||
_110,
|
||||
#[doc = "Clock option 7"]
|
||||
_111,
|
||||
}
|
||||
impl PCSR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u8 {
|
||||
match *self {
|
||||
PCSR::_000 => 0,
|
||||
PCSR::_001 => 1,
|
||||
PCSR::_010 => 2,
|
||||
PCSR::_011 => 3,
|
||||
PCSR::_100 => 4,
|
||||
PCSR::_101 => 5,
|
||||
PCSR::_110 => 6,
|
||||
PCSR::_111 => 7,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: u8) -> PCSR {
|
||||
match value {
|
||||
0 => PCSR::_000,
|
||||
1 => PCSR::_001,
|
||||
2 => PCSR::_010,
|
||||
3 => PCSR::_011,
|
||||
4 => PCSR::_100,
|
||||
5 => PCSR::_101,
|
||||
6 => PCSR::_110,
|
||||
7 => PCSR::_111,
|
||||
_ => unreachable!(),
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_000`"]
|
||||
#[inline]
|
||||
pub fn is_000(&self) -> bool {
|
||||
*self == PCSR::_000
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_001`"]
|
||||
#[inline]
|
||||
pub fn is_001(&self) -> bool {
|
||||
*self == PCSR::_001
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_010`"]
|
||||
#[inline]
|
||||
pub fn is_010(&self) -> bool {
|
||||
*self == PCSR::_010
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_011`"]
|
||||
#[inline]
|
||||
pub fn is_011(&self) -> bool {
|
||||
*self == PCSR::_011
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_100`"]
|
||||
#[inline]
|
||||
pub fn is_100(&self) -> bool {
|
||||
*self == PCSR::_100
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_101`"]
|
||||
#[inline]
|
||||
pub fn is_101(&self) -> bool {
|
||||
*self == PCSR::_101
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_110`"]
|
||||
#[inline]
|
||||
pub fn is_110(&self) -> bool {
|
||||
*self == PCSR::_110
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_111`"]
|
||||
#[inline]
|
||||
pub fn is_111(&self) -> bool {
|
||||
*self == PCSR::_111
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `CGC`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum CGCR {
|
||||
#[doc = "Clock disabled"]
|
||||
_0,
|
||||
#[doc = "Clock enabled. The current clock selection and divider options are locked."]
|
||||
_1,
|
||||
}
|
||||
impl CGCR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
match *self {
|
||||
CGCR::_0 => false,
|
||||
CGCR::_1 => true,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: bool) -> CGCR {
|
||||
match value {
|
||||
false => CGCR::_0,
|
||||
true => CGCR::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == CGCR::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == CGCR::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `PR`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum PRR {
|
||||
#[doc = "Peripheral is not present."]
|
||||
_0,
|
||||
#[doc = "Peripheral is present."]
|
||||
_1,
|
||||
}
|
||||
impl PRR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
match *self {
|
||||
PRR::_0 => false,
|
||||
PRR::_1 => true,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: bool) -> PRR {
|
||||
match value {
|
||||
false => PRR::_0,
|
||||
true => PRR::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == PRR::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == PRR::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Values that can be written to the field `PCS`"]
|
||||
pub enum PCSW {
|
||||
#[doc = "Clock is off."]
|
||||
_000,
|
||||
#[doc = "Clock option 1"]
|
||||
_001,
|
||||
#[doc = "Clock option 2"]
|
||||
_010,
|
||||
#[doc = "Clock option 3"]
|
||||
_011,
|
||||
#[doc = "Clock option 4"]
|
||||
_100,
|
||||
#[doc = "Clock option 5"]
|
||||
_101,
|
||||
#[doc = "Clock option 6"]
|
||||
_110,
|
||||
#[doc = "Clock option 7"]
|
||||
_111,
|
||||
}
|
||||
impl PCSW {
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _bits(&self) -> u8 {
|
||||
match *self {
|
||||
PCSW::_000 => 0,
|
||||
PCSW::_001 => 1,
|
||||
PCSW::_010 => 2,
|
||||
PCSW::_011 => 3,
|
||||
PCSW::_100 => 4,
|
||||
PCSW::_101 => 5,
|
||||
PCSW::_110 => 6,
|
||||
PCSW::_111 => 7,
|
||||
}
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _PCSW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _PCSW<'a> {
|
||||
#[doc = r" Writes `variant` to the field"]
|
||||
#[inline]
|
||||
pub fn variant(self, variant: PCSW) -> &'a mut W {
|
||||
{
|
||||
self.bits(variant._bits())
|
||||
}
|
||||
}
|
||||
#[doc = "Clock is off."]
|
||||
#[inline]
|
||||
pub fn _000(self) -> &'a mut W {
|
||||
self.variant(PCSW::_000)
|
||||
}
|
||||
#[doc = "Clock option 1"]
|
||||
#[inline]
|
||||
pub fn _001(self) -> &'a mut W {
|
||||
self.variant(PCSW::_001)
|
||||
}
|
||||
#[doc = "Clock option 2"]
|
||||
#[inline]
|
||||
pub fn _010(self) -> &'a mut W {
|
||||
self.variant(PCSW::_010)
|
||||
}
|
||||
#[doc = "Clock option 3"]
|
||||
#[inline]
|
||||
pub fn _011(self) -> &'a mut W {
|
||||
self.variant(PCSW::_011)
|
||||
}
|
||||
#[doc = "Clock option 4"]
|
||||
#[inline]
|
||||
pub fn _100(self) -> &'a mut W {
|
||||
self.variant(PCSW::_100)
|
||||
}
|
||||
#[doc = "Clock option 5"]
|
||||
#[inline]
|
||||
pub fn _101(self) -> &'a mut W {
|
||||
self.variant(PCSW::_101)
|
||||
}
|
||||
#[doc = "Clock option 6"]
|
||||
#[inline]
|
||||
pub fn _110(self) -> &'a mut W {
|
||||
self.variant(PCSW::_110)
|
||||
}
|
||||
#[doc = "Clock option 7"]
|
||||
#[inline]
|
||||
pub fn _111(self) -> &'a mut W {
|
||||
self.variant(PCSW::_111)
|
||||
}
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub fn bits(self, value: u8) -> &'a mut W {
|
||||
const MASK: u8 = 7;
|
||||
const OFFSET: u8 = 24;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = "Values that can be written to the field `CGC`"]
|
||||
pub enum CGCW {
|
||||
#[doc = "Clock disabled"]
|
||||
_0,
|
||||
#[doc = "Clock enabled. The current clock selection and divider options are locked."]
|
||||
_1,
|
||||
}
|
||||
impl CGCW {
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _bits(&self) -> bool {
|
||||
match *self {
|
||||
CGCW::_0 => false,
|
||||
CGCW::_1 => true,
|
||||
}
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _CGCW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _CGCW<'a> {
|
||||
#[doc = r" Writes `variant` to the field"]
|
||||
#[inline]
|
||||
pub fn variant(self, variant: CGCW) -> &'a mut W {
|
||||
{
|
||||
self.bit(variant._bits())
|
||||
}
|
||||
}
|
||||
#[doc = "Clock disabled"]
|
||||
#[inline]
|
||||
pub fn _0(self) -> &'a mut W {
|
||||
self.variant(CGCW::_0)
|
||||
}
|
||||
#[doc = "Clock enabled. The current clock selection and divider options are locked."]
|
||||
#[inline]
|
||||
pub fn _1(self) -> &'a mut W {
|
||||
self.variant(CGCW::_1)
|
||||
}
|
||||
#[doc = r" Sets the field bit"]
|
||||
pub fn set_bit(self) -> &'a mut W {
|
||||
self.bit(true)
|
||||
}
|
||||
#[doc = r" Clears the field bit"]
|
||||
pub fn clear_bit(self) -> &'a mut W {
|
||||
self.bit(false)
|
||||
}
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub fn bit(self, value: bool) -> &'a mut W {
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 30;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
#[doc = "Bits 24:26 - Peripheral Clock Source Select"]
|
||||
#[inline]
|
||||
pub fn pcs(&self) -> PCSR {
|
||||
PCSR::_from({
|
||||
const MASK: u8 = 7;
|
||||
const OFFSET: u8 = 24;
|
||||
((self.bits >> OFFSET) & MASK as u32) as u8
|
||||
})
|
||||
}
|
||||
#[doc = "Bit 30 - Clock Gate Control"]
|
||||
#[inline]
|
||||
pub fn cgc(&self) -> CGCR {
|
||||
CGCR::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 30;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
#[doc = "Bit 31 - Present"]
|
||||
#[inline]
|
||||
pub fn pr(&self) -> PRR {
|
||||
PRR::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 31;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 2147483648 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
#[doc = "Bits 24:26 - Peripheral Clock Source Select"]
|
||||
#[inline]
|
||||
pub fn pcs(&mut self) -> _PCSW {
|
||||
_PCSW { w: self }
|
||||
}
|
||||
#[doc = "Bit 30 - Clock Gate Control"]
|
||||
#[inline]
|
||||
pub fn cgc(&mut self) -> _CGCW {
|
||||
_CGCW { w: self }
|
||||
}
|
||||
}
|
||||
441
src/pcc/pcc_lpuart1/mod.rs
Normal file
441
src/pcc/pcc_lpuart1/mod.rs
Normal file
@@ -0,0 +1,441 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PCC_LPUART1 {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `PCS`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum PCSR {
|
||||
#[doc = "Clock is off."]
|
||||
_000,
|
||||
#[doc = "Clock option 1"]
|
||||
_001,
|
||||
#[doc = "Clock option 2"]
|
||||
_010,
|
||||
#[doc = "Clock option 3"]
|
||||
_011,
|
||||
#[doc = "Clock option 4"]
|
||||
_100,
|
||||
#[doc = "Clock option 5"]
|
||||
_101,
|
||||
#[doc = "Clock option 6"]
|
||||
_110,
|
||||
#[doc = "Clock option 7"]
|
||||
_111,
|
||||
}
|
||||
impl PCSR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u8 {
|
||||
match *self {
|
||||
PCSR::_000 => 0,
|
||||
PCSR::_001 => 1,
|
||||
PCSR::_010 => 2,
|
||||
PCSR::_011 => 3,
|
||||
PCSR::_100 => 4,
|
||||
PCSR::_101 => 5,
|
||||
PCSR::_110 => 6,
|
||||
PCSR::_111 => 7,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: u8) -> PCSR {
|
||||
match value {
|
||||
0 => PCSR::_000,
|
||||
1 => PCSR::_001,
|
||||
2 => PCSR::_010,
|
||||
3 => PCSR::_011,
|
||||
4 => PCSR::_100,
|
||||
5 => PCSR::_101,
|
||||
6 => PCSR::_110,
|
||||
7 => PCSR::_111,
|
||||
_ => unreachable!(),
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_000`"]
|
||||
#[inline]
|
||||
pub fn is_000(&self) -> bool {
|
||||
*self == PCSR::_000
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_001`"]
|
||||
#[inline]
|
||||
pub fn is_001(&self) -> bool {
|
||||
*self == PCSR::_001
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_010`"]
|
||||
#[inline]
|
||||
pub fn is_010(&self) -> bool {
|
||||
*self == PCSR::_010
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_011`"]
|
||||
#[inline]
|
||||
pub fn is_011(&self) -> bool {
|
||||
*self == PCSR::_011
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_100`"]
|
||||
#[inline]
|
||||
pub fn is_100(&self) -> bool {
|
||||
*self == PCSR::_100
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_101`"]
|
||||
#[inline]
|
||||
pub fn is_101(&self) -> bool {
|
||||
*self == PCSR::_101
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_110`"]
|
||||
#[inline]
|
||||
pub fn is_110(&self) -> bool {
|
||||
*self == PCSR::_110
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_111`"]
|
||||
#[inline]
|
||||
pub fn is_111(&self) -> bool {
|
||||
*self == PCSR::_111
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `CGC`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum CGCR {
|
||||
#[doc = "Clock disabled"]
|
||||
_0,
|
||||
#[doc = "Clock enabled. The current clock selection and divider options are locked."]
|
||||
_1,
|
||||
}
|
||||
impl CGCR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
match *self {
|
||||
CGCR::_0 => false,
|
||||
CGCR::_1 => true,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: bool) -> CGCR {
|
||||
match value {
|
||||
false => CGCR::_0,
|
||||
true => CGCR::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == CGCR::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == CGCR::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `PR`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum PRR {
|
||||
#[doc = "Peripheral is not present."]
|
||||
_0,
|
||||
#[doc = "Peripheral is present."]
|
||||
_1,
|
||||
}
|
||||
impl PRR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
match *self {
|
||||
PRR::_0 => false,
|
||||
PRR::_1 => true,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: bool) -> PRR {
|
||||
match value {
|
||||
false => PRR::_0,
|
||||
true => PRR::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == PRR::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == PRR::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Values that can be written to the field `PCS`"]
|
||||
pub enum PCSW {
|
||||
#[doc = "Clock is off."]
|
||||
_000,
|
||||
#[doc = "Clock option 1"]
|
||||
_001,
|
||||
#[doc = "Clock option 2"]
|
||||
_010,
|
||||
#[doc = "Clock option 3"]
|
||||
_011,
|
||||
#[doc = "Clock option 4"]
|
||||
_100,
|
||||
#[doc = "Clock option 5"]
|
||||
_101,
|
||||
#[doc = "Clock option 6"]
|
||||
_110,
|
||||
#[doc = "Clock option 7"]
|
||||
_111,
|
||||
}
|
||||
impl PCSW {
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _bits(&self) -> u8 {
|
||||
match *self {
|
||||
PCSW::_000 => 0,
|
||||
PCSW::_001 => 1,
|
||||
PCSW::_010 => 2,
|
||||
PCSW::_011 => 3,
|
||||
PCSW::_100 => 4,
|
||||
PCSW::_101 => 5,
|
||||
PCSW::_110 => 6,
|
||||
PCSW::_111 => 7,
|
||||
}
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _PCSW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _PCSW<'a> {
|
||||
#[doc = r" Writes `variant` to the field"]
|
||||
#[inline]
|
||||
pub fn variant(self, variant: PCSW) -> &'a mut W {
|
||||
{
|
||||
self.bits(variant._bits())
|
||||
}
|
||||
}
|
||||
#[doc = "Clock is off."]
|
||||
#[inline]
|
||||
pub fn _000(self) -> &'a mut W {
|
||||
self.variant(PCSW::_000)
|
||||
}
|
||||
#[doc = "Clock option 1"]
|
||||
#[inline]
|
||||
pub fn _001(self) -> &'a mut W {
|
||||
self.variant(PCSW::_001)
|
||||
}
|
||||
#[doc = "Clock option 2"]
|
||||
#[inline]
|
||||
pub fn _010(self) -> &'a mut W {
|
||||
self.variant(PCSW::_010)
|
||||
}
|
||||
#[doc = "Clock option 3"]
|
||||
#[inline]
|
||||
pub fn _011(self) -> &'a mut W {
|
||||
self.variant(PCSW::_011)
|
||||
}
|
||||
#[doc = "Clock option 4"]
|
||||
#[inline]
|
||||
pub fn _100(self) -> &'a mut W {
|
||||
self.variant(PCSW::_100)
|
||||
}
|
||||
#[doc = "Clock option 5"]
|
||||
#[inline]
|
||||
pub fn _101(self) -> &'a mut W {
|
||||
self.variant(PCSW::_101)
|
||||
}
|
||||
#[doc = "Clock option 6"]
|
||||
#[inline]
|
||||
pub fn _110(self) -> &'a mut W {
|
||||
self.variant(PCSW::_110)
|
||||
}
|
||||
#[doc = "Clock option 7"]
|
||||
#[inline]
|
||||
pub fn _111(self) -> &'a mut W {
|
||||
self.variant(PCSW::_111)
|
||||
}
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub fn bits(self, value: u8) -> &'a mut W {
|
||||
const MASK: u8 = 7;
|
||||
const OFFSET: u8 = 24;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = "Values that can be written to the field `CGC`"]
|
||||
pub enum CGCW {
|
||||
#[doc = "Clock disabled"]
|
||||
_0,
|
||||
#[doc = "Clock enabled. The current clock selection and divider options are locked."]
|
||||
_1,
|
||||
}
|
||||
impl CGCW {
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _bits(&self) -> bool {
|
||||
match *self {
|
||||
CGCW::_0 => false,
|
||||
CGCW::_1 => true,
|
||||
}
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _CGCW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _CGCW<'a> {
|
||||
#[doc = r" Writes `variant` to the field"]
|
||||
#[inline]
|
||||
pub fn variant(self, variant: CGCW) -> &'a mut W {
|
||||
{
|
||||
self.bit(variant._bits())
|
||||
}
|
||||
}
|
||||
#[doc = "Clock disabled"]
|
||||
#[inline]
|
||||
pub fn _0(self) -> &'a mut W {
|
||||
self.variant(CGCW::_0)
|
||||
}
|
||||
#[doc = "Clock enabled. The current clock selection and divider options are locked."]
|
||||
#[inline]
|
||||
pub fn _1(self) -> &'a mut W {
|
||||
self.variant(CGCW::_1)
|
||||
}
|
||||
#[doc = r" Sets the field bit"]
|
||||
pub fn set_bit(self) -> &'a mut W {
|
||||
self.bit(true)
|
||||
}
|
||||
#[doc = r" Clears the field bit"]
|
||||
pub fn clear_bit(self) -> &'a mut W {
|
||||
self.bit(false)
|
||||
}
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub fn bit(self, value: bool) -> &'a mut W {
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 30;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
#[doc = "Bits 24:26 - Peripheral Clock Source Select"]
|
||||
#[inline]
|
||||
pub fn pcs(&self) -> PCSR {
|
||||
PCSR::_from({
|
||||
const MASK: u8 = 7;
|
||||
const OFFSET: u8 = 24;
|
||||
((self.bits >> OFFSET) & MASK as u32) as u8
|
||||
})
|
||||
}
|
||||
#[doc = "Bit 30 - Clock Gate Control"]
|
||||
#[inline]
|
||||
pub fn cgc(&self) -> CGCR {
|
||||
CGCR::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 30;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
#[doc = "Bit 31 - Present"]
|
||||
#[inline]
|
||||
pub fn pr(&self) -> PRR {
|
||||
PRR::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 31;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 2147483648 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
#[doc = "Bits 24:26 - Peripheral Clock Source Select"]
|
||||
#[inline]
|
||||
pub fn pcs(&mut self) -> _PCSW {
|
||||
_PCSW { w: self }
|
||||
}
|
||||
#[doc = "Bit 30 - Clock Gate Control"]
|
||||
#[inline]
|
||||
pub fn cgc(&mut self) -> _CGCW {
|
||||
_CGCW { w: self }
|
||||
}
|
||||
}
|
||||
441
src/pcc/pcc_lpuart2/mod.rs
Normal file
441
src/pcc/pcc_lpuart2/mod.rs
Normal file
@@ -0,0 +1,441 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PCC_LPUART2 {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `PCS`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum PCSR {
|
||||
#[doc = "Clock is off."]
|
||||
_000,
|
||||
#[doc = "Clock option 1"]
|
||||
_001,
|
||||
#[doc = "Clock option 2"]
|
||||
_010,
|
||||
#[doc = "Clock option 3"]
|
||||
_011,
|
||||
#[doc = "Clock option 4"]
|
||||
_100,
|
||||
#[doc = "Clock option 5"]
|
||||
_101,
|
||||
#[doc = "Clock option 6"]
|
||||
_110,
|
||||
#[doc = "Clock option 7"]
|
||||
_111,
|
||||
}
|
||||
impl PCSR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u8 {
|
||||
match *self {
|
||||
PCSR::_000 => 0,
|
||||
PCSR::_001 => 1,
|
||||
PCSR::_010 => 2,
|
||||
PCSR::_011 => 3,
|
||||
PCSR::_100 => 4,
|
||||
PCSR::_101 => 5,
|
||||
PCSR::_110 => 6,
|
||||
PCSR::_111 => 7,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: u8) -> PCSR {
|
||||
match value {
|
||||
0 => PCSR::_000,
|
||||
1 => PCSR::_001,
|
||||
2 => PCSR::_010,
|
||||
3 => PCSR::_011,
|
||||
4 => PCSR::_100,
|
||||
5 => PCSR::_101,
|
||||
6 => PCSR::_110,
|
||||
7 => PCSR::_111,
|
||||
_ => unreachable!(),
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_000`"]
|
||||
#[inline]
|
||||
pub fn is_000(&self) -> bool {
|
||||
*self == PCSR::_000
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_001`"]
|
||||
#[inline]
|
||||
pub fn is_001(&self) -> bool {
|
||||
*self == PCSR::_001
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_010`"]
|
||||
#[inline]
|
||||
pub fn is_010(&self) -> bool {
|
||||
*self == PCSR::_010
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_011`"]
|
||||
#[inline]
|
||||
pub fn is_011(&self) -> bool {
|
||||
*self == PCSR::_011
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_100`"]
|
||||
#[inline]
|
||||
pub fn is_100(&self) -> bool {
|
||||
*self == PCSR::_100
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_101`"]
|
||||
#[inline]
|
||||
pub fn is_101(&self) -> bool {
|
||||
*self == PCSR::_101
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_110`"]
|
||||
#[inline]
|
||||
pub fn is_110(&self) -> bool {
|
||||
*self == PCSR::_110
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_111`"]
|
||||
#[inline]
|
||||
pub fn is_111(&self) -> bool {
|
||||
*self == PCSR::_111
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `CGC`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum CGCR {
|
||||
#[doc = "Clock disabled"]
|
||||
_0,
|
||||
#[doc = "Clock enabled. The current clock selection and divider options are locked."]
|
||||
_1,
|
||||
}
|
||||
impl CGCR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
match *self {
|
||||
CGCR::_0 => false,
|
||||
CGCR::_1 => true,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: bool) -> CGCR {
|
||||
match value {
|
||||
false => CGCR::_0,
|
||||
true => CGCR::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == CGCR::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == CGCR::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `PR`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum PRR {
|
||||
#[doc = "Peripheral is not present."]
|
||||
_0,
|
||||
#[doc = "Peripheral is present."]
|
||||
_1,
|
||||
}
|
||||
impl PRR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
match *self {
|
||||
PRR::_0 => false,
|
||||
PRR::_1 => true,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: bool) -> PRR {
|
||||
match value {
|
||||
false => PRR::_0,
|
||||
true => PRR::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == PRR::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == PRR::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Values that can be written to the field `PCS`"]
|
||||
pub enum PCSW {
|
||||
#[doc = "Clock is off."]
|
||||
_000,
|
||||
#[doc = "Clock option 1"]
|
||||
_001,
|
||||
#[doc = "Clock option 2"]
|
||||
_010,
|
||||
#[doc = "Clock option 3"]
|
||||
_011,
|
||||
#[doc = "Clock option 4"]
|
||||
_100,
|
||||
#[doc = "Clock option 5"]
|
||||
_101,
|
||||
#[doc = "Clock option 6"]
|
||||
_110,
|
||||
#[doc = "Clock option 7"]
|
||||
_111,
|
||||
}
|
||||
impl PCSW {
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _bits(&self) -> u8 {
|
||||
match *self {
|
||||
PCSW::_000 => 0,
|
||||
PCSW::_001 => 1,
|
||||
PCSW::_010 => 2,
|
||||
PCSW::_011 => 3,
|
||||
PCSW::_100 => 4,
|
||||
PCSW::_101 => 5,
|
||||
PCSW::_110 => 6,
|
||||
PCSW::_111 => 7,
|
||||
}
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _PCSW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _PCSW<'a> {
|
||||
#[doc = r" Writes `variant` to the field"]
|
||||
#[inline]
|
||||
pub fn variant(self, variant: PCSW) -> &'a mut W {
|
||||
{
|
||||
self.bits(variant._bits())
|
||||
}
|
||||
}
|
||||
#[doc = "Clock is off."]
|
||||
#[inline]
|
||||
pub fn _000(self) -> &'a mut W {
|
||||
self.variant(PCSW::_000)
|
||||
}
|
||||
#[doc = "Clock option 1"]
|
||||
#[inline]
|
||||
pub fn _001(self) -> &'a mut W {
|
||||
self.variant(PCSW::_001)
|
||||
}
|
||||
#[doc = "Clock option 2"]
|
||||
#[inline]
|
||||
pub fn _010(self) -> &'a mut W {
|
||||
self.variant(PCSW::_010)
|
||||
}
|
||||
#[doc = "Clock option 3"]
|
||||
#[inline]
|
||||
pub fn _011(self) -> &'a mut W {
|
||||
self.variant(PCSW::_011)
|
||||
}
|
||||
#[doc = "Clock option 4"]
|
||||
#[inline]
|
||||
pub fn _100(self) -> &'a mut W {
|
||||
self.variant(PCSW::_100)
|
||||
}
|
||||
#[doc = "Clock option 5"]
|
||||
#[inline]
|
||||
pub fn _101(self) -> &'a mut W {
|
||||
self.variant(PCSW::_101)
|
||||
}
|
||||
#[doc = "Clock option 6"]
|
||||
#[inline]
|
||||
pub fn _110(self) -> &'a mut W {
|
||||
self.variant(PCSW::_110)
|
||||
}
|
||||
#[doc = "Clock option 7"]
|
||||
#[inline]
|
||||
pub fn _111(self) -> &'a mut W {
|
||||
self.variant(PCSW::_111)
|
||||
}
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub fn bits(self, value: u8) -> &'a mut W {
|
||||
const MASK: u8 = 7;
|
||||
const OFFSET: u8 = 24;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = "Values that can be written to the field `CGC`"]
|
||||
pub enum CGCW {
|
||||
#[doc = "Clock disabled"]
|
||||
_0,
|
||||
#[doc = "Clock enabled. The current clock selection and divider options are locked."]
|
||||
_1,
|
||||
}
|
||||
impl CGCW {
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _bits(&self) -> bool {
|
||||
match *self {
|
||||
CGCW::_0 => false,
|
||||
CGCW::_1 => true,
|
||||
}
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _CGCW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _CGCW<'a> {
|
||||
#[doc = r" Writes `variant` to the field"]
|
||||
#[inline]
|
||||
pub fn variant(self, variant: CGCW) -> &'a mut W {
|
||||
{
|
||||
self.bit(variant._bits())
|
||||
}
|
||||
}
|
||||
#[doc = "Clock disabled"]
|
||||
#[inline]
|
||||
pub fn _0(self) -> &'a mut W {
|
||||
self.variant(CGCW::_0)
|
||||
}
|
||||
#[doc = "Clock enabled. The current clock selection and divider options are locked."]
|
||||
#[inline]
|
||||
pub fn _1(self) -> &'a mut W {
|
||||
self.variant(CGCW::_1)
|
||||
}
|
||||
#[doc = r" Sets the field bit"]
|
||||
pub fn set_bit(self) -> &'a mut W {
|
||||
self.bit(true)
|
||||
}
|
||||
#[doc = r" Clears the field bit"]
|
||||
pub fn clear_bit(self) -> &'a mut W {
|
||||
self.bit(false)
|
||||
}
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub fn bit(self, value: bool) -> &'a mut W {
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 30;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
#[doc = "Bits 24:26 - Peripheral Clock Source Select"]
|
||||
#[inline]
|
||||
pub fn pcs(&self) -> PCSR {
|
||||
PCSR::_from({
|
||||
const MASK: u8 = 7;
|
||||
const OFFSET: u8 = 24;
|
||||
((self.bits >> OFFSET) & MASK as u32) as u8
|
||||
})
|
||||
}
|
||||
#[doc = "Bit 30 - Clock Gate Control"]
|
||||
#[inline]
|
||||
pub fn cgc(&self) -> CGCR {
|
||||
CGCR::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 30;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
#[doc = "Bit 31 - Present"]
|
||||
#[inline]
|
||||
pub fn pr(&self) -> PRR {
|
||||
PRR::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 31;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 2147483648 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
#[doc = "Bits 24:26 - Peripheral Clock Source Select"]
|
||||
#[inline]
|
||||
pub fn pcs(&mut self) -> _PCSW {
|
||||
_PCSW { w: self }
|
||||
}
|
||||
#[doc = "Bit 30 - Clock Gate Control"]
|
||||
#[inline]
|
||||
pub fn cgc(&mut self) -> _CGCW {
|
||||
_CGCW { w: self }
|
||||
}
|
||||
}
|
||||
237
src/pcc/pcc_pdb0/mod.rs
Normal file
237
src/pcc/pcc_pdb0/mod.rs
Normal file
@@ -0,0 +1,237 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PCC_PDB0 {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `CGC`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum CGCR {
|
||||
#[doc = "Clock disabled"]
|
||||
_0,
|
||||
#[doc = "Clock enabled. The current clock selection and divider options are locked."]
|
||||
_1,
|
||||
}
|
||||
impl CGCR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
match *self {
|
||||
CGCR::_0 => false,
|
||||
CGCR::_1 => true,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: bool) -> CGCR {
|
||||
match value {
|
||||
false => CGCR::_0,
|
||||
true => CGCR::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == CGCR::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == CGCR::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `PR`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum PRR {
|
||||
#[doc = "Peripheral is not present."]
|
||||
_0,
|
||||
#[doc = "Peripheral is present."]
|
||||
_1,
|
||||
}
|
||||
impl PRR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
match *self {
|
||||
PRR::_0 => false,
|
||||
PRR::_1 => true,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: bool) -> PRR {
|
||||
match value {
|
||||
false => PRR::_0,
|
||||
true => PRR::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == PRR::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == PRR::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Values that can be written to the field `CGC`"]
|
||||
pub enum CGCW {
|
||||
#[doc = "Clock disabled"]
|
||||
_0,
|
||||
#[doc = "Clock enabled. The current clock selection and divider options are locked."]
|
||||
_1,
|
||||
}
|
||||
impl CGCW {
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _bits(&self) -> bool {
|
||||
match *self {
|
||||
CGCW::_0 => false,
|
||||
CGCW::_1 => true,
|
||||
}
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _CGCW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _CGCW<'a> {
|
||||
#[doc = r" Writes `variant` to the field"]
|
||||
#[inline]
|
||||
pub fn variant(self, variant: CGCW) -> &'a mut W {
|
||||
{
|
||||
self.bit(variant._bits())
|
||||
}
|
||||
}
|
||||
#[doc = "Clock disabled"]
|
||||
#[inline]
|
||||
pub fn _0(self) -> &'a mut W {
|
||||
self.variant(CGCW::_0)
|
||||
}
|
||||
#[doc = "Clock enabled. The current clock selection and divider options are locked."]
|
||||
#[inline]
|
||||
pub fn _1(self) -> &'a mut W {
|
||||
self.variant(CGCW::_1)
|
||||
}
|
||||
#[doc = r" Sets the field bit"]
|
||||
pub fn set_bit(self) -> &'a mut W {
|
||||
self.bit(true)
|
||||
}
|
||||
#[doc = r" Clears the field bit"]
|
||||
pub fn clear_bit(self) -> &'a mut W {
|
||||
self.bit(false)
|
||||
}
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub fn bit(self, value: bool) -> &'a mut W {
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 30;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
#[doc = "Bit 30 - Clock Gate Control"]
|
||||
#[inline]
|
||||
pub fn cgc(&self) -> CGCR {
|
||||
CGCR::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 30;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
#[doc = "Bit 31 - Present"]
|
||||
#[inline]
|
||||
pub fn pr(&self) -> PRR {
|
||||
PRR::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 31;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 2147483648 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
#[doc = "Bit 30 - Clock Gate Control"]
|
||||
#[inline]
|
||||
pub fn cgc(&mut self) -> _CGCW {
|
||||
_CGCW { w: self }
|
||||
}
|
||||
}
|
||||
237
src/pcc/pcc_pdb1/mod.rs
Normal file
237
src/pcc/pcc_pdb1/mod.rs
Normal file
@@ -0,0 +1,237 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PCC_PDB1 {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `CGC`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum CGCR {
|
||||
#[doc = "Clock disabled"]
|
||||
_0,
|
||||
#[doc = "Clock enabled. The current clock selection and divider options are locked."]
|
||||
_1,
|
||||
}
|
||||
impl CGCR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
match *self {
|
||||
CGCR::_0 => false,
|
||||
CGCR::_1 => true,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: bool) -> CGCR {
|
||||
match value {
|
||||
false => CGCR::_0,
|
||||
true => CGCR::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == CGCR::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == CGCR::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `PR`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum PRR {
|
||||
#[doc = "Peripheral is not present."]
|
||||
_0,
|
||||
#[doc = "Peripheral is present."]
|
||||
_1,
|
||||
}
|
||||
impl PRR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
match *self {
|
||||
PRR::_0 => false,
|
||||
PRR::_1 => true,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: bool) -> PRR {
|
||||
match value {
|
||||
false => PRR::_0,
|
||||
true => PRR::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == PRR::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == PRR::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Values that can be written to the field `CGC`"]
|
||||
pub enum CGCW {
|
||||
#[doc = "Clock disabled"]
|
||||
_0,
|
||||
#[doc = "Clock enabled. The current clock selection and divider options are locked."]
|
||||
_1,
|
||||
}
|
||||
impl CGCW {
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _bits(&self) -> bool {
|
||||
match *self {
|
||||
CGCW::_0 => false,
|
||||
CGCW::_1 => true,
|
||||
}
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _CGCW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _CGCW<'a> {
|
||||
#[doc = r" Writes `variant` to the field"]
|
||||
#[inline]
|
||||
pub fn variant(self, variant: CGCW) -> &'a mut W {
|
||||
{
|
||||
self.bit(variant._bits())
|
||||
}
|
||||
}
|
||||
#[doc = "Clock disabled"]
|
||||
#[inline]
|
||||
pub fn _0(self) -> &'a mut W {
|
||||
self.variant(CGCW::_0)
|
||||
}
|
||||
#[doc = "Clock enabled. The current clock selection and divider options are locked."]
|
||||
#[inline]
|
||||
pub fn _1(self) -> &'a mut W {
|
||||
self.variant(CGCW::_1)
|
||||
}
|
||||
#[doc = r" Sets the field bit"]
|
||||
pub fn set_bit(self) -> &'a mut W {
|
||||
self.bit(true)
|
||||
}
|
||||
#[doc = r" Clears the field bit"]
|
||||
pub fn clear_bit(self) -> &'a mut W {
|
||||
self.bit(false)
|
||||
}
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub fn bit(self, value: bool) -> &'a mut W {
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 30;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
#[doc = "Bit 30 - Clock Gate Control"]
|
||||
#[inline]
|
||||
pub fn cgc(&self) -> CGCR {
|
||||
CGCR::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 30;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
#[doc = "Bit 31 - Present"]
|
||||
#[inline]
|
||||
pub fn pr(&self) -> PRR {
|
||||
PRR::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 31;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 2147483648 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
#[doc = "Bit 30 - Clock Gate Control"]
|
||||
#[inline]
|
||||
pub fn cgc(&mut self) -> _CGCW {
|
||||
_CGCW { w: self }
|
||||
}
|
||||
}
|
||||
237
src/pcc/pcc_porta/mod.rs
Normal file
237
src/pcc/pcc_porta/mod.rs
Normal file
@@ -0,0 +1,237 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PCC_PORTA {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `CGC`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum CGCR {
|
||||
#[doc = "Clock disabled"]
|
||||
_0,
|
||||
#[doc = "Clock enabled. The current clock selection and divider options are locked."]
|
||||
_1,
|
||||
}
|
||||
impl CGCR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
match *self {
|
||||
CGCR::_0 => false,
|
||||
CGCR::_1 => true,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: bool) -> CGCR {
|
||||
match value {
|
||||
false => CGCR::_0,
|
||||
true => CGCR::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == CGCR::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == CGCR::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `PR`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum PRR {
|
||||
#[doc = "Peripheral is not present."]
|
||||
_0,
|
||||
#[doc = "Peripheral is present."]
|
||||
_1,
|
||||
}
|
||||
impl PRR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
match *self {
|
||||
PRR::_0 => false,
|
||||
PRR::_1 => true,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: bool) -> PRR {
|
||||
match value {
|
||||
false => PRR::_0,
|
||||
true => PRR::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == PRR::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == PRR::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Values that can be written to the field `CGC`"]
|
||||
pub enum CGCW {
|
||||
#[doc = "Clock disabled"]
|
||||
_0,
|
||||
#[doc = "Clock enabled. The current clock selection and divider options are locked."]
|
||||
_1,
|
||||
}
|
||||
impl CGCW {
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _bits(&self) -> bool {
|
||||
match *self {
|
||||
CGCW::_0 => false,
|
||||
CGCW::_1 => true,
|
||||
}
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _CGCW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _CGCW<'a> {
|
||||
#[doc = r" Writes `variant` to the field"]
|
||||
#[inline]
|
||||
pub fn variant(self, variant: CGCW) -> &'a mut W {
|
||||
{
|
||||
self.bit(variant._bits())
|
||||
}
|
||||
}
|
||||
#[doc = "Clock disabled"]
|
||||
#[inline]
|
||||
pub fn _0(self) -> &'a mut W {
|
||||
self.variant(CGCW::_0)
|
||||
}
|
||||
#[doc = "Clock enabled. The current clock selection and divider options are locked."]
|
||||
#[inline]
|
||||
pub fn _1(self) -> &'a mut W {
|
||||
self.variant(CGCW::_1)
|
||||
}
|
||||
#[doc = r" Sets the field bit"]
|
||||
pub fn set_bit(self) -> &'a mut W {
|
||||
self.bit(true)
|
||||
}
|
||||
#[doc = r" Clears the field bit"]
|
||||
pub fn clear_bit(self) -> &'a mut W {
|
||||
self.bit(false)
|
||||
}
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub fn bit(self, value: bool) -> &'a mut W {
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 30;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
#[doc = "Bit 30 - Clock Gate Control"]
|
||||
#[inline]
|
||||
pub fn cgc(&self) -> CGCR {
|
||||
CGCR::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 30;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
#[doc = "Bit 31 - Present"]
|
||||
#[inline]
|
||||
pub fn pr(&self) -> PRR {
|
||||
PRR::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 31;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 2147483648 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
#[doc = "Bit 30 - Clock Gate Control"]
|
||||
#[inline]
|
||||
pub fn cgc(&mut self) -> _CGCW {
|
||||
_CGCW { w: self }
|
||||
}
|
||||
}
|
||||
237
src/pcc/pcc_portb/mod.rs
Normal file
237
src/pcc/pcc_portb/mod.rs
Normal file
@@ -0,0 +1,237 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PCC_PORTB {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `CGC`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum CGCR {
|
||||
#[doc = "Clock disabled"]
|
||||
_0,
|
||||
#[doc = "Clock enabled. The current clock selection and divider options are locked."]
|
||||
_1,
|
||||
}
|
||||
impl CGCR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
match *self {
|
||||
CGCR::_0 => false,
|
||||
CGCR::_1 => true,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: bool) -> CGCR {
|
||||
match value {
|
||||
false => CGCR::_0,
|
||||
true => CGCR::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == CGCR::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == CGCR::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `PR`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum PRR {
|
||||
#[doc = "Peripheral is not present."]
|
||||
_0,
|
||||
#[doc = "Peripheral is present."]
|
||||
_1,
|
||||
}
|
||||
impl PRR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
match *self {
|
||||
PRR::_0 => false,
|
||||
PRR::_1 => true,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: bool) -> PRR {
|
||||
match value {
|
||||
false => PRR::_0,
|
||||
true => PRR::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == PRR::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == PRR::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Values that can be written to the field `CGC`"]
|
||||
pub enum CGCW {
|
||||
#[doc = "Clock disabled"]
|
||||
_0,
|
||||
#[doc = "Clock enabled. The current clock selection and divider options are locked."]
|
||||
_1,
|
||||
}
|
||||
impl CGCW {
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _bits(&self) -> bool {
|
||||
match *self {
|
||||
CGCW::_0 => false,
|
||||
CGCW::_1 => true,
|
||||
}
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _CGCW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _CGCW<'a> {
|
||||
#[doc = r" Writes `variant` to the field"]
|
||||
#[inline]
|
||||
pub fn variant(self, variant: CGCW) -> &'a mut W {
|
||||
{
|
||||
self.bit(variant._bits())
|
||||
}
|
||||
}
|
||||
#[doc = "Clock disabled"]
|
||||
#[inline]
|
||||
pub fn _0(self) -> &'a mut W {
|
||||
self.variant(CGCW::_0)
|
||||
}
|
||||
#[doc = "Clock enabled. The current clock selection and divider options are locked."]
|
||||
#[inline]
|
||||
pub fn _1(self) -> &'a mut W {
|
||||
self.variant(CGCW::_1)
|
||||
}
|
||||
#[doc = r" Sets the field bit"]
|
||||
pub fn set_bit(self) -> &'a mut W {
|
||||
self.bit(true)
|
||||
}
|
||||
#[doc = r" Clears the field bit"]
|
||||
pub fn clear_bit(self) -> &'a mut W {
|
||||
self.bit(false)
|
||||
}
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub fn bit(self, value: bool) -> &'a mut W {
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 30;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
#[doc = "Bit 30 - Clock Gate Control"]
|
||||
#[inline]
|
||||
pub fn cgc(&self) -> CGCR {
|
||||
CGCR::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 30;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
#[doc = "Bit 31 - Present"]
|
||||
#[inline]
|
||||
pub fn pr(&self) -> PRR {
|
||||
PRR::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 31;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 2147483648 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
#[doc = "Bit 30 - Clock Gate Control"]
|
||||
#[inline]
|
||||
pub fn cgc(&mut self) -> _CGCW {
|
||||
_CGCW { w: self }
|
||||
}
|
||||
}
|
||||
237
src/pcc/pcc_portc/mod.rs
Normal file
237
src/pcc/pcc_portc/mod.rs
Normal file
@@ -0,0 +1,237 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PCC_PORTC {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `CGC`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum CGCR {
|
||||
#[doc = "Clock disabled"]
|
||||
_0,
|
||||
#[doc = "Clock enabled. The current clock selection and divider options are locked."]
|
||||
_1,
|
||||
}
|
||||
impl CGCR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
match *self {
|
||||
CGCR::_0 => false,
|
||||
CGCR::_1 => true,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: bool) -> CGCR {
|
||||
match value {
|
||||
false => CGCR::_0,
|
||||
true => CGCR::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == CGCR::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == CGCR::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `PR`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum PRR {
|
||||
#[doc = "Peripheral is not present."]
|
||||
_0,
|
||||
#[doc = "Peripheral is present."]
|
||||
_1,
|
||||
}
|
||||
impl PRR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
match *self {
|
||||
PRR::_0 => false,
|
||||
PRR::_1 => true,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: bool) -> PRR {
|
||||
match value {
|
||||
false => PRR::_0,
|
||||
true => PRR::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == PRR::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == PRR::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Values that can be written to the field `CGC`"]
|
||||
pub enum CGCW {
|
||||
#[doc = "Clock disabled"]
|
||||
_0,
|
||||
#[doc = "Clock enabled. The current clock selection and divider options are locked."]
|
||||
_1,
|
||||
}
|
||||
impl CGCW {
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _bits(&self) -> bool {
|
||||
match *self {
|
||||
CGCW::_0 => false,
|
||||
CGCW::_1 => true,
|
||||
}
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _CGCW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _CGCW<'a> {
|
||||
#[doc = r" Writes `variant` to the field"]
|
||||
#[inline]
|
||||
pub fn variant(self, variant: CGCW) -> &'a mut W {
|
||||
{
|
||||
self.bit(variant._bits())
|
||||
}
|
||||
}
|
||||
#[doc = "Clock disabled"]
|
||||
#[inline]
|
||||
pub fn _0(self) -> &'a mut W {
|
||||
self.variant(CGCW::_0)
|
||||
}
|
||||
#[doc = "Clock enabled. The current clock selection and divider options are locked."]
|
||||
#[inline]
|
||||
pub fn _1(self) -> &'a mut W {
|
||||
self.variant(CGCW::_1)
|
||||
}
|
||||
#[doc = r" Sets the field bit"]
|
||||
pub fn set_bit(self) -> &'a mut W {
|
||||
self.bit(true)
|
||||
}
|
||||
#[doc = r" Clears the field bit"]
|
||||
pub fn clear_bit(self) -> &'a mut W {
|
||||
self.bit(false)
|
||||
}
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub fn bit(self, value: bool) -> &'a mut W {
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 30;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
#[doc = "Bit 30 - Clock Gate Control"]
|
||||
#[inline]
|
||||
pub fn cgc(&self) -> CGCR {
|
||||
CGCR::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 30;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
#[doc = "Bit 31 - Present"]
|
||||
#[inline]
|
||||
pub fn pr(&self) -> PRR {
|
||||
PRR::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 31;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 2147483648 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
#[doc = "Bit 30 - Clock Gate Control"]
|
||||
#[inline]
|
||||
pub fn cgc(&mut self) -> _CGCW {
|
||||
_CGCW { w: self }
|
||||
}
|
||||
}
|
||||
237
src/pcc/pcc_portd/mod.rs
Normal file
237
src/pcc/pcc_portd/mod.rs
Normal file
@@ -0,0 +1,237 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PCC_PORTD {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `CGC`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum CGCR {
|
||||
#[doc = "Clock disabled"]
|
||||
_0,
|
||||
#[doc = "Clock enabled. The current clock selection and divider options are locked."]
|
||||
_1,
|
||||
}
|
||||
impl CGCR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
match *self {
|
||||
CGCR::_0 => false,
|
||||
CGCR::_1 => true,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: bool) -> CGCR {
|
||||
match value {
|
||||
false => CGCR::_0,
|
||||
true => CGCR::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == CGCR::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == CGCR::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `PR`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum PRR {
|
||||
#[doc = "Peripheral is not present."]
|
||||
_0,
|
||||
#[doc = "Peripheral is present."]
|
||||
_1,
|
||||
}
|
||||
impl PRR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
match *self {
|
||||
PRR::_0 => false,
|
||||
PRR::_1 => true,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: bool) -> PRR {
|
||||
match value {
|
||||
false => PRR::_0,
|
||||
true => PRR::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == PRR::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == PRR::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Values that can be written to the field `CGC`"]
|
||||
pub enum CGCW {
|
||||
#[doc = "Clock disabled"]
|
||||
_0,
|
||||
#[doc = "Clock enabled. The current clock selection and divider options are locked."]
|
||||
_1,
|
||||
}
|
||||
impl CGCW {
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _bits(&self) -> bool {
|
||||
match *self {
|
||||
CGCW::_0 => false,
|
||||
CGCW::_1 => true,
|
||||
}
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _CGCW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _CGCW<'a> {
|
||||
#[doc = r" Writes `variant` to the field"]
|
||||
#[inline]
|
||||
pub fn variant(self, variant: CGCW) -> &'a mut W {
|
||||
{
|
||||
self.bit(variant._bits())
|
||||
}
|
||||
}
|
||||
#[doc = "Clock disabled"]
|
||||
#[inline]
|
||||
pub fn _0(self) -> &'a mut W {
|
||||
self.variant(CGCW::_0)
|
||||
}
|
||||
#[doc = "Clock enabled. The current clock selection and divider options are locked."]
|
||||
#[inline]
|
||||
pub fn _1(self) -> &'a mut W {
|
||||
self.variant(CGCW::_1)
|
||||
}
|
||||
#[doc = r" Sets the field bit"]
|
||||
pub fn set_bit(self) -> &'a mut W {
|
||||
self.bit(true)
|
||||
}
|
||||
#[doc = r" Clears the field bit"]
|
||||
pub fn clear_bit(self) -> &'a mut W {
|
||||
self.bit(false)
|
||||
}
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub fn bit(self, value: bool) -> &'a mut W {
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 30;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
#[doc = "Bit 30 - Clock Gate Control"]
|
||||
#[inline]
|
||||
pub fn cgc(&self) -> CGCR {
|
||||
CGCR::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 30;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
#[doc = "Bit 31 - Present"]
|
||||
#[inline]
|
||||
pub fn pr(&self) -> PRR {
|
||||
PRR::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 31;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 2147483648 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
#[doc = "Bit 30 - Clock Gate Control"]
|
||||
#[inline]
|
||||
pub fn cgc(&mut self) -> _CGCW {
|
||||
_CGCW { w: self }
|
||||
}
|
||||
}
|
||||
237
src/pcc/pcc_porte/mod.rs
Normal file
237
src/pcc/pcc_porte/mod.rs
Normal file
@@ -0,0 +1,237 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PCC_PORTE {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `CGC`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum CGCR {
|
||||
#[doc = "Clock disabled"]
|
||||
_0,
|
||||
#[doc = "Clock enabled. The current clock selection and divider options are locked."]
|
||||
_1,
|
||||
}
|
||||
impl CGCR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
match *self {
|
||||
CGCR::_0 => false,
|
||||
CGCR::_1 => true,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: bool) -> CGCR {
|
||||
match value {
|
||||
false => CGCR::_0,
|
||||
true => CGCR::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == CGCR::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == CGCR::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `PR`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum PRR {
|
||||
#[doc = "Peripheral is not present."]
|
||||
_0,
|
||||
#[doc = "Peripheral is present."]
|
||||
_1,
|
||||
}
|
||||
impl PRR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
match *self {
|
||||
PRR::_0 => false,
|
||||
PRR::_1 => true,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: bool) -> PRR {
|
||||
match value {
|
||||
false => PRR::_0,
|
||||
true => PRR::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == PRR::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == PRR::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Values that can be written to the field `CGC`"]
|
||||
pub enum CGCW {
|
||||
#[doc = "Clock disabled"]
|
||||
_0,
|
||||
#[doc = "Clock enabled. The current clock selection and divider options are locked."]
|
||||
_1,
|
||||
}
|
||||
impl CGCW {
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _bits(&self) -> bool {
|
||||
match *self {
|
||||
CGCW::_0 => false,
|
||||
CGCW::_1 => true,
|
||||
}
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _CGCW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _CGCW<'a> {
|
||||
#[doc = r" Writes `variant` to the field"]
|
||||
#[inline]
|
||||
pub fn variant(self, variant: CGCW) -> &'a mut W {
|
||||
{
|
||||
self.bit(variant._bits())
|
||||
}
|
||||
}
|
||||
#[doc = "Clock disabled"]
|
||||
#[inline]
|
||||
pub fn _0(self) -> &'a mut W {
|
||||
self.variant(CGCW::_0)
|
||||
}
|
||||
#[doc = "Clock enabled. The current clock selection and divider options are locked."]
|
||||
#[inline]
|
||||
pub fn _1(self) -> &'a mut W {
|
||||
self.variant(CGCW::_1)
|
||||
}
|
||||
#[doc = r" Sets the field bit"]
|
||||
pub fn set_bit(self) -> &'a mut W {
|
||||
self.bit(true)
|
||||
}
|
||||
#[doc = r" Clears the field bit"]
|
||||
pub fn clear_bit(self) -> &'a mut W {
|
||||
self.bit(false)
|
||||
}
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub fn bit(self, value: bool) -> &'a mut W {
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 30;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
#[doc = "Bit 30 - Clock Gate Control"]
|
||||
#[inline]
|
||||
pub fn cgc(&self) -> CGCR {
|
||||
CGCR::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 30;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
#[doc = "Bit 31 - Present"]
|
||||
#[inline]
|
||||
pub fn pr(&self) -> PRR {
|
||||
PRR::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 31;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 2147483648 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
#[doc = "Bit 30 - Clock Gate Control"]
|
||||
#[inline]
|
||||
pub fn cgc(&mut self) -> _CGCW {
|
||||
_CGCW { w: self }
|
||||
}
|
||||
}
|
||||
237
src/pcc/pcc_rtc/mod.rs
Normal file
237
src/pcc/pcc_rtc/mod.rs
Normal file
@@ -0,0 +1,237 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PCC_RTC {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `CGC`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum CGCR {
|
||||
#[doc = "Clock disabled"]
|
||||
_0,
|
||||
#[doc = "Clock enabled. The current clock selection and divider options are locked."]
|
||||
_1,
|
||||
}
|
||||
impl CGCR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
match *self {
|
||||
CGCR::_0 => false,
|
||||
CGCR::_1 => true,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: bool) -> CGCR {
|
||||
match value {
|
||||
false => CGCR::_0,
|
||||
true => CGCR::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == CGCR::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == CGCR::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `PR`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum PRR {
|
||||
#[doc = "Peripheral is not present."]
|
||||
_0,
|
||||
#[doc = "Peripheral is present."]
|
||||
_1,
|
||||
}
|
||||
impl PRR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
match *self {
|
||||
PRR::_0 => false,
|
||||
PRR::_1 => true,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: bool) -> PRR {
|
||||
match value {
|
||||
false => PRR::_0,
|
||||
true => PRR::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == PRR::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == PRR::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Values that can be written to the field `CGC`"]
|
||||
pub enum CGCW {
|
||||
#[doc = "Clock disabled"]
|
||||
_0,
|
||||
#[doc = "Clock enabled. The current clock selection and divider options are locked."]
|
||||
_1,
|
||||
}
|
||||
impl CGCW {
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _bits(&self) -> bool {
|
||||
match *self {
|
||||
CGCW::_0 => false,
|
||||
CGCW::_1 => true,
|
||||
}
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _CGCW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _CGCW<'a> {
|
||||
#[doc = r" Writes `variant` to the field"]
|
||||
#[inline]
|
||||
pub fn variant(self, variant: CGCW) -> &'a mut W {
|
||||
{
|
||||
self.bit(variant._bits())
|
||||
}
|
||||
}
|
||||
#[doc = "Clock disabled"]
|
||||
#[inline]
|
||||
pub fn _0(self) -> &'a mut W {
|
||||
self.variant(CGCW::_0)
|
||||
}
|
||||
#[doc = "Clock enabled. The current clock selection and divider options are locked."]
|
||||
#[inline]
|
||||
pub fn _1(self) -> &'a mut W {
|
||||
self.variant(CGCW::_1)
|
||||
}
|
||||
#[doc = r" Sets the field bit"]
|
||||
pub fn set_bit(self) -> &'a mut W {
|
||||
self.bit(true)
|
||||
}
|
||||
#[doc = r" Clears the field bit"]
|
||||
pub fn clear_bit(self) -> &'a mut W {
|
||||
self.bit(false)
|
||||
}
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub fn bit(self, value: bool) -> &'a mut W {
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 30;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
#[doc = "Bit 30 - Clock Gate Control"]
|
||||
#[inline]
|
||||
pub fn cgc(&self) -> CGCR {
|
||||
CGCR::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 30;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
#[doc = "Bit 31 - Present"]
|
||||
#[inline]
|
||||
pub fn pr(&self) -> PRR {
|
||||
PRR::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 31;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 2147483648 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
#[doc = "Bit 30 - Clock Gate Control"]
|
||||
#[inline]
|
||||
pub fn cgc(&mut self) -> _CGCW {
|
||||
_CGCW { w: self }
|
||||
}
|
||||
}
|
||||
62
src/pcc/pccdummy0/mod.rs
Normal file
62
src/pcc/pccdummy0/mod.rs
Normal file
@@ -0,0 +1,62 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PCCDUMMY0 {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 0 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
}
|
||||
62
src/pcc/pccdummy1/mod.rs
Normal file
62
src/pcc/pccdummy1/mod.rs
Normal file
@@ -0,0 +1,62 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PCCDUMMY1 {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 0 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
}
|
||||
62
src/pcc/pccdummy10/mod.rs
Normal file
62
src/pcc/pccdummy10/mod.rs
Normal file
@@ -0,0 +1,62 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PCCDUMMY10 {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 0 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
}
|
||||
62
src/pcc/pccdummy100/mod.rs
Normal file
62
src/pcc/pccdummy100/mod.rs
Normal file
@@ -0,0 +1,62 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PCCDUMMY100 {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 0 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
}
|
||||
62
src/pcc/pccdummy101/mod.rs
Normal file
62
src/pcc/pccdummy101/mod.rs
Normal file
@@ -0,0 +1,62 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PCCDUMMY101 {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 0 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
}
|
||||
62
src/pcc/pccdummy103/mod.rs
Normal file
62
src/pcc/pccdummy103/mod.rs
Normal file
@@ -0,0 +1,62 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PCCDUMMY103 {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 0 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
}
|
||||
62
src/pcc/pccdummy104/mod.rs
Normal file
62
src/pcc/pccdummy104/mod.rs
Normal file
@@ -0,0 +1,62 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PCCDUMMY104 {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 0 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
}
|
||||
62
src/pcc/pccdummy105/mod.rs
Normal file
62
src/pcc/pccdummy105/mod.rs
Normal file
@@ -0,0 +1,62 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PCCDUMMY105 {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 0 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
}
|
||||
62
src/pcc/pccdummy109/mod.rs
Normal file
62
src/pcc/pccdummy109/mod.rs
Normal file
@@ -0,0 +1,62 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PCCDUMMY109 {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 0 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
}
|
||||
62
src/pcc/pccdummy11/mod.rs
Normal file
62
src/pcc/pccdummy11/mod.rs
Normal file
@@ -0,0 +1,62 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PCCDUMMY11 {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 0 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
}
|
||||
62
src/pcc/pccdummy110/mod.rs
Normal file
62
src/pcc/pccdummy110/mod.rs
Normal file
@@ -0,0 +1,62 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PCCDUMMY110 {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 0 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
}
|
||||
62
src/pcc/pccdummy111/mod.rs
Normal file
62
src/pcc/pccdummy111/mod.rs
Normal file
@@ -0,0 +1,62 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PCCDUMMY111 {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 0 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
}
|
||||
62
src/pcc/pccdummy112/mod.rs
Normal file
62
src/pcc/pccdummy112/mod.rs
Normal file
@@ -0,0 +1,62 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PCCDUMMY112 {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 0 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
}
|
||||
62
src/pcc/pccdummy113/mod.rs
Normal file
62
src/pcc/pccdummy113/mod.rs
Normal file
@@ -0,0 +1,62 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PCCDUMMY113 {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 0 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
}
|
||||
62
src/pcc/pccdummy114/mod.rs
Normal file
62
src/pcc/pccdummy114/mod.rs
Normal file
@@ -0,0 +1,62 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PCCDUMMY114 {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 0 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
}
|
||||
62
src/pcc/pccdummy12/mod.rs
Normal file
62
src/pcc/pccdummy12/mod.rs
Normal file
@@ -0,0 +1,62 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PCCDUMMY12 {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 0 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
}
|
||||
62
src/pcc/pccdummy13/mod.rs
Normal file
62
src/pcc/pccdummy13/mod.rs
Normal file
@@ -0,0 +1,62 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PCCDUMMY13 {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 0 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
}
|
||||
62
src/pcc/pccdummy14/mod.rs
Normal file
62
src/pcc/pccdummy14/mod.rs
Normal file
@@ -0,0 +1,62 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PCCDUMMY14 {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 0 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
}
|
||||
62
src/pcc/pccdummy15/mod.rs
Normal file
62
src/pcc/pccdummy15/mod.rs
Normal file
@@ -0,0 +1,62 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PCCDUMMY15 {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 0 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
}
|
||||
62
src/pcc/pccdummy16/mod.rs
Normal file
62
src/pcc/pccdummy16/mod.rs
Normal file
@@ -0,0 +1,62 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PCCDUMMY16 {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 0 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
}
|
||||
62
src/pcc/pccdummy17/mod.rs
Normal file
62
src/pcc/pccdummy17/mod.rs
Normal file
@@ -0,0 +1,62 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PCCDUMMY17 {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 0 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
}
|
||||
62
src/pcc/pccdummy18/mod.rs
Normal file
62
src/pcc/pccdummy18/mod.rs
Normal file
@@ -0,0 +1,62 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PCCDUMMY18 {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 0 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
}
|
||||
62
src/pcc/pccdummy19/mod.rs
Normal file
62
src/pcc/pccdummy19/mod.rs
Normal file
@@ -0,0 +1,62 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PCCDUMMY19 {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 0 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
}
|
||||
62
src/pcc/pccdummy2/mod.rs
Normal file
62
src/pcc/pccdummy2/mod.rs
Normal file
@@ -0,0 +1,62 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PCCDUMMY2 {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 0 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
}
|
||||
62
src/pcc/pccdummy20/mod.rs
Normal file
62
src/pcc/pccdummy20/mod.rs
Normal file
@@ -0,0 +1,62 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PCCDUMMY20 {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 0 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
}
|
||||
62
src/pcc/pccdummy21/mod.rs
Normal file
62
src/pcc/pccdummy21/mod.rs
Normal file
@@ -0,0 +1,62 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PCCDUMMY21 {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 0 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
}
|
||||
62
src/pcc/pccdummy22/mod.rs
Normal file
62
src/pcc/pccdummy22/mod.rs
Normal file
@@ -0,0 +1,62 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PCCDUMMY22 {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 0 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
}
|
||||
62
src/pcc/pccdummy23/mod.rs
Normal file
62
src/pcc/pccdummy23/mod.rs
Normal file
@@ -0,0 +1,62 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PCCDUMMY23 {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 0 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
}
|
||||
62
src/pcc/pccdummy24/mod.rs
Normal file
62
src/pcc/pccdummy24/mod.rs
Normal file
@@ -0,0 +1,62 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PCCDUMMY24 {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 0 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
}
|
||||
62
src/pcc/pccdummy25/mod.rs
Normal file
62
src/pcc/pccdummy25/mod.rs
Normal file
@@ -0,0 +1,62 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PCCDUMMY25 {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 0 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
}
|
||||
62
src/pcc/pccdummy26/mod.rs
Normal file
62
src/pcc/pccdummy26/mod.rs
Normal file
@@ -0,0 +1,62 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PCCDUMMY26 {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 0 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
}
|
||||
62
src/pcc/pccdummy27/mod.rs
Normal file
62
src/pcc/pccdummy27/mod.rs
Normal file
@@ -0,0 +1,62 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PCCDUMMY27 {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 0 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
}
|
||||
62
src/pcc/pccdummy28/mod.rs
Normal file
62
src/pcc/pccdummy28/mod.rs
Normal file
@@ -0,0 +1,62 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PCCDUMMY28 {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 0 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
}
|
||||
62
src/pcc/pccdummy29/mod.rs
Normal file
62
src/pcc/pccdummy29/mod.rs
Normal file
@@ -0,0 +1,62 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PCCDUMMY29 {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 0 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
}
|
||||
62
src/pcc/pccdummy3/mod.rs
Normal file
62
src/pcc/pccdummy3/mod.rs
Normal file
@@ -0,0 +1,62 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PCCDUMMY3 {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 0 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
}
|
||||
62
src/pcc/pccdummy30/mod.rs
Normal file
62
src/pcc/pccdummy30/mod.rs
Normal file
@@ -0,0 +1,62 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PCCDUMMY30 {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 0 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
}
|
||||
62
src/pcc/pccdummy31/mod.rs
Normal file
62
src/pcc/pccdummy31/mod.rs
Normal file
@@ -0,0 +1,62 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PCCDUMMY31 {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 0 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
}
|
||||
62
src/pcc/pccdummy34/mod.rs
Normal file
62
src/pcc/pccdummy34/mod.rs
Normal file
@@ -0,0 +1,62 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PCCDUMMY34 {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 0 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
}
|
||||
62
src/pcc/pccdummy35/mod.rs
Normal file
62
src/pcc/pccdummy35/mod.rs
Normal file
@@ -0,0 +1,62 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PCCDUMMY35 {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 0 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
}
|
||||
62
src/pcc/pccdummy4/mod.rs
Normal file
62
src/pcc/pccdummy4/mod.rs
Normal file
@@ -0,0 +1,62 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PCCDUMMY4 {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 0 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
}
|
||||
62
src/pcc/pccdummy40/mod.rs
Normal file
62
src/pcc/pccdummy40/mod.rs
Normal file
@@ -0,0 +1,62 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PCCDUMMY40 {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 0 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
}
|
||||
62
src/pcc/pccdummy41/mod.rs
Normal file
62
src/pcc/pccdummy41/mod.rs
Normal file
@@ -0,0 +1,62 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PCCDUMMY41 {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 0 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
}
|
||||
62
src/pcc/pccdummy42/mod.rs
Normal file
62
src/pcc/pccdummy42/mod.rs
Normal file
@@ -0,0 +1,62 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PCCDUMMY42 {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 0 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
}
|
||||
62
src/pcc/pccdummy47/mod.rs
Normal file
62
src/pcc/pccdummy47/mod.rs
Normal file
@@ -0,0 +1,62 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PCCDUMMY47 {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 0 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
}
|
||||
62
src/pcc/pccdummy48/mod.rs
Normal file
62
src/pcc/pccdummy48/mod.rs
Normal file
@@ -0,0 +1,62 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PCCDUMMY48 {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 0 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
}
|
||||
62
src/pcc/pccdummy5/mod.rs
Normal file
62
src/pcc/pccdummy5/mod.rs
Normal file
@@ -0,0 +1,62 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PCCDUMMY5 {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 0 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
}
|
||||
62
src/pcc/pccdummy51/mod.rs
Normal file
62
src/pcc/pccdummy51/mod.rs
Normal file
@@ -0,0 +1,62 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PCCDUMMY51 {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 0 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
}
|
||||
62
src/pcc/pccdummy52/mod.rs
Normal file
62
src/pcc/pccdummy52/mod.rs
Normal file
@@ -0,0 +1,62 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PCCDUMMY52 {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 0 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
}
|
||||
62
src/pcc/pccdummy53/mod.rs
Normal file
62
src/pcc/pccdummy53/mod.rs
Normal file
@@ -0,0 +1,62 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PCCDUMMY53 {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 0 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
}
|
||||
62
src/pcc/pccdummy6/mod.rs
Normal file
62
src/pcc/pccdummy6/mod.rs
Normal file
@@ -0,0 +1,62 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PCCDUMMY6 {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 0 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
}
|
||||
62
src/pcc/pccdummy60/mod.rs
Normal file
62
src/pcc/pccdummy60/mod.rs
Normal file
@@ -0,0 +1,62 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PCCDUMMY60 {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 0 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
}
|
||||
62
src/pcc/pccdummy62/mod.rs
Normal file
62
src/pcc/pccdummy62/mod.rs
Normal file
@@ -0,0 +1,62 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PCCDUMMY62 {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 0 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
}
|
||||
62
src/pcc/pccdummy63/mod.rs
Normal file
62
src/pcc/pccdummy63/mod.rs
Normal file
@@ -0,0 +1,62 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PCCDUMMY63 {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 0 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
}
|
||||
62
src/pcc/pccdummy65/mod.rs
Normal file
62
src/pcc/pccdummy65/mod.rs
Normal file
@@ -0,0 +1,62 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PCCDUMMY65 {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 0 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
}
|
||||
62
src/pcc/pccdummy66/mod.rs
Normal file
62
src/pcc/pccdummy66/mod.rs
Normal file
@@ -0,0 +1,62 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PCCDUMMY66 {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 0 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
}
|
||||
62
src/pcc/pccdummy67/mod.rs
Normal file
62
src/pcc/pccdummy67/mod.rs
Normal file
@@ -0,0 +1,62 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PCCDUMMY67 {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 0 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
}
|
||||
62
src/pcc/pccdummy68/mod.rs
Normal file
62
src/pcc/pccdummy68/mod.rs
Normal file
@@ -0,0 +1,62 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PCCDUMMY68 {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 0 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
}
|
||||
62
src/pcc/pccdummy69/mod.rs
Normal file
62
src/pcc/pccdummy69/mod.rs
Normal file
@@ -0,0 +1,62 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PCCDUMMY69 {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 0 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
}
|
||||
62
src/pcc/pccdummy7/mod.rs
Normal file
62
src/pcc/pccdummy7/mod.rs
Normal file
@@ -0,0 +1,62 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PCCDUMMY7 {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 0 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
}
|
||||
62
src/pcc/pccdummy70/mod.rs
Normal file
62
src/pcc/pccdummy70/mod.rs
Normal file
@@ -0,0 +1,62 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PCCDUMMY70 {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 0 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
}
|
||||
62
src/pcc/pccdummy71/mod.rs
Normal file
62
src/pcc/pccdummy71/mod.rs
Normal file
@@ -0,0 +1,62 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PCCDUMMY71 {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 0 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
}
|
||||
62
src/pcc/pccdummy72/mod.rs
Normal file
62
src/pcc/pccdummy72/mod.rs
Normal file
@@ -0,0 +1,62 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PCCDUMMY72 {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 0 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
}
|
||||
62
src/pcc/pccdummy78/mod.rs
Normal file
62
src/pcc/pccdummy78/mod.rs
Normal file
@@ -0,0 +1,62 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PCCDUMMY78 {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 0 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
}
|
||||
62
src/pcc/pccdummy79/mod.rs
Normal file
62
src/pcc/pccdummy79/mod.rs
Normal file
@@ -0,0 +1,62 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PCCDUMMY79 {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 0 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
}
|
||||
62
src/pcc/pccdummy8/mod.rs
Normal file
62
src/pcc/pccdummy8/mod.rs
Normal file
@@ -0,0 +1,62 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PCCDUMMY8 {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 0 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
}
|
||||
62
src/pcc/pccdummy80/mod.rs
Normal file
62
src/pcc/pccdummy80/mod.rs
Normal file
@@ -0,0 +1,62 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PCCDUMMY80 {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 0 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
}
|
||||
62
src/pcc/pccdummy81/mod.rs
Normal file
62
src/pcc/pccdummy81/mod.rs
Normal file
@@ -0,0 +1,62 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PCCDUMMY81 {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R { bits: self.register.get() }
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 0 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
}
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user