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Same as last commit just run through the form tool (splits up large lib.rs files)

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This commit is contained in:
Kjetil Kjeka
2017-09-23 20:09:53 +02:00
parent 63efe927e5
commit 7facea48b2
1680 changed files with 666069 additions and 667757 deletions
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226
src/lpspi2/ccr/mod.rs Normal file
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#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
#[doc = r" Value to write to the register"]
pub struct W {
bits: u32,
}
impl super::CCR {
#[doc = r" Modifies the contents of the register"]
#[inline]
pub fn modify<F>(&self, f: F)
where
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
{
let bits = self.register.get();
let r = R { bits: bits };
let mut w = W { bits: bits };
f(&r, &mut w);
self.register.set(w.bits);
}
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R { bits: self.register.get() }
}
#[doc = r" Writes to the register"]
#[inline]
pub fn write<F>(&self, f: F)
where
F: FnOnce(&mut W) -> &mut W,
{
let mut w = W::reset_value();
f(&mut w);
self.register.set(w.bits);
}
#[doc = r" Writes the reset value to the register"]
#[inline]
pub fn reset(&self) {
self.write(|w| w)
}
}
#[doc = r" Value of the field"]
pub struct SCKDIVR {
bits: u8,
}
impl SCKDIVR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct DBTR {
bits: u8,
}
impl DBTR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct PCSSCKR {
bits: u8,
}
impl PCSSCKR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct SCKPCSR {
bits: u8,
}
impl SCKPCSR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Proxy"]
pub struct _SCKDIVW<'a> {
w: &'a mut W,
}
impl<'a> _SCKDIVW<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 255;
const OFFSET: u8 = 0;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = r" Proxy"]
pub struct _DBTW<'a> {
w: &'a mut W,
}
impl<'a> _DBTW<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 255;
const OFFSET: u8 = 8;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = r" Proxy"]
pub struct _PCSSCKW<'a> {
w: &'a mut W,
}
impl<'a> _PCSSCKW<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 255;
const OFFSET: u8 = 16;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = r" Proxy"]
pub struct _SCKPCSW<'a> {
w: &'a mut W,
}
impl<'a> _SCKPCSW<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 255;
const OFFSET: u8 = 24;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 0:7 - SCK Divider"]
#[inline]
pub fn sckdiv(&self) -> SCKDIVR {
let bits = {
const MASK: u8 = 255;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) as u8
};
SCKDIVR { bits }
}
#[doc = "Bits 8:15 - Delay Between Transfers"]
#[inline]
pub fn dbt(&self) -> DBTR {
let bits = {
const MASK: u8 = 255;
const OFFSET: u8 = 8;
((self.bits >> OFFSET) & MASK as u32) as u8
};
DBTR { bits }
}
#[doc = "Bits 16:23 - PCS to SCK Delay"]
#[inline]
pub fn pcssck(&self) -> PCSSCKR {
let bits = {
const MASK: u8 = 255;
const OFFSET: u8 = 16;
((self.bits >> OFFSET) & MASK as u32) as u8
};
PCSSCKR { bits }
}
#[doc = "Bits 24:31 - SCK to PCS Delay"]
#[inline]
pub fn sckpcs(&self) -> SCKPCSR {
let bits = {
const MASK: u8 = 255;
const OFFSET: u8 = 24;
((self.bits >> OFFSET) & MASK as u32) as u8
};
SCKPCSR { bits }
}
}
impl W {
#[doc = r" Reset value of the register"]
#[inline]
pub fn reset_value() -> W {
W { bits: 0 }
}
#[doc = r" Writes raw bits to the register"]
#[inline]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.bits = bits;
self
}
#[doc = "Bits 0:7 - SCK Divider"]
#[inline]
pub fn sckdiv(&mut self) -> _SCKDIVW {
_SCKDIVW { w: self }
}
#[doc = "Bits 8:15 - Delay Between Transfers"]
#[inline]
pub fn dbt(&mut self) -> _DBTW {
_DBTW { w: self }
}
#[doc = "Bits 16:23 - PCS to SCK Delay"]
#[inline]
pub fn pcssck(&mut self) -> _PCSSCKW {
_PCSSCKW { w: self }
}
#[doc = "Bits 24:31 - SCK to PCS Delay"]
#[inline]
pub fn sckpcs(&mut self) -> _SCKPCSW {
_SCKPCSW { w: self }
}
}

657
src/lpspi2/cfgr0/mod.rs Normal file
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#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
#[doc = r" Value to write to the register"]
pub struct W {
bits: u32,
}
impl super::CFGR0 {
#[doc = r" Modifies the contents of the register"]
#[inline]
pub fn modify<F>(&self, f: F)
where
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
{
let bits = self.register.get();
let r = R { bits: bits };
let mut w = W { bits: bits };
f(&r, &mut w);
self.register.set(w.bits);
}
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R { bits: self.register.get() }
}
#[doc = r" Writes to the register"]
#[inline]
pub fn write<F>(&self, f: F)
where
F: FnOnce(&mut W) -> &mut W,
{
let mut w = W::reset_value();
f(&mut w);
self.register.set(w.bits);
}
#[doc = r" Writes the reset value to the register"]
#[inline]
pub fn reset(&self) {
self.write(|w| w)
}
}
#[doc = "Possible values of the field `HREN`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum HRENR {
#[doc = "Host request is disabled."]
_0,
#[doc = "Host request is enabled."]
_1,
}
impl HRENR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
HRENR::_0 => false,
HRENR::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> HRENR {
match value {
false => HRENR::_0,
true => HRENR::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == HRENR::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == HRENR::_1
}
}
#[doc = "Possible values of the field `HRPOL`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum HRPOLR {
#[doc = "Active low."]
_0,
#[doc = "Active high."]
_1,
}
impl HRPOLR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
HRPOLR::_0 => false,
HRPOLR::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> HRPOLR {
match value {
false => HRPOLR::_0,
true => HRPOLR::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == HRPOLR::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == HRPOLR::_1
}
}
#[doc = "Possible values of the field `HRSEL`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum HRSELR {
#[doc = "Host request input is pin LPSPI_HREQ."]
_0,
#[doc = "Host request input is input trigger."]
_1,
}
impl HRSELR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
HRSELR::_0 => false,
HRSELR::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> HRSELR {
match value {
false => HRSELR::_0,
true => HRSELR::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == HRSELR::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == HRSELR::_1
}
}
#[doc = "Possible values of the field `CIRFIFO`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum CIRFIFOR {
#[doc = "Circular FIFO is disabled."]
_0,
#[doc = "Circular FIFO is enabled."]
_1,
}
impl CIRFIFOR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
CIRFIFOR::_0 => false,
CIRFIFOR::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> CIRFIFOR {
match value {
false => CIRFIFOR::_0,
true => CIRFIFOR::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == CIRFIFOR::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == CIRFIFOR::_1
}
}
#[doc = "Possible values of the field `RDMO`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum RDMOR {
#[doc = "Received data is stored in the receive FIFO as normal."]
_0,
#[doc = "Received data is discarded unless the DMF is set."]
_1,
}
impl RDMOR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
RDMOR::_0 => false,
RDMOR::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> RDMOR {
match value {
false => RDMOR::_0,
true => RDMOR::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == RDMOR::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == RDMOR::_1
}
}
#[doc = "Values that can be written to the field `HREN`"]
pub enum HRENW {
#[doc = "Host request is disabled."]
_0,
#[doc = "Host request is enabled."]
_1,
}
impl HRENW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
HRENW::_0 => false,
HRENW::_1 => true,
}
}
}
#[doc = r" Proxy"]
pub struct _HRENW<'a> {
w: &'a mut W,
}
impl<'a> _HRENW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: HRENW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Host request is disabled."]
#[inline]
pub fn _0(self) -> &'a mut W {
self.variant(HRENW::_0)
}
#[doc = "Host request is enabled."]
#[inline]
pub fn _1(self) -> &'a mut W {
self.variant(HRENW::_1)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 0;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `HRPOL`"]
pub enum HRPOLW {
#[doc = "Active low."]
_0,
#[doc = "Active high."]
_1,
}
impl HRPOLW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
HRPOLW::_0 => false,
HRPOLW::_1 => true,
}
}
}
#[doc = r" Proxy"]
pub struct _HRPOLW<'a> {
w: &'a mut W,
}
impl<'a> _HRPOLW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: HRPOLW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Active low."]
#[inline]
pub fn _0(self) -> &'a mut W {
self.variant(HRPOLW::_0)
}
#[doc = "Active high."]
#[inline]
pub fn _1(self) -> &'a mut W {
self.variant(HRPOLW::_1)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 1;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `HRSEL`"]
pub enum HRSELW {
#[doc = "Host request input is pin LPSPI_HREQ."]
_0,
#[doc = "Host request input is input trigger."]
_1,
}
impl HRSELW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
HRSELW::_0 => false,
HRSELW::_1 => true,
}
}
}
#[doc = r" Proxy"]
pub struct _HRSELW<'a> {
w: &'a mut W,
}
impl<'a> _HRSELW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: HRSELW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Host request input is pin LPSPI_HREQ."]
#[inline]
pub fn _0(self) -> &'a mut W {
self.variant(HRSELW::_0)
}
#[doc = "Host request input is input trigger."]
#[inline]
pub fn _1(self) -> &'a mut W {
self.variant(HRSELW::_1)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 2;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `CIRFIFO`"]
pub enum CIRFIFOW {
#[doc = "Circular FIFO is disabled."]
_0,
#[doc = "Circular FIFO is enabled."]
_1,
}
impl CIRFIFOW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
CIRFIFOW::_0 => false,
CIRFIFOW::_1 => true,
}
}
}
#[doc = r" Proxy"]
pub struct _CIRFIFOW<'a> {
w: &'a mut W,
}
impl<'a> _CIRFIFOW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: CIRFIFOW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Circular FIFO is disabled."]
#[inline]
pub fn _0(self) -> &'a mut W {
self.variant(CIRFIFOW::_0)
}
#[doc = "Circular FIFO is enabled."]
#[inline]
pub fn _1(self) -> &'a mut W {
self.variant(CIRFIFOW::_1)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 8;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `RDMO`"]
pub enum RDMOW {
#[doc = "Received data is stored in the receive FIFO as normal."]
_0,
#[doc = "Received data is discarded unless the DMF is set."]
_1,
}
impl RDMOW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
RDMOW::_0 => false,
RDMOW::_1 => true,
}
}
}
#[doc = r" Proxy"]
pub struct _RDMOW<'a> {
w: &'a mut W,
}
impl<'a> _RDMOW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: RDMOW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Received data is stored in the receive FIFO as normal."]
#[inline]
pub fn _0(self) -> &'a mut W {
self.variant(RDMOW::_0)
}
#[doc = "Received data is discarded unless the DMF is set."]
#[inline]
pub fn _1(self) -> &'a mut W {
self.variant(RDMOW::_1)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 9;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bit 0 - Host Request Enable"]
#[inline]
pub fn hren(&self) -> HRENR {
HRENR::_from({
const MASK: bool = true;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 1 - Host Request Polarity"]
#[inline]
pub fn hrpol(&self) -> HRPOLR {
HRPOLR::_from({
const MASK: bool = true;
const OFFSET: u8 = 1;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 2 - Host Request Select"]
#[inline]
pub fn hrsel(&self) -> HRSELR {
HRSELR::_from({
const MASK: bool = true;
const OFFSET: u8 = 2;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 8 - Circular FIFO Enable"]
#[inline]
pub fn cirfifo(&self) -> CIRFIFOR {
CIRFIFOR::_from({
const MASK: bool = true;
const OFFSET: u8 = 8;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 9 - Receive Data Match Only"]
#[inline]
pub fn rdmo(&self) -> RDMOR {
RDMOR::_from({
const MASK: bool = true;
const OFFSET: u8 = 9;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
}
impl W {
#[doc = r" Reset value of the register"]
#[inline]
pub fn reset_value() -> W {
W { bits: 0 }
}
#[doc = r" Writes raw bits to the register"]
#[inline]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.bits = bits;
self
}
#[doc = "Bit 0 - Host Request Enable"]
#[inline]
pub fn hren(&mut self) -> _HRENW {
_HRENW { w: self }
}
#[doc = "Bit 1 - Host Request Polarity"]
#[inline]
pub fn hrpol(&mut self) -> _HRPOLW {
_HRPOLW { w: self }
}
#[doc = "Bit 2 - Host Request Select"]
#[inline]
pub fn hrsel(&mut self) -> _HRSELW {
_HRSELW { w: self }
}
#[doc = "Bit 8 - Circular FIFO Enable"]
#[inline]
pub fn cirfifo(&mut self) -> _CIRFIFOW {
_CIRFIFOW { w: self }
}
#[doc = "Bit 9 - Receive Data Match Only"]
#[inline]
pub fn rdmo(&mut self) -> _RDMOW {
_RDMOW { w: self }
}
}

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src/lpspi2/cfgr1/mod.rs Normal file
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src/lpspi2/cr/mod.rs Normal file
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#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
#[doc = r" Value to write to the register"]
pub struct W {
bits: u32,
}
impl super::CR {
#[doc = r" Modifies the contents of the register"]
#[inline]
pub fn modify<F>(&self, f: F)
where
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
{
let bits = self.register.get();
let r = R { bits: bits };
let mut w = W { bits: bits };
f(&r, &mut w);
self.register.set(w.bits);
}
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R { bits: self.register.get() }
}
#[doc = r" Writes to the register"]
#[inline]
pub fn write<F>(&self, f: F)
where
F: FnOnce(&mut W) -> &mut W,
{
let mut w = W::reset_value();
f(&mut w);
self.register.set(w.bits);
}
#[doc = r" Writes the reset value to the register"]
#[inline]
pub fn reset(&self) {
self.write(|w| w)
}
}
#[doc = "Possible values of the field `MEN`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum MENR {
#[doc = "Module is disabled."]
_0,
#[doc = "Module is enabled."]
_1,
}
impl MENR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
MENR::_0 => false,
MENR::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> MENR {
match value {
false => MENR::_0,
true => MENR::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == MENR::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == MENR::_1
}
}
#[doc = "Possible values of the field `RST`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum RSTR {
#[doc = "Master logic is not reset."]
_0,
#[doc = "Master logic is reset."]
_1,
}
impl RSTR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
RSTR::_0 => false,
RSTR::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> RSTR {
match value {
false => RSTR::_0,
true => RSTR::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == RSTR::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == RSTR::_1
}
}
#[doc = "Possible values of the field `DOZEN`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum DOZENR {
#[doc = "Module is enabled in Doze mode."]
_0,
#[doc = "Module is disabled in Doze mode."]
_1,
}
impl DOZENR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
DOZENR::_0 => false,
DOZENR::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> DOZENR {
match value {
false => DOZENR::_0,
true => DOZENR::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == DOZENR::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == DOZENR::_1
}
}
#[doc = "Possible values of the field `DBGEN`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum DBGENR {
#[doc = "Module is disabled in debug mode."]
_0,
#[doc = "Module is enabled in debug mode."]
_1,
}
impl DBGENR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
DBGENR::_0 => false,
DBGENR::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> DBGENR {
match value {
false => DBGENR::_0,
true => DBGENR::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == DBGENR::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == DBGENR::_1
}
}
#[doc = "Values that can be written to the field `MEN`"]
pub enum MENW {
#[doc = "Module is disabled."]
_0,
#[doc = "Module is enabled."]
_1,
}
impl MENW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
MENW::_0 => false,
MENW::_1 => true,
}
}
}
#[doc = r" Proxy"]
pub struct _MENW<'a> {
w: &'a mut W,
}
impl<'a> _MENW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: MENW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Module is disabled."]
#[inline]
pub fn _0(self) -> &'a mut W {
self.variant(MENW::_0)
}
#[doc = "Module is enabled."]
#[inline]
pub fn _1(self) -> &'a mut W {
self.variant(MENW::_1)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 0;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `RST`"]
pub enum RSTW {
#[doc = "Master logic is not reset."]
_0,
#[doc = "Master logic is reset."]
_1,
}
impl RSTW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
RSTW::_0 => false,
RSTW::_1 => true,
}
}
}
#[doc = r" Proxy"]
pub struct _RSTW<'a> {
w: &'a mut W,
}
impl<'a> _RSTW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: RSTW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Master logic is not reset."]
#[inline]
pub fn _0(self) -> &'a mut W {
self.variant(RSTW::_0)
}
#[doc = "Master logic is reset."]
#[inline]
pub fn _1(self) -> &'a mut W {
self.variant(RSTW::_1)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 1;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `DOZEN`"]
pub enum DOZENW {
#[doc = "Module is enabled in Doze mode."]
_0,
#[doc = "Module is disabled in Doze mode."]
_1,
}
impl DOZENW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
DOZENW::_0 => false,
DOZENW::_1 => true,
}
}
}
#[doc = r" Proxy"]
pub struct _DOZENW<'a> {
w: &'a mut W,
}
impl<'a> _DOZENW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: DOZENW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Module is enabled in Doze mode."]
#[inline]
pub fn _0(self) -> &'a mut W {
self.variant(DOZENW::_0)
}
#[doc = "Module is disabled in Doze mode."]
#[inline]
pub fn _1(self) -> &'a mut W {
self.variant(DOZENW::_1)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 2;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `DBGEN`"]
pub enum DBGENW {
#[doc = "Module is disabled in debug mode."]
_0,
#[doc = "Module is enabled in debug mode."]
_1,
}
impl DBGENW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
DBGENW::_0 => false,
DBGENW::_1 => true,
}
}
}
#[doc = r" Proxy"]
pub struct _DBGENW<'a> {
w: &'a mut W,
}
impl<'a> _DBGENW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: DBGENW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Module is disabled in debug mode."]
#[inline]
pub fn _0(self) -> &'a mut W {
self.variant(DBGENW::_0)
}
#[doc = "Module is enabled in debug mode."]
#[inline]
pub fn _1(self) -> &'a mut W {
self.variant(DBGENW::_1)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 3;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `RTF`"]
pub enum RTFW {
#[doc = "No effect."]
_0,
#[doc = "Transmit FIFO is reset."]
_1,
}
impl RTFW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
RTFW::_0 => false,
RTFW::_1 => true,
}
}
}
#[doc = r" Proxy"]
pub struct _RTFW<'a> {
w: &'a mut W,
}
impl<'a> _RTFW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: RTFW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "No effect."]
#[inline]
pub fn _0(self) -> &'a mut W {
self.variant(RTFW::_0)
}
#[doc = "Transmit FIFO is reset."]
#[inline]
pub fn _1(self) -> &'a mut W {
self.variant(RTFW::_1)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 8;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `RRF`"]
pub enum RRFW {
#[doc = "No effect."]
_0,
#[doc = "Receive FIFO is reset."]
_1,
}
impl RRFW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
RRFW::_0 => false,
RRFW::_1 => true,
}
}
}
#[doc = r" Proxy"]
pub struct _RRFW<'a> {
w: &'a mut W,
}
impl<'a> _RRFW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: RRFW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "No effect."]
#[inline]
pub fn _0(self) -> &'a mut W {
self.variant(RRFW::_0)
}
#[doc = "Receive FIFO is reset."]
#[inline]
pub fn _1(self) -> &'a mut W {
self.variant(RRFW::_1)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 9;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bit 0 - Module Enable"]
#[inline]
pub fn men(&self) -> MENR {
MENR::_from({
const MASK: bool = true;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 1 - Software Reset"]
#[inline]
pub fn rst(&self) -> RSTR {
RSTR::_from({
const MASK: bool = true;
const OFFSET: u8 = 1;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 2 - Doze mode enable"]
#[inline]
pub fn dozen(&self) -> DOZENR {
DOZENR::_from({
const MASK: bool = true;
const OFFSET: u8 = 2;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 3 - Debug Enable"]
#[inline]
pub fn dbgen(&self) -> DBGENR {
DBGENR::_from({
const MASK: bool = true;
const OFFSET: u8 = 3;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
}
impl W {
#[doc = r" Reset value of the register"]
#[inline]
pub fn reset_value() -> W {
W { bits: 0 }
}
#[doc = r" Writes raw bits to the register"]
#[inline]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.bits = bits;
self
}
#[doc = "Bit 0 - Module Enable"]
#[inline]
pub fn men(&mut self) -> _MENW {
_MENW { w: self }
}
#[doc = "Bit 1 - Software Reset"]
#[inline]
pub fn rst(&mut self) -> _RSTW {
_RSTW { w: self }
}
#[doc = "Bit 2 - Doze mode enable"]
#[inline]
pub fn dozen(&mut self) -> _DOZENW {
_DOZENW { w: self }
}
#[doc = "Bit 3 - Debug Enable"]
#[inline]
pub fn dbgen(&mut self) -> _DBGENW {
_DBGENW { w: self }
}
#[doc = "Bit 8 - Reset Transmit FIFO"]
#[inline]
pub fn rtf(&mut self) -> _RTFW {
_RTFW { w: self }
}
#[doc = "Bit 9 - Reset Receive FIFO"]
#[inline]
pub fn rrf(&mut self) -> _RRFW {
_RRFW { w: self }
}
}

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src/lpspi2/der/mod.rs Normal file
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#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
#[doc = r" Value to write to the register"]
pub struct W {
bits: u32,
}
impl super::DER {
#[doc = r" Modifies the contents of the register"]
#[inline]
pub fn modify<F>(&self, f: F)
where
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
{
let bits = self.register.get();
let r = R { bits: bits };
let mut w = W { bits: bits };
f(&r, &mut w);
self.register.set(w.bits);
}
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R { bits: self.register.get() }
}
#[doc = r" Writes to the register"]
#[inline]
pub fn write<F>(&self, f: F)
where
F: FnOnce(&mut W) -> &mut W,
{
let mut w = W::reset_value();
f(&mut w);
self.register.set(w.bits);
}
#[doc = r" Writes the reset value to the register"]
#[inline]
pub fn reset(&self) {
self.write(|w| w)
}
}
#[doc = "Possible values of the field `TDDE`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum TDDER {
#[doc = "DMA request disabled."]
_0,
#[doc = "DMA request enabled"]
_1,
}
impl TDDER {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
TDDER::_0 => false,
TDDER::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> TDDER {
match value {
false => TDDER::_0,
true => TDDER::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == TDDER::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == TDDER::_1
}
}
#[doc = "Possible values of the field `RDDE`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum RDDER {
#[doc = "DMA request disabled."]
_0,
#[doc = "DMA request enabled."]
_1,
}
impl RDDER {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
RDDER::_0 => false,
RDDER::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> RDDER {
match value {
false => RDDER::_0,
true => RDDER::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == RDDER::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == RDDER::_1
}
}
#[doc = "Values that can be written to the field `TDDE`"]
pub enum TDDEW {
#[doc = "DMA request disabled."]
_0,
#[doc = "DMA request enabled"]
_1,
}
impl TDDEW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
TDDEW::_0 => false,
TDDEW::_1 => true,
}
}
}
#[doc = r" Proxy"]
pub struct _TDDEW<'a> {
w: &'a mut W,
}
impl<'a> _TDDEW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: TDDEW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "DMA request disabled."]
#[inline]
pub fn _0(self) -> &'a mut W {
self.variant(TDDEW::_0)
}
#[doc = "DMA request enabled"]
#[inline]
pub fn _1(self) -> &'a mut W {
self.variant(TDDEW::_1)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 0;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `RDDE`"]
pub enum RDDEW {
#[doc = "DMA request disabled."]
_0,
#[doc = "DMA request enabled."]
_1,
}
impl RDDEW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
RDDEW::_0 => false,
RDDEW::_1 => true,
}
}
}
#[doc = r" Proxy"]
pub struct _RDDEW<'a> {
w: &'a mut W,
}
impl<'a> _RDDEW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: RDDEW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "DMA request disabled."]
#[inline]
pub fn _0(self) -> &'a mut W {
self.variant(RDDEW::_0)
}
#[doc = "DMA request enabled."]
#[inline]
pub fn _1(self) -> &'a mut W {
self.variant(RDDEW::_1)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 1;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bit 0 - Transmit Data DMA Enable"]
#[inline]
pub fn tdde(&self) -> TDDER {
TDDER::_from({
const MASK: bool = true;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 1 - Receive Data DMA Enable"]
#[inline]
pub fn rdde(&self) -> RDDER {
RDDER::_from({
const MASK: bool = true;
const OFFSET: u8 = 1;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
}
impl W {
#[doc = r" Reset value of the register"]
#[inline]
pub fn reset_value() -> W {
W { bits: 0 }
}
#[doc = r" Writes raw bits to the register"]
#[inline]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.bits = bits;
self
}
#[doc = "Bit 0 - Transmit Data DMA Enable"]
#[inline]
pub fn tdde(&mut self) -> _TDDEW {
_TDDEW { w: self }
}
#[doc = "Bit 1 - Receive Data DMA Enable"]
#[inline]
pub fn rdde(&mut self) -> _RDDEW {
_RDDEW { w: self }
}
}

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#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
#[doc = r" Value to write to the register"]
pub struct W {
bits: u32,
}
impl super::DMR0 {
#[doc = r" Modifies the contents of the register"]
#[inline]
pub fn modify<F>(&self, f: F)
where
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
{
let bits = self.register.get();
let r = R { bits: bits };
let mut w = W { bits: bits };
f(&r, &mut w);
self.register.set(w.bits);
}
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R { bits: self.register.get() }
}
#[doc = r" Writes to the register"]
#[inline]
pub fn write<F>(&self, f: F)
where
F: FnOnce(&mut W) -> &mut W,
{
let mut w = W::reset_value();
f(&mut w);
self.register.set(w.bits);
}
#[doc = r" Writes the reset value to the register"]
#[inline]
pub fn reset(&self) {
self.write(|w| w)
}
}
#[doc = r" Value of the field"]
pub struct MATCH0R {
bits: u32,
}
impl MATCH0R {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
}
#[doc = r" Proxy"]
pub struct _MATCH0W<'a> {
w: &'a mut W,
}
impl<'a> _MATCH0W<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u32) -> &'a mut W {
const MASK: u32 = 4294967295;
const OFFSET: u8 = 0;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 0:31 - Match 0 Value"]
#[inline]
pub fn match0(&self) -> MATCH0R {
let bits = {
const MASK: u32 = 4294967295;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) as u32
};
MATCH0R { bits }
}
}
impl W {
#[doc = r" Reset value of the register"]
#[inline]
pub fn reset_value() -> W {
W { bits: 0 }
}
#[doc = r" Writes raw bits to the register"]
#[inline]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.bits = bits;
self
}
#[doc = "Bits 0:31 - Match 0 Value"]
#[inline]
pub fn match0(&mut self) -> _MATCH0W {
_MATCH0W { w: self }
}
}

103
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#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
#[doc = r" Value to write to the register"]
pub struct W {
bits: u32,
}
impl super::DMR1 {
#[doc = r" Modifies the contents of the register"]
#[inline]
pub fn modify<F>(&self, f: F)
where
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
{
let bits = self.register.get();
let r = R { bits: bits };
let mut w = W { bits: bits };
f(&r, &mut w);
self.register.set(w.bits);
}
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R { bits: self.register.get() }
}
#[doc = r" Writes to the register"]
#[inline]
pub fn write<F>(&self, f: F)
where
F: FnOnce(&mut W) -> &mut W,
{
let mut w = W::reset_value();
f(&mut w);
self.register.set(w.bits);
}
#[doc = r" Writes the reset value to the register"]
#[inline]
pub fn reset(&self) {
self.write(|w| w)
}
}
#[doc = r" Value of the field"]
pub struct MATCH1R {
bits: u32,
}
impl MATCH1R {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
}
#[doc = r" Proxy"]
pub struct _MATCH1W<'a> {
w: &'a mut W,
}
impl<'a> _MATCH1W<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u32) -> &'a mut W {
const MASK: u32 = 4294967295;
const OFFSET: u8 = 0;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 0:31 - Match 1 Value"]
#[inline]
pub fn match1(&self) -> MATCH1R {
let bits = {
const MASK: u32 = 4294967295;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) as u32
};
MATCH1R { bits }
}
}
impl W {
#[doc = r" Reset value of the register"]
#[inline]
pub fn reset_value() -> W {
W { bits: 0 }
}
#[doc = r" Writes raw bits to the register"]
#[inline]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.bits = bits;
self
}
#[doc = "Bits 0:31 - Match 1 Value"]
#[inline]
pub fn match1(&mut self) -> _MATCH1W {
_MATCH1W { w: self }
}
}

144
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#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
#[doc = r" Value to write to the register"]
pub struct W {
bits: u32,
}
impl super::FCR {
#[doc = r" Modifies the contents of the register"]
#[inline]
pub fn modify<F>(&self, f: F)
where
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
{
let bits = self.register.get();
let r = R { bits: bits };
let mut w = W { bits: bits };
f(&r, &mut w);
self.register.set(w.bits);
}
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R { bits: self.register.get() }
}
#[doc = r" Writes to the register"]
#[inline]
pub fn write<F>(&self, f: F)
where
F: FnOnce(&mut W) -> &mut W,
{
let mut w = W::reset_value();
f(&mut w);
self.register.set(w.bits);
}
#[doc = r" Writes the reset value to the register"]
#[inline]
pub fn reset(&self) {
self.write(|w| w)
}
}
#[doc = r" Value of the field"]
pub struct TXWATERR {
bits: u8,
}
impl TXWATERR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct RXWATERR {
bits: u8,
}
impl RXWATERR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Proxy"]
pub struct _TXWATERW<'a> {
w: &'a mut W,
}
impl<'a> _TXWATERW<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 3;
const OFFSET: u8 = 0;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = r" Proxy"]
pub struct _RXWATERW<'a> {
w: &'a mut W,
}
impl<'a> _RXWATERW<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
const MASK: u8 = 3;
const OFFSET: u8 = 16;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 0:1 - Transmit FIFO Watermark"]
#[inline]
pub fn txwater(&self) -> TXWATERR {
let bits = {
const MASK: u8 = 3;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) as u8
};
TXWATERR { bits }
}
#[doc = "Bits 16:17 - Receive FIFO Watermark"]
#[inline]
pub fn rxwater(&self) -> RXWATERR {
let bits = {
const MASK: u8 = 3;
const OFFSET: u8 = 16;
((self.bits >> OFFSET) & MASK as u32) as u8
};
RXWATERR { bits }
}
}
impl W {
#[doc = r" Reset value of the register"]
#[inline]
pub fn reset_value() -> W {
W { bits: 0 }
}
#[doc = r" Writes raw bits to the register"]
#[inline]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.bits = bits;
self
}
#[doc = "Bits 0:1 - Transmit FIFO Watermark"]
#[inline]
pub fn txwater(&mut self) -> _TXWATERW {
_TXWATERW { w: self }
}
#[doc = "Bits 16:17 - Receive FIFO Watermark"]
#[inline]
pub fn rxwater(&mut self) -> _RXWATERW {
_RXWATERW { w: self }
}
}

60
src/lpspi2/fsr/mod.rs Normal file
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#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
impl super::FSR {
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R { bits: self.register.get() }
}
}
#[doc = r" Value of the field"]
pub struct TXCOUNTR {
bits: u8,
}
impl TXCOUNTR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct RXCOUNTR {
bits: u8,
}
impl RXCOUNTR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 0:2 - Transmit FIFO Count"]
#[inline]
pub fn txcount(&self) -> TXCOUNTR {
let bits = {
const MASK: u8 = 7;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) as u8
};
TXCOUNTR { bits }
}
#[doc = "Bits 16:18 - Receive FIFO Count"]
#[inline]
pub fn rxcount(&self) -> RXCOUNTR {
let bits = {
const MASK: u8 = 7;
const OFFSET: u8 = 16;
((self.bits >> OFFSET) & MASK as u32) as u8
};
RXCOUNTR { bits }
}
}

1014
src/lpspi2/ier/mod.rs Normal file
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146
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use vcell::VolatileCell;
#[doc = r" Register block"]
#[repr(C)]
pub struct RegisterBlock {
#[doc = "0x00 - Version ID Register"]
pub verid: VERID,
#[doc = "0x04 - Parameter Register"]
pub param: PARAM,
_reserved0: [u8; 8usize],
#[doc = "0x10 - Control Register"]
pub cr: CR,
#[doc = "0x14 - Status Register"]
pub sr: SR,
#[doc = "0x18 - Interrupt Enable Register"]
pub ier: IER,
#[doc = "0x1c - DMA Enable Register"]
pub der: DER,
#[doc = "0x20 - Configuration Register 0"]
pub cfgr0: CFGR0,
#[doc = "0x24 - Configuration Register 1"]
pub cfgr1: CFGR1,
_reserved1: [u8; 8usize],
#[doc = "0x30 - Data Match Register 0"]
pub dmr0: DMR0,
#[doc = "0x34 - Data Match Register 1"]
pub dmr1: DMR1,
_reserved2: [u8; 8usize],
#[doc = "0x40 - Clock Configuration Register"]
pub ccr: CCR,
_reserved3: [u8; 20usize],
#[doc = "0x58 - FIFO Control Register"]
pub fcr: FCR,
#[doc = "0x5c - FIFO Status Register"]
pub fsr: FSR,
#[doc = "0x60 - Transmit Command Register"]
pub tcr: TCR,
#[doc = "0x64 - Transmit Data Register"]
pub tdr: TDR,
_reserved4: [u8; 8usize],
#[doc = "0x70 - Receive Status Register"]
pub rsr: RSR,
#[doc = "0x74 - Receive Data Register"]
pub rdr: RDR,
}
#[doc = "Version ID Register"]
pub struct VERID {
register: VolatileCell<u32>,
}
#[doc = "Version ID Register"]
pub mod verid;
#[doc = "Parameter Register"]
pub struct PARAM {
register: VolatileCell<u32>,
}
#[doc = "Parameter Register"]
pub mod param;
#[doc = "Control Register"]
pub struct CR {
register: VolatileCell<u32>,
}
#[doc = "Control Register"]
pub mod cr;
#[doc = "Status Register"]
pub struct SR {
register: VolatileCell<u32>,
}
#[doc = "Status Register"]
pub mod sr;
#[doc = "Interrupt Enable Register"]
pub struct IER {
register: VolatileCell<u32>,
}
#[doc = "Interrupt Enable Register"]
pub mod ier;
#[doc = "DMA Enable Register"]
pub struct DER {
register: VolatileCell<u32>,
}
#[doc = "DMA Enable Register"]
pub mod der;
#[doc = "Configuration Register 0"]
pub struct CFGR0 {
register: VolatileCell<u32>,
}
#[doc = "Configuration Register 0"]
pub mod cfgr0;
#[doc = "Configuration Register 1"]
pub struct CFGR1 {
register: VolatileCell<u32>,
}
#[doc = "Configuration Register 1"]
pub mod cfgr1;
#[doc = "Data Match Register 0"]
pub struct DMR0 {
register: VolatileCell<u32>,
}
#[doc = "Data Match Register 0"]
pub mod dmr0;
#[doc = "Data Match Register 1"]
pub struct DMR1 {
register: VolatileCell<u32>,
}
#[doc = "Data Match Register 1"]
pub mod dmr1;
#[doc = "Clock Configuration Register"]
pub struct CCR {
register: VolatileCell<u32>,
}
#[doc = "Clock Configuration Register"]
pub mod ccr;
#[doc = "FIFO Control Register"]
pub struct FCR {
register: VolatileCell<u32>,
}
#[doc = "FIFO Control Register"]
pub mod fcr;
#[doc = "FIFO Status Register"]
pub struct FSR {
register: VolatileCell<u32>,
}
#[doc = "FIFO Status Register"]
pub mod fsr;
#[doc = "Transmit Command Register"]
pub struct TCR {
register: VolatileCell<u32>,
}
#[doc = "Transmit Command Register"]
pub mod tcr;
#[doc = "Transmit Data Register"]
pub struct TDR {
register: VolatileCell<u32>,
}
#[doc = "Transmit Data Register"]
pub mod tdr;
#[doc = "Receive Status Register"]
pub struct RSR {
register: VolatileCell<u32>,
}
#[doc = "Receive Status Register"]
pub mod rsr;
#[doc = "Receive Data Register"]
pub struct RDR {
register: VolatileCell<u32>,
}
#[doc = "Receive Data Register"]
pub mod rdr;

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src/lpspi2/param/mod.rs Normal file
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#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
impl super::PARAM {
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R { bits: self.register.get() }
}
}
#[doc = r" Value of the field"]
pub struct TXFIFOR {
bits: u8,
}
impl TXFIFOR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct RXFIFOR {
bits: u8,
}
impl RXFIFOR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 0:7 - Transmit FIFO Size"]
#[inline]
pub fn txfifo(&self) -> TXFIFOR {
let bits = {
const MASK: u8 = 255;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) as u8
};
TXFIFOR { bits }
}
#[doc = "Bits 8:15 - Receive FIFO Size"]
#[inline]
pub fn rxfifo(&self) -> RXFIFOR {
let bits = {
const MASK: u8 = 255;
const OFFSET: u8 = 8;
((self.bits >> OFFSET) & MASK as u32) as u8
};
RXFIFOR { bits }
}
}

39
src/lpspi2/rdr/mod.rs Normal file
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#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
impl super::RDR {
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R { bits: self.register.get() }
}
}
#[doc = r" Value of the field"]
pub struct DATAR {
bits: u32,
}
impl DATAR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 0:31 - Receive Data"]
#[inline]
pub fn data(&self) -> DATAR {
let bits = {
const MASK: u32 = 4294967295;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) as u32
};
DATAR { bits }
}
}

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src/lpspi2/rsr/mod.rs Normal file
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#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
impl super::RSR {
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R { bits: self.register.get() }
}
}
#[doc = "Possible values of the field `SOF`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum SOFR {
#[doc = "Subsequent data word received after LPSPI_PCS assertion."]
_0,
#[doc = "First data word received after LPSPI_PCS assertion."]
_1,
}
impl SOFR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
SOFR::_0 => false,
SOFR::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> SOFR {
match value {
false => SOFR::_0,
true => SOFR::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == SOFR::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == SOFR::_1
}
}
#[doc = "Possible values of the field `RXEMPTY`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum RXEMPTYR {
#[doc = "RX FIFO is not empty."]
_0,
#[doc = "RX FIFO is empty."]
_1,
}
impl RXEMPTYR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
RXEMPTYR::_0 => false,
RXEMPTYR::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> RXEMPTYR {
match value {
false => RXEMPTYR::_0,
true => RXEMPTYR::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == RXEMPTYR::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == RXEMPTYR::_1
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bit 0 - Start Of Frame"]
#[inline]
pub fn sof(&self) -> SOFR {
SOFR::_from({
const MASK: bool = true;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 1 - RX FIFO Empty"]
#[inline]
pub fn rxempty(&self) -> RXEMPTYR {
RXEMPTYR::_from({
const MASK: bool = true;
const OFFSET: u8 = 1;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
}

944
src/lpspi2/sr/mod.rs Normal file
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@ -0,0 +1,944 @@
#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
#[doc = r" Value to write to the register"]
pub struct W {
bits: u32,
}
impl super::SR {
#[doc = r" Modifies the contents of the register"]
#[inline]
pub fn modify<F>(&self, f: F)
where
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
{
let bits = self.register.get();
let r = R { bits: bits };
let mut w = W { bits: bits };
f(&r, &mut w);
self.register.set(w.bits);
}
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R { bits: self.register.get() }
}
#[doc = r" Writes to the register"]
#[inline]
pub fn write<F>(&self, f: F)
where
F: FnOnce(&mut W) -> &mut W,
{
let mut w = W::reset_value();
f(&mut w);
self.register.set(w.bits);
}
#[doc = r" Writes the reset value to the register"]
#[inline]
pub fn reset(&self) {
self.write(|w| w)
}
}
#[doc = "Possible values of the field `TDF`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum TDFR {
#[doc = "Transmit data not requested."]
_0,
#[doc = "Transmit data is requested."]
_1,
}
impl TDFR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
TDFR::_0 => false,
TDFR::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> TDFR {
match value {
false => TDFR::_0,
true => TDFR::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == TDFR::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == TDFR::_1
}
}
#[doc = "Possible values of the field `RDF`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum RDFR {
#[doc = "Receive Data is not ready."]
_0,
#[doc = "Receive data is ready."]
_1,
}
impl RDFR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
RDFR::_0 => false,
RDFR::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> RDFR {
match value {
false => RDFR::_0,
true => RDFR::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == RDFR::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == RDFR::_1
}
}
#[doc = "Possible values of the field `WCF`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum WCFR {
#[doc = "Transfer word not completed."]
_0,
#[doc = "Transfer word completed."]
_1,
}
impl WCFR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
WCFR::_0 => false,
WCFR::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> WCFR {
match value {
false => WCFR::_0,
true => WCFR::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == WCFR::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == WCFR::_1
}
}
#[doc = "Possible values of the field `FCF`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum FCFR {
#[doc = "Frame transfer has not completed."]
_0,
#[doc = "Frame transfer has completed."]
_1,
}
impl FCFR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
FCFR::_0 => false,
FCFR::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> FCFR {
match value {
false => FCFR::_0,
true => FCFR::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == FCFR::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == FCFR::_1
}
}
#[doc = "Possible values of the field `TCF`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum TCFR {
#[doc = "All transfers have not completed."]
_0,
#[doc = "All transfers have completed."]
_1,
}
impl TCFR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
TCFR::_0 => false,
TCFR::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> TCFR {
match value {
false => TCFR::_0,
true => TCFR::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == TCFR::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == TCFR::_1
}
}
#[doc = "Possible values of the field `TEF`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum TEFR {
#[doc = "Transmit FIFO underrun has not occurred."]
_0,
#[doc = "Transmit FIFO underrun has occurred"]
_1,
}
impl TEFR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
TEFR::_0 => false,
TEFR::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> TEFR {
match value {
false => TEFR::_0,
true => TEFR::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == TEFR::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == TEFR::_1
}
}
#[doc = "Possible values of the field `REF`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum REFR {
#[doc = "Receive FIFO has not overflowed."]
_0,
#[doc = "Receive FIFO has overflowed."]
_1,
}
impl REFR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
REFR::_0 => false,
REFR::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> REFR {
match value {
false => REFR::_0,
true => REFR::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == REFR::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == REFR::_1
}
}
#[doc = "Possible values of the field `DMF`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum DMFR {
#[doc = "Have not received matching data."]
_0,
#[doc = "Have received matching data."]
_1,
}
impl DMFR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
DMFR::_0 => false,
DMFR::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> DMFR {
match value {
false => DMFR::_0,
true => DMFR::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == DMFR::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == DMFR::_1
}
}
#[doc = "Possible values of the field `MBF`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum MBFR {
#[doc = "LPSPI is idle."]
_0,
#[doc = "LPSPI is busy."]
_1,
}
impl MBFR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
MBFR::_0 => false,
MBFR::_1 => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> MBFR {
match value {
false => MBFR::_0,
true => MBFR::_1,
}
}
#[doc = "Checks if the value of the field is `_0`"]
#[inline]
pub fn is_0(&self) -> bool {
*self == MBFR::_0
}
#[doc = "Checks if the value of the field is `_1`"]
#[inline]
pub fn is_1(&self) -> bool {
*self == MBFR::_1
}
}
#[doc = "Values that can be written to the field `WCF`"]
pub enum WCFW {
#[doc = "Transfer word not completed."]
_0,
#[doc = "Transfer word completed."]
_1,
}
impl WCFW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
WCFW::_0 => false,
WCFW::_1 => true,
}
}
}
#[doc = r" Proxy"]
pub struct _WCFW<'a> {
w: &'a mut W,
}
impl<'a> _WCFW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: WCFW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Transfer word not completed."]
#[inline]
pub fn _0(self) -> &'a mut W {
self.variant(WCFW::_0)
}
#[doc = "Transfer word completed."]
#[inline]
pub fn _1(self) -> &'a mut W {
self.variant(WCFW::_1)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 8;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `FCF`"]
pub enum FCFW {
#[doc = "Frame transfer has not completed."]
_0,
#[doc = "Frame transfer has completed."]
_1,
}
impl FCFW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
FCFW::_0 => false,
FCFW::_1 => true,
}
}
}
#[doc = r" Proxy"]
pub struct _FCFW<'a> {
w: &'a mut W,
}
impl<'a> _FCFW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: FCFW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Frame transfer has not completed."]
#[inline]
pub fn _0(self) -> &'a mut W {
self.variant(FCFW::_0)
}
#[doc = "Frame transfer has completed."]
#[inline]
pub fn _1(self) -> &'a mut W {
self.variant(FCFW::_1)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 9;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `TCF`"]
pub enum TCFW {
#[doc = "All transfers have not completed."]
_0,
#[doc = "All transfers have completed."]
_1,
}
impl TCFW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
TCFW::_0 => false,
TCFW::_1 => true,
}
}
}
#[doc = r" Proxy"]
pub struct _TCFW<'a> {
w: &'a mut W,
}
impl<'a> _TCFW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: TCFW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "All transfers have not completed."]
#[inline]
pub fn _0(self) -> &'a mut W {
self.variant(TCFW::_0)
}
#[doc = "All transfers have completed."]
#[inline]
pub fn _1(self) -> &'a mut W {
self.variant(TCFW::_1)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 10;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `TEF`"]
pub enum TEFW {
#[doc = "Transmit FIFO underrun has not occurred."]
_0,
#[doc = "Transmit FIFO underrun has occurred"]
_1,
}
impl TEFW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
TEFW::_0 => false,
TEFW::_1 => true,
}
}
}
#[doc = r" Proxy"]
pub struct _TEFW<'a> {
w: &'a mut W,
}
impl<'a> _TEFW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: TEFW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Transmit FIFO underrun has not occurred."]
#[inline]
pub fn _0(self) -> &'a mut W {
self.variant(TEFW::_0)
}
#[doc = "Transmit FIFO underrun has occurred"]
#[inline]
pub fn _1(self) -> &'a mut W {
self.variant(TEFW::_1)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 11;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `REF`"]
pub enum REFW {
#[doc = "Receive FIFO has not overflowed."]
_0,
#[doc = "Receive FIFO has overflowed."]
_1,
}
impl REFW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
REFW::_0 => false,
REFW::_1 => true,
}
}
}
#[doc = r" Proxy"]
pub struct _REFW<'a> {
w: &'a mut W,
}
impl<'a> _REFW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: REFW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Receive FIFO has not overflowed."]
#[inline]
pub fn _0(self) -> &'a mut W {
self.variant(REFW::_0)
}
#[doc = "Receive FIFO has overflowed."]
#[inline]
pub fn _1(self) -> &'a mut W {
self.variant(REFW::_1)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 12;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `DMF`"]
pub enum DMFW {
#[doc = "Have not received matching data."]
_0,
#[doc = "Have received matching data."]
_1,
}
impl DMFW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
DMFW::_0 => false,
DMFW::_1 => true,
}
}
}
#[doc = r" Proxy"]
pub struct _DMFW<'a> {
w: &'a mut W,
}
impl<'a> _DMFW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: DMFW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Have not received matching data."]
#[inline]
pub fn _0(self) -> &'a mut W {
self.variant(DMFW::_0)
}
#[doc = "Have received matching data."]
#[inline]
pub fn _1(self) -> &'a mut W {
self.variant(DMFW::_1)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 13;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bit 0 - Transmit Data Flag"]
#[inline]
pub fn tdf(&self) -> TDFR {
TDFR::_from({
const MASK: bool = true;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 1 - Receive Data Flag"]
#[inline]
pub fn rdf(&self) -> RDFR {
RDFR::_from({
const MASK: bool = true;
const OFFSET: u8 = 1;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 8 - Word Complete Flag"]
#[inline]
pub fn wcf(&self) -> WCFR {
WCFR::_from({
const MASK: bool = true;
const OFFSET: u8 = 8;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 9 - Frame Complete Flag"]
#[inline]
pub fn fcf(&self) -> FCFR {
FCFR::_from({
const MASK: bool = true;
const OFFSET: u8 = 9;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 10 - Transfer Complete Flag"]
#[inline]
pub fn tcf(&self) -> TCFR {
TCFR::_from({
const MASK: bool = true;
const OFFSET: u8 = 10;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 11 - Transmit Error Flag"]
#[inline]
pub fn tef(&self) -> TEFR {
TEFR::_from({
const MASK: bool = true;
const OFFSET: u8 = 11;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 12 - Receive Error Flag"]
#[inline]
pub fn ref_(&self) -> REFR {
REFR::_from({
const MASK: bool = true;
const OFFSET: u8 = 12;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 13 - Data Match Flag"]
#[inline]
pub fn dmf(&self) -> DMFR {
DMFR::_from({
const MASK: bool = true;
const OFFSET: u8 = 13;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 24 - Module Busy Flag"]
#[inline]
pub fn mbf(&self) -> MBFR {
MBFR::_from({
const MASK: bool = true;
const OFFSET: u8 = 24;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
}
impl W {
#[doc = r" Reset value of the register"]
#[inline]
pub fn reset_value() -> W {
W { bits: 1 }
}
#[doc = r" Writes raw bits to the register"]
#[inline]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.bits = bits;
self
}
#[doc = "Bit 8 - Word Complete Flag"]
#[inline]
pub fn wcf(&mut self) -> _WCFW {
_WCFW { w: self }
}
#[doc = "Bit 9 - Frame Complete Flag"]
#[inline]
pub fn fcf(&mut self) -> _FCFW {
_FCFW { w: self }
}
#[doc = "Bit 10 - Transfer Complete Flag"]
#[inline]
pub fn tcf(&mut self) -> _TCFW {
_TCFW { w: self }
}
#[doc = "Bit 11 - Transmit Error Flag"]
#[inline]
pub fn tef(&mut self) -> _TEFW {
_TEFW { w: self }
}
#[doc = "Bit 12 - Receive Error Flag"]
#[inline]
pub fn ref_(&mut self) -> _REFW {
_REFW { w: self }
}
#[doc = "Bit 13 - Data Match Flag"]
#[inline]
pub fn dmf(&mut self) -> _DMFW {
_DMFW { w: self }
}
}

1515
src/lpspi2/tcr/mod.rs Normal file
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49
src/lpspi2/tdr/mod.rs Normal file
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@ -0,0 +1,49 @@
#[doc = r" Value to write to the register"]
pub struct W {
bits: u32,
}
impl super::TDR {
#[doc = r" Writes to the register"]
#[inline]
pub fn write<F>(&self, f: F)
where
F: FnOnce(&mut W) -> &mut W,
{
let mut w = W::reset_value();
f(&mut w);
self.register.set(w.bits);
}
}
#[doc = r" Proxy"]
pub struct _DATAW<'a> {
w: &'a mut W,
}
impl<'a> _DATAW<'a> {
#[doc = r" Writes raw bits to the field"]
#[inline]
pub unsafe fn bits(self, value: u32) -> &'a mut W {
const MASK: u32 = 4294967295;
const OFFSET: u8 = 0;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
impl W {
#[doc = r" Reset value of the register"]
#[inline]
pub fn reset_value() -> W {
W { bits: 0 }
}
#[doc = r" Writes raw bits to the register"]
#[inline]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.bits = bits;
self
}
#[doc = "Bits 0:31 - Transmit Data"]
#[inline]
pub fn data(&mut self) -> _DATAW {
_DATAW { w: self }
}
}

101
src/lpspi2/verid/mod.rs Normal file
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@ -0,0 +1,101 @@
#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
impl super::VERID {
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R { bits: self.register.get() }
}
}
#[doc = "Possible values of the field `FEATURE`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum FEATURER {
#[doc = "Standard feature set supporting 32-bit shift register."]
_0000000000000100,
#[doc = r" Reserved"]
_Reserved(u16),
}
impl FEATURER {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u16 {
match *self {
FEATURER::_0000000000000100 => 4,
FEATURER::_Reserved(bits) => bits,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: u16) -> FEATURER {
match value {
4 => FEATURER::_0000000000000100,
i => FEATURER::_Reserved(i),
}
}
#[doc = "Checks if the value of the field is `_0000000000000100`"]
#[inline]
pub fn is_0000000000000100(&self) -> bool {
*self == FEATURER::_0000000000000100
}
}
#[doc = r" Value of the field"]
pub struct MINORR {
bits: u8,
}
impl MINORR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
#[doc = r" Value of the field"]
pub struct MAJORR {
bits: u8,
}
impl MAJORR {
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bits(&self) -> u8 {
self.bits
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bits 0:15 - Module Identification Number"]
#[inline]
pub fn feature(&self) -> FEATURER {
FEATURER::_from({
const MASK: u16 = 65535;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) as u16
})
}
#[doc = "Bits 16:23 - Minor Version Number"]
#[inline]
pub fn minor(&self) -> MINORR {
let bits = {
const MASK: u8 = 255;
const OFFSET: u8 = 16;
((self.bits >> OFFSET) & MASK as u32) as u8
};
MINORR { bits }
}
#[doc = "Bits 24:31 - Major Version Number"]
#[inline]
pub fn major(&self) -> MAJORR {
let bits = {
const MASK: u8 = 255;
const OFFSET: u8 = 24;
((self.bits >> OFFSET) & MASK as u32) as u8
};
MAJORR { bits }
}
}