Used deriveFrom to generlize lpuart modules
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S32K144.svd
4427
S32K144.svd
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Load Diff
20
src/lib.rs
20
src/lib.rs
@ -588,29 +588,25 @@ impl Deref for LPUART0 {
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}
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#[doc = "Universal Asynchronous Receiver/Transmitter"]
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pub const LPUART1: Peripheral<LPUART1> = unsafe { Peripheral::new(1074180096) };
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#[doc = "Universal Asynchronous Receiver/Transmitter"]
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pub mod lpuart1;
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#[doc = "Universal Asynchronous Receiver/Transmitter"]
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#[doc = r" Register block"]
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pub struct LPUART1 {
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register_block: lpuart1::RegisterBlock,
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register_block: lpuart0::RegisterBlock,
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}
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impl Deref for LPUART1 {
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type Target = lpuart1::RegisterBlock;
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fn deref(&self) -> &lpuart1::RegisterBlock {
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type Target = lpuart0::RegisterBlock;
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fn deref(&self) -> &lpuart0::RegisterBlock {
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&self.register_block
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}
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}
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#[doc = "Universal Asynchronous Receiver/Transmitter"]
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pub const LPUART2: Peripheral<LPUART2> = unsafe { Peripheral::new(1074184192) };
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#[doc = "Universal Asynchronous Receiver/Transmitter"]
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pub mod lpuart2;
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#[doc = "Universal Asynchronous Receiver/Transmitter"]
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#[doc = r" Register block"]
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pub struct LPUART2 {
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register_block: lpuart2::RegisterBlock,
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register_block: lpuart0::RegisterBlock,
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}
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impl Deref for LPUART2 {
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type Target = lpuart2::RegisterBlock;
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fn deref(&self) -> &lpuart2::RegisterBlock {
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type Target = lpuart0::RegisterBlock;
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fn deref(&self) -> &lpuart0::RegisterBlock {
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&self.register_block
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}
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}
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File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@ -1,989 +0,0 @@
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#[doc = r" Value read from the register"]
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pub struct R {
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bits: u32,
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}
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#[doc = r" Value to write to the register"]
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pub struct W {
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bits: u32,
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}
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impl super::DATA {
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#[doc = r" Modifies the contents of the register"]
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#[inline]
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pub fn modify<F>(&self, f: F)
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where
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for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
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{
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let bits = self.register.get();
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let r = R { bits: bits };
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let mut w = W { bits: bits };
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f(&r, &mut w);
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self.register.set(w.bits);
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}
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#[doc = r" Reads the contents of the register"]
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#[inline]
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pub fn read(&self) -> R {
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R {
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bits: self.register.get(),
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}
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}
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#[doc = r" Writes to the register"]
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#[inline]
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pub fn write<F>(&self, f: F)
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where
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F: FnOnce(&mut W) -> &mut W,
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{
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let mut w = W::reset_value();
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f(&mut w);
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self.register.set(w.bits);
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}
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#[doc = r" Writes the reset value to the register"]
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#[inline]
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pub fn reset(&self) {
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self.write(|w| w)
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}
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}
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#[doc = r" Value of the field"]
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pub struct R0T0R {
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bits: bool,
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}
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impl R0T0R {
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#[doc = r" Value of the field as raw bits"]
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#[inline]
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pub fn bit(&self) -> bool {
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self.bits
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}
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#[doc = r" Returns `true` if the bit is clear (0)"]
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#[inline]
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pub fn bit_is_clear(&self) -> bool {
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!self.bit()
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}
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#[doc = r" Returns `true` if the bit is set (1)"]
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#[inline]
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pub fn bit_is_set(&self) -> bool {
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self.bit()
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}
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}
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#[doc = r" Value of the field"]
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pub struct R1T1R {
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bits: bool,
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}
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impl R1T1R {
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#[doc = r" Value of the field as raw bits"]
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#[inline]
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pub fn bit(&self) -> bool {
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self.bits
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}
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#[doc = r" Returns `true` if the bit is clear (0)"]
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#[inline]
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pub fn bit_is_clear(&self) -> bool {
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!self.bit()
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}
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#[doc = r" Returns `true` if the bit is set (1)"]
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#[inline]
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pub fn bit_is_set(&self) -> bool {
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self.bit()
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}
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}
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#[doc = r" Value of the field"]
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pub struct R2T2R {
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bits: bool,
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}
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impl R2T2R {
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#[doc = r" Value of the field as raw bits"]
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#[inline]
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pub fn bit(&self) -> bool {
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self.bits
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}
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#[doc = r" Returns `true` if the bit is clear (0)"]
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#[inline]
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pub fn bit_is_clear(&self) -> bool {
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!self.bit()
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}
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#[doc = r" Returns `true` if the bit is set (1)"]
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#[inline]
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pub fn bit_is_set(&self) -> bool {
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self.bit()
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}
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}
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#[doc = r" Value of the field"]
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pub struct R3T3R {
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bits: bool,
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}
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impl R3T3R {
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#[doc = r" Value of the field as raw bits"]
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#[inline]
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pub fn bit(&self) -> bool {
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self.bits
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}
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#[doc = r" Returns `true` if the bit is clear (0)"]
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#[inline]
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pub fn bit_is_clear(&self) -> bool {
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!self.bit()
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}
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#[doc = r" Returns `true` if the bit is set (1)"]
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#[inline]
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pub fn bit_is_set(&self) -> bool {
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self.bit()
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}
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}
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#[doc = r" Value of the field"]
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pub struct R4T4R {
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bits: bool,
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}
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impl R4T4R {
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#[doc = r" Value of the field as raw bits"]
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#[inline]
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pub fn bit(&self) -> bool {
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self.bits
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}
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#[doc = r" Returns `true` if the bit is clear (0)"]
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#[inline]
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pub fn bit_is_clear(&self) -> bool {
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!self.bit()
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}
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#[doc = r" Returns `true` if the bit is set (1)"]
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#[inline]
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pub fn bit_is_set(&self) -> bool {
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self.bit()
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}
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}
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#[doc = r" Value of the field"]
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pub struct R5T5R {
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bits: bool,
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}
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impl R5T5R {
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#[doc = r" Value of the field as raw bits"]
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#[inline]
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pub fn bit(&self) -> bool {
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self.bits
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}
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#[doc = r" Returns `true` if the bit is clear (0)"]
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#[inline]
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pub fn bit_is_clear(&self) -> bool {
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!self.bit()
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}
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#[doc = r" Returns `true` if the bit is set (1)"]
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#[inline]
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pub fn bit_is_set(&self) -> bool {
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self.bit()
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}
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}
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#[doc = r" Value of the field"]
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pub struct R6T6R {
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bits: bool,
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}
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impl R6T6R {
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#[doc = r" Value of the field as raw bits"]
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#[inline]
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pub fn bit(&self) -> bool {
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self.bits
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}
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#[doc = r" Returns `true` if the bit is clear (0)"]
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#[inline]
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pub fn bit_is_clear(&self) -> bool {
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!self.bit()
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}
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#[doc = r" Returns `true` if the bit is set (1)"]
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#[inline]
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pub fn bit_is_set(&self) -> bool {
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self.bit()
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}
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}
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#[doc = r" Value of the field"]
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pub struct R7T7R {
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bits: bool,
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}
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impl R7T7R {
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#[doc = r" Value of the field as raw bits"]
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#[inline]
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pub fn bit(&self) -> bool {
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self.bits
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}
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#[doc = r" Returns `true` if the bit is clear (0)"]
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#[inline]
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pub fn bit_is_clear(&self) -> bool {
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!self.bit()
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}
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#[doc = r" Returns `true` if the bit is set (1)"]
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#[inline]
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pub fn bit_is_set(&self) -> bool {
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self.bit()
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}
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}
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#[doc = r" Value of the field"]
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pub struct R8T8R {
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bits: bool,
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}
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impl R8T8R {
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#[doc = r" Value of the field as raw bits"]
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#[inline]
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pub fn bit(&self) -> bool {
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self.bits
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}
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#[doc = r" Returns `true` if the bit is clear (0)"]
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#[inline]
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pub fn bit_is_clear(&self) -> bool {
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!self.bit()
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}
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#[doc = r" Returns `true` if the bit is set (1)"]
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#[inline]
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pub fn bit_is_set(&self) -> bool {
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self.bit()
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}
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}
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#[doc = r" Value of the field"]
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pub struct R9T9R {
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bits: bool,
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}
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impl R9T9R {
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#[doc = r" Value of the field as raw bits"]
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#[inline]
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pub fn bit(&self) -> bool {
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self.bits
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}
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#[doc = r" Returns `true` if the bit is clear (0)"]
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#[inline]
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pub fn bit_is_clear(&self) -> bool {
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!self.bit()
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}
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#[doc = r" Returns `true` if the bit is set (1)"]
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#[inline]
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pub fn bit_is_set(&self) -> bool {
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self.bit()
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}
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}
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#[doc = "Possible values of the field `IDLINE`"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum IDLINER {
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#[doc = "Receiver was not idle before receiving this character."] _0,
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#[doc = "Receiver was idle before receiving this character."] _1,
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}
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impl IDLINER {
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#[doc = r" Returns `true` if the bit is clear (0)"]
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#[inline]
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pub fn bit_is_clear(&self) -> bool {
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!self.bit()
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}
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#[doc = r" Returns `true` if the bit is set (1)"]
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#[inline]
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pub fn bit_is_set(&self) -> bool {
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self.bit()
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}
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#[doc = r" Value of the field as raw bits"]
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#[inline]
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pub fn bit(&self) -> bool {
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match *self {
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IDLINER::_0 => false,
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IDLINER::_1 => true,
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}
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}
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#[allow(missing_docs)]
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#[doc(hidden)]
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#[inline]
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pub fn _from(value: bool) -> IDLINER {
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match value {
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false => IDLINER::_0,
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true => IDLINER::_1,
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}
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}
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#[doc = "Checks if the value of the field is `_0`"]
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#[inline]
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pub fn is_0(&self) -> bool {
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*self == IDLINER::_0
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}
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#[doc = "Checks if the value of the field is `_1`"]
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#[inline]
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pub fn is_1(&self) -> bool {
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*self == IDLINER::_1
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}
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}
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#[doc = "Possible values of the field `RXEMPT`"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum RXEMPTR {
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#[doc = "Receive buffer contains valid data."] _0,
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#[doc = "Receive buffer is empty, data returned on read is not valid."] _1,
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}
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impl RXEMPTR {
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#[doc = r" Returns `true` if the bit is clear (0)"]
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#[inline]
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pub fn bit_is_clear(&self) -> bool {
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!self.bit()
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}
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#[doc = r" Returns `true` if the bit is set (1)"]
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#[inline]
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pub fn bit_is_set(&self) -> bool {
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self.bit()
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}
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#[doc = r" Value of the field as raw bits"]
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#[inline]
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pub fn bit(&self) -> bool {
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match *self {
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RXEMPTR::_0 => false,
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RXEMPTR::_1 => true,
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}
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}
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#[allow(missing_docs)]
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#[doc(hidden)]
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#[inline]
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pub fn _from(value: bool) -> RXEMPTR {
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match value {
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false => RXEMPTR::_0,
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true => RXEMPTR::_1,
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}
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}
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#[doc = "Checks if the value of the field is `_0`"]
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#[inline]
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pub fn is_0(&self) -> bool {
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*self == RXEMPTR::_0
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}
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#[doc = "Checks if the value of the field is `_1`"]
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#[inline]
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pub fn is_1(&self) -> bool {
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*self == RXEMPTR::_1
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}
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}
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#[doc = "Possible values of the field `FRETSC`"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum FRETSCR {
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#[doc = "The dataword was received without a frame error on read, or transmit a normal character on write."]
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_0,
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#[doc = "The dataword was received with a frame error, or transmit an idle or break character on transmit."]
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_1,
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}
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impl FRETSCR {
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#[doc = r" Returns `true` if the bit is clear (0)"]
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#[inline]
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pub fn bit_is_clear(&self) -> bool {
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!self.bit()
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}
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#[doc = r" Returns `true` if the bit is set (1)"]
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#[inline]
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pub fn bit_is_set(&self) -> bool {
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self.bit()
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}
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#[doc = r" Value of the field as raw bits"]
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#[inline]
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pub fn bit(&self) -> bool {
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match *self {
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FRETSCR::_0 => false,
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FRETSCR::_1 => true,
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}
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}
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#[allow(missing_docs)]
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#[doc(hidden)]
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#[inline]
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pub fn _from(value: bool) -> FRETSCR {
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match value {
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false => FRETSCR::_0,
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true => FRETSCR::_1,
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}
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}
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#[doc = "Checks if the value of the field is `_0`"]
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#[inline]
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pub fn is_0(&self) -> bool {
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*self == FRETSCR::_0
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}
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#[doc = "Checks if the value of the field is `_1`"]
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#[inline]
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pub fn is_1(&self) -> bool {
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*self == FRETSCR::_1
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}
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}
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#[doc = "Possible values of the field `PARITYE`"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum PARITYER {
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#[doc = "The dataword was received without a parity error."] _0,
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#[doc = "The dataword was received with a parity error."] _1,
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}
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impl PARITYER {
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#[doc = r" Returns `true` if the bit is clear (0)"]
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#[inline]
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pub fn bit_is_clear(&self) -> bool {
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!self.bit()
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}
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#[doc = r" Returns `true` if the bit is set (1)"]
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#[inline]
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pub fn bit_is_set(&self) -> bool {
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self.bit()
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}
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#[doc = r" Value of the field as raw bits"]
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#[inline]
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pub fn bit(&self) -> bool {
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match *self {
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PARITYER::_0 => false,
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PARITYER::_1 => true,
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}
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}
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#[allow(missing_docs)]
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#[doc(hidden)]
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#[inline]
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pub fn _from(value: bool) -> PARITYER {
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match value {
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false => PARITYER::_0,
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true => PARITYER::_1,
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}
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}
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#[doc = "Checks if the value of the field is `_0`"]
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#[inline]
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pub fn is_0(&self) -> bool {
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*self == PARITYER::_0
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}
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#[doc = "Checks if the value of the field is `_1`"]
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#[inline]
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pub fn is_1(&self) -> bool {
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*self == PARITYER::_1
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}
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}
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#[doc = "Possible values of the field `NOISY`"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum NOISYR {
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#[doc = "The dataword was received without noise."] _0,
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#[doc = "The data was received with noise."] _1,
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}
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impl NOISYR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
match *self {
|
||||
NOISYR::_0 => false,
|
||||
NOISYR::_1 => true,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: bool) -> NOISYR {
|
||||
match value {
|
||||
false => NOISYR::_0,
|
||||
true => NOISYR::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == NOISYR::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == NOISYR::_1
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _R0T0W<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _R0T0W<'a> {
|
||||
#[doc = r" Sets the field bit"]
|
||||
pub fn set_bit(self) -> &'a mut W {
|
||||
self.bit(true)
|
||||
}
|
||||
#[doc = r" Clears the field bit"]
|
||||
pub fn clear_bit(self) -> &'a mut W {
|
||||
self.bit(false)
|
||||
}
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub fn bit(self, value: bool) -> &'a mut W {
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 0;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _R1T1W<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _R1T1W<'a> {
|
||||
#[doc = r" Sets the field bit"]
|
||||
pub fn set_bit(self) -> &'a mut W {
|
||||
self.bit(true)
|
||||
}
|
||||
#[doc = r" Clears the field bit"]
|
||||
pub fn clear_bit(self) -> &'a mut W {
|
||||
self.bit(false)
|
||||
}
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub fn bit(self, value: bool) -> &'a mut W {
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 1;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _R2T2W<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _R2T2W<'a> {
|
||||
#[doc = r" Sets the field bit"]
|
||||
pub fn set_bit(self) -> &'a mut W {
|
||||
self.bit(true)
|
||||
}
|
||||
#[doc = r" Clears the field bit"]
|
||||
pub fn clear_bit(self) -> &'a mut W {
|
||||
self.bit(false)
|
||||
}
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub fn bit(self, value: bool) -> &'a mut W {
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 2;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _R3T3W<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _R3T3W<'a> {
|
||||
#[doc = r" Sets the field bit"]
|
||||
pub fn set_bit(self) -> &'a mut W {
|
||||
self.bit(true)
|
||||
}
|
||||
#[doc = r" Clears the field bit"]
|
||||
pub fn clear_bit(self) -> &'a mut W {
|
||||
self.bit(false)
|
||||
}
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub fn bit(self, value: bool) -> &'a mut W {
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 3;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _R4T4W<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _R4T4W<'a> {
|
||||
#[doc = r" Sets the field bit"]
|
||||
pub fn set_bit(self) -> &'a mut W {
|
||||
self.bit(true)
|
||||
}
|
||||
#[doc = r" Clears the field bit"]
|
||||
pub fn clear_bit(self) -> &'a mut W {
|
||||
self.bit(false)
|
||||
}
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub fn bit(self, value: bool) -> &'a mut W {
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 4;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _R5T5W<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _R5T5W<'a> {
|
||||
#[doc = r" Sets the field bit"]
|
||||
pub fn set_bit(self) -> &'a mut W {
|
||||
self.bit(true)
|
||||
}
|
||||
#[doc = r" Clears the field bit"]
|
||||
pub fn clear_bit(self) -> &'a mut W {
|
||||
self.bit(false)
|
||||
}
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub fn bit(self, value: bool) -> &'a mut W {
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 5;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _R6T6W<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _R6T6W<'a> {
|
||||
#[doc = r" Sets the field bit"]
|
||||
pub fn set_bit(self) -> &'a mut W {
|
||||
self.bit(true)
|
||||
}
|
||||
#[doc = r" Clears the field bit"]
|
||||
pub fn clear_bit(self) -> &'a mut W {
|
||||
self.bit(false)
|
||||
}
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub fn bit(self, value: bool) -> &'a mut W {
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 6;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _R7T7W<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _R7T7W<'a> {
|
||||
#[doc = r" Sets the field bit"]
|
||||
pub fn set_bit(self) -> &'a mut W {
|
||||
self.bit(true)
|
||||
}
|
||||
#[doc = r" Clears the field bit"]
|
||||
pub fn clear_bit(self) -> &'a mut W {
|
||||
self.bit(false)
|
||||
}
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub fn bit(self, value: bool) -> &'a mut W {
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 7;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _R8T8W<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _R8T8W<'a> {
|
||||
#[doc = r" Sets the field bit"]
|
||||
pub fn set_bit(self) -> &'a mut W {
|
||||
self.bit(true)
|
||||
}
|
||||
#[doc = r" Clears the field bit"]
|
||||
pub fn clear_bit(self) -> &'a mut W {
|
||||
self.bit(false)
|
||||
}
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub fn bit(self, value: bool) -> &'a mut W {
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 8;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _R9T9W<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _R9T9W<'a> {
|
||||
#[doc = r" Sets the field bit"]
|
||||
pub fn set_bit(self) -> &'a mut W {
|
||||
self.bit(true)
|
||||
}
|
||||
#[doc = r" Clears the field bit"]
|
||||
pub fn clear_bit(self) -> &'a mut W {
|
||||
self.bit(false)
|
||||
}
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub fn bit(self, value: bool) -> &'a mut W {
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 9;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = "Values that can be written to the field `FRETSC`"]
|
||||
pub enum FRETSCW {
|
||||
#[doc = "The dataword was received without a frame error on read, or transmit a normal character on write."]
|
||||
_0,
|
||||
#[doc = "The dataword was received with a frame error, or transmit an idle or break character on transmit."]
|
||||
_1,
|
||||
}
|
||||
impl FRETSCW {
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _bits(&self) -> bool {
|
||||
match *self {
|
||||
FRETSCW::_0 => false,
|
||||
FRETSCW::_1 => true,
|
||||
}
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _FRETSCW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _FRETSCW<'a> {
|
||||
#[doc = r" Writes `variant` to the field"]
|
||||
#[inline]
|
||||
pub fn variant(self, variant: FRETSCW) -> &'a mut W {
|
||||
{
|
||||
self.bit(variant._bits())
|
||||
}
|
||||
}
|
||||
#[doc = "The dataword was received without a frame error on read, or transmit a normal character on write."]
|
||||
#[inline]
|
||||
pub fn _0(self) -> &'a mut W {
|
||||
self.variant(FRETSCW::_0)
|
||||
}
|
||||
#[doc = "The dataword was received with a frame error, or transmit an idle or break character on transmit."]
|
||||
#[inline]
|
||||
pub fn _1(self) -> &'a mut W {
|
||||
self.variant(FRETSCW::_1)
|
||||
}
|
||||
#[doc = r" Sets the field bit"]
|
||||
pub fn set_bit(self) -> &'a mut W {
|
||||
self.bit(true)
|
||||
}
|
||||
#[doc = r" Clears the field bit"]
|
||||
pub fn clear_bit(self) -> &'a mut W {
|
||||
self.bit(false)
|
||||
}
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub fn bit(self, value: bool) -> &'a mut W {
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 13;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
#[doc = "Bit 0 - R0T0"]
|
||||
#[inline]
|
||||
pub fn r0t0(&self) -> R0T0R {
|
||||
let bits = {
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 0;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
};
|
||||
R0T0R { bits }
|
||||
}
|
||||
#[doc = "Bit 1 - R1T1"]
|
||||
#[inline]
|
||||
pub fn r1t1(&self) -> R1T1R {
|
||||
let bits = {
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 1;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
};
|
||||
R1T1R { bits }
|
||||
}
|
||||
#[doc = "Bit 2 - R2T2"]
|
||||
#[inline]
|
||||
pub fn r2t2(&self) -> R2T2R {
|
||||
let bits = {
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 2;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
};
|
||||
R2T2R { bits }
|
||||
}
|
||||
#[doc = "Bit 3 - R3T3"]
|
||||
#[inline]
|
||||
pub fn r3t3(&self) -> R3T3R {
|
||||
let bits = {
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 3;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
};
|
||||
R3T3R { bits }
|
||||
}
|
||||
#[doc = "Bit 4 - R4T4"]
|
||||
#[inline]
|
||||
pub fn r4t4(&self) -> R4T4R {
|
||||
let bits = {
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 4;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
};
|
||||
R4T4R { bits }
|
||||
}
|
||||
#[doc = "Bit 5 - R5T5"]
|
||||
#[inline]
|
||||
pub fn r5t5(&self) -> R5T5R {
|
||||
let bits = {
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 5;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
};
|
||||
R5T5R { bits }
|
||||
}
|
||||
#[doc = "Bit 6 - R6T6"]
|
||||
#[inline]
|
||||
pub fn r6t6(&self) -> R6T6R {
|
||||
let bits = {
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 6;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
};
|
||||
R6T6R { bits }
|
||||
}
|
||||
#[doc = "Bit 7 - R7T7"]
|
||||
#[inline]
|
||||
pub fn r7t7(&self) -> R7T7R {
|
||||
let bits = {
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 7;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
};
|
||||
R7T7R { bits }
|
||||
}
|
||||
#[doc = "Bit 8 - R8T8"]
|
||||
#[inline]
|
||||
pub fn r8t8(&self) -> R8T8R {
|
||||
let bits = {
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 8;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
};
|
||||
R8T8R { bits }
|
||||
}
|
||||
#[doc = "Bit 9 - R9T9"]
|
||||
#[inline]
|
||||
pub fn r9t9(&self) -> R9T9R {
|
||||
let bits = {
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 9;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
};
|
||||
R9T9R { bits }
|
||||
}
|
||||
#[doc = "Bit 11 - Idle Line"]
|
||||
#[inline]
|
||||
pub fn idline(&self) -> IDLINER {
|
||||
IDLINER::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 11;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
#[doc = "Bit 12 - Receive Buffer Empty"]
|
||||
#[inline]
|
||||
pub fn rxempt(&self) -> RXEMPTR {
|
||||
RXEMPTR::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 12;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
#[doc = "Bit 13 - Frame Error / Transmit Special Character"]
|
||||
#[inline]
|
||||
pub fn fretsc(&self) -> FRETSCR {
|
||||
FRETSCR::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 13;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
#[doc = "Bit 14 - PARITYE"]
|
||||
#[inline]
|
||||
pub fn paritye(&self) -> PARITYER {
|
||||
PARITYER::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 14;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
#[doc = "Bit 15 - NOISY"]
|
||||
#[inline]
|
||||
pub fn noisy(&self) -> NOISYR {
|
||||
NOISYR::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 15;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 4096 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
#[doc = "Bit 0 - R0T0"]
|
||||
#[inline]
|
||||
pub fn r0t0(&mut self) -> _R0T0W {
|
||||
_R0T0W { w: self }
|
||||
}
|
||||
#[doc = "Bit 1 - R1T1"]
|
||||
#[inline]
|
||||
pub fn r1t1(&mut self) -> _R1T1W {
|
||||
_R1T1W { w: self }
|
||||
}
|
||||
#[doc = "Bit 2 - R2T2"]
|
||||
#[inline]
|
||||
pub fn r2t2(&mut self) -> _R2T2W {
|
||||
_R2T2W { w: self }
|
||||
}
|
||||
#[doc = "Bit 3 - R3T3"]
|
||||
#[inline]
|
||||
pub fn r3t3(&mut self) -> _R3T3W {
|
||||
_R3T3W { w: self }
|
||||
}
|
||||
#[doc = "Bit 4 - R4T4"]
|
||||
#[inline]
|
||||
pub fn r4t4(&mut self) -> _R4T4W {
|
||||
_R4T4W { w: self }
|
||||
}
|
||||
#[doc = "Bit 5 - R5T5"]
|
||||
#[inline]
|
||||
pub fn r5t5(&mut self) -> _R5T5W {
|
||||
_R5T5W { w: self }
|
||||
}
|
||||
#[doc = "Bit 6 - R6T6"]
|
||||
#[inline]
|
||||
pub fn r6t6(&mut self) -> _R6T6W {
|
||||
_R6T6W { w: self }
|
||||
}
|
||||
#[doc = "Bit 7 - R7T7"]
|
||||
#[inline]
|
||||
pub fn r7t7(&mut self) -> _R7T7W {
|
||||
_R7T7W { w: self }
|
||||
}
|
||||
#[doc = "Bit 8 - R8T8"]
|
||||
#[inline]
|
||||
pub fn r8t8(&mut self) -> _R8T8W {
|
||||
_R8T8W { w: self }
|
||||
}
|
||||
#[doc = "Bit 9 - R9T9"]
|
||||
#[inline]
|
||||
pub fn r9t9(&mut self) -> _R9T9W {
|
||||
_R9T9W { w: self }
|
||||
}
|
||||
#[doc = "Bit 13 - Frame Error / Transmit Special Character"]
|
||||
#[inline]
|
||||
pub fn fretsc(&mut self) -> _FRETSCW {
|
||||
_FRETSCW { w: self }
|
||||
}
|
||||
}
|
File diff suppressed because it is too large
Load Diff
@ -1,179 +0,0 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::GLOBAL {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `RST`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum RSTR {
|
||||
#[doc = "Module is not reset."] _0,
|
||||
#[doc = "Module is reset."] _1,
|
||||
}
|
||||
impl RSTR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
match *self {
|
||||
RSTR::_0 => false,
|
||||
RSTR::_1 => true,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: bool) -> RSTR {
|
||||
match value {
|
||||
false => RSTR::_0,
|
||||
true => RSTR::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == RSTR::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == RSTR::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Values that can be written to the field `RST`"]
|
||||
pub enum RSTW {
|
||||
#[doc = "Module is not reset."] _0,
|
||||
#[doc = "Module is reset."] _1,
|
||||
}
|
||||
impl RSTW {
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _bits(&self) -> bool {
|
||||
match *self {
|
||||
RSTW::_0 => false,
|
||||
RSTW::_1 => true,
|
||||
}
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _RSTW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _RSTW<'a> {
|
||||
#[doc = r" Writes `variant` to the field"]
|
||||
#[inline]
|
||||
pub fn variant(self, variant: RSTW) -> &'a mut W {
|
||||
{
|
||||
self.bit(variant._bits())
|
||||
}
|
||||
}
|
||||
#[doc = "Module is not reset."]
|
||||
#[inline]
|
||||
pub fn _0(self) -> &'a mut W {
|
||||
self.variant(RSTW::_0)
|
||||
}
|
||||
#[doc = "Module is reset."]
|
||||
#[inline]
|
||||
pub fn _1(self) -> &'a mut W {
|
||||
self.variant(RSTW::_1)
|
||||
}
|
||||
#[doc = r" Sets the field bit"]
|
||||
pub fn set_bit(self) -> &'a mut W {
|
||||
self.bit(true)
|
||||
}
|
||||
#[doc = r" Clears the field bit"]
|
||||
pub fn clear_bit(self) -> &'a mut W {
|
||||
self.bit(false)
|
||||
}
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub fn bit(self, value: bool) -> &'a mut W {
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 1;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
#[doc = "Bit 1 - Software Reset"]
|
||||
#[inline]
|
||||
pub fn rst(&self) -> RSTR {
|
||||
RSTR::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 1;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 0 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
#[doc = "Bit 1 - Software Reset"]
|
||||
#[inline]
|
||||
pub fn rst(&mut self) -> _RSTW {
|
||||
_RSTW { w: self }
|
||||
}
|
||||
}
|
@ -1,146 +0,0 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::MATCH {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
#[doc = r" Value of the field"]
|
||||
pub struct MA1R {
|
||||
bits: u16,
|
||||
}
|
||||
impl MA1R {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u16 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
#[doc = r" Value of the field"]
|
||||
pub struct MA2R {
|
||||
bits: u16,
|
||||
}
|
||||
impl MA2R {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u16 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _MA1W<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _MA1W<'a> {
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(self, value: u16) -> &'a mut W {
|
||||
const MASK: u16 = 1023;
|
||||
const OFFSET: u8 = 0;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _MA2W<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _MA2W<'a> {
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(self, value: u16) -> &'a mut W {
|
||||
const MASK: u16 = 1023;
|
||||
const OFFSET: u8 = 16;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
#[doc = "Bits 0:9 - Match Address 1"]
|
||||
#[inline]
|
||||
pub fn ma1(&self) -> MA1R {
|
||||
let bits = {
|
||||
const MASK: u16 = 1023;
|
||||
const OFFSET: u8 = 0;
|
||||
((self.bits >> OFFSET) & MASK as u32) as u16
|
||||
};
|
||||
MA1R { bits }
|
||||
}
|
||||
#[doc = "Bits 16:25 - Match Address 2"]
|
||||
#[inline]
|
||||
pub fn ma2(&self) -> MA2R {
|
||||
let bits = {
|
||||
const MASK: u16 = 1023;
|
||||
const OFFSET: u8 = 16;
|
||||
((self.bits >> OFFSET) & MASK as u32) as u16
|
||||
};
|
||||
MA2R { bits }
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 0 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
#[doc = "Bits 0:9 - Match Address 1"]
|
||||
#[inline]
|
||||
pub fn ma1(&mut self) -> _MA1W {
|
||||
_MA1W { w: self }
|
||||
}
|
||||
#[doc = "Bits 16:25 - Match Address 2"]
|
||||
#[inline]
|
||||
pub fn ma2(&mut self) -> _MA2W {
|
||||
_MA2W { w: self }
|
||||
}
|
||||
}
|
@ -1,89 +0,0 @@
|
||||
use vcell::VolatileCell;
|
||||
#[doc = r" Register block"]
|
||||
#[repr(C)]
|
||||
pub struct RegisterBlock {
|
||||
#[doc = "0x00 - Version ID Register"] pub verid: VERID,
|
||||
#[doc = "0x04 - Parameter Register"] pub param: PARAM,
|
||||
#[doc = "0x08 - LPUART Global Register"] pub global: GLOBAL,
|
||||
#[doc = "0x0c - LPUART Pin Configuration Register"] pub pincfg: PINCFG,
|
||||
#[doc = "0x10 - LPUART Baud Rate Register"] pub baud: BAUD,
|
||||
#[doc = "0x14 - LPUART Status Register"] pub stat: STAT,
|
||||
#[doc = "0x18 - LPUART Control Register"] pub ctrl: CTRL,
|
||||
#[doc = "0x1c - LPUART Data Register"] pub data: DATA,
|
||||
#[doc = "0x20 - LPUART Match Address Register"] pub match_: MATCH,
|
||||
#[doc = "0x24 - LPUART Modem IrDA Register"] pub modir: MODIR,
|
||||
#[doc = "0x28 - LPUART FIFO Register"] pub fifo: FIFO,
|
||||
#[doc = "0x2c - LPUART Watermark Register"] pub water: WATER,
|
||||
}
|
||||
#[doc = "Version ID Register"]
|
||||
pub struct VERID {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "Version ID Register"]
|
||||
pub mod verid;
|
||||
#[doc = "Parameter Register"]
|
||||
pub struct PARAM {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "Parameter Register"]
|
||||
pub mod param;
|
||||
#[doc = "LPUART Global Register"]
|
||||
pub struct GLOBAL {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "LPUART Global Register"]
|
||||
pub mod global;
|
||||
#[doc = "LPUART Pin Configuration Register"]
|
||||
pub struct PINCFG {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "LPUART Pin Configuration Register"]
|
||||
pub mod pincfg;
|
||||
#[doc = "LPUART Baud Rate Register"]
|
||||
pub struct BAUD {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "LPUART Baud Rate Register"]
|
||||
pub mod baud;
|
||||
#[doc = "LPUART Status Register"]
|
||||
pub struct STAT {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "LPUART Status Register"]
|
||||
pub mod stat;
|
||||
#[doc = "LPUART Control Register"]
|
||||
pub struct CTRL {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "LPUART Control Register"]
|
||||
pub mod ctrl;
|
||||
#[doc = "LPUART Data Register"]
|
||||
pub struct DATA {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "LPUART Data Register"]
|
||||
pub mod data;
|
||||
#[doc = "LPUART Match Address Register"]
|
||||
pub struct MATCH {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "LPUART Match Address Register"]
|
||||
pub mod match_;
|
||||
#[doc = "LPUART Modem IrDA Register"]
|
||||
pub struct MODIR {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "LPUART Modem IrDA Register"]
|
||||
pub mod modir;
|
||||
#[doc = "LPUART FIFO Register"]
|
||||
pub struct FIFO {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "LPUART FIFO Register"]
|
||||
pub mod fifo;
|
||||
#[doc = "LPUART Watermark Register"]
|
||||
pub struct WATER {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "LPUART Watermark Register"]
|
||||
pub mod water;
|
File diff suppressed because it is too large
Load Diff
@ -1,62 +0,0 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PARAM {
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
}
|
||||
}
|
||||
#[doc = r" Value of the field"]
|
||||
pub struct TXFIFOR {
|
||||
bits: u8,
|
||||
}
|
||||
impl TXFIFOR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u8 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
#[doc = r" Value of the field"]
|
||||
pub struct RXFIFOR {
|
||||
bits: u8,
|
||||
}
|
||||
impl RXFIFOR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u8 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
#[doc = "Bits 0:7 - Transmit FIFO Size"]
|
||||
#[inline]
|
||||
pub fn txfifo(&self) -> TXFIFOR {
|
||||
let bits = {
|
||||
const MASK: u8 = 255;
|
||||
const OFFSET: u8 = 0;
|
||||
((self.bits >> OFFSET) & MASK as u32) as u8
|
||||
};
|
||||
TXFIFOR { bits }
|
||||
}
|
||||
#[doc = "Bits 8:15 - Receive FIFO Size"]
|
||||
#[inline]
|
||||
pub fn rxfifo(&self) -> RXFIFOR {
|
||||
let bits = {
|
||||
const MASK: u8 = 255;
|
||||
const OFFSET: u8 = 8;
|
||||
((self.bits >> OFFSET) & MASK as u32) as u8
|
||||
};
|
||||
RXFIFOR { bits }
|
||||
}
|
||||
}
|
@ -1,194 +0,0 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PINCFG {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `TRGSEL`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TRGSELR {
|
||||
#[doc = "Input trigger is disabled."] _00,
|
||||
#[doc = "Input trigger is used instead of RXD pin input."] _01,
|
||||
#[doc = "Input trigger is used instead of CTS_B pin input."] _10,
|
||||
#[doc = "Input trigger is used to modulate the TXD pin output. The TXD pin output (after TXINV configuration) is ANDed with the input trigger."]
|
||||
_11,
|
||||
}
|
||||
impl TRGSELR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u8 {
|
||||
match *self {
|
||||
TRGSELR::_00 => 0,
|
||||
TRGSELR::_01 => 1,
|
||||
TRGSELR::_10 => 2,
|
||||
TRGSELR::_11 => 3,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: u8) -> TRGSELR {
|
||||
match value {
|
||||
0 => TRGSELR::_00,
|
||||
1 => TRGSELR::_01,
|
||||
2 => TRGSELR::_10,
|
||||
3 => TRGSELR::_11,
|
||||
_ => unreachable!(),
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_00`"]
|
||||
#[inline]
|
||||
pub fn is_00(&self) -> bool {
|
||||
*self == TRGSELR::_00
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_01`"]
|
||||
#[inline]
|
||||
pub fn is_01(&self) -> bool {
|
||||
*self == TRGSELR::_01
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_10`"]
|
||||
#[inline]
|
||||
pub fn is_10(&self) -> bool {
|
||||
*self == TRGSELR::_10
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_11`"]
|
||||
#[inline]
|
||||
pub fn is_11(&self) -> bool {
|
||||
*self == TRGSELR::_11
|
||||
}
|
||||
}
|
||||
#[doc = "Values that can be written to the field `TRGSEL`"]
|
||||
pub enum TRGSELW {
|
||||
#[doc = "Input trigger is disabled."] _00,
|
||||
#[doc = "Input trigger is used instead of RXD pin input."] _01,
|
||||
#[doc = "Input trigger is used instead of CTS_B pin input."] _10,
|
||||
#[doc = "Input trigger is used to modulate the TXD pin output. The TXD pin output (after TXINV configuration) is ANDed with the input trigger."]
|
||||
_11,
|
||||
}
|
||||
impl TRGSELW {
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _bits(&self) -> u8 {
|
||||
match *self {
|
||||
TRGSELW::_00 => 0,
|
||||
TRGSELW::_01 => 1,
|
||||
TRGSELW::_10 => 2,
|
||||
TRGSELW::_11 => 3,
|
||||
}
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _TRGSELW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _TRGSELW<'a> {
|
||||
#[doc = r" Writes `variant` to the field"]
|
||||
#[inline]
|
||||
pub fn variant(self, variant: TRGSELW) -> &'a mut W {
|
||||
{
|
||||
self.bits(variant._bits())
|
||||
}
|
||||
}
|
||||
#[doc = "Input trigger is disabled."]
|
||||
#[inline]
|
||||
pub fn _00(self) -> &'a mut W {
|
||||
self.variant(TRGSELW::_00)
|
||||
}
|
||||
#[doc = "Input trigger is used instead of RXD pin input."]
|
||||
#[inline]
|
||||
pub fn _01(self) -> &'a mut W {
|
||||
self.variant(TRGSELW::_01)
|
||||
}
|
||||
#[doc = "Input trigger is used instead of CTS_B pin input."]
|
||||
#[inline]
|
||||
pub fn _10(self) -> &'a mut W {
|
||||
self.variant(TRGSELW::_10)
|
||||
}
|
||||
#[doc = "Input trigger is used to modulate the TXD pin output. The TXD pin output (after TXINV configuration) is ANDed with the input trigger."]
|
||||
#[inline]
|
||||
pub fn _11(self) -> &'a mut W {
|
||||
self.variant(TRGSELW::_11)
|
||||
}
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub fn bits(self, value: u8) -> &'a mut W {
|
||||
const MASK: u8 = 3;
|
||||
const OFFSET: u8 = 0;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
#[doc = "Bits 0:1 - Trigger Select"]
|
||||
#[inline]
|
||||
pub fn trgsel(&self) -> TRGSELR {
|
||||
TRGSELR::_from({
|
||||
const MASK: u8 = 3;
|
||||
const OFFSET: u8 = 0;
|
||||
((self.bits >> OFFSET) & MASK as u32) as u8
|
||||
})
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 0 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
#[doc = "Bits 0:1 - Trigger Select"]
|
||||
#[inline]
|
||||
pub fn trgsel(&mut self) -> _TRGSELW {
|
||||
_TRGSELW { w: self }
|
||||
}
|
||||
}
|
File diff suppressed because it is too large
Load Diff
@ -1,109 +0,0 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::VERID {
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `FEATURE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum FEATURER {
|
||||
#[doc = "Standard feature set."] _0000000000000001,
|
||||
#[doc = "Standard feature set with MODEM/IrDA support."] _0000000000000011,
|
||||
#[doc = r" Reserved"] _Reserved(u16),
|
||||
}
|
||||
impl FEATURER {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u16 {
|
||||
match *self {
|
||||
FEATURER::_0000000000000001 => 1,
|
||||
FEATURER::_0000000000000011 => 3,
|
||||
FEATURER::_Reserved(bits) => bits,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: u16) -> FEATURER {
|
||||
match value {
|
||||
1 => FEATURER::_0000000000000001,
|
||||
3 => FEATURER::_0000000000000011,
|
||||
i => FEATURER::_Reserved(i),
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0000000000000001`"]
|
||||
#[inline]
|
||||
pub fn is_0000000000000001(&self) -> bool {
|
||||
*self == FEATURER::_0000000000000001
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0000000000000011`"]
|
||||
#[inline]
|
||||
pub fn is_0000000000000011(&self) -> bool {
|
||||
*self == FEATURER::_0000000000000011
|
||||
}
|
||||
}
|
||||
#[doc = r" Value of the field"]
|
||||
pub struct MINORR {
|
||||
bits: u8,
|
||||
}
|
||||
impl MINORR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u8 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
#[doc = r" Value of the field"]
|
||||
pub struct MAJORR {
|
||||
bits: u8,
|
||||
}
|
||||
impl MAJORR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u8 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
#[doc = "Bits 0:15 - Feature Identification Number"]
|
||||
#[inline]
|
||||
pub fn feature(&self) -> FEATURER {
|
||||
FEATURER::_from({
|
||||
const MASK: u16 = 65535;
|
||||
const OFFSET: u8 = 0;
|
||||
((self.bits >> OFFSET) & MASK as u32) as u16
|
||||
})
|
||||
}
|
||||
#[doc = "Bits 16:23 - Minor Version Number"]
|
||||
#[inline]
|
||||
pub fn minor(&self) -> MINORR {
|
||||
let bits = {
|
||||
const MASK: u8 = 255;
|
||||
const OFFSET: u8 = 16;
|
||||
((self.bits >> OFFSET) & MASK as u32) as u8
|
||||
};
|
||||
MINORR { bits }
|
||||
}
|
||||
#[doc = "Bits 24:31 - Major Version Number"]
|
||||
#[inline]
|
||||
pub fn major(&self) -> MAJORR {
|
||||
let bits = {
|
||||
const MASK: u8 = 255;
|
||||
const OFFSET: u8 = 24;
|
||||
((self.bits >> OFFSET) & MASK as u32) as u8
|
||||
};
|
||||
MAJORR { bits }
|
||||
}
|
||||
}
|
@ -1,188 +0,0 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::WATER {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
#[doc = r" Value of the field"]
|
||||
pub struct TXWATERR {
|
||||
bits: u8,
|
||||
}
|
||||
impl TXWATERR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u8 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
#[doc = r" Value of the field"]
|
||||
pub struct TXCOUNTR {
|
||||
bits: u8,
|
||||
}
|
||||
impl TXCOUNTR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u8 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
#[doc = r" Value of the field"]
|
||||
pub struct RXWATERR {
|
||||
bits: u8,
|
||||
}
|
||||
impl RXWATERR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u8 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
#[doc = r" Value of the field"]
|
||||
pub struct RXCOUNTR {
|
||||
bits: u8,
|
||||
}
|
||||
impl RXCOUNTR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u8 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _TXWATERW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _TXWATERW<'a> {
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(self, value: u8) -> &'a mut W {
|
||||
const MASK: u8 = 3;
|
||||
const OFFSET: u8 = 0;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _RXWATERW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _RXWATERW<'a> {
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(self, value: u8) -> &'a mut W {
|
||||
const MASK: u8 = 3;
|
||||
const OFFSET: u8 = 16;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
#[doc = "Bits 0:1 - Transmit Watermark"]
|
||||
#[inline]
|
||||
pub fn txwater(&self) -> TXWATERR {
|
||||
let bits = {
|
||||
const MASK: u8 = 3;
|
||||
const OFFSET: u8 = 0;
|
||||
((self.bits >> OFFSET) & MASK as u32) as u8
|
||||
};
|
||||
TXWATERR { bits }
|
||||
}
|
||||
#[doc = "Bits 8:10 - Transmit Counter"]
|
||||
#[inline]
|
||||
pub fn txcount(&self) -> TXCOUNTR {
|
||||
let bits = {
|
||||
const MASK: u8 = 7;
|
||||
const OFFSET: u8 = 8;
|
||||
((self.bits >> OFFSET) & MASK as u32) as u8
|
||||
};
|
||||
TXCOUNTR { bits }
|
||||
}
|
||||
#[doc = "Bits 16:17 - Receive Watermark"]
|
||||
#[inline]
|
||||
pub fn rxwater(&self) -> RXWATERR {
|
||||
let bits = {
|
||||
const MASK: u8 = 3;
|
||||
const OFFSET: u8 = 16;
|
||||
((self.bits >> OFFSET) & MASK as u32) as u8
|
||||
};
|
||||
RXWATERR { bits }
|
||||
}
|
||||
#[doc = "Bits 24:26 - Receive Counter"]
|
||||
#[inline]
|
||||
pub fn rxcount(&self) -> RXCOUNTR {
|
||||
let bits = {
|
||||
const MASK: u8 = 7;
|
||||
const OFFSET: u8 = 24;
|
||||
((self.bits >> OFFSET) & MASK as u32) as u8
|
||||
};
|
||||
RXCOUNTR { bits }
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 0 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
#[doc = "Bits 0:1 - Transmit Watermark"]
|
||||
#[inline]
|
||||
pub fn txwater(&mut self) -> _TXWATERW {
|
||||
_TXWATERW { w: self }
|
||||
}
|
||||
#[doc = "Bits 16:17 - Receive Watermark"]
|
||||
#[inline]
|
||||
pub fn rxwater(&mut self) -> _RXWATERW {
|
||||
_RXWATERW { w: self }
|
||||
}
|
||||
}
|
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@ -1,989 +0,0 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::DATA {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
#[doc = r" Value of the field"]
|
||||
pub struct R0T0R {
|
||||
bits: bool,
|
||||
}
|
||||
impl R0T0R {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
self.bits
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
}
|
||||
#[doc = r" Value of the field"]
|
||||
pub struct R1T1R {
|
||||
bits: bool,
|
||||
}
|
||||
impl R1T1R {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
self.bits
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
}
|
||||
#[doc = r" Value of the field"]
|
||||
pub struct R2T2R {
|
||||
bits: bool,
|
||||
}
|
||||
impl R2T2R {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
self.bits
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
}
|
||||
#[doc = r" Value of the field"]
|
||||
pub struct R3T3R {
|
||||
bits: bool,
|
||||
}
|
||||
impl R3T3R {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
self.bits
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
}
|
||||
#[doc = r" Value of the field"]
|
||||
pub struct R4T4R {
|
||||
bits: bool,
|
||||
}
|
||||
impl R4T4R {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
self.bits
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
}
|
||||
#[doc = r" Value of the field"]
|
||||
pub struct R5T5R {
|
||||
bits: bool,
|
||||
}
|
||||
impl R5T5R {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
self.bits
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
}
|
||||
#[doc = r" Value of the field"]
|
||||
pub struct R6T6R {
|
||||
bits: bool,
|
||||
}
|
||||
impl R6T6R {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
self.bits
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
}
|
||||
#[doc = r" Value of the field"]
|
||||
pub struct R7T7R {
|
||||
bits: bool,
|
||||
}
|
||||
impl R7T7R {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
self.bits
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
}
|
||||
#[doc = r" Value of the field"]
|
||||
pub struct R8T8R {
|
||||
bits: bool,
|
||||
}
|
||||
impl R8T8R {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
self.bits
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
}
|
||||
#[doc = r" Value of the field"]
|
||||
pub struct R9T9R {
|
||||
bits: bool,
|
||||
}
|
||||
impl R9T9R {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
self.bits
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `IDLINE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum IDLINER {
|
||||
#[doc = "Receiver was not idle before receiving this character."] _0,
|
||||
#[doc = "Receiver was idle before receiving this character."] _1,
|
||||
}
|
||||
impl IDLINER {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
match *self {
|
||||
IDLINER::_0 => false,
|
||||
IDLINER::_1 => true,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: bool) -> IDLINER {
|
||||
match value {
|
||||
false => IDLINER::_0,
|
||||
true => IDLINER::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == IDLINER::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == IDLINER::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `RXEMPT`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum RXEMPTR {
|
||||
#[doc = "Receive buffer contains valid data."] _0,
|
||||
#[doc = "Receive buffer is empty, data returned on read is not valid."] _1,
|
||||
}
|
||||
impl RXEMPTR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
match *self {
|
||||
RXEMPTR::_0 => false,
|
||||
RXEMPTR::_1 => true,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: bool) -> RXEMPTR {
|
||||
match value {
|
||||
false => RXEMPTR::_0,
|
||||
true => RXEMPTR::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == RXEMPTR::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == RXEMPTR::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `FRETSC`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum FRETSCR {
|
||||
#[doc = "The dataword was received without a frame error on read, or transmit a normal character on write."]
|
||||
_0,
|
||||
#[doc = "The dataword was received with a frame error, or transmit an idle or break character on transmit."]
|
||||
_1,
|
||||
}
|
||||
impl FRETSCR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
match *self {
|
||||
FRETSCR::_0 => false,
|
||||
FRETSCR::_1 => true,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: bool) -> FRETSCR {
|
||||
match value {
|
||||
false => FRETSCR::_0,
|
||||
true => FRETSCR::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == FRETSCR::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == FRETSCR::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `PARITYE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum PARITYER {
|
||||
#[doc = "The dataword was received without a parity error."] _0,
|
||||
#[doc = "The dataword was received with a parity error."] _1,
|
||||
}
|
||||
impl PARITYER {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
match *self {
|
||||
PARITYER::_0 => false,
|
||||
PARITYER::_1 => true,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: bool) -> PARITYER {
|
||||
match value {
|
||||
false => PARITYER::_0,
|
||||
true => PARITYER::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == PARITYER::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == PARITYER::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `NOISY`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum NOISYR {
|
||||
#[doc = "The dataword was received without noise."] _0,
|
||||
#[doc = "The data was received with noise."] _1,
|
||||
}
|
||||
impl NOISYR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
match *self {
|
||||
NOISYR::_0 => false,
|
||||
NOISYR::_1 => true,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: bool) -> NOISYR {
|
||||
match value {
|
||||
false => NOISYR::_0,
|
||||
true => NOISYR::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == NOISYR::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == NOISYR::_1
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _R0T0W<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _R0T0W<'a> {
|
||||
#[doc = r" Sets the field bit"]
|
||||
pub fn set_bit(self) -> &'a mut W {
|
||||
self.bit(true)
|
||||
}
|
||||
#[doc = r" Clears the field bit"]
|
||||
pub fn clear_bit(self) -> &'a mut W {
|
||||
self.bit(false)
|
||||
}
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub fn bit(self, value: bool) -> &'a mut W {
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 0;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _R1T1W<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _R1T1W<'a> {
|
||||
#[doc = r" Sets the field bit"]
|
||||
pub fn set_bit(self) -> &'a mut W {
|
||||
self.bit(true)
|
||||
}
|
||||
#[doc = r" Clears the field bit"]
|
||||
pub fn clear_bit(self) -> &'a mut W {
|
||||
self.bit(false)
|
||||
}
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub fn bit(self, value: bool) -> &'a mut W {
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 1;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _R2T2W<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _R2T2W<'a> {
|
||||
#[doc = r" Sets the field bit"]
|
||||
pub fn set_bit(self) -> &'a mut W {
|
||||
self.bit(true)
|
||||
}
|
||||
#[doc = r" Clears the field bit"]
|
||||
pub fn clear_bit(self) -> &'a mut W {
|
||||
self.bit(false)
|
||||
}
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub fn bit(self, value: bool) -> &'a mut W {
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 2;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _R3T3W<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _R3T3W<'a> {
|
||||
#[doc = r" Sets the field bit"]
|
||||
pub fn set_bit(self) -> &'a mut W {
|
||||
self.bit(true)
|
||||
}
|
||||
#[doc = r" Clears the field bit"]
|
||||
pub fn clear_bit(self) -> &'a mut W {
|
||||
self.bit(false)
|
||||
}
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub fn bit(self, value: bool) -> &'a mut W {
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 3;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _R4T4W<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _R4T4W<'a> {
|
||||
#[doc = r" Sets the field bit"]
|
||||
pub fn set_bit(self) -> &'a mut W {
|
||||
self.bit(true)
|
||||
}
|
||||
#[doc = r" Clears the field bit"]
|
||||
pub fn clear_bit(self) -> &'a mut W {
|
||||
self.bit(false)
|
||||
}
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub fn bit(self, value: bool) -> &'a mut W {
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 4;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _R5T5W<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _R5T5W<'a> {
|
||||
#[doc = r" Sets the field bit"]
|
||||
pub fn set_bit(self) -> &'a mut W {
|
||||
self.bit(true)
|
||||
}
|
||||
#[doc = r" Clears the field bit"]
|
||||
pub fn clear_bit(self) -> &'a mut W {
|
||||
self.bit(false)
|
||||
}
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub fn bit(self, value: bool) -> &'a mut W {
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 5;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _R6T6W<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _R6T6W<'a> {
|
||||
#[doc = r" Sets the field bit"]
|
||||
pub fn set_bit(self) -> &'a mut W {
|
||||
self.bit(true)
|
||||
}
|
||||
#[doc = r" Clears the field bit"]
|
||||
pub fn clear_bit(self) -> &'a mut W {
|
||||
self.bit(false)
|
||||
}
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub fn bit(self, value: bool) -> &'a mut W {
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 6;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _R7T7W<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _R7T7W<'a> {
|
||||
#[doc = r" Sets the field bit"]
|
||||
pub fn set_bit(self) -> &'a mut W {
|
||||
self.bit(true)
|
||||
}
|
||||
#[doc = r" Clears the field bit"]
|
||||
pub fn clear_bit(self) -> &'a mut W {
|
||||
self.bit(false)
|
||||
}
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub fn bit(self, value: bool) -> &'a mut W {
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 7;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _R8T8W<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _R8T8W<'a> {
|
||||
#[doc = r" Sets the field bit"]
|
||||
pub fn set_bit(self) -> &'a mut W {
|
||||
self.bit(true)
|
||||
}
|
||||
#[doc = r" Clears the field bit"]
|
||||
pub fn clear_bit(self) -> &'a mut W {
|
||||
self.bit(false)
|
||||
}
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub fn bit(self, value: bool) -> &'a mut W {
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 8;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _R9T9W<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _R9T9W<'a> {
|
||||
#[doc = r" Sets the field bit"]
|
||||
pub fn set_bit(self) -> &'a mut W {
|
||||
self.bit(true)
|
||||
}
|
||||
#[doc = r" Clears the field bit"]
|
||||
pub fn clear_bit(self) -> &'a mut W {
|
||||
self.bit(false)
|
||||
}
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub fn bit(self, value: bool) -> &'a mut W {
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 9;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = "Values that can be written to the field `FRETSC`"]
|
||||
pub enum FRETSCW {
|
||||
#[doc = "The dataword was received without a frame error on read, or transmit a normal character on write."]
|
||||
_0,
|
||||
#[doc = "The dataword was received with a frame error, or transmit an idle or break character on transmit."]
|
||||
_1,
|
||||
}
|
||||
impl FRETSCW {
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _bits(&self) -> bool {
|
||||
match *self {
|
||||
FRETSCW::_0 => false,
|
||||
FRETSCW::_1 => true,
|
||||
}
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _FRETSCW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _FRETSCW<'a> {
|
||||
#[doc = r" Writes `variant` to the field"]
|
||||
#[inline]
|
||||
pub fn variant(self, variant: FRETSCW) -> &'a mut W {
|
||||
{
|
||||
self.bit(variant._bits())
|
||||
}
|
||||
}
|
||||
#[doc = "The dataword was received without a frame error on read, or transmit a normal character on write."]
|
||||
#[inline]
|
||||
pub fn _0(self) -> &'a mut W {
|
||||
self.variant(FRETSCW::_0)
|
||||
}
|
||||
#[doc = "The dataword was received with a frame error, or transmit an idle or break character on transmit."]
|
||||
#[inline]
|
||||
pub fn _1(self) -> &'a mut W {
|
||||
self.variant(FRETSCW::_1)
|
||||
}
|
||||
#[doc = r" Sets the field bit"]
|
||||
pub fn set_bit(self) -> &'a mut W {
|
||||
self.bit(true)
|
||||
}
|
||||
#[doc = r" Clears the field bit"]
|
||||
pub fn clear_bit(self) -> &'a mut W {
|
||||
self.bit(false)
|
||||
}
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub fn bit(self, value: bool) -> &'a mut W {
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 13;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
#[doc = "Bit 0 - R0T0"]
|
||||
#[inline]
|
||||
pub fn r0t0(&self) -> R0T0R {
|
||||
let bits = {
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 0;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
};
|
||||
R0T0R { bits }
|
||||
}
|
||||
#[doc = "Bit 1 - R1T1"]
|
||||
#[inline]
|
||||
pub fn r1t1(&self) -> R1T1R {
|
||||
let bits = {
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 1;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
};
|
||||
R1T1R { bits }
|
||||
}
|
||||
#[doc = "Bit 2 - R2T2"]
|
||||
#[inline]
|
||||
pub fn r2t2(&self) -> R2T2R {
|
||||
let bits = {
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 2;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
};
|
||||
R2T2R { bits }
|
||||
}
|
||||
#[doc = "Bit 3 - R3T3"]
|
||||
#[inline]
|
||||
pub fn r3t3(&self) -> R3T3R {
|
||||
let bits = {
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 3;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
};
|
||||
R3T3R { bits }
|
||||
}
|
||||
#[doc = "Bit 4 - R4T4"]
|
||||
#[inline]
|
||||
pub fn r4t4(&self) -> R4T4R {
|
||||
let bits = {
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 4;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
};
|
||||
R4T4R { bits }
|
||||
}
|
||||
#[doc = "Bit 5 - R5T5"]
|
||||
#[inline]
|
||||
pub fn r5t5(&self) -> R5T5R {
|
||||
let bits = {
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 5;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
};
|
||||
R5T5R { bits }
|
||||
}
|
||||
#[doc = "Bit 6 - R6T6"]
|
||||
#[inline]
|
||||
pub fn r6t6(&self) -> R6T6R {
|
||||
let bits = {
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 6;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
};
|
||||
R6T6R { bits }
|
||||
}
|
||||
#[doc = "Bit 7 - R7T7"]
|
||||
#[inline]
|
||||
pub fn r7t7(&self) -> R7T7R {
|
||||
let bits = {
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 7;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
};
|
||||
R7T7R { bits }
|
||||
}
|
||||
#[doc = "Bit 8 - R8T8"]
|
||||
#[inline]
|
||||
pub fn r8t8(&self) -> R8T8R {
|
||||
let bits = {
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 8;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
};
|
||||
R8T8R { bits }
|
||||
}
|
||||
#[doc = "Bit 9 - R9T9"]
|
||||
#[inline]
|
||||
pub fn r9t9(&self) -> R9T9R {
|
||||
let bits = {
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 9;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
};
|
||||
R9T9R { bits }
|
||||
}
|
||||
#[doc = "Bit 11 - Idle Line"]
|
||||
#[inline]
|
||||
pub fn idline(&self) -> IDLINER {
|
||||
IDLINER::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 11;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
#[doc = "Bit 12 - Receive Buffer Empty"]
|
||||
#[inline]
|
||||
pub fn rxempt(&self) -> RXEMPTR {
|
||||
RXEMPTR::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 12;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
#[doc = "Bit 13 - Frame Error / Transmit Special Character"]
|
||||
#[inline]
|
||||
pub fn fretsc(&self) -> FRETSCR {
|
||||
FRETSCR::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 13;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
#[doc = "Bit 14 - PARITYE"]
|
||||
#[inline]
|
||||
pub fn paritye(&self) -> PARITYER {
|
||||
PARITYER::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 14;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
#[doc = "Bit 15 - NOISY"]
|
||||
#[inline]
|
||||
pub fn noisy(&self) -> NOISYR {
|
||||
NOISYR::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 15;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 4096 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
#[doc = "Bit 0 - R0T0"]
|
||||
#[inline]
|
||||
pub fn r0t0(&mut self) -> _R0T0W {
|
||||
_R0T0W { w: self }
|
||||
}
|
||||
#[doc = "Bit 1 - R1T1"]
|
||||
#[inline]
|
||||
pub fn r1t1(&mut self) -> _R1T1W {
|
||||
_R1T1W { w: self }
|
||||
}
|
||||
#[doc = "Bit 2 - R2T2"]
|
||||
#[inline]
|
||||
pub fn r2t2(&mut self) -> _R2T2W {
|
||||
_R2T2W { w: self }
|
||||
}
|
||||
#[doc = "Bit 3 - R3T3"]
|
||||
#[inline]
|
||||
pub fn r3t3(&mut self) -> _R3T3W {
|
||||
_R3T3W { w: self }
|
||||
}
|
||||
#[doc = "Bit 4 - R4T4"]
|
||||
#[inline]
|
||||
pub fn r4t4(&mut self) -> _R4T4W {
|
||||
_R4T4W { w: self }
|
||||
}
|
||||
#[doc = "Bit 5 - R5T5"]
|
||||
#[inline]
|
||||
pub fn r5t5(&mut self) -> _R5T5W {
|
||||
_R5T5W { w: self }
|
||||
}
|
||||
#[doc = "Bit 6 - R6T6"]
|
||||
#[inline]
|
||||
pub fn r6t6(&mut self) -> _R6T6W {
|
||||
_R6T6W { w: self }
|
||||
}
|
||||
#[doc = "Bit 7 - R7T7"]
|
||||
#[inline]
|
||||
pub fn r7t7(&mut self) -> _R7T7W {
|
||||
_R7T7W { w: self }
|
||||
}
|
||||
#[doc = "Bit 8 - R8T8"]
|
||||
#[inline]
|
||||
pub fn r8t8(&mut self) -> _R8T8W {
|
||||
_R8T8W { w: self }
|
||||
}
|
||||
#[doc = "Bit 9 - R9T9"]
|
||||
#[inline]
|
||||
pub fn r9t9(&mut self) -> _R9T9W {
|
||||
_R9T9W { w: self }
|
||||
}
|
||||
#[doc = "Bit 13 - Frame Error / Transmit Special Character"]
|
||||
#[inline]
|
||||
pub fn fretsc(&mut self) -> _FRETSCW {
|
||||
_FRETSCW { w: self }
|
||||
}
|
||||
}
|
File diff suppressed because it is too large
Load Diff
@ -1,179 +0,0 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::GLOBAL {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `RST`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum RSTR {
|
||||
#[doc = "Module is not reset."] _0,
|
||||
#[doc = "Module is reset."] _1,
|
||||
}
|
||||
impl RSTR {
|
||||
#[doc = r" Returns `true` if the bit is clear (0)"]
|
||||
#[inline]
|
||||
pub fn bit_is_clear(&self) -> bool {
|
||||
!self.bit()
|
||||
}
|
||||
#[doc = r" Returns `true` if the bit is set (1)"]
|
||||
#[inline]
|
||||
pub fn bit_is_set(&self) -> bool {
|
||||
self.bit()
|
||||
}
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bit(&self) -> bool {
|
||||
match *self {
|
||||
RSTR::_0 => false,
|
||||
RSTR::_1 => true,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: bool) -> RSTR {
|
||||
match value {
|
||||
false => RSTR::_0,
|
||||
true => RSTR::_1,
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0`"]
|
||||
#[inline]
|
||||
pub fn is_0(&self) -> bool {
|
||||
*self == RSTR::_0
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_1`"]
|
||||
#[inline]
|
||||
pub fn is_1(&self) -> bool {
|
||||
*self == RSTR::_1
|
||||
}
|
||||
}
|
||||
#[doc = "Values that can be written to the field `RST`"]
|
||||
pub enum RSTW {
|
||||
#[doc = "Module is not reset."] _0,
|
||||
#[doc = "Module is reset."] _1,
|
||||
}
|
||||
impl RSTW {
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _bits(&self) -> bool {
|
||||
match *self {
|
||||
RSTW::_0 => false,
|
||||
RSTW::_1 => true,
|
||||
}
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _RSTW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _RSTW<'a> {
|
||||
#[doc = r" Writes `variant` to the field"]
|
||||
#[inline]
|
||||
pub fn variant(self, variant: RSTW) -> &'a mut W {
|
||||
{
|
||||
self.bit(variant._bits())
|
||||
}
|
||||
}
|
||||
#[doc = "Module is not reset."]
|
||||
#[inline]
|
||||
pub fn _0(self) -> &'a mut W {
|
||||
self.variant(RSTW::_0)
|
||||
}
|
||||
#[doc = "Module is reset."]
|
||||
#[inline]
|
||||
pub fn _1(self) -> &'a mut W {
|
||||
self.variant(RSTW::_1)
|
||||
}
|
||||
#[doc = r" Sets the field bit"]
|
||||
pub fn set_bit(self) -> &'a mut W {
|
||||
self.bit(true)
|
||||
}
|
||||
#[doc = r" Clears the field bit"]
|
||||
pub fn clear_bit(self) -> &'a mut W {
|
||||
self.bit(false)
|
||||
}
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub fn bit(self, value: bool) -> &'a mut W {
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 1;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
#[doc = "Bit 1 - Software Reset"]
|
||||
#[inline]
|
||||
pub fn rst(&self) -> RSTR {
|
||||
RSTR::_from({
|
||||
const MASK: bool = true;
|
||||
const OFFSET: u8 = 1;
|
||||
((self.bits >> OFFSET) & MASK as u32) != 0
|
||||
})
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 0 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
#[doc = "Bit 1 - Software Reset"]
|
||||
#[inline]
|
||||
pub fn rst(&mut self) -> _RSTW {
|
||||
_RSTW { w: self }
|
||||
}
|
||||
}
|
@ -1,146 +0,0 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::MATCH {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
#[doc = r" Value of the field"]
|
||||
pub struct MA1R {
|
||||
bits: u16,
|
||||
}
|
||||
impl MA1R {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u16 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
#[doc = r" Value of the field"]
|
||||
pub struct MA2R {
|
||||
bits: u16,
|
||||
}
|
||||
impl MA2R {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u16 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _MA1W<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _MA1W<'a> {
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(self, value: u16) -> &'a mut W {
|
||||
const MASK: u16 = 1023;
|
||||
const OFFSET: u8 = 0;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _MA2W<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _MA2W<'a> {
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(self, value: u16) -> &'a mut W {
|
||||
const MASK: u16 = 1023;
|
||||
const OFFSET: u8 = 16;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
#[doc = "Bits 0:9 - Match Address 1"]
|
||||
#[inline]
|
||||
pub fn ma1(&self) -> MA1R {
|
||||
let bits = {
|
||||
const MASK: u16 = 1023;
|
||||
const OFFSET: u8 = 0;
|
||||
((self.bits >> OFFSET) & MASK as u32) as u16
|
||||
};
|
||||
MA1R { bits }
|
||||
}
|
||||
#[doc = "Bits 16:25 - Match Address 2"]
|
||||
#[inline]
|
||||
pub fn ma2(&self) -> MA2R {
|
||||
let bits = {
|
||||
const MASK: u16 = 1023;
|
||||
const OFFSET: u8 = 16;
|
||||
((self.bits >> OFFSET) & MASK as u32) as u16
|
||||
};
|
||||
MA2R { bits }
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 0 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
#[doc = "Bits 0:9 - Match Address 1"]
|
||||
#[inline]
|
||||
pub fn ma1(&mut self) -> _MA1W {
|
||||
_MA1W { w: self }
|
||||
}
|
||||
#[doc = "Bits 16:25 - Match Address 2"]
|
||||
#[inline]
|
||||
pub fn ma2(&mut self) -> _MA2W {
|
||||
_MA2W { w: self }
|
||||
}
|
||||
}
|
@ -1,89 +0,0 @@
|
||||
use vcell::VolatileCell;
|
||||
#[doc = r" Register block"]
|
||||
#[repr(C)]
|
||||
pub struct RegisterBlock {
|
||||
#[doc = "0x00 - Version ID Register"] pub verid: VERID,
|
||||
#[doc = "0x04 - Parameter Register"] pub param: PARAM,
|
||||
#[doc = "0x08 - LPUART Global Register"] pub global: GLOBAL,
|
||||
#[doc = "0x0c - LPUART Pin Configuration Register"] pub pincfg: PINCFG,
|
||||
#[doc = "0x10 - LPUART Baud Rate Register"] pub baud: BAUD,
|
||||
#[doc = "0x14 - LPUART Status Register"] pub stat: STAT,
|
||||
#[doc = "0x18 - LPUART Control Register"] pub ctrl: CTRL,
|
||||
#[doc = "0x1c - LPUART Data Register"] pub data: DATA,
|
||||
#[doc = "0x20 - LPUART Match Address Register"] pub match_: MATCH,
|
||||
#[doc = "0x24 - LPUART Modem IrDA Register"] pub modir: MODIR,
|
||||
#[doc = "0x28 - LPUART FIFO Register"] pub fifo: FIFO,
|
||||
#[doc = "0x2c - LPUART Watermark Register"] pub water: WATER,
|
||||
}
|
||||
#[doc = "Version ID Register"]
|
||||
pub struct VERID {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "Version ID Register"]
|
||||
pub mod verid;
|
||||
#[doc = "Parameter Register"]
|
||||
pub struct PARAM {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "Parameter Register"]
|
||||
pub mod param;
|
||||
#[doc = "LPUART Global Register"]
|
||||
pub struct GLOBAL {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "LPUART Global Register"]
|
||||
pub mod global;
|
||||
#[doc = "LPUART Pin Configuration Register"]
|
||||
pub struct PINCFG {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "LPUART Pin Configuration Register"]
|
||||
pub mod pincfg;
|
||||
#[doc = "LPUART Baud Rate Register"]
|
||||
pub struct BAUD {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "LPUART Baud Rate Register"]
|
||||
pub mod baud;
|
||||
#[doc = "LPUART Status Register"]
|
||||
pub struct STAT {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "LPUART Status Register"]
|
||||
pub mod stat;
|
||||
#[doc = "LPUART Control Register"]
|
||||
pub struct CTRL {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "LPUART Control Register"]
|
||||
pub mod ctrl;
|
||||
#[doc = "LPUART Data Register"]
|
||||
pub struct DATA {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "LPUART Data Register"]
|
||||
pub mod data;
|
||||
#[doc = "LPUART Match Address Register"]
|
||||
pub struct MATCH {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "LPUART Match Address Register"]
|
||||
pub mod match_;
|
||||
#[doc = "LPUART Modem IrDA Register"]
|
||||
pub struct MODIR {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "LPUART Modem IrDA Register"]
|
||||
pub mod modir;
|
||||
#[doc = "LPUART FIFO Register"]
|
||||
pub struct FIFO {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "LPUART FIFO Register"]
|
||||
pub mod fifo;
|
||||
#[doc = "LPUART Watermark Register"]
|
||||
pub struct WATER {
|
||||
register: VolatileCell<u32>,
|
||||
}
|
||||
#[doc = "LPUART Watermark Register"]
|
||||
pub mod water;
|
File diff suppressed because it is too large
Load Diff
@ -1,62 +0,0 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PARAM {
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
}
|
||||
}
|
||||
#[doc = r" Value of the field"]
|
||||
pub struct TXFIFOR {
|
||||
bits: u8,
|
||||
}
|
||||
impl TXFIFOR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u8 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
#[doc = r" Value of the field"]
|
||||
pub struct RXFIFOR {
|
||||
bits: u8,
|
||||
}
|
||||
impl RXFIFOR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u8 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
#[doc = "Bits 0:7 - Transmit FIFO Size"]
|
||||
#[inline]
|
||||
pub fn txfifo(&self) -> TXFIFOR {
|
||||
let bits = {
|
||||
const MASK: u8 = 255;
|
||||
const OFFSET: u8 = 0;
|
||||
((self.bits >> OFFSET) & MASK as u32) as u8
|
||||
};
|
||||
TXFIFOR { bits }
|
||||
}
|
||||
#[doc = "Bits 8:15 - Receive FIFO Size"]
|
||||
#[inline]
|
||||
pub fn rxfifo(&self) -> RXFIFOR {
|
||||
let bits = {
|
||||
const MASK: u8 = 255;
|
||||
const OFFSET: u8 = 8;
|
||||
((self.bits >> OFFSET) & MASK as u32) as u8
|
||||
};
|
||||
RXFIFOR { bits }
|
||||
}
|
||||
}
|
@ -1,194 +0,0 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::PINCFG {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `TRGSEL`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum TRGSELR {
|
||||
#[doc = "Input trigger is disabled."] _00,
|
||||
#[doc = "Input trigger is used instead of RXD pin input."] _01,
|
||||
#[doc = "Input trigger is used instead of CTS_B pin input."] _10,
|
||||
#[doc = "Input trigger is used to modulate the TXD pin output. The TXD pin output (after TXINV configuration) is ANDed with the input trigger."]
|
||||
_11,
|
||||
}
|
||||
impl TRGSELR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u8 {
|
||||
match *self {
|
||||
TRGSELR::_00 => 0,
|
||||
TRGSELR::_01 => 1,
|
||||
TRGSELR::_10 => 2,
|
||||
TRGSELR::_11 => 3,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: u8) -> TRGSELR {
|
||||
match value {
|
||||
0 => TRGSELR::_00,
|
||||
1 => TRGSELR::_01,
|
||||
2 => TRGSELR::_10,
|
||||
3 => TRGSELR::_11,
|
||||
_ => unreachable!(),
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_00`"]
|
||||
#[inline]
|
||||
pub fn is_00(&self) -> bool {
|
||||
*self == TRGSELR::_00
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_01`"]
|
||||
#[inline]
|
||||
pub fn is_01(&self) -> bool {
|
||||
*self == TRGSELR::_01
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_10`"]
|
||||
#[inline]
|
||||
pub fn is_10(&self) -> bool {
|
||||
*self == TRGSELR::_10
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_11`"]
|
||||
#[inline]
|
||||
pub fn is_11(&self) -> bool {
|
||||
*self == TRGSELR::_11
|
||||
}
|
||||
}
|
||||
#[doc = "Values that can be written to the field `TRGSEL`"]
|
||||
pub enum TRGSELW {
|
||||
#[doc = "Input trigger is disabled."] _00,
|
||||
#[doc = "Input trigger is used instead of RXD pin input."] _01,
|
||||
#[doc = "Input trigger is used instead of CTS_B pin input."] _10,
|
||||
#[doc = "Input trigger is used to modulate the TXD pin output. The TXD pin output (after TXINV configuration) is ANDed with the input trigger."]
|
||||
_11,
|
||||
}
|
||||
impl TRGSELW {
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _bits(&self) -> u8 {
|
||||
match *self {
|
||||
TRGSELW::_00 => 0,
|
||||
TRGSELW::_01 => 1,
|
||||
TRGSELW::_10 => 2,
|
||||
TRGSELW::_11 => 3,
|
||||
}
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _TRGSELW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _TRGSELW<'a> {
|
||||
#[doc = r" Writes `variant` to the field"]
|
||||
#[inline]
|
||||
pub fn variant(self, variant: TRGSELW) -> &'a mut W {
|
||||
{
|
||||
self.bits(variant._bits())
|
||||
}
|
||||
}
|
||||
#[doc = "Input trigger is disabled."]
|
||||
#[inline]
|
||||
pub fn _00(self) -> &'a mut W {
|
||||
self.variant(TRGSELW::_00)
|
||||
}
|
||||
#[doc = "Input trigger is used instead of RXD pin input."]
|
||||
#[inline]
|
||||
pub fn _01(self) -> &'a mut W {
|
||||
self.variant(TRGSELW::_01)
|
||||
}
|
||||
#[doc = "Input trigger is used instead of CTS_B pin input."]
|
||||
#[inline]
|
||||
pub fn _10(self) -> &'a mut W {
|
||||
self.variant(TRGSELW::_10)
|
||||
}
|
||||
#[doc = "Input trigger is used to modulate the TXD pin output. The TXD pin output (after TXINV configuration) is ANDed with the input trigger."]
|
||||
#[inline]
|
||||
pub fn _11(self) -> &'a mut W {
|
||||
self.variant(TRGSELW::_11)
|
||||
}
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub fn bits(self, value: u8) -> &'a mut W {
|
||||
const MASK: u8 = 3;
|
||||
const OFFSET: u8 = 0;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
#[doc = "Bits 0:1 - Trigger Select"]
|
||||
#[inline]
|
||||
pub fn trgsel(&self) -> TRGSELR {
|
||||
TRGSELR::_from({
|
||||
const MASK: u8 = 3;
|
||||
const OFFSET: u8 = 0;
|
||||
((self.bits >> OFFSET) & MASK as u32) as u8
|
||||
})
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 0 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
#[doc = "Bits 0:1 - Trigger Select"]
|
||||
#[inline]
|
||||
pub fn trgsel(&mut self) -> _TRGSELW {
|
||||
_TRGSELW { w: self }
|
||||
}
|
||||
}
|
File diff suppressed because it is too large
Load Diff
@ -1,109 +0,0 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::VERID {
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
}
|
||||
}
|
||||
#[doc = "Possible values of the field `FEATURE`"]
|
||||
#[derive(Clone, Copy, Debug, PartialEq)]
|
||||
pub enum FEATURER {
|
||||
#[doc = "Standard feature set."] _0000000000000001,
|
||||
#[doc = "Standard feature set with MODEM/IrDA support."] _0000000000000011,
|
||||
#[doc = r" Reserved"] _Reserved(u16),
|
||||
}
|
||||
impl FEATURER {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u16 {
|
||||
match *self {
|
||||
FEATURER::_0000000000000001 => 1,
|
||||
FEATURER::_0000000000000011 => 3,
|
||||
FEATURER::_Reserved(bits) => bits,
|
||||
}
|
||||
}
|
||||
#[allow(missing_docs)]
|
||||
#[doc(hidden)]
|
||||
#[inline]
|
||||
pub fn _from(value: u16) -> FEATURER {
|
||||
match value {
|
||||
1 => FEATURER::_0000000000000001,
|
||||
3 => FEATURER::_0000000000000011,
|
||||
i => FEATURER::_Reserved(i),
|
||||
}
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0000000000000001`"]
|
||||
#[inline]
|
||||
pub fn is_0000000000000001(&self) -> bool {
|
||||
*self == FEATURER::_0000000000000001
|
||||
}
|
||||
#[doc = "Checks if the value of the field is `_0000000000000011`"]
|
||||
#[inline]
|
||||
pub fn is_0000000000000011(&self) -> bool {
|
||||
*self == FEATURER::_0000000000000011
|
||||
}
|
||||
}
|
||||
#[doc = r" Value of the field"]
|
||||
pub struct MINORR {
|
||||
bits: u8,
|
||||
}
|
||||
impl MINORR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u8 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
#[doc = r" Value of the field"]
|
||||
pub struct MAJORR {
|
||||
bits: u8,
|
||||
}
|
||||
impl MAJORR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u8 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
#[doc = "Bits 0:15 - Feature Identification Number"]
|
||||
#[inline]
|
||||
pub fn feature(&self) -> FEATURER {
|
||||
FEATURER::_from({
|
||||
const MASK: u16 = 65535;
|
||||
const OFFSET: u8 = 0;
|
||||
((self.bits >> OFFSET) & MASK as u32) as u16
|
||||
})
|
||||
}
|
||||
#[doc = "Bits 16:23 - Minor Version Number"]
|
||||
#[inline]
|
||||
pub fn minor(&self) -> MINORR {
|
||||
let bits = {
|
||||
const MASK: u8 = 255;
|
||||
const OFFSET: u8 = 16;
|
||||
((self.bits >> OFFSET) & MASK as u32) as u8
|
||||
};
|
||||
MINORR { bits }
|
||||
}
|
||||
#[doc = "Bits 24:31 - Major Version Number"]
|
||||
#[inline]
|
||||
pub fn major(&self) -> MAJORR {
|
||||
let bits = {
|
||||
const MASK: u8 = 255;
|
||||
const OFFSET: u8 = 24;
|
||||
((self.bits >> OFFSET) & MASK as u32) as u8
|
||||
};
|
||||
MAJORR { bits }
|
||||
}
|
||||
}
|
@ -1,188 +0,0 @@
|
||||
#[doc = r" Value read from the register"]
|
||||
pub struct R {
|
||||
bits: u32,
|
||||
}
|
||||
#[doc = r" Value to write to the register"]
|
||||
pub struct W {
|
||||
bits: u32,
|
||||
}
|
||||
impl super::WATER {
|
||||
#[doc = r" Modifies the contents of the register"]
|
||||
#[inline]
|
||||
pub fn modify<F>(&self, f: F)
|
||||
where
|
||||
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
|
||||
{
|
||||
let bits = self.register.get();
|
||||
let r = R { bits: bits };
|
||||
let mut w = W { bits: bits };
|
||||
f(&r, &mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Reads the contents of the register"]
|
||||
#[inline]
|
||||
pub fn read(&self) -> R {
|
||||
R {
|
||||
bits: self.register.get(),
|
||||
}
|
||||
}
|
||||
#[doc = r" Writes to the register"]
|
||||
#[inline]
|
||||
pub fn write<F>(&self, f: F)
|
||||
where
|
||||
F: FnOnce(&mut W) -> &mut W,
|
||||
{
|
||||
let mut w = W::reset_value();
|
||||
f(&mut w);
|
||||
self.register.set(w.bits);
|
||||
}
|
||||
#[doc = r" Writes the reset value to the register"]
|
||||
#[inline]
|
||||
pub fn reset(&self) {
|
||||
self.write(|w| w)
|
||||
}
|
||||
}
|
||||
#[doc = r" Value of the field"]
|
||||
pub struct TXWATERR {
|
||||
bits: u8,
|
||||
}
|
||||
impl TXWATERR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u8 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
#[doc = r" Value of the field"]
|
||||
pub struct TXCOUNTR {
|
||||
bits: u8,
|
||||
}
|
||||
impl TXCOUNTR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u8 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
#[doc = r" Value of the field"]
|
||||
pub struct RXWATERR {
|
||||
bits: u8,
|
||||
}
|
||||
impl RXWATERR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u8 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
#[doc = r" Value of the field"]
|
||||
pub struct RXCOUNTR {
|
||||
bits: u8,
|
||||
}
|
||||
impl RXCOUNTR {
|
||||
#[doc = r" Value of the field as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u8 {
|
||||
self.bits
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _TXWATERW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _TXWATERW<'a> {
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(self, value: u8) -> &'a mut W {
|
||||
const MASK: u8 = 3;
|
||||
const OFFSET: u8 = 0;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
#[doc = r" Proxy"]
|
||||
pub struct _RXWATERW<'a> {
|
||||
w: &'a mut W,
|
||||
}
|
||||
impl<'a> _RXWATERW<'a> {
|
||||
#[doc = r" Writes raw bits to the field"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(self, value: u8) -> &'a mut W {
|
||||
const MASK: u8 = 3;
|
||||
const OFFSET: u8 = 16;
|
||||
self.w.bits &= !((MASK as u32) << OFFSET);
|
||||
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||||
self.w
|
||||
}
|
||||
}
|
||||
impl R {
|
||||
#[doc = r" Value of the register as raw bits"]
|
||||
#[inline]
|
||||
pub fn bits(&self) -> u32 {
|
||||
self.bits
|
||||
}
|
||||
#[doc = "Bits 0:1 - Transmit Watermark"]
|
||||
#[inline]
|
||||
pub fn txwater(&self) -> TXWATERR {
|
||||
let bits = {
|
||||
const MASK: u8 = 3;
|
||||
const OFFSET: u8 = 0;
|
||||
((self.bits >> OFFSET) & MASK as u32) as u8
|
||||
};
|
||||
TXWATERR { bits }
|
||||
}
|
||||
#[doc = "Bits 8:10 - Transmit Counter"]
|
||||
#[inline]
|
||||
pub fn txcount(&self) -> TXCOUNTR {
|
||||
let bits = {
|
||||
const MASK: u8 = 7;
|
||||
const OFFSET: u8 = 8;
|
||||
((self.bits >> OFFSET) & MASK as u32) as u8
|
||||
};
|
||||
TXCOUNTR { bits }
|
||||
}
|
||||
#[doc = "Bits 16:17 - Receive Watermark"]
|
||||
#[inline]
|
||||
pub fn rxwater(&self) -> RXWATERR {
|
||||
let bits = {
|
||||
const MASK: u8 = 3;
|
||||
const OFFSET: u8 = 16;
|
||||
((self.bits >> OFFSET) & MASK as u32) as u8
|
||||
};
|
||||
RXWATERR { bits }
|
||||
}
|
||||
#[doc = "Bits 24:26 - Receive Counter"]
|
||||
#[inline]
|
||||
pub fn rxcount(&self) -> RXCOUNTR {
|
||||
let bits = {
|
||||
const MASK: u8 = 7;
|
||||
const OFFSET: u8 = 24;
|
||||
((self.bits >> OFFSET) & MASK as u32) as u8
|
||||
};
|
||||
RXCOUNTR { bits }
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = r" Reset value of the register"]
|
||||
#[inline]
|
||||
pub fn reset_value() -> W {
|
||||
W { bits: 0 }
|
||||
}
|
||||
#[doc = r" Writes raw bits to the register"]
|
||||
#[inline]
|
||||
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||||
self.bits = bits;
|
||||
self
|
||||
}
|
||||
#[doc = "Bits 0:1 - Transmit Watermark"]
|
||||
#[inline]
|
||||
pub fn txwater(&mut self) -> _TXWATERW {
|
||||
_TXWATERW { w: self }
|
||||
}
|
||||
#[doc = "Bits 16:17 - Receive Watermark"]
|
||||
#[inline]
|
||||
pub fn rxwater(&mut self) -> _RXWATERW {
|
||||
_RXWATERW { w: self }
|
||||
}
|
||||
}
|
Loading…
Reference in New Issue
Block a user