diff --git a/S32K144.svd b/S32K144.svd index 8224d1c..531b8c6 100644 --- a/S32K144.svd +++ b/S32K144.svd @@ -113201,4444 +113201,31 @@ - LPUART1 + + + LPUART1 Universal Asynchronous Receiver/Transmitter LPUART LPUART1_ 0x4006B000 - - 0 - 0x30 - registers - LPUART1_RxTx 33 - - VERID - Version ID Register - 0 - 32 - read-only - 0x4010003 - 0xFFFFFFFF - - - FEATURE - Feature Identification Number - 0 - 16 - read-only - - - 0000000000000001 - Standard feature set. - #1 - - - 0000000000000011 - Standard feature set with MODEM/IrDA support. - #11 - - - - - MINOR - Minor Version Number - 16 - 8 - read-only - - - MAJOR - Major Version Number - 24 - 8 - read-only - - - - PARAM - Parameter Register - 0x4 - 32 - read-only - 0x202 - 0xFFFFFFFF - - - TXFIFO - Transmit FIFO Size - 0 - 8 - read-only - - - RXFIFO - Receive FIFO Size - 8 - 8 - read-only - - - - GLOBAL - LPUART Global Register - 0x8 - 32 - read-write - 0 - 0xFFFFFFFF - - - RST - Software Reset - 1 - 1 - read-write - - - 0 - Module is not reset. - #0 - - - 1 - Module is reset. - #1 - - - - - - PINCFG - LPUART Pin Configuration Register - 0xC - 32 - read-write - 0 - 0xFFFFFFFF - - - TRGSEL - Trigger Select - 0 - 2 - read-write - - - 00 - Input trigger is disabled. - #00 - - - 01 - Input trigger is used instead of RXD pin input. - #01 - - - 10 - Input trigger is used instead of CTS_B pin input. - #10 - - - 11 - Input trigger is used to modulate the TXD pin output. The TXD pin output (after TXINV configuration) is ANDed with the input trigger. - #11 - - - - - - BAUD - LPUART Baud Rate Register - 0x10 - 32 - read-write - 0xF000004 - 0xFFFFFFFF - - - SBR - Baud Rate Modulo Divisor. - 0 - 13 - read-write - - - SBNS - Stop Bit Number Select - 13 - 1 - read-write - - - 0 - One stop bit. - #0 - - - 1 - Two stop bits. - #1 - - - - - RXEDGIE - RX Input Active Edge Interrupt Enable - 14 - 1 - read-write - - - 0 - Hardware interrupts from LPUART_STAT[RXEDGIF] disabled. - #0 - - - 1 - Hardware interrupt requested when LPUART_STAT[RXEDGIF] flag is 1. - #1 - - - - - LBKDIE - LIN Break Detect Interrupt Enable - 15 - 1 - read-write - - - 0 - Hardware interrupts from LPUART_STAT[LBKDIF] disabled (use polling). - #0 - - - 1 - Hardware interrupt requested when LPUART_STAT[LBKDIF] flag is 1. - #1 - - - - - RESYNCDIS - Resynchronization Disable - 16 - 1 - read-write - - - 0 - Resynchronization during received data word is supported - #0 - - - 1 - Resynchronization during received data word is disabled - #1 - - - - - BOTHEDGE - Both Edge Sampling - 17 - 1 - read-write - - - 0 - Receiver samples input data using the rising edge of the baud rate clock. - #0 - - - 1 - Receiver samples input data using the rising and falling edge of the baud rate clock. - #1 - - - - - MATCFG - Match Configuration - 18 - 2 - read-write - - - 00 - Address Match Wakeup - #00 - - - 01 - Idle Match Wakeup - #01 - - - 10 - Match On and Match Off - #10 - - - - - RIDMAE - Receiver Idle DMA Enable - 20 - 1 - read-write - - - 0 - DMA request disabled. - #0 - - - 1 - DMA request enabled. - #1 - - - - - RDMAE - Receiver Full DMA Enable - 21 - 1 - read-write - - - 0 - DMA request disabled. - #0 - - - 1 - DMA request enabled. - #1 - - - - - TDMAE - Transmitter DMA Enable - 23 - 1 - read-write - - - 0 - DMA request disabled. - #0 - - - 1 - DMA request enabled. - #1 - - - - - OSR - Oversampling Ratio - 24 - 5 - read-write - - - 00000 - Writing 0 to this field will result in an oversampling ratio of 16 - #00000 - - - 00011 - Oversampling ratio of 4, requires BOTHEDGE to be set. - #00011 - - - 00100 - Oversampling ratio of 5, requires BOTHEDGE to be set. - #00100 - - - 00101 - Oversampling ratio of 6, requires BOTHEDGE to be set. - #00101 - - - 00110 - Oversampling ratio of 7, requires BOTHEDGE to be set. - #00110 - - - 00111 - Oversampling ratio of 8. - #00111 - - - 01000 - Oversampling ratio of 9. - #01000 - - - 01001 - Oversampling ratio of 10. - #01001 - - - 01010 - Oversampling ratio of 11. - #01010 - - - 01011 - Oversampling ratio of 12. - #01011 - - - 01100 - Oversampling ratio of 13. - #01100 - - - 01101 - Oversampling ratio of 14. - #01101 - - - 01110 - Oversampling ratio of 15. - #01110 - - - 01111 - Oversampling ratio of 16. - #01111 - - - 10000 - Oversampling ratio of 17. - #10000 - - - 10001 - Oversampling ratio of 18. - #10001 - - - 10010 - Oversampling ratio of 19. - #10010 - - - 10011 - Oversampling ratio of 20. - #10011 - - - 10100 - Oversampling ratio of 21. - #10100 - - - 10101 - Oversampling ratio of 22. - #10101 - - - 10110 - Oversampling ratio of 23. - #10110 - - - 10111 - Oversampling ratio of 24. - #10111 - - - 11000 - Oversampling ratio of 25. - #11000 - - - 11001 - Oversampling ratio of 26. - #11001 - - - 11010 - Oversampling ratio of 27. - #11010 - - - 11011 - Oversampling ratio of 28. - #11011 - - - 11100 - Oversampling ratio of 29. - #11100 - - - 11101 - Oversampling ratio of 30. - #11101 - - - 11110 - Oversampling ratio of 31. - #11110 - - - 11111 - Oversampling ratio of 32. - #11111 - - - - - M10 - 10-bit Mode select - 29 - 1 - read-write - - - 0 - Receiver and transmitter use 7-bit to 9-bit data characters. - #0 - - - 1 - Receiver and transmitter use 10-bit data characters. - #1 - - - - - MAEN2 - Match Address Mode Enable 2 - 30 - 1 - read-write - - - 0 - Normal operation. - #0 - - - 1 - Enables automatic address matching or data matching mode for MATCH[MA2]. - #1 - - - - - MAEN1 - Match Address Mode Enable 1 - 31 - 1 - read-write - - - 0 - Normal operation. - #0 - - - 1 - Enables automatic address matching or data matching mode for MATCH[MA1]. - #1 - - - - - - STAT - LPUART Status Register - 0x14 - 32 - read-write - 0xC00000 - 0xFFFFFFFF - - - MA2F - Match 2 Flag - 14 - 1 - read-write - - - 0 - Received data is not equal to MA2 - #0 - - - 1 - Received data is equal to MA2 - #1 - - - - - MA1F - Match 1 Flag - 15 - 1 - read-write - - - 0 - Received data is not equal to MA1 - #0 - - - 1 - Received data is equal to MA1 - #1 - - - - - PF - Parity Error Flag - 16 - 1 - read-write - - - 0 - No parity error. - #0 - - - 1 - Parity error. - #1 - - - - - FE - Framing Error Flag - 17 - 1 - read-write - - - 0 - No framing error detected. This does not guarantee the framing is correct. - #0 - - - 1 - Framing error. - #1 - - - - - NF - Noise Flag - 18 - 1 - read-write - - - 0 - No noise detected. - #0 - - - 1 - Noise detected in the received character in LPUART_DATA. - #1 - - - - - OR - Receiver Overrun Flag - 19 - 1 - read-write - - - 0 - No overrun. - #0 - - - 1 - Receive overrun (new LPUART data lost). - #1 - - - - - IDLE - Idle Line Flag - 20 - 1 - read-write - - - 0 - No idle line detected. - #0 - - - 1 - Idle line was detected. - #1 - - - - - RDRF - Receive Data Register Full Flag - 21 - 1 - read-only - - - 0 - Receive data buffer empty. - #0 - - - 1 - Receive data buffer full. - #1 - - - - - TC - Transmission Complete Flag - 22 - 1 - read-only - - - 0 - Transmitter active (sending data, a preamble, or a break). - #0 - - - 1 - Transmitter idle (transmission activity complete). - #1 - - - - - TDRE - Transmit Data Register Empty Flag - 23 - 1 - read-only - - - 0 - Transmit data buffer full. - #0 - - - 1 - Transmit data buffer empty. - #1 - - - - - RAF - Receiver Active Flag - 24 - 1 - read-only - - - 0 - LPUART receiver idle waiting for a start bit. - #0 - - - 1 - LPUART receiver active (RXD input not idle). - #1 - - - - - LBKDE - LIN Break Detection Enable - 25 - 1 - read-write - - - 0 - LIN break detect is disabled, normal break character can be detected. - #0 - - - 1 - LIN break detect is enabled. LIN break character is detected at length of 11 bit times (if M = 0) or 12 (if M = 1) or 13 (M10 = 1). - #1 - - - - - BRK13 - Break Character Generation Length - 26 - 1 - read-write - - - 0 - Break character is transmitted with length of 9 to 13 bit times. - #0 - - - 1 - Break character is transmitted with length of 12 to 15 bit times. - #1 - - - - - RWUID - Receive Wake Up Idle Detect - 27 - 1 - read-write - - - 0 - During receive standby state (RWU = 1), the IDLE bit does not get set upon detection of an idle character. During address match wakeup, the IDLE bit does not set when an address does not match. - #0 - - - 1 - During receive standby state (RWU = 1), the IDLE bit gets set upon detection of an idle character. During address match wakeup, the IDLE bit does set when an address does not match. - #1 - - - - - RXINV - Receive Data Inversion - 28 - 1 - read-write - - - 0 - Receive data not inverted. - #0 - - - 1 - Receive data inverted. - #1 - - - - - MSBF - MSB First - 29 - 1 - read-write - - - 0 - LSB (bit0) is the first bit that is transmitted following the start bit. Further, the first bit received after the start bit is identified as bit0. - #0 - - - 1 - MSB (bit9, bit8, bit7 or bit6) is the first bit that is transmitted following the start bit depending on the setting of CTRL[M], CTRL[PE] and BAUD[M10]. Further, the first bit received after the start bit is identified as bit9, bit8, bit7 or bit6 depending on the setting of CTRL[M] and CTRL[PE]. - #1 - - - - - RXEDGIF - RXD Pin Active Edge Interrupt Flag - 30 - 1 - read-write - - - 0 - No active edge on the receive pin has occurred. - #0 - - - 1 - An active edge on the receive pin has occurred. - #1 - - - - - LBKDIF - LIN Break Detect Interrupt Flag - 31 - 1 - read-write - - - 0 - No LIN break character has been detected. - #0 - - - 1 - LIN break character has been detected. - #1 - - - - - - CTRL - LPUART Control Register - 0x18 - 32 - read-write - 0 - 0xFFFFFFFF - - - PT - Parity Type - 0 - 1 - read-write - - - 0 - Even parity. - #0 - - - 1 - Odd parity. - #1 - - - - - PE - Parity Enable - 1 - 1 - read-write - - - 0 - No hardware parity generation or checking. - #0 - - - 1 - Parity enabled. - #1 - - - - - ILT - Idle Line Type Select - 2 - 1 - read-write - - - 0 - Idle character bit count starts after start bit. - #0 - - - 1 - Idle character bit count starts after stop bit. - #1 - - - - - WAKE - Receiver Wakeup Method Select - 3 - 1 - read-write - - - 0 - Configures RWU for idle-line wakeup. - #0 - - - 1 - Configures RWU with address-mark wakeup. - #1 - - - - - M - 9-Bit or 8-Bit Mode Select - 4 - 1 - read-write - - - 0 - Receiver and transmitter use 8-bit data characters. - #0 - - - 1 - Receiver and transmitter use 9-bit data characters. - #1 - - - - - RSRC - Receiver Source Select - 5 - 1 - read-write - - - 0 - Provided LOOPS is set, RSRC is cleared, selects internal loop back mode and the LPUART does not use the RXD pin. - #0 - - - 1 - Single-wire LPUART mode where the TXD pin is connected to the transmitter output and receiver input. - #1 - - - - - DOZEEN - Doze Enable - 6 - 1 - read-write - - - 0 - LPUART is enabled in Doze mode. - #0 - - - 1 - LPUART is disabled in Doze mode. - #1 - - - - - LOOPS - Loop Mode Select - 7 - 1 - read-write - - - 0 - Normal operation - RXD and TXD use separate pins. - #0 - - - 1 - Loop mode or single-wire mode where transmitter outputs are internally connected to receiver input (see RSRC bit). - #1 - - - - - IDLECFG - Idle Configuration - 8 - 3 - read-write - - - 000 - 1 idle character - #000 - - - 001 - 2 idle characters - #001 - - - 010 - 4 idle characters - #010 - - - 011 - 8 idle characters - #011 - - - 100 - 16 idle characters - #100 - - - 101 - 32 idle characters - #101 - - - 110 - 64 idle characters - #110 - - - 111 - 128 idle characters - #111 - - - - - M7 - 7-Bit Mode Select - 11 - 1 - read-write - - - 0 - Receiver and transmitter use 8-bit to 10-bit data characters. - #0 - - - 1 - Receiver and transmitter use 7-bit data characters. - #1 - - - - - MA2IE - Match 2 Interrupt Enable - 14 - 1 - read-write - - - 0 - MA2F interrupt disabled - #0 - - - 1 - MA2F interrupt enabled - #1 - - - - - MA1IE - Match 1 Interrupt Enable - 15 - 1 - read-write - - - 0 - MA1F interrupt disabled - #0 - - - 1 - MA1F interrupt enabled - #1 - - - - - SBK - Send Break - 16 - 1 - read-write - - - 0 - Normal transmitter operation. - #0 - - - 1 - Queue break character(s) to be sent. - #1 - - - - - RWU - Receiver Wakeup Control - 17 - 1 - read-write - - - 0 - Normal receiver operation. - #0 - - - 1 - LPUART receiver in standby waiting for wakeup condition. - #1 - - - - - RE - Receiver Enable - 18 - 1 - read-write - - - 0 - Receiver disabled. - #0 - - - 1 - Receiver enabled. - #1 - - - - - TE - Transmitter Enable - 19 - 1 - read-write - - - 0 - Transmitter disabled. - #0 - - - 1 - Transmitter enabled. - #1 - - - - - ILIE - Idle Line Interrupt Enable - 20 - 1 - read-write - - - 0 - Hardware interrupts from IDLE disabled; use polling. - #0 - - - 1 - Hardware interrupt requested when IDLE flag is 1. - #1 - - - - - RIE - Receiver Interrupt Enable - 21 - 1 - read-write - - - 0 - Hardware interrupts from RDRF disabled; use polling. - #0 - - - 1 - Hardware interrupt requested when RDRF flag is 1. - #1 - - - - - TCIE - Transmission Complete Interrupt Enable for - 22 - 1 - read-write - - - 0 - Hardware interrupts from TC disabled; use polling. - #0 - - - 1 - Hardware interrupt requested when TC flag is 1. - #1 - - - - - TIE - Transmit Interrupt Enable - 23 - 1 - read-write - - - 0 - Hardware interrupts from TDRE disabled; use polling. - #0 - - - 1 - Hardware interrupt requested when TDRE flag is 1. - #1 - - - - - PEIE - Parity Error Interrupt Enable - 24 - 1 - read-write - - - 0 - PF interrupts disabled; use polling). - #0 - - - 1 - Hardware interrupt requested when PF is set. - #1 - - - - - FEIE - Framing Error Interrupt Enable - 25 - 1 - read-write - - - 0 - FE interrupts disabled; use polling. - #0 - - - 1 - Hardware interrupt requested when FE is set. - #1 - - - - - NEIE - Noise Error Interrupt Enable - 26 - 1 - read-write - - - 0 - NF interrupts disabled; use polling. - #0 - - - 1 - Hardware interrupt requested when NF is set. - #1 - - - - - ORIE - Overrun Interrupt Enable - 27 - 1 - read-write - - - 0 - OR interrupts disabled; use polling. - #0 - - - 1 - Hardware interrupt requested when OR is set. - #1 - - - - - TXINV - Transmit Data Inversion - 28 - 1 - read-write - - - 0 - Transmit data not inverted. - #0 - - - 1 - Transmit data inverted. - #1 - - - - - TXDIR - TXD Pin Direction in Single-Wire Mode - 29 - 1 - read-write - - - 0 - TXD pin is an input in single-wire mode. - #0 - - - 1 - TXD pin is an output in single-wire mode. - #1 - - - - - R9T8 - Receive Bit 9 / Transmit Bit 8 - 30 - 1 - read-write - - - R8T9 - Receive Bit 8 / Transmit Bit 9 - 31 - 1 - read-write - - - - DATA - LPUART Data Register - 0x1C - 32 - read-write - 0x1000 - 0xFFFFFFFF - - - R0T0 - R0T0 - 0 - 1 - read-write - - - R1T1 - R1T1 - 1 - 1 - read-write - - - R2T2 - R2T2 - 2 - 1 - read-write - - - R3T3 - R3T3 - 3 - 1 - read-write - - - R4T4 - R4T4 - 4 - 1 - read-write - - - R5T5 - R5T5 - 5 - 1 - read-write - - - R6T6 - R6T6 - 6 - 1 - read-write - - - R7T7 - R7T7 - 7 - 1 - read-write - - - R8T8 - R8T8 - 8 - 1 - read-write - - - R9T9 - R9T9 - 9 - 1 - read-write - - - IDLINE - Idle Line - 11 - 1 - read-only - - - 0 - Receiver was not idle before receiving this character. - #0 - - - 1 - Receiver was idle before receiving this character. - #1 - - - - - RXEMPT - Receive Buffer Empty - 12 - 1 - read-only - - - 0 - Receive buffer contains valid data. - #0 - - - 1 - Receive buffer is empty, data returned on read is not valid. - #1 - - - - - FRETSC - Frame Error / Transmit Special Character - 13 - 1 - read-write - - - 0 - The dataword was received without a frame error on read, or transmit a normal character on write. - #0 - - - 1 - The dataword was received with a frame error, or transmit an idle or break character on transmit. - #1 - - - - - PARITYE - PARITYE - 14 - 1 - read-only - - - 0 - The dataword was received without a parity error. - #0 - - - 1 - The dataword was received with a parity error. - #1 - - - - - NOISY - NOISY - 15 - 1 - read-only - - - 0 - The dataword was received without noise. - #0 - - - 1 - The data was received with noise. - #1 - - - - - - MATCH - LPUART Match Address Register - 0x20 - 32 - read-write - 0 - 0xFFFFFFFF - - - MA1 - Match Address 1 - 0 - 10 - read-write - - - MA2 - Match Address 2 - 16 - 10 - read-write - - - - MODIR - LPUART Modem IrDA Register - 0x24 - 32 - read-write - 0 - 0xFFFFFFFF - - - TXCTSE - Transmitter clear-to-send enable - 0 - 1 - read-write - - - 0 - CTS has no effect on the transmitter. - #0 - - - 1 - Enables clear-to-send operation. The transmitter checks the state of CTS each time it is ready to send a character. If CTS is asserted, the character is sent. If CTS is deasserted, the signal TXD remains in the mark state and transmission is delayed until CTS is asserted. Changes in CTS as a character is being sent do not affect its transmission. - #1 - - - - - TXRTSE - Transmitter request-to-send enable - 1 - 1 - read-write - - - 0 - The transmitter has no effect on RTS. - #0 - - - 1 - When a character is placed into an empty transmitter data buffer , RTS asserts one bit time before the start bit is transmitted. RTS deasserts one bit time after all characters in the transmitter data buffer and shift register are completely sent, including the last stop bit. - #1 - - - - - TXRTSPOL - Transmitter request-to-send polarity - 2 - 1 - read-write - - - 0 - Transmitter RTS is active low. - #0 - - - 1 - Transmitter RTS is active high. - #1 - - - - - RXRTSE - Receiver request-to-send enable - 3 - 1 - read-write - - - 0 - The receiver has no effect on RTS. - #0 - - - - - TXCTSC - Transmit CTS Configuration - 4 - 1 - read-write - - - 0 - CTS input is sampled at the start of each character. - #0 - - - 1 - CTS input is sampled when the transmitter is idle. - #1 - - - - - TXCTSSRC - Transmit CTS Source - 5 - 1 - read-write - - - 0 - CTS input is the CTS_B pin. - #0 - - - 1 - CTS input is the inverted Receiver Match result. - #1 - - - - - RTSWATER - Receive RTS Configuration - 8 - 2 - read-write - - - TNP - Transmitter narrow pulse - 16 - 2 - read-write - - - 00 - 1/OSR. - #00 - - - 01 - 2/OSR. - #01 - - - 10 - 3/OSR. - #10 - - - 11 - 4/OSR. - #11 - - - - - IREN - Infrared enable - 18 - 1 - read-write - - - 0 - IR disabled. - #0 - - - 1 - IR enabled. - #1 - - - - - - FIFO - LPUART FIFO Register - 0x28 - 32 - read-write - 0xC00011 - 0xFFFFFFFF - - - RXFIFOSIZE - Receive FIFO. Buffer Depth - 0 - 3 - read-only - - - 000 - Receive FIFO/Buffer depth = 1 dataword. - #000 - - - 001 - Receive FIFO/Buffer depth = 4 datawords. - #001 - - - 010 - Receive FIFO/Buffer depth = 8 datawords. - #010 - - - 011 - Receive FIFO/Buffer depth = 16 datawords. - #011 - - - 100 - Receive FIFO/Buffer depth = 32 datawords. - #100 - - - 101 - Receive FIFO/Buffer depth = 64 datawords. - #101 - - - 110 - Receive FIFO/Buffer depth = 128 datawords. - #110 - - - 111 - Receive FIFO/Buffer depth = 256 datawords. - #111 - - - - - RXFE - Receive FIFO Enable - 3 - 1 - read-write - - - 0 - Receive FIFO is not enabled. Buffer is depth 1. (Legacy support) - #0 - - - 1 - Receive FIFO is enabled. Buffer is depth indicted by RXFIFOSIZE. - #1 - - - - - TXFIFOSIZE - Transmit FIFO. Buffer Depth - 4 - 3 - read-only - - - 000 - Transmit FIFO/Buffer depth = 1 dataword. - #000 - - - 001 - Transmit FIFO/Buffer depth = 4 datawords. - #001 - - - 010 - Transmit FIFO/Buffer depth = 8 datawords. - #010 - - - 011 - Transmit FIFO/Buffer depth = 16 datawords. - #011 - - - 100 - Transmit FIFO/Buffer depth = 32 datawords. - #100 - - - 101 - Transmit FIFO/Buffer depth = 64 datawords. - #101 - - - 110 - Transmit FIFO/Buffer depth = 128 datawords. - #110 - - - 111 - Transmit FIFO/Buffer depth = 256 datawords - #111 - - - - - TXFE - Transmit FIFO Enable - 7 - 1 - read-write - - - 0 - Transmit FIFO is not enabled. Buffer is depth 1. (Legacy support). - #0 - - - 1 - Transmit FIFO is enabled. Buffer is depth indicated by TXFIFOSIZE. - #1 - - - - - RXUFE - Receive FIFO Underflow Interrupt Enable - 8 - 1 - read-write - - - 0 - RXUF flag does not generate an interrupt to the host. - #0 - - - 1 - RXUF flag generates an interrupt to the host. - #1 - - - - - TXOFE - Transmit FIFO Overflow Interrupt Enable - 9 - 1 - read-write - - - 0 - TXOF flag does not generate an interrupt to the host. - #0 - - - 1 - TXOF flag generates an interrupt to the host. - #1 - - - - - RXIDEN - Receiver Idle Empty Enable - 10 - 3 - read-write - - - 000 - Disable RDRF assertion due to partially filled FIFO when receiver is idle. - #000 - - - 001 - Enable RDRF assertion due to partially filled FIFO when receiver is idle for 1 character. - #001 - - - 010 - Enable RDRF assertion due to partially filled FIFO when receiver is idle for 2 characters. - #010 - - - 011 - Enable RDRF assertion due to partially filled FIFO when receiver is idle for 4 characters. - #011 - - - 100 - Enable RDRF assertion due to partially filled FIFO when receiver is idle for 8 characters. - #100 - - - 101 - Enable RDRF assertion due to partially filled FIFO when receiver is idle for 16 characters. - #101 - - - 110 - Enable RDRF assertion due to partially filled FIFO when receiver is idle for 32 characters. - #110 - - - 111 - Enable RDRF assertion due to partially filled FIFO when receiver is idle for 64 characters. - #111 - - - - - RXFLUSH - Receive FIFO/Buffer Flush - 14 - 1 - write-only - - - 0 - No flush operation occurs. - #0 - - - 1 - All data in the receive FIFO/buffer is cleared out. - #1 - - - - - TXFLUSH - Transmit FIFO/Buffer Flush - 15 - 1 - write-only - - - 0 - No flush operation occurs. - #0 - - - 1 - All data in the transmit FIFO/Buffer is cleared out. - #1 - - - - - RXUF - Receiver Buffer Underflow Flag - 16 - 1 - read-write - - - 0 - No receive buffer underflow has occurred since the last time the flag was cleared. - #0 - - - 1 - At least one receive buffer underflow has occurred since the last time the flag was cleared. - #1 - - - - - TXOF - Transmitter Buffer Overflow Flag - 17 - 1 - read-write - - - 0 - No transmit buffer overflow has occurred since the last time the flag was cleared. - #0 - - - 1 - At least one transmit buffer overflow has occurred since the last time the flag was cleared. - #1 - - - - - RXEMPT - Receive Buffer/FIFO Empty - 22 - 1 - read-only - - - 0 - Receive buffer is not empty. - #0 - - - 1 - Receive buffer is empty. - #1 - - - - - TXEMPT - Transmit Buffer/FIFO Empty - 23 - 1 - read-only - - - 0 - Transmit buffer is not empty. - #0 - - - 1 - Transmit buffer is empty. - #1 - - - - - - WATER - LPUART Watermark Register - 0x2C - 32 - read-write - 0 - 0xFFFFFFFF - - - TXWATER - Transmit Watermark - 0 - 2 - read-write - - - TXCOUNT - Transmit Counter - 8 - 3 - read-only - - - RXWATER - Receive Watermark - 16 - 2 - read-write - - - RXCOUNT - Receive Counter - 24 - 3 - read-only - - - - - LPUART2 + + + LPUART2 Universal Asynchronous Receiver/Transmitter LPUART LPUART2_ 0x4006C000 - - 0 - 0x30 - registers - LPUART2_RxTx 35 - - VERID - Version ID Register - 0 - 32 - read-only - 0x4010003 - 0xFFFFFFFF - - - FEATURE - Feature Identification Number - 0 - 16 - read-only - - - 0000000000000001 - Standard feature set. - #1 - - - 0000000000000011 - Standard feature set with MODEM/IrDA support. - #11 - - - - - MINOR - Minor Version Number - 16 - 8 - read-only - - - MAJOR - Major Version Number - 24 - 8 - read-only - - - - PARAM - Parameter Register - 0x4 - 32 - read-only - 0x202 - 0xFFFFFFFF - - - TXFIFO - Transmit FIFO Size - 0 - 8 - read-only - - - RXFIFO - Receive FIFO Size - 8 - 8 - read-only - - - - GLOBAL - LPUART Global Register - 0x8 - 32 - read-write - 0 - 0xFFFFFFFF - - - RST - Software Reset - 1 - 1 - read-write - - - 0 - Module is not reset. - #0 - - - 1 - Module is reset. - #1 - - - - - - PINCFG - LPUART Pin Configuration Register - 0xC - 32 - read-write - 0 - 0xFFFFFFFF - - - TRGSEL - Trigger Select - 0 - 2 - read-write - - - 00 - Input trigger is disabled. - #00 - - - 01 - Input trigger is used instead of RXD pin input. - #01 - - - 10 - Input trigger is used instead of CTS_B pin input. - #10 - - - 11 - Input trigger is used to modulate the TXD pin output. The TXD pin output (after TXINV configuration) is ANDed with the input trigger. - #11 - - - - - - BAUD - LPUART Baud Rate Register - 0x10 - 32 - read-write - 0xF000004 - 0xFFFFFFFF - - - SBR - Baud Rate Modulo Divisor. - 0 - 13 - read-write - - - SBNS - Stop Bit Number Select - 13 - 1 - read-write - - - 0 - One stop bit. - #0 - - - 1 - Two stop bits. - #1 - - - - - RXEDGIE - RX Input Active Edge Interrupt Enable - 14 - 1 - read-write - - - 0 - Hardware interrupts from LPUART_STAT[RXEDGIF] disabled. - #0 - - - 1 - Hardware interrupt requested when LPUART_STAT[RXEDGIF] flag is 1. - #1 - - - - - LBKDIE - LIN Break Detect Interrupt Enable - 15 - 1 - read-write - - - 0 - Hardware interrupts from LPUART_STAT[LBKDIF] disabled (use polling). - #0 - - - 1 - Hardware interrupt requested when LPUART_STAT[LBKDIF] flag is 1. - #1 - - - - - RESYNCDIS - Resynchronization Disable - 16 - 1 - read-write - - - 0 - Resynchronization during received data word is supported - #0 - - - 1 - Resynchronization during received data word is disabled - #1 - - - - - BOTHEDGE - Both Edge Sampling - 17 - 1 - read-write - - - 0 - Receiver samples input data using the rising edge of the baud rate clock. - #0 - - - 1 - Receiver samples input data using the rising and falling edge of the baud rate clock. - #1 - - - - - MATCFG - Match Configuration - 18 - 2 - read-write - - - 00 - Address Match Wakeup - #00 - - - 01 - Idle Match Wakeup - #01 - - - 10 - Match On and Match Off - #10 - - - - - RIDMAE - Receiver Idle DMA Enable - 20 - 1 - read-write - - - 0 - DMA request disabled. - #0 - - - 1 - DMA request enabled. - #1 - - - - - RDMAE - Receiver Full DMA Enable - 21 - 1 - read-write - - - 0 - DMA request disabled. - #0 - - - 1 - DMA request enabled. - #1 - - - - - TDMAE - Transmitter DMA Enable - 23 - 1 - read-write - - - 0 - DMA request disabled. - #0 - - - 1 - DMA request enabled. - #1 - - - - - OSR - Oversampling Ratio - 24 - 5 - read-write - - - 00000 - Writing 0 to this field will result in an oversampling ratio of 16 - #00000 - - - 00011 - Oversampling ratio of 4, requires BOTHEDGE to be set. - #00011 - - - 00100 - Oversampling ratio of 5, requires BOTHEDGE to be set. - #00100 - - - 00101 - Oversampling ratio of 6, requires BOTHEDGE to be set. - #00101 - - - 00110 - Oversampling ratio of 7, requires BOTHEDGE to be set. - #00110 - - - 00111 - Oversampling ratio of 8. - #00111 - - - 01000 - Oversampling ratio of 9. - #01000 - - - 01001 - Oversampling ratio of 10. - #01001 - - - 01010 - Oversampling ratio of 11. - #01010 - - - 01011 - Oversampling ratio of 12. - #01011 - - - 01100 - Oversampling ratio of 13. - #01100 - - - 01101 - Oversampling ratio of 14. - #01101 - - - 01110 - Oversampling ratio of 15. - #01110 - - - 01111 - Oversampling ratio of 16. - #01111 - - - 10000 - Oversampling ratio of 17. - #10000 - - - 10001 - Oversampling ratio of 18. - #10001 - - - 10010 - Oversampling ratio of 19. - #10010 - - - 10011 - Oversampling ratio of 20. - #10011 - - - 10100 - Oversampling ratio of 21. - #10100 - - - 10101 - Oversampling ratio of 22. - #10101 - - - 10110 - Oversampling ratio of 23. - #10110 - - - 10111 - Oversampling ratio of 24. - #10111 - - - 11000 - Oversampling ratio of 25. - #11000 - - - 11001 - Oversampling ratio of 26. - #11001 - - - 11010 - Oversampling ratio of 27. - #11010 - - - 11011 - Oversampling ratio of 28. - #11011 - - - 11100 - Oversampling ratio of 29. - #11100 - - - 11101 - Oversampling ratio of 30. - #11101 - - - 11110 - Oversampling ratio of 31. - #11110 - - - 11111 - Oversampling ratio of 32. - #11111 - - - - - M10 - 10-bit Mode select - 29 - 1 - read-write - - - 0 - Receiver and transmitter use 7-bit to 9-bit data characters. - #0 - - - 1 - Receiver and transmitter use 10-bit data characters. - #1 - - - - - MAEN2 - Match Address Mode Enable 2 - 30 - 1 - read-write - - - 0 - Normal operation. - #0 - - - 1 - Enables automatic address matching or data matching mode for MATCH[MA2]. - #1 - - - - - MAEN1 - Match Address Mode Enable 1 - 31 - 1 - read-write - - - 0 - Normal operation. - #0 - - - 1 - Enables automatic address matching or data matching mode for MATCH[MA1]. - #1 - - - - - - STAT - LPUART Status Register - 0x14 - 32 - read-write - 0xC00000 - 0xFFFFFFFF - - - MA2F - Match 2 Flag - 14 - 1 - read-write - - - 0 - Received data is not equal to MA2 - #0 - - - 1 - Received data is equal to MA2 - #1 - - - - - MA1F - Match 1 Flag - 15 - 1 - read-write - - - 0 - Received data is not equal to MA1 - #0 - - - 1 - Received data is equal to MA1 - #1 - - - - - PF - Parity Error Flag - 16 - 1 - read-write - - - 0 - No parity error. - #0 - - - 1 - Parity error. - #1 - - - - - FE - Framing Error Flag - 17 - 1 - read-write - - - 0 - No framing error detected. This does not guarantee the framing is correct. - #0 - - - 1 - Framing error. - #1 - - - - - NF - Noise Flag - 18 - 1 - read-write - - - 0 - No noise detected. - #0 - - - 1 - Noise detected in the received character in LPUART_DATA. - #1 - - - - - OR - Receiver Overrun Flag - 19 - 1 - read-write - - - 0 - No overrun. - #0 - - - 1 - Receive overrun (new LPUART data lost). - #1 - - - - - IDLE - Idle Line Flag - 20 - 1 - read-write - - - 0 - No idle line detected. - #0 - - - 1 - Idle line was detected. - #1 - - - - - RDRF - Receive Data Register Full Flag - 21 - 1 - read-only - - - 0 - Receive data buffer empty. - #0 - - - 1 - Receive data buffer full. - #1 - - - - - TC - Transmission Complete Flag - 22 - 1 - read-only - - - 0 - Transmitter active (sending data, a preamble, or a break). - #0 - - - 1 - Transmitter idle (transmission activity complete). - #1 - - - - - TDRE - Transmit Data Register Empty Flag - 23 - 1 - read-only - - - 0 - Transmit data buffer full. - #0 - - - 1 - Transmit data buffer empty. - #1 - - - - - RAF - Receiver Active Flag - 24 - 1 - read-only - - - 0 - LPUART receiver idle waiting for a start bit. - #0 - - - 1 - LPUART receiver active (RXD input not idle). - #1 - - - - - LBKDE - LIN Break Detection Enable - 25 - 1 - read-write - - - 0 - LIN break detect is disabled, normal break character can be detected. - #0 - - - 1 - LIN break detect is enabled. LIN break character is detected at length of 11 bit times (if M = 0) or 12 (if M = 1) or 13 (M10 = 1). - #1 - - - - - BRK13 - Break Character Generation Length - 26 - 1 - read-write - - - 0 - Break character is transmitted with length of 9 to 13 bit times. - #0 - - - 1 - Break character is transmitted with length of 12 to 15 bit times. - #1 - - - - - RWUID - Receive Wake Up Idle Detect - 27 - 1 - read-write - - - 0 - During receive standby state (RWU = 1), the IDLE bit does not get set upon detection of an idle character. During address match wakeup, the IDLE bit does not set when an address does not match. - #0 - - - 1 - During receive standby state (RWU = 1), the IDLE bit gets set upon detection of an idle character. During address match wakeup, the IDLE bit does set when an address does not match. - #1 - - - - - RXINV - Receive Data Inversion - 28 - 1 - read-write - - - 0 - Receive data not inverted. - #0 - - - 1 - Receive data inverted. - #1 - - - - - MSBF - MSB First - 29 - 1 - read-write - - - 0 - LSB (bit0) is the first bit that is transmitted following the start bit. Further, the first bit received after the start bit is identified as bit0. - #0 - - - 1 - MSB (bit9, bit8, bit7 or bit6) is the first bit that is transmitted following the start bit depending on the setting of CTRL[M], CTRL[PE] and BAUD[M10]. Further, the first bit received after the start bit is identified as bit9, bit8, bit7 or bit6 depending on the setting of CTRL[M] and CTRL[PE]. - #1 - - - - - RXEDGIF - RXD Pin Active Edge Interrupt Flag - 30 - 1 - read-write - - - 0 - No active edge on the receive pin has occurred. - #0 - - - 1 - An active edge on the receive pin has occurred. - #1 - - - - - LBKDIF - LIN Break Detect Interrupt Flag - 31 - 1 - read-write - - - 0 - No LIN break character has been detected. - #0 - - - 1 - LIN break character has been detected. - #1 - - - - - - CTRL - LPUART Control Register - 0x18 - 32 - read-write - 0 - 0xFFFFFFFF - - - PT - Parity Type - 0 - 1 - read-write - - - 0 - Even parity. - #0 - - - 1 - Odd parity. - #1 - - - - - PE - Parity Enable - 1 - 1 - read-write - - - 0 - No hardware parity generation or checking. - #0 - - - 1 - Parity enabled. - #1 - - - - - ILT - Idle Line Type Select - 2 - 1 - read-write - - - 0 - Idle character bit count starts after start bit. - #0 - - - 1 - Idle character bit count starts after stop bit. - #1 - - - - - WAKE - Receiver Wakeup Method Select - 3 - 1 - read-write - - - 0 - Configures RWU for idle-line wakeup. - #0 - - - 1 - Configures RWU with address-mark wakeup. - #1 - - - - - M - 9-Bit or 8-Bit Mode Select - 4 - 1 - read-write - - - 0 - Receiver and transmitter use 8-bit data characters. - #0 - - - 1 - Receiver and transmitter use 9-bit data characters. - #1 - - - - - RSRC - Receiver Source Select - 5 - 1 - read-write - - - 0 - Provided LOOPS is set, RSRC is cleared, selects internal loop back mode and the LPUART does not use the RXD pin. - #0 - - - 1 - Single-wire LPUART mode where the TXD pin is connected to the transmitter output and receiver input. - #1 - - - - - DOZEEN - Doze Enable - 6 - 1 - read-write - - - 0 - LPUART is enabled in Doze mode. - #0 - - - 1 - LPUART is disabled in Doze mode. - #1 - - - - - LOOPS - Loop Mode Select - 7 - 1 - read-write - - - 0 - Normal operation - RXD and TXD use separate pins. - #0 - - - 1 - Loop mode or single-wire mode where transmitter outputs are internally connected to receiver input (see RSRC bit). - #1 - - - - - IDLECFG - Idle Configuration - 8 - 3 - read-write - - - 000 - 1 idle character - #000 - - - 001 - 2 idle characters - #001 - - - 010 - 4 idle characters - #010 - - - 011 - 8 idle characters - #011 - - - 100 - 16 idle characters - #100 - - - 101 - 32 idle characters - #101 - - - 110 - 64 idle characters - #110 - - - 111 - 128 idle characters - #111 - - - - - M7 - 7-Bit Mode Select - 11 - 1 - read-write - - - 0 - Receiver and transmitter use 8-bit to 10-bit data characters. - #0 - - - 1 - Receiver and transmitter use 7-bit data characters. - #1 - - - - - MA2IE - Match 2 Interrupt Enable - 14 - 1 - read-write - - - 0 - MA2F interrupt disabled - #0 - - - 1 - MA2F interrupt enabled - #1 - - - - - MA1IE - Match 1 Interrupt Enable - 15 - 1 - read-write - - - 0 - MA1F interrupt disabled - #0 - - - 1 - MA1F interrupt enabled - #1 - - - - - SBK - Send Break - 16 - 1 - read-write - - - 0 - Normal transmitter operation. - #0 - - - 1 - Queue break character(s) to be sent. - #1 - - - - - RWU - Receiver Wakeup Control - 17 - 1 - read-write - - - 0 - Normal receiver operation. - #0 - - - 1 - LPUART receiver in standby waiting for wakeup condition. - #1 - - - - - RE - Receiver Enable - 18 - 1 - read-write - - - 0 - Receiver disabled. - #0 - - - 1 - Receiver enabled. - #1 - - - - - TE - Transmitter Enable - 19 - 1 - read-write - - - 0 - Transmitter disabled. - #0 - - - 1 - Transmitter enabled. - #1 - - - - - ILIE - Idle Line Interrupt Enable - 20 - 1 - read-write - - - 0 - Hardware interrupts from IDLE disabled; use polling. - #0 - - - 1 - Hardware interrupt requested when IDLE flag is 1. - #1 - - - - - RIE - Receiver Interrupt Enable - 21 - 1 - read-write - - - 0 - Hardware interrupts from RDRF disabled; use polling. - #0 - - - 1 - Hardware interrupt requested when RDRF flag is 1. - #1 - - - - - TCIE - Transmission Complete Interrupt Enable for - 22 - 1 - read-write - - - 0 - Hardware interrupts from TC disabled; use polling. - #0 - - - 1 - Hardware interrupt requested when TC flag is 1. - #1 - - - - - TIE - Transmit Interrupt Enable - 23 - 1 - read-write - - - 0 - Hardware interrupts from TDRE disabled; use polling. - #0 - - - 1 - Hardware interrupt requested when TDRE flag is 1. - #1 - - - - - PEIE - Parity Error Interrupt Enable - 24 - 1 - read-write - - - 0 - PF interrupts disabled; use polling). - #0 - - - 1 - Hardware interrupt requested when PF is set. - #1 - - - - - FEIE - Framing Error Interrupt Enable - 25 - 1 - read-write - - - 0 - FE interrupts disabled; use polling. - #0 - - - 1 - Hardware interrupt requested when FE is set. - #1 - - - - - NEIE - Noise Error Interrupt Enable - 26 - 1 - read-write - - - 0 - NF interrupts disabled; use polling. - #0 - - - 1 - Hardware interrupt requested when NF is set. - #1 - - - - - ORIE - Overrun Interrupt Enable - 27 - 1 - read-write - - - 0 - OR interrupts disabled; use polling. - #0 - - - 1 - Hardware interrupt requested when OR is set. - #1 - - - - - TXINV - Transmit Data Inversion - 28 - 1 - read-write - - - 0 - Transmit data not inverted. - #0 - - - 1 - Transmit data inverted. - #1 - - - - - TXDIR - TXD Pin Direction in Single-Wire Mode - 29 - 1 - read-write - - - 0 - TXD pin is an input in single-wire mode. - #0 - - - 1 - TXD pin is an output in single-wire mode. - #1 - - - - - R9T8 - Receive Bit 9 / Transmit Bit 8 - 30 - 1 - read-write - - - R8T9 - Receive Bit 8 / Transmit Bit 9 - 31 - 1 - read-write - - - - DATA - LPUART Data Register - 0x1C - 32 - read-write - 0x1000 - 0xFFFFFFFF - - - R0T0 - R0T0 - 0 - 1 - read-write - - - R1T1 - R1T1 - 1 - 1 - read-write - - - R2T2 - R2T2 - 2 - 1 - read-write - - - R3T3 - R3T3 - 3 - 1 - read-write - - - R4T4 - R4T4 - 4 - 1 - read-write - - - R5T5 - R5T5 - 5 - 1 - read-write - - - R6T6 - R6T6 - 6 - 1 - read-write - - - R7T7 - R7T7 - 7 - 1 - read-write - - - R8T8 - R8T8 - 8 - 1 - read-write - - - R9T9 - R9T9 - 9 - 1 - read-write - - - IDLINE - Idle Line - 11 - 1 - read-only - - - 0 - Receiver was not idle before receiving this character. - #0 - - - 1 - Receiver was idle before receiving this character. - #1 - - - - - RXEMPT - Receive Buffer Empty - 12 - 1 - read-only - - - 0 - Receive buffer contains valid data. - #0 - - - 1 - Receive buffer is empty, data returned on read is not valid. - #1 - - - - - FRETSC - Frame Error / Transmit Special Character - 13 - 1 - read-write - - - 0 - The dataword was received without a frame error on read, or transmit a normal character on write. - #0 - - - 1 - The dataword was received with a frame error, or transmit an idle or break character on transmit. - #1 - - - - - PARITYE - PARITYE - 14 - 1 - read-only - - - 0 - The dataword was received without a parity error. - #0 - - - 1 - The dataword was received with a parity error. - #1 - - - - - NOISY - NOISY - 15 - 1 - read-only - - - 0 - The dataword was received without noise. - #0 - - - 1 - The data was received with noise. - #1 - - - - - - MATCH - LPUART Match Address Register - 0x20 - 32 - read-write - 0 - 0xFFFFFFFF - - - MA1 - Match Address 1 - 0 - 10 - read-write - - - MA2 - Match Address 2 - 16 - 10 - read-write - - - - MODIR - LPUART Modem IrDA Register - 0x24 - 32 - read-write - 0 - 0xFFFFFFFF - - - TXCTSE - Transmitter clear-to-send enable - 0 - 1 - read-write - - - 0 - CTS has no effect on the transmitter. - #0 - - - 1 - Enables clear-to-send operation. The transmitter checks the state of CTS each time it is ready to send a character. If CTS is asserted, the character is sent. If CTS is deasserted, the signal TXD remains in the mark state and transmission is delayed until CTS is asserted. Changes in CTS as a character is being sent do not affect its transmission. - #1 - - - - - TXRTSE - Transmitter request-to-send enable - 1 - 1 - read-write - - - 0 - The transmitter has no effect on RTS. - #0 - - - 1 - When a character is placed into an empty transmitter data buffer , RTS asserts one bit time before the start bit is transmitted. RTS deasserts one bit time after all characters in the transmitter data buffer and shift register are completely sent, including the last stop bit. - #1 - - - - - TXRTSPOL - Transmitter request-to-send polarity - 2 - 1 - read-write - - - 0 - Transmitter RTS is active low. - #0 - - - 1 - Transmitter RTS is active high. - #1 - - - - - RXRTSE - Receiver request-to-send enable - 3 - 1 - read-write - - - 0 - The receiver has no effect on RTS. - #0 - - - - - TXCTSC - Transmit CTS Configuration - 4 - 1 - read-write - - - 0 - CTS input is sampled at the start of each character. - #0 - - - 1 - CTS input is sampled when the transmitter is idle. - #1 - - - - - TXCTSSRC - Transmit CTS Source - 5 - 1 - read-write - - - 0 - CTS input is the CTS_B pin. - #0 - - - 1 - CTS input is the inverted Receiver Match result. - #1 - - - - - RTSWATER - Receive RTS Configuration - 8 - 2 - read-write - - - TNP - Transmitter narrow pulse - 16 - 2 - read-write - - - 00 - 1/OSR. - #00 - - - 01 - 2/OSR. - #01 - - - 10 - 3/OSR. - #10 - - - 11 - 4/OSR. - #11 - - - - - IREN - Infrared enable - 18 - 1 - read-write - - - 0 - IR disabled. - #0 - - - 1 - IR enabled. - #1 - - - - - - FIFO - LPUART FIFO Register - 0x28 - 32 - read-write - 0xC00011 - 0xFFFFFFFF - - - RXFIFOSIZE - Receive FIFO. Buffer Depth - 0 - 3 - read-only - - - 000 - Receive FIFO/Buffer depth = 1 dataword. - #000 - - - 001 - Receive FIFO/Buffer depth = 4 datawords. - #001 - - - 010 - Receive FIFO/Buffer depth = 8 datawords. - #010 - - - 011 - Receive FIFO/Buffer depth = 16 datawords. - #011 - - - 100 - Receive FIFO/Buffer depth = 32 datawords. - #100 - - - 101 - Receive FIFO/Buffer depth = 64 datawords. - #101 - - - 110 - Receive FIFO/Buffer depth = 128 datawords. - #110 - - - 111 - Receive FIFO/Buffer depth = 256 datawords. - #111 - - - - - RXFE - Receive FIFO Enable - 3 - 1 - read-write - - - 0 - Receive FIFO is not enabled. Buffer is depth 1. (Legacy support) - #0 - - - 1 - Receive FIFO is enabled. Buffer is depth indicted by RXFIFOSIZE. - #1 - - - - - TXFIFOSIZE - Transmit FIFO. Buffer Depth - 4 - 3 - read-only - - - 000 - Transmit FIFO/Buffer depth = 1 dataword. - #000 - - - 001 - Transmit FIFO/Buffer depth = 4 datawords. - #001 - - - 010 - Transmit FIFO/Buffer depth = 8 datawords. - #010 - - - 011 - Transmit FIFO/Buffer depth = 16 datawords. - #011 - - - 100 - Transmit FIFO/Buffer depth = 32 datawords. - #100 - - - 101 - Transmit FIFO/Buffer depth = 64 datawords. - #101 - - - 110 - Transmit FIFO/Buffer depth = 128 datawords. - #110 - - - 111 - Transmit FIFO/Buffer depth = 256 datawords - #111 - - - - - TXFE - Transmit FIFO Enable - 7 - 1 - read-write - - - 0 - Transmit FIFO is not enabled. Buffer is depth 1. (Legacy support). - #0 - - - 1 - Transmit FIFO is enabled. Buffer is depth indicated by TXFIFOSIZE. - #1 - - - - - RXUFE - Receive FIFO Underflow Interrupt Enable - 8 - 1 - read-write - - - 0 - RXUF flag does not generate an interrupt to the host. - #0 - - - 1 - RXUF flag generates an interrupt to the host. - #1 - - - - - TXOFE - Transmit FIFO Overflow Interrupt Enable - 9 - 1 - read-write - - - 0 - TXOF flag does not generate an interrupt to the host. - #0 - - - 1 - TXOF flag generates an interrupt to the host. - #1 - - - - - RXIDEN - Receiver Idle Empty Enable - 10 - 3 - read-write - - - 000 - Disable RDRF assertion due to partially filled FIFO when receiver is idle. - #000 - - - 001 - Enable RDRF assertion due to partially filled FIFO when receiver is idle for 1 character. - #001 - - - 010 - Enable RDRF assertion due to partially filled FIFO when receiver is idle for 2 characters. - #010 - - - 011 - Enable RDRF assertion due to partially filled FIFO when receiver is idle for 4 characters. - #011 - - - 100 - Enable RDRF assertion due to partially filled FIFO when receiver is idle for 8 characters. - #100 - - - 101 - Enable RDRF assertion due to partially filled FIFO when receiver is idle for 16 characters. - #101 - - - 110 - Enable RDRF assertion due to partially filled FIFO when receiver is idle for 32 characters. - #110 - - - 111 - Enable RDRF assertion due to partially filled FIFO when receiver is idle for 64 characters. - #111 - - - - - RXFLUSH - Receive FIFO/Buffer Flush - 14 - 1 - write-only - - - 0 - No flush operation occurs. - #0 - - - 1 - All data in the receive FIFO/buffer is cleared out. - #1 - - - - - TXFLUSH - Transmit FIFO/Buffer Flush - 15 - 1 - write-only - - - 0 - No flush operation occurs. - #0 - - - 1 - All data in the transmit FIFO/Buffer is cleared out. - #1 - - - - - RXUF - Receiver Buffer Underflow Flag - 16 - 1 - read-write - - - 0 - No receive buffer underflow has occurred since the last time the flag was cleared. - #0 - - - 1 - At least one receive buffer underflow has occurred since the last time the flag was cleared. - #1 - - - - - TXOF - Transmitter Buffer Overflow Flag - 17 - 1 - read-write - - - 0 - No transmit buffer overflow has occurred since the last time the flag was cleared. - #0 - - - 1 - At least one transmit buffer overflow has occurred since the last time the flag was cleared. - #1 - - - - - RXEMPT - Receive Buffer/FIFO Empty - 22 - 1 - read-only - - - 0 - Receive buffer is not empty. - #0 - - - 1 - Receive buffer is empty. - #1 - - - - - TXEMPT - Transmit Buffer/FIFO Empty - 23 - 1 - read-only - - - 0 - Transmit buffer is not empty. - #0 - - - 1 - Transmit buffer is empty. - #1 - - - - - - WATER - LPUART Watermark Register - 0x2C - 32 - read-write - 0 - 0xFFFFFFFF - - - TXWATER - Transmit Watermark - 0 - 2 - read-write - - - TXCOUNT - Transmit Counter - 8 - 3 - read-only - - - RXWATER - Receive Watermark - 16 - 2 - read-write - - - RXCOUNT - Receive Counter - 24 - 3 - read-only - - - - + CMP0 High-Speed Comparator (CMP), Voltage Reference (VREF) Digital-to-Analog Converter (DAC), and Analog Mux (ANMUX) CMP0_ diff --git a/src/lib.rs b/src/lib.rs index 1810a17..46a3f19 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -588,29 +588,25 @@ impl Deref for LPUART0 { } #[doc = "Universal Asynchronous Receiver/Transmitter"] pub const LPUART1: Peripheral = unsafe { Peripheral::new(1074180096) }; -#[doc = "Universal Asynchronous Receiver/Transmitter"] -pub mod lpuart1; -#[doc = "Universal Asynchronous Receiver/Transmitter"] +#[doc = r" Register block"] pub struct LPUART1 { - register_block: lpuart1::RegisterBlock, + register_block: lpuart0::RegisterBlock, } impl Deref for LPUART1 { - type Target = lpuart1::RegisterBlock; - fn deref(&self) -> &lpuart1::RegisterBlock { + type Target = lpuart0::RegisterBlock; + fn deref(&self) -> &lpuart0::RegisterBlock { &self.register_block } } #[doc = "Universal Asynchronous Receiver/Transmitter"] pub const LPUART2: Peripheral = unsafe { Peripheral::new(1074184192) }; -#[doc = "Universal Asynchronous Receiver/Transmitter"] -pub mod lpuart2; -#[doc = "Universal Asynchronous Receiver/Transmitter"] +#[doc = r" Register block"] pub struct LPUART2 { - register_block: lpuart2::RegisterBlock, + register_block: lpuart0::RegisterBlock, } impl Deref for LPUART2 { - type Target = lpuart2::RegisterBlock; - fn deref(&self) -> &lpuart2::RegisterBlock { + type Target = lpuart0::RegisterBlock; + fn deref(&self) -> &lpuart0::RegisterBlock { &self.register_block } } diff --git a/src/lpuart1/baud/mod.rs b/src/lpuart1/baud/mod.rs deleted file mode 100644 index fae2b24..0000000 --- a/src/lpuart1/baud/mod.rs +++ /dev/null @@ -1,2003 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::BAUD { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = r" Value of the field"] -pub struct SBRR { - bits: u16, -} -impl SBRR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u16 { - self.bits - } -} -#[doc = "Possible values of the field `SBNS`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum SBNSR { - #[doc = "One stop bit."] _0, - #[doc = "Two stop bits."] _1, -} -impl SBNSR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - SBNSR::_0 => false, - SBNSR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> SBNSR { - match value { - false => SBNSR::_0, - true => SBNSR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == SBNSR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == SBNSR::_1 - } -} -#[doc = "Possible values of the field `RXEDGIE`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum RXEDGIER { - #[doc = "Hardware interrupts from LPUART_STAT[RXEDGIF] disabled."] _0, - #[doc = "Hardware interrupt requested when LPUART_STAT[RXEDGIF] flag is 1."] _1, -} -impl RXEDGIER { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - RXEDGIER::_0 => false, - RXEDGIER::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> RXEDGIER { - match value { - false => RXEDGIER::_0, - true => RXEDGIER::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == RXEDGIER::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == RXEDGIER::_1 - } -} -#[doc = "Possible values of the field `LBKDIE`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum LBKDIER { - #[doc = "Hardware interrupts from LPUART_STAT[LBKDIF] disabled (use polling)."] _0, - #[doc = "Hardware interrupt requested when LPUART_STAT[LBKDIF] flag is 1."] _1, -} -impl LBKDIER { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - LBKDIER::_0 => false, - LBKDIER::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> LBKDIER { - match value { - false => LBKDIER::_0, - true => LBKDIER::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == LBKDIER::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == LBKDIER::_1 - } -} -#[doc = "Possible values of the field `RESYNCDIS`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum RESYNCDISR { - #[doc = "Resynchronization during received data word is supported"] _0, - #[doc = "Resynchronization during received data word is disabled"] _1, -} -impl RESYNCDISR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - RESYNCDISR::_0 => false, - RESYNCDISR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> RESYNCDISR { - match value { - false => RESYNCDISR::_0, - true => RESYNCDISR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == RESYNCDISR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == RESYNCDISR::_1 - } -} -#[doc = "Possible values of the field `BOTHEDGE`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum BOTHEDGER { - #[doc = "Receiver samples input data using the rising edge of the baud rate clock."] _0, - #[doc = "Receiver samples input data using the rising and falling edge of the baud rate clock."] - _1, -} -impl BOTHEDGER { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - BOTHEDGER::_0 => false, - BOTHEDGER::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> BOTHEDGER { - match value { - false => BOTHEDGER::_0, - true => BOTHEDGER::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == BOTHEDGER::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == BOTHEDGER::_1 - } -} -#[doc = "Possible values of the field `MATCFG`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum MATCFGR { - #[doc = "Address Match Wakeup"] _00, - #[doc = "Idle Match Wakeup"] _01, - #[doc = "Match On and Match Off"] _10, - #[doc = r" Reserved"] _Reserved(u8), -} -impl MATCFGR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - match *self { - MATCFGR::_00 => 0, - MATCFGR::_01 => 1, - MATCFGR::_10 => 2, - MATCFGR::_Reserved(bits) => bits, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: u8) -> MATCFGR { - match value { - 0 => MATCFGR::_00, - 1 => MATCFGR::_01, - 2 => MATCFGR::_10, - i => MATCFGR::_Reserved(i), - } - } - #[doc = "Checks if the value of the field is `_00`"] - #[inline] - pub fn is_00(&self) -> bool { - *self == MATCFGR::_00 - } - #[doc = "Checks if the value of the field is `_01`"] - #[inline] - pub fn is_01(&self) -> bool { - *self == MATCFGR::_01 - } - #[doc = "Checks if the value of the field is `_10`"] - #[inline] - pub fn is_10(&self) -> bool { - *self == MATCFGR::_10 - } -} -#[doc = "Possible values of the field `RIDMAE`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum RIDMAER { - #[doc = "DMA request disabled."] _0, - #[doc = "DMA request enabled."] _1, -} -impl RIDMAER { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - RIDMAER::_0 => false, - RIDMAER::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> RIDMAER { - match value { - false => RIDMAER::_0, - true => RIDMAER::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == RIDMAER::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == RIDMAER::_1 - } -} -#[doc = "Possible values of the field `RDMAE`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum RDMAER { - #[doc = "DMA request disabled."] _0, - #[doc = "DMA request enabled."] _1, -} -impl RDMAER { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - RDMAER::_0 => false, - RDMAER::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> RDMAER { - match value { - false => RDMAER::_0, - true => RDMAER::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == RDMAER::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == RDMAER::_1 - } -} -#[doc = "Possible values of the field `TDMAE`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum TDMAER { - #[doc = "DMA request disabled."] _0, - #[doc = "DMA request enabled."] _1, -} -impl TDMAER { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - TDMAER::_0 => false, - TDMAER::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> TDMAER { - match value { - false => TDMAER::_0, - true => TDMAER::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == TDMAER::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == TDMAER::_1 - } -} -#[doc = "Possible values of the field `OSR`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum OSRR { - #[doc = "Writing 0 to this field will result in an oversampling ratio of 16"] _00000, - #[doc = "Oversampling ratio of 4, requires BOTHEDGE to be set."] _00011, - #[doc = "Oversampling ratio of 5, requires BOTHEDGE to be set."] _00100, - #[doc = "Oversampling ratio of 6, requires BOTHEDGE to be set."] _00101, - #[doc = "Oversampling ratio of 7, requires BOTHEDGE to be set."] _00110, - #[doc = "Oversampling ratio of 8."] _00111, - #[doc = "Oversampling ratio of 9."] _01000, - #[doc = "Oversampling ratio of 10."] _01001, - #[doc = "Oversampling ratio of 11."] _01010, - #[doc = "Oversampling ratio of 12."] _01011, - #[doc = "Oversampling ratio of 13."] _01100, - #[doc = "Oversampling ratio of 14."] _01101, - #[doc = "Oversampling ratio of 15."] _01110, - #[doc = "Oversampling ratio of 16."] _01111, - #[doc = "Oversampling ratio of 17."] _10000, - #[doc = "Oversampling ratio of 18."] _10001, - #[doc = "Oversampling ratio of 19."] _10010, - #[doc = "Oversampling ratio of 20."] _10011, - #[doc = "Oversampling ratio of 21."] _10100, - #[doc = "Oversampling ratio of 22."] _10101, - #[doc = "Oversampling ratio of 23."] _10110, - #[doc = "Oversampling ratio of 24."] _10111, - #[doc = "Oversampling ratio of 25."] _11000, - #[doc = "Oversampling ratio of 26."] _11001, - #[doc = "Oversampling ratio of 27."] _11010, - #[doc = "Oversampling ratio of 28."] _11011, - #[doc = "Oversampling ratio of 29."] _11100, - #[doc = "Oversampling ratio of 30."] _11101, - #[doc = "Oversampling ratio of 31."] _11110, - #[doc = "Oversampling ratio of 32."] _11111, - #[doc = r" Reserved"] _Reserved(u8), -} -impl OSRR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - match *self { - OSRR::_00000 => 0, - OSRR::_00011 => 3, - OSRR::_00100 => 4, - OSRR::_00101 => 5, - OSRR::_00110 => 6, - OSRR::_00111 => 7, - OSRR::_01000 => 8, - OSRR::_01001 => 9, - OSRR::_01010 => 10, - OSRR::_01011 => 11, - OSRR::_01100 => 12, - OSRR::_01101 => 13, - OSRR::_01110 => 14, - OSRR::_01111 => 15, - OSRR::_10000 => 16, - OSRR::_10001 => 17, - OSRR::_10010 => 18, - OSRR::_10011 => 19, - OSRR::_10100 => 20, - OSRR::_10101 => 21, - OSRR::_10110 => 22, - OSRR::_10111 => 23, - OSRR::_11000 => 24, - OSRR::_11001 => 25, - OSRR::_11010 => 26, - OSRR::_11011 => 27, - OSRR::_11100 => 28, - OSRR::_11101 => 29, - OSRR::_11110 => 30, - OSRR::_11111 => 31, - OSRR::_Reserved(bits) => bits, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: u8) -> OSRR { - match value { - 0 => OSRR::_00000, - 3 => OSRR::_00011, - 4 => OSRR::_00100, - 5 => OSRR::_00101, - 6 => OSRR::_00110, - 7 => OSRR::_00111, - 8 => OSRR::_01000, - 9 => OSRR::_01001, - 10 => OSRR::_01010, - 11 => OSRR::_01011, - 12 => OSRR::_01100, - 13 => OSRR::_01101, - 14 => OSRR::_01110, - 15 => OSRR::_01111, - 16 => OSRR::_10000, - 17 => OSRR::_10001, - 18 => OSRR::_10010, - 19 => OSRR::_10011, - 20 => OSRR::_10100, - 21 => OSRR::_10101, - 22 => OSRR::_10110, - 23 => OSRR::_10111, - 24 => OSRR::_11000, - 25 => OSRR::_11001, - 26 => OSRR::_11010, - 27 => OSRR::_11011, - 28 => OSRR::_11100, - 29 => OSRR::_11101, - 30 => OSRR::_11110, - 31 => OSRR::_11111, - i => OSRR::_Reserved(i), - } - } - #[doc = "Checks if the value of the field is `_00000`"] - #[inline] - pub fn is_00000(&self) -> bool { - *self == OSRR::_00000 - } - #[doc = "Checks if the value of the field is `_00011`"] - #[inline] - pub fn is_00011(&self) -> bool { - *self == OSRR::_00011 - } - #[doc = "Checks if the value of the field is `_00100`"] - #[inline] - pub fn is_00100(&self) -> bool { - *self == OSRR::_00100 - } - #[doc = "Checks if the value of the field is `_00101`"] - #[inline] - pub fn is_00101(&self) -> bool { - *self == OSRR::_00101 - } - #[doc = "Checks if the value of the field is `_00110`"] - #[inline] - pub fn is_00110(&self) -> bool { - *self == OSRR::_00110 - } - #[doc = "Checks if the value of the field is `_00111`"] - #[inline] - pub fn is_00111(&self) -> bool { - *self == OSRR::_00111 - } - #[doc = "Checks if the value of the field is `_01000`"] - #[inline] - pub fn is_01000(&self) -> bool { - *self == OSRR::_01000 - } - #[doc = "Checks if the value of the field is `_01001`"] - #[inline] - pub fn is_01001(&self) -> bool { - *self == OSRR::_01001 - } - #[doc = "Checks if the value of the field is `_01010`"] - #[inline] - pub fn is_01010(&self) -> bool { - *self == OSRR::_01010 - } - #[doc = "Checks if the value of the field is `_01011`"] - #[inline] - pub fn is_01011(&self) -> bool { - *self == OSRR::_01011 - } - #[doc = "Checks if the value of the field is `_01100`"] - #[inline] - pub fn is_01100(&self) -> bool { - *self == OSRR::_01100 - } - #[doc = "Checks if the value of the field is `_01101`"] - #[inline] - pub fn is_01101(&self) -> bool { - *self == OSRR::_01101 - } - #[doc = "Checks if the value of the field is `_01110`"] - #[inline] - pub fn is_01110(&self) -> bool { - *self == OSRR::_01110 - } - #[doc = "Checks if the value of the field is `_01111`"] - #[inline] - pub fn is_01111(&self) -> bool { - *self == OSRR::_01111 - } - #[doc = "Checks if the value of the field is `_10000`"] - #[inline] - pub fn is_10000(&self) -> bool { - *self == OSRR::_10000 - } - #[doc = "Checks if the value of the field is `_10001`"] - #[inline] - pub fn is_10001(&self) -> bool { - *self == OSRR::_10001 - } - #[doc = "Checks if the value of the field is `_10010`"] - #[inline] - pub fn is_10010(&self) -> bool { - *self == OSRR::_10010 - } - #[doc = "Checks if the value of the field is `_10011`"] - #[inline] - pub fn is_10011(&self) -> bool { - *self == OSRR::_10011 - } - #[doc = "Checks if the value of the field is `_10100`"] - #[inline] - pub fn is_10100(&self) -> bool { - *self == OSRR::_10100 - } - #[doc = "Checks if the value of the field is `_10101`"] - #[inline] - pub fn is_10101(&self) -> bool { - *self == OSRR::_10101 - } - #[doc = "Checks if the value of the field is `_10110`"] - #[inline] - pub fn is_10110(&self) -> bool { - *self == OSRR::_10110 - } - #[doc = "Checks if the value of the field is `_10111`"] - #[inline] - pub fn is_10111(&self) -> bool { - *self == OSRR::_10111 - } - #[doc = "Checks if the value of the field is `_11000`"] - #[inline] - pub fn is_11000(&self) -> bool { - *self == OSRR::_11000 - } - #[doc = "Checks if the value of the field is `_11001`"] - #[inline] - pub fn is_11001(&self) -> bool { - *self == OSRR::_11001 - } - #[doc = "Checks if the value of the field is `_11010`"] - #[inline] - pub fn is_11010(&self) -> bool { - *self == OSRR::_11010 - } - #[doc = "Checks if the value of the field is `_11011`"] - #[inline] - pub fn is_11011(&self) -> bool { - *self == OSRR::_11011 - } - #[doc = "Checks if the value of the field is `_11100`"] - #[inline] - pub fn is_11100(&self) -> bool { - *self == OSRR::_11100 - } - #[doc = "Checks if the value of the field is `_11101`"] - #[inline] - pub fn is_11101(&self) -> bool { - *self == OSRR::_11101 - } - #[doc = "Checks if the value of the field is `_11110`"] - #[inline] - pub fn is_11110(&self) -> bool { - *self == OSRR::_11110 - } - #[doc = "Checks if the value of the field is `_11111`"] - #[inline] - pub fn is_11111(&self) -> bool { - *self == OSRR::_11111 - } -} -#[doc = "Possible values of the field `M10`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum M10R { - #[doc = "Receiver and transmitter use 7-bit to 9-bit data characters."] _0, - #[doc = "Receiver and transmitter use 10-bit data characters."] _1, -} -impl M10R { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - M10R::_0 => false, - M10R::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> M10R { - match value { - false => M10R::_0, - true => M10R::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == M10R::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == M10R::_1 - } -} -#[doc = "Possible values of the field `MAEN2`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum MAEN2R { - #[doc = "Normal operation."] _0, - #[doc = "Enables automatic address matching or data matching mode for MATCH[MA2]."] _1, -} -impl MAEN2R { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - MAEN2R::_0 => false, - MAEN2R::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> MAEN2R { - match value { - false => MAEN2R::_0, - true => MAEN2R::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == MAEN2R::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == MAEN2R::_1 - } -} -#[doc = "Possible values of the field `MAEN1`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum MAEN1R { - #[doc = "Normal operation."] _0, - #[doc = "Enables automatic address matching or data matching mode for MATCH[MA1]."] _1, -} -impl MAEN1R { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - MAEN1R::_0 => false, - MAEN1R::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> MAEN1R { - match value { - false => MAEN1R::_0, - true => MAEN1R::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == MAEN1R::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == MAEN1R::_1 - } -} -#[doc = r" Proxy"] -pub struct _SBRW<'a> { - w: &'a mut W, -} -impl<'a> _SBRW<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u16) -> &'a mut W { - const MASK: u16 = 8191; - const OFFSET: u8 = 0; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `SBNS`"] -pub enum SBNSW { - #[doc = "One stop bit."] _0, - #[doc = "Two stop bits."] _1, -} -impl SBNSW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - SBNSW::_0 => false, - SBNSW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _SBNSW<'a> { - w: &'a mut W, -} -impl<'a> _SBNSW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: SBNSW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "One stop bit."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(SBNSW::_0) - } - #[doc = "Two stop bits."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(SBNSW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 13; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `RXEDGIE`"] -pub enum RXEDGIEW { - #[doc = "Hardware interrupts from LPUART_STAT[RXEDGIF] disabled."] _0, - #[doc = "Hardware interrupt requested when LPUART_STAT[RXEDGIF] flag is 1."] _1, -} -impl RXEDGIEW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - RXEDGIEW::_0 => false, - RXEDGIEW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _RXEDGIEW<'a> { - w: &'a mut W, -} -impl<'a> _RXEDGIEW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: RXEDGIEW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Hardware interrupts from LPUART_STAT[RXEDGIF] disabled."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(RXEDGIEW::_0) - } - #[doc = "Hardware interrupt requested when LPUART_STAT[RXEDGIF] flag is 1."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(RXEDGIEW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 14; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `LBKDIE`"] -pub enum LBKDIEW { - #[doc = "Hardware interrupts from LPUART_STAT[LBKDIF] disabled (use polling)."] _0, - #[doc = "Hardware interrupt requested when LPUART_STAT[LBKDIF] flag is 1."] _1, -} -impl LBKDIEW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - LBKDIEW::_0 => false, - LBKDIEW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _LBKDIEW<'a> { - w: &'a mut W, -} -impl<'a> _LBKDIEW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: LBKDIEW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Hardware interrupts from LPUART_STAT[LBKDIF] disabled (use polling)."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(LBKDIEW::_0) - } - #[doc = "Hardware interrupt requested when LPUART_STAT[LBKDIF] flag is 1."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(LBKDIEW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 15; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `RESYNCDIS`"] -pub enum RESYNCDISW { - #[doc = "Resynchronization during received data word is supported"] _0, - #[doc = "Resynchronization during received data word is disabled"] _1, -} -impl RESYNCDISW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - RESYNCDISW::_0 => false, - RESYNCDISW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _RESYNCDISW<'a> { - w: &'a mut W, -} -impl<'a> _RESYNCDISW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: RESYNCDISW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Resynchronization during received data word is supported"] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(RESYNCDISW::_0) - } - #[doc = "Resynchronization during received data word is disabled"] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(RESYNCDISW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 16; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `BOTHEDGE`"] -pub enum BOTHEDGEW { - #[doc = "Receiver samples input data using the rising edge of the baud rate clock."] _0, - #[doc = "Receiver samples input data using the rising and falling edge of the baud rate clock."] - _1, -} -impl BOTHEDGEW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - BOTHEDGEW::_0 => false, - BOTHEDGEW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _BOTHEDGEW<'a> { - w: &'a mut W, -} -impl<'a> _BOTHEDGEW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: BOTHEDGEW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Receiver samples input data using the rising edge of the baud rate clock."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(BOTHEDGEW::_0) - } - #[doc = "Receiver samples input data using the rising and falling edge of the baud rate clock."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(BOTHEDGEW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 17; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `MATCFG`"] -pub enum MATCFGW { - #[doc = "Address Match Wakeup"] _00, - #[doc = "Idle Match Wakeup"] _01, - #[doc = "Match On and Match Off"] _10, -} -impl MATCFGW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> u8 { - match *self { - MATCFGW::_00 => 0, - MATCFGW::_01 => 1, - MATCFGW::_10 => 2, - } - } -} -#[doc = r" Proxy"] -pub struct _MATCFGW<'a> { - w: &'a mut W, -} -impl<'a> _MATCFGW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: MATCFGW) -> &'a mut W { - unsafe { self.bits(variant._bits()) } - } - #[doc = "Address Match Wakeup"] - #[inline] - pub fn _00(self) -> &'a mut W { - self.variant(MATCFGW::_00) - } - #[doc = "Idle Match Wakeup"] - #[inline] - pub fn _01(self) -> &'a mut W { - self.variant(MATCFGW::_01) - } - #[doc = "Match On and Match Off"] - #[inline] - pub fn _10(self) -> &'a mut W { - self.variant(MATCFGW::_10) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 3; - const OFFSET: u8 = 18; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `RIDMAE`"] -pub enum RIDMAEW { - #[doc = "DMA request disabled."] _0, - #[doc = "DMA request enabled."] _1, -} -impl RIDMAEW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - RIDMAEW::_0 => false, - RIDMAEW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _RIDMAEW<'a> { - w: &'a mut W, -} -impl<'a> _RIDMAEW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: RIDMAEW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "DMA request disabled."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(RIDMAEW::_0) - } - #[doc = "DMA request enabled."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(RIDMAEW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 20; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `RDMAE`"] -pub enum RDMAEW { - #[doc = "DMA request disabled."] _0, - #[doc = "DMA request enabled."] _1, -} -impl RDMAEW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - RDMAEW::_0 => false, - RDMAEW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _RDMAEW<'a> { - w: &'a mut W, -} -impl<'a> _RDMAEW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: RDMAEW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "DMA request disabled."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(RDMAEW::_0) - } - #[doc = "DMA request enabled."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(RDMAEW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 21; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `TDMAE`"] -pub enum TDMAEW { - #[doc = "DMA request disabled."] _0, - #[doc = "DMA request enabled."] _1, -} -impl TDMAEW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - TDMAEW::_0 => false, - TDMAEW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _TDMAEW<'a> { - w: &'a mut W, -} -impl<'a> _TDMAEW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: TDMAEW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "DMA request disabled."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(TDMAEW::_0) - } - #[doc = "DMA request enabled."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(TDMAEW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 23; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `OSR`"] -pub enum OSRW { - #[doc = "Writing 0 to this field will result in an oversampling ratio of 16"] _00000, - #[doc = "Oversampling ratio of 4, requires BOTHEDGE to be set."] _00011, - #[doc = "Oversampling ratio of 5, requires BOTHEDGE to be set."] _00100, - #[doc = "Oversampling ratio of 6, requires BOTHEDGE to be set."] _00101, - #[doc = "Oversampling ratio of 7, requires BOTHEDGE to be set."] _00110, - #[doc = "Oversampling ratio of 8."] _00111, - #[doc = "Oversampling ratio of 9."] _01000, - #[doc = "Oversampling ratio of 10."] _01001, - #[doc = "Oversampling ratio of 11."] _01010, - #[doc = "Oversampling ratio of 12."] _01011, - #[doc = "Oversampling ratio of 13."] _01100, - #[doc = "Oversampling ratio of 14."] _01101, - #[doc = "Oversampling ratio of 15."] _01110, - #[doc = "Oversampling ratio of 16."] _01111, - #[doc = "Oversampling ratio of 17."] _10000, - #[doc = "Oversampling ratio of 18."] _10001, - #[doc = "Oversampling ratio of 19."] _10010, - #[doc = "Oversampling ratio of 20."] _10011, - #[doc = "Oversampling ratio of 21."] _10100, - #[doc = "Oversampling ratio of 22."] _10101, - #[doc = "Oversampling ratio of 23."] _10110, - #[doc = "Oversampling ratio of 24."] _10111, - #[doc = "Oversampling ratio of 25."] _11000, - #[doc = "Oversampling ratio of 26."] _11001, - #[doc = "Oversampling ratio of 27."] _11010, - #[doc = "Oversampling ratio of 28."] _11011, - #[doc = "Oversampling ratio of 29."] _11100, - #[doc = "Oversampling ratio of 30."] _11101, - #[doc = "Oversampling ratio of 31."] _11110, - #[doc = "Oversampling ratio of 32."] _11111, -} -impl OSRW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> u8 { - match *self { - OSRW::_00000 => 0, - OSRW::_00011 => 3, - OSRW::_00100 => 4, - OSRW::_00101 => 5, - OSRW::_00110 => 6, - OSRW::_00111 => 7, - OSRW::_01000 => 8, - OSRW::_01001 => 9, - OSRW::_01010 => 10, - OSRW::_01011 => 11, - OSRW::_01100 => 12, - OSRW::_01101 => 13, - OSRW::_01110 => 14, - OSRW::_01111 => 15, - OSRW::_10000 => 16, - OSRW::_10001 => 17, - OSRW::_10010 => 18, - OSRW::_10011 => 19, - OSRW::_10100 => 20, - OSRW::_10101 => 21, - OSRW::_10110 => 22, - OSRW::_10111 => 23, - OSRW::_11000 => 24, - OSRW::_11001 => 25, - OSRW::_11010 => 26, - OSRW::_11011 => 27, - OSRW::_11100 => 28, - OSRW::_11101 => 29, - OSRW::_11110 => 30, - OSRW::_11111 => 31, - } - } -} -#[doc = r" Proxy"] -pub struct _OSRW<'a> { - w: &'a mut W, -} -impl<'a> _OSRW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: OSRW) -> &'a mut W { - unsafe { self.bits(variant._bits()) } - } - #[doc = "Writing 0 to this field will result in an oversampling ratio of 16"] - #[inline] - pub fn _00000(self) -> &'a mut W { - self.variant(OSRW::_00000) - } - #[doc = "Oversampling ratio of 4, requires BOTHEDGE to be set."] - #[inline] - pub fn _00011(self) -> &'a mut W { - self.variant(OSRW::_00011) - } - #[doc = "Oversampling ratio of 5, requires BOTHEDGE to be set."] - #[inline] - pub fn _00100(self) -> &'a mut W { - self.variant(OSRW::_00100) - } - #[doc = "Oversampling ratio of 6, requires BOTHEDGE to be set."] - #[inline] - pub fn _00101(self) -> &'a mut W { - self.variant(OSRW::_00101) - } - #[doc = "Oversampling ratio of 7, requires BOTHEDGE to be set."] - #[inline] - pub fn _00110(self) -> &'a mut W { - self.variant(OSRW::_00110) - } - #[doc = "Oversampling ratio of 8."] - #[inline] - pub fn _00111(self) -> &'a mut W { - self.variant(OSRW::_00111) - } - #[doc = "Oversampling ratio of 9."] - #[inline] - pub fn _01000(self) -> &'a mut W { - self.variant(OSRW::_01000) - } - #[doc = "Oversampling ratio of 10."] - #[inline] - pub fn _01001(self) -> &'a mut W { - self.variant(OSRW::_01001) - } - #[doc = "Oversampling ratio of 11."] - #[inline] - pub fn _01010(self) -> &'a mut W { - self.variant(OSRW::_01010) - } - #[doc = "Oversampling ratio of 12."] - #[inline] - pub fn _01011(self) -> &'a mut W { - self.variant(OSRW::_01011) - } - #[doc = "Oversampling ratio of 13."] - #[inline] - pub fn _01100(self) -> &'a mut W { - self.variant(OSRW::_01100) - } - #[doc = "Oversampling ratio of 14."] - #[inline] - pub fn _01101(self) -> &'a mut W { - self.variant(OSRW::_01101) - } - #[doc = "Oversampling ratio of 15."] - #[inline] - pub fn _01110(self) -> &'a mut W { - self.variant(OSRW::_01110) - } - #[doc = "Oversampling ratio of 16."] - #[inline] - pub fn _01111(self) -> &'a mut W { - self.variant(OSRW::_01111) - } - #[doc = "Oversampling ratio of 17."] - #[inline] - pub fn _10000(self) -> &'a mut W { - self.variant(OSRW::_10000) - } - #[doc = "Oversampling ratio of 18."] - #[inline] - pub fn _10001(self) -> &'a mut W { - self.variant(OSRW::_10001) - } - #[doc = "Oversampling ratio of 19."] - #[inline] - pub fn _10010(self) -> &'a mut W { - self.variant(OSRW::_10010) - } - #[doc = "Oversampling ratio of 20."] - #[inline] - pub fn _10011(self) -> &'a mut W { - self.variant(OSRW::_10011) - } - #[doc = "Oversampling ratio of 21."] - #[inline] - pub fn _10100(self) -> &'a mut W { - self.variant(OSRW::_10100) - } - #[doc = "Oversampling ratio of 22."] - #[inline] - pub fn _10101(self) -> &'a mut W { - self.variant(OSRW::_10101) - } - #[doc = "Oversampling ratio of 23."] - #[inline] - pub fn _10110(self) -> &'a mut W { - self.variant(OSRW::_10110) - } - #[doc = "Oversampling ratio of 24."] - #[inline] - pub fn _10111(self) -> &'a mut W { - self.variant(OSRW::_10111) - } - #[doc = "Oversampling ratio of 25."] - #[inline] - pub fn _11000(self) -> &'a mut W { - self.variant(OSRW::_11000) - } - #[doc = "Oversampling ratio of 26."] - #[inline] - pub fn _11001(self) -> &'a mut W { - self.variant(OSRW::_11001) - } - #[doc = "Oversampling ratio of 27."] - #[inline] - pub fn _11010(self) -> &'a mut W { - self.variant(OSRW::_11010) - } - #[doc = "Oversampling ratio of 28."] - #[inline] - pub fn _11011(self) -> &'a mut W { - self.variant(OSRW::_11011) - } - #[doc = "Oversampling ratio of 29."] - #[inline] - pub fn _11100(self) -> &'a mut W { - self.variant(OSRW::_11100) - } - #[doc = "Oversampling ratio of 30."] - #[inline] - pub fn _11101(self) -> &'a mut W { - self.variant(OSRW::_11101) - } - #[doc = "Oversampling ratio of 31."] - #[inline] - pub fn _11110(self) -> &'a mut W { - self.variant(OSRW::_11110) - } - #[doc = "Oversampling ratio of 32."] - #[inline] - pub fn _11111(self) -> &'a mut W { - self.variant(OSRW::_11111) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 31; - const OFFSET: u8 = 24; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `M10`"] -pub enum M10W { - #[doc = "Receiver and transmitter use 7-bit to 9-bit data characters."] _0, - #[doc = "Receiver and transmitter use 10-bit data characters."] _1, -} -impl M10W { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - M10W::_0 => false, - M10W::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _M10W<'a> { - w: &'a mut W, -} -impl<'a> _M10W<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: M10W) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Receiver and transmitter use 7-bit to 9-bit data characters."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(M10W::_0) - } - #[doc = "Receiver and transmitter use 10-bit data characters."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(M10W::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 29; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `MAEN2`"] -pub enum MAEN2W { - #[doc = "Normal operation."] _0, - #[doc = "Enables automatic address matching or data matching mode for MATCH[MA2]."] _1, -} -impl MAEN2W { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - MAEN2W::_0 => false, - MAEN2W::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _MAEN2W<'a> { - w: &'a mut W, -} -impl<'a> _MAEN2W<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: MAEN2W) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Normal operation."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(MAEN2W::_0) - } - #[doc = "Enables automatic address matching or data matching mode for MATCH[MA2]."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(MAEN2W::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 30; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `MAEN1`"] -pub enum MAEN1W { - #[doc = "Normal operation."] _0, - #[doc = "Enables automatic address matching or data matching mode for MATCH[MA1]."] _1, -} -impl MAEN1W { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - MAEN1W::_0 => false, - MAEN1W::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _MAEN1W<'a> { - w: &'a mut W, -} -impl<'a> _MAEN1W<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: MAEN1W) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Normal operation."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(MAEN1W::_0) - } - #[doc = "Enables automatic address matching or data matching mode for MATCH[MA1]."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(MAEN1W::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 31; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:12 - Baud Rate Modulo Divisor."] - #[inline] - pub fn sbr(&self) -> SBRR { - let bits = { - const MASK: u16 = 8191; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u16 - }; - SBRR { bits } - } - #[doc = "Bit 13 - Stop Bit Number Select"] - #[inline] - pub fn sbns(&self) -> SBNSR { - SBNSR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 13; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 14 - RX Input Active Edge Interrupt Enable"] - #[inline] - pub fn rxedgie(&self) -> RXEDGIER { - RXEDGIER::_from({ - const MASK: bool = true; - const OFFSET: u8 = 14; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 15 - LIN Break Detect Interrupt Enable"] - #[inline] - pub fn lbkdie(&self) -> LBKDIER { - LBKDIER::_from({ - const MASK: bool = true; - const OFFSET: u8 = 15; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 16 - Resynchronization Disable"] - #[inline] - pub fn resyncdis(&self) -> RESYNCDISR { - RESYNCDISR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 16; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 17 - Both Edge Sampling"] - #[inline] - pub fn bothedge(&self) -> BOTHEDGER { - BOTHEDGER::_from({ - const MASK: bool = true; - const OFFSET: u8 = 17; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bits 18:19 - Match Configuration"] - #[inline] - pub fn matcfg(&self) -> MATCFGR { - MATCFGR::_from({ - const MASK: u8 = 3; - const OFFSET: u8 = 18; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }) - } - #[doc = "Bit 20 - Receiver Idle DMA Enable"] - #[inline] - pub fn ridmae(&self) -> RIDMAER { - RIDMAER::_from({ - const MASK: bool = true; - const OFFSET: u8 = 20; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 21 - Receiver Full DMA Enable"] - #[inline] - pub fn rdmae(&self) -> RDMAER { - RDMAER::_from({ - const MASK: bool = true; - const OFFSET: u8 = 21; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 23 - Transmitter DMA Enable"] - #[inline] - pub fn tdmae(&self) -> TDMAER { - TDMAER::_from({ - const MASK: bool = true; - const OFFSET: u8 = 23; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bits 24:28 - Oversampling Ratio"] - #[inline] - pub fn osr(&self) -> OSRR { - OSRR::_from({ - const MASK: u8 = 31; - const OFFSET: u8 = 24; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }) - } - #[doc = "Bit 29 - 10-bit Mode select"] - #[inline] - pub fn m10(&self) -> M10R { - M10R::_from({ - const MASK: bool = true; - const OFFSET: u8 = 29; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 30 - Match Address Mode Enable 2"] - #[inline] - pub fn maen2(&self) -> MAEN2R { - MAEN2R::_from({ - const MASK: bool = true; - const OFFSET: u8 = 30; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 31 - Match Address Mode Enable 1"] - #[inline] - pub fn maen1(&self) -> MAEN1R { - MAEN1R::_from({ - const MASK: bool = true; - const OFFSET: u8 = 31; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 251658244 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bits 0:12 - Baud Rate Modulo Divisor."] - #[inline] - pub fn sbr(&mut self) -> _SBRW { - _SBRW { w: self } - } - #[doc = "Bit 13 - Stop Bit Number Select"] - #[inline] - pub fn sbns(&mut self) -> _SBNSW { - _SBNSW { w: self } - } - #[doc = "Bit 14 - RX Input Active Edge Interrupt Enable"] - #[inline] - pub fn rxedgie(&mut self) -> _RXEDGIEW { - _RXEDGIEW { w: self } - } - #[doc = "Bit 15 - LIN Break Detect Interrupt Enable"] - #[inline] - pub fn lbkdie(&mut self) -> _LBKDIEW { - _LBKDIEW { w: self } - } - #[doc = "Bit 16 - Resynchronization Disable"] - #[inline] - pub fn resyncdis(&mut self) -> _RESYNCDISW { - _RESYNCDISW { w: self } - } - #[doc = "Bit 17 - Both Edge Sampling"] - #[inline] - pub fn bothedge(&mut self) -> _BOTHEDGEW { - _BOTHEDGEW { w: self } - } - #[doc = "Bits 18:19 - Match Configuration"] - #[inline] - pub fn matcfg(&mut self) -> _MATCFGW { - _MATCFGW { w: self } - } - #[doc = "Bit 20 - Receiver Idle DMA Enable"] - #[inline] - pub fn ridmae(&mut self) -> _RIDMAEW { - _RIDMAEW { w: self } - } - #[doc = "Bit 21 - Receiver Full DMA Enable"] - #[inline] - pub fn rdmae(&mut self) -> _RDMAEW { - _RDMAEW { w: self } - } - #[doc = "Bit 23 - Transmitter DMA Enable"] - #[inline] - pub fn tdmae(&mut self) -> _TDMAEW { - _TDMAEW { w: self } - } - #[doc = "Bits 24:28 - Oversampling Ratio"] - #[inline] - pub fn osr(&mut self) -> _OSRW { - _OSRW { w: self } - } - #[doc = "Bit 29 - 10-bit Mode select"] - #[inline] - pub fn m10(&mut self) -> _M10W { - _M10W { w: self } - } - #[doc = "Bit 30 - Match Address Mode Enable 2"] - #[inline] - pub fn maen2(&mut self) -> _MAEN2W { - _MAEN2W { w: self } - } - #[doc = "Bit 31 - Match Address Mode Enable 1"] - #[inline] - pub fn maen1(&mut self) -> _MAEN1W { - _MAEN1W { w: self } - } -} diff --git a/src/lpuart1/ctrl/mod.rs b/src/lpuart1/ctrl/mod.rs deleted file mode 100644 index 30a6612..0000000 --- a/src/lpuart1/ctrl/mod.rs +++ /dev/null @@ -1,3251 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::CTRL { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = "Possible values of the field `PT`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum PTR { - #[doc = "Even parity."] _0, - #[doc = "Odd parity."] _1, -} -impl PTR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - PTR::_0 => false, - PTR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> PTR { - match value { - false => PTR::_0, - true => PTR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == PTR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == PTR::_1 - } -} -#[doc = "Possible values of the field `PE`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum PER { - #[doc = "No hardware parity generation or checking."] _0, - #[doc = "Parity enabled."] _1, -} -impl PER { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - PER::_0 => false, - PER::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> PER { - match value { - false => PER::_0, - true => PER::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == PER::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == PER::_1 - } -} -#[doc = "Possible values of the field `ILT`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum ILTR { - #[doc = "Idle character bit count starts after start bit."] _0, - #[doc = "Idle character bit count starts after stop bit."] _1, -} -impl ILTR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - ILTR::_0 => false, - ILTR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> ILTR { - match value { - false => ILTR::_0, - true => ILTR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == ILTR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == ILTR::_1 - } -} -#[doc = "Possible values of the field `WAKE`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum WAKER { - #[doc = "Configures RWU for idle-line wakeup."] _0, - #[doc = "Configures RWU with address-mark wakeup."] _1, -} -impl WAKER { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - WAKER::_0 => false, - WAKER::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> WAKER { - match value { - false => WAKER::_0, - true => WAKER::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == WAKER::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == WAKER::_1 - } -} -#[doc = "Possible values of the field `M`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum MR { - #[doc = "Receiver and transmitter use 8-bit data characters."] _0, - #[doc = "Receiver and transmitter use 9-bit data characters."] _1, -} -impl MR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - MR::_0 => false, - MR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> MR { - match value { - false => MR::_0, - true => MR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == MR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == MR::_1 - } -} -#[doc = "Possible values of the field `RSRC`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum RSRCR { - #[doc = "Provided LOOPS is set, RSRC is cleared, selects internal loop back mode and the LPUART does not use the RXD pin."] - _0, - #[doc = "Single-wire LPUART mode where the TXD pin is connected to the transmitter output and receiver input."] - _1, -} -impl RSRCR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - RSRCR::_0 => false, - RSRCR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> RSRCR { - match value { - false => RSRCR::_0, - true => RSRCR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == RSRCR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == RSRCR::_1 - } -} -#[doc = "Possible values of the field `DOZEEN`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum DOZEENR { - #[doc = "LPUART is enabled in Doze mode."] _0, - #[doc = "LPUART is disabled in Doze mode."] _1, -} -impl DOZEENR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - DOZEENR::_0 => false, - DOZEENR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> DOZEENR { - match value { - false => DOZEENR::_0, - true => DOZEENR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == DOZEENR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == DOZEENR::_1 - } -} -#[doc = "Possible values of the field `LOOPS`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum LOOPSR { - #[doc = "Normal operation - RXD and TXD use separate pins."] _0, - #[doc = "Loop mode or single-wire mode where transmitter outputs are internally connected to receiver input (see RSRC bit)."] - _1, -} -impl LOOPSR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - LOOPSR::_0 => false, - LOOPSR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> LOOPSR { - match value { - false => LOOPSR::_0, - true => LOOPSR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == LOOPSR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == LOOPSR::_1 - } -} -#[doc = "Possible values of the field `IDLECFG`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum IDLECFGR { - #[doc = "1 idle character"] _000, - #[doc = "2 idle characters"] _001, - #[doc = "4 idle characters"] _010, - #[doc = "8 idle characters"] _011, - #[doc = "16 idle characters"] _100, - #[doc = "32 idle characters"] _101, - #[doc = "64 idle characters"] _110, - #[doc = "128 idle characters"] _111, -} -impl IDLECFGR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - match *self { - IDLECFGR::_000 => 0, - IDLECFGR::_001 => 1, - IDLECFGR::_010 => 2, - IDLECFGR::_011 => 3, - IDLECFGR::_100 => 4, - IDLECFGR::_101 => 5, - IDLECFGR::_110 => 6, - IDLECFGR::_111 => 7, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: u8) -> IDLECFGR { - match value { - 0 => IDLECFGR::_000, - 1 => IDLECFGR::_001, - 2 => IDLECFGR::_010, - 3 => IDLECFGR::_011, - 4 => IDLECFGR::_100, - 5 => IDLECFGR::_101, - 6 => IDLECFGR::_110, - 7 => IDLECFGR::_111, - _ => unreachable!(), - } - } - #[doc = "Checks if the value of the field is `_000`"] - #[inline] - pub fn is_000(&self) -> bool { - *self == IDLECFGR::_000 - } - #[doc = "Checks if the value of the field is `_001`"] - #[inline] - pub fn is_001(&self) -> bool { - *self == IDLECFGR::_001 - } - #[doc = "Checks if the value of the field is `_010`"] - #[inline] - pub fn is_010(&self) -> bool { - *self == IDLECFGR::_010 - } - #[doc = "Checks if the value of the field is `_011`"] - #[inline] - pub fn is_011(&self) -> bool { - *self == IDLECFGR::_011 - } - #[doc = "Checks if the value of the field is `_100`"] - #[inline] - pub fn is_100(&self) -> bool { - *self == IDLECFGR::_100 - } - #[doc = "Checks if the value of the field is `_101`"] - #[inline] - pub fn is_101(&self) -> bool { - *self == IDLECFGR::_101 - } - #[doc = "Checks if the value of the field is `_110`"] - #[inline] - pub fn is_110(&self) -> bool { - *self == IDLECFGR::_110 - } - #[doc = "Checks if the value of the field is `_111`"] - #[inline] - pub fn is_111(&self) -> bool { - *self == IDLECFGR::_111 - } -} -#[doc = "Possible values of the field `M7`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum M7R { - #[doc = "Receiver and transmitter use 8-bit to 10-bit data characters."] _0, - #[doc = "Receiver and transmitter use 7-bit data characters."] _1, -} -impl M7R { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - M7R::_0 => false, - M7R::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> M7R { - match value { - false => M7R::_0, - true => M7R::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == M7R::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == M7R::_1 - } -} -#[doc = "Possible values of the field `MA2IE`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum MA2IER { - #[doc = "MA2F interrupt disabled"] _0, - #[doc = "MA2F interrupt enabled"] _1, -} -impl MA2IER { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - MA2IER::_0 => false, - MA2IER::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> MA2IER { - match value { - false => MA2IER::_0, - true => MA2IER::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == MA2IER::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == MA2IER::_1 - } -} -#[doc = "Possible values of the field `MA1IE`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum MA1IER { - #[doc = "MA1F interrupt disabled"] _0, - #[doc = "MA1F interrupt enabled"] _1, -} -impl MA1IER { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - MA1IER::_0 => false, - MA1IER::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> MA1IER { - match value { - false => MA1IER::_0, - true => MA1IER::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == MA1IER::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == MA1IER::_1 - } -} -#[doc = "Possible values of the field `SBK`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum SBKR { - #[doc = "Normal transmitter operation."] _0, - #[doc = "Queue break character(s) to be sent."] _1, -} -impl SBKR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - SBKR::_0 => false, - SBKR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> SBKR { - match value { - false => SBKR::_0, - true => SBKR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == SBKR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == SBKR::_1 - } -} -#[doc = "Possible values of the field `RWU`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum RWUR { - #[doc = "Normal receiver operation."] _0, - #[doc = "LPUART receiver in standby waiting for wakeup condition."] _1, -} -impl RWUR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - RWUR::_0 => false, - RWUR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> RWUR { - match value { - false => RWUR::_0, - true => RWUR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == RWUR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == RWUR::_1 - } -} -#[doc = "Possible values of the field `RE`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum RER { - #[doc = "Receiver disabled."] _0, - #[doc = "Receiver enabled."] _1, -} -impl RER { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - RER::_0 => false, - RER::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> RER { - match value { - false => RER::_0, - true => RER::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == RER::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == RER::_1 - } -} -#[doc = "Possible values of the field `TE`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum TER { - #[doc = "Transmitter disabled."] _0, - #[doc = "Transmitter enabled."] _1, -} -impl TER { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - TER::_0 => false, - TER::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> TER { - match value { - false => TER::_0, - true => TER::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == TER::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == TER::_1 - } -} -#[doc = "Possible values of the field `ILIE`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum ILIER { - #[doc = "Hardware interrupts from IDLE disabled; use polling."] _0, - #[doc = "Hardware interrupt requested when IDLE flag is 1."] _1, -} -impl ILIER { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - ILIER::_0 => false, - ILIER::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> ILIER { - match value { - false => ILIER::_0, - true => ILIER::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == ILIER::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == ILIER::_1 - } -} -#[doc = "Possible values of the field `RIE`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum RIER { - #[doc = "Hardware interrupts from RDRF disabled; use polling."] _0, - #[doc = "Hardware interrupt requested when RDRF flag is 1."] _1, -} -impl RIER { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - RIER::_0 => false, - RIER::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> RIER { - match value { - false => RIER::_0, - true => RIER::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == RIER::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == RIER::_1 - } -} -#[doc = "Possible values of the field `TCIE`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum TCIER { - #[doc = "Hardware interrupts from TC disabled; use polling."] _0, - #[doc = "Hardware interrupt requested when TC flag is 1."] _1, -} -impl TCIER { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - TCIER::_0 => false, - TCIER::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> TCIER { - match value { - false => TCIER::_0, - true => TCIER::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == TCIER::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == TCIER::_1 - } -} -#[doc = "Possible values of the field `TIE`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum TIER { - #[doc = "Hardware interrupts from TDRE disabled; use polling."] _0, - #[doc = "Hardware interrupt requested when TDRE flag is 1."] _1, -} -impl TIER { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - TIER::_0 => false, - TIER::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> TIER { - match value { - false => TIER::_0, - true => TIER::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == TIER::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == TIER::_1 - } -} -#[doc = "Possible values of the field `PEIE`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum PEIER { - #[doc = "PF interrupts disabled; use polling)."] _0, - #[doc = "Hardware interrupt requested when PF is set."] _1, -} -impl PEIER { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - PEIER::_0 => false, - PEIER::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> PEIER { - match value { - false => PEIER::_0, - true => PEIER::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == PEIER::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == PEIER::_1 - } -} -#[doc = "Possible values of the field `FEIE`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum FEIER { - #[doc = "FE interrupts disabled; use polling."] _0, - #[doc = "Hardware interrupt requested when FE is set."] _1, -} -impl FEIER { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - FEIER::_0 => false, - FEIER::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> FEIER { - match value { - false => FEIER::_0, - true => FEIER::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == FEIER::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == FEIER::_1 - } -} -#[doc = "Possible values of the field `NEIE`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum NEIER { - #[doc = "NF interrupts disabled; use polling."] _0, - #[doc = "Hardware interrupt requested when NF is set."] _1, -} -impl NEIER { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - NEIER::_0 => false, - NEIER::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> NEIER { - match value { - false => NEIER::_0, - true => NEIER::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == NEIER::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == NEIER::_1 - } -} -#[doc = "Possible values of the field `ORIE`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum ORIER { - #[doc = "OR interrupts disabled; use polling."] _0, - #[doc = "Hardware interrupt requested when OR is set."] _1, -} -impl ORIER { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - ORIER::_0 => false, - ORIER::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> ORIER { - match value { - false => ORIER::_0, - true => ORIER::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == ORIER::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == ORIER::_1 - } -} -#[doc = "Possible values of the field `TXINV`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum TXINVR { - #[doc = "Transmit data not inverted."] _0, - #[doc = "Transmit data inverted."] _1, -} -impl TXINVR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - TXINVR::_0 => false, - TXINVR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> TXINVR { - match value { - false => TXINVR::_0, - true => TXINVR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == TXINVR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == TXINVR::_1 - } -} -#[doc = "Possible values of the field `TXDIR`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum TXDIRR { - #[doc = "TXD pin is an input in single-wire mode."] _0, - #[doc = "TXD pin is an output in single-wire mode."] _1, -} -impl TXDIRR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - TXDIRR::_0 => false, - TXDIRR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> TXDIRR { - match value { - false => TXDIRR::_0, - true => TXDIRR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == TXDIRR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == TXDIRR::_1 - } -} -#[doc = r" Value of the field"] -pub struct R9T8R { - bits: bool, -} -impl R9T8R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - self.bits - } - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } -} -#[doc = r" Value of the field"] -pub struct R8T9R { - bits: bool, -} -impl R8T9R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - self.bits - } - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } -} -#[doc = "Values that can be written to the field `PT`"] -pub enum PTW { - #[doc = "Even parity."] _0, - #[doc = "Odd parity."] _1, -} -impl PTW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - PTW::_0 => false, - PTW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _PTW<'a> { - w: &'a mut W, -} -impl<'a> _PTW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: PTW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Even parity."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(PTW::_0) - } - #[doc = "Odd parity."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(PTW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 0; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `PE`"] -pub enum PEW { - #[doc = "No hardware parity generation or checking."] _0, - #[doc = "Parity enabled."] _1, -} -impl PEW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - PEW::_0 => false, - PEW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _PEW<'a> { - w: &'a mut W, -} -impl<'a> _PEW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: PEW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "No hardware parity generation or checking."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(PEW::_0) - } - #[doc = "Parity enabled."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(PEW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 1; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `ILT`"] -pub enum ILTW { - #[doc = "Idle character bit count starts after start bit."] _0, - #[doc = "Idle character bit count starts after stop bit."] _1, -} -impl ILTW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - ILTW::_0 => false, - ILTW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _ILTW<'a> { - w: &'a mut W, -} -impl<'a> _ILTW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: ILTW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Idle character bit count starts after start bit."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(ILTW::_0) - } - #[doc = "Idle character bit count starts after stop bit."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(ILTW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 2; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `WAKE`"] -pub enum WAKEW { - #[doc = "Configures RWU for idle-line wakeup."] _0, - #[doc = "Configures RWU with address-mark wakeup."] _1, -} -impl WAKEW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - WAKEW::_0 => false, - WAKEW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _WAKEW<'a> { - w: &'a mut W, -} -impl<'a> _WAKEW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: WAKEW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Configures RWU for idle-line wakeup."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(WAKEW::_0) - } - #[doc = "Configures RWU with address-mark wakeup."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(WAKEW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 3; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `M`"] -pub enum MW { - #[doc = "Receiver and transmitter use 8-bit data characters."] _0, - #[doc = "Receiver and transmitter use 9-bit data characters."] _1, -} -impl MW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - MW::_0 => false, - MW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _MW<'a> { - w: &'a mut W, -} -impl<'a> _MW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: MW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Receiver and transmitter use 8-bit data characters."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(MW::_0) - } - #[doc = "Receiver and transmitter use 9-bit data characters."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(MW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 4; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `RSRC`"] -pub enum RSRCW { - #[doc = "Provided LOOPS is set, RSRC is cleared, selects internal loop back mode and the LPUART does not use the RXD pin."] - _0, - #[doc = "Single-wire LPUART mode where the TXD pin is connected to the transmitter output and receiver input."] - _1, -} -impl RSRCW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - RSRCW::_0 => false, - RSRCW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _RSRCW<'a> { - w: &'a mut W, -} -impl<'a> _RSRCW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: RSRCW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Provided LOOPS is set, RSRC is cleared, selects internal loop back mode and the LPUART does not use the RXD pin."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(RSRCW::_0) - } - #[doc = "Single-wire LPUART mode where the TXD pin is connected to the transmitter output and receiver input."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(RSRCW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 5; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `DOZEEN`"] -pub enum DOZEENW { - #[doc = "LPUART is enabled in Doze mode."] _0, - #[doc = "LPUART is disabled in Doze mode."] _1, -} -impl DOZEENW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - DOZEENW::_0 => false, - DOZEENW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _DOZEENW<'a> { - w: &'a mut W, -} -impl<'a> _DOZEENW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: DOZEENW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "LPUART is enabled in Doze mode."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(DOZEENW::_0) - } - #[doc = "LPUART is disabled in Doze mode."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(DOZEENW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 6; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `LOOPS`"] -pub enum LOOPSW { - #[doc = "Normal operation - RXD and TXD use separate pins."] _0, - #[doc = "Loop mode or single-wire mode where transmitter outputs are internally connected to receiver input (see RSRC bit)."] - _1, -} -impl LOOPSW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - LOOPSW::_0 => false, - LOOPSW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _LOOPSW<'a> { - w: &'a mut W, -} -impl<'a> _LOOPSW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: LOOPSW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Normal operation - RXD and TXD use separate pins."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(LOOPSW::_0) - } - #[doc = "Loop mode or single-wire mode where transmitter outputs are internally connected to receiver input (see RSRC bit)."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(LOOPSW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 7; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `IDLECFG`"] -pub enum IDLECFGW { - #[doc = "1 idle character"] _000, - #[doc = "2 idle characters"] _001, - #[doc = "4 idle characters"] _010, - #[doc = "8 idle characters"] _011, - #[doc = "16 idle characters"] _100, - #[doc = "32 idle characters"] _101, - #[doc = "64 idle characters"] _110, - #[doc = "128 idle characters"] _111, -} -impl IDLECFGW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> u8 { - match *self { - IDLECFGW::_000 => 0, - IDLECFGW::_001 => 1, - IDLECFGW::_010 => 2, - IDLECFGW::_011 => 3, - IDLECFGW::_100 => 4, - IDLECFGW::_101 => 5, - IDLECFGW::_110 => 6, - IDLECFGW::_111 => 7, - } - } -} -#[doc = r" Proxy"] -pub struct _IDLECFGW<'a> { - w: &'a mut W, -} -impl<'a> _IDLECFGW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: IDLECFGW) -> &'a mut W { - { - self.bits(variant._bits()) - } - } - #[doc = "1 idle character"] - #[inline] - pub fn _000(self) -> &'a mut W { - self.variant(IDLECFGW::_000) - } - #[doc = "2 idle characters"] - #[inline] - pub fn _001(self) -> &'a mut W { - self.variant(IDLECFGW::_001) - } - #[doc = "4 idle characters"] - #[inline] - pub fn _010(self) -> &'a mut W { - self.variant(IDLECFGW::_010) - } - #[doc = "8 idle characters"] - #[inline] - pub fn _011(self) -> &'a mut W { - self.variant(IDLECFGW::_011) - } - #[doc = "16 idle characters"] - #[inline] - pub fn _100(self) -> &'a mut W { - self.variant(IDLECFGW::_100) - } - #[doc = "32 idle characters"] - #[inline] - pub fn _101(self) -> &'a mut W { - self.variant(IDLECFGW::_101) - } - #[doc = "64 idle characters"] - #[inline] - pub fn _110(self) -> &'a mut W { - self.variant(IDLECFGW::_110) - } - #[doc = "128 idle characters"] - #[inline] - pub fn _111(self) -> &'a mut W { - self.variant(IDLECFGW::_111) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 7; - const OFFSET: u8 = 8; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `M7`"] -pub enum M7W { - #[doc = "Receiver and transmitter use 8-bit to 10-bit data characters."] _0, - #[doc = "Receiver and transmitter use 7-bit data characters."] _1, -} -impl M7W { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - M7W::_0 => false, - M7W::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _M7W<'a> { - w: &'a mut W, -} -impl<'a> _M7W<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: M7W) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Receiver and transmitter use 8-bit to 10-bit data characters."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(M7W::_0) - } - #[doc = "Receiver and transmitter use 7-bit data characters."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(M7W::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 11; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `MA2IE`"] -pub enum MA2IEW { - #[doc = "MA2F interrupt disabled"] _0, - #[doc = "MA2F interrupt enabled"] _1, -} -impl MA2IEW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - MA2IEW::_0 => false, - MA2IEW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _MA2IEW<'a> { - w: &'a mut W, -} -impl<'a> _MA2IEW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: MA2IEW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "MA2F interrupt disabled"] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(MA2IEW::_0) - } - #[doc = "MA2F interrupt enabled"] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(MA2IEW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 14; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `MA1IE`"] -pub enum MA1IEW { - #[doc = "MA1F interrupt disabled"] _0, - #[doc = "MA1F interrupt enabled"] _1, -} -impl MA1IEW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - MA1IEW::_0 => false, - MA1IEW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _MA1IEW<'a> { - w: &'a mut W, -} -impl<'a> _MA1IEW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: MA1IEW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "MA1F interrupt disabled"] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(MA1IEW::_0) - } - #[doc = "MA1F interrupt enabled"] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(MA1IEW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 15; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `SBK`"] -pub enum SBKW { - #[doc = "Normal transmitter operation."] _0, - #[doc = "Queue break character(s) to be sent."] _1, -} -impl SBKW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - SBKW::_0 => false, - SBKW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _SBKW<'a> { - w: &'a mut W, -} -impl<'a> _SBKW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: SBKW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Normal transmitter operation."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(SBKW::_0) - } - #[doc = "Queue break character(s) to be sent."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(SBKW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 16; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `RWU`"] -pub enum RWUW { - #[doc = "Normal receiver operation."] _0, - #[doc = "LPUART receiver in standby waiting for wakeup condition."] _1, -} -impl RWUW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - RWUW::_0 => false, - RWUW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _RWUW<'a> { - w: &'a mut W, -} -impl<'a> _RWUW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: RWUW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Normal receiver operation."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(RWUW::_0) - } - #[doc = "LPUART receiver in standby waiting for wakeup condition."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(RWUW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 17; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `RE`"] -pub enum REW { - #[doc = "Receiver disabled."] _0, - #[doc = "Receiver enabled."] _1, -} -impl REW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - REW::_0 => false, - REW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _REW<'a> { - w: &'a mut W, -} -impl<'a> _REW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: REW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Receiver disabled."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(REW::_0) - } - #[doc = "Receiver enabled."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(REW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 18; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `TE`"] -pub enum TEW { - #[doc = "Transmitter disabled."] _0, - #[doc = "Transmitter enabled."] _1, -} -impl TEW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - TEW::_0 => false, - TEW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _TEW<'a> { - w: &'a mut W, -} -impl<'a> _TEW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: TEW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Transmitter disabled."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(TEW::_0) - } - #[doc = "Transmitter enabled."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(TEW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 19; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `ILIE`"] -pub enum ILIEW { - #[doc = "Hardware interrupts from IDLE disabled; use polling."] _0, - #[doc = "Hardware interrupt requested when IDLE flag is 1."] _1, -} -impl ILIEW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - ILIEW::_0 => false, - ILIEW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _ILIEW<'a> { - w: &'a mut W, -} -impl<'a> _ILIEW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: ILIEW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Hardware interrupts from IDLE disabled; use polling."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(ILIEW::_0) - } - #[doc = "Hardware interrupt requested when IDLE flag is 1."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(ILIEW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 20; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `RIE`"] -pub enum RIEW { - #[doc = "Hardware interrupts from RDRF disabled; use polling."] _0, - #[doc = "Hardware interrupt requested when RDRF flag is 1."] _1, -} -impl RIEW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - RIEW::_0 => false, - RIEW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _RIEW<'a> { - w: &'a mut W, -} -impl<'a> _RIEW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: RIEW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Hardware interrupts from RDRF disabled; use polling."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(RIEW::_0) - } - #[doc = "Hardware interrupt requested when RDRF flag is 1."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(RIEW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 21; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `TCIE`"] -pub enum TCIEW { - #[doc = "Hardware interrupts from TC disabled; use polling."] _0, - #[doc = "Hardware interrupt requested when TC flag is 1."] _1, -} -impl TCIEW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - TCIEW::_0 => false, - TCIEW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _TCIEW<'a> { - w: &'a mut W, -} -impl<'a> _TCIEW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: TCIEW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Hardware interrupts from TC disabled; use polling."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(TCIEW::_0) - } - #[doc = "Hardware interrupt requested when TC flag is 1."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(TCIEW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 22; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `TIE`"] -pub enum TIEW { - #[doc = "Hardware interrupts from TDRE disabled; use polling."] _0, - #[doc = "Hardware interrupt requested when TDRE flag is 1."] _1, -} -impl TIEW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - TIEW::_0 => false, - TIEW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _TIEW<'a> { - w: &'a mut W, -} -impl<'a> _TIEW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: TIEW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Hardware interrupts from TDRE disabled; use polling."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(TIEW::_0) - } - #[doc = "Hardware interrupt requested when TDRE flag is 1."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(TIEW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 23; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `PEIE`"] -pub enum PEIEW { - #[doc = "PF interrupts disabled; use polling)."] _0, - #[doc = "Hardware interrupt requested when PF is set."] _1, -} -impl PEIEW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - PEIEW::_0 => false, - PEIEW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _PEIEW<'a> { - w: &'a mut W, -} -impl<'a> _PEIEW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: PEIEW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "PF interrupts disabled; use polling)."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(PEIEW::_0) - } - #[doc = "Hardware interrupt requested when PF is set."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(PEIEW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 24; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `FEIE`"] -pub enum FEIEW { - #[doc = "FE interrupts disabled; use polling."] _0, - #[doc = "Hardware interrupt requested when FE is set."] _1, -} -impl FEIEW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - FEIEW::_0 => false, - FEIEW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _FEIEW<'a> { - w: &'a mut W, -} -impl<'a> _FEIEW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: FEIEW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "FE interrupts disabled; use polling."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(FEIEW::_0) - } - #[doc = "Hardware interrupt requested when FE is set."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(FEIEW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 25; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `NEIE`"] -pub enum NEIEW { - #[doc = "NF interrupts disabled; use polling."] _0, - #[doc = "Hardware interrupt requested when NF is set."] _1, -} -impl NEIEW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - NEIEW::_0 => false, - NEIEW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _NEIEW<'a> { - w: &'a mut W, -} -impl<'a> _NEIEW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: NEIEW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "NF interrupts disabled; use polling."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(NEIEW::_0) - } - #[doc = "Hardware interrupt requested when NF is set."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(NEIEW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 26; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `ORIE`"] -pub enum ORIEW { - #[doc = "OR interrupts disabled; use polling."] _0, - #[doc = "Hardware interrupt requested when OR is set."] _1, -} -impl ORIEW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - ORIEW::_0 => false, - ORIEW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _ORIEW<'a> { - w: &'a mut W, -} -impl<'a> _ORIEW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: ORIEW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "OR interrupts disabled; use polling."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(ORIEW::_0) - } - #[doc = "Hardware interrupt requested when OR is set."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(ORIEW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 27; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `TXINV`"] -pub enum TXINVW { - #[doc = "Transmit data not inverted."] _0, - #[doc = "Transmit data inverted."] _1, -} -impl TXINVW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - TXINVW::_0 => false, - TXINVW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _TXINVW<'a> { - w: &'a mut W, -} -impl<'a> _TXINVW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: TXINVW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Transmit data not inverted."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(TXINVW::_0) - } - #[doc = "Transmit data inverted."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(TXINVW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 28; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `TXDIR`"] -pub enum TXDIRW { - #[doc = "TXD pin is an input in single-wire mode."] _0, - #[doc = "TXD pin is an output in single-wire mode."] _1, -} -impl TXDIRW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - TXDIRW::_0 => false, - TXDIRW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _TXDIRW<'a> { - w: &'a mut W, -} -impl<'a> _TXDIRW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: TXDIRW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "TXD pin is an input in single-wire mode."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(TXDIRW::_0) - } - #[doc = "TXD pin is an output in single-wire mode."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(TXDIRW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 29; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = r" Proxy"] -pub struct _R9T8W<'a> { - w: &'a mut W, -} -impl<'a> _R9T8W<'a> { - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 30; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = r" Proxy"] -pub struct _R8T9W<'a> { - w: &'a mut W, -} -impl<'a> _R8T9W<'a> { - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 31; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bit 0 - Parity Type"] - #[inline] - pub fn pt(&self) -> PTR { - PTR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 1 - Parity Enable"] - #[inline] - pub fn pe(&self) -> PER { - PER::_from({ - const MASK: bool = true; - const OFFSET: u8 = 1; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 2 - Idle Line Type Select"] - #[inline] - pub fn ilt(&self) -> ILTR { - ILTR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 2; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 3 - Receiver Wakeup Method Select"] - #[inline] - pub fn wake(&self) -> WAKER { - WAKER::_from({ - const MASK: bool = true; - const OFFSET: u8 = 3; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 4 - 9-Bit or 8-Bit Mode Select"] - #[inline] - pub fn m(&self) -> MR { - MR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 4; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 5 - Receiver Source Select"] - #[inline] - pub fn rsrc(&self) -> RSRCR { - RSRCR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 5; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 6 - Doze Enable"] - #[inline] - pub fn dozeen(&self) -> DOZEENR { - DOZEENR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 6; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 7 - Loop Mode Select"] - #[inline] - pub fn loops(&self) -> LOOPSR { - LOOPSR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 7; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bits 8:10 - Idle Configuration"] - #[inline] - pub fn idlecfg(&self) -> IDLECFGR { - IDLECFGR::_from({ - const MASK: u8 = 7; - const OFFSET: u8 = 8; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }) - } - #[doc = "Bit 11 - 7-Bit Mode Select"] - #[inline] - pub fn m7(&self) -> M7R { - M7R::_from({ - const MASK: bool = true; - const OFFSET: u8 = 11; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 14 - Match 2 Interrupt Enable"] - #[inline] - pub fn ma2ie(&self) -> MA2IER { - MA2IER::_from({ - const MASK: bool = true; - const OFFSET: u8 = 14; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 15 - Match 1 Interrupt Enable"] - #[inline] - pub fn ma1ie(&self) -> MA1IER { - MA1IER::_from({ - const MASK: bool = true; - const OFFSET: u8 = 15; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 16 - Send Break"] - #[inline] - pub fn sbk(&self) -> SBKR { - SBKR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 16; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 17 - Receiver Wakeup Control"] - #[inline] - pub fn rwu(&self) -> RWUR { - RWUR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 17; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 18 - Receiver Enable"] - #[inline] - pub fn re(&self) -> RER { - RER::_from({ - const MASK: bool = true; - const OFFSET: u8 = 18; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 19 - Transmitter Enable"] - #[inline] - pub fn te(&self) -> TER { - TER::_from({ - const MASK: bool = true; - const OFFSET: u8 = 19; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 20 - Idle Line Interrupt Enable"] - #[inline] - pub fn ilie(&self) -> ILIER { - ILIER::_from({ - const MASK: bool = true; - const OFFSET: u8 = 20; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 21 - Receiver Interrupt Enable"] - #[inline] - pub fn rie(&self) -> RIER { - RIER::_from({ - const MASK: bool = true; - const OFFSET: u8 = 21; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 22 - Transmission Complete Interrupt Enable for"] - #[inline] - pub fn tcie(&self) -> TCIER { - TCIER::_from({ - const MASK: bool = true; - const OFFSET: u8 = 22; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 23 - Transmit Interrupt Enable"] - #[inline] - pub fn tie(&self) -> TIER { - TIER::_from({ - const MASK: bool = true; - const OFFSET: u8 = 23; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 24 - Parity Error Interrupt Enable"] - #[inline] - pub fn peie(&self) -> PEIER { - PEIER::_from({ - const MASK: bool = true; - const OFFSET: u8 = 24; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 25 - Framing Error Interrupt Enable"] - #[inline] - pub fn feie(&self) -> FEIER { - FEIER::_from({ - const MASK: bool = true; - const OFFSET: u8 = 25; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 26 - Noise Error Interrupt Enable"] - #[inline] - pub fn neie(&self) -> NEIER { - NEIER::_from({ - const MASK: bool = true; - const OFFSET: u8 = 26; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 27 - Overrun Interrupt Enable"] - #[inline] - pub fn orie(&self) -> ORIER { - ORIER::_from({ - const MASK: bool = true; - const OFFSET: u8 = 27; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 28 - Transmit Data Inversion"] - #[inline] - pub fn txinv(&self) -> TXINVR { - TXINVR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 28; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 29 - TXD Pin Direction in Single-Wire Mode"] - #[inline] - pub fn txdir(&self) -> TXDIRR { - TXDIRR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 29; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 30 - Receive Bit 9 / Transmit Bit 8"] - #[inline] - pub fn r9t8(&self) -> R9T8R { - let bits = { - const MASK: bool = true; - const OFFSET: u8 = 30; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }; - R9T8R { bits } - } - #[doc = "Bit 31 - Receive Bit 8 / Transmit Bit 9"] - #[inline] - pub fn r8t9(&self) -> R8T9R { - let bits = { - const MASK: bool = true; - const OFFSET: u8 = 31; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }; - R8T9R { bits } - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 0 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bit 0 - Parity Type"] - #[inline] - pub fn pt(&mut self) -> _PTW { - _PTW { w: self } - } - #[doc = "Bit 1 - Parity Enable"] - #[inline] - pub fn pe(&mut self) -> _PEW { - _PEW { w: self } - } - #[doc = "Bit 2 - Idle Line Type Select"] - #[inline] - pub fn ilt(&mut self) -> _ILTW { - _ILTW { w: self } - } - #[doc = "Bit 3 - Receiver Wakeup Method Select"] - #[inline] - pub fn wake(&mut self) -> _WAKEW { - _WAKEW { w: self } - } - #[doc = "Bit 4 - 9-Bit or 8-Bit Mode Select"] - #[inline] - pub fn m(&mut self) -> _MW { - _MW { w: self } - } - #[doc = "Bit 5 - Receiver Source Select"] - #[inline] - pub fn rsrc(&mut self) -> _RSRCW { - _RSRCW { w: self } - } - #[doc = "Bit 6 - Doze Enable"] - #[inline] - pub fn dozeen(&mut self) -> _DOZEENW { - _DOZEENW { w: self } - } - #[doc = "Bit 7 - Loop Mode Select"] - #[inline] - pub fn loops(&mut self) -> _LOOPSW { - _LOOPSW { w: self } - } - #[doc = "Bits 8:10 - Idle Configuration"] - #[inline] - pub fn idlecfg(&mut self) -> _IDLECFGW { - _IDLECFGW { w: self } - } - #[doc = "Bit 11 - 7-Bit Mode Select"] - #[inline] - pub fn m7(&mut self) -> _M7W { - _M7W { w: self } - } - #[doc = "Bit 14 - Match 2 Interrupt Enable"] - #[inline] - pub fn ma2ie(&mut self) -> _MA2IEW { - _MA2IEW { w: self } - } - #[doc = "Bit 15 - Match 1 Interrupt Enable"] - #[inline] - pub fn ma1ie(&mut self) -> _MA1IEW { - _MA1IEW { w: self } - } - #[doc = "Bit 16 - Send Break"] - #[inline] - pub fn sbk(&mut self) -> _SBKW { - _SBKW { w: self } - } - #[doc = "Bit 17 - Receiver Wakeup Control"] - #[inline] - pub fn rwu(&mut self) -> _RWUW { - _RWUW { w: self } - } - #[doc = "Bit 18 - Receiver Enable"] - #[inline] - pub fn re(&mut self) -> _REW { - _REW { w: self } - } - #[doc = "Bit 19 - Transmitter Enable"] - #[inline] - pub fn te(&mut self) -> _TEW { - _TEW { w: self } - } - #[doc = "Bit 20 - Idle Line Interrupt Enable"] - #[inline] - pub fn ilie(&mut self) -> _ILIEW { - _ILIEW { w: self } - } - #[doc = "Bit 21 - Receiver Interrupt Enable"] - #[inline] - pub fn rie(&mut self) -> _RIEW { - _RIEW { w: self } - } - #[doc = "Bit 22 - Transmission Complete Interrupt Enable for"] - #[inline] - pub fn tcie(&mut self) -> _TCIEW { - _TCIEW { w: self } - } - #[doc = "Bit 23 - Transmit Interrupt Enable"] - #[inline] - pub fn tie(&mut self) -> _TIEW { - _TIEW { w: self } - } - #[doc = "Bit 24 - Parity Error Interrupt Enable"] - #[inline] - pub fn peie(&mut self) -> _PEIEW { - _PEIEW { w: self } - } - #[doc = "Bit 25 - Framing Error Interrupt Enable"] - #[inline] - pub fn feie(&mut self) -> _FEIEW { - _FEIEW { w: self } - } - #[doc = "Bit 26 - Noise Error Interrupt Enable"] - #[inline] - pub fn neie(&mut self) -> _NEIEW { - _NEIEW { w: self } - } - #[doc = "Bit 27 - Overrun Interrupt Enable"] - #[inline] - pub fn orie(&mut self) -> _ORIEW { - _ORIEW { w: self } - } - #[doc = "Bit 28 - Transmit Data Inversion"] - #[inline] - pub fn txinv(&mut self) -> _TXINVW { - _TXINVW { w: self } - } - #[doc = "Bit 29 - TXD Pin Direction in Single-Wire Mode"] - #[inline] - pub fn txdir(&mut self) -> _TXDIRW { - _TXDIRW { w: self } - } - #[doc = "Bit 30 - Receive Bit 9 / Transmit Bit 8"] - #[inline] - pub fn r9t8(&mut self) -> _R9T8W { - _R9T8W { w: self } - } - #[doc = "Bit 31 - Receive Bit 8 / Transmit Bit 9"] - #[inline] - pub fn r8t9(&mut self) -> _R8T9W { - _R8T9W { w: self } - } -} diff --git a/src/lpuart1/data/mod.rs b/src/lpuart1/data/mod.rs deleted file mode 100644 index bf5d575..0000000 --- a/src/lpuart1/data/mod.rs +++ /dev/null @@ -1,989 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::DATA { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = r" Value of the field"] -pub struct R0T0R { - bits: bool, -} -impl R0T0R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - self.bits - } - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } -} -#[doc = r" Value of the field"] -pub struct R1T1R { - bits: bool, -} -impl R1T1R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - self.bits - } - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } -} -#[doc = r" Value of the field"] -pub struct R2T2R { - bits: bool, -} -impl R2T2R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - self.bits - } - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } -} -#[doc = r" Value of the field"] -pub struct R3T3R { - bits: bool, -} -impl R3T3R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - self.bits - } - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } -} -#[doc = r" Value of the field"] -pub struct R4T4R { - bits: bool, -} -impl R4T4R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - self.bits - } - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } -} -#[doc = r" Value of the field"] -pub struct R5T5R { - bits: bool, -} -impl R5T5R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - self.bits - } - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } -} -#[doc = r" Value of the field"] -pub struct R6T6R { - bits: bool, -} -impl R6T6R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - self.bits - } - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } -} -#[doc = r" Value of the field"] -pub struct R7T7R { - bits: bool, -} -impl R7T7R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - self.bits - } - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } -} -#[doc = r" Value of the field"] -pub struct R8T8R { - bits: bool, -} -impl R8T8R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - self.bits - } - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } -} -#[doc = r" Value of the field"] -pub struct R9T9R { - bits: bool, -} -impl R9T9R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - self.bits - } - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } -} -#[doc = "Possible values of the field `IDLINE`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum IDLINER { - #[doc = "Receiver was not idle before receiving this character."] _0, - #[doc = "Receiver was idle before receiving this character."] _1, -} -impl IDLINER { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - IDLINER::_0 => false, - IDLINER::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> IDLINER { - match value { - false => IDLINER::_0, - true => IDLINER::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == IDLINER::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == IDLINER::_1 - } -} -#[doc = "Possible values of the field `RXEMPT`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum RXEMPTR { - #[doc = "Receive buffer contains valid data."] _0, - #[doc = "Receive buffer is empty, data returned on read is not valid."] _1, -} -impl RXEMPTR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - RXEMPTR::_0 => false, - RXEMPTR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> RXEMPTR { - match value { - false => RXEMPTR::_0, - true => RXEMPTR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == RXEMPTR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == RXEMPTR::_1 - } -} -#[doc = "Possible values of the field `FRETSC`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum FRETSCR { - #[doc = "The dataword was received without a frame error on read, or transmit a normal character on write."] - _0, - #[doc = "The dataword was received with a frame error, or transmit an idle or break character on transmit."] - _1, -} -impl FRETSCR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - FRETSCR::_0 => false, - FRETSCR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> FRETSCR { - match value { - false => FRETSCR::_0, - true => FRETSCR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == FRETSCR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == FRETSCR::_1 - } -} -#[doc = "Possible values of the field `PARITYE`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum PARITYER { - #[doc = "The dataword was received without a parity error."] _0, - #[doc = "The dataword was received with a parity error."] _1, -} -impl PARITYER { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - PARITYER::_0 => false, - PARITYER::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> PARITYER { - match value { - false => PARITYER::_0, - true => PARITYER::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == PARITYER::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == PARITYER::_1 - } -} -#[doc = "Possible values of the field `NOISY`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum NOISYR { - #[doc = "The dataword was received without noise."] _0, - #[doc = "The data was received with noise."] _1, -} -impl NOISYR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - NOISYR::_0 => false, - NOISYR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> NOISYR { - match value { - false => NOISYR::_0, - true => NOISYR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == NOISYR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == NOISYR::_1 - } -} -#[doc = r" Proxy"] -pub struct _R0T0W<'a> { - w: &'a mut W, -} -impl<'a> _R0T0W<'a> { - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 0; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = r" Proxy"] -pub struct _R1T1W<'a> { - w: &'a mut W, -} -impl<'a> _R1T1W<'a> { - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 1; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = r" Proxy"] -pub struct _R2T2W<'a> { - w: &'a mut W, -} -impl<'a> _R2T2W<'a> { - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 2; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = r" Proxy"] -pub struct _R3T3W<'a> { - w: &'a mut W, -} -impl<'a> _R3T3W<'a> { - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 3; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = r" Proxy"] -pub struct _R4T4W<'a> { - w: &'a mut W, -} -impl<'a> _R4T4W<'a> { - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 4; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = r" Proxy"] -pub struct _R5T5W<'a> { - w: &'a mut W, -} -impl<'a> _R5T5W<'a> { - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 5; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = r" Proxy"] -pub struct _R6T6W<'a> { - w: &'a mut W, -} -impl<'a> _R6T6W<'a> { - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 6; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = r" Proxy"] -pub struct _R7T7W<'a> { - w: &'a mut W, -} -impl<'a> _R7T7W<'a> { - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 7; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = r" Proxy"] -pub struct _R8T8W<'a> { - w: &'a mut W, -} -impl<'a> _R8T8W<'a> { - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 8; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = r" Proxy"] -pub struct _R9T9W<'a> { - w: &'a mut W, -} -impl<'a> _R9T9W<'a> { - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 9; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `FRETSC`"] -pub enum FRETSCW { - #[doc = "The dataword was received without a frame error on read, or transmit a normal character on write."] - _0, - #[doc = "The dataword was received with a frame error, or transmit an idle or break character on transmit."] - _1, -} -impl FRETSCW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - FRETSCW::_0 => false, - FRETSCW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _FRETSCW<'a> { - w: &'a mut W, -} -impl<'a> _FRETSCW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: FRETSCW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "The dataword was received without a frame error on read, or transmit a normal character on write."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(FRETSCW::_0) - } - #[doc = "The dataword was received with a frame error, or transmit an idle or break character on transmit."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(FRETSCW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 13; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bit 0 - R0T0"] - #[inline] - pub fn r0t0(&self) -> R0T0R { - let bits = { - const MASK: bool = true; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }; - R0T0R { bits } - } - #[doc = "Bit 1 - R1T1"] - #[inline] - pub fn r1t1(&self) -> R1T1R { - let bits = { - const MASK: bool = true; - const OFFSET: u8 = 1; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }; - R1T1R { bits } - } - #[doc = "Bit 2 - R2T2"] - #[inline] - pub fn r2t2(&self) -> R2T2R { - let bits = { - const MASK: bool = true; - const OFFSET: u8 = 2; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }; - R2T2R { bits } - } - #[doc = "Bit 3 - R3T3"] - #[inline] - pub fn r3t3(&self) -> R3T3R { - let bits = { - const MASK: bool = true; - const OFFSET: u8 = 3; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }; - R3T3R { bits } - } - #[doc = "Bit 4 - R4T4"] - #[inline] - pub fn r4t4(&self) -> R4T4R { - let bits = { - const MASK: bool = true; - const OFFSET: u8 = 4; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }; - R4T4R { bits } - } - #[doc = "Bit 5 - R5T5"] - #[inline] - pub fn r5t5(&self) -> R5T5R { - let bits = { - const MASK: bool = true; - const OFFSET: u8 = 5; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }; - R5T5R { bits } - } - #[doc = "Bit 6 - R6T6"] - #[inline] - pub fn r6t6(&self) -> R6T6R { - let bits = { - const MASK: bool = true; - const OFFSET: u8 = 6; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }; - R6T6R { bits } - } - #[doc = "Bit 7 - R7T7"] - #[inline] - pub fn r7t7(&self) -> R7T7R { - let bits = { - const MASK: bool = true; - const OFFSET: u8 = 7; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }; - R7T7R { bits } - } - #[doc = "Bit 8 - R8T8"] - #[inline] - pub fn r8t8(&self) -> R8T8R { - let bits = { - const MASK: bool = true; - const OFFSET: u8 = 8; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }; - R8T8R { bits } - } - #[doc = "Bit 9 - R9T9"] - #[inline] - pub fn r9t9(&self) -> R9T9R { - let bits = { - const MASK: bool = true; - const OFFSET: u8 = 9; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }; - R9T9R { bits } - } - #[doc = "Bit 11 - Idle Line"] - #[inline] - pub fn idline(&self) -> IDLINER { - IDLINER::_from({ - const MASK: bool = true; - const OFFSET: u8 = 11; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 12 - Receive Buffer Empty"] - #[inline] - pub fn rxempt(&self) -> RXEMPTR { - RXEMPTR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 12; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 13 - Frame Error / Transmit Special Character"] - #[inline] - pub fn fretsc(&self) -> FRETSCR { - FRETSCR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 13; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 14 - PARITYE"] - #[inline] - pub fn paritye(&self) -> PARITYER { - PARITYER::_from({ - const MASK: bool = true; - const OFFSET: u8 = 14; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 15 - NOISY"] - #[inline] - pub fn noisy(&self) -> NOISYR { - NOISYR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 15; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 4096 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bit 0 - R0T0"] - #[inline] - pub fn r0t0(&mut self) -> _R0T0W { - _R0T0W { w: self } - } - #[doc = "Bit 1 - R1T1"] - #[inline] - pub fn r1t1(&mut self) -> _R1T1W { - _R1T1W { w: self } - } - #[doc = "Bit 2 - R2T2"] - #[inline] - pub fn r2t2(&mut self) -> _R2T2W { - _R2T2W { w: self } - } - #[doc = "Bit 3 - R3T3"] - #[inline] - pub fn r3t3(&mut self) -> _R3T3W { - _R3T3W { w: self } - } - #[doc = "Bit 4 - R4T4"] - #[inline] - pub fn r4t4(&mut self) -> _R4T4W { - _R4T4W { w: self } - } - #[doc = "Bit 5 - R5T5"] - #[inline] - pub fn r5t5(&mut self) -> _R5T5W { - _R5T5W { w: self } - } - #[doc = "Bit 6 - R6T6"] - #[inline] - pub fn r6t6(&mut self) -> _R6T6W { - _R6T6W { w: self } - } - #[doc = "Bit 7 - R7T7"] - #[inline] - pub fn r7t7(&mut self) -> _R7T7W { - _R7T7W { w: self } - } - #[doc = "Bit 8 - R8T8"] - #[inline] - pub fn r8t8(&mut self) -> _R8T8W { - _R8T8W { w: self } - } - #[doc = "Bit 9 - R9T9"] - #[inline] - pub fn r9t9(&mut self) -> _R9T9W { - _R9T9W { w: self } - } - #[doc = "Bit 13 - Frame Error / Transmit Special Character"] - #[inline] - pub fn fretsc(&mut self) -> _FRETSCW { - _FRETSCW { w: self } - } -} diff --git a/src/lpuart1/fifo/mod.rs b/src/lpuart1/fifo/mod.rs deleted file mode 100644 index 1ca8b00..0000000 --- a/src/lpuart1/fifo/mod.rs +++ /dev/null @@ -1,1376 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::FIFO { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = "Possible values of the field `RXFIFOSIZE`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum RXFIFOSIZER { - #[doc = "Receive FIFO/Buffer depth = 1 dataword."] _000, - #[doc = "Receive FIFO/Buffer depth = 4 datawords."] _001, - #[doc = "Receive FIFO/Buffer depth = 8 datawords."] _010, - #[doc = "Receive FIFO/Buffer depth = 16 datawords."] _011, - #[doc = "Receive FIFO/Buffer depth = 32 datawords."] _100, - #[doc = "Receive FIFO/Buffer depth = 64 datawords."] _101, - #[doc = "Receive FIFO/Buffer depth = 128 datawords."] _110, - #[doc = "Receive FIFO/Buffer depth = 256 datawords."] _111, -} -impl RXFIFOSIZER { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - match *self { - RXFIFOSIZER::_000 => 0, - RXFIFOSIZER::_001 => 1, - RXFIFOSIZER::_010 => 2, - RXFIFOSIZER::_011 => 3, - RXFIFOSIZER::_100 => 4, - RXFIFOSIZER::_101 => 5, - RXFIFOSIZER::_110 => 6, - RXFIFOSIZER::_111 => 7, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: u8) -> RXFIFOSIZER { - match value { - 0 => RXFIFOSIZER::_000, - 1 => RXFIFOSIZER::_001, - 2 => RXFIFOSIZER::_010, - 3 => RXFIFOSIZER::_011, - 4 => RXFIFOSIZER::_100, - 5 => RXFIFOSIZER::_101, - 6 => RXFIFOSIZER::_110, - 7 => RXFIFOSIZER::_111, - _ => unreachable!(), - } - } - #[doc = "Checks if the value of the field is `_000`"] - #[inline] - pub fn is_000(&self) -> bool { - *self == RXFIFOSIZER::_000 - } - #[doc = "Checks if the value of the field is `_001`"] - #[inline] - pub fn is_001(&self) -> bool { - *self == RXFIFOSIZER::_001 - } - #[doc = "Checks if the value of the field is `_010`"] - #[inline] - pub fn is_010(&self) -> bool { - *self == RXFIFOSIZER::_010 - } - #[doc = "Checks if the value of the field is `_011`"] - #[inline] - pub fn is_011(&self) -> bool { - *self == RXFIFOSIZER::_011 - } - #[doc = "Checks if the value of the field is `_100`"] - #[inline] - pub fn is_100(&self) -> bool { - *self == RXFIFOSIZER::_100 - } - #[doc = "Checks if the value of the field is `_101`"] - #[inline] - pub fn is_101(&self) -> bool { - *self == RXFIFOSIZER::_101 - } - #[doc = "Checks if the value of the field is `_110`"] - #[inline] - pub fn is_110(&self) -> bool { - *self == RXFIFOSIZER::_110 - } - #[doc = "Checks if the value of the field is `_111`"] - #[inline] - pub fn is_111(&self) -> bool { - *self == RXFIFOSIZER::_111 - } -} -#[doc = "Possible values of the field `RXFE`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum RXFER { - #[doc = "Receive FIFO is not enabled. Buffer is depth 1. (Legacy support)"] _0, - #[doc = "Receive FIFO is enabled. Buffer is depth indicted by RXFIFOSIZE."] _1, -} -impl RXFER { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - RXFER::_0 => false, - RXFER::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> RXFER { - match value { - false => RXFER::_0, - true => RXFER::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == RXFER::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == RXFER::_1 - } -} -#[doc = "Possible values of the field `TXFIFOSIZE`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum TXFIFOSIZER { - #[doc = "Transmit FIFO/Buffer depth = 1 dataword."] _000, - #[doc = "Transmit FIFO/Buffer depth = 4 datawords."] _001, - #[doc = "Transmit FIFO/Buffer depth = 8 datawords."] _010, - #[doc = "Transmit FIFO/Buffer depth = 16 datawords."] _011, - #[doc = "Transmit FIFO/Buffer depth = 32 datawords."] _100, - #[doc = "Transmit FIFO/Buffer depth = 64 datawords."] _101, - #[doc = "Transmit FIFO/Buffer depth = 128 datawords."] _110, - #[doc = "Transmit FIFO/Buffer depth = 256 datawords"] _111, -} -impl TXFIFOSIZER { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - match *self { - TXFIFOSIZER::_000 => 0, - TXFIFOSIZER::_001 => 1, - TXFIFOSIZER::_010 => 2, - TXFIFOSIZER::_011 => 3, - TXFIFOSIZER::_100 => 4, - TXFIFOSIZER::_101 => 5, - TXFIFOSIZER::_110 => 6, - TXFIFOSIZER::_111 => 7, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: u8) -> TXFIFOSIZER { - match value { - 0 => TXFIFOSIZER::_000, - 1 => TXFIFOSIZER::_001, - 2 => TXFIFOSIZER::_010, - 3 => TXFIFOSIZER::_011, - 4 => TXFIFOSIZER::_100, - 5 => TXFIFOSIZER::_101, - 6 => TXFIFOSIZER::_110, - 7 => TXFIFOSIZER::_111, - _ => unreachable!(), - } - } - #[doc = "Checks if the value of the field is `_000`"] - #[inline] - pub fn is_000(&self) -> bool { - *self == TXFIFOSIZER::_000 - } - #[doc = "Checks if the value of the field is `_001`"] - #[inline] - pub fn is_001(&self) -> bool { - *self == TXFIFOSIZER::_001 - } - #[doc = "Checks if the value of the field is `_010`"] - #[inline] - pub fn is_010(&self) -> bool { - *self == TXFIFOSIZER::_010 - } - #[doc = "Checks if the value of the field is `_011`"] - #[inline] - pub fn is_011(&self) -> bool { - *self == TXFIFOSIZER::_011 - } - #[doc = "Checks if the value of the field is `_100`"] - #[inline] - pub fn is_100(&self) -> bool { - *self == TXFIFOSIZER::_100 - } - #[doc = "Checks if the value of the field is `_101`"] - #[inline] - pub fn is_101(&self) -> bool { - *self == TXFIFOSIZER::_101 - } - #[doc = "Checks if the value of the field is `_110`"] - #[inline] - pub fn is_110(&self) -> bool { - *self == TXFIFOSIZER::_110 - } - #[doc = "Checks if the value of the field is `_111`"] - #[inline] - pub fn is_111(&self) -> bool { - *self == TXFIFOSIZER::_111 - } -} -#[doc = "Possible values of the field `TXFE`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum TXFER { - #[doc = "Transmit FIFO is not enabled. Buffer is depth 1. (Legacy support)."] _0, - #[doc = "Transmit FIFO is enabled. Buffer is depth indicated by TXFIFOSIZE."] _1, -} -impl TXFER { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - TXFER::_0 => false, - TXFER::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> TXFER { - match value { - false => TXFER::_0, - true => TXFER::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == TXFER::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == TXFER::_1 - } -} -#[doc = "Possible values of the field `RXUFE`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum RXUFER { - #[doc = "RXUF flag does not generate an interrupt to the host."] _0, - #[doc = "RXUF flag generates an interrupt to the host."] _1, -} -impl RXUFER { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - RXUFER::_0 => false, - RXUFER::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> RXUFER { - match value { - false => RXUFER::_0, - true => RXUFER::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == RXUFER::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == RXUFER::_1 - } -} -#[doc = "Possible values of the field `TXOFE`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum TXOFER { - #[doc = "TXOF flag does not generate an interrupt to the host."] _0, - #[doc = "TXOF flag generates an interrupt to the host."] _1, -} -impl TXOFER { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - TXOFER::_0 => false, - TXOFER::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> TXOFER { - match value { - false => TXOFER::_0, - true => TXOFER::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == TXOFER::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == TXOFER::_1 - } -} -#[doc = "Possible values of the field `RXIDEN`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum RXIDENR { - #[doc = "Disable RDRF assertion due to partially filled FIFO when receiver is idle."] _000, - #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 1 character."] - _001, - #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 2 characters."] - _010, - #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 4 characters."] - _011, - #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 8 characters."] - _100, - #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 16 characters."] - _101, - #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 32 characters."] - _110, - #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 64 characters."] - _111, -} -impl RXIDENR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - match *self { - RXIDENR::_000 => 0, - RXIDENR::_001 => 1, - RXIDENR::_010 => 2, - RXIDENR::_011 => 3, - RXIDENR::_100 => 4, - RXIDENR::_101 => 5, - RXIDENR::_110 => 6, - RXIDENR::_111 => 7, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: u8) -> RXIDENR { - match value { - 0 => RXIDENR::_000, - 1 => RXIDENR::_001, - 2 => RXIDENR::_010, - 3 => RXIDENR::_011, - 4 => RXIDENR::_100, - 5 => RXIDENR::_101, - 6 => RXIDENR::_110, - 7 => RXIDENR::_111, - _ => unreachable!(), - } - } - #[doc = "Checks if the value of the field is `_000`"] - #[inline] - pub fn is_000(&self) -> bool { - *self == RXIDENR::_000 - } - #[doc = "Checks if the value of the field is `_001`"] - #[inline] - pub fn is_001(&self) -> bool { - *self == RXIDENR::_001 - } - #[doc = "Checks if the value of the field is `_010`"] - #[inline] - pub fn is_010(&self) -> bool { - *self == RXIDENR::_010 - } - #[doc = "Checks if the value of the field is `_011`"] - #[inline] - pub fn is_011(&self) -> bool { - *self == RXIDENR::_011 - } - #[doc = "Checks if the value of the field is `_100`"] - #[inline] - pub fn is_100(&self) -> bool { - *self == RXIDENR::_100 - } - #[doc = "Checks if the value of the field is `_101`"] - #[inline] - pub fn is_101(&self) -> bool { - *self == RXIDENR::_101 - } - #[doc = "Checks if the value of the field is `_110`"] - #[inline] - pub fn is_110(&self) -> bool { - *self == RXIDENR::_110 - } - #[doc = "Checks if the value of the field is `_111`"] - #[inline] - pub fn is_111(&self) -> bool { - *self == RXIDENR::_111 - } -} -#[doc = "Possible values of the field `RXUF`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum RXUFR { - #[doc = "No receive buffer underflow has occurred since the last time the flag was cleared."] _0, - #[doc = "At least one receive buffer underflow has occurred since the last time the flag was cleared."] - _1, -} -impl RXUFR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - RXUFR::_0 => false, - RXUFR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> RXUFR { - match value { - false => RXUFR::_0, - true => RXUFR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == RXUFR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == RXUFR::_1 - } -} -#[doc = "Possible values of the field `TXOF`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum TXOFR { - #[doc = "No transmit buffer overflow has occurred since the last time the flag was cleared."] _0, - #[doc = "At least one transmit buffer overflow has occurred since the last time the flag was cleared."] - _1, -} -impl TXOFR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - TXOFR::_0 => false, - TXOFR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> TXOFR { - match value { - false => TXOFR::_0, - true => TXOFR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == TXOFR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == TXOFR::_1 - } -} -#[doc = "Possible values of the field `RXEMPT`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum RXEMPTR { - #[doc = "Receive buffer is not empty."] _0, - #[doc = "Receive buffer is empty."] _1, -} -impl RXEMPTR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - RXEMPTR::_0 => false, - RXEMPTR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> RXEMPTR { - match value { - false => RXEMPTR::_0, - true => RXEMPTR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == RXEMPTR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == RXEMPTR::_1 - } -} -#[doc = "Possible values of the field `TXEMPT`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum TXEMPTR { - #[doc = "Transmit buffer is not empty."] _0, - #[doc = "Transmit buffer is empty."] _1, -} -impl TXEMPTR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - TXEMPTR::_0 => false, - TXEMPTR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> TXEMPTR { - match value { - false => TXEMPTR::_0, - true => TXEMPTR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == TXEMPTR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == TXEMPTR::_1 - } -} -#[doc = "Values that can be written to the field `RXFE`"] -pub enum RXFEW { - #[doc = "Receive FIFO is not enabled. Buffer is depth 1. (Legacy support)"] _0, - #[doc = "Receive FIFO is enabled. Buffer is depth indicted by RXFIFOSIZE."] _1, -} -impl RXFEW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - RXFEW::_0 => false, - RXFEW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _RXFEW<'a> { - w: &'a mut W, -} -impl<'a> _RXFEW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: RXFEW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Receive FIFO is not enabled. Buffer is depth 1. (Legacy support)"] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(RXFEW::_0) - } - #[doc = "Receive FIFO is enabled. Buffer is depth indicted by RXFIFOSIZE."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(RXFEW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 3; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `TXFE`"] -pub enum TXFEW { - #[doc = "Transmit FIFO is not enabled. Buffer is depth 1. (Legacy support)."] _0, - #[doc = "Transmit FIFO is enabled. Buffer is depth indicated by TXFIFOSIZE."] _1, -} -impl TXFEW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - TXFEW::_0 => false, - TXFEW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _TXFEW<'a> { - w: &'a mut W, -} -impl<'a> _TXFEW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: TXFEW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Transmit FIFO is not enabled. Buffer is depth 1. (Legacy support)."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(TXFEW::_0) - } - #[doc = "Transmit FIFO is enabled. Buffer is depth indicated by TXFIFOSIZE."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(TXFEW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 7; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `RXUFE`"] -pub enum RXUFEW { - #[doc = "RXUF flag does not generate an interrupt to the host."] _0, - #[doc = "RXUF flag generates an interrupt to the host."] _1, -} -impl RXUFEW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - RXUFEW::_0 => false, - RXUFEW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _RXUFEW<'a> { - w: &'a mut W, -} -impl<'a> _RXUFEW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: RXUFEW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "RXUF flag does not generate an interrupt to the host."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(RXUFEW::_0) - } - #[doc = "RXUF flag generates an interrupt to the host."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(RXUFEW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 8; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `TXOFE`"] -pub enum TXOFEW { - #[doc = "TXOF flag does not generate an interrupt to the host."] _0, - #[doc = "TXOF flag generates an interrupt to the host."] _1, -} -impl TXOFEW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - TXOFEW::_0 => false, - TXOFEW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _TXOFEW<'a> { - w: &'a mut W, -} -impl<'a> _TXOFEW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: TXOFEW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "TXOF flag does not generate an interrupt to the host."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(TXOFEW::_0) - } - #[doc = "TXOF flag generates an interrupt to the host."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(TXOFEW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 9; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `RXIDEN`"] -pub enum RXIDENW { - #[doc = "Disable RDRF assertion due to partially filled FIFO when receiver is idle."] _000, - #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 1 character."] - _001, - #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 2 characters."] - _010, - #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 4 characters."] - _011, - #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 8 characters."] - _100, - #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 16 characters."] - _101, - #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 32 characters."] - _110, - #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 64 characters."] - _111, -} -impl RXIDENW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> u8 { - match *self { - RXIDENW::_000 => 0, - RXIDENW::_001 => 1, - RXIDENW::_010 => 2, - RXIDENW::_011 => 3, - RXIDENW::_100 => 4, - RXIDENW::_101 => 5, - RXIDENW::_110 => 6, - RXIDENW::_111 => 7, - } - } -} -#[doc = r" Proxy"] -pub struct _RXIDENW<'a> { - w: &'a mut W, -} -impl<'a> _RXIDENW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: RXIDENW) -> &'a mut W { - { - self.bits(variant._bits()) - } - } - #[doc = "Disable RDRF assertion due to partially filled FIFO when receiver is idle."] - #[inline] - pub fn _000(self) -> &'a mut W { - self.variant(RXIDENW::_000) - } - #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 1 character."] - #[inline] - pub fn _001(self) -> &'a mut W { - self.variant(RXIDENW::_001) - } - #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 2 characters."] - #[inline] - pub fn _010(self) -> &'a mut W { - self.variant(RXIDENW::_010) - } - #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 4 characters."] - #[inline] - pub fn _011(self) -> &'a mut W { - self.variant(RXIDENW::_011) - } - #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 8 characters."] - #[inline] - pub fn _100(self) -> &'a mut W { - self.variant(RXIDENW::_100) - } - #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 16 characters."] - #[inline] - pub fn _101(self) -> &'a mut W { - self.variant(RXIDENW::_101) - } - #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 32 characters."] - #[inline] - pub fn _110(self) -> &'a mut W { - self.variant(RXIDENW::_110) - } - #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 64 characters."] - #[inline] - pub fn _111(self) -> &'a mut W { - self.variant(RXIDENW::_111) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 7; - const OFFSET: u8 = 10; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `RXFLUSH`"] -pub enum RXFLUSHW { - #[doc = "No flush operation occurs."] _0, - #[doc = "All data in the receive FIFO/buffer is cleared out."] _1, -} -impl RXFLUSHW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - RXFLUSHW::_0 => false, - RXFLUSHW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _RXFLUSHW<'a> { - w: &'a mut W, -} -impl<'a> _RXFLUSHW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: RXFLUSHW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "No flush operation occurs."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(RXFLUSHW::_0) - } - #[doc = "All data in the receive FIFO/buffer is cleared out."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(RXFLUSHW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 14; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `TXFLUSH`"] -pub enum TXFLUSHW { - #[doc = "No flush operation occurs."] _0, - #[doc = "All data in the transmit FIFO/Buffer is cleared out."] _1, -} -impl TXFLUSHW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - TXFLUSHW::_0 => false, - TXFLUSHW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _TXFLUSHW<'a> { - w: &'a mut W, -} -impl<'a> _TXFLUSHW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: TXFLUSHW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "No flush operation occurs."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(TXFLUSHW::_0) - } - #[doc = "All data in the transmit FIFO/Buffer is cleared out."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(TXFLUSHW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 15; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `RXUF`"] -pub enum RXUFW { - #[doc = "No receive buffer underflow has occurred since the last time the flag was cleared."] _0, - #[doc = "At least one receive buffer underflow has occurred since the last time the flag was cleared."] - _1, -} -impl RXUFW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - RXUFW::_0 => false, - RXUFW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _RXUFW<'a> { - w: &'a mut W, -} -impl<'a> _RXUFW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: RXUFW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "No receive buffer underflow has occurred since the last time the flag was cleared."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(RXUFW::_0) - } - #[doc = "At least one receive buffer underflow has occurred since the last time the flag was cleared."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(RXUFW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 16; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `TXOF`"] -pub enum TXOFW { - #[doc = "No transmit buffer overflow has occurred since the last time the flag was cleared."] _0, - #[doc = "At least one transmit buffer overflow has occurred since the last time the flag was cleared."] - _1, -} -impl TXOFW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - TXOFW::_0 => false, - TXOFW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _TXOFW<'a> { - w: &'a mut W, -} -impl<'a> _TXOFW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: TXOFW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "No transmit buffer overflow has occurred since the last time the flag was cleared."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(TXOFW::_0) - } - #[doc = "At least one transmit buffer overflow has occurred since the last time the flag was cleared."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(TXOFW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 17; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:2 - Receive FIFO. Buffer Depth"] - #[inline] - pub fn rxfifosize(&self) -> RXFIFOSIZER { - RXFIFOSIZER::_from({ - const MASK: u8 = 7; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }) - } - #[doc = "Bit 3 - Receive FIFO Enable"] - #[inline] - pub fn rxfe(&self) -> RXFER { - RXFER::_from({ - const MASK: bool = true; - const OFFSET: u8 = 3; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bits 4:6 - Transmit FIFO. Buffer Depth"] - #[inline] - pub fn txfifosize(&self) -> TXFIFOSIZER { - TXFIFOSIZER::_from({ - const MASK: u8 = 7; - const OFFSET: u8 = 4; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }) - } - #[doc = "Bit 7 - Transmit FIFO Enable"] - #[inline] - pub fn txfe(&self) -> TXFER { - TXFER::_from({ - const MASK: bool = true; - const OFFSET: u8 = 7; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 8 - Receive FIFO Underflow Interrupt Enable"] - #[inline] - pub fn rxufe(&self) -> RXUFER { - RXUFER::_from({ - const MASK: bool = true; - const OFFSET: u8 = 8; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 9 - Transmit FIFO Overflow Interrupt Enable"] - #[inline] - pub fn txofe(&self) -> TXOFER { - TXOFER::_from({ - const MASK: bool = true; - const OFFSET: u8 = 9; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bits 10:12 - Receiver Idle Empty Enable"] - #[inline] - pub fn rxiden(&self) -> RXIDENR { - RXIDENR::_from({ - const MASK: u8 = 7; - const OFFSET: u8 = 10; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }) - } - #[doc = "Bit 16 - Receiver Buffer Underflow Flag"] - #[inline] - pub fn rxuf(&self) -> RXUFR { - RXUFR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 16; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 17 - Transmitter Buffer Overflow Flag"] - #[inline] - pub fn txof(&self) -> TXOFR { - TXOFR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 17; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 22 - Receive Buffer/FIFO Empty"] - #[inline] - pub fn rxempt(&self) -> RXEMPTR { - RXEMPTR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 22; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 23 - Transmit Buffer/FIFO Empty"] - #[inline] - pub fn txempt(&self) -> TXEMPTR { - TXEMPTR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 23; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 12582929 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bit 3 - Receive FIFO Enable"] - #[inline] - pub fn rxfe(&mut self) -> _RXFEW { - _RXFEW { w: self } - } - #[doc = "Bit 7 - Transmit FIFO Enable"] - #[inline] - pub fn txfe(&mut self) -> _TXFEW { - _TXFEW { w: self } - } - #[doc = "Bit 8 - Receive FIFO Underflow Interrupt Enable"] - #[inline] - pub fn rxufe(&mut self) -> _RXUFEW { - _RXUFEW { w: self } - } - #[doc = "Bit 9 - Transmit FIFO Overflow Interrupt Enable"] - #[inline] - pub fn txofe(&mut self) -> _TXOFEW { - _TXOFEW { w: self } - } - #[doc = "Bits 10:12 - Receiver Idle Empty Enable"] - #[inline] - pub fn rxiden(&mut self) -> _RXIDENW { - _RXIDENW { w: self } - } - #[doc = "Bit 14 - Receive FIFO/Buffer Flush"] - #[inline] - pub fn rxflush(&mut self) -> _RXFLUSHW { - _RXFLUSHW { w: self } - } - #[doc = "Bit 15 - Transmit FIFO/Buffer Flush"] - #[inline] - pub fn txflush(&mut self) -> _TXFLUSHW { - _TXFLUSHW { w: self } - } - #[doc = "Bit 16 - Receiver Buffer Underflow Flag"] - #[inline] - pub fn rxuf(&mut self) -> _RXUFW { - _RXUFW { w: self } - } - #[doc = "Bit 17 - Transmitter Buffer Overflow Flag"] - #[inline] - pub fn txof(&mut self) -> _TXOFW { - _TXOFW { w: self } - } -} diff --git a/src/lpuart1/global/mod.rs b/src/lpuart1/global/mod.rs deleted file mode 100644 index ab15f12..0000000 --- a/src/lpuart1/global/mod.rs +++ /dev/null @@ -1,179 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::GLOBAL { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = "Possible values of the field `RST`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum RSTR { - #[doc = "Module is not reset."] _0, - #[doc = "Module is reset."] _1, -} -impl RSTR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - RSTR::_0 => false, - RSTR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> RSTR { - match value { - false => RSTR::_0, - true => RSTR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == RSTR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == RSTR::_1 - } -} -#[doc = "Values that can be written to the field `RST`"] -pub enum RSTW { - #[doc = "Module is not reset."] _0, - #[doc = "Module is reset."] _1, -} -impl RSTW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - RSTW::_0 => false, - RSTW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _RSTW<'a> { - w: &'a mut W, -} -impl<'a> _RSTW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: RSTW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Module is not reset."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(RSTW::_0) - } - #[doc = "Module is reset."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(RSTW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 1; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bit 1 - Software Reset"] - #[inline] - pub fn rst(&self) -> RSTR { - RSTR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 1; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 0 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bit 1 - Software Reset"] - #[inline] - pub fn rst(&mut self) -> _RSTW { - _RSTW { w: self } - } -} diff --git a/src/lpuart1/match_/mod.rs b/src/lpuart1/match_/mod.rs deleted file mode 100644 index ccaf148..0000000 --- a/src/lpuart1/match_/mod.rs +++ /dev/null @@ -1,146 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::MATCH { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = r" Value of the field"] -pub struct MA1R { - bits: u16, -} -impl MA1R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u16 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct MA2R { - bits: u16, -} -impl MA2R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u16 { - self.bits - } -} -#[doc = r" Proxy"] -pub struct _MA1W<'a> { - w: &'a mut W, -} -impl<'a> _MA1W<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u16) -> &'a mut W { - const MASK: u16 = 1023; - const OFFSET: u8 = 0; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = r" Proxy"] -pub struct _MA2W<'a> { - w: &'a mut W, -} -impl<'a> _MA2W<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u16) -> &'a mut W { - const MASK: u16 = 1023; - const OFFSET: u8 = 16; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:9 - Match Address 1"] - #[inline] - pub fn ma1(&self) -> MA1R { - let bits = { - const MASK: u16 = 1023; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u16 - }; - MA1R { bits } - } - #[doc = "Bits 16:25 - Match Address 2"] - #[inline] - pub fn ma2(&self) -> MA2R { - let bits = { - const MASK: u16 = 1023; - const OFFSET: u8 = 16; - ((self.bits >> OFFSET) & MASK as u32) as u16 - }; - MA2R { bits } - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 0 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bits 0:9 - Match Address 1"] - #[inline] - pub fn ma1(&mut self) -> _MA1W { - _MA1W { w: self } - } - #[doc = "Bits 16:25 - Match Address 2"] - #[inline] - pub fn ma2(&mut self) -> _MA2W { - _MA2W { w: self } - } -} diff --git a/src/lpuart1/mod.rs b/src/lpuart1/mod.rs deleted file mode 100644 index d0eca48..0000000 --- a/src/lpuart1/mod.rs +++ /dev/null @@ -1,89 +0,0 @@ -use vcell::VolatileCell; -#[doc = r" Register block"] -#[repr(C)] -pub struct RegisterBlock { - #[doc = "0x00 - Version ID Register"] pub verid: VERID, - #[doc = "0x04 - Parameter Register"] pub param: PARAM, - #[doc = "0x08 - LPUART Global Register"] pub global: GLOBAL, - #[doc = "0x0c - LPUART Pin Configuration Register"] pub pincfg: PINCFG, - #[doc = "0x10 - LPUART Baud Rate Register"] pub baud: BAUD, - #[doc = "0x14 - LPUART Status Register"] pub stat: STAT, - #[doc = "0x18 - LPUART Control Register"] pub ctrl: CTRL, - #[doc = "0x1c - LPUART Data Register"] pub data: DATA, - #[doc = "0x20 - LPUART Match Address Register"] pub match_: MATCH, - #[doc = "0x24 - LPUART Modem IrDA Register"] pub modir: MODIR, - #[doc = "0x28 - LPUART FIFO Register"] pub fifo: FIFO, - #[doc = "0x2c - LPUART Watermark Register"] pub water: WATER, -} -#[doc = "Version ID Register"] -pub struct VERID { - register: VolatileCell, -} -#[doc = "Version ID Register"] -pub mod verid; -#[doc = "Parameter Register"] -pub struct PARAM { - register: VolatileCell, -} -#[doc = "Parameter Register"] -pub mod param; -#[doc = "LPUART Global Register"] -pub struct GLOBAL { - register: VolatileCell, -} -#[doc = "LPUART Global Register"] -pub mod global; -#[doc = "LPUART Pin Configuration Register"] -pub struct PINCFG { - register: VolatileCell, -} -#[doc = "LPUART Pin Configuration Register"] -pub mod pincfg; -#[doc = "LPUART Baud Rate Register"] -pub struct BAUD { - register: VolatileCell, -} -#[doc = "LPUART Baud Rate Register"] -pub mod baud; -#[doc = "LPUART Status Register"] -pub struct STAT { - register: VolatileCell, -} -#[doc = "LPUART Status Register"] -pub mod stat; -#[doc = "LPUART Control Register"] -pub struct CTRL { - register: VolatileCell, -} -#[doc = "LPUART Control Register"] -pub mod ctrl; -#[doc = "LPUART Data Register"] -pub struct DATA { - register: VolatileCell, -} -#[doc = "LPUART Data Register"] -pub mod data; -#[doc = "LPUART Match Address Register"] -pub struct MATCH { - register: VolatileCell, -} -#[doc = "LPUART Match Address Register"] -pub mod match_; -#[doc = "LPUART Modem IrDA Register"] -pub struct MODIR { - register: VolatileCell, -} -#[doc = "LPUART Modem IrDA Register"] -pub mod modir; -#[doc = "LPUART FIFO Register"] -pub struct FIFO { - register: VolatileCell, -} -#[doc = "LPUART FIFO Register"] -pub mod fifo; -#[doc = "LPUART Watermark Register"] -pub struct WATER { - register: VolatileCell, -} -#[doc = "LPUART Watermark Register"] -pub mod water; diff --git a/src/lpuart1/modir/mod.rs b/src/lpuart1/modir/mod.rs deleted file mode 100644 index badea62..0000000 --- a/src/lpuart1/modir/mod.rs +++ /dev/null @@ -1,1030 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::MODIR { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = "Possible values of the field `TXCTSE`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum TXCTSER { - #[doc = "CTS has no effect on the transmitter."] _0, - #[doc = "Enables clear-to-send operation. The transmitter checks the state of CTS each time it is ready to send a character. If CTS is asserted, the character is sent. If CTS is deasserted, the signal TXD remains in the mark state and transmission is delayed until CTS is asserted. Changes in CTS as a character is being sent do not affect its transmission."] - _1, -} -impl TXCTSER { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - TXCTSER::_0 => false, - TXCTSER::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> TXCTSER { - match value { - false => TXCTSER::_0, - true => TXCTSER::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == TXCTSER::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == TXCTSER::_1 - } -} -#[doc = "Possible values of the field `TXRTSE`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum TXRTSER { - #[doc = "The transmitter has no effect on RTS."] _0, - #[doc = "When a character is placed into an empty transmitter data buffer , RTS asserts one bit time before the start bit is transmitted. RTS deasserts one bit time after all characters in the transmitter data buffer and shift register are completely sent, including the last stop bit."] - _1, -} -impl TXRTSER { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - TXRTSER::_0 => false, - TXRTSER::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> TXRTSER { - match value { - false => TXRTSER::_0, - true => TXRTSER::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == TXRTSER::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == TXRTSER::_1 - } -} -#[doc = "Possible values of the field `TXRTSPOL`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum TXRTSPOLR { - #[doc = "Transmitter RTS is active low."] _0, - #[doc = "Transmitter RTS is active high."] _1, -} -impl TXRTSPOLR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - TXRTSPOLR::_0 => false, - TXRTSPOLR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> TXRTSPOLR { - match value { - false => TXRTSPOLR::_0, - true => TXRTSPOLR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == TXRTSPOLR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == TXRTSPOLR::_1 - } -} -#[doc = "Possible values of the field `RXRTSE`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum RXRTSER { - #[doc = "The receiver has no effect on RTS."] _0, - #[doc = r" Reserved"] _Reserved(bool), -} -impl RXRTSER { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - RXRTSER::_0 => false, - RXRTSER::_Reserved(bits) => bits, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> RXRTSER { - match value { - false => RXRTSER::_0, - i => RXRTSER::_Reserved(i), - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == RXRTSER::_0 - } -} -#[doc = "Possible values of the field `TXCTSC`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum TXCTSCR { - #[doc = "CTS input is sampled at the start of each character."] _0, - #[doc = "CTS input is sampled when the transmitter is idle."] _1, -} -impl TXCTSCR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - TXCTSCR::_0 => false, - TXCTSCR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> TXCTSCR { - match value { - false => TXCTSCR::_0, - true => TXCTSCR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == TXCTSCR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == TXCTSCR::_1 - } -} -#[doc = "Possible values of the field `TXCTSSRC`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum TXCTSSRCR { - #[doc = "CTS input is the CTS_B pin."] _0, - #[doc = "CTS input is the inverted Receiver Match result."] _1, -} -impl TXCTSSRCR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - TXCTSSRCR::_0 => false, - TXCTSSRCR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> TXCTSSRCR { - match value { - false => TXCTSSRCR::_0, - true => TXCTSSRCR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == TXCTSSRCR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == TXCTSSRCR::_1 - } -} -#[doc = r" Value of the field"] -pub struct RTSWATERR { - bits: u8, -} -impl RTSWATERR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = "Possible values of the field `TNP`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum TNPR { - #[doc = "1/OSR."] _00, - #[doc = "2/OSR."] _01, - #[doc = "3/OSR."] _10, - #[doc = "4/OSR."] _11, -} -impl TNPR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - match *self { - TNPR::_00 => 0, - TNPR::_01 => 1, - TNPR::_10 => 2, - TNPR::_11 => 3, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: u8) -> TNPR { - match value { - 0 => TNPR::_00, - 1 => TNPR::_01, - 2 => TNPR::_10, - 3 => TNPR::_11, - _ => unreachable!(), - } - } - #[doc = "Checks if the value of the field is `_00`"] - #[inline] - pub fn is_00(&self) -> bool { - *self == TNPR::_00 - } - #[doc = "Checks if the value of the field is `_01`"] - #[inline] - pub fn is_01(&self) -> bool { - *self == TNPR::_01 - } - #[doc = "Checks if the value of the field is `_10`"] - #[inline] - pub fn is_10(&self) -> bool { - *self == TNPR::_10 - } - #[doc = "Checks if the value of the field is `_11`"] - #[inline] - pub fn is_11(&self) -> bool { - *self == TNPR::_11 - } -} -#[doc = "Possible values of the field `IREN`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum IRENR { - #[doc = "IR disabled."] _0, - #[doc = "IR enabled."] _1, -} -impl IRENR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - IRENR::_0 => false, - IRENR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> IRENR { - match value { - false => IRENR::_0, - true => IRENR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == IRENR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == IRENR::_1 - } -} -#[doc = "Values that can be written to the field `TXCTSE`"] -pub enum TXCTSEW { - #[doc = "CTS has no effect on the transmitter."] _0, - #[doc = "Enables clear-to-send operation. The transmitter checks the state of CTS each time it is ready to send a character. If CTS is asserted, the character is sent. If CTS is deasserted, the signal TXD remains in the mark state and transmission is delayed until CTS is asserted. Changes in CTS as a character is being sent do not affect its transmission."] - _1, -} -impl TXCTSEW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - TXCTSEW::_0 => false, - TXCTSEW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _TXCTSEW<'a> { - w: &'a mut W, -} -impl<'a> _TXCTSEW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: TXCTSEW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "CTS has no effect on the transmitter."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(TXCTSEW::_0) - } - #[doc = "Enables clear-to-send operation. The transmitter checks the state of CTS each time it is ready to send a character. If CTS is asserted, the character is sent. If CTS is deasserted, the signal TXD remains in the mark state and transmission is delayed until CTS is asserted. Changes in CTS as a character is being sent do not affect its transmission."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(TXCTSEW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 0; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `TXRTSE`"] -pub enum TXRTSEW { - #[doc = "The transmitter has no effect on RTS."] _0, - #[doc = "When a character is placed into an empty transmitter data buffer , RTS asserts one bit time before the start bit is transmitted. RTS deasserts one bit time after all characters in the transmitter data buffer and shift register are completely sent, including the last stop bit."] - _1, -} -impl TXRTSEW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - TXRTSEW::_0 => false, - TXRTSEW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _TXRTSEW<'a> { - w: &'a mut W, -} -impl<'a> _TXRTSEW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: TXRTSEW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "The transmitter has no effect on RTS."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(TXRTSEW::_0) - } - #[doc = "When a character is placed into an empty transmitter data buffer , RTS asserts one bit time before the start bit is transmitted. RTS deasserts one bit time after all characters in the transmitter data buffer and shift register are completely sent, including the last stop bit."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(TXRTSEW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 1; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `TXRTSPOL`"] -pub enum TXRTSPOLW { - #[doc = "Transmitter RTS is active low."] _0, - #[doc = "Transmitter RTS is active high."] _1, -} -impl TXRTSPOLW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - TXRTSPOLW::_0 => false, - TXRTSPOLW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _TXRTSPOLW<'a> { - w: &'a mut W, -} -impl<'a> _TXRTSPOLW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: TXRTSPOLW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Transmitter RTS is active low."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(TXRTSPOLW::_0) - } - #[doc = "Transmitter RTS is active high."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(TXRTSPOLW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 2; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `RXRTSE`"] -pub enum RXRTSEW { - #[doc = "The receiver has no effect on RTS."] _0, -} -impl RXRTSEW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - RXRTSEW::_0 => false, - } - } -} -#[doc = r" Proxy"] -pub struct _RXRTSEW<'a> { - w: &'a mut W, -} -impl<'a> _RXRTSEW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: RXRTSEW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "The receiver has no effect on RTS."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(RXRTSEW::_0) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 3; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `TXCTSC`"] -pub enum TXCTSCW { - #[doc = "CTS input is sampled at the start of each character."] _0, - #[doc = "CTS input is sampled when the transmitter is idle."] _1, -} -impl TXCTSCW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - TXCTSCW::_0 => false, - TXCTSCW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _TXCTSCW<'a> { - w: &'a mut W, -} -impl<'a> _TXCTSCW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: TXCTSCW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "CTS input is sampled at the start of each character."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(TXCTSCW::_0) - } - #[doc = "CTS input is sampled when the transmitter is idle."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(TXCTSCW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 4; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `TXCTSSRC`"] -pub enum TXCTSSRCW { - #[doc = "CTS input is the CTS_B pin."] _0, - #[doc = "CTS input is the inverted Receiver Match result."] _1, -} -impl TXCTSSRCW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - TXCTSSRCW::_0 => false, - TXCTSSRCW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _TXCTSSRCW<'a> { - w: &'a mut W, -} -impl<'a> _TXCTSSRCW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: TXCTSSRCW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "CTS input is the CTS_B pin."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(TXCTSSRCW::_0) - } - #[doc = "CTS input is the inverted Receiver Match result."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(TXCTSSRCW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 5; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = r" Proxy"] -pub struct _RTSWATERW<'a> { - w: &'a mut W, -} -impl<'a> _RTSWATERW<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 3; - const OFFSET: u8 = 8; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `TNP`"] -pub enum TNPW { - #[doc = "1/OSR."] _00, - #[doc = "2/OSR."] _01, - #[doc = "3/OSR."] _10, - #[doc = "4/OSR."] _11, -} -impl TNPW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> u8 { - match *self { - TNPW::_00 => 0, - TNPW::_01 => 1, - TNPW::_10 => 2, - TNPW::_11 => 3, - } - } -} -#[doc = r" Proxy"] -pub struct _TNPW<'a> { - w: &'a mut W, -} -impl<'a> _TNPW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: TNPW) -> &'a mut W { - { - self.bits(variant._bits()) - } - } - #[doc = "1/OSR."] - #[inline] - pub fn _00(self) -> &'a mut W { - self.variant(TNPW::_00) - } - #[doc = "2/OSR."] - #[inline] - pub fn _01(self) -> &'a mut W { - self.variant(TNPW::_01) - } - #[doc = "3/OSR."] - #[inline] - pub fn _10(self) -> &'a mut W { - self.variant(TNPW::_10) - } - #[doc = "4/OSR."] - #[inline] - pub fn _11(self) -> &'a mut W { - self.variant(TNPW::_11) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 3; - const OFFSET: u8 = 16; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `IREN`"] -pub enum IRENW { - #[doc = "IR disabled."] _0, - #[doc = "IR enabled."] _1, -} -impl IRENW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - IRENW::_0 => false, - IRENW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _IRENW<'a> { - w: &'a mut W, -} -impl<'a> _IRENW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: IRENW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "IR disabled."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(IRENW::_0) - } - #[doc = "IR enabled."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(IRENW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 18; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bit 0 - Transmitter clear-to-send enable"] - #[inline] - pub fn txctse(&self) -> TXCTSER { - TXCTSER::_from({ - const MASK: bool = true; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 1 - Transmitter request-to-send enable"] - #[inline] - pub fn txrtse(&self) -> TXRTSER { - TXRTSER::_from({ - const MASK: bool = true; - const OFFSET: u8 = 1; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 2 - Transmitter request-to-send polarity"] - #[inline] - pub fn txrtspol(&self) -> TXRTSPOLR { - TXRTSPOLR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 2; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 3 - Receiver request-to-send enable"] - #[inline] - pub fn rxrtse(&self) -> RXRTSER { - RXRTSER::_from({ - const MASK: bool = true; - const OFFSET: u8 = 3; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 4 - Transmit CTS Configuration"] - #[inline] - pub fn txctsc(&self) -> TXCTSCR { - TXCTSCR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 4; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 5 - Transmit CTS Source"] - #[inline] - pub fn txctssrc(&self) -> TXCTSSRCR { - TXCTSSRCR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 5; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bits 8:9 - Receive RTS Configuration"] - #[inline] - pub fn rtswater(&self) -> RTSWATERR { - let bits = { - const MASK: u8 = 3; - const OFFSET: u8 = 8; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - RTSWATERR { bits } - } - #[doc = "Bits 16:17 - Transmitter narrow pulse"] - #[inline] - pub fn tnp(&self) -> TNPR { - TNPR::_from({ - const MASK: u8 = 3; - const OFFSET: u8 = 16; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }) - } - #[doc = "Bit 18 - Infrared enable"] - #[inline] - pub fn iren(&self) -> IRENR { - IRENR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 18; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 0 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bit 0 - Transmitter clear-to-send enable"] - #[inline] - pub fn txctse(&mut self) -> _TXCTSEW { - _TXCTSEW { w: self } - } - #[doc = "Bit 1 - Transmitter request-to-send enable"] - #[inline] - pub fn txrtse(&mut self) -> _TXRTSEW { - _TXRTSEW { w: self } - } - #[doc = "Bit 2 - Transmitter request-to-send polarity"] - #[inline] - pub fn txrtspol(&mut self) -> _TXRTSPOLW { - _TXRTSPOLW { w: self } - } - #[doc = "Bit 3 - Receiver request-to-send enable"] - #[inline] - pub fn rxrtse(&mut self) -> _RXRTSEW { - _RXRTSEW { w: self } - } - #[doc = "Bit 4 - Transmit CTS Configuration"] - #[inline] - pub fn txctsc(&mut self) -> _TXCTSCW { - _TXCTSCW { w: self } - } - #[doc = "Bit 5 - Transmit CTS Source"] - #[inline] - pub fn txctssrc(&mut self) -> _TXCTSSRCW { - _TXCTSSRCW { w: self } - } - #[doc = "Bits 8:9 - Receive RTS Configuration"] - #[inline] - pub fn rtswater(&mut self) -> _RTSWATERW { - _RTSWATERW { w: self } - } - #[doc = "Bits 16:17 - Transmitter narrow pulse"] - #[inline] - pub fn tnp(&mut self) -> _TNPW { - _TNPW { w: self } - } - #[doc = "Bit 18 - Infrared enable"] - #[inline] - pub fn iren(&mut self) -> _IRENW { - _IRENW { w: self } - } -} diff --git a/src/lpuart1/param/mod.rs b/src/lpuart1/param/mod.rs deleted file mode 100644 index de98cf0..0000000 --- a/src/lpuart1/param/mod.rs +++ /dev/null @@ -1,62 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -impl super::PARAM { - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } -} -#[doc = r" Value of the field"] -pub struct TXFIFOR { - bits: u8, -} -impl TXFIFOR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct RXFIFOR { - bits: u8, -} -impl RXFIFOR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:7 - Transmit FIFO Size"] - #[inline] - pub fn txfifo(&self) -> TXFIFOR { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - TXFIFOR { bits } - } - #[doc = "Bits 8:15 - Receive FIFO Size"] - #[inline] - pub fn rxfifo(&self) -> RXFIFOR { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 8; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - RXFIFOR { bits } - } -} diff --git a/src/lpuart1/pincfg/mod.rs b/src/lpuart1/pincfg/mod.rs deleted file mode 100644 index 799cd21..0000000 --- a/src/lpuart1/pincfg/mod.rs +++ /dev/null @@ -1,194 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::PINCFG { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = "Possible values of the field `TRGSEL`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum TRGSELR { - #[doc = "Input trigger is disabled."] _00, - #[doc = "Input trigger is used instead of RXD pin input."] _01, - #[doc = "Input trigger is used instead of CTS_B pin input."] _10, - #[doc = "Input trigger is used to modulate the TXD pin output. The TXD pin output (after TXINV configuration) is ANDed with the input trigger."] - _11, -} -impl TRGSELR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - match *self { - TRGSELR::_00 => 0, - TRGSELR::_01 => 1, - TRGSELR::_10 => 2, - TRGSELR::_11 => 3, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: u8) -> TRGSELR { - match value { - 0 => TRGSELR::_00, - 1 => TRGSELR::_01, - 2 => TRGSELR::_10, - 3 => TRGSELR::_11, - _ => unreachable!(), - } - } - #[doc = "Checks if the value of the field is `_00`"] - #[inline] - pub fn is_00(&self) -> bool { - *self == TRGSELR::_00 - } - #[doc = "Checks if the value of the field is `_01`"] - #[inline] - pub fn is_01(&self) -> bool { - *self == TRGSELR::_01 - } - #[doc = "Checks if the value of the field is `_10`"] - #[inline] - pub fn is_10(&self) -> bool { - *self == TRGSELR::_10 - } - #[doc = "Checks if the value of the field is `_11`"] - #[inline] - pub fn is_11(&self) -> bool { - *self == TRGSELR::_11 - } -} -#[doc = "Values that can be written to the field `TRGSEL`"] -pub enum TRGSELW { - #[doc = "Input trigger is disabled."] _00, - #[doc = "Input trigger is used instead of RXD pin input."] _01, - #[doc = "Input trigger is used instead of CTS_B pin input."] _10, - #[doc = "Input trigger is used to modulate the TXD pin output. The TXD pin output (after TXINV configuration) is ANDed with the input trigger."] - _11, -} -impl TRGSELW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> u8 { - match *self { - TRGSELW::_00 => 0, - TRGSELW::_01 => 1, - TRGSELW::_10 => 2, - TRGSELW::_11 => 3, - } - } -} -#[doc = r" Proxy"] -pub struct _TRGSELW<'a> { - w: &'a mut W, -} -impl<'a> _TRGSELW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: TRGSELW) -> &'a mut W { - { - self.bits(variant._bits()) - } - } - #[doc = "Input trigger is disabled."] - #[inline] - pub fn _00(self) -> &'a mut W { - self.variant(TRGSELW::_00) - } - #[doc = "Input trigger is used instead of RXD pin input."] - #[inline] - pub fn _01(self) -> &'a mut W { - self.variant(TRGSELW::_01) - } - #[doc = "Input trigger is used instead of CTS_B pin input."] - #[inline] - pub fn _10(self) -> &'a mut W { - self.variant(TRGSELW::_10) - } - #[doc = "Input trigger is used to modulate the TXD pin output. The TXD pin output (after TXINV configuration) is ANDed with the input trigger."] - #[inline] - pub fn _11(self) -> &'a mut W { - self.variant(TRGSELW::_11) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 3; - const OFFSET: u8 = 0; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:1 - Trigger Select"] - #[inline] - pub fn trgsel(&self) -> TRGSELR { - TRGSELR::_from({ - const MASK: u8 = 3; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }) - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 0 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bits 0:1 - Trigger Select"] - #[inline] - pub fn trgsel(&mut self) -> _TRGSELW { - _TRGSELW { w: self } - } -} diff --git a/src/lpuart1/stat/mod.rs b/src/lpuart1/stat/mod.rs deleted file mode 100644 index 6a322b6..0000000 --- a/src/lpuart1/stat/mod.rs +++ /dev/null @@ -1,1900 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::STAT { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = "Possible values of the field `MA2F`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum MA2FR { - #[doc = "Received data is not equal to MA2"] _0, - #[doc = "Received data is equal to MA2"] _1, -} -impl MA2FR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - MA2FR::_0 => false, - MA2FR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> MA2FR { - match value { - false => MA2FR::_0, - true => MA2FR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == MA2FR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == MA2FR::_1 - } -} -#[doc = "Possible values of the field `MA1F`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum MA1FR { - #[doc = "Received data is not equal to MA1"] _0, - #[doc = "Received data is equal to MA1"] _1, -} -impl MA1FR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - MA1FR::_0 => false, - MA1FR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> MA1FR { - match value { - false => MA1FR::_0, - true => MA1FR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == MA1FR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == MA1FR::_1 - } -} -#[doc = "Possible values of the field `PF`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum PFR { - #[doc = "No parity error."] _0, - #[doc = "Parity error."] _1, -} -impl PFR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - PFR::_0 => false, - PFR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> PFR { - match value { - false => PFR::_0, - true => PFR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == PFR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == PFR::_1 - } -} -#[doc = "Possible values of the field `FE`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum FER { - #[doc = "No framing error detected. This does not guarantee the framing is correct."] _0, - #[doc = "Framing error."] _1, -} -impl FER { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - FER::_0 => false, - FER::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> FER { - match value { - false => FER::_0, - true => FER::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == FER::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == FER::_1 - } -} -#[doc = "Possible values of the field `NF`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum NFR { - #[doc = "No noise detected."] _0, - #[doc = "Noise detected in the received character in LPUART_DATA."] _1, -} -impl NFR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - NFR::_0 => false, - NFR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> NFR { - match value { - false => NFR::_0, - true => NFR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == NFR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == NFR::_1 - } -} -#[doc = "Possible values of the field `OR`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum ORR { - #[doc = "No overrun."] _0, - #[doc = "Receive overrun (new LPUART data lost)."] _1, -} -impl ORR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - ORR::_0 => false, - ORR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> ORR { - match value { - false => ORR::_0, - true => ORR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == ORR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == ORR::_1 - } -} -#[doc = "Possible values of the field `IDLE`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum IDLER { - #[doc = "No idle line detected."] _0, - #[doc = "Idle line was detected."] _1, -} -impl IDLER { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - IDLER::_0 => false, - IDLER::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> IDLER { - match value { - false => IDLER::_0, - true => IDLER::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == IDLER::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == IDLER::_1 - } -} -#[doc = "Possible values of the field `RDRF`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum RDRFR { - #[doc = "Receive data buffer empty."] _0, - #[doc = "Receive data buffer full."] _1, -} -impl RDRFR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - RDRFR::_0 => false, - RDRFR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> RDRFR { - match value { - false => RDRFR::_0, - true => RDRFR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == RDRFR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == RDRFR::_1 - } -} -#[doc = "Possible values of the field `TC`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum TCR { - #[doc = "Transmitter active (sending data, a preamble, or a break)."] _0, - #[doc = "Transmitter idle (transmission activity complete)."] _1, -} -impl TCR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - TCR::_0 => false, - TCR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> TCR { - match value { - false => TCR::_0, - true => TCR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == TCR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == TCR::_1 - } -} -#[doc = "Possible values of the field `TDRE`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum TDRER { - #[doc = "Transmit data buffer full."] _0, - #[doc = "Transmit data buffer empty."] _1, -} -impl TDRER { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - TDRER::_0 => false, - TDRER::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> TDRER { - match value { - false => TDRER::_0, - true => TDRER::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == TDRER::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == TDRER::_1 - } -} -#[doc = "Possible values of the field `RAF`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum RAFR { - #[doc = "LPUART receiver idle waiting for a start bit."] _0, - #[doc = "LPUART receiver active (RXD input not idle)."] _1, -} -impl RAFR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - RAFR::_0 => false, - RAFR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> RAFR { - match value { - false => RAFR::_0, - true => RAFR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == RAFR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == RAFR::_1 - } -} -#[doc = "Possible values of the field `LBKDE`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum LBKDER { - #[doc = "LIN break detect is disabled, normal break character can be detected."] _0, - #[doc = "LIN break detect is enabled. LIN break character is detected at length of 11 bit times (if M = 0) or 12 (if M = 1) or 13 (M10 = 1)."] - _1, -} -impl LBKDER { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - LBKDER::_0 => false, - LBKDER::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> LBKDER { - match value { - false => LBKDER::_0, - true => LBKDER::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == LBKDER::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == LBKDER::_1 - } -} -#[doc = "Possible values of the field `BRK13`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum BRK13R { - #[doc = "Break character is transmitted with length of 9 to 13 bit times."] _0, - #[doc = "Break character is transmitted with length of 12 to 15 bit times."] _1, -} -impl BRK13R { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - BRK13R::_0 => false, - BRK13R::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> BRK13R { - match value { - false => BRK13R::_0, - true => BRK13R::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == BRK13R::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == BRK13R::_1 - } -} -#[doc = "Possible values of the field `RWUID`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum RWUIDR { - #[doc = "During receive standby state (RWU = 1), the IDLE bit does not get set upon detection of an idle character. During address match wakeup, the IDLE bit does not set when an address does not match."] - _0, - #[doc = "During receive standby state (RWU = 1), the IDLE bit gets set upon detection of an idle character. During address match wakeup, the IDLE bit does set when an address does not match."] - _1, -} -impl RWUIDR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - RWUIDR::_0 => false, - RWUIDR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> RWUIDR { - match value { - false => RWUIDR::_0, - true => RWUIDR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == RWUIDR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == RWUIDR::_1 - } -} -#[doc = "Possible values of the field `RXINV`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum RXINVR { - #[doc = "Receive data not inverted."] _0, - #[doc = "Receive data inverted."] _1, -} -impl RXINVR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - RXINVR::_0 => false, - RXINVR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> RXINVR { - match value { - false => RXINVR::_0, - true => RXINVR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == RXINVR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == RXINVR::_1 - } -} -#[doc = "Possible values of the field `MSBF`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum MSBFR { - #[doc = "LSB (bit0) is the first bit that is transmitted following the start bit. Further, the first bit received after the start bit is identified as bit0."] - _0, - #[doc = "MSB (bit9, bit8, bit7 or bit6) is the first bit that is transmitted following the start bit depending on the setting of CTRL[M], CTRL[PE] and BAUD[M10]. Further, the first bit received after the start bit is identified as bit9, bit8, bit7 or bit6 depending on the setting of CTRL[M] and CTRL[PE]."] - _1, -} -impl MSBFR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - MSBFR::_0 => false, - MSBFR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> MSBFR { - match value { - false => MSBFR::_0, - true => MSBFR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == MSBFR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == MSBFR::_1 - } -} -#[doc = "Possible values of the field `RXEDGIF`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum RXEDGIFR { - #[doc = "No active edge on the receive pin has occurred."] _0, - #[doc = "An active edge on the receive pin has occurred."] _1, -} -impl RXEDGIFR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - RXEDGIFR::_0 => false, - RXEDGIFR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> RXEDGIFR { - match value { - false => RXEDGIFR::_0, - true => RXEDGIFR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == RXEDGIFR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == RXEDGIFR::_1 - } -} -#[doc = "Possible values of the field `LBKDIF`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum LBKDIFR { - #[doc = "No LIN break character has been detected."] _0, - #[doc = "LIN break character has been detected."] _1, -} -impl LBKDIFR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - LBKDIFR::_0 => false, - LBKDIFR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> LBKDIFR { - match value { - false => LBKDIFR::_0, - true => LBKDIFR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == LBKDIFR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == LBKDIFR::_1 - } -} -#[doc = "Values that can be written to the field `MA2F`"] -pub enum MA2FW { - #[doc = "Received data is not equal to MA2"] _0, - #[doc = "Received data is equal to MA2"] _1, -} -impl MA2FW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - MA2FW::_0 => false, - MA2FW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _MA2FW<'a> { - w: &'a mut W, -} -impl<'a> _MA2FW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: MA2FW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Received data is not equal to MA2"] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(MA2FW::_0) - } - #[doc = "Received data is equal to MA2"] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(MA2FW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 14; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `MA1F`"] -pub enum MA1FW { - #[doc = "Received data is not equal to MA1"] _0, - #[doc = "Received data is equal to MA1"] _1, -} -impl MA1FW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - MA1FW::_0 => false, - MA1FW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _MA1FW<'a> { - w: &'a mut W, -} -impl<'a> _MA1FW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: MA1FW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Received data is not equal to MA1"] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(MA1FW::_0) - } - #[doc = "Received data is equal to MA1"] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(MA1FW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 15; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `PF`"] -pub enum PFW { - #[doc = "No parity error."] _0, - #[doc = "Parity error."] _1, -} -impl PFW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - PFW::_0 => false, - PFW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _PFW<'a> { - w: &'a mut W, -} -impl<'a> _PFW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: PFW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "No parity error."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(PFW::_0) - } - #[doc = "Parity error."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(PFW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 16; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `FE`"] -pub enum FEW { - #[doc = "No framing error detected. This does not guarantee the framing is correct."] _0, - #[doc = "Framing error."] _1, -} -impl FEW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - FEW::_0 => false, - FEW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _FEW<'a> { - w: &'a mut W, -} -impl<'a> _FEW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: FEW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "No framing error detected. This does not guarantee the framing is correct."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(FEW::_0) - } - #[doc = "Framing error."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(FEW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 17; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `NF`"] -pub enum NFW { - #[doc = "No noise detected."] _0, - #[doc = "Noise detected in the received character in LPUART_DATA."] _1, -} -impl NFW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - NFW::_0 => false, - NFW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _NFW<'a> { - w: &'a mut W, -} -impl<'a> _NFW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: NFW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "No noise detected."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(NFW::_0) - } - #[doc = "Noise detected in the received character in LPUART_DATA."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(NFW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 18; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `OR`"] -pub enum ORW { - #[doc = "No overrun."] _0, - #[doc = "Receive overrun (new LPUART data lost)."] _1, -} -impl ORW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - ORW::_0 => false, - ORW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _ORW<'a> { - w: &'a mut W, -} -impl<'a> _ORW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: ORW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "No overrun."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(ORW::_0) - } - #[doc = "Receive overrun (new LPUART data lost)."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(ORW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 19; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `IDLE`"] -pub enum IDLEW { - #[doc = "No idle line detected."] _0, - #[doc = "Idle line was detected."] _1, -} -impl IDLEW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - IDLEW::_0 => false, - IDLEW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _IDLEW<'a> { - w: &'a mut W, -} -impl<'a> _IDLEW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: IDLEW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "No idle line detected."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(IDLEW::_0) - } - #[doc = "Idle line was detected."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(IDLEW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 20; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `LBKDE`"] -pub enum LBKDEW { - #[doc = "LIN break detect is disabled, normal break character can be detected."] _0, - #[doc = "LIN break detect is enabled. LIN break character is detected at length of 11 bit times (if M = 0) or 12 (if M = 1) or 13 (M10 = 1)."] - _1, -} -impl LBKDEW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - LBKDEW::_0 => false, - LBKDEW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _LBKDEW<'a> { - w: &'a mut W, -} -impl<'a> _LBKDEW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: LBKDEW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "LIN break detect is disabled, normal break character can be detected."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(LBKDEW::_0) - } - #[doc = "LIN break detect is enabled. LIN break character is detected at length of 11 bit times (if M = 0) or 12 (if M = 1) or 13 (M10 = 1)."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(LBKDEW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 25; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `BRK13`"] -pub enum BRK13W { - #[doc = "Break character is transmitted with length of 9 to 13 bit times."] _0, - #[doc = "Break character is transmitted with length of 12 to 15 bit times."] _1, -} -impl BRK13W { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - BRK13W::_0 => false, - BRK13W::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _BRK13W<'a> { - w: &'a mut W, -} -impl<'a> _BRK13W<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: BRK13W) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Break character is transmitted with length of 9 to 13 bit times."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(BRK13W::_0) - } - #[doc = "Break character is transmitted with length of 12 to 15 bit times."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(BRK13W::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 26; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `RWUID`"] -pub enum RWUIDW { - #[doc = "During receive standby state (RWU = 1), the IDLE bit does not get set upon detection of an idle character. During address match wakeup, the IDLE bit does not set when an address does not match."] - _0, - #[doc = "During receive standby state (RWU = 1), the IDLE bit gets set upon detection of an idle character. During address match wakeup, the IDLE bit does set when an address does not match."] - _1, -} -impl RWUIDW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - RWUIDW::_0 => false, - RWUIDW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _RWUIDW<'a> { - w: &'a mut W, -} -impl<'a> _RWUIDW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: RWUIDW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "During receive standby state (RWU = 1), the IDLE bit does not get set upon detection of an idle character. During address match wakeup, the IDLE bit does not set when an address does not match."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(RWUIDW::_0) - } - #[doc = "During receive standby state (RWU = 1), the IDLE bit gets set upon detection of an idle character. During address match wakeup, the IDLE bit does set when an address does not match."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(RWUIDW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 27; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `RXINV`"] -pub enum RXINVW { - #[doc = "Receive data not inverted."] _0, - #[doc = "Receive data inverted."] _1, -} -impl RXINVW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - RXINVW::_0 => false, - RXINVW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _RXINVW<'a> { - w: &'a mut W, -} -impl<'a> _RXINVW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: RXINVW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Receive data not inverted."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(RXINVW::_0) - } - #[doc = "Receive data inverted."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(RXINVW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 28; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `MSBF`"] -pub enum MSBFW { - #[doc = "LSB (bit0) is the first bit that is transmitted following the start bit. Further, the first bit received after the start bit is identified as bit0."] - _0, - #[doc = "MSB (bit9, bit8, bit7 or bit6) is the first bit that is transmitted following the start bit depending on the setting of CTRL[M], CTRL[PE] and BAUD[M10]. Further, the first bit received after the start bit is identified as bit9, bit8, bit7 or bit6 depending on the setting of CTRL[M] and CTRL[PE]."] - _1, -} -impl MSBFW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - MSBFW::_0 => false, - MSBFW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _MSBFW<'a> { - w: &'a mut W, -} -impl<'a> _MSBFW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: MSBFW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "LSB (bit0) is the first bit that is transmitted following the start bit. Further, the first bit received after the start bit is identified as bit0."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(MSBFW::_0) - } - #[doc = "MSB (bit9, bit8, bit7 or bit6) is the first bit that is transmitted following the start bit depending on the setting of CTRL[M], CTRL[PE] and BAUD[M10]. Further, the first bit received after the start bit is identified as bit9, bit8, bit7 or bit6 depending on the setting of CTRL[M] and CTRL[PE]."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(MSBFW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 29; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `RXEDGIF`"] -pub enum RXEDGIFW { - #[doc = "No active edge on the receive pin has occurred."] _0, - #[doc = "An active edge on the receive pin has occurred."] _1, -} -impl RXEDGIFW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - RXEDGIFW::_0 => false, - RXEDGIFW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _RXEDGIFW<'a> { - w: &'a mut W, -} -impl<'a> _RXEDGIFW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: RXEDGIFW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "No active edge on the receive pin has occurred."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(RXEDGIFW::_0) - } - #[doc = "An active edge on the receive pin has occurred."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(RXEDGIFW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 30; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `LBKDIF`"] -pub enum LBKDIFW { - #[doc = "No LIN break character has been detected."] _0, - #[doc = "LIN break character has been detected."] _1, -} -impl LBKDIFW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - LBKDIFW::_0 => false, - LBKDIFW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _LBKDIFW<'a> { - w: &'a mut W, -} -impl<'a> _LBKDIFW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: LBKDIFW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "No LIN break character has been detected."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(LBKDIFW::_0) - } - #[doc = "LIN break character has been detected."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(LBKDIFW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 31; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bit 14 - Match 2 Flag"] - #[inline] - pub fn ma2f(&self) -> MA2FR { - MA2FR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 14; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 15 - Match 1 Flag"] - #[inline] - pub fn ma1f(&self) -> MA1FR { - MA1FR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 15; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 16 - Parity Error Flag"] - #[inline] - pub fn pf(&self) -> PFR { - PFR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 16; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 17 - Framing Error Flag"] - #[inline] - pub fn fe(&self) -> FER { - FER::_from({ - const MASK: bool = true; - const OFFSET: u8 = 17; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 18 - Noise Flag"] - #[inline] - pub fn nf(&self) -> NFR { - NFR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 18; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 19 - Receiver Overrun Flag"] - #[inline] - pub fn or(&self) -> ORR { - ORR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 19; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 20 - Idle Line Flag"] - #[inline] - pub fn idle(&self) -> IDLER { - IDLER::_from({ - const MASK: bool = true; - const OFFSET: u8 = 20; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 21 - Receive Data Register Full Flag"] - #[inline] - pub fn rdrf(&self) -> RDRFR { - RDRFR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 21; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 22 - Transmission Complete Flag"] - #[inline] - pub fn tc(&self) -> TCR { - TCR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 22; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 23 - Transmit Data Register Empty Flag"] - #[inline] - pub fn tdre(&self) -> TDRER { - TDRER::_from({ - const MASK: bool = true; - const OFFSET: u8 = 23; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 24 - Receiver Active Flag"] - #[inline] - pub fn raf(&self) -> RAFR { - RAFR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 24; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 25 - LIN Break Detection Enable"] - #[inline] - pub fn lbkde(&self) -> LBKDER { - LBKDER::_from({ - const MASK: bool = true; - const OFFSET: u8 = 25; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 26 - Break Character Generation Length"] - #[inline] - pub fn brk13(&self) -> BRK13R { - BRK13R::_from({ - const MASK: bool = true; - const OFFSET: u8 = 26; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 27 - Receive Wake Up Idle Detect"] - #[inline] - pub fn rwuid(&self) -> RWUIDR { - RWUIDR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 27; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 28 - Receive Data Inversion"] - #[inline] - pub fn rxinv(&self) -> RXINVR { - RXINVR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 28; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 29 - MSB First"] - #[inline] - pub fn msbf(&self) -> MSBFR { - MSBFR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 29; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 30 - RXD Pin Active Edge Interrupt Flag"] - #[inline] - pub fn rxedgif(&self) -> RXEDGIFR { - RXEDGIFR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 30; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 31 - LIN Break Detect Interrupt Flag"] - #[inline] - pub fn lbkdif(&self) -> LBKDIFR { - LBKDIFR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 31; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 12582912 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bit 14 - Match 2 Flag"] - #[inline] - pub fn ma2f(&mut self) -> _MA2FW { - _MA2FW { w: self } - } - #[doc = "Bit 15 - Match 1 Flag"] - #[inline] - pub fn ma1f(&mut self) -> _MA1FW { - _MA1FW { w: self } - } - #[doc = "Bit 16 - Parity Error Flag"] - #[inline] - pub fn pf(&mut self) -> _PFW { - _PFW { w: self } - } - #[doc = "Bit 17 - Framing Error Flag"] - #[inline] - pub fn fe(&mut self) -> _FEW { - _FEW { w: self } - } - #[doc = "Bit 18 - Noise Flag"] - #[inline] - pub fn nf(&mut self) -> _NFW { - _NFW { w: self } - } - #[doc = "Bit 19 - Receiver Overrun Flag"] - #[inline] - pub fn or(&mut self) -> _ORW { - _ORW { w: self } - } - #[doc = "Bit 20 - Idle Line Flag"] - #[inline] - pub fn idle(&mut self) -> _IDLEW { - _IDLEW { w: self } - } - #[doc = "Bit 25 - LIN Break Detection Enable"] - #[inline] - pub fn lbkde(&mut self) -> _LBKDEW { - _LBKDEW { w: self } - } - #[doc = "Bit 26 - Break Character Generation Length"] - #[inline] - pub fn brk13(&mut self) -> _BRK13W { - _BRK13W { w: self } - } - #[doc = "Bit 27 - Receive Wake Up Idle Detect"] - #[inline] - pub fn rwuid(&mut self) -> _RWUIDW { - _RWUIDW { w: self } - } - #[doc = "Bit 28 - Receive Data Inversion"] - #[inline] - pub fn rxinv(&mut self) -> _RXINVW { - _RXINVW { w: self } - } - #[doc = "Bit 29 - MSB First"] - #[inline] - pub fn msbf(&mut self) -> _MSBFW { - _MSBFW { w: self } - } - #[doc = "Bit 30 - RXD Pin Active Edge Interrupt Flag"] - #[inline] - pub fn rxedgif(&mut self) -> _RXEDGIFW { - _RXEDGIFW { w: self } - } - #[doc = "Bit 31 - LIN Break Detect Interrupt Flag"] - #[inline] - pub fn lbkdif(&mut self) -> _LBKDIFW { - _LBKDIFW { w: self } - } -} diff --git a/src/lpuart1/verid/mod.rs b/src/lpuart1/verid/mod.rs deleted file mode 100644 index 647ac7a..0000000 --- a/src/lpuart1/verid/mod.rs +++ /dev/null @@ -1,109 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -impl super::VERID { - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } -} -#[doc = "Possible values of the field `FEATURE`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum FEATURER { - #[doc = "Standard feature set."] _0000000000000001, - #[doc = "Standard feature set with MODEM/IrDA support."] _0000000000000011, - #[doc = r" Reserved"] _Reserved(u16), -} -impl FEATURER { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u16 { - match *self { - FEATURER::_0000000000000001 => 1, - FEATURER::_0000000000000011 => 3, - FEATURER::_Reserved(bits) => bits, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: u16) -> FEATURER { - match value { - 1 => FEATURER::_0000000000000001, - 3 => FEATURER::_0000000000000011, - i => FEATURER::_Reserved(i), - } - } - #[doc = "Checks if the value of the field is `_0000000000000001`"] - #[inline] - pub fn is_0000000000000001(&self) -> bool { - *self == FEATURER::_0000000000000001 - } - #[doc = "Checks if the value of the field is `_0000000000000011`"] - #[inline] - pub fn is_0000000000000011(&self) -> bool { - *self == FEATURER::_0000000000000011 - } -} -#[doc = r" Value of the field"] -pub struct MINORR { - bits: u8, -} -impl MINORR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct MAJORR { - bits: u8, -} -impl MAJORR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:15 - Feature Identification Number"] - #[inline] - pub fn feature(&self) -> FEATURER { - FEATURER::_from({ - const MASK: u16 = 65535; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u16 - }) - } - #[doc = "Bits 16:23 - Minor Version Number"] - #[inline] - pub fn minor(&self) -> MINORR { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 16; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - MINORR { bits } - } - #[doc = "Bits 24:31 - Major Version Number"] - #[inline] - pub fn major(&self) -> MAJORR { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 24; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - MAJORR { bits } - } -} diff --git a/src/lpuart1/water/mod.rs b/src/lpuart1/water/mod.rs deleted file mode 100644 index b3b5898..0000000 --- a/src/lpuart1/water/mod.rs +++ /dev/null @@ -1,188 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::WATER { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = r" Value of the field"] -pub struct TXWATERR { - bits: u8, -} -impl TXWATERR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct TXCOUNTR { - bits: u8, -} -impl TXCOUNTR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct RXWATERR { - bits: u8, -} -impl RXWATERR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct RXCOUNTR { - bits: u8, -} -impl RXCOUNTR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Proxy"] -pub struct _TXWATERW<'a> { - w: &'a mut W, -} -impl<'a> _TXWATERW<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 3; - const OFFSET: u8 = 0; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = r" Proxy"] -pub struct _RXWATERW<'a> { - w: &'a mut W, -} -impl<'a> _RXWATERW<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 3; - const OFFSET: u8 = 16; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:1 - Transmit Watermark"] - #[inline] - pub fn txwater(&self) -> TXWATERR { - let bits = { - const MASK: u8 = 3; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - TXWATERR { bits } - } - #[doc = "Bits 8:10 - Transmit Counter"] - #[inline] - pub fn txcount(&self) -> TXCOUNTR { - let bits = { - const MASK: u8 = 7; - const OFFSET: u8 = 8; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - TXCOUNTR { bits } - } - #[doc = "Bits 16:17 - Receive Watermark"] - #[inline] - pub fn rxwater(&self) -> RXWATERR { - let bits = { - const MASK: u8 = 3; - const OFFSET: u8 = 16; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - RXWATERR { bits } - } - #[doc = "Bits 24:26 - Receive Counter"] - #[inline] - pub fn rxcount(&self) -> RXCOUNTR { - let bits = { - const MASK: u8 = 7; - const OFFSET: u8 = 24; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - RXCOUNTR { bits } - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 0 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bits 0:1 - Transmit Watermark"] - #[inline] - pub fn txwater(&mut self) -> _TXWATERW { - _TXWATERW { w: self } - } - #[doc = "Bits 16:17 - Receive Watermark"] - #[inline] - pub fn rxwater(&mut self) -> _RXWATERW { - _RXWATERW { w: self } - } -} diff --git a/src/lpuart2/baud/mod.rs b/src/lpuart2/baud/mod.rs deleted file mode 100644 index fae2b24..0000000 --- a/src/lpuart2/baud/mod.rs +++ /dev/null @@ -1,2003 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::BAUD { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = r" Value of the field"] -pub struct SBRR { - bits: u16, -} -impl SBRR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u16 { - self.bits - } -} -#[doc = "Possible values of the field `SBNS`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum SBNSR { - #[doc = "One stop bit."] _0, - #[doc = "Two stop bits."] _1, -} -impl SBNSR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - SBNSR::_0 => false, - SBNSR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> SBNSR { - match value { - false => SBNSR::_0, - true => SBNSR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == SBNSR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == SBNSR::_1 - } -} -#[doc = "Possible values of the field `RXEDGIE`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum RXEDGIER { - #[doc = "Hardware interrupts from LPUART_STAT[RXEDGIF] disabled."] _0, - #[doc = "Hardware interrupt requested when LPUART_STAT[RXEDGIF] flag is 1."] _1, -} -impl RXEDGIER { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - RXEDGIER::_0 => false, - RXEDGIER::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> RXEDGIER { - match value { - false => RXEDGIER::_0, - true => RXEDGIER::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == RXEDGIER::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == RXEDGIER::_1 - } -} -#[doc = "Possible values of the field `LBKDIE`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum LBKDIER { - #[doc = "Hardware interrupts from LPUART_STAT[LBKDIF] disabled (use polling)."] _0, - #[doc = "Hardware interrupt requested when LPUART_STAT[LBKDIF] flag is 1."] _1, -} -impl LBKDIER { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - LBKDIER::_0 => false, - LBKDIER::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> LBKDIER { - match value { - false => LBKDIER::_0, - true => LBKDIER::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == LBKDIER::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == LBKDIER::_1 - } -} -#[doc = "Possible values of the field `RESYNCDIS`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum RESYNCDISR { - #[doc = "Resynchronization during received data word is supported"] _0, - #[doc = "Resynchronization during received data word is disabled"] _1, -} -impl RESYNCDISR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - RESYNCDISR::_0 => false, - RESYNCDISR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> RESYNCDISR { - match value { - false => RESYNCDISR::_0, - true => RESYNCDISR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == RESYNCDISR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == RESYNCDISR::_1 - } -} -#[doc = "Possible values of the field `BOTHEDGE`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum BOTHEDGER { - #[doc = "Receiver samples input data using the rising edge of the baud rate clock."] _0, - #[doc = "Receiver samples input data using the rising and falling edge of the baud rate clock."] - _1, -} -impl BOTHEDGER { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - BOTHEDGER::_0 => false, - BOTHEDGER::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> BOTHEDGER { - match value { - false => BOTHEDGER::_0, - true => BOTHEDGER::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == BOTHEDGER::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == BOTHEDGER::_1 - } -} -#[doc = "Possible values of the field `MATCFG`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum MATCFGR { - #[doc = "Address Match Wakeup"] _00, - #[doc = "Idle Match Wakeup"] _01, - #[doc = "Match On and Match Off"] _10, - #[doc = r" Reserved"] _Reserved(u8), -} -impl MATCFGR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - match *self { - MATCFGR::_00 => 0, - MATCFGR::_01 => 1, - MATCFGR::_10 => 2, - MATCFGR::_Reserved(bits) => bits, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: u8) -> MATCFGR { - match value { - 0 => MATCFGR::_00, - 1 => MATCFGR::_01, - 2 => MATCFGR::_10, - i => MATCFGR::_Reserved(i), - } - } - #[doc = "Checks if the value of the field is `_00`"] - #[inline] - pub fn is_00(&self) -> bool { - *self == MATCFGR::_00 - } - #[doc = "Checks if the value of the field is `_01`"] - #[inline] - pub fn is_01(&self) -> bool { - *self == MATCFGR::_01 - } - #[doc = "Checks if the value of the field is `_10`"] - #[inline] - pub fn is_10(&self) -> bool { - *self == MATCFGR::_10 - } -} -#[doc = "Possible values of the field `RIDMAE`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum RIDMAER { - #[doc = "DMA request disabled."] _0, - #[doc = "DMA request enabled."] _1, -} -impl RIDMAER { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - RIDMAER::_0 => false, - RIDMAER::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> RIDMAER { - match value { - false => RIDMAER::_0, - true => RIDMAER::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == RIDMAER::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == RIDMAER::_1 - } -} -#[doc = "Possible values of the field `RDMAE`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum RDMAER { - #[doc = "DMA request disabled."] _0, - #[doc = "DMA request enabled."] _1, -} -impl RDMAER { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - RDMAER::_0 => false, - RDMAER::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> RDMAER { - match value { - false => RDMAER::_0, - true => RDMAER::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == RDMAER::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == RDMAER::_1 - } -} -#[doc = "Possible values of the field `TDMAE`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum TDMAER { - #[doc = "DMA request disabled."] _0, - #[doc = "DMA request enabled."] _1, -} -impl TDMAER { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - TDMAER::_0 => false, - TDMAER::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> TDMAER { - match value { - false => TDMAER::_0, - true => TDMAER::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == TDMAER::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == TDMAER::_1 - } -} -#[doc = "Possible values of the field `OSR`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum OSRR { - #[doc = "Writing 0 to this field will result in an oversampling ratio of 16"] _00000, - #[doc = "Oversampling ratio of 4, requires BOTHEDGE to be set."] _00011, - #[doc = "Oversampling ratio of 5, requires BOTHEDGE to be set."] _00100, - #[doc = "Oversampling ratio of 6, requires BOTHEDGE to be set."] _00101, - #[doc = "Oversampling ratio of 7, requires BOTHEDGE to be set."] _00110, - #[doc = "Oversampling ratio of 8."] _00111, - #[doc = "Oversampling ratio of 9."] _01000, - #[doc = "Oversampling ratio of 10."] _01001, - #[doc = "Oversampling ratio of 11."] _01010, - #[doc = "Oversampling ratio of 12."] _01011, - #[doc = "Oversampling ratio of 13."] _01100, - #[doc = "Oversampling ratio of 14."] _01101, - #[doc = "Oversampling ratio of 15."] _01110, - #[doc = "Oversampling ratio of 16."] _01111, - #[doc = "Oversampling ratio of 17."] _10000, - #[doc = "Oversampling ratio of 18."] _10001, - #[doc = "Oversampling ratio of 19."] _10010, - #[doc = "Oversampling ratio of 20."] _10011, - #[doc = "Oversampling ratio of 21."] _10100, - #[doc = "Oversampling ratio of 22."] _10101, - #[doc = "Oversampling ratio of 23."] _10110, - #[doc = "Oversampling ratio of 24."] _10111, - #[doc = "Oversampling ratio of 25."] _11000, - #[doc = "Oversampling ratio of 26."] _11001, - #[doc = "Oversampling ratio of 27."] _11010, - #[doc = "Oversampling ratio of 28."] _11011, - #[doc = "Oversampling ratio of 29."] _11100, - #[doc = "Oversampling ratio of 30."] _11101, - #[doc = "Oversampling ratio of 31."] _11110, - #[doc = "Oversampling ratio of 32."] _11111, - #[doc = r" Reserved"] _Reserved(u8), -} -impl OSRR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - match *self { - OSRR::_00000 => 0, - OSRR::_00011 => 3, - OSRR::_00100 => 4, - OSRR::_00101 => 5, - OSRR::_00110 => 6, - OSRR::_00111 => 7, - OSRR::_01000 => 8, - OSRR::_01001 => 9, - OSRR::_01010 => 10, - OSRR::_01011 => 11, - OSRR::_01100 => 12, - OSRR::_01101 => 13, - OSRR::_01110 => 14, - OSRR::_01111 => 15, - OSRR::_10000 => 16, - OSRR::_10001 => 17, - OSRR::_10010 => 18, - OSRR::_10011 => 19, - OSRR::_10100 => 20, - OSRR::_10101 => 21, - OSRR::_10110 => 22, - OSRR::_10111 => 23, - OSRR::_11000 => 24, - OSRR::_11001 => 25, - OSRR::_11010 => 26, - OSRR::_11011 => 27, - OSRR::_11100 => 28, - OSRR::_11101 => 29, - OSRR::_11110 => 30, - OSRR::_11111 => 31, - OSRR::_Reserved(bits) => bits, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: u8) -> OSRR { - match value { - 0 => OSRR::_00000, - 3 => OSRR::_00011, - 4 => OSRR::_00100, - 5 => OSRR::_00101, - 6 => OSRR::_00110, - 7 => OSRR::_00111, - 8 => OSRR::_01000, - 9 => OSRR::_01001, - 10 => OSRR::_01010, - 11 => OSRR::_01011, - 12 => OSRR::_01100, - 13 => OSRR::_01101, - 14 => OSRR::_01110, - 15 => OSRR::_01111, - 16 => OSRR::_10000, - 17 => OSRR::_10001, - 18 => OSRR::_10010, - 19 => OSRR::_10011, - 20 => OSRR::_10100, - 21 => OSRR::_10101, - 22 => OSRR::_10110, - 23 => OSRR::_10111, - 24 => OSRR::_11000, - 25 => OSRR::_11001, - 26 => OSRR::_11010, - 27 => OSRR::_11011, - 28 => OSRR::_11100, - 29 => OSRR::_11101, - 30 => OSRR::_11110, - 31 => OSRR::_11111, - i => OSRR::_Reserved(i), - } - } - #[doc = "Checks if the value of the field is `_00000`"] - #[inline] - pub fn is_00000(&self) -> bool { - *self == OSRR::_00000 - } - #[doc = "Checks if the value of the field is `_00011`"] - #[inline] - pub fn is_00011(&self) -> bool { - *self == OSRR::_00011 - } - #[doc = "Checks if the value of the field is `_00100`"] - #[inline] - pub fn is_00100(&self) -> bool { - *self == OSRR::_00100 - } - #[doc = "Checks if the value of the field is `_00101`"] - #[inline] - pub fn is_00101(&self) -> bool { - *self == OSRR::_00101 - } - #[doc = "Checks if the value of the field is `_00110`"] - #[inline] - pub fn is_00110(&self) -> bool { - *self == OSRR::_00110 - } - #[doc = "Checks if the value of the field is `_00111`"] - #[inline] - pub fn is_00111(&self) -> bool { - *self == OSRR::_00111 - } - #[doc = "Checks if the value of the field is `_01000`"] - #[inline] - pub fn is_01000(&self) -> bool { - *self == OSRR::_01000 - } - #[doc = "Checks if the value of the field is `_01001`"] - #[inline] - pub fn is_01001(&self) -> bool { - *self == OSRR::_01001 - } - #[doc = "Checks if the value of the field is `_01010`"] - #[inline] - pub fn is_01010(&self) -> bool { - *self == OSRR::_01010 - } - #[doc = "Checks if the value of the field is `_01011`"] - #[inline] - pub fn is_01011(&self) -> bool { - *self == OSRR::_01011 - } - #[doc = "Checks if the value of the field is `_01100`"] - #[inline] - pub fn is_01100(&self) -> bool { - *self == OSRR::_01100 - } - #[doc = "Checks if the value of the field is `_01101`"] - #[inline] - pub fn is_01101(&self) -> bool { - *self == OSRR::_01101 - } - #[doc = "Checks if the value of the field is `_01110`"] - #[inline] - pub fn is_01110(&self) -> bool { - *self == OSRR::_01110 - } - #[doc = "Checks if the value of the field is `_01111`"] - #[inline] - pub fn is_01111(&self) -> bool { - *self == OSRR::_01111 - } - #[doc = "Checks if the value of the field is `_10000`"] - #[inline] - pub fn is_10000(&self) -> bool { - *self == OSRR::_10000 - } - #[doc = "Checks if the value of the field is `_10001`"] - #[inline] - pub fn is_10001(&self) -> bool { - *self == OSRR::_10001 - } - #[doc = "Checks if the value of the field is `_10010`"] - #[inline] - pub fn is_10010(&self) -> bool { - *self == OSRR::_10010 - } - #[doc = "Checks if the value of the field is `_10011`"] - #[inline] - pub fn is_10011(&self) -> bool { - *self == OSRR::_10011 - } - #[doc = "Checks if the value of the field is `_10100`"] - #[inline] - pub fn is_10100(&self) -> bool { - *self == OSRR::_10100 - } - #[doc = "Checks if the value of the field is `_10101`"] - #[inline] - pub fn is_10101(&self) -> bool { - *self == OSRR::_10101 - } - #[doc = "Checks if the value of the field is `_10110`"] - #[inline] - pub fn is_10110(&self) -> bool { - *self == OSRR::_10110 - } - #[doc = "Checks if the value of the field is `_10111`"] - #[inline] - pub fn is_10111(&self) -> bool { - *self == OSRR::_10111 - } - #[doc = "Checks if the value of the field is `_11000`"] - #[inline] - pub fn is_11000(&self) -> bool { - *self == OSRR::_11000 - } - #[doc = "Checks if the value of the field is `_11001`"] - #[inline] - pub fn is_11001(&self) -> bool { - *self == OSRR::_11001 - } - #[doc = "Checks if the value of the field is `_11010`"] - #[inline] - pub fn is_11010(&self) -> bool { - *self == OSRR::_11010 - } - #[doc = "Checks if the value of the field is `_11011`"] - #[inline] - pub fn is_11011(&self) -> bool { - *self == OSRR::_11011 - } - #[doc = "Checks if the value of the field is `_11100`"] - #[inline] - pub fn is_11100(&self) -> bool { - *self == OSRR::_11100 - } - #[doc = "Checks if the value of the field is `_11101`"] - #[inline] - pub fn is_11101(&self) -> bool { - *self == OSRR::_11101 - } - #[doc = "Checks if the value of the field is `_11110`"] - #[inline] - pub fn is_11110(&self) -> bool { - *self == OSRR::_11110 - } - #[doc = "Checks if the value of the field is `_11111`"] - #[inline] - pub fn is_11111(&self) -> bool { - *self == OSRR::_11111 - } -} -#[doc = "Possible values of the field `M10`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum M10R { - #[doc = "Receiver and transmitter use 7-bit to 9-bit data characters."] _0, - #[doc = "Receiver and transmitter use 10-bit data characters."] _1, -} -impl M10R { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - M10R::_0 => false, - M10R::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> M10R { - match value { - false => M10R::_0, - true => M10R::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == M10R::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == M10R::_1 - } -} -#[doc = "Possible values of the field `MAEN2`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum MAEN2R { - #[doc = "Normal operation."] _0, - #[doc = "Enables automatic address matching or data matching mode for MATCH[MA2]."] _1, -} -impl MAEN2R { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - MAEN2R::_0 => false, - MAEN2R::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> MAEN2R { - match value { - false => MAEN2R::_0, - true => MAEN2R::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == MAEN2R::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == MAEN2R::_1 - } -} -#[doc = "Possible values of the field `MAEN1`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum MAEN1R { - #[doc = "Normal operation."] _0, - #[doc = "Enables automatic address matching or data matching mode for MATCH[MA1]."] _1, -} -impl MAEN1R { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - MAEN1R::_0 => false, - MAEN1R::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> MAEN1R { - match value { - false => MAEN1R::_0, - true => MAEN1R::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == MAEN1R::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == MAEN1R::_1 - } -} -#[doc = r" Proxy"] -pub struct _SBRW<'a> { - w: &'a mut W, -} -impl<'a> _SBRW<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u16) -> &'a mut W { - const MASK: u16 = 8191; - const OFFSET: u8 = 0; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `SBNS`"] -pub enum SBNSW { - #[doc = "One stop bit."] _0, - #[doc = "Two stop bits."] _1, -} -impl SBNSW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - SBNSW::_0 => false, - SBNSW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _SBNSW<'a> { - w: &'a mut W, -} -impl<'a> _SBNSW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: SBNSW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "One stop bit."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(SBNSW::_0) - } - #[doc = "Two stop bits."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(SBNSW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 13; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `RXEDGIE`"] -pub enum RXEDGIEW { - #[doc = "Hardware interrupts from LPUART_STAT[RXEDGIF] disabled."] _0, - #[doc = "Hardware interrupt requested when LPUART_STAT[RXEDGIF] flag is 1."] _1, -} -impl RXEDGIEW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - RXEDGIEW::_0 => false, - RXEDGIEW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _RXEDGIEW<'a> { - w: &'a mut W, -} -impl<'a> _RXEDGIEW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: RXEDGIEW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Hardware interrupts from LPUART_STAT[RXEDGIF] disabled."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(RXEDGIEW::_0) - } - #[doc = "Hardware interrupt requested when LPUART_STAT[RXEDGIF] flag is 1."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(RXEDGIEW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 14; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `LBKDIE`"] -pub enum LBKDIEW { - #[doc = "Hardware interrupts from LPUART_STAT[LBKDIF] disabled (use polling)."] _0, - #[doc = "Hardware interrupt requested when LPUART_STAT[LBKDIF] flag is 1."] _1, -} -impl LBKDIEW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - LBKDIEW::_0 => false, - LBKDIEW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _LBKDIEW<'a> { - w: &'a mut W, -} -impl<'a> _LBKDIEW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: LBKDIEW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Hardware interrupts from LPUART_STAT[LBKDIF] disabled (use polling)."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(LBKDIEW::_0) - } - #[doc = "Hardware interrupt requested when LPUART_STAT[LBKDIF] flag is 1."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(LBKDIEW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 15; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `RESYNCDIS`"] -pub enum RESYNCDISW { - #[doc = "Resynchronization during received data word is supported"] _0, - #[doc = "Resynchronization during received data word is disabled"] _1, -} -impl RESYNCDISW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - RESYNCDISW::_0 => false, - RESYNCDISW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _RESYNCDISW<'a> { - w: &'a mut W, -} -impl<'a> _RESYNCDISW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: RESYNCDISW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Resynchronization during received data word is supported"] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(RESYNCDISW::_0) - } - #[doc = "Resynchronization during received data word is disabled"] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(RESYNCDISW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 16; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `BOTHEDGE`"] -pub enum BOTHEDGEW { - #[doc = "Receiver samples input data using the rising edge of the baud rate clock."] _0, - #[doc = "Receiver samples input data using the rising and falling edge of the baud rate clock."] - _1, -} -impl BOTHEDGEW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - BOTHEDGEW::_0 => false, - BOTHEDGEW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _BOTHEDGEW<'a> { - w: &'a mut W, -} -impl<'a> _BOTHEDGEW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: BOTHEDGEW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Receiver samples input data using the rising edge of the baud rate clock."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(BOTHEDGEW::_0) - } - #[doc = "Receiver samples input data using the rising and falling edge of the baud rate clock."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(BOTHEDGEW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 17; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `MATCFG`"] -pub enum MATCFGW { - #[doc = "Address Match Wakeup"] _00, - #[doc = "Idle Match Wakeup"] _01, - #[doc = "Match On and Match Off"] _10, -} -impl MATCFGW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> u8 { - match *self { - MATCFGW::_00 => 0, - MATCFGW::_01 => 1, - MATCFGW::_10 => 2, - } - } -} -#[doc = r" Proxy"] -pub struct _MATCFGW<'a> { - w: &'a mut W, -} -impl<'a> _MATCFGW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: MATCFGW) -> &'a mut W { - unsafe { self.bits(variant._bits()) } - } - #[doc = "Address Match Wakeup"] - #[inline] - pub fn _00(self) -> &'a mut W { - self.variant(MATCFGW::_00) - } - #[doc = "Idle Match Wakeup"] - #[inline] - pub fn _01(self) -> &'a mut W { - self.variant(MATCFGW::_01) - } - #[doc = "Match On and Match Off"] - #[inline] - pub fn _10(self) -> &'a mut W { - self.variant(MATCFGW::_10) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 3; - const OFFSET: u8 = 18; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `RIDMAE`"] -pub enum RIDMAEW { - #[doc = "DMA request disabled."] _0, - #[doc = "DMA request enabled."] _1, -} -impl RIDMAEW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - RIDMAEW::_0 => false, - RIDMAEW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _RIDMAEW<'a> { - w: &'a mut W, -} -impl<'a> _RIDMAEW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: RIDMAEW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "DMA request disabled."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(RIDMAEW::_0) - } - #[doc = "DMA request enabled."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(RIDMAEW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 20; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `RDMAE`"] -pub enum RDMAEW { - #[doc = "DMA request disabled."] _0, - #[doc = "DMA request enabled."] _1, -} -impl RDMAEW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - RDMAEW::_0 => false, - RDMAEW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _RDMAEW<'a> { - w: &'a mut W, -} -impl<'a> _RDMAEW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: RDMAEW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "DMA request disabled."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(RDMAEW::_0) - } - #[doc = "DMA request enabled."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(RDMAEW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 21; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `TDMAE`"] -pub enum TDMAEW { - #[doc = "DMA request disabled."] _0, - #[doc = "DMA request enabled."] _1, -} -impl TDMAEW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - TDMAEW::_0 => false, - TDMAEW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _TDMAEW<'a> { - w: &'a mut W, -} -impl<'a> _TDMAEW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: TDMAEW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "DMA request disabled."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(TDMAEW::_0) - } - #[doc = "DMA request enabled."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(TDMAEW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 23; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `OSR`"] -pub enum OSRW { - #[doc = "Writing 0 to this field will result in an oversampling ratio of 16"] _00000, - #[doc = "Oversampling ratio of 4, requires BOTHEDGE to be set."] _00011, - #[doc = "Oversampling ratio of 5, requires BOTHEDGE to be set."] _00100, - #[doc = "Oversampling ratio of 6, requires BOTHEDGE to be set."] _00101, - #[doc = "Oversampling ratio of 7, requires BOTHEDGE to be set."] _00110, - #[doc = "Oversampling ratio of 8."] _00111, - #[doc = "Oversampling ratio of 9."] _01000, - #[doc = "Oversampling ratio of 10."] _01001, - #[doc = "Oversampling ratio of 11."] _01010, - #[doc = "Oversampling ratio of 12."] _01011, - #[doc = "Oversampling ratio of 13."] _01100, - #[doc = "Oversampling ratio of 14."] _01101, - #[doc = "Oversampling ratio of 15."] _01110, - #[doc = "Oversampling ratio of 16."] _01111, - #[doc = "Oversampling ratio of 17."] _10000, - #[doc = "Oversampling ratio of 18."] _10001, - #[doc = "Oversampling ratio of 19."] _10010, - #[doc = "Oversampling ratio of 20."] _10011, - #[doc = "Oversampling ratio of 21."] _10100, - #[doc = "Oversampling ratio of 22."] _10101, - #[doc = "Oversampling ratio of 23."] _10110, - #[doc = "Oversampling ratio of 24."] _10111, - #[doc = "Oversampling ratio of 25."] _11000, - #[doc = "Oversampling ratio of 26."] _11001, - #[doc = "Oversampling ratio of 27."] _11010, - #[doc = "Oversampling ratio of 28."] _11011, - #[doc = "Oversampling ratio of 29."] _11100, - #[doc = "Oversampling ratio of 30."] _11101, - #[doc = "Oversampling ratio of 31."] _11110, - #[doc = "Oversampling ratio of 32."] _11111, -} -impl OSRW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> u8 { - match *self { - OSRW::_00000 => 0, - OSRW::_00011 => 3, - OSRW::_00100 => 4, - OSRW::_00101 => 5, - OSRW::_00110 => 6, - OSRW::_00111 => 7, - OSRW::_01000 => 8, - OSRW::_01001 => 9, - OSRW::_01010 => 10, - OSRW::_01011 => 11, - OSRW::_01100 => 12, - OSRW::_01101 => 13, - OSRW::_01110 => 14, - OSRW::_01111 => 15, - OSRW::_10000 => 16, - OSRW::_10001 => 17, - OSRW::_10010 => 18, - OSRW::_10011 => 19, - OSRW::_10100 => 20, - OSRW::_10101 => 21, - OSRW::_10110 => 22, - OSRW::_10111 => 23, - OSRW::_11000 => 24, - OSRW::_11001 => 25, - OSRW::_11010 => 26, - OSRW::_11011 => 27, - OSRW::_11100 => 28, - OSRW::_11101 => 29, - OSRW::_11110 => 30, - OSRW::_11111 => 31, - } - } -} -#[doc = r" Proxy"] -pub struct _OSRW<'a> { - w: &'a mut W, -} -impl<'a> _OSRW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: OSRW) -> &'a mut W { - unsafe { self.bits(variant._bits()) } - } - #[doc = "Writing 0 to this field will result in an oversampling ratio of 16"] - #[inline] - pub fn _00000(self) -> &'a mut W { - self.variant(OSRW::_00000) - } - #[doc = "Oversampling ratio of 4, requires BOTHEDGE to be set."] - #[inline] - pub fn _00011(self) -> &'a mut W { - self.variant(OSRW::_00011) - } - #[doc = "Oversampling ratio of 5, requires BOTHEDGE to be set."] - #[inline] - pub fn _00100(self) -> &'a mut W { - self.variant(OSRW::_00100) - } - #[doc = "Oversampling ratio of 6, requires BOTHEDGE to be set."] - #[inline] - pub fn _00101(self) -> &'a mut W { - self.variant(OSRW::_00101) - } - #[doc = "Oversampling ratio of 7, requires BOTHEDGE to be set."] - #[inline] - pub fn _00110(self) -> &'a mut W { - self.variant(OSRW::_00110) - } - #[doc = "Oversampling ratio of 8."] - #[inline] - pub fn _00111(self) -> &'a mut W { - self.variant(OSRW::_00111) - } - #[doc = "Oversampling ratio of 9."] - #[inline] - pub fn _01000(self) -> &'a mut W { - self.variant(OSRW::_01000) - } - #[doc = "Oversampling ratio of 10."] - #[inline] - pub fn _01001(self) -> &'a mut W { - self.variant(OSRW::_01001) - } - #[doc = "Oversampling ratio of 11."] - #[inline] - pub fn _01010(self) -> &'a mut W { - self.variant(OSRW::_01010) - } - #[doc = "Oversampling ratio of 12."] - #[inline] - pub fn _01011(self) -> &'a mut W { - self.variant(OSRW::_01011) - } - #[doc = "Oversampling ratio of 13."] - #[inline] - pub fn _01100(self) -> &'a mut W { - self.variant(OSRW::_01100) - } - #[doc = "Oversampling ratio of 14."] - #[inline] - pub fn _01101(self) -> &'a mut W { - self.variant(OSRW::_01101) - } - #[doc = "Oversampling ratio of 15."] - #[inline] - pub fn _01110(self) -> &'a mut W { - self.variant(OSRW::_01110) - } - #[doc = "Oversampling ratio of 16."] - #[inline] - pub fn _01111(self) -> &'a mut W { - self.variant(OSRW::_01111) - } - #[doc = "Oversampling ratio of 17."] - #[inline] - pub fn _10000(self) -> &'a mut W { - self.variant(OSRW::_10000) - } - #[doc = "Oversampling ratio of 18."] - #[inline] - pub fn _10001(self) -> &'a mut W { - self.variant(OSRW::_10001) - } - #[doc = "Oversampling ratio of 19."] - #[inline] - pub fn _10010(self) -> &'a mut W { - self.variant(OSRW::_10010) - } - #[doc = "Oversampling ratio of 20."] - #[inline] - pub fn _10011(self) -> &'a mut W { - self.variant(OSRW::_10011) - } - #[doc = "Oversampling ratio of 21."] - #[inline] - pub fn _10100(self) -> &'a mut W { - self.variant(OSRW::_10100) - } - #[doc = "Oversampling ratio of 22."] - #[inline] - pub fn _10101(self) -> &'a mut W { - self.variant(OSRW::_10101) - } - #[doc = "Oversampling ratio of 23."] - #[inline] - pub fn _10110(self) -> &'a mut W { - self.variant(OSRW::_10110) - } - #[doc = "Oversampling ratio of 24."] - #[inline] - pub fn _10111(self) -> &'a mut W { - self.variant(OSRW::_10111) - } - #[doc = "Oversampling ratio of 25."] - #[inline] - pub fn _11000(self) -> &'a mut W { - self.variant(OSRW::_11000) - } - #[doc = "Oversampling ratio of 26."] - #[inline] - pub fn _11001(self) -> &'a mut W { - self.variant(OSRW::_11001) - } - #[doc = "Oversampling ratio of 27."] - #[inline] - pub fn _11010(self) -> &'a mut W { - self.variant(OSRW::_11010) - } - #[doc = "Oversampling ratio of 28."] - #[inline] - pub fn _11011(self) -> &'a mut W { - self.variant(OSRW::_11011) - } - #[doc = "Oversampling ratio of 29."] - #[inline] - pub fn _11100(self) -> &'a mut W { - self.variant(OSRW::_11100) - } - #[doc = "Oversampling ratio of 30."] - #[inline] - pub fn _11101(self) -> &'a mut W { - self.variant(OSRW::_11101) - } - #[doc = "Oversampling ratio of 31."] - #[inline] - pub fn _11110(self) -> &'a mut W { - self.variant(OSRW::_11110) - } - #[doc = "Oversampling ratio of 32."] - #[inline] - pub fn _11111(self) -> &'a mut W { - self.variant(OSRW::_11111) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 31; - const OFFSET: u8 = 24; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `M10`"] -pub enum M10W { - #[doc = "Receiver and transmitter use 7-bit to 9-bit data characters."] _0, - #[doc = "Receiver and transmitter use 10-bit data characters."] _1, -} -impl M10W { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - M10W::_0 => false, - M10W::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _M10W<'a> { - w: &'a mut W, -} -impl<'a> _M10W<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: M10W) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Receiver and transmitter use 7-bit to 9-bit data characters."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(M10W::_0) - } - #[doc = "Receiver and transmitter use 10-bit data characters."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(M10W::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 29; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `MAEN2`"] -pub enum MAEN2W { - #[doc = "Normal operation."] _0, - #[doc = "Enables automatic address matching or data matching mode for MATCH[MA2]."] _1, -} -impl MAEN2W { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - MAEN2W::_0 => false, - MAEN2W::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _MAEN2W<'a> { - w: &'a mut W, -} -impl<'a> _MAEN2W<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: MAEN2W) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Normal operation."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(MAEN2W::_0) - } - #[doc = "Enables automatic address matching or data matching mode for MATCH[MA2]."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(MAEN2W::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 30; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `MAEN1`"] -pub enum MAEN1W { - #[doc = "Normal operation."] _0, - #[doc = "Enables automatic address matching or data matching mode for MATCH[MA1]."] _1, -} -impl MAEN1W { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - MAEN1W::_0 => false, - MAEN1W::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _MAEN1W<'a> { - w: &'a mut W, -} -impl<'a> _MAEN1W<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: MAEN1W) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Normal operation."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(MAEN1W::_0) - } - #[doc = "Enables automatic address matching or data matching mode for MATCH[MA1]."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(MAEN1W::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 31; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:12 - Baud Rate Modulo Divisor."] - #[inline] - pub fn sbr(&self) -> SBRR { - let bits = { - const MASK: u16 = 8191; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u16 - }; - SBRR { bits } - } - #[doc = "Bit 13 - Stop Bit Number Select"] - #[inline] - pub fn sbns(&self) -> SBNSR { - SBNSR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 13; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 14 - RX Input Active Edge Interrupt Enable"] - #[inline] - pub fn rxedgie(&self) -> RXEDGIER { - RXEDGIER::_from({ - const MASK: bool = true; - const OFFSET: u8 = 14; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 15 - LIN Break Detect Interrupt Enable"] - #[inline] - pub fn lbkdie(&self) -> LBKDIER { - LBKDIER::_from({ - const MASK: bool = true; - const OFFSET: u8 = 15; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 16 - Resynchronization Disable"] - #[inline] - pub fn resyncdis(&self) -> RESYNCDISR { - RESYNCDISR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 16; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 17 - Both Edge Sampling"] - #[inline] - pub fn bothedge(&self) -> BOTHEDGER { - BOTHEDGER::_from({ - const MASK: bool = true; - const OFFSET: u8 = 17; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bits 18:19 - Match Configuration"] - #[inline] - pub fn matcfg(&self) -> MATCFGR { - MATCFGR::_from({ - const MASK: u8 = 3; - const OFFSET: u8 = 18; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }) - } - #[doc = "Bit 20 - Receiver Idle DMA Enable"] - #[inline] - pub fn ridmae(&self) -> RIDMAER { - RIDMAER::_from({ - const MASK: bool = true; - const OFFSET: u8 = 20; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 21 - Receiver Full DMA Enable"] - #[inline] - pub fn rdmae(&self) -> RDMAER { - RDMAER::_from({ - const MASK: bool = true; - const OFFSET: u8 = 21; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 23 - Transmitter DMA Enable"] - #[inline] - pub fn tdmae(&self) -> TDMAER { - TDMAER::_from({ - const MASK: bool = true; - const OFFSET: u8 = 23; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bits 24:28 - Oversampling Ratio"] - #[inline] - pub fn osr(&self) -> OSRR { - OSRR::_from({ - const MASK: u8 = 31; - const OFFSET: u8 = 24; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }) - } - #[doc = "Bit 29 - 10-bit Mode select"] - #[inline] - pub fn m10(&self) -> M10R { - M10R::_from({ - const MASK: bool = true; - const OFFSET: u8 = 29; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 30 - Match Address Mode Enable 2"] - #[inline] - pub fn maen2(&self) -> MAEN2R { - MAEN2R::_from({ - const MASK: bool = true; - const OFFSET: u8 = 30; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 31 - Match Address Mode Enable 1"] - #[inline] - pub fn maen1(&self) -> MAEN1R { - MAEN1R::_from({ - const MASK: bool = true; - const OFFSET: u8 = 31; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 251658244 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bits 0:12 - Baud Rate Modulo Divisor."] - #[inline] - pub fn sbr(&mut self) -> _SBRW { - _SBRW { w: self } - } - #[doc = "Bit 13 - Stop Bit Number Select"] - #[inline] - pub fn sbns(&mut self) -> _SBNSW { - _SBNSW { w: self } - } - #[doc = "Bit 14 - RX Input Active Edge Interrupt Enable"] - #[inline] - pub fn rxedgie(&mut self) -> _RXEDGIEW { - _RXEDGIEW { w: self } - } - #[doc = "Bit 15 - LIN Break Detect Interrupt Enable"] - #[inline] - pub fn lbkdie(&mut self) -> _LBKDIEW { - _LBKDIEW { w: self } - } - #[doc = "Bit 16 - Resynchronization Disable"] - #[inline] - pub fn resyncdis(&mut self) -> _RESYNCDISW { - _RESYNCDISW { w: self } - } - #[doc = "Bit 17 - Both Edge Sampling"] - #[inline] - pub fn bothedge(&mut self) -> _BOTHEDGEW { - _BOTHEDGEW { w: self } - } - #[doc = "Bits 18:19 - Match Configuration"] - #[inline] - pub fn matcfg(&mut self) -> _MATCFGW { - _MATCFGW { w: self } - } - #[doc = "Bit 20 - Receiver Idle DMA Enable"] - #[inline] - pub fn ridmae(&mut self) -> _RIDMAEW { - _RIDMAEW { w: self } - } - #[doc = "Bit 21 - Receiver Full DMA Enable"] - #[inline] - pub fn rdmae(&mut self) -> _RDMAEW { - _RDMAEW { w: self } - } - #[doc = "Bit 23 - Transmitter DMA Enable"] - #[inline] - pub fn tdmae(&mut self) -> _TDMAEW { - _TDMAEW { w: self } - } - #[doc = "Bits 24:28 - Oversampling Ratio"] - #[inline] - pub fn osr(&mut self) -> _OSRW { - _OSRW { w: self } - } - #[doc = "Bit 29 - 10-bit Mode select"] - #[inline] - pub fn m10(&mut self) -> _M10W { - _M10W { w: self } - } - #[doc = "Bit 30 - Match Address Mode Enable 2"] - #[inline] - pub fn maen2(&mut self) -> _MAEN2W { - _MAEN2W { w: self } - } - #[doc = "Bit 31 - Match Address Mode Enable 1"] - #[inline] - pub fn maen1(&mut self) -> _MAEN1W { - _MAEN1W { w: self } - } -} diff --git a/src/lpuart2/ctrl/mod.rs b/src/lpuart2/ctrl/mod.rs deleted file mode 100644 index 30a6612..0000000 --- a/src/lpuart2/ctrl/mod.rs +++ /dev/null @@ -1,3251 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::CTRL { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = "Possible values of the field `PT`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum PTR { - #[doc = "Even parity."] _0, - #[doc = "Odd parity."] _1, -} -impl PTR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - PTR::_0 => false, - PTR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> PTR { - match value { - false => PTR::_0, - true => PTR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == PTR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == PTR::_1 - } -} -#[doc = "Possible values of the field `PE`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum PER { - #[doc = "No hardware parity generation or checking."] _0, - #[doc = "Parity enabled."] _1, -} -impl PER { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - PER::_0 => false, - PER::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> PER { - match value { - false => PER::_0, - true => PER::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == PER::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == PER::_1 - } -} -#[doc = "Possible values of the field `ILT`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum ILTR { - #[doc = "Idle character bit count starts after start bit."] _0, - #[doc = "Idle character bit count starts after stop bit."] _1, -} -impl ILTR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - ILTR::_0 => false, - ILTR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> ILTR { - match value { - false => ILTR::_0, - true => ILTR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == ILTR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == ILTR::_1 - } -} -#[doc = "Possible values of the field `WAKE`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum WAKER { - #[doc = "Configures RWU for idle-line wakeup."] _0, - #[doc = "Configures RWU with address-mark wakeup."] _1, -} -impl WAKER { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - WAKER::_0 => false, - WAKER::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> WAKER { - match value { - false => WAKER::_0, - true => WAKER::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == WAKER::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == WAKER::_1 - } -} -#[doc = "Possible values of the field `M`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum MR { - #[doc = "Receiver and transmitter use 8-bit data characters."] _0, - #[doc = "Receiver and transmitter use 9-bit data characters."] _1, -} -impl MR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - MR::_0 => false, - MR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> MR { - match value { - false => MR::_0, - true => MR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == MR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == MR::_1 - } -} -#[doc = "Possible values of the field `RSRC`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum RSRCR { - #[doc = "Provided LOOPS is set, RSRC is cleared, selects internal loop back mode and the LPUART does not use the RXD pin."] - _0, - #[doc = "Single-wire LPUART mode where the TXD pin is connected to the transmitter output and receiver input."] - _1, -} -impl RSRCR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - RSRCR::_0 => false, - RSRCR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> RSRCR { - match value { - false => RSRCR::_0, - true => RSRCR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == RSRCR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == RSRCR::_1 - } -} -#[doc = "Possible values of the field `DOZEEN`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum DOZEENR { - #[doc = "LPUART is enabled in Doze mode."] _0, - #[doc = "LPUART is disabled in Doze mode."] _1, -} -impl DOZEENR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - DOZEENR::_0 => false, - DOZEENR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> DOZEENR { - match value { - false => DOZEENR::_0, - true => DOZEENR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == DOZEENR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == DOZEENR::_1 - } -} -#[doc = "Possible values of the field `LOOPS`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum LOOPSR { - #[doc = "Normal operation - RXD and TXD use separate pins."] _0, - #[doc = "Loop mode or single-wire mode where transmitter outputs are internally connected to receiver input (see RSRC bit)."] - _1, -} -impl LOOPSR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - LOOPSR::_0 => false, - LOOPSR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> LOOPSR { - match value { - false => LOOPSR::_0, - true => LOOPSR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == LOOPSR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == LOOPSR::_1 - } -} -#[doc = "Possible values of the field `IDLECFG`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum IDLECFGR { - #[doc = "1 idle character"] _000, - #[doc = "2 idle characters"] _001, - #[doc = "4 idle characters"] _010, - #[doc = "8 idle characters"] _011, - #[doc = "16 idle characters"] _100, - #[doc = "32 idle characters"] _101, - #[doc = "64 idle characters"] _110, - #[doc = "128 idle characters"] _111, -} -impl IDLECFGR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - match *self { - IDLECFGR::_000 => 0, - IDLECFGR::_001 => 1, - IDLECFGR::_010 => 2, - IDLECFGR::_011 => 3, - IDLECFGR::_100 => 4, - IDLECFGR::_101 => 5, - IDLECFGR::_110 => 6, - IDLECFGR::_111 => 7, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: u8) -> IDLECFGR { - match value { - 0 => IDLECFGR::_000, - 1 => IDLECFGR::_001, - 2 => IDLECFGR::_010, - 3 => IDLECFGR::_011, - 4 => IDLECFGR::_100, - 5 => IDLECFGR::_101, - 6 => IDLECFGR::_110, - 7 => IDLECFGR::_111, - _ => unreachable!(), - } - } - #[doc = "Checks if the value of the field is `_000`"] - #[inline] - pub fn is_000(&self) -> bool { - *self == IDLECFGR::_000 - } - #[doc = "Checks if the value of the field is `_001`"] - #[inline] - pub fn is_001(&self) -> bool { - *self == IDLECFGR::_001 - } - #[doc = "Checks if the value of the field is `_010`"] - #[inline] - pub fn is_010(&self) -> bool { - *self == IDLECFGR::_010 - } - #[doc = "Checks if the value of the field is `_011`"] - #[inline] - pub fn is_011(&self) -> bool { - *self == IDLECFGR::_011 - } - #[doc = "Checks if the value of the field is `_100`"] - #[inline] - pub fn is_100(&self) -> bool { - *self == IDLECFGR::_100 - } - #[doc = "Checks if the value of the field is `_101`"] - #[inline] - pub fn is_101(&self) -> bool { - *self == IDLECFGR::_101 - } - #[doc = "Checks if the value of the field is `_110`"] - #[inline] - pub fn is_110(&self) -> bool { - *self == IDLECFGR::_110 - } - #[doc = "Checks if the value of the field is `_111`"] - #[inline] - pub fn is_111(&self) -> bool { - *self == IDLECFGR::_111 - } -} -#[doc = "Possible values of the field `M7`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum M7R { - #[doc = "Receiver and transmitter use 8-bit to 10-bit data characters."] _0, - #[doc = "Receiver and transmitter use 7-bit data characters."] _1, -} -impl M7R { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - M7R::_0 => false, - M7R::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> M7R { - match value { - false => M7R::_0, - true => M7R::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == M7R::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == M7R::_1 - } -} -#[doc = "Possible values of the field `MA2IE`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum MA2IER { - #[doc = "MA2F interrupt disabled"] _0, - #[doc = "MA2F interrupt enabled"] _1, -} -impl MA2IER { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - MA2IER::_0 => false, - MA2IER::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> MA2IER { - match value { - false => MA2IER::_0, - true => MA2IER::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == MA2IER::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == MA2IER::_1 - } -} -#[doc = "Possible values of the field `MA1IE`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum MA1IER { - #[doc = "MA1F interrupt disabled"] _0, - #[doc = "MA1F interrupt enabled"] _1, -} -impl MA1IER { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - MA1IER::_0 => false, - MA1IER::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> MA1IER { - match value { - false => MA1IER::_0, - true => MA1IER::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == MA1IER::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == MA1IER::_1 - } -} -#[doc = "Possible values of the field `SBK`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum SBKR { - #[doc = "Normal transmitter operation."] _0, - #[doc = "Queue break character(s) to be sent."] _1, -} -impl SBKR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - SBKR::_0 => false, - SBKR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> SBKR { - match value { - false => SBKR::_0, - true => SBKR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == SBKR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == SBKR::_1 - } -} -#[doc = "Possible values of the field `RWU`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum RWUR { - #[doc = "Normal receiver operation."] _0, - #[doc = "LPUART receiver in standby waiting for wakeup condition."] _1, -} -impl RWUR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - RWUR::_0 => false, - RWUR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> RWUR { - match value { - false => RWUR::_0, - true => RWUR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == RWUR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == RWUR::_1 - } -} -#[doc = "Possible values of the field `RE`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum RER { - #[doc = "Receiver disabled."] _0, - #[doc = "Receiver enabled."] _1, -} -impl RER { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - RER::_0 => false, - RER::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> RER { - match value { - false => RER::_0, - true => RER::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == RER::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == RER::_1 - } -} -#[doc = "Possible values of the field `TE`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum TER { - #[doc = "Transmitter disabled."] _0, - #[doc = "Transmitter enabled."] _1, -} -impl TER { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - TER::_0 => false, - TER::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> TER { - match value { - false => TER::_0, - true => TER::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == TER::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == TER::_1 - } -} -#[doc = "Possible values of the field `ILIE`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum ILIER { - #[doc = "Hardware interrupts from IDLE disabled; use polling."] _0, - #[doc = "Hardware interrupt requested when IDLE flag is 1."] _1, -} -impl ILIER { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - ILIER::_0 => false, - ILIER::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> ILIER { - match value { - false => ILIER::_0, - true => ILIER::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == ILIER::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == ILIER::_1 - } -} -#[doc = "Possible values of the field `RIE`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum RIER { - #[doc = "Hardware interrupts from RDRF disabled; use polling."] _0, - #[doc = "Hardware interrupt requested when RDRF flag is 1."] _1, -} -impl RIER { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - RIER::_0 => false, - RIER::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> RIER { - match value { - false => RIER::_0, - true => RIER::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == RIER::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == RIER::_1 - } -} -#[doc = "Possible values of the field `TCIE`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum TCIER { - #[doc = "Hardware interrupts from TC disabled; use polling."] _0, - #[doc = "Hardware interrupt requested when TC flag is 1."] _1, -} -impl TCIER { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - TCIER::_0 => false, - TCIER::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> TCIER { - match value { - false => TCIER::_0, - true => TCIER::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == TCIER::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == TCIER::_1 - } -} -#[doc = "Possible values of the field `TIE`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum TIER { - #[doc = "Hardware interrupts from TDRE disabled; use polling."] _0, - #[doc = "Hardware interrupt requested when TDRE flag is 1."] _1, -} -impl TIER { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - TIER::_0 => false, - TIER::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> TIER { - match value { - false => TIER::_0, - true => TIER::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == TIER::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == TIER::_1 - } -} -#[doc = "Possible values of the field `PEIE`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum PEIER { - #[doc = "PF interrupts disabled; use polling)."] _0, - #[doc = "Hardware interrupt requested when PF is set."] _1, -} -impl PEIER { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - PEIER::_0 => false, - PEIER::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> PEIER { - match value { - false => PEIER::_0, - true => PEIER::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == PEIER::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == PEIER::_1 - } -} -#[doc = "Possible values of the field `FEIE`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum FEIER { - #[doc = "FE interrupts disabled; use polling."] _0, - #[doc = "Hardware interrupt requested when FE is set."] _1, -} -impl FEIER { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - FEIER::_0 => false, - FEIER::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> FEIER { - match value { - false => FEIER::_0, - true => FEIER::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == FEIER::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == FEIER::_1 - } -} -#[doc = "Possible values of the field `NEIE`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum NEIER { - #[doc = "NF interrupts disabled; use polling."] _0, - #[doc = "Hardware interrupt requested when NF is set."] _1, -} -impl NEIER { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - NEIER::_0 => false, - NEIER::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> NEIER { - match value { - false => NEIER::_0, - true => NEIER::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == NEIER::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == NEIER::_1 - } -} -#[doc = "Possible values of the field `ORIE`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum ORIER { - #[doc = "OR interrupts disabled; use polling."] _0, - #[doc = "Hardware interrupt requested when OR is set."] _1, -} -impl ORIER { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - ORIER::_0 => false, - ORIER::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> ORIER { - match value { - false => ORIER::_0, - true => ORIER::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == ORIER::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == ORIER::_1 - } -} -#[doc = "Possible values of the field `TXINV`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum TXINVR { - #[doc = "Transmit data not inverted."] _0, - #[doc = "Transmit data inverted."] _1, -} -impl TXINVR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - TXINVR::_0 => false, - TXINVR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> TXINVR { - match value { - false => TXINVR::_0, - true => TXINVR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == TXINVR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == TXINVR::_1 - } -} -#[doc = "Possible values of the field `TXDIR`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum TXDIRR { - #[doc = "TXD pin is an input in single-wire mode."] _0, - #[doc = "TXD pin is an output in single-wire mode."] _1, -} -impl TXDIRR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - TXDIRR::_0 => false, - TXDIRR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> TXDIRR { - match value { - false => TXDIRR::_0, - true => TXDIRR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == TXDIRR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == TXDIRR::_1 - } -} -#[doc = r" Value of the field"] -pub struct R9T8R { - bits: bool, -} -impl R9T8R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - self.bits - } - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } -} -#[doc = r" Value of the field"] -pub struct R8T9R { - bits: bool, -} -impl R8T9R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - self.bits - } - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } -} -#[doc = "Values that can be written to the field `PT`"] -pub enum PTW { - #[doc = "Even parity."] _0, - #[doc = "Odd parity."] _1, -} -impl PTW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - PTW::_0 => false, - PTW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _PTW<'a> { - w: &'a mut W, -} -impl<'a> _PTW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: PTW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Even parity."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(PTW::_0) - } - #[doc = "Odd parity."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(PTW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 0; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `PE`"] -pub enum PEW { - #[doc = "No hardware parity generation or checking."] _0, - #[doc = "Parity enabled."] _1, -} -impl PEW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - PEW::_0 => false, - PEW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _PEW<'a> { - w: &'a mut W, -} -impl<'a> _PEW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: PEW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "No hardware parity generation or checking."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(PEW::_0) - } - #[doc = "Parity enabled."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(PEW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 1; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `ILT`"] -pub enum ILTW { - #[doc = "Idle character bit count starts after start bit."] _0, - #[doc = "Idle character bit count starts after stop bit."] _1, -} -impl ILTW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - ILTW::_0 => false, - ILTW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _ILTW<'a> { - w: &'a mut W, -} -impl<'a> _ILTW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: ILTW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Idle character bit count starts after start bit."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(ILTW::_0) - } - #[doc = "Idle character bit count starts after stop bit."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(ILTW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 2; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `WAKE`"] -pub enum WAKEW { - #[doc = "Configures RWU for idle-line wakeup."] _0, - #[doc = "Configures RWU with address-mark wakeup."] _1, -} -impl WAKEW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - WAKEW::_0 => false, - WAKEW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _WAKEW<'a> { - w: &'a mut W, -} -impl<'a> _WAKEW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: WAKEW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Configures RWU for idle-line wakeup."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(WAKEW::_0) - } - #[doc = "Configures RWU with address-mark wakeup."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(WAKEW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 3; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `M`"] -pub enum MW { - #[doc = "Receiver and transmitter use 8-bit data characters."] _0, - #[doc = "Receiver and transmitter use 9-bit data characters."] _1, -} -impl MW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - MW::_0 => false, - MW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _MW<'a> { - w: &'a mut W, -} -impl<'a> _MW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: MW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Receiver and transmitter use 8-bit data characters."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(MW::_0) - } - #[doc = "Receiver and transmitter use 9-bit data characters."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(MW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 4; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `RSRC`"] -pub enum RSRCW { - #[doc = "Provided LOOPS is set, RSRC is cleared, selects internal loop back mode and the LPUART does not use the RXD pin."] - _0, - #[doc = "Single-wire LPUART mode where the TXD pin is connected to the transmitter output and receiver input."] - _1, -} -impl RSRCW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - RSRCW::_0 => false, - RSRCW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _RSRCW<'a> { - w: &'a mut W, -} -impl<'a> _RSRCW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: RSRCW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Provided LOOPS is set, RSRC is cleared, selects internal loop back mode and the LPUART does not use the RXD pin."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(RSRCW::_0) - } - #[doc = "Single-wire LPUART mode where the TXD pin is connected to the transmitter output and receiver input."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(RSRCW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 5; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `DOZEEN`"] -pub enum DOZEENW { - #[doc = "LPUART is enabled in Doze mode."] _0, - #[doc = "LPUART is disabled in Doze mode."] _1, -} -impl DOZEENW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - DOZEENW::_0 => false, - DOZEENW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _DOZEENW<'a> { - w: &'a mut W, -} -impl<'a> _DOZEENW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: DOZEENW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "LPUART is enabled in Doze mode."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(DOZEENW::_0) - } - #[doc = "LPUART is disabled in Doze mode."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(DOZEENW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 6; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `LOOPS`"] -pub enum LOOPSW { - #[doc = "Normal operation - RXD and TXD use separate pins."] _0, - #[doc = "Loop mode or single-wire mode where transmitter outputs are internally connected to receiver input (see RSRC bit)."] - _1, -} -impl LOOPSW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - LOOPSW::_0 => false, - LOOPSW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _LOOPSW<'a> { - w: &'a mut W, -} -impl<'a> _LOOPSW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: LOOPSW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Normal operation - RXD and TXD use separate pins."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(LOOPSW::_0) - } - #[doc = "Loop mode or single-wire mode where transmitter outputs are internally connected to receiver input (see RSRC bit)."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(LOOPSW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 7; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `IDLECFG`"] -pub enum IDLECFGW { - #[doc = "1 idle character"] _000, - #[doc = "2 idle characters"] _001, - #[doc = "4 idle characters"] _010, - #[doc = "8 idle characters"] _011, - #[doc = "16 idle characters"] _100, - #[doc = "32 idle characters"] _101, - #[doc = "64 idle characters"] _110, - #[doc = "128 idle characters"] _111, -} -impl IDLECFGW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> u8 { - match *self { - IDLECFGW::_000 => 0, - IDLECFGW::_001 => 1, - IDLECFGW::_010 => 2, - IDLECFGW::_011 => 3, - IDLECFGW::_100 => 4, - IDLECFGW::_101 => 5, - IDLECFGW::_110 => 6, - IDLECFGW::_111 => 7, - } - } -} -#[doc = r" Proxy"] -pub struct _IDLECFGW<'a> { - w: &'a mut W, -} -impl<'a> _IDLECFGW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: IDLECFGW) -> &'a mut W { - { - self.bits(variant._bits()) - } - } - #[doc = "1 idle character"] - #[inline] - pub fn _000(self) -> &'a mut W { - self.variant(IDLECFGW::_000) - } - #[doc = "2 idle characters"] - #[inline] - pub fn _001(self) -> &'a mut W { - self.variant(IDLECFGW::_001) - } - #[doc = "4 idle characters"] - #[inline] - pub fn _010(self) -> &'a mut W { - self.variant(IDLECFGW::_010) - } - #[doc = "8 idle characters"] - #[inline] - pub fn _011(self) -> &'a mut W { - self.variant(IDLECFGW::_011) - } - #[doc = "16 idle characters"] - #[inline] - pub fn _100(self) -> &'a mut W { - self.variant(IDLECFGW::_100) - } - #[doc = "32 idle characters"] - #[inline] - pub fn _101(self) -> &'a mut W { - self.variant(IDLECFGW::_101) - } - #[doc = "64 idle characters"] - #[inline] - pub fn _110(self) -> &'a mut W { - self.variant(IDLECFGW::_110) - } - #[doc = "128 idle characters"] - #[inline] - pub fn _111(self) -> &'a mut W { - self.variant(IDLECFGW::_111) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 7; - const OFFSET: u8 = 8; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `M7`"] -pub enum M7W { - #[doc = "Receiver and transmitter use 8-bit to 10-bit data characters."] _0, - #[doc = "Receiver and transmitter use 7-bit data characters."] _1, -} -impl M7W { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - M7W::_0 => false, - M7W::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _M7W<'a> { - w: &'a mut W, -} -impl<'a> _M7W<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: M7W) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Receiver and transmitter use 8-bit to 10-bit data characters."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(M7W::_0) - } - #[doc = "Receiver and transmitter use 7-bit data characters."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(M7W::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 11; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `MA2IE`"] -pub enum MA2IEW { - #[doc = "MA2F interrupt disabled"] _0, - #[doc = "MA2F interrupt enabled"] _1, -} -impl MA2IEW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - MA2IEW::_0 => false, - MA2IEW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _MA2IEW<'a> { - w: &'a mut W, -} -impl<'a> _MA2IEW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: MA2IEW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "MA2F interrupt disabled"] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(MA2IEW::_0) - } - #[doc = "MA2F interrupt enabled"] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(MA2IEW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 14; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `MA1IE`"] -pub enum MA1IEW { - #[doc = "MA1F interrupt disabled"] _0, - #[doc = "MA1F interrupt enabled"] _1, -} -impl MA1IEW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - MA1IEW::_0 => false, - MA1IEW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _MA1IEW<'a> { - w: &'a mut W, -} -impl<'a> _MA1IEW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: MA1IEW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "MA1F interrupt disabled"] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(MA1IEW::_0) - } - #[doc = "MA1F interrupt enabled"] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(MA1IEW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 15; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `SBK`"] -pub enum SBKW { - #[doc = "Normal transmitter operation."] _0, - #[doc = "Queue break character(s) to be sent."] _1, -} -impl SBKW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - SBKW::_0 => false, - SBKW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _SBKW<'a> { - w: &'a mut W, -} -impl<'a> _SBKW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: SBKW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Normal transmitter operation."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(SBKW::_0) - } - #[doc = "Queue break character(s) to be sent."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(SBKW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 16; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `RWU`"] -pub enum RWUW { - #[doc = "Normal receiver operation."] _0, - #[doc = "LPUART receiver in standby waiting for wakeup condition."] _1, -} -impl RWUW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - RWUW::_0 => false, - RWUW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _RWUW<'a> { - w: &'a mut W, -} -impl<'a> _RWUW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: RWUW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Normal receiver operation."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(RWUW::_0) - } - #[doc = "LPUART receiver in standby waiting for wakeup condition."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(RWUW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 17; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `RE`"] -pub enum REW { - #[doc = "Receiver disabled."] _0, - #[doc = "Receiver enabled."] _1, -} -impl REW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - REW::_0 => false, - REW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _REW<'a> { - w: &'a mut W, -} -impl<'a> _REW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: REW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Receiver disabled."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(REW::_0) - } - #[doc = "Receiver enabled."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(REW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 18; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `TE`"] -pub enum TEW { - #[doc = "Transmitter disabled."] _0, - #[doc = "Transmitter enabled."] _1, -} -impl TEW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - TEW::_0 => false, - TEW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _TEW<'a> { - w: &'a mut W, -} -impl<'a> _TEW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: TEW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Transmitter disabled."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(TEW::_0) - } - #[doc = "Transmitter enabled."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(TEW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 19; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `ILIE`"] -pub enum ILIEW { - #[doc = "Hardware interrupts from IDLE disabled; use polling."] _0, - #[doc = "Hardware interrupt requested when IDLE flag is 1."] _1, -} -impl ILIEW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - ILIEW::_0 => false, - ILIEW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _ILIEW<'a> { - w: &'a mut W, -} -impl<'a> _ILIEW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: ILIEW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Hardware interrupts from IDLE disabled; use polling."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(ILIEW::_0) - } - #[doc = "Hardware interrupt requested when IDLE flag is 1."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(ILIEW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 20; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `RIE`"] -pub enum RIEW { - #[doc = "Hardware interrupts from RDRF disabled; use polling."] _0, - #[doc = "Hardware interrupt requested when RDRF flag is 1."] _1, -} -impl RIEW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - RIEW::_0 => false, - RIEW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _RIEW<'a> { - w: &'a mut W, -} -impl<'a> _RIEW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: RIEW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Hardware interrupts from RDRF disabled; use polling."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(RIEW::_0) - } - #[doc = "Hardware interrupt requested when RDRF flag is 1."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(RIEW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 21; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `TCIE`"] -pub enum TCIEW { - #[doc = "Hardware interrupts from TC disabled; use polling."] _0, - #[doc = "Hardware interrupt requested when TC flag is 1."] _1, -} -impl TCIEW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - TCIEW::_0 => false, - TCIEW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _TCIEW<'a> { - w: &'a mut W, -} -impl<'a> _TCIEW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: TCIEW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Hardware interrupts from TC disabled; use polling."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(TCIEW::_0) - } - #[doc = "Hardware interrupt requested when TC flag is 1."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(TCIEW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 22; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `TIE`"] -pub enum TIEW { - #[doc = "Hardware interrupts from TDRE disabled; use polling."] _0, - #[doc = "Hardware interrupt requested when TDRE flag is 1."] _1, -} -impl TIEW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - TIEW::_0 => false, - TIEW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _TIEW<'a> { - w: &'a mut W, -} -impl<'a> _TIEW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: TIEW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Hardware interrupts from TDRE disabled; use polling."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(TIEW::_0) - } - #[doc = "Hardware interrupt requested when TDRE flag is 1."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(TIEW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 23; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `PEIE`"] -pub enum PEIEW { - #[doc = "PF interrupts disabled; use polling)."] _0, - #[doc = "Hardware interrupt requested when PF is set."] _1, -} -impl PEIEW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - PEIEW::_0 => false, - PEIEW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _PEIEW<'a> { - w: &'a mut W, -} -impl<'a> _PEIEW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: PEIEW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "PF interrupts disabled; use polling)."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(PEIEW::_0) - } - #[doc = "Hardware interrupt requested when PF is set."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(PEIEW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 24; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `FEIE`"] -pub enum FEIEW { - #[doc = "FE interrupts disabled; use polling."] _0, - #[doc = "Hardware interrupt requested when FE is set."] _1, -} -impl FEIEW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - FEIEW::_0 => false, - FEIEW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _FEIEW<'a> { - w: &'a mut W, -} -impl<'a> _FEIEW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: FEIEW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "FE interrupts disabled; use polling."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(FEIEW::_0) - } - #[doc = "Hardware interrupt requested when FE is set."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(FEIEW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 25; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `NEIE`"] -pub enum NEIEW { - #[doc = "NF interrupts disabled; use polling."] _0, - #[doc = "Hardware interrupt requested when NF is set."] _1, -} -impl NEIEW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - NEIEW::_0 => false, - NEIEW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _NEIEW<'a> { - w: &'a mut W, -} -impl<'a> _NEIEW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: NEIEW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "NF interrupts disabled; use polling."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(NEIEW::_0) - } - #[doc = "Hardware interrupt requested when NF is set."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(NEIEW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 26; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `ORIE`"] -pub enum ORIEW { - #[doc = "OR interrupts disabled; use polling."] _0, - #[doc = "Hardware interrupt requested when OR is set."] _1, -} -impl ORIEW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - ORIEW::_0 => false, - ORIEW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _ORIEW<'a> { - w: &'a mut W, -} -impl<'a> _ORIEW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: ORIEW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "OR interrupts disabled; use polling."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(ORIEW::_0) - } - #[doc = "Hardware interrupt requested when OR is set."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(ORIEW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 27; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `TXINV`"] -pub enum TXINVW { - #[doc = "Transmit data not inverted."] _0, - #[doc = "Transmit data inverted."] _1, -} -impl TXINVW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - TXINVW::_0 => false, - TXINVW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _TXINVW<'a> { - w: &'a mut W, -} -impl<'a> _TXINVW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: TXINVW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Transmit data not inverted."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(TXINVW::_0) - } - #[doc = "Transmit data inverted."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(TXINVW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 28; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `TXDIR`"] -pub enum TXDIRW { - #[doc = "TXD pin is an input in single-wire mode."] _0, - #[doc = "TXD pin is an output in single-wire mode."] _1, -} -impl TXDIRW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - TXDIRW::_0 => false, - TXDIRW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _TXDIRW<'a> { - w: &'a mut W, -} -impl<'a> _TXDIRW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: TXDIRW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "TXD pin is an input in single-wire mode."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(TXDIRW::_0) - } - #[doc = "TXD pin is an output in single-wire mode."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(TXDIRW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 29; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = r" Proxy"] -pub struct _R9T8W<'a> { - w: &'a mut W, -} -impl<'a> _R9T8W<'a> { - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 30; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = r" Proxy"] -pub struct _R8T9W<'a> { - w: &'a mut W, -} -impl<'a> _R8T9W<'a> { - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 31; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bit 0 - Parity Type"] - #[inline] - pub fn pt(&self) -> PTR { - PTR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 1 - Parity Enable"] - #[inline] - pub fn pe(&self) -> PER { - PER::_from({ - const MASK: bool = true; - const OFFSET: u8 = 1; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 2 - Idle Line Type Select"] - #[inline] - pub fn ilt(&self) -> ILTR { - ILTR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 2; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 3 - Receiver Wakeup Method Select"] - #[inline] - pub fn wake(&self) -> WAKER { - WAKER::_from({ - const MASK: bool = true; - const OFFSET: u8 = 3; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 4 - 9-Bit or 8-Bit Mode Select"] - #[inline] - pub fn m(&self) -> MR { - MR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 4; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 5 - Receiver Source Select"] - #[inline] - pub fn rsrc(&self) -> RSRCR { - RSRCR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 5; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 6 - Doze Enable"] - #[inline] - pub fn dozeen(&self) -> DOZEENR { - DOZEENR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 6; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 7 - Loop Mode Select"] - #[inline] - pub fn loops(&self) -> LOOPSR { - LOOPSR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 7; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bits 8:10 - Idle Configuration"] - #[inline] - pub fn idlecfg(&self) -> IDLECFGR { - IDLECFGR::_from({ - const MASK: u8 = 7; - const OFFSET: u8 = 8; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }) - } - #[doc = "Bit 11 - 7-Bit Mode Select"] - #[inline] - pub fn m7(&self) -> M7R { - M7R::_from({ - const MASK: bool = true; - const OFFSET: u8 = 11; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 14 - Match 2 Interrupt Enable"] - #[inline] - pub fn ma2ie(&self) -> MA2IER { - MA2IER::_from({ - const MASK: bool = true; - const OFFSET: u8 = 14; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 15 - Match 1 Interrupt Enable"] - #[inline] - pub fn ma1ie(&self) -> MA1IER { - MA1IER::_from({ - const MASK: bool = true; - const OFFSET: u8 = 15; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 16 - Send Break"] - #[inline] - pub fn sbk(&self) -> SBKR { - SBKR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 16; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 17 - Receiver Wakeup Control"] - #[inline] - pub fn rwu(&self) -> RWUR { - RWUR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 17; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 18 - Receiver Enable"] - #[inline] - pub fn re(&self) -> RER { - RER::_from({ - const MASK: bool = true; - const OFFSET: u8 = 18; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 19 - Transmitter Enable"] - #[inline] - pub fn te(&self) -> TER { - TER::_from({ - const MASK: bool = true; - const OFFSET: u8 = 19; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 20 - Idle Line Interrupt Enable"] - #[inline] - pub fn ilie(&self) -> ILIER { - ILIER::_from({ - const MASK: bool = true; - const OFFSET: u8 = 20; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 21 - Receiver Interrupt Enable"] - #[inline] - pub fn rie(&self) -> RIER { - RIER::_from({ - const MASK: bool = true; - const OFFSET: u8 = 21; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 22 - Transmission Complete Interrupt Enable for"] - #[inline] - pub fn tcie(&self) -> TCIER { - TCIER::_from({ - const MASK: bool = true; - const OFFSET: u8 = 22; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 23 - Transmit Interrupt Enable"] - #[inline] - pub fn tie(&self) -> TIER { - TIER::_from({ - const MASK: bool = true; - const OFFSET: u8 = 23; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 24 - Parity Error Interrupt Enable"] - #[inline] - pub fn peie(&self) -> PEIER { - PEIER::_from({ - const MASK: bool = true; - const OFFSET: u8 = 24; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 25 - Framing Error Interrupt Enable"] - #[inline] - pub fn feie(&self) -> FEIER { - FEIER::_from({ - const MASK: bool = true; - const OFFSET: u8 = 25; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 26 - Noise Error Interrupt Enable"] - #[inline] - pub fn neie(&self) -> NEIER { - NEIER::_from({ - const MASK: bool = true; - const OFFSET: u8 = 26; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 27 - Overrun Interrupt Enable"] - #[inline] - pub fn orie(&self) -> ORIER { - ORIER::_from({ - const MASK: bool = true; - const OFFSET: u8 = 27; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 28 - Transmit Data Inversion"] - #[inline] - pub fn txinv(&self) -> TXINVR { - TXINVR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 28; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 29 - TXD Pin Direction in Single-Wire Mode"] - #[inline] - pub fn txdir(&self) -> TXDIRR { - TXDIRR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 29; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 30 - Receive Bit 9 / Transmit Bit 8"] - #[inline] - pub fn r9t8(&self) -> R9T8R { - let bits = { - const MASK: bool = true; - const OFFSET: u8 = 30; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }; - R9T8R { bits } - } - #[doc = "Bit 31 - Receive Bit 8 / Transmit Bit 9"] - #[inline] - pub fn r8t9(&self) -> R8T9R { - let bits = { - const MASK: bool = true; - const OFFSET: u8 = 31; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }; - R8T9R { bits } - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 0 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bit 0 - Parity Type"] - #[inline] - pub fn pt(&mut self) -> _PTW { - _PTW { w: self } - } - #[doc = "Bit 1 - Parity Enable"] - #[inline] - pub fn pe(&mut self) -> _PEW { - _PEW { w: self } - } - #[doc = "Bit 2 - Idle Line Type Select"] - #[inline] - pub fn ilt(&mut self) -> _ILTW { - _ILTW { w: self } - } - #[doc = "Bit 3 - Receiver Wakeup Method Select"] - #[inline] - pub fn wake(&mut self) -> _WAKEW { - _WAKEW { w: self } - } - #[doc = "Bit 4 - 9-Bit or 8-Bit Mode Select"] - #[inline] - pub fn m(&mut self) -> _MW { - _MW { w: self } - } - #[doc = "Bit 5 - Receiver Source Select"] - #[inline] - pub fn rsrc(&mut self) -> _RSRCW { - _RSRCW { w: self } - } - #[doc = "Bit 6 - Doze Enable"] - #[inline] - pub fn dozeen(&mut self) -> _DOZEENW { - _DOZEENW { w: self } - } - #[doc = "Bit 7 - Loop Mode Select"] - #[inline] - pub fn loops(&mut self) -> _LOOPSW { - _LOOPSW { w: self } - } - #[doc = "Bits 8:10 - Idle Configuration"] - #[inline] - pub fn idlecfg(&mut self) -> _IDLECFGW { - _IDLECFGW { w: self } - } - #[doc = "Bit 11 - 7-Bit Mode Select"] - #[inline] - pub fn m7(&mut self) -> _M7W { - _M7W { w: self } - } - #[doc = "Bit 14 - Match 2 Interrupt Enable"] - #[inline] - pub fn ma2ie(&mut self) -> _MA2IEW { - _MA2IEW { w: self } - } - #[doc = "Bit 15 - Match 1 Interrupt Enable"] - #[inline] - pub fn ma1ie(&mut self) -> _MA1IEW { - _MA1IEW { w: self } - } - #[doc = "Bit 16 - Send Break"] - #[inline] - pub fn sbk(&mut self) -> _SBKW { - _SBKW { w: self } - } - #[doc = "Bit 17 - Receiver Wakeup Control"] - #[inline] - pub fn rwu(&mut self) -> _RWUW { - _RWUW { w: self } - } - #[doc = "Bit 18 - Receiver Enable"] - #[inline] - pub fn re(&mut self) -> _REW { - _REW { w: self } - } - #[doc = "Bit 19 - Transmitter Enable"] - #[inline] - pub fn te(&mut self) -> _TEW { - _TEW { w: self } - } - #[doc = "Bit 20 - Idle Line Interrupt Enable"] - #[inline] - pub fn ilie(&mut self) -> _ILIEW { - _ILIEW { w: self } - } - #[doc = "Bit 21 - Receiver Interrupt Enable"] - #[inline] - pub fn rie(&mut self) -> _RIEW { - _RIEW { w: self } - } - #[doc = "Bit 22 - Transmission Complete Interrupt Enable for"] - #[inline] - pub fn tcie(&mut self) -> _TCIEW { - _TCIEW { w: self } - } - #[doc = "Bit 23 - Transmit Interrupt Enable"] - #[inline] - pub fn tie(&mut self) -> _TIEW { - _TIEW { w: self } - } - #[doc = "Bit 24 - Parity Error Interrupt Enable"] - #[inline] - pub fn peie(&mut self) -> _PEIEW { - _PEIEW { w: self } - } - #[doc = "Bit 25 - Framing Error Interrupt Enable"] - #[inline] - pub fn feie(&mut self) -> _FEIEW { - _FEIEW { w: self } - } - #[doc = "Bit 26 - Noise Error Interrupt Enable"] - #[inline] - pub fn neie(&mut self) -> _NEIEW { - _NEIEW { w: self } - } - #[doc = "Bit 27 - Overrun Interrupt Enable"] - #[inline] - pub fn orie(&mut self) -> _ORIEW { - _ORIEW { w: self } - } - #[doc = "Bit 28 - Transmit Data Inversion"] - #[inline] - pub fn txinv(&mut self) -> _TXINVW { - _TXINVW { w: self } - } - #[doc = "Bit 29 - TXD Pin Direction in Single-Wire Mode"] - #[inline] - pub fn txdir(&mut self) -> _TXDIRW { - _TXDIRW { w: self } - } - #[doc = "Bit 30 - Receive Bit 9 / Transmit Bit 8"] - #[inline] - pub fn r9t8(&mut self) -> _R9T8W { - _R9T8W { w: self } - } - #[doc = "Bit 31 - Receive Bit 8 / Transmit Bit 9"] - #[inline] - pub fn r8t9(&mut self) -> _R8T9W { - _R8T9W { w: self } - } -} diff --git a/src/lpuart2/data/mod.rs b/src/lpuart2/data/mod.rs deleted file mode 100644 index bf5d575..0000000 --- a/src/lpuart2/data/mod.rs +++ /dev/null @@ -1,989 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::DATA { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = r" Value of the field"] -pub struct R0T0R { - bits: bool, -} -impl R0T0R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - self.bits - } - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } -} -#[doc = r" Value of the field"] -pub struct R1T1R { - bits: bool, -} -impl R1T1R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - self.bits - } - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } -} -#[doc = r" Value of the field"] -pub struct R2T2R { - bits: bool, -} -impl R2T2R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - self.bits - } - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } -} -#[doc = r" Value of the field"] -pub struct R3T3R { - bits: bool, -} -impl R3T3R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - self.bits - } - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } -} -#[doc = r" Value of the field"] -pub struct R4T4R { - bits: bool, -} -impl R4T4R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - self.bits - } - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } -} -#[doc = r" Value of the field"] -pub struct R5T5R { - bits: bool, -} -impl R5T5R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - self.bits - } - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } -} -#[doc = r" Value of the field"] -pub struct R6T6R { - bits: bool, -} -impl R6T6R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - self.bits - } - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } -} -#[doc = r" Value of the field"] -pub struct R7T7R { - bits: bool, -} -impl R7T7R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - self.bits - } - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } -} -#[doc = r" Value of the field"] -pub struct R8T8R { - bits: bool, -} -impl R8T8R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - self.bits - } - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } -} -#[doc = r" Value of the field"] -pub struct R9T9R { - bits: bool, -} -impl R9T9R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - self.bits - } - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } -} -#[doc = "Possible values of the field `IDLINE`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum IDLINER { - #[doc = "Receiver was not idle before receiving this character."] _0, - #[doc = "Receiver was idle before receiving this character."] _1, -} -impl IDLINER { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - IDLINER::_0 => false, - IDLINER::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> IDLINER { - match value { - false => IDLINER::_0, - true => IDLINER::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == IDLINER::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == IDLINER::_1 - } -} -#[doc = "Possible values of the field `RXEMPT`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum RXEMPTR { - #[doc = "Receive buffer contains valid data."] _0, - #[doc = "Receive buffer is empty, data returned on read is not valid."] _1, -} -impl RXEMPTR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - RXEMPTR::_0 => false, - RXEMPTR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> RXEMPTR { - match value { - false => RXEMPTR::_0, - true => RXEMPTR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == RXEMPTR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == RXEMPTR::_1 - } -} -#[doc = "Possible values of the field `FRETSC`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum FRETSCR { - #[doc = "The dataword was received without a frame error on read, or transmit a normal character on write."] - _0, - #[doc = "The dataword was received with a frame error, or transmit an idle or break character on transmit."] - _1, -} -impl FRETSCR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - FRETSCR::_0 => false, - FRETSCR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> FRETSCR { - match value { - false => FRETSCR::_0, - true => FRETSCR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == FRETSCR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == FRETSCR::_1 - } -} -#[doc = "Possible values of the field `PARITYE`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum PARITYER { - #[doc = "The dataword was received without a parity error."] _0, - #[doc = "The dataword was received with a parity error."] _1, -} -impl PARITYER { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - PARITYER::_0 => false, - PARITYER::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> PARITYER { - match value { - false => PARITYER::_0, - true => PARITYER::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == PARITYER::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == PARITYER::_1 - } -} -#[doc = "Possible values of the field `NOISY`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum NOISYR { - #[doc = "The dataword was received without noise."] _0, - #[doc = "The data was received with noise."] _1, -} -impl NOISYR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - NOISYR::_0 => false, - NOISYR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> NOISYR { - match value { - false => NOISYR::_0, - true => NOISYR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == NOISYR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == NOISYR::_1 - } -} -#[doc = r" Proxy"] -pub struct _R0T0W<'a> { - w: &'a mut W, -} -impl<'a> _R0T0W<'a> { - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 0; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = r" Proxy"] -pub struct _R1T1W<'a> { - w: &'a mut W, -} -impl<'a> _R1T1W<'a> { - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 1; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = r" Proxy"] -pub struct _R2T2W<'a> { - w: &'a mut W, -} -impl<'a> _R2T2W<'a> { - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 2; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = r" Proxy"] -pub struct _R3T3W<'a> { - w: &'a mut W, -} -impl<'a> _R3T3W<'a> { - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 3; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = r" Proxy"] -pub struct _R4T4W<'a> { - w: &'a mut W, -} -impl<'a> _R4T4W<'a> { - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 4; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = r" Proxy"] -pub struct _R5T5W<'a> { - w: &'a mut W, -} -impl<'a> _R5T5W<'a> { - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 5; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = r" Proxy"] -pub struct _R6T6W<'a> { - w: &'a mut W, -} -impl<'a> _R6T6W<'a> { - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 6; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = r" Proxy"] -pub struct _R7T7W<'a> { - w: &'a mut W, -} -impl<'a> _R7T7W<'a> { - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 7; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = r" Proxy"] -pub struct _R8T8W<'a> { - w: &'a mut W, -} -impl<'a> _R8T8W<'a> { - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 8; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = r" Proxy"] -pub struct _R9T9W<'a> { - w: &'a mut W, -} -impl<'a> _R9T9W<'a> { - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 9; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `FRETSC`"] -pub enum FRETSCW { - #[doc = "The dataword was received without a frame error on read, or transmit a normal character on write."] - _0, - #[doc = "The dataword was received with a frame error, or transmit an idle or break character on transmit."] - _1, -} -impl FRETSCW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - FRETSCW::_0 => false, - FRETSCW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _FRETSCW<'a> { - w: &'a mut W, -} -impl<'a> _FRETSCW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: FRETSCW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "The dataword was received without a frame error on read, or transmit a normal character on write."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(FRETSCW::_0) - } - #[doc = "The dataword was received with a frame error, or transmit an idle or break character on transmit."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(FRETSCW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 13; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bit 0 - R0T0"] - #[inline] - pub fn r0t0(&self) -> R0T0R { - let bits = { - const MASK: bool = true; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }; - R0T0R { bits } - } - #[doc = "Bit 1 - R1T1"] - #[inline] - pub fn r1t1(&self) -> R1T1R { - let bits = { - const MASK: bool = true; - const OFFSET: u8 = 1; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }; - R1T1R { bits } - } - #[doc = "Bit 2 - R2T2"] - #[inline] - pub fn r2t2(&self) -> R2T2R { - let bits = { - const MASK: bool = true; - const OFFSET: u8 = 2; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }; - R2T2R { bits } - } - #[doc = "Bit 3 - R3T3"] - #[inline] - pub fn r3t3(&self) -> R3T3R { - let bits = { - const MASK: bool = true; - const OFFSET: u8 = 3; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }; - R3T3R { bits } - } - #[doc = "Bit 4 - R4T4"] - #[inline] - pub fn r4t4(&self) -> R4T4R { - let bits = { - const MASK: bool = true; - const OFFSET: u8 = 4; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }; - R4T4R { bits } - } - #[doc = "Bit 5 - R5T5"] - #[inline] - pub fn r5t5(&self) -> R5T5R { - let bits = { - const MASK: bool = true; - const OFFSET: u8 = 5; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }; - R5T5R { bits } - } - #[doc = "Bit 6 - R6T6"] - #[inline] - pub fn r6t6(&self) -> R6T6R { - let bits = { - const MASK: bool = true; - const OFFSET: u8 = 6; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }; - R6T6R { bits } - } - #[doc = "Bit 7 - R7T7"] - #[inline] - pub fn r7t7(&self) -> R7T7R { - let bits = { - const MASK: bool = true; - const OFFSET: u8 = 7; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }; - R7T7R { bits } - } - #[doc = "Bit 8 - R8T8"] - #[inline] - pub fn r8t8(&self) -> R8T8R { - let bits = { - const MASK: bool = true; - const OFFSET: u8 = 8; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }; - R8T8R { bits } - } - #[doc = "Bit 9 - R9T9"] - #[inline] - pub fn r9t9(&self) -> R9T9R { - let bits = { - const MASK: bool = true; - const OFFSET: u8 = 9; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }; - R9T9R { bits } - } - #[doc = "Bit 11 - Idle Line"] - #[inline] - pub fn idline(&self) -> IDLINER { - IDLINER::_from({ - const MASK: bool = true; - const OFFSET: u8 = 11; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 12 - Receive Buffer Empty"] - #[inline] - pub fn rxempt(&self) -> RXEMPTR { - RXEMPTR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 12; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 13 - Frame Error / Transmit Special Character"] - #[inline] - pub fn fretsc(&self) -> FRETSCR { - FRETSCR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 13; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 14 - PARITYE"] - #[inline] - pub fn paritye(&self) -> PARITYER { - PARITYER::_from({ - const MASK: bool = true; - const OFFSET: u8 = 14; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 15 - NOISY"] - #[inline] - pub fn noisy(&self) -> NOISYR { - NOISYR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 15; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 4096 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bit 0 - R0T0"] - #[inline] - pub fn r0t0(&mut self) -> _R0T0W { - _R0T0W { w: self } - } - #[doc = "Bit 1 - R1T1"] - #[inline] - pub fn r1t1(&mut self) -> _R1T1W { - _R1T1W { w: self } - } - #[doc = "Bit 2 - R2T2"] - #[inline] - pub fn r2t2(&mut self) -> _R2T2W { - _R2T2W { w: self } - } - #[doc = "Bit 3 - R3T3"] - #[inline] - pub fn r3t3(&mut self) -> _R3T3W { - _R3T3W { w: self } - } - #[doc = "Bit 4 - R4T4"] - #[inline] - pub fn r4t4(&mut self) -> _R4T4W { - _R4T4W { w: self } - } - #[doc = "Bit 5 - R5T5"] - #[inline] - pub fn r5t5(&mut self) -> _R5T5W { - _R5T5W { w: self } - } - #[doc = "Bit 6 - R6T6"] - #[inline] - pub fn r6t6(&mut self) -> _R6T6W { - _R6T6W { w: self } - } - #[doc = "Bit 7 - R7T7"] - #[inline] - pub fn r7t7(&mut self) -> _R7T7W { - _R7T7W { w: self } - } - #[doc = "Bit 8 - R8T8"] - #[inline] - pub fn r8t8(&mut self) -> _R8T8W { - _R8T8W { w: self } - } - #[doc = "Bit 9 - R9T9"] - #[inline] - pub fn r9t9(&mut self) -> _R9T9W { - _R9T9W { w: self } - } - #[doc = "Bit 13 - Frame Error / Transmit Special Character"] - #[inline] - pub fn fretsc(&mut self) -> _FRETSCW { - _FRETSCW { w: self } - } -} diff --git a/src/lpuart2/fifo/mod.rs b/src/lpuart2/fifo/mod.rs deleted file mode 100644 index 1ca8b00..0000000 --- a/src/lpuart2/fifo/mod.rs +++ /dev/null @@ -1,1376 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::FIFO { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = "Possible values of the field `RXFIFOSIZE`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum RXFIFOSIZER { - #[doc = "Receive FIFO/Buffer depth = 1 dataword."] _000, - #[doc = "Receive FIFO/Buffer depth = 4 datawords."] _001, - #[doc = "Receive FIFO/Buffer depth = 8 datawords."] _010, - #[doc = "Receive FIFO/Buffer depth = 16 datawords."] _011, - #[doc = "Receive FIFO/Buffer depth = 32 datawords."] _100, - #[doc = "Receive FIFO/Buffer depth = 64 datawords."] _101, - #[doc = "Receive FIFO/Buffer depth = 128 datawords."] _110, - #[doc = "Receive FIFO/Buffer depth = 256 datawords."] _111, -} -impl RXFIFOSIZER { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - match *self { - RXFIFOSIZER::_000 => 0, - RXFIFOSIZER::_001 => 1, - RXFIFOSIZER::_010 => 2, - RXFIFOSIZER::_011 => 3, - RXFIFOSIZER::_100 => 4, - RXFIFOSIZER::_101 => 5, - RXFIFOSIZER::_110 => 6, - RXFIFOSIZER::_111 => 7, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: u8) -> RXFIFOSIZER { - match value { - 0 => RXFIFOSIZER::_000, - 1 => RXFIFOSIZER::_001, - 2 => RXFIFOSIZER::_010, - 3 => RXFIFOSIZER::_011, - 4 => RXFIFOSIZER::_100, - 5 => RXFIFOSIZER::_101, - 6 => RXFIFOSIZER::_110, - 7 => RXFIFOSIZER::_111, - _ => unreachable!(), - } - } - #[doc = "Checks if the value of the field is `_000`"] - #[inline] - pub fn is_000(&self) -> bool { - *self == RXFIFOSIZER::_000 - } - #[doc = "Checks if the value of the field is `_001`"] - #[inline] - pub fn is_001(&self) -> bool { - *self == RXFIFOSIZER::_001 - } - #[doc = "Checks if the value of the field is `_010`"] - #[inline] - pub fn is_010(&self) -> bool { - *self == RXFIFOSIZER::_010 - } - #[doc = "Checks if the value of the field is `_011`"] - #[inline] - pub fn is_011(&self) -> bool { - *self == RXFIFOSIZER::_011 - } - #[doc = "Checks if the value of the field is `_100`"] - #[inline] - pub fn is_100(&self) -> bool { - *self == RXFIFOSIZER::_100 - } - #[doc = "Checks if the value of the field is `_101`"] - #[inline] - pub fn is_101(&self) -> bool { - *self == RXFIFOSIZER::_101 - } - #[doc = "Checks if the value of the field is `_110`"] - #[inline] - pub fn is_110(&self) -> bool { - *self == RXFIFOSIZER::_110 - } - #[doc = "Checks if the value of the field is `_111`"] - #[inline] - pub fn is_111(&self) -> bool { - *self == RXFIFOSIZER::_111 - } -} -#[doc = "Possible values of the field `RXFE`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum RXFER { - #[doc = "Receive FIFO is not enabled. Buffer is depth 1. (Legacy support)"] _0, - #[doc = "Receive FIFO is enabled. Buffer is depth indicted by RXFIFOSIZE."] _1, -} -impl RXFER { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - RXFER::_0 => false, - RXFER::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> RXFER { - match value { - false => RXFER::_0, - true => RXFER::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == RXFER::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == RXFER::_1 - } -} -#[doc = "Possible values of the field `TXFIFOSIZE`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum TXFIFOSIZER { - #[doc = "Transmit FIFO/Buffer depth = 1 dataword."] _000, - #[doc = "Transmit FIFO/Buffer depth = 4 datawords."] _001, - #[doc = "Transmit FIFO/Buffer depth = 8 datawords."] _010, - #[doc = "Transmit FIFO/Buffer depth = 16 datawords."] _011, - #[doc = "Transmit FIFO/Buffer depth = 32 datawords."] _100, - #[doc = "Transmit FIFO/Buffer depth = 64 datawords."] _101, - #[doc = "Transmit FIFO/Buffer depth = 128 datawords."] _110, - #[doc = "Transmit FIFO/Buffer depth = 256 datawords"] _111, -} -impl TXFIFOSIZER { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - match *self { - TXFIFOSIZER::_000 => 0, - TXFIFOSIZER::_001 => 1, - TXFIFOSIZER::_010 => 2, - TXFIFOSIZER::_011 => 3, - TXFIFOSIZER::_100 => 4, - TXFIFOSIZER::_101 => 5, - TXFIFOSIZER::_110 => 6, - TXFIFOSIZER::_111 => 7, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: u8) -> TXFIFOSIZER { - match value { - 0 => TXFIFOSIZER::_000, - 1 => TXFIFOSIZER::_001, - 2 => TXFIFOSIZER::_010, - 3 => TXFIFOSIZER::_011, - 4 => TXFIFOSIZER::_100, - 5 => TXFIFOSIZER::_101, - 6 => TXFIFOSIZER::_110, - 7 => TXFIFOSIZER::_111, - _ => unreachable!(), - } - } - #[doc = "Checks if the value of the field is `_000`"] - #[inline] - pub fn is_000(&self) -> bool { - *self == TXFIFOSIZER::_000 - } - #[doc = "Checks if the value of the field is `_001`"] - #[inline] - pub fn is_001(&self) -> bool { - *self == TXFIFOSIZER::_001 - } - #[doc = "Checks if the value of the field is `_010`"] - #[inline] - pub fn is_010(&self) -> bool { - *self == TXFIFOSIZER::_010 - } - #[doc = "Checks if the value of the field is `_011`"] - #[inline] - pub fn is_011(&self) -> bool { - *self == TXFIFOSIZER::_011 - } - #[doc = "Checks if the value of the field is `_100`"] - #[inline] - pub fn is_100(&self) -> bool { - *self == TXFIFOSIZER::_100 - } - #[doc = "Checks if the value of the field is `_101`"] - #[inline] - pub fn is_101(&self) -> bool { - *self == TXFIFOSIZER::_101 - } - #[doc = "Checks if the value of the field is `_110`"] - #[inline] - pub fn is_110(&self) -> bool { - *self == TXFIFOSIZER::_110 - } - #[doc = "Checks if the value of the field is `_111`"] - #[inline] - pub fn is_111(&self) -> bool { - *self == TXFIFOSIZER::_111 - } -} -#[doc = "Possible values of the field `TXFE`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum TXFER { - #[doc = "Transmit FIFO is not enabled. Buffer is depth 1. (Legacy support)."] _0, - #[doc = "Transmit FIFO is enabled. Buffer is depth indicated by TXFIFOSIZE."] _1, -} -impl TXFER { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - TXFER::_0 => false, - TXFER::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> TXFER { - match value { - false => TXFER::_0, - true => TXFER::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == TXFER::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == TXFER::_1 - } -} -#[doc = "Possible values of the field `RXUFE`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum RXUFER { - #[doc = "RXUF flag does not generate an interrupt to the host."] _0, - #[doc = "RXUF flag generates an interrupt to the host."] _1, -} -impl RXUFER { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - RXUFER::_0 => false, - RXUFER::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> RXUFER { - match value { - false => RXUFER::_0, - true => RXUFER::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == RXUFER::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == RXUFER::_1 - } -} -#[doc = "Possible values of the field `TXOFE`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum TXOFER { - #[doc = "TXOF flag does not generate an interrupt to the host."] _0, - #[doc = "TXOF flag generates an interrupt to the host."] _1, -} -impl TXOFER { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - TXOFER::_0 => false, - TXOFER::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> TXOFER { - match value { - false => TXOFER::_0, - true => TXOFER::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == TXOFER::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == TXOFER::_1 - } -} -#[doc = "Possible values of the field `RXIDEN`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum RXIDENR { - #[doc = "Disable RDRF assertion due to partially filled FIFO when receiver is idle."] _000, - #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 1 character."] - _001, - #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 2 characters."] - _010, - #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 4 characters."] - _011, - #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 8 characters."] - _100, - #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 16 characters."] - _101, - #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 32 characters."] - _110, - #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 64 characters."] - _111, -} -impl RXIDENR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - match *self { - RXIDENR::_000 => 0, - RXIDENR::_001 => 1, - RXIDENR::_010 => 2, - RXIDENR::_011 => 3, - RXIDENR::_100 => 4, - RXIDENR::_101 => 5, - RXIDENR::_110 => 6, - RXIDENR::_111 => 7, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: u8) -> RXIDENR { - match value { - 0 => RXIDENR::_000, - 1 => RXIDENR::_001, - 2 => RXIDENR::_010, - 3 => RXIDENR::_011, - 4 => RXIDENR::_100, - 5 => RXIDENR::_101, - 6 => RXIDENR::_110, - 7 => RXIDENR::_111, - _ => unreachable!(), - } - } - #[doc = "Checks if the value of the field is `_000`"] - #[inline] - pub fn is_000(&self) -> bool { - *self == RXIDENR::_000 - } - #[doc = "Checks if the value of the field is `_001`"] - #[inline] - pub fn is_001(&self) -> bool { - *self == RXIDENR::_001 - } - #[doc = "Checks if the value of the field is `_010`"] - #[inline] - pub fn is_010(&self) -> bool { - *self == RXIDENR::_010 - } - #[doc = "Checks if the value of the field is `_011`"] - #[inline] - pub fn is_011(&self) -> bool { - *self == RXIDENR::_011 - } - #[doc = "Checks if the value of the field is `_100`"] - #[inline] - pub fn is_100(&self) -> bool { - *self == RXIDENR::_100 - } - #[doc = "Checks if the value of the field is `_101`"] - #[inline] - pub fn is_101(&self) -> bool { - *self == RXIDENR::_101 - } - #[doc = "Checks if the value of the field is `_110`"] - #[inline] - pub fn is_110(&self) -> bool { - *self == RXIDENR::_110 - } - #[doc = "Checks if the value of the field is `_111`"] - #[inline] - pub fn is_111(&self) -> bool { - *self == RXIDENR::_111 - } -} -#[doc = "Possible values of the field `RXUF`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum RXUFR { - #[doc = "No receive buffer underflow has occurred since the last time the flag was cleared."] _0, - #[doc = "At least one receive buffer underflow has occurred since the last time the flag was cleared."] - _1, -} -impl RXUFR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - RXUFR::_0 => false, - RXUFR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> RXUFR { - match value { - false => RXUFR::_0, - true => RXUFR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == RXUFR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == RXUFR::_1 - } -} -#[doc = "Possible values of the field `TXOF`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum TXOFR { - #[doc = "No transmit buffer overflow has occurred since the last time the flag was cleared."] _0, - #[doc = "At least one transmit buffer overflow has occurred since the last time the flag was cleared."] - _1, -} -impl TXOFR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - TXOFR::_0 => false, - TXOFR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> TXOFR { - match value { - false => TXOFR::_0, - true => TXOFR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == TXOFR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == TXOFR::_1 - } -} -#[doc = "Possible values of the field `RXEMPT`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum RXEMPTR { - #[doc = "Receive buffer is not empty."] _0, - #[doc = "Receive buffer is empty."] _1, -} -impl RXEMPTR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - RXEMPTR::_0 => false, - RXEMPTR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> RXEMPTR { - match value { - false => RXEMPTR::_0, - true => RXEMPTR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == RXEMPTR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == RXEMPTR::_1 - } -} -#[doc = "Possible values of the field `TXEMPT`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum TXEMPTR { - #[doc = "Transmit buffer is not empty."] _0, - #[doc = "Transmit buffer is empty."] _1, -} -impl TXEMPTR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - TXEMPTR::_0 => false, - TXEMPTR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> TXEMPTR { - match value { - false => TXEMPTR::_0, - true => TXEMPTR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == TXEMPTR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == TXEMPTR::_1 - } -} -#[doc = "Values that can be written to the field `RXFE`"] -pub enum RXFEW { - #[doc = "Receive FIFO is not enabled. Buffer is depth 1. (Legacy support)"] _0, - #[doc = "Receive FIFO is enabled. Buffer is depth indicted by RXFIFOSIZE."] _1, -} -impl RXFEW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - RXFEW::_0 => false, - RXFEW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _RXFEW<'a> { - w: &'a mut W, -} -impl<'a> _RXFEW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: RXFEW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Receive FIFO is not enabled. Buffer is depth 1. (Legacy support)"] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(RXFEW::_0) - } - #[doc = "Receive FIFO is enabled. Buffer is depth indicted by RXFIFOSIZE."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(RXFEW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 3; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `TXFE`"] -pub enum TXFEW { - #[doc = "Transmit FIFO is not enabled. Buffer is depth 1. (Legacy support)."] _0, - #[doc = "Transmit FIFO is enabled. Buffer is depth indicated by TXFIFOSIZE."] _1, -} -impl TXFEW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - TXFEW::_0 => false, - TXFEW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _TXFEW<'a> { - w: &'a mut W, -} -impl<'a> _TXFEW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: TXFEW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Transmit FIFO is not enabled. Buffer is depth 1. (Legacy support)."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(TXFEW::_0) - } - #[doc = "Transmit FIFO is enabled. Buffer is depth indicated by TXFIFOSIZE."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(TXFEW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 7; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `RXUFE`"] -pub enum RXUFEW { - #[doc = "RXUF flag does not generate an interrupt to the host."] _0, - #[doc = "RXUF flag generates an interrupt to the host."] _1, -} -impl RXUFEW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - RXUFEW::_0 => false, - RXUFEW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _RXUFEW<'a> { - w: &'a mut W, -} -impl<'a> _RXUFEW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: RXUFEW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "RXUF flag does not generate an interrupt to the host."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(RXUFEW::_0) - } - #[doc = "RXUF flag generates an interrupt to the host."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(RXUFEW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 8; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `TXOFE`"] -pub enum TXOFEW { - #[doc = "TXOF flag does not generate an interrupt to the host."] _0, - #[doc = "TXOF flag generates an interrupt to the host."] _1, -} -impl TXOFEW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - TXOFEW::_0 => false, - TXOFEW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _TXOFEW<'a> { - w: &'a mut W, -} -impl<'a> _TXOFEW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: TXOFEW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "TXOF flag does not generate an interrupt to the host."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(TXOFEW::_0) - } - #[doc = "TXOF flag generates an interrupt to the host."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(TXOFEW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 9; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `RXIDEN`"] -pub enum RXIDENW { - #[doc = "Disable RDRF assertion due to partially filled FIFO when receiver is idle."] _000, - #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 1 character."] - _001, - #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 2 characters."] - _010, - #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 4 characters."] - _011, - #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 8 characters."] - _100, - #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 16 characters."] - _101, - #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 32 characters."] - _110, - #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 64 characters."] - _111, -} -impl RXIDENW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> u8 { - match *self { - RXIDENW::_000 => 0, - RXIDENW::_001 => 1, - RXIDENW::_010 => 2, - RXIDENW::_011 => 3, - RXIDENW::_100 => 4, - RXIDENW::_101 => 5, - RXIDENW::_110 => 6, - RXIDENW::_111 => 7, - } - } -} -#[doc = r" Proxy"] -pub struct _RXIDENW<'a> { - w: &'a mut W, -} -impl<'a> _RXIDENW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: RXIDENW) -> &'a mut W { - { - self.bits(variant._bits()) - } - } - #[doc = "Disable RDRF assertion due to partially filled FIFO when receiver is idle."] - #[inline] - pub fn _000(self) -> &'a mut W { - self.variant(RXIDENW::_000) - } - #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 1 character."] - #[inline] - pub fn _001(self) -> &'a mut W { - self.variant(RXIDENW::_001) - } - #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 2 characters."] - #[inline] - pub fn _010(self) -> &'a mut W { - self.variant(RXIDENW::_010) - } - #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 4 characters."] - #[inline] - pub fn _011(self) -> &'a mut W { - self.variant(RXIDENW::_011) - } - #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 8 characters."] - #[inline] - pub fn _100(self) -> &'a mut W { - self.variant(RXIDENW::_100) - } - #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 16 characters."] - #[inline] - pub fn _101(self) -> &'a mut W { - self.variant(RXIDENW::_101) - } - #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 32 characters."] - #[inline] - pub fn _110(self) -> &'a mut W { - self.variant(RXIDENW::_110) - } - #[doc = "Enable RDRF assertion due to partially filled FIFO when receiver is idle for 64 characters."] - #[inline] - pub fn _111(self) -> &'a mut W { - self.variant(RXIDENW::_111) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 7; - const OFFSET: u8 = 10; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `RXFLUSH`"] -pub enum RXFLUSHW { - #[doc = "No flush operation occurs."] _0, - #[doc = "All data in the receive FIFO/buffer is cleared out."] _1, -} -impl RXFLUSHW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - RXFLUSHW::_0 => false, - RXFLUSHW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _RXFLUSHW<'a> { - w: &'a mut W, -} -impl<'a> _RXFLUSHW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: RXFLUSHW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "No flush operation occurs."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(RXFLUSHW::_0) - } - #[doc = "All data in the receive FIFO/buffer is cleared out."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(RXFLUSHW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 14; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `TXFLUSH`"] -pub enum TXFLUSHW { - #[doc = "No flush operation occurs."] _0, - #[doc = "All data in the transmit FIFO/Buffer is cleared out."] _1, -} -impl TXFLUSHW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - TXFLUSHW::_0 => false, - TXFLUSHW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _TXFLUSHW<'a> { - w: &'a mut W, -} -impl<'a> _TXFLUSHW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: TXFLUSHW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "No flush operation occurs."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(TXFLUSHW::_0) - } - #[doc = "All data in the transmit FIFO/Buffer is cleared out."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(TXFLUSHW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 15; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `RXUF`"] -pub enum RXUFW { - #[doc = "No receive buffer underflow has occurred since the last time the flag was cleared."] _0, - #[doc = "At least one receive buffer underflow has occurred since the last time the flag was cleared."] - _1, -} -impl RXUFW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - RXUFW::_0 => false, - RXUFW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _RXUFW<'a> { - w: &'a mut W, -} -impl<'a> _RXUFW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: RXUFW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "No receive buffer underflow has occurred since the last time the flag was cleared."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(RXUFW::_0) - } - #[doc = "At least one receive buffer underflow has occurred since the last time the flag was cleared."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(RXUFW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 16; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `TXOF`"] -pub enum TXOFW { - #[doc = "No transmit buffer overflow has occurred since the last time the flag was cleared."] _0, - #[doc = "At least one transmit buffer overflow has occurred since the last time the flag was cleared."] - _1, -} -impl TXOFW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - TXOFW::_0 => false, - TXOFW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _TXOFW<'a> { - w: &'a mut W, -} -impl<'a> _TXOFW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: TXOFW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "No transmit buffer overflow has occurred since the last time the flag was cleared."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(TXOFW::_0) - } - #[doc = "At least one transmit buffer overflow has occurred since the last time the flag was cleared."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(TXOFW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 17; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:2 - Receive FIFO. Buffer Depth"] - #[inline] - pub fn rxfifosize(&self) -> RXFIFOSIZER { - RXFIFOSIZER::_from({ - const MASK: u8 = 7; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }) - } - #[doc = "Bit 3 - Receive FIFO Enable"] - #[inline] - pub fn rxfe(&self) -> RXFER { - RXFER::_from({ - const MASK: bool = true; - const OFFSET: u8 = 3; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bits 4:6 - Transmit FIFO. Buffer Depth"] - #[inline] - pub fn txfifosize(&self) -> TXFIFOSIZER { - TXFIFOSIZER::_from({ - const MASK: u8 = 7; - const OFFSET: u8 = 4; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }) - } - #[doc = "Bit 7 - Transmit FIFO Enable"] - #[inline] - pub fn txfe(&self) -> TXFER { - TXFER::_from({ - const MASK: bool = true; - const OFFSET: u8 = 7; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 8 - Receive FIFO Underflow Interrupt Enable"] - #[inline] - pub fn rxufe(&self) -> RXUFER { - RXUFER::_from({ - const MASK: bool = true; - const OFFSET: u8 = 8; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 9 - Transmit FIFO Overflow Interrupt Enable"] - #[inline] - pub fn txofe(&self) -> TXOFER { - TXOFER::_from({ - const MASK: bool = true; - const OFFSET: u8 = 9; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bits 10:12 - Receiver Idle Empty Enable"] - #[inline] - pub fn rxiden(&self) -> RXIDENR { - RXIDENR::_from({ - const MASK: u8 = 7; - const OFFSET: u8 = 10; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }) - } - #[doc = "Bit 16 - Receiver Buffer Underflow Flag"] - #[inline] - pub fn rxuf(&self) -> RXUFR { - RXUFR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 16; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 17 - Transmitter Buffer Overflow Flag"] - #[inline] - pub fn txof(&self) -> TXOFR { - TXOFR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 17; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 22 - Receive Buffer/FIFO Empty"] - #[inline] - pub fn rxempt(&self) -> RXEMPTR { - RXEMPTR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 22; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 23 - Transmit Buffer/FIFO Empty"] - #[inline] - pub fn txempt(&self) -> TXEMPTR { - TXEMPTR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 23; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 12582929 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bit 3 - Receive FIFO Enable"] - #[inline] - pub fn rxfe(&mut self) -> _RXFEW { - _RXFEW { w: self } - } - #[doc = "Bit 7 - Transmit FIFO Enable"] - #[inline] - pub fn txfe(&mut self) -> _TXFEW { - _TXFEW { w: self } - } - #[doc = "Bit 8 - Receive FIFO Underflow Interrupt Enable"] - #[inline] - pub fn rxufe(&mut self) -> _RXUFEW { - _RXUFEW { w: self } - } - #[doc = "Bit 9 - Transmit FIFO Overflow Interrupt Enable"] - #[inline] - pub fn txofe(&mut self) -> _TXOFEW { - _TXOFEW { w: self } - } - #[doc = "Bits 10:12 - Receiver Idle Empty Enable"] - #[inline] - pub fn rxiden(&mut self) -> _RXIDENW { - _RXIDENW { w: self } - } - #[doc = "Bit 14 - Receive FIFO/Buffer Flush"] - #[inline] - pub fn rxflush(&mut self) -> _RXFLUSHW { - _RXFLUSHW { w: self } - } - #[doc = "Bit 15 - Transmit FIFO/Buffer Flush"] - #[inline] - pub fn txflush(&mut self) -> _TXFLUSHW { - _TXFLUSHW { w: self } - } - #[doc = "Bit 16 - Receiver Buffer Underflow Flag"] - #[inline] - pub fn rxuf(&mut self) -> _RXUFW { - _RXUFW { w: self } - } - #[doc = "Bit 17 - Transmitter Buffer Overflow Flag"] - #[inline] - pub fn txof(&mut self) -> _TXOFW { - _TXOFW { w: self } - } -} diff --git a/src/lpuart2/global/mod.rs b/src/lpuart2/global/mod.rs deleted file mode 100644 index ab15f12..0000000 --- a/src/lpuart2/global/mod.rs +++ /dev/null @@ -1,179 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::GLOBAL { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = "Possible values of the field `RST`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum RSTR { - #[doc = "Module is not reset."] _0, - #[doc = "Module is reset."] _1, -} -impl RSTR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - RSTR::_0 => false, - RSTR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> RSTR { - match value { - false => RSTR::_0, - true => RSTR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == RSTR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == RSTR::_1 - } -} -#[doc = "Values that can be written to the field `RST`"] -pub enum RSTW { - #[doc = "Module is not reset."] _0, - #[doc = "Module is reset."] _1, -} -impl RSTW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - RSTW::_0 => false, - RSTW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _RSTW<'a> { - w: &'a mut W, -} -impl<'a> _RSTW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: RSTW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Module is not reset."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(RSTW::_0) - } - #[doc = "Module is reset."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(RSTW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 1; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bit 1 - Software Reset"] - #[inline] - pub fn rst(&self) -> RSTR { - RSTR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 1; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 0 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bit 1 - Software Reset"] - #[inline] - pub fn rst(&mut self) -> _RSTW { - _RSTW { w: self } - } -} diff --git a/src/lpuart2/match_/mod.rs b/src/lpuart2/match_/mod.rs deleted file mode 100644 index ccaf148..0000000 --- a/src/lpuart2/match_/mod.rs +++ /dev/null @@ -1,146 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::MATCH { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = r" Value of the field"] -pub struct MA1R { - bits: u16, -} -impl MA1R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u16 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct MA2R { - bits: u16, -} -impl MA2R { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u16 { - self.bits - } -} -#[doc = r" Proxy"] -pub struct _MA1W<'a> { - w: &'a mut W, -} -impl<'a> _MA1W<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u16) -> &'a mut W { - const MASK: u16 = 1023; - const OFFSET: u8 = 0; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = r" Proxy"] -pub struct _MA2W<'a> { - w: &'a mut W, -} -impl<'a> _MA2W<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u16) -> &'a mut W { - const MASK: u16 = 1023; - const OFFSET: u8 = 16; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:9 - Match Address 1"] - #[inline] - pub fn ma1(&self) -> MA1R { - let bits = { - const MASK: u16 = 1023; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u16 - }; - MA1R { bits } - } - #[doc = "Bits 16:25 - Match Address 2"] - #[inline] - pub fn ma2(&self) -> MA2R { - let bits = { - const MASK: u16 = 1023; - const OFFSET: u8 = 16; - ((self.bits >> OFFSET) & MASK as u32) as u16 - }; - MA2R { bits } - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 0 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bits 0:9 - Match Address 1"] - #[inline] - pub fn ma1(&mut self) -> _MA1W { - _MA1W { w: self } - } - #[doc = "Bits 16:25 - Match Address 2"] - #[inline] - pub fn ma2(&mut self) -> _MA2W { - _MA2W { w: self } - } -} diff --git a/src/lpuart2/mod.rs b/src/lpuart2/mod.rs deleted file mode 100644 index d0eca48..0000000 --- a/src/lpuart2/mod.rs +++ /dev/null @@ -1,89 +0,0 @@ -use vcell::VolatileCell; -#[doc = r" Register block"] -#[repr(C)] -pub struct RegisterBlock { - #[doc = "0x00 - Version ID Register"] pub verid: VERID, - #[doc = "0x04 - Parameter Register"] pub param: PARAM, - #[doc = "0x08 - LPUART Global Register"] pub global: GLOBAL, - #[doc = "0x0c - LPUART Pin Configuration Register"] pub pincfg: PINCFG, - #[doc = "0x10 - LPUART Baud Rate Register"] pub baud: BAUD, - #[doc = "0x14 - LPUART Status Register"] pub stat: STAT, - #[doc = "0x18 - LPUART Control Register"] pub ctrl: CTRL, - #[doc = "0x1c - LPUART Data Register"] pub data: DATA, - #[doc = "0x20 - LPUART Match Address Register"] pub match_: MATCH, - #[doc = "0x24 - LPUART Modem IrDA Register"] pub modir: MODIR, - #[doc = "0x28 - LPUART FIFO Register"] pub fifo: FIFO, - #[doc = "0x2c - LPUART Watermark Register"] pub water: WATER, -} -#[doc = "Version ID Register"] -pub struct VERID { - register: VolatileCell, -} -#[doc = "Version ID Register"] -pub mod verid; -#[doc = "Parameter Register"] -pub struct PARAM { - register: VolatileCell, -} -#[doc = "Parameter Register"] -pub mod param; -#[doc = "LPUART Global Register"] -pub struct GLOBAL { - register: VolatileCell, -} -#[doc = "LPUART Global Register"] -pub mod global; -#[doc = "LPUART Pin Configuration Register"] -pub struct PINCFG { - register: VolatileCell, -} -#[doc = "LPUART Pin Configuration Register"] -pub mod pincfg; -#[doc = "LPUART Baud Rate Register"] -pub struct BAUD { - register: VolatileCell, -} -#[doc = "LPUART Baud Rate Register"] -pub mod baud; -#[doc = "LPUART Status Register"] -pub struct STAT { - register: VolatileCell, -} -#[doc = "LPUART Status Register"] -pub mod stat; -#[doc = "LPUART Control Register"] -pub struct CTRL { - register: VolatileCell, -} -#[doc = "LPUART Control Register"] -pub mod ctrl; -#[doc = "LPUART Data Register"] -pub struct DATA { - register: VolatileCell, -} -#[doc = "LPUART Data Register"] -pub mod data; -#[doc = "LPUART Match Address Register"] -pub struct MATCH { - register: VolatileCell, -} -#[doc = "LPUART Match Address Register"] -pub mod match_; -#[doc = "LPUART Modem IrDA Register"] -pub struct MODIR { - register: VolatileCell, -} -#[doc = "LPUART Modem IrDA Register"] -pub mod modir; -#[doc = "LPUART FIFO Register"] -pub struct FIFO { - register: VolatileCell, -} -#[doc = "LPUART FIFO Register"] -pub mod fifo; -#[doc = "LPUART Watermark Register"] -pub struct WATER { - register: VolatileCell, -} -#[doc = "LPUART Watermark Register"] -pub mod water; diff --git a/src/lpuart2/modir/mod.rs b/src/lpuart2/modir/mod.rs deleted file mode 100644 index badea62..0000000 --- a/src/lpuart2/modir/mod.rs +++ /dev/null @@ -1,1030 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::MODIR { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = "Possible values of the field `TXCTSE`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum TXCTSER { - #[doc = "CTS has no effect on the transmitter."] _0, - #[doc = "Enables clear-to-send operation. The transmitter checks the state of CTS each time it is ready to send a character. If CTS is asserted, the character is sent. If CTS is deasserted, the signal TXD remains in the mark state and transmission is delayed until CTS is asserted. Changes in CTS as a character is being sent do not affect its transmission."] - _1, -} -impl TXCTSER { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - TXCTSER::_0 => false, - TXCTSER::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> TXCTSER { - match value { - false => TXCTSER::_0, - true => TXCTSER::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == TXCTSER::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == TXCTSER::_1 - } -} -#[doc = "Possible values of the field `TXRTSE`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum TXRTSER { - #[doc = "The transmitter has no effect on RTS."] _0, - #[doc = "When a character is placed into an empty transmitter data buffer , RTS asserts one bit time before the start bit is transmitted. RTS deasserts one bit time after all characters in the transmitter data buffer and shift register are completely sent, including the last stop bit."] - _1, -} -impl TXRTSER { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - TXRTSER::_0 => false, - TXRTSER::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> TXRTSER { - match value { - false => TXRTSER::_0, - true => TXRTSER::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == TXRTSER::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == TXRTSER::_1 - } -} -#[doc = "Possible values of the field `TXRTSPOL`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum TXRTSPOLR { - #[doc = "Transmitter RTS is active low."] _0, - #[doc = "Transmitter RTS is active high."] _1, -} -impl TXRTSPOLR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - TXRTSPOLR::_0 => false, - TXRTSPOLR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> TXRTSPOLR { - match value { - false => TXRTSPOLR::_0, - true => TXRTSPOLR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == TXRTSPOLR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == TXRTSPOLR::_1 - } -} -#[doc = "Possible values of the field `RXRTSE`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum RXRTSER { - #[doc = "The receiver has no effect on RTS."] _0, - #[doc = r" Reserved"] _Reserved(bool), -} -impl RXRTSER { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - RXRTSER::_0 => false, - RXRTSER::_Reserved(bits) => bits, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> RXRTSER { - match value { - false => RXRTSER::_0, - i => RXRTSER::_Reserved(i), - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == RXRTSER::_0 - } -} -#[doc = "Possible values of the field `TXCTSC`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum TXCTSCR { - #[doc = "CTS input is sampled at the start of each character."] _0, - #[doc = "CTS input is sampled when the transmitter is idle."] _1, -} -impl TXCTSCR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - TXCTSCR::_0 => false, - TXCTSCR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> TXCTSCR { - match value { - false => TXCTSCR::_0, - true => TXCTSCR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == TXCTSCR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == TXCTSCR::_1 - } -} -#[doc = "Possible values of the field `TXCTSSRC`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum TXCTSSRCR { - #[doc = "CTS input is the CTS_B pin."] _0, - #[doc = "CTS input is the inverted Receiver Match result."] _1, -} -impl TXCTSSRCR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - TXCTSSRCR::_0 => false, - TXCTSSRCR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> TXCTSSRCR { - match value { - false => TXCTSSRCR::_0, - true => TXCTSSRCR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == TXCTSSRCR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == TXCTSSRCR::_1 - } -} -#[doc = r" Value of the field"] -pub struct RTSWATERR { - bits: u8, -} -impl RTSWATERR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = "Possible values of the field `TNP`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum TNPR { - #[doc = "1/OSR."] _00, - #[doc = "2/OSR."] _01, - #[doc = "3/OSR."] _10, - #[doc = "4/OSR."] _11, -} -impl TNPR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - match *self { - TNPR::_00 => 0, - TNPR::_01 => 1, - TNPR::_10 => 2, - TNPR::_11 => 3, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: u8) -> TNPR { - match value { - 0 => TNPR::_00, - 1 => TNPR::_01, - 2 => TNPR::_10, - 3 => TNPR::_11, - _ => unreachable!(), - } - } - #[doc = "Checks if the value of the field is `_00`"] - #[inline] - pub fn is_00(&self) -> bool { - *self == TNPR::_00 - } - #[doc = "Checks if the value of the field is `_01`"] - #[inline] - pub fn is_01(&self) -> bool { - *self == TNPR::_01 - } - #[doc = "Checks if the value of the field is `_10`"] - #[inline] - pub fn is_10(&self) -> bool { - *self == TNPR::_10 - } - #[doc = "Checks if the value of the field is `_11`"] - #[inline] - pub fn is_11(&self) -> bool { - *self == TNPR::_11 - } -} -#[doc = "Possible values of the field `IREN`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum IRENR { - #[doc = "IR disabled."] _0, - #[doc = "IR enabled."] _1, -} -impl IRENR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - IRENR::_0 => false, - IRENR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> IRENR { - match value { - false => IRENR::_0, - true => IRENR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == IRENR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == IRENR::_1 - } -} -#[doc = "Values that can be written to the field `TXCTSE`"] -pub enum TXCTSEW { - #[doc = "CTS has no effect on the transmitter."] _0, - #[doc = "Enables clear-to-send operation. The transmitter checks the state of CTS each time it is ready to send a character. If CTS is asserted, the character is sent. If CTS is deasserted, the signal TXD remains in the mark state and transmission is delayed until CTS is asserted. Changes in CTS as a character is being sent do not affect its transmission."] - _1, -} -impl TXCTSEW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - TXCTSEW::_0 => false, - TXCTSEW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _TXCTSEW<'a> { - w: &'a mut W, -} -impl<'a> _TXCTSEW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: TXCTSEW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "CTS has no effect on the transmitter."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(TXCTSEW::_0) - } - #[doc = "Enables clear-to-send operation. The transmitter checks the state of CTS each time it is ready to send a character. If CTS is asserted, the character is sent. If CTS is deasserted, the signal TXD remains in the mark state and transmission is delayed until CTS is asserted. Changes in CTS as a character is being sent do not affect its transmission."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(TXCTSEW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 0; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `TXRTSE`"] -pub enum TXRTSEW { - #[doc = "The transmitter has no effect on RTS."] _0, - #[doc = "When a character is placed into an empty transmitter data buffer , RTS asserts one bit time before the start bit is transmitted. RTS deasserts one bit time after all characters in the transmitter data buffer and shift register are completely sent, including the last stop bit."] - _1, -} -impl TXRTSEW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - TXRTSEW::_0 => false, - TXRTSEW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _TXRTSEW<'a> { - w: &'a mut W, -} -impl<'a> _TXRTSEW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: TXRTSEW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "The transmitter has no effect on RTS."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(TXRTSEW::_0) - } - #[doc = "When a character is placed into an empty transmitter data buffer , RTS asserts one bit time before the start bit is transmitted. RTS deasserts one bit time after all characters in the transmitter data buffer and shift register are completely sent, including the last stop bit."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(TXRTSEW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 1; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `TXRTSPOL`"] -pub enum TXRTSPOLW { - #[doc = "Transmitter RTS is active low."] _0, - #[doc = "Transmitter RTS is active high."] _1, -} -impl TXRTSPOLW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - TXRTSPOLW::_0 => false, - TXRTSPOLW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _TXRTSPOLW<'a> { - w: &'a mut W, -} -impl<'a> _TXRTSPOLW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: TXRTSPOLW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Transmitter RTS is active low."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(TXRTSPOLW::_0) - } - #[doc = "Transmitter RTS is active high."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(TXRTSPOLW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 2; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `RXRTSE`"] -pub enum RXRTSEW { - #[doc = "The receiver has no effect on RTS."] _0, -} -impl RXRTSEW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - RXRTSEW::_0 => false, - } - } -} -#[doc = r" Proxy"] -pub struct _RXRTSEW<'a> { - w: &'a mut W, -} -impl<'a> _RXRTSEW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: RXRTSEW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "The receiver has no effect on RTS."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(RXRTSEW::_0) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 3; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `TXCTSC`"] -pub enum TXCTSCW { - #[doc = "CTS input is sampled at the start of each character."] _0, - #[doc = "CTS input is sampled when the transmitter is idle."] _1, -} -impl TXCTSCW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - TXCTSCW::_0 => false, - TXCTSCW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _TXCTSCW<'a> { - w: &'a mut W, -} -impl<'a> _TXCTSCW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: TXCTSCW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "CTS input is sampled at the start of each character."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(TXCTSCW::_0) - } - #[doc = "CTS input is sampled when the transmitter is idle."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(TXCTSCW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 4; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `TXCTSSRC`"] -pub enum TXCTSSRCW { - #[doc = "CTS input is the CTS_B pin."] _0, - #[doc = "CTS input is the inverted Receiver Match result."] _1, -} -impl TXCTSSRCW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - TXCTSSRCW::_0 => false, - TXCTSSRCW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _TXCTSSRCW<'a> { - w: &'a mut W, -} -impl<'a> _TXCTSSRCW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: TXCTSSRCW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "CTS input is the CTS_B pin."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(TXCTSSRCW::_0) - } - #[doc = "CTS input is the inverted Receiver Match result."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(TXCTSSRCW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 5; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = r" Proxy"] -pub struct _RTSWATERW<'a> { - w: &'a mut W, -} -impl<'a> _RTSWATERW<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 3; - const OFFSET: u8 = 8; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `TNP`"] -pub enum TNPW { - #[doc = "1/OSR."] _00, - #[doc = "2/OSR."] _01, - #[doc = "3/OSR."] _10, - #[doc = "4/OSR."] _11, -} -impl TNPW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> u8 { - match *self { - TNPW::_00 => 0, - TNPW::_01 => 1, - TNPW::_10 => 2, - TNPW::_11 => 3, - } - } -} -#[doc = r" Proxy"] -pub struct _TNPW<'a> { - w: &'a mut W, -} -impl<'a> _TNPW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: TNPW) -> &'a mut W { - { - self.bits(variant._bits()) - } - } - #[doc = "1/OSR."] - #[inline] - pub fn _00(self) -> &'a mut W { - self.variant(TNPW::_00) - } - #[doc = "2/OSR."] - #[inline] - pub fn _01(self) -> &'a mut W { - self.variant(TNPW::_01) - } - #[doc = "3/OSR."] - #[inline] - pub fn _10(self) -> &'a mut W { - self.variant(TNPW::_10) - } - #[doc = "4/OSR."] - #[inline] - pub fn _11(self) -> &'a mut W { - self.variant(TNPW::_11) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 3; - const OFFSET: u8 = 16; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `IREN`"] -pub enum IRENW { - #[doc = "IR disabled."] _0, - #[doc = "IR enabled."] _1, -} -impl IRENW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - IRENW::_0 => false, - IRENW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _IRENW<'a> { - w: &'a mut W, -} -impl<'a> _IRENW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: IRENW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "IR disabled."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(IRENW::_0) - } - #[doc = "IR enabled."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(IRENW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 18; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bit 0 - Transmitter clear-to-send enable"] - #[inline] - pub fn txctse(&self) -> TXCTSER { - TXCTSER::_from({ - const MASK: bool = true; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 1 - Transmitter request-to-send enable"] - #[inline] - pub fn txrtse(&self) -> TXRTSER { - TXRTSER::_from({ - const MASK: bool = true; - const OFFSET: u8 = 1; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 2 - Transmitter request-to-send polarity"] - #[inline] - pub fn txrtspol(&self) -> TXRTSPOLR { - TXRTSPOLR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 2; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 3 - Receiver request-to-send enable"] - #[inline] - pub fn rxrtse(&self) -> RXRTSER { - RXRTSER::_from({ - const MASK: bool = true; - const OFFSET: u8 = 3; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 4 - Transmit CTS Configuration"] - #[inline] - pub fn txctsc(&self) -> TXCTSCR { - TXCTSCR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 4; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 5 - Transmit CTS Source"] - #[inline] - pub fn txctssrc(&self) -> TXCTSSRCR { - TXCTSSRCR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 5; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bits 8:9 - Receive RTS Configuration"] - #[inline] - pub fn rtswater(&self) -> RTSWATERR { - let bits = { - const MASK: u8 = 3; - const OFFSET: u8 = 8; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - RTSWATERR { bits } - } - #[doc = "Bits 16:17 - Transmitter narrow pulse"] - #[inline] - pub fn tnp(&self) -> TNPR { - TNPR::_from({ - const MASK: u8 = 3; - const OFFSET: u8 = 16; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }) - } - #[doc = "Bit 18 - Infrared enable"] - #[inline] - pub fn iren(&self) -> IRENR { - IRENR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 18; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 0 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bit 0 - Transmitter clear-to-send enable"] - #[inline] - pub fn txctse(&mut self) -> _TXCTSEW { - _TXCTSEW { w: self } - } - #[doc = "Bit 1 - Transmitter request-to-send enable"] - #[inline] - pub fn txrtse(&mut self) -> _TXRTSEW { - _TXRTSEW { w: self } - } - #[doc = "Bit 2 - Transmitter request-to-send polarity"] - #[inline] - pub fn txrtspol(&mut self) -> _TXRTSPOLW { - _TXRTSPOLW { w: self } - } - #[doc = "Bit 3 - Receiver request-to-send enable"] - #[inline] - pub fn rxrtse(&mut self) -> _RXRTSEW { - _RXRTSEW { w: self } - } - #[doc = "Bit 4 - Transmit CTS Configuration"] - #[inline] - pub fn txctsc(&mut self) -> _TXCTSCW { - _TXCTSCW { w: self } - } - #[doc = "Bit 5 - Transmit CTS Source"] - #[inline] - pub fn txctssrc(&mut self) -> _TXCTSSRCW { - _TXCTSSRCW { w: self } - } - #[doc = "Bits 8:9 - Receive RTS Configuration"] - #[inline] - pub fn rtswater(&mut self) -> _RTSWATERW { - _RTSWATERW { w: self } - } - #[doc = "Bits 16:17 - Transmitter narrow pulse"] - #[inline] - pub fn tnp(&mut self) -> _TNPW { - _TNPW { w: self } - } - #[doc = "Bit 18 - Infrared enable"] - #[inline] - pub fn iren(&mut self) -> _IRENW { - _IRENW { w: self } - } -} diff --git a/src/lpuart2/param/mod.rs b/src/lpuart2/param/mod.rs deleted file mode 100644 index de98cf0..0000000 --- a/src/lpuart2/param/mod.rs +++ /dev/null @@ -1,62 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -impl super::PARAM { - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } -} -#[doc = r" Value of the field"] -pub struct TXFIFOR { - bits: u8, -} -impl TXFIFOR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct RXFIFOR { - bits: u8, -} -impl RXFIFOR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:7 - Transmit FIFO Size"] - #[inline] - pub fn txfifo(&self) -> TXFIFOR { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - TXFIFOR { bits } - } - #[doc = "Bits 8:15 - Receive FIFO Size"] - #[inline] - pub fn rxfifo(&self) -> RXFIFOR { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 8; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - RXFIFOR { bits } - } -} diff --git a/src/lpuart2/pincfg/mod.rs b/src/lpuart2/pincfg/mod.rs deleted file mode 100644 index 799cd21..0000000 --- a/src/lpuart2/pincfg/mod.rs +++ /dev/null @@ -1,194 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::PINCFG { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = "Possible values of the field `TRGSEL`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum TRGSELR { - #[doc = "Input trigger is disabled."] _00, - #[doc = "Input trigger is used instead of RXD pin input."] _01, - #[doc = "Input trigger is used instead of CTS_B pin input."] _10, - #[doc = "Input trigger is used to modulate the TXD pin output. The TXD pin output (after TXINV configuration) is ANDed with the input trigger."] - _11, -} -impl TRGSELR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - match *self { - TRGSELR::_00 => 0, - TRGSELR::_01 => 1, - TRGSELR::_10 => 2, - TRGSELR::_11 => 3, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: u8) -> TRGSELR { - match value { - 0 => TRGSELR::_00, - 1 => TRGSELR::_01, - 2 => TRGSELR::_10, - 3 => TRGSELR::_11, - _ => unreachable!(), - } - } - #[doc = "Checks if the value of the field is `_00`"] - #[inline] - pub fn is_00(&self) -> bool { - *self == TRGSELR::_00 - } - #[doc = "Checks if the value of the field is `_01`"] - #[inline] - pub fn is_01(&self) -> bool { - *self == TRGSELR::_01 - } - #[doc = "Checks if the value of the field is `_10`"] - #[inline] - pub fn is_10(&self) -> bool { - *self == TRGSELR::_10 - } - #[doc = "Checks if the value of the field is `_11`"] - #[inline] - pub fn is_11(&self) -> bool { - *self == TRGSELR::_11 - } -} -#[doc = "Values that can be written to the field `TRGSEL`"] -pub enum TRGSELW { - #[doc = "Input trigger is disabled."] _00, - #[doc = "Input trigger is used instead of RXD pin input."] _01, - #[doc = "Input trigger is used instead of CTS_B pin input."] _10, - #[doc = "Input trigger is used to modulate the TXD pin output. The TXD pin output (after TXINV configuration) is ANDed with the input trigger."] - _11, -} -impl TRGSELW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> u8 { - match *self { - TRGSELW::_00 => 0, - TRGSELW::_01 => 1, - TRGSELW::_10 => 2, - TRGSELW::_11 => 3, - } - } -} -#[doc = r" Proxy"] -pub struct _TRGSELW<'a> { - w: &'a mut W, -} -impl<'a> _TRGSELW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: TRGSELW) -> &'a mut W { - { - self.bits(variant._bits()) - } - } - #[doc = "Input trigger is disabled."] - #[inline] - pub fn _00(self) -> &'a mut W { - self.variant(TRGSELW::_00) - } - #[doc = "Input trigger is used instead of RXD pin input."] - #[inline] - pub fn _01(self) -> &'a mut W { - self.variant(TRGSELW::_01) - } - #[doc = "Input trigger is used instead of CTS_B pin input."] - #[inline] - pub fn _10(self) -> &'a mut W { - self.variant(TRGSELW::_10) - } - #[doc = "Input trigger is used to modulate the TXD pin output. The TXD pin output (after TXINV configuration) is ANDed with the input trigger."] - #[inline] - pub fn _11(self) -> &'a mut W { - self.variant(TRGSELW::_11) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 3; - const OFFSET: u8 = 0; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:1 - Trigger Select"] - #[inline] - pub fn trgsel(&self) -> TRGSELR { - TRGSELR::_from({ - const MASK: u8 = 3; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }) - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 0 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bits 0:1 - Trigger Select"] - #[inline] - pub fn trgsel(&mut self) -> _TRGSELW { - _TRGSELW { w: self } - } -} diff --git a/src/lpuart2/stat/mod.rs b/src/lpuart2/stat/mod.rs deleted file mode 100644 index 6a322b6..0000000 --- a/src/lpuart2/stat/mod.rs +++ /dev/null @@ -1,1900 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::STAT { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = "Possible values of the field `MA2F`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum MA2FR { - #[doc = "Received data is not equal to MA2"] _0, - #[doc = "Received data is equal to MA2"] _1, -} -impl MA2FR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - MA2FR::_0 => false, - MA2FR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> MA2FR { - match value { - false => MA2FR::_0, - true => MA2FR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == MA2FR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == MA2FR::_1 - } -} -#[doc = "Possible values of the field `MA1F`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum MA1FR { - #[doc = "Received data is not equal to MA1"] _0, - #[doc = "Received data is equal to MA1"] _1, -} -impl MA1FR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - MA1FR::_0 => false, - MA1FR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> MA1FR { - match value { - false => MA1FR::_0, - true => MA1FR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == MA1FR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == MA1FR::_1 - } -} -#[doc = "Possible values of the field `PF`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum PFR { - #[doc = "No parity error."] _0, - #[doc = "Parity error."] _1, -} -impl PFR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - PFR::_0 => false, - PFR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> PFR { - match value { - false => PFR::_0, - true => PFR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == PFR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == PFR::_1 - } -} -#[doc = "Possible values of the field `FE`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum FER { - #[doc = "No framing error detected. This does not guarantee the framing is correct."] _0, - #[doc = "Framing error."] _1, -} -impl FER { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - FER::_0 => false, - FER::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> FER { - match value { - false => FER::_0, - true => FER::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == FER::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == FER::_1 - } -} -#[doc = "Possible values of the field `NF`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum NFR { - #[doc = "No noise detected."] _0, - #[doc = "Noise detected in the received character in LPUART_DATA."] _1, -} -impl NFR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - NFR::_0 => false, - NFR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> NFR { - match value { - false => NFR::_0, - true => NFR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == NFR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == NFR::_1 - } -} -#[doc = "Possible values of the field `OR`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum ORR { - #[doc = "No overrun."] _0, - #[doc = "Receive overrun (new LPUART data lost)."] _1, -} -impl ORR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - ORR::_0 => false, - ORR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> ORR { - match value { - false => ORR::_0, - true => ORR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == ORR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == ORR::_1 - } -} -#[doc = "Possible values of the field `IDLE`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum IDLER { - #[doc = "No idle line detected."] _0, - #[doc = "Idle line was detected."] _1, -} -impl IDLER { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - IDLER::_0 => false, - IDLER::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> IDLER { - match value { - false => IDLER::_0, - true => IDLER::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == IDLER::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == IDLER::_1 - } -} -#[doc = "Possible values of the field `RDRF`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum RDRFR { - #[doc = "Receive data buffer empty."] _0, - #[doc = "Receive data buffer full."] _1, -} -impl RDRFR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - RDRFR::_0 => false, - RDRFR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> RDRFR { - match value { - false => RDRFR::_0, - true => RDRFR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == RDRFR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == RDRFR::_1 - } -} -#[doc = "Possible values of the field `TC`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum TCR { - #[doc = "Transmitter active (sending data, a preamble, or a break)."] _0, - #[doc = "Transmitter idle (transmission activity complete)."] _1, -} -impl TCR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - TCR::_0 => false, - TCR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> TCR { - match value { - false => TCR::_0, - true => TCR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == TCR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == TCR::_1 - } -} -#[doc = "Possible values of the field `TDRE`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum TDRER { - #[doc = "Transmit data buffer full."] _0, - #[doc = "Transmit data buffer empty."] _1, -} -impl TDRER { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - TDRER::_0 => false, - TDRER::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> TDRER { - match value { - false => TDRER::_0, - true => TDRER::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == TDRER::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == TDRER::_1 - } -} -#[doc = "Possible values of the field `RAF`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum RAFR { - #[doc = "LPUART receiver idle waiting for a start bit."] _0, - #[doc = "LPUART receiver active (RXD input not idle)."] _1, -} -impl RAFR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - RAFR::_0 => false, - RAFR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> RAFR { - match value { - false => RAFR::_0, - true => RAFR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == RAFR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == RAFR::_1 - } -} -#[doc = "Possible values of the field `LBKDE`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum LBKDER { - #[doc = "LIN break detect is disabled, normal break character can be detected."] _0, - #[doc = "LIN break detect is enabled. LIN break character is detected at length of 11 bit times (if M = 0) or 12 (if M = 1) or 13 (M10 = 1)."] - _1, -} -impl LBKDER { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - LBKDER::_0 => false, - LBKDER::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> LBKDER { - match value { - false => LBKDER::_0, - true => LBKDER::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == LBKDER::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == LBKDER::_1 - } -} -#[doc = "Possible values of the field `BRK13`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum BRK13R { - #[doc = "Break character is transmitted with length of 9 to 13 bit times."] _0, - #[doc = "Break character is transmitted with length of 12 to 15 bit times."] _1, -} -impl BRK13R { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - BRK13R::_0 => false, - BRK13R::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> BRK13R { - match value { - false => BRK13R::_0, - true => BRK13R::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == BRK13R::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == BRK13R::_1 - } -} -#[doc = "Possible values of the field `RWUID`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum RWUIDR { - #[doc = "During receive standby state (RWU = 1), the IDLE bit does not get set upon detection of an idle character. During address match wakeup, the IDLE bit does not set when an address does not match."] - _0, - #[doc = "During receive standby state (RWU = 1), the IDLE bit gets set upon detection of an idle character. During address match wakeup, the IDLE bit does set when an address does not match."] - _1, -} -impl RWUIDR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - RWUIDR::_0 => false, - RWUIDR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> RWUIDR { - match value { - false => RWUIDR::_0, - true => RWUIDR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == RWUIDR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == RWUIDR::_1 - } -} -#[doc = "Possible values of the field `RXINV`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum RXINVR { - #[doc = "Receive data not inverted."] _0, - #[doc = "Receive data inverted."] _1, -} -impl RXINVR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - RXINVR::_0 => false, - RXINVR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> RXINVR { - match value { - false => RXINVR::_0, - true => RXINVR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == RXINVR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == RXINVR::_1 - } -} -#[doc = "Possible values of the field `MSBF`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum MSBFR { - #[doc = "LSB (bit0) is the first bit that is transmitted following the start bit. Further, the first bit received after the start bit is identified as bit0."] - _0, - #[doc = "MSB (bit9, bit8, bit7 or bit6) is the first bit that is transmitted following the start bit depending on the setting of CTRL[M], CTRL[PE] and BAUD[M10]. Further, the first bit received after the start bit is identified as bit9, bit8, bit7 or bit6 depending on the setting of CTRL[M] and CTRL[PE]."] - _1, -} -impl MSBFR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - MSBFR::_0 => false, - MSBFR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> MSBFR { - match value { - false => MSBFR::_0, - true => MSBFR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == MSBFR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == MSBFR::_1 - } -} -#[doc = "Possible values of the field `RXEDGIF`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum RXEDGIFR { - #[doc = "No active edge on the receive pin has occurred."] _0, - #[doc = "An active edge on the receive pin has occurred."] _1, -} -impl RXEDGIFR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - RXEDGIFR::_0 => false, - RXEDGIFR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> RXEDGIFR { - match value { - false => RXEDGIFR::_0, - true => RXEDGIFR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == RXEDGIFR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == RXEDGIFR::_1 - } -} -#[doc = "Possible values of the field `LBKDIF`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum LBKDIFR { - #[doc = "No LIN break character has been detected."] _0, - #[doc = "LIN break character has been detected."] _1, -} -impl LBKDIFR { - #[doc = r" Returns `true` if the bit is clear (0)"] - #[inline] - pub fn bit_is_clear(&self) -> bool { - !self.bit() - } - #[doc = r" Returns `true` if the bit is set (1)"] - #[inline] - pub fn bit_is_set(&self) -> bool { - self.bit() - } - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bit(&self) -> bool { - match *self { - LBKDIFR::_0 => false, - LBKDIFR::_1 => true, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: bool) -> LBKDIFR { - match value { - false => LBKDIFR::_0, - true => LBKDIFR::_1, - } - } - #[doc = "Checks if the value of the field is `_0`"] - #[inline] - pub fn is_0(&self) -> bool { - *self == LBKDIFR::_0 - } - #[doc = "Checks if the value of the field is `_1`"] - #[inline] - pub fn is_1(&self) -> bool { - *self == LBKDIFR::_1 - } -} -#[doc = "Values that can be written to the field `MA2F`"] -pub enum MA2FW { - #[doc = "Received data is not equal to MA2"] _0, - #[doc = "Received data is equal to MA2"] _1, -} -impl MA2FW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - MA2FW::_0 => false, - MA2FW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _MA2FW<'a> { - w: &'a mut W, -} -impl<'a> _MA2FW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: MA2FW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Received data is not equal to MA2"] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(MA2FW::_0) - } - #[doc = "Received data is equal to MA2"] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(MA2FW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 14; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `MA1F`"] -pub enum MA1FW { - #[doc = "Received data is not equal to MA1"] _0, - #[doc = "Received data is equal to MA1"] _1, -} -impl MA1FW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - MA1FW::_0 => false, - MA1FW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _MA1FW<'a> { - w: &'a mut W, -} -impl<'a> _MA1FW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: MA1FW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Received data is not equal to MA1"] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(MA1FW::_0) - } - #[doc = "Received data is equal to MA1"] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(MA1FW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 15; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `PF`"] -pub enum PFW { - #[doc = "No parity error."] _0, - #[doc = "Parity error."] _1, -} -impl PFW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - PFW::_0 => false, - PFW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _PFW<'a> { - w: &'a mut W, -} -impl<'a> _PFW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: PFW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "No parity error."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(PFW::_0) - } - #[doc = "Parity error."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(PFW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 16; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `FE`"] -pub enum FEW { - #[doc = "No framing error detected. This does not guarantee the framing is correct."] _0, - #[doc = "Framing error."] _1, -} -impl FEW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - FEW::_0 => false, - FEW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _FEW<'a> { - w: &'a mut W, -} -impl<'a> _FEW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: FEW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "No framing error detected. This does not guarantee the framing is correct."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(FEW::_0) - } - #[doc = "Framing error."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(FEW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 17; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `NF`"] -pub enum NFW { - #[doc = "No noise detected."] _0, - #[doc = "Noise detected in the received character in LPUART_DATA."] _1, -} -impl NFW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - NFW::_0 => false, - NFW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _NFW<'a> { - w: &'a mut W, -} -impl<'a> _NFW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: NFW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "No noise detected."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(NFW::_0) - } - #[doc = "Noise detected in the received character in LPUART_DATA."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(NFW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 18; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `OR`"] -pub enum ORW { - #[doc = "No overrun."] _0, - #[doc = "Receive overrun (new LPUART data lost)."] _1, -} -impl ORW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - ORW::_0 => false, - ORW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _ORW<'a> { - w: &'a mut W, -} -impl<'a> _ORW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: ORW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "No overrun."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(ORW::_0) - } - #[doc = "Receive overrun (new LPUART data lost)."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(ORW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 19; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `IDLE`"] -pub enum IDLEW { - #[doc = "No idle line detected."] _0, - #[doc = "Idle line was detected."] _1, -} -impl IDLEW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - IDLEW::_0 => false, - IDLEW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _IDLEW<'a> { - w: &'a mut W, -} -impl<'a> _IDLEW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: IDLEW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "No idle line detected."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(IDLEW::_0) - } - #[doc = "Idle line was detected."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(IDLEW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 20; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `LBKDE`"] -pub enum LBKDEW { - #[doc = "LIN break detect is disabled, normal break character can be detected."] _0, - #[doc = "LIN break detect is enabled. LIN break character is detected at length of 11 bit times (if M = 0) or 12 (if M = 1) or 13 (M10 = 1)."] - _1, -} -impl LBKDEW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - LBKDEW::_0 => false, - LBKDEW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _LBKDEW<'a> { - w: &'a mut W, -} -impl<'a> _LBKDEW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: LBKDEW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "LIN break detect is disabled, normal break character can be detected."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(LBKDEW::_0) - } - #[doc = "LIN break detect is enabled. LIN break character is detected at length of 11 bit times (if M = 0) or 12 (if M = 1) or 13 (M10 = 1)."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(LBKDEW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 25; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `BRK13`"] -pub enum BRK13W { - #[doc = "Break character is transmitted with length of 9 to 13 bit times."] _0, - #[doc = "Break character is transmitted with length of 12 to 15 bit times."] _1, -} -impl BRK13W { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - BRK13W::_0 => false, - BRK13W::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _BRK13W<'a> { - w: &'a mut W, -} -impl<'a> _BRK13W<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: BRK13W) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Break character is transmitted with length of 9 to 13 bit times."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(BRK13W::_0) - } - #[doc = "Break character is transmitted with length of 12 to 15 bit times."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(BRK13W::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 26; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `RWUID`"] -pub enum RWUIDW { - #[doc = "During receive standby state (RWU = 1), the IDLE bit does not get set upon detection of an idle character. During address match wakeup, the IDLE bit does not set when an address does not match."] - _0, - #[doc = "During receive standby state (RWU = 1), the IDLE bit gets set upon detection of an idle character. During address match wakeup, the IDLE bit does set when an address does not match."] - _1, -} -impl RWUIDW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - RWUIDW::_0 => false, - RWUIDW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _RWUIDW<'a> { - w: &'a mut W, -} -impl<'a> _RWUIDW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: RWUIDW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "During receive standby state (RWU = 1), the IDLE bit does not get set upon detection of an idle character. During address match wakeup, the IDLE bit does not set when an address does not match."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(RWUIDW::_0) - } - #[doc = "During receive standby state (RWU = 1), the IDLE bit gets set upon detection of an idle character. During address match wakeup, the IDLE bit does set when an address does not match."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(RWUIDW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 27; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `RXINV`"] -pub enum RXINVW { - #[doc = "Receive data not inverted."] _0, - #[doc = "Receive data inverted."] _1, -} -impl RXINVW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - RXINVW::_0 => false, - RXINVW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _RXINVW<'a> { - w: &'a mut W, -} -impl<'a> _RXINVW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: RXINVW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "Receive data not inverted."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(RXINVW::_0) - } - #[doc = "Receive data inverted."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(RXINVW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 28; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `MSBF`"] -pub enum MSBFW { - #[doc = "LSB (bit0) is the first bit that is transmitted following the start bit. Further, the first bit received after the start bit is identified as bit0."] - _0, - #[doc = "MSB (bit9, bit8, bit7 or bit6) is the first bit that is transmitted following the start bit depending on the setting of CTRL[M], CTRL[PE] and BAUD[M10]. Further, the first bit received after the start bit is identified as bit9, bit8, bit7 or bit6 depending on the setting of CTRL[M] and CTRL[PE]."] - _1, -} -impl MSBFW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - MSBFW::_0 => false, - MSBFW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _MSBFW<'a> { - w: &'a mut W, -} -impl<'a> _MSBFW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: MSBFW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "LSB (bit0) is the first bit that is transmitted following the start bit. Further, the first bit received after the start bit is identified as bit0."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(MSBFW::_0) - } - #[doc = "MSB (bit9, bit8, bit7 or bit6) is the first bit that is transmitted following the start bit depending on the setting of CTRL[M], CTRL[PE] and BAUD[M10]. Further, the first bit received after the start bit is identified as bit9, bit8, bit7 or bit6 depending on the setting of CTRL[M] and CTRL[PE]."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(MSBFW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 29; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `RXEDGIF`"] -pub enum RXEDGIFW { - #[doc = "No active edge on the receive pin has occurred."] _0, - #[doc = "An active edge on the receive pin has occurred."] _1, -} -impl RXEDGIFW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - RXEDGIFW::_0 => false, - RXEDGIFW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _RXEDGIFW<'a> { - w: &'a mut W, -} -impl<'a> _RXEDGIFW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: RXEDGIFW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "No active edge on the receive pin has occurred."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(RXEDGIFW::_0) - } - #[doc = "An active edge on the receive pin has occurred."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(RXEDGIFW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 30; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = "Values that can be written to the field `LBKDIF`"] -pub enum LBKDIFW { - #[doc = "No LIN break character has been detected."] _0, - #[doc = "LIN break character has been detected."] _1, -} -impl LBKDIFW { - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _bits(&self) -> bool { - match *self { - LBKDIFW::_0 => false, - LBKDIFW::_1 => true, - } - } -} -#[doc = r" Proxy"] -pub struct _LBKDIFW<'a> { - w: &'a mut W, -} -impl<'a> _LBKDIFW<'a> { - #[doc = r" Writes `variant` to the field"] - #[inline] - pub fn variant(self, variant: LBKDIFW) -> &'a mut W { - { - self.bit(variant._bits()) - } - } - #[doc = "No LIN break character has been detected."] - #[inline] - pub fn _0(self) -> &'a mut W { - self.variant(LBKDIFW::_0) - } - #[doc = "LIN break character has been detected."] - #[inline] - pub fn _1(self) -> &'a mut W { - self.variant(LBKDIFW::_1) - } - #[doc = r" Sets the field bit"] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r" Clears the field bit"] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r" Writes raw bits to the field"] - #[inline] - pub fn bit(self, value: bool) -> &'a mut W { - const MASK: bool = true; - const OFFSET: u8 = 31; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bit 14 - Match 2 Flag"] - #[inline] - pub fn ma2f(&self) -> MA2FR { - MA2FR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 14; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 15 - Match 1 Flag"] - #[inline] - pub fn ma1f(&self) -> MA1FR { - MA1FR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 15; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 16 - Parity Error Flag"] - #[inline] - pub fn pf(&self) -> PFR { - PFR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 16; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 17 - Framing Error Flag"] - #[inline] - pub fn fe(&self) -> FER { - FER::_from({ - const MASK: bool = true; - const OFFSET: u8 = 17; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 18 - Noise Flag"] - #[inline] - pub fn nf(&self) -> NFR { - NFR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 18; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 19 - Receiver Overrun Flag"] - #[inline] - pub fn or(&self) -> ORR { - ORR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 19; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 20 - Idle Line Flag"] - #[inline] - pub fn idle(&self) -> IDLER { - IDLER::_from({ - const MASK: bool = true; - const OFFSET: u8 = 20; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 21 - Receive Data Register Full Flag"] - #[inline] - pub fn rdrf(&self) -> RDRFR { - RDRFR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 21; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 22 - Transmission Complete Flag"] - #[inline] - pub fn tc(&self) -> TCR { - TCR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 22; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 23 - Transmit Data Register Empty Flag"] - #[inline] - pub fn tdre(&self) -> TDRER { - TDRER::_from({ - const MASK: bool = true; - const OFFSET: u8 = 23; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 24 - Receiver Active Flag"] - #[inline] - pub fn raf(&self) -> RAFR { - RAFR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 24; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 25 - LIN Break Detection Enable"] - #[inline] - pub fn lbkde(&self) -> LBKDER { - LBKDER::_from({ - const MASK: bool = true; - const OFFSET: u8 = 25; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 26 - Break Character Generation Length"] - #[inline] - pub fn brk13(&self) -> BRK13R { - BRK13R::_from({ - const MASK: bool = true; - const OFFSET: u8 = 26; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 27 - Receive Wake Up Idle Detect"] - #[inline] - pub fn rwuid(&self) -> RWUIDR { - RWUIDR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 27; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 28 - Receive Data Inversion"] - #[inline] - pub fn rxinv(&self) -> RXINVR { - RXINVR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 28; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 29 - MSB First"] - #[inline] - pub fn msbf(&self) -> MSBFR { - MSBFR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 29; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 30 - RXD Pin Active Edge Interrupt Flag"] - #[inline] - pub fn rxedgif(&self) -> RXEDGIFR { - RXEDGIFR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 30; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } - #[doc = "Bit 31 - LIN Break Detect Interrupt Flag"] - #[inline] - pub fn lbkdif(&self) -> LBKDIFR { - LBKDIFR::_from({ - const MASK: bool = true; - const OFFSET: u8 = 31; - ((self.bits >> OFFSET) & MASK as u32) != 0 - }) - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 12582912 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bit 14 - Match 2 Flag"] - #[inline] - pub fn ma2f(&mut self) -> _MA2FW { - _MA2FW { w: self } - } - #[doc = "Bit 15 - Match 1 Flag"] - #[inline] - pub fn ma1f(&mut self) -> _MA1FW { - _MA1FW { w: self } - } - #[doc = "Bit 16 - Parity Error Flag"] - #[inline] - pub fn pf(&mut self) -> _PFW { - _PFW { w: self } - } - #[doc = "Bit 17 - Framing Error Flag"] - #[inline] - pub fn fe(&mut self) -> _FEW { - _FEW { w: self } - } - #[doc = "Bit 18 - Noise Flag"] - #[inline] - pub fn nf(&mut self) -> _NFW { - _NFW { w: self } - } - #[doc = "Bit 19 - Receiver Overrun Flag"] - #[inline] - pub fn or(&mut self) -> _ORW { - _ORW { w: self } - } - #[doc = "Bit 20 - Idle Line Flag"] - #[inline] - pub fn idle(&mut self) -> _IDLEW { - _IDLEW { w: self } - } - #[doc = "Bit 25 - LIN Break Detection Enable"] - #[inline] - pub fn lbkde(&mut self) -> _LBKDEW { - _LBKDEW { w: self } - } - #[doc = "Bit 26 - Break Character Generation Length"] - #[inline] - pub fn brk13(&mut self) -> _BRK13W { - _BRK13W { w: self } - } - #[doc = "Bit 27 - Receive Wake Up Idle Detect"] - #[inline] - pub fn rwuid(&mut self) -> _RWUIDW { - _RWUIDW { w: self } - } - #[doc = "Bit 28 - Receive Data Inversion"] - #[inline] - pub fn rxinv(&mut self) -> _RXINVW { - _RXINVW { w: self } - } - #[doc = "Bit 29 - MSB First"] - #[inline] - pub fn msbf(&mut self) -> _MSBFW { - _MSBFW { w: self } - } - #[doc = "Bit 30 - RXD Pin Active Edge Interrupt Flag"] - #[inline] - pub fn rxedgif(&mut self) -> _RXEDGIFW { - _RXEDGIFW { w: self } - } - #[doc = "Bit 31 - LIN Break Detect Interrupt Flag"] - #[inline] - pub fn lbkdif(&mut self) -> _LBKDIFW { - _LBKDIFW { w: self } - } -} diff --git a/src/lpuart2/verid/mod.rs b/src/lpuart2/verid/mod.rs deleted file mode 100644 index 647ac7a..0000000 --- a/src/lpuart2/verid/mod.rs +++ /dev/null @@ -1,109 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -impl super::VERID { - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } -} -#[doc = "Possible values of the field `FEATURE`"] -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum FEATURER { - #[doc = "Standard feature set."] _0000000000000001, - #[doc = "Standard feature set with MODEM/IrDA support."] _0000000000000011, - #[doc = r" Reserved"] _Reserved(u16), -} -impl FEATURER { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u16 { - match *self { - FEATURER::_0000000000000001 => 1, - FEATURER::_0000000000000011 => 3, - FEATURER::_Reserved(bits) => bits, - } - } - #[allow(missing_docs)] - #[doc(hidden)] - #[inline] - pub fn _from(value: u16) -> FEATURER { - match value { - 1 => FEATURER::_0000000000000001, - 3 => FEATURER::_0000000000000011, - i => FEATURER::_Reserved(i), - } - } - #[doc = "Checks if the value of the field is `_0000000000000001`"] - #[inline] - pub fn is_0000000000000001(&self) -> bool { - *self == FEATURER::_0000000000000001 - } - #[doc = "Checks if the value of the field is `_0000000000000011`"] - #[inline] - pub fn is_0000000000000011(&self) -> bool { - *self == FEATURER::_0000000000000011 - } -} -#[doc = r" Value of the field"] -pub struct MINORR { - bits: u8, -} -impl MINORR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct MAJORR { - bits: u8, -} -impl MAJORR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:15 - Feature Identification Number"] - #[inline] - pub fn feature(&self) -> FEATURER { - FEATURER::_from({ - const MASK: u16 = 65535; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u16 - }) - } - #[doc = "Bits 16:23 - Minor Version Number"] - #[inline] - pub fn minor(&self) -> MINORR { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 16; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - MINORR { bits } - } - #[doc = "Bits 24:31 - Major Version Number"] - #[inline] - pub fn major(&self) -> MAJORR { - let bits = { - const MASK: u8 = 255; - const OFFSET: u8 = 24; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - MAJORR { bits } - } -} diff --git a/src/lpuart2/water/mod.rs b/src/lpuart2/water/mod.rs deleted file mode 100644 index b3b5898..0000000 --- a/src/lpuart2/water/mod.rs +++ /dev/null @@ -1,188 +0,0 @@ -#[doc = r" Value read from the register"] -pub struct R { - bits: u32, -} -#[doc = r" Value to write to the register"] -pub struct W { - bits: u32, -} -impl super::WATER { - #[doc = r" Modifies the contents of the register"] - #[inline] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - let r = R { bits: bits }; - let mut w = W { bits: bits }; - f(&r, &mut w); - self.register.set(w.bits); - } - #[doc = r" Reads the contents of the register"] - #[inline] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - } - } - #[doc = r" Writes to the register"] - #[inline] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let mut w = W::reset_value(); - f(&mut w); - self.register.set(w.bits); - } - #[doc = r" Writes the reset value to the register"] - #[inline] - pub fn reset(&self) { - self.write(|w| w) - } -} -#[doc = r" Value of the field"] -pub struct TXWATERR { - bits: u8, -} -impl TXWATERR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct TXCOUNTR { - bits: u8, -} -impl TXCOUNTR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct RXWATERR { - bits: u8, -} -impl RXWATERR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Value of the field"] -pub struct RXCOUNTR { - bits: u8, -} -impl RXCOUNTR { - #[doc = r" Value of the field as raw bits"] - #[inline] - pub fn bits(&self) -> u8 { - self.bits - } -} -#[doc = r" Proxy"] -pub struct _TXWATERW<'a> { - w: &'a mut W, -} -impl<'a> _TXWATERW<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 3; - const OFFSET: u8 = 0; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -#[doc = r" Proxy"] -pub struct _RXWATERW<'a> { - w: &'a mut W, -} -impl<'a> _RXWATERW<'a> { - #[doc = r" Writes raw bits to the field"] - #[inline] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - const MASK: u8 = 3; - const OFFSET: u8 = 16; - self.w.bits &= !((MASK as u32) << OFFSET); - self.w.bits |= ((value & MASK) as u32) << OFFSET; - self.w - } -} -impl R { - #[doc = r" Value of the register as raw bits"] - #[inline] - pub fn bits(&self) -> u32 { - self.bits - } - #[doc = "Bits 0:1 - Transmit Watermark"] - #[inline] - pub fn txwater(&self) -> TXWATERR { - let bits = { - const MASK: u8 = 3; - const OFFSET: u8 = 0; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - TXWATERR { bits } - } - #[doc = "Bits 8:10 - Transmit Counter"] - #[inline] - pub fn txcount(&self) -> TXCOUNTR { - let bits = { - const MASK: u8 = 7; - const OFFSET: u8 = 8; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - TXCOUNTR { bits } - } - #[doc = "Bits 16:17 - Receive Watermark"] - #[inline] - pub fn rxwater(&self) -> RXWATERR { - let bits = { - const MASK: u8 = 3; - const OFFSET: u8 = 16; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - RXWATERR { bits } - } - #[doc = "Bits 24:26 - Receive Counter"] - #[inline] - pub fn rxcount(&self) -> RXCOUNTR { - let bits = { - const MASK: u8 = 7; - const OFFSET: u8 = 24; - ((self.bits >> OFFSET) & MASK as u32) as u8 - }; - RXCOUNTR { bits } - } -} -impl W { - #[doc = r" Reset value of the register"] - #[inline] - pub fn reset_value() -> W { - W { bits: 0 } - } - #[doc = r" Writes raw bits to the register"] - #[inline] - pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { - self.bits = bits; - self - } - #[doc = "Bits 0:1 - Transmit Watermark"] - #[inline] - pub fn txwater(&mut self) -> _TXWATERW { - _TXWATERW { w: self } - } - #[doc = "Bits 16:17 - Receive Watermark"] - #[inline] - pub fn rxwater(&mut self) -> _RXWATERW { - _RXWATERW { w: self } - } -}