2020-12-07 10:24:29 +00:00
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#[doc = "Reader of register PCC_LPUART0"]
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pub type R = crate::R<u32, super::PCC_LPUART0>;
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#[doc = "Writer for register PCC_LPUART0"]
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pub type W = crate::W<u32, super::PCC_LPUART0>;
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#[doc = "Register PCC_LPUART0 `reset()`'s with value 0x8000_0000"]
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impl crate::ResetValue for super::PCC_LPUART0 {
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type Type = u32;
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#[inline(always)]
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fn reset_value() -> Self::Type {
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0x8000_0000
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}
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}
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#[doc = "Peripheral Clock Source Select\n\nValue on reset: 0"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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#[repr(u8)]
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pub enum PCS_A {
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#[doc = "0: Clock is off."]
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_000 = 0,
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#[doc = "1: Clock option 1"]
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_001 = 1,
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#[doc = "2: Clock option 2"]
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_010 = 2,
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#[doc = "3: Clock option 3"]
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_011 = 3,
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#[doc = "4: Clock option 4"]
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_100 = 4,
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#[doc = "5: Clock option 5"]
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_101 = 5,
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#[doc = "6: Clock option 6"]
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_110 = 6,
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#[doc = "7: Clock option 7"]
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_111 = 7,
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}
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impl From<PCS_A> for u8 {
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#[inline(always)]
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fn from(variant: PCS_A) -> Self {
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variant as _
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}
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}
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#[doc = "Reader of field `PCS`"]
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pub type PCS_R = crate::R<u8, PCS_A>;
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impl PCS_R {
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#[doc = r"Get enumerated values variant"]
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#[inline(always)]
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pub fn variant(&self) -> PCS_A {
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match self.bits {
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0 => PCS_A::_000,
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1 => PCS_A::_001,
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2 => PCS_A::_010,
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3 => PCS_A::_011,
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4 => PCS_A::_100,
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5 => PCS_A::_101,
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6 => PCS_A::_110,
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7 => PCS_A::_111,
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_ => unreachable!(),
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}
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}
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#[doc = "Checks if the value of the field is `_000`"]
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#[inline(always)]
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pub fn is_000(&self) -> bool {
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*self == PCS_A::_000
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}
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#[doc = "Checks if the value of the field is `_001`"]
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#[inline(always)]
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pub fn is_001(&self) -> bool {
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*self == PCS_A::_001
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}
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#[doc = "Checks if the value of the field is `_010`"]
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#[inline(always)]
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pub fn is_010(&self) -> bool {
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*self == PCS_A::_010
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}
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#[doc = "Checks if the value of the field is `_011`"]
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#[inline(always)]
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pub fn is_011(&self) -> bool {
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*self == PCS_A::_011
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}
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#[doc = "Checks if the value of the field is `_100`"]
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#[inline(always)]
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pub fn is_100(&self) -> bool {
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*self == PCS_A::_100
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}
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#[doc = "Checks if the value of the field is `_101`"]
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#[inline(always)]
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pub fn is_101(&self) -> bool {
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*self == PCS_A::_101
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}
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#[doc = "Checks if the value of the field is `_110`"]
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#[inline(always)]
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pub fn is_110(&self) -> bool {
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*self == PCS_A::_110
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}
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#[doc = "Checks if the value of the field is `_111`"]
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#[inline(always)]
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pub fn is_111(&self) -> bool {
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*self == PCS_A::_111
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}
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}
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#[doc = "Write proxy for field `PCS`"]
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pub struct PCS_W<'a> {
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w: &'a mut W,
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}
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impl<'a> PCS_W<'a> {
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#[doc = r"Writes `variant` to the field"]
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#[inline(always)]
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pub fn variant(self, variant: PCS_A) -> &'a mut W {
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{
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self.bits(variant.into())
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}
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}
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#[doc = "Clock is off."]
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#[inline(always)]
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pub fn _000(self) -> &'a mut W {
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self.variant(PCS_A::_000)
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}
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#[doc = "Clock option 1"]
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#[inline(always)]
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pub fn _001(self) -> &'a mut W {
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self.variant(PCS_A::_001)
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}
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#[doc = "Clock option 2"]
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#[inline(always)]
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pub fn _010(self) -> &'a mut W {
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self.variant(PCS_A::_010)
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}
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#[doc = "Clock option 3"]
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#[inline(always)]
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pub fn _011(self) -> &'a mut W {
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self.variant(PCS_A::_011)
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}
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#[doc = "Clock option 4"]
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#[inline(always)]
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pub fn _100(self) -> &'a mut W {
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self.variant(PCS_A::_100)
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}
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#[doc = "Clock option 5"]
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#[inline(always)]
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pub fn _101(self) -> &'a mut W {
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self.variant(PCS_A::_101)
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}
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#[doc = "Clock option 6"]
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#[inline(always)]
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pub fn _110(self) -> &'a mut W {
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self.variant(PCS_A::_110)
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}
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#[doc = "Clock option 7"]
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#[inline(always)]
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pub fn _111(self) -> &'a mut W {
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self.variant(PCS_A::_111)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bits(self, value: u8) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x07 << 24)) | (((value as u32) & 0x07) << 24);
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self.w
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}
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}
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#[doc = "Clock Gate Control\n\nValue on reset: 0"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum CGC_A {
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#[doc = "0: Clock disabled"]
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_0 = 0,
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#[doc = "1: Clock enabled. The current clock selection and divider options are locked."]
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_1 = 1,
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}
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impl From<CGC_A> for bool {
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#[inline(always)]
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fn from(variant: CGC_A) -> Self {
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variant as u8 != 0
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}
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}
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#[doc = "Reader of field `CGC`"]
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pub type CGC_R = crate::R<bool, CGC_A>;
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impl CGC_R {
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#[doc = r"Get enumerated values variant"]
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#[inline(always)]
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pub fn variant(&self) -> CGC_A {
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match self.bits {
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false => CGC_A::_0,
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true => CGC_A::_1,
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}
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}
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#[doc = "Checks if the value of the field is `_0`"]
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#[inline(always)]
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pub fn is_0(&self) -> bool {
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*self == CGC_A::_0
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}
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#[doc = "Checks if the value of the field is `_1`"]
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#[inline(always)]
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pub fn is_1(&self) -> bool {
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*self == CGC_A::_1
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}
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}
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#[doc = "Write proxy for field `CGC`"]
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pub struct CGC_W<'a> {
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w: &'a mut W,
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}
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impl<'a> CGC_W<'a> {
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#[doc = r"Writes `variant` to the field"]
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#[inline(always)]
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pub fn variant(self, variant: CGC_A) -> &'a mut W {
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{
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self.bit(variant.into())
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}
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}
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#[doc = "Clock disabled"]
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#[inline(always)]
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pub fn _0(self) -> &'a mut W {
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self.variant(CGC_A::_0)
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}
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#[doc = "Clock enabled. The current clock selection and divider options are locked."]
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#[inline(always)]
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pub fn _1(self) -> &'a mut W {
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self.variant(CGC_A::_1)
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}
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#[doc = r"Sets the field bit"]
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#[inline(always)]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r"Clears the field bit"]
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#[inline(always)]
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub fn bit(self, value: bool) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x01 << 30)) | (((value as u32) & 0x01) << 30);
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self.w
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}
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}
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#[doc = "Present\n\nValue on reset: 1"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum PR_A {
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#[doc = "0: Peripheral is not present."]
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_0 = 0,
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#[doc = "1: Peripheral is present."]
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_1 = 1,
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}
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impl From<PR_A> for bool {
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#[inline(always)]
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fn from(variant: PR_A) -> Self {
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variant as u8 != 0
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}
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}
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#[doc = "Reader of field `PR`"]
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pub type PR_R = crate::R<bool, PR_A>;
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impl PR_R {
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#[doc = r"Get enumerated values variant"]
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#[inline(always)]
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pub fn variant(&self) -> PR_A {
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match self.bits {
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false => PR_A::_0,
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true => PR_A::_1,
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}
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}
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#[doc = "Checks if the value of the field is `_0`"]
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#[inline(always)]
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pub fn is_0(&self) -> bool {
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*self == PR_A::_0
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}
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#[doc = "Checks if the value of the field is `_1`"]
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#[inline(always)]
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pub fn is_1(&self) -> bool {
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*self == PR_A::_1
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}
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}
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impl R {
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#[doc = "Bits 24:26 - Peripheral Clock Source Select"]
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#[inline(always)]
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pub fn pcs(&self) -> PCS_R {
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PCS_R::new(((self.bits >> 24) & 0x07) as u8)
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}
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#[doc = "Bit 30 - Clock Gate Control"]
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#[inline(always)]
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pub fn cgc(&self) -> CGC_R {
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CGC_R::new(((self.bits >> 30) & 0x01) != 0)
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}
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#[doc = "Bit 31 - Present"]
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#[inline(always)]
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pub fn pr(&self) -> PR_R {
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PR_R::new(((self.bits >> 31) & 0x01) != 0)
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}
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}
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impl W {
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#[doc = "Bits 24:26 - Peripheral Clock Source Select"]
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#[inline(always)]
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pub fn pcs(&mut self) -> PCS_W {
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PCS_W { w: self }
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}
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#[doc = "Bit 30 - Clock Gate Control"]
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#[inline(always)]
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pub fn cgc(&mut self) -> CGC_W {
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CGC_W { w: self }
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}
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}
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