2020-12-07 10:24:29 +00:00
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#[doc = "Reader of register FDCBT"]
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pub type R = crate::R<u32, super::FDCBT>;
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#[doc = "Writer for register FDCBT"]
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pub type W = crate::W<u32, super::FDCBT>;
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#[doc = "Register FDCBT `reset()`'s with value 0"]
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impl crate::ResetValue for super::FDCBT {
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type Type = u32;
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#[inline(always)]
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fn reset_value() -> Self::Type {
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0
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}
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}
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#[doc = "Reader of field `FPSEG2`"]
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pub type FPSEG2_R = crate::R<u8, u8>;
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#[doc = "Write proxy for field `FPSEG2`"]
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pub struct FPSEG2_W<'a> {
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w: &'a mut W,
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}
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impl<'a> FPSEG2_W<'a> {
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub unsafe fn bits(self, value: u8) -> &'a mut W {
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self.w.bits = (self.w.bits & !0x07) | ((value as u32) & 0x07);
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self.w
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}
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}
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#[doc = "Reader of field `FPSEG1`"]
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pub type FPSEG1_R = crate::R<u8, u8>;
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#[doc = "Write proxy for field `FPSEG1`"]
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pub struct FPSEG1_W<'a> {
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w: &'a mut W,
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}
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impl<'a> FPSEG1_W<'a> {
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub unsafe fn bits(self, value: u8) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x07 << 5)) | (((value as u32) & 0x07) << 5);
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self.w
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}
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}
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#[doc = "Reader of field `FPROPSEG`"]
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pub type FPROPSEG_R = crate::R<u8, u8>;
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#[doc = "Write proxy for field `FPROPSEG`"]
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pub struct FPROPSEG_W<'a> {
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w: &'a mut W,
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}
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impl<'a> FPROPSEG_W<'a> {
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub unsafe fn bits(self, value: u8) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x1f << 10)) | (((value as u32) & 0x1f) << 10);
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self.w
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}
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}
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#[doc = "Reader of field `FRJW`"]
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pub type FRJW_R = crate::R<u8, u8>;
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#[doc = "Write proxy for field `FRJW`"]
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pub struct FRJW_W<'a> {
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w: &'a mut W,
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}
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impl<'a> FRJW_W<'a> {
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub unsafe fn bits(self, value: u8) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x07 << 16)) | (((value as u32) & 0x07) << 16);
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self.w
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}
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}
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#[doc = "Reader of field `FPRESDIV`"]
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pub type FPRESDIV_R = crate::R<u16, u16>;
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#[doc = "Write proxy for field `FPRESDIV`"]
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pub struct FPRESDIV_W<'a> {
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w: &'a mut W,
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}
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impl<'a> FPRESDIV_W<'a> {
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#[doc = r"Writes raw bits to the field"]
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#[inline(always)]
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pub unsafe fn bits(self, value: u16) -> &'a mut W {
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self.w.bits = (self.w.bits & !(0x03ff << 20)) | (((value as u32) & 0x03ff) << 20);
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self.w
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}
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}
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impl R {
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#[doc = "Bits 0:2 - Fast Phase Segment 2"]
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#[inline(always)]
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pub fn fpseg2(&self) -> FPSEG2_R {
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FPSEG2_R::new((self.bits & 0x07) as u8)
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}
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#[doc = "Bits 5:7 - Fast Phase Segment 1"]
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#[inline(always)]
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pub fn fpseg1(&self) -> FPSEG1_R {
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FPSEG1_R::new(((self.bits >> 5) & 0x07) as u8)
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}
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#[doc = "Bits 10:14 - Fast Propagation Segment"]
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#[inline(always)]
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pub fn fpropseg(&self) -> FPROPSEG_R {
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FPROPSEG_R::new(((self.bits >> 10) & 0x1f) as u8)
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}
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#[doc = "Bits 16:18 - Fast Resync Jump Width"]
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#[inline(always)]
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pub fn frjw(&self) -> FRJW_R {
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FRJW_R::new(((self.bits >> 16) & 0x07) as u8)
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}
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#[doc = "Bits 20:29 - Fast Prescaler Division Factor"]
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#[inline(always)]
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pub fn fpresdiv(&self) -> FPRESDIV_R {
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FPRESDIV_R::new(((self.bits >> 20) & 0x03ff) as u16)
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}
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}
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impl W {
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#[doc = "Bits 0:2 - Fast Phase Segment 2"]
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#[inline(always)]
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pub fn fpseg2(&mut self) -> FPSEG2_W {
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FPSEG2_W { w: self }
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}
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#[doc = "Bits 5:7 - Fast Phase Segment 1"]
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#[inline(always)]
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pub fn fpseg1(&mut self) -> FPSEG1_W {
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FPSEG1_W { w: self }
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}
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#[doc = "Bits 10:14 - Fast Propagation Segment"]
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#[inline(always)]
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pub fn fpropseg(&mut self) -> FPROPSEG_W {
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FPROPSEG_W { w: self }
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}
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#[doc = "Bits 16:18 - Fast Resync Jump Width"]
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#[inline(always)]
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pub fn frjw(&mut self) -> FRJW_W {
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FRJW_W { w: self }
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}
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#[doc = "Bits 20:29 - Fast Prescaler Division Factor"]
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#[inline(always)]
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pub fn fpresdiv(&mut self) -> FPRESDIV_W {
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FPRESDIV_W { w: self }
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}
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}
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