442 lines
11 KiB
Rust
442 lines
11 KiB
Rust
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#[doc = r" Value read from the register"]
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pub struct R {
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bits: u32,
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}
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#[doc = r" Value to write to the register"]
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pub struct W {
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bits: u32,
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}
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impl super::PCC_LPUART0 {
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#[doc = r" Modifies the contents of the register"]
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#[inline]
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pub fn modify<F>(&self, f: F)
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where
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for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
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{
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let bits = self.register.get();
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let r = R { bits: bits };
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let mut w = W { bits: bits };
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f(&r, &mut w);
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self.register.set(w.bits);
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}
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#[doc = r" Reads the contents of the register"]
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#[inline]
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pub fn read(&self) -> R {
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R { bits: self.register.get() }
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}
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#[doc = r" Writes to the register"]
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#[inline]
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pub fn write<F>(&self, f: F)
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where
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F: FnOnce(&mut W) -> &mut W,
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{
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let mut w = W::reset_value();
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f(&mut w);
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self.register.set(w.bits);
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}
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#[doc = r" Writes the reset value to the register"]
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#[inline]
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pub fn reset(&self) {
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self.write(|w| w)
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}
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}
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#[doc = "Possible values of the field `PCS`"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum PCSR {
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#[doc = "Clock is off."]
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_000,
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#[doc = "Clock option 1"]
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_001,
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#[doc = "Clock option 2"]
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_010,
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#[doc = "Clock option 3"]
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_011,
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#[doc = "Clock option 4"]
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_100,
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#[doc = "Clock option 5"]
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_101,
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#[doc = "Clock option 6"]
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_110,
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#[doc = "Clock option 7"]
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_111,
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}
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impl PCSR {
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#[doc = r" Value of the field as raw bits"]
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#[inline]
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pub fn bits(&self) -> u8 {
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match *self {
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PCSR::_000 => 0,
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PCSR::_001 => 1,
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PCSR::_010 => 2,
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PCSR::_011 => 3,
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PCSR::_100 => 4,
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PCSR::_101 => 5,
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PCSR::_110 => 6,
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PCSR::_111 => 7,
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}
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}
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#[allow(missing_docs)]
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#[doc(hidden)]
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#[inline]
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pub fn _from(value: u8) -> PCSR {
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match value {
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0 => PCSR::_000,
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1 => PCSR::_001,
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2 => PCSR::_010,
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3 => PCSR::_011,
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4 => PCSR::_100,
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5 => PCSR::_101,
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6 => PCSR::_110,
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7 => PCSR::_111,
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_ => unreachable!(),
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}
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}
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#[doc = "Checks if the value of the field is `_000`"]
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#[inline]
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pub fn is_000(&self) -> bool {
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*self == PCSR::_000
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}
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#[doc = "Checks if the value of the field is `_001`"]
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#[inline]
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pub fn is_001(&self) -> bool {
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*self == PCSR::_001
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}
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#[doc = "Checks if the value of the field is `_010`"]
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#[inline]
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pub fn is_010(&self) -> bool {
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*self == PCSR::_010
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}
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#[doc = "Checks if the value of the field is `_011`"]
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#[inline]
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pub fn is_011(&self) -> bool {
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*self == PCSR::_011
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}
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#[doc = "Checks if the value of the field is `_100`"]
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#[inline]
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pub fn is_100(&self) -> bool {
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*self == PCSR::_100
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}
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#[doc = "Checks if the value of the field is `_101`"]
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#[inline]
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pub fn is_101(&self) -> bool {
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*self == PCSR::_101
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}
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#[doc = "Checks if the value of the field is `_110`"]
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#[inline]
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pub fn is_110(&self) -> bool {
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*self == PCSR::_110
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}
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#[doc = "Checks if the value of the field is `_111`"]
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#[inline]
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pub fn is_111(&self) -> bool {
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*self == PCSR::_111
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}
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}
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#[doc = "Possible values of the field `CGC`"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum CGCR {
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#[doc = "Clock disabled"]
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_0,
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#[doc = "Clock enabled. The current clock selection and divider options are locked."]
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_1,
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}
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impl CGCR {
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#[doc = r" Returns `true` if the bit is clear (0)"]
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#[inline]
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pub fn bit_is_clear(&self) -> bool {
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!self.bit()
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}
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#[doc = r" Returns `true` if the bit is set (1)"]
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#[inline]
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pub fn bit_is_set(&self) -> bool {
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self.bit()
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}
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#[doc = r" Value of the field as raw bits"]
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#[inline]
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pub fn bit(&self) -> bool {
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match *self {
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CGCR::_0 => false,
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CGCR::_1 => true,
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}
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}
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#[allow(missing_docs)]
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#[doc(hidden)]
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#[inline]
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pub fn _from(value: bool) -> CGCR {
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match value {
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false => CGCR::_0,
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true => CGCR::_1,
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}
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}
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#[doc = "Checks if the value of the field is `_0`"]
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#[inline]
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pub fn is_0(&self) -> bool {
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*self == CGCR::_0
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}
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#[doc = "Checks if the value of the field is `_1`"]
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#[inline]
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pub fn is_1(&self) -> bool {
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*self == CGCR::_1
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}
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}
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#[doc = "Possible values of the field `PR`"]
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum PRR {
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#[doc = "Peripheral is not present."]
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_0,
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#[doc = "Peripheral is present."]
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_1,
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}
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impl PRR {
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#[doc = r" Returns `true` if the bit is clear (0)"]
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#[inline]
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pub fn bit_is_clear(&self) -> bool {
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!self.bit()
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}
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#[doc = r" Returns `true` if the bit is set (1)"]
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#[inline]
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pub fn bit_is_set(&self) -> bool {
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self.bit()
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}
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#[doc = r" Value of the field as raw bits"]
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#[inline]
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pub fn bit(&self) -> bool {
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match *self {
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PRR::_0 => false,
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PRR::_1 => true,
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}
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}
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#[allow(missing_docs)]
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#[doc(hidden)]
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#[inline]
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pub fn _from(value: bool) -> PRR {
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match value {
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false => PRR::_0,
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true => PRR::_1,
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}
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}
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#[doc = "Checks if the value of the field is `_0`"]
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#[inline]
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pub fn is_0(&self) -> bool {
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*self == PRR::_0
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}
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#[doc = "Checks if the value of the field is `_1`"]
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#[inline]
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pub fn is_1(&self) -> bool {
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*self == PRR::_1
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}
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}
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#[doc = "Values that can be written to the field `PCS`"]
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pub enum PCSW {
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#[doc = "Clock is off."]
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_000,
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#[doc = "Clock option 1"]
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_001,
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#[doc = "Clock option 2"]
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_010,
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#[doc = "Clock option 3"]
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_011,
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#[doc = "Clock option 4"]
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_100,
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#[doc = "Clock option 5"]
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_101,
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#[doc = "Clock option 6"]
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_110,
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#[doc = "Clock option 7"]
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_111,
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}
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impl PCSW {
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#[allow(missing_docs)]
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#[doc(hidden)]
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#[inline]
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pub fn _bits(&self) -> u8 {
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match *self {
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PCSW::_000 => 0,
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PCSW::_001 => 1,
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PCSW::_010 => 2,
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PCSW::_011 => 3,
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PCSW::_100 => 4,
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PCSW::_101 => 5,
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PCSW::_110 => 6,
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PCSW::_111 => 7,
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}
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}
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}
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#[doc = r" Proxy"]
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pub struct _PCSW<'a> {
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w: &'a mut W,
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}
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impl<'a> _PCSW<'a> {
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#[doc = r" Writes `variant` to the field"]
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#[inline]
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pub fn variant(self, variant: PCSW) -> &'a mut W {
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{
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self.bits(variant._bits())
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}
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}
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#[doc = "Clock is off."]
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#[inline]
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pub fn _000(self) -> &'a mut W {
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self.variant(PCSW::_000)
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}
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#[doc = "Clock option 1"]
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#[inline]
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pub fn _001(self) -> &'a mut W {
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self.variant(PCSW::_001)
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}
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#[doc = "Clock option 2"]
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#[inline]
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pub fn _010(self) -> &'a mut W {
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self.variant(PCSW::_010)
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}
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#[doc = "Clock option 3"]
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#[inline]
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pub fn _011(self) -> &'a mut W {
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self.variant(PCSW::_011)
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}
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#[doc = "Clock option 4"]
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#[inline]
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pub fn _100(self) -> &'a mut W {
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self.variant(PCSW::_100)
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}
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#[doc = "Clock option 5"]
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#[inline]
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pub fn _101(self) -> &'a mut W {
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self.variant(PCSW::_101)
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}
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#[doc = "Clock option 6"]
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#[inline]
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pub fn _110(self) -> &'a mut W {
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self.variant(PCSW::_110)
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}
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#[doc = "Clock option 7"]
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#[inline]
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pub fn _111(self) -> &'a mut W {
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self.variant(PCSW::_111)
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}
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#[doc = r" Writes raw bits to the field"]
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#[inline]
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pub fn bits(self, value: u8) -> &'a mut W {
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const MASK: u8 = 7;
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const OFFSET: u8 = 24;
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self.w.bits &= !((MASK as u32) << OFFSET);
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self.w.bits |= ((value & MASK) as u32) << OFFSET;
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self.w
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}
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}
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#[doc = "Values that can be written to the field `CGC`"]
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pub enum CGCW {
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#[doc = "Clock disabled"]
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_0,
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#[doc = "Clock enabled. The current clock selection and divider options are locked."]
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_1,
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}
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impl CGCW {
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#[allow(missing_docs)]
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#[doc(hidden)]
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#[inline]
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pub fn _bits(&self) -> bool {
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match *self {
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CGCW::_0 => false,
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CGCW::_1 => true,
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}
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}
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}
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#[doc = r" Proxy"]
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pub struct _CGCW<'a> {
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w: &'a mut W,
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}
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impl<'a> _CGCW<'a> {
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#[doc = r" Writes `variant` to the field"]
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#[inline]
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pub fn variant(self, variant: CGCW) -> &'a mut W {
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{
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self.bit(variant._bits())
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}
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}
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#[doc = "Clock disabled"]
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#[inline]
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pub fn _0(self) -> &'a mut W {
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self.variant(CGCW::_0)
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}
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#[doc = "Clock enabled. The current clock selection and divider options are locked."]
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#[inline]
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pub fn _1(self) -> &'a mut W {
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self.variant(CGCW::_1)
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}
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#[doc = r" Sets the field bit"]
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pub fn set_bit(self) -> &'a mut W {
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self.bit(true)
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}
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#[doc = r" Clears the field bit"]
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||
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pub fn clear_bit(self) -> &'a mut W {
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self.bit(false)
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}
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#[doc = r" Writes raw bits to the field"]
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#[inline]
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pub fn bit(self, value: bool) -> &'a mut W {
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const MASK: bool = true;
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const OFFSET: u8 = 30;
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|
self.w.bits &= !((MASK as u32) << OFFSET);
|
||
|
|
self.w.bits |= ((value & MASK) as u32) << OFFSET;
|
||
|
|
self.w
|
||
|
|
}
|
||
|
|
}
|
||
|
|
impl R {
|
||
|
|
#[doc = r" Value of the register as raw bits"]
|
||
|
|
#[inline]
|
||
|
|
pub fn bits(&self) -> u32 {
|
||
|
|
self.bits
|
||
|
|
}
|
||
|
|
#[doc = "Bits 24:26 - Peripheral Clock Source Select"]
|
||
|
|
#[inline]
|
||
|
|
pub fn pcs(&self) -> PCSR {
|
||
|
|
PCSR::_from({
|
||
|
|
const MASK: u8 = 7;
|
||
|
|
const OFFSET: u8 = 24;
|
||
|
|
((self.bits >> OFFSET) & MASK as u32) as u8
|
||
|
|
})
|
||
|
|
}
|
||
|
|
#[doc = "Bit 30 - Clock Gate Control"]
|
||
|
|
#[inline]
|
||
|
|
pub fn cgc(&self) -> CGCR {
|
||
|
|
CGCR::_from({
|
||
|
|
const MASK: bool = true;
|
||
|
|
const OFFSET: u8 = 30;
|
||
|
|
((self.bits >> OFFSET) & MASK as u32) != 0
|
||
|
|
})
|
||
|
|
}
|
||
|
|
#[doc = "Bit 31 - Present"]
|
||
|
|
#[inline]
|
||
|
|
pub fn pr(&self) -> PRR {
|
||
|
|
PRR::_from({
|
||
|
|
const MASK: bool = true;
|
||
|
|
const OFFSET: u8 = 31;
|
||
|
|
((self.bits >> OFFSET) & MASK as u32) != 0
|
||
|
|
})
|
||
|
|
}
|
||
|
|
}
|
||
|
|
impl W {
|
||
|
|
#[doc = r" Reset value of the register"]
|
||
|
|
#[inline]
|
||
|
|
pub fn reset_value() -> W {
|
||
|
|
W { bits: 2147483648 }
|
||
|
|
}
|
||
|
|
#[doc = r" Writes raw bits to the register"]
|
||
|
|
#[inline]
|
||
|
|
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
|
||
|
|
self.bits = bits;
|
||
|
|
self
|
||
|
|
}
|
||
|
|
#[doc = "Bits 24:26 - Peripheral Clock Source Select"]
|
||
|
|
#[inline]
|
||
|
|
pub fn pcs(&mut self) -> _PCSW {
|
||
|
|
_PCSW { w: self }
|
||
|
|
}
|
||
|
|
#[doc = "Bit 30 - Clock Gate Control"]
|
||
|
|
#[inline]
|
||
|
|
pub fn cgc(&mut self) -> _CGCW {
|
||
|
|
_CGCW { w: self }
|
||
|
|
}
|
||
|
|
}
|