s32k118.rs/src/cse_pram/_embedded_ram9lu.rs

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#[doc = "Reader of register _EmbeddedRAM9LU"]
pub type R = crate::R<u8, super::_EMBEDDEDRAM9LU>;
#[doc = "Writer for register _EmbeddedRAM9LU"]
pub type W = crate::W<u8, super::_EMBEDDEDRAM9LU>;
#[doc = "Register _EmbeddedRAM9LU `reset()`'s with value 0"]
impl crate::ResetValue for super::_EMBEDDEDRAM9LU {
type Type = u8;
#[inline(always)]
fn reset_value() -> Self::Type {
0
}
}
#[doc = "Reader of field `RAM_LU`"]
pub type RAM_LU_R = crate::R<u8, u8>;
#[doc = "Write proxy for field `RAM_LU`"]
pub struct RAM_LU_W<'a> {
w: &'a mut W,
}
impl<'a> RAM_LU_W<'a> {
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
self.w.bits = (self.w.bits & !0xff) | ((value as u8) & 0xff);
self.w
}
}
impl R {
#[doc = "Bits 0:7 - RAM_LU stores the second 8 bits of the 32 bit CRC"]
#[inline(always)]
pub fn ram_lu(&self) -> RAM_LU_R {
RAM_LU_R::new((self.bits & 0xff) as u8)
}
}
impl W {
#[doc = "Bits 0:7 - RAM_LU stores the second 8 bits of the 32 bit CRC"]
#[inline(always)]
pub fn ram_lu(&mut self) -> RAM_LU_W {
RAM_LU_W { w: self }
}
}