2018-11-28 18:19:51 +00:00
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#include <stdint.h>
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#include <stdio.h>
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#include <fcntl.h>
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#include <unistd.h>
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#include <sys/types.h>
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#include <sys/stat.h>
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#include <string.h>
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#include <stdlib.h>
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#include "rpi.h"
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#include "spi.h"
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#include "fpga.h"
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#define S_MOSI 10
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#define S_MISO 9
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#define S_CLK 11
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#define S_CE0 8
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#define S_HOLD 25
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#define S_WP 24
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#define S_D0 S_MOSI
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#define S_D1 S_MISO
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#define S_D2 S_WP
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#define S_D3 S_HOLD
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#define F_RESET 27
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#define F_DONE 17
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static inline int isprint(int c)
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{
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return c > 32 && c < 127;
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}
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int print_hex_offset(FILE *stream,
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const void *block, int count, int offset, uint32_t start)
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{
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int byte;
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const uint8_t *b = block;
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count += offset;
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b -= offset;
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for ( ; offset < count; offset += 16) {
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fprintf(stream, "%08x", start + offset);
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for (byte = 0; byte < 16; byte++) {
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if (byte == 8)
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fprintf(stream, " ");
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fprintf(stream, " ");
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if (offset + byte < count)
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fprintf(stream, "%02x", b[offset + byte] & 0xff);
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else
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fprintf(stream, " ");
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}
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fprintf(stream, " |");
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for (byte = 0; byte < 16 && byte + offset < count; byte++)
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fprintf(stream, "%c", isprint(b[offset + byte]) ? b[offset + byte] : '.');
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fprintf(stream, "|\r\n");
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}
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return 0;
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}
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int print_hex(const void *block, int count, uint32_t start)
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{
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FILE *stream = stdout;
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return print_hex_offset(stream, block, count, 0, start);
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}
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enum op {
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OP_SPI_READ,
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OP_SPI_WRITE,
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OP_SPI_VERIFY,
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OP_SPI_PEEK,
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2018-11-29 09:27:29 +00:00
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OP_SPI_ID,
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2018-11-28 18:19:51 +00:00
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OP_FPGA_BOOT,
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OP_FPGA_RESET,
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OP_UNKNOWN,
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};
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2018-12-17 14:07:10 +00:00
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static int pinspec_to_pinname(char code) {
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switch (code) {
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case '0': return SP_D0;
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case '1': return SP_D1;
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case '2': return SP_D2;
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case '3': return SP_D3;
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case 'o': return SP_MOSI;
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case 'i': return SP_MISO;
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case 'w': return SP_WP;
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case 'h': return SP_HOLD;
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case 'k': return SP_CLK;
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case 'c': return SP_CS;
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case 'r': return FP_RESET;
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case 'd': return FP_DONE;
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default: return -1;
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}
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}
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2018-11-29 09:27:29 +00:00
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static int print_pinspec(FILE *stream) {
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2018-12-17 14:07:10 +00:00
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fprintf(stream, "Pinspec:\n");
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fprintf(stream, " Name Description Default\n");
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fprintf(stream, " 0 SPI D0 %d\n", S_D0);
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fprintf(stream, " 1 SPI D1 %d\n", S_D1);
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fprintf(stream, " 2 SPI D2 %d\n", S_D2);
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fprintf(stream, " 3 SPI D3 %d\n", S_D3);
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fprintf(stream, " o SPI MOSI %d\n", S_MOSI);
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fprintf(stream, " i SPI MISO %d\n", S_MISO);
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fprintf(stream, " w SPI WP %d\n", S_WP);
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fprintf(stream, " h SPI HOLD %d\n", S_HOLD);
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fprintf(stream, " k SPI CLK %d\n", S_CLK);
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fprintf(stream, " c SPI CS %d\n", S_CE0);
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fprintf(stream, " r FPGA Reset %d\n", F_RESET);
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fprintf(stream, " d FPGA Done %d\n", F_DONE);
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fprintf(stream, "For example: -g i:23 or -g d:27\n");
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return 0;
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}
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2018-11-29 09:27:29 +00:00
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static int print_program_modes(FILE *stream) {
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2018-11-28 18:19:51 +00:00
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fprintf(stream, " -h This help page\n");
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fprintf(stream, " -r Reset the FPGA and have it boot from SPI\n");
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2018-11-29 09:27:29 +00:00
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fprintf(stream, " -i Print out the SPI ID code\n");
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2018-12-17 13:40:40 +00:00
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fprintf(stream, " -p offset Peek at 256 bytes of SPI flash at the specified offset\n");
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2018-11-28 18:19:51 +00:00
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fprintf(stream, " -f bin Load this binary directly into the FPGA\n");
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fprintf(stream, " -w bin Write this binary into the SPI flash chip\n");
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fprintf(stream, " -v bin Verify the SPI flash contains this data\n");
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fprintf(stream, " -s out Save the SPI flash contents to this file\n");
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2018-11-29 09:27:29 +00:00
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return 0;
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}
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static int print_help(FILE *stream, const char *progname) {
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fprintf(stream, "Fomu Raspberry Pi Flash Utilities\n");
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fprintf(stream, "Usage:\n");
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fprintf(stream, "%15s (-[hri] | [-p offset] | [-f bin] | [-w bin] | [-v bin] | [-s out])\n", progname);
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fprintf(stream, " [-g pinspec] [-t spitype] [-r]\n");
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fprintf(stream, "Program mode (pick one):\n");
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print_program_modes(stream);
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fprintf(stream, "Configuration options:\n");
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2018-12-17 14:07:10 +00:00
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fprintf(stream, " -g ps Set the pin assignment with the given pinspec\n");
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2018-11-29 08:51:49 +00:00
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fprintf(stream, " -t type Set the number of bits to use for SPI (1, 2, 4, or Q)\n");
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2018-12-17 14:07:10 +00:00
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fprintf(stream, "You can remap various pins with -g. The format is [name]:[number].\n");
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2018-11-29 09:27:29 +00:00
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fprintf(stream, "\n");
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2018-11-29 08:51:49 +00:00
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fprintf(stream, "The width of SPI can be set with 't [width]'. Valid widths are:\n");
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fprintf(stream, " 1 - standard 1-bit spi\n");
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fprintf(stream, " 2 - standard 2-bit spi\n");
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fprintf(stream, " 4 - standard 4-bit spi (with 1-bit commands)\n");
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fprintf(stream, " q - 4-bit qspi (with 4-bit commands)\n");
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2018-12-17 14:07:10 +00:00
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fprintf(stream, "\n");
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print_pinspec(stream);
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2018-11-28 18:19:51 +00:00
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return 0;
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}
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2018-11-29 09:27:29 +00:00
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static int print_usage_error(FILE *stream) {
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fprintf(stream, "Error: You must only specify one program mode:\n");
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print_program_modes(stream);
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return 1;
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}
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2018-11-28 18:19:51 +00:00
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int main(int argc, char **argv) {
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int opt;
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int fd;
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char *op_filename = NULL;
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struct ff_spi *spi;
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struct ff_fpga *fpga;
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2018-12-17 13:40:40 +00:00
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int peek_offset = 0;
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2018-11-28 18:19:51 +00:00
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enum op op = OP_UNKNOWN;
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2018-11-29 08:51:49 +00:00
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enum spi_type spi_type = ST_SINGLE;
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2018-11-28 18:19:51 +00:00
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spi = spiAlloc();
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fpga = fpgaAlloc();
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spiSetPin(spi, SP_CLK, S_CLK);
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spiSetPin(spi, SP_D0, S_D0);
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spiSetPin(spi, SP_D1, S_D1);
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spiSetPin(spi, SP_D2, S_D2);
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spiSetPin(spi, SP_D3, S_D3);
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spiSetPin(spi, SP_MISO, S_MISO);
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spiSetPin(spi, SP_MOSI, S_MOSI);
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spiSetPin(spi, SP_HOLD, S_HOLD);
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spiSetPin(spi, SP_WP, S_WP);
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spiSetPin(spi, SP_CS, S_CE0);
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fpgaSetPin(fpga, FP_RESET, F_RESET);
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fpgaSetPin(fpga, FP_DONE, F_DONE);
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fpgaSetPin(fpga, FP_CS, S_CE0);
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if (gpioInitialise() < 0) {
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fprintf(stderr, "Unable to initialize GPIO\n");
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return 1;
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}
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2018-11-29 09:27:29 +00:00
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while ((opt = getopt(argc, argv, "hip:rf:w:s:2:3:v:g:t:")) != -1) {
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2018-11-28 18:19:51 +00:00
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switch (opt) {
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case 'r':
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2018-11-29 09:27:29 +00:00
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if (op != OP_UNKNOWN)
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return print_usage_error(stdout);
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2018-11-28 18:19:51 +00:00
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op = OP_FPGA_RESET;
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break;
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2018-11-29 09:27:29 +00:00
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case 'i':
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if (op != OP_UNKNOWN)
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return print_usage_error(stdout);
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op = OP_SPI_ID;
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break;
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2018-11-28 18:19:51 +00:00
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case 'p':
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2018-11-29 09:27:29 +00:00
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if (op != OP_UNKNOWN)
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return print_usage_error(stdout);
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2018-11-28 18:19:51 +00:00
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op = OP_SPI_PEEK;
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2018-12-17 13:40:40 +00:00
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peek_offset = strtoul(optarg, NULL, 0);
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2018-11-28 18:19:51 +00:00
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break;
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2018-11-29 08:51:49 +00:00
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case 't':
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switch (*optarg) {
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case '1':
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spi_type = ST_SINGLE;
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break;
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case '2':
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spi_type = ST_DUAL;
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break;
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case '4':
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spi_type = ST_QUAD;
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break;
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case 'q':
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spi_type = ST_QPI;
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break;
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default:
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fprintf(stderr, "Unrecognized SPI speed '%c'. Valid types are: 1, 2, 4, or q\n", *optarg);
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return 1;
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}
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break;
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2018-12-17 14:07:10 +00:00
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case 'g':
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if ((optarg[0] == '\0') || (optarg[1] != ':')) {
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fprintf(stderr, "-g requires a pinspec. Usage:\n");
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print_pinspec(stderr);
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return 1;
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}
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spiSetPin(spi, pinspec_to_pinname(optarg[0]), strtoul(optarg+2, NULL, 0));
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break;
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case '2':
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spiSetPin(spi, SP_D2, strtoul(optarg, NULL, 0));
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break;
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case '3':
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spiSetPin(spi, SP_D3, strtoul(optarg, NULL, 0));
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break;
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2018-11-28 18:19:51 +00:00
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case 'f':
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2018-11-29 09:27:29 +00:00
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if (op != OP_UNKNOWN)
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return print_usage_error(stdout);
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2018-11-28 18:19:51 +00:00
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op = OP_FPGA_BOOT;
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if (op_filename)
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free(op_filename);
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op_filename = strdup(optarg);
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break;
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case 'w':
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2018-11-29 09:27:29 +00:00
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if (op != OP_UNKNOWN)
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return print_usage_error(stdout);
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2018-11-28 18:19:51 +00:00
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op = OP_SPI_WRITE;
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if (op_filename)
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free(op_filename);
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op_filename = strdup(optarg);
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break;
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case 'v':
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2018-11-29 09:27:29 +00:00
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if (op != OP_UNKNOWN)
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return print_usage_error(stdout);
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2018-11-28 18:19:51 +00:00
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op = OP_SPI_VERIFY;
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if (op_filename)
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free(op_filename);
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op_filename = strdup(optarg);
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break;
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case 's':
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2018-11-29 09:27:29 +00:00
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if (op != OP_UNKNOWN)
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return print_usage_error(stdout);
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2018-11-28 18:19:51 +00:00
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op = OP_SPI_READ;
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if (op_filename)
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free(op_filename);
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op_filename = strdup(optarg);
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break;
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default:
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print_help(stdout, argv[0]);
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return 1;
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}
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}
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if (op == OP_UNKNOWN) {
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print_help(stdout, argv[0]);
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return 1;
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}
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spiInit(spi);
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fpgaInit(fpga);
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2018-11-29 09:27:29 +00:00
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spiSetType(spi, spi_type);
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fpgaReset(fpga);
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2018-11-28 18:19:51 +00:00
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switch (op) {
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2018-11-29 09:27:29 +00:00
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case OP_SPI_ID: {
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struct spi_id id = spiId(spi);
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printf("Device ID: %02x\n", id.device_id);
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if (id.device_id != id.signature)
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printf("!! Electronic Signature: %02x\n", id.signature);
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printf("Manufacturer ID: %02x\n", id.manufacturer_id);
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if (id.manufacturer_id != id._manufacturer_id)
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printf("!! JEDEC Manufacturer ID: %02x\n",
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id._manufacturer_id);
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printf("Memory type: %02x\n", id.memory_type);
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printf("Memory size: %02x\n", id.memory_size);
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printf("Serial number: %02x %02x %02x %02x\n", id.serial[0], id.serial[1], id.serial[2], id.serial[3]);
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2018-12-19 01:32:10 +00:00
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printf("SR1: %02x\n", spiReadSr(spi, 1));
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printf("SR2: %02x\n", spiReadSr(spi, 2));
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printf("SR3: %02x\n", spiReadSr(spi, 3));
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2018-11-29 09:27:29 +00:00
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break;
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}
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2018-11-28 18:19:51 +00:00
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case OP_SPI_READ: {
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fd = open(op_filename, O_WRONLY | O_CREAT | O_TRUNC, 0777);
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if (fd == -1) {
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perror("unable to open output file");
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break;
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}
|
|
|
|
uint8_t *bfr = malloc(16777216);
|
|
|
|
spiRead(spi, 0, bfr, 16777216);
|
|
|
|
if (write(fd, bfr, 16777216) != 16777216) {
|
|
|
|
perror("unable to write SPI flash image");
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
close(fd);
|
|
|
|
free(bfr);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
case OP_SPI_WRITE: {
|
|
|
|
fd = open(op_filename, O_RDONLY);
|
|
|
|
if (fd == -1) {
|
|
|
|
perror("unable to open input file");
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
struct stat stat;
|
|
|
|
if (fstat(fd, &stat) == -1) {
|
|
|
|
perror("unable to get bitstream file size");
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
uint8_t *bfr = malloc(stat.st_size);
|
|
|
|
if (!bfr) {
|
|
|
|
perror("unable to alloc memory for buffer");
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
if (read(fd, bfr, stat.st_size) != stat.st_size) {
|
|
|
|
perror("unable to read from file");
|
|
|
|
free(bfr);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
close(fd);
|
|
|
|
spiWrite(spi, 0, bfr, stat.st_size);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
case OP_SPI_VERIFY: {
|
|
|
|
fd = open(op_filename, O_RDONLY);
|
|
|
|
if (fd == -1) {
|
|
|
|
perror("unable to open input file");
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
struct stat stat;
|
|
|
|
if (fstat(fd, &stat) == -1) {
|
|
|
|
perror("unable to get bitstream file size");
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
uint8_t *file_src = malloc(stat.st_size);
|
|
|
|
uint8_t *spi_src = malloc(stat.st_size);
|
|
|
|
if (!file_src) {
|
|
|
|
perror("unable to alloc memory for buffer");
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
if (read(fd, file_src, stat.st_size) != stat.st_size) {
|
|
|
|
perror("unable to read from file");
|
|
|
|
free(file_src);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
close(fd);
|
|
|
|
|
|
|
|
spiRead(spi, 0, spi_src, stat.st_size);
|
|
|
|
|
|
|
|
int offset;
|
|
|
|
for (offset = 0; offset < stat.st_size; offset++) {
|
|
|
|
if (file_src[offset] != spi_src[offset])
|
|
|
|
printf("%9d: file: %02x spi: %02x\n",
|
|
|
|
offset, file_src[offset], spi_src[offset]);
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
case OP_SPI_PEEK: {
|
2018-12-17 13:40:40 +00:00
|
|
|
uint8_t page[256];
|
|
|
|
spiRead(spi, peek_offset, page, sizeof(page));
|
|
|
|
print_hex_offset(stdout, page, sizeof(page), 0, 0);
|
2018-11-28 18:19:51 +00:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
case OP_FPGA_BOOT: {
|
|
|
|
spiHold(spi);
|
|
|
|
spiSwapTxRx(spi);
|
|
|
|
fpgaResetSlave(fpga);
|
|
|
|
|
|
|
|
fprintf(stderr, "FPGA Done? %d\n", fpgaDone(fpga));
|
|
|
|
|
|
|
|
int fd = open(op_filename, O_RDONLY);
|
|
|
|
if (fd == -1) {
|
|
|
|
perror("unable to open fpga bitstream");
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
spiBegin(spi);
|
|
|
|
|
|
|
|
uint8_t bfr[32768];
|
|
|
|
int count;
|
|
|
|
while ((count = read(fd, bfr, sizeof(bfr))) > 0) {
|
|
|
|
int i;
|
|
|
|
for (i = 0; i < count; i++)
|
|
|
|
spiTx(spi, bfr[i]);
|
|
|
|
}
|
|
|
|
if (count < 0) {
|
|
|
|
perror("unable to read from fpga bitstream file");
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
close(fd);
|
|
|
|
for (count = 0; count < 500; count++)
|
|
|
|
spiTx(spi, 0xff);
|
|
|
|
fprintf(stderr, "FPGA Done? %d\n", fpgaDone(fpga));
|
|
|
|
spiEnd(spi);
|
|
|
|
|
|
|
|
spiSwapTxRx(spi);
|
|
|
|
spiUnhold(spi);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
case OP_FPGA_RESET:
|
|
|
|
printf("resetting fpga\n");
|
|
|
|
fpgaResetMaster(fpga);
|
|
|
|
break;
|
|
|
|
|
|
|
|
default:
|
|
|
|
fprintf(stderr, "error: unknown operation\n");
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
fpgaFree(&fpga);
|
|
|
|
spiFree(&spi);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|