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Sean Cross cad2ae01d7 foboot-bitstream: use crystal for 12 MHz clock

This fixes heterodyning that was occurring in the USB block, as it
transitioned from the 48 MHz down to the 12 MHz domain.

Signed-off-by: Sean Cross <sean@xobs.io>

2019-02-27 14:20:04 +08:00

bin

initial commit

2019-02-18 10:48:43 +08:00

deps

deps: migen: fix upstream ref

2019-02-25 16:36:21 +08:00

.gitignore

gitignore: ignore env, build, pycache

2019-02-18 12:44:19 +08:00

.gitmodules

deps: add valentyusb

2019-02-18 12:43:09 +08:00

csr-test.py

csr-test: add simple program to test CSRs

2019-02-25 16:19:01 +08:00

foboot-bitstream.py

foboot-bitstream: use crystal for 12 MHz clock

2019-02-27 14:20:04 +08:00

lxbuildenv.py

lxbuildenv: riscv: also allow riscv32 toolchain

2019-02-25 16:25:16 +08:00